* [dpdk-dev] [PATCH 22.02 1/2] common/cnxk: support to set channel mask for SDP interfaces @ 2021-11-09 9:42 psatheesh 2021-11-09 9:42 ` [dpdk-dev] [PATCH 22.02 2/2] net/cnxk: add devargs for configuring SDP channel mask psatheesh 2021-12-21 10:18 ` [dpdk-dev] [PATCH 22.02 1/2] common/cnxk: support to set channel mask for SDP interfaces Jerin Jacob 0 siblings, 2 replies; 6+ messages in thread From: psatheesh @ 2021-11-09 9:42 UTC (permalink / raw) To: Nithin Dabilpuram, Kiran Kumar K, Sunil Kumar Kori, Satha Rao Cc: dev, Satheesh Paul From: Satheesh Paul <psatheesh@marvell.com> ROC changes to support setting channel mask for SDP interfaces. Signed-off-by: Satheesh Paul <psatheesh@marvell.com> --- drivers/common/cnxk/roc_npc.c | 13 +++++++++++++ drivers/common/cnxk/roc_npc.h | 3 +++ drivers/common/cnxk/roc_npc_mcam.c | 10 ++++++++++ drivers/common/cnxk/roc_npc_priv.h | 3 +++ 4 files changed, 29 insertions(+) diff --git a/drivers/common/cnxk/roc_npc.c b/drivers/common/cnxk/roc_npc.c index 503c74748f..d18dfd4259 100644 --- a/drivers/common/cnxk/roc_npc.c +++ b/drivers/common/cnxk/roc_npc.c @@ -1152,6 +1152,19 @@ roc_npc_flow_create(struct roc_npc *roc_npc, const struct roc_npc_attr *attr, int rc; npc->channel = roc_npc->channel; + npc->is_sdp_link = roc_nix_is_sdp(roc_npc->roc_nix); + if (npc->is_sdp_link) { + if (roc_npc->is_sdp_mask_set) { + npc->sdp_channel = roc_npc->sdp_channel; + npc->sdp_channel_mask = roc_npc->sdp_channel_mask; + } else { + /* By default set the channel and mask to cover + * the whole SDP channel range. + */ + npc->sdp_channel = (uint16_t)NIX_CHAN_SDP_CH_START; + npc->sdp_channel_mask = (uint16_t)NIX_CHAN_SDP_CH_START; + } + } flow = plt_zmalloc(sizeof(*flow), 0); if (flow == NULL) { diff --git a/drivers/common/cnxk/roc_npc.h b/drivers/common/cnxk/roc_npc.h index e13d557136..8c24126ae8 100644 --- a/drivers/common/cnxk/roc_npc.h +++ b/drivers/common/cnxk/roc_npc.h @@ -195,6 +195,9 @@ struct roc_npc { uint64_t rx_parse_nibble; /* Parsed RSS Flowkey cfg for current flow being created */ uint32_t flowkey_cfg_state; + bool is_sdp_mask_set; + uint16_t sdp_channel; + uint16_t sdp_channel_mask; #define ROC_NPC_MEM_SZ (5 * 1024) uint8_t reserved[ROC_NPC_MEM_SZ]; diff --git a/drivers/common/cnxk/roc_npc_mcam.c b/drivers/common/cnxk/roc_npc_mcam.c index ba7f89b45b..80851d6f9f 100644 --- a/drivers/common/cnxk/roc_npc_mcam.c +++ b/drivers/common/cnxk/roc_npc_mcam.c @@ -575,6 +575,16 @@ npc_mcam_alloc_and_write(struct npc *npc, struct roc_npc_flow *flow, flow->npc_action |= (uint64_t)pf_func << 4; flow->mcam_data[0] |= (uint64_t)inl_dev->channel; flow->mcam_mask[0] |= (uint64_t)inl_dev->chan_mask; + } else if (npc->is_sdp_link) { + req->entry_data.kw[0] &= ~(GENMASK(11, 0)); + req->entry_data.kw_mask[0] &= ~(GENMASK(11, 0)); + req->entry_data.kw[0] |= (uint64_t)npc->sdp_channel; + req->entry_data.kw_mask[0] |= + (uint64_t)npc->sdp_channel_mask; + flow->mcam_data[0] &= ~(GENMASK(11, 0)); + flow->mcam_mask[0] &= ~(GENMASK(11, 0)); + flow->mcam_data[0] |= (uint64_t)npc->sdp_channel; + flow->mcam_mask[0] |= (uint64_t)npc->sdp_channel_mask; } else { req->entry_data.kw[0] |= (uint64_t)npc->channel; req->entry_data.kw_mask[0] |= (BIT_ULL(12) - 1); diff --git a/drivers/common/cnxk/roc_npc_priv.h b/drivers/common/cnxk/roc_npc_priv.h index 712302bc5c..86c10ea082 100644 --- a/drivers/common/cnxk/roc_npc_priv.h +++ b/drivers/common/cnxk/roc_npc_priv.h @@ -360,6 +360,9 @@ struct npc { uint32_t keyw[NPC_MAX_INTF]; /* max key + data len bits */ uint32_t mcam_entries; /* mcam entries supported */ uint16_t channel; /* RX Channel number */ + bool is_sdp_link; + uint16_t sdp_channel; + uint16_t sdp_channel_mask; uint32_t rss_grps; /* rss groups supported */ uint16_t flow_prealloc_size; /* Pre allocated mcam size */ uint16_t flow_max_priority; /* Max priority for flow */ -- 2.25.4 ^ permalink raw reply [flat|nested] 6+ messages in thread
* [dpdk-dev] [PATCH 22.02 2/2] net/cnxk: add devargs for configuring SDP channel mask 2021-11-09 9:42 [dpdk-dev] [PATCH 22.02 1/2] common/cnxk: support to set channel mask for SDP interfaces psatheesh @ 2021-11-09 9:42 ` psatheesh 2022-01-11 11:56 ` Ferruh Yigit 2021-12-21 10:18 ` [dpdk-dev] [PATCH 22.02 1/2] common/cnxk: support to set channel mask for SDP interfaces Jerin Jacob 1 sibling, 1 reply; 6+ messages in thread From: psatheesh @ 2021-11-09 9:42 UTC (permalink / raw) To: Nithin Dabilpuram, Kiran Kumar K, Sunil Kumar Kori, Satha Rao Cc: dev, Satheesh Paul From: Satheesh Paul <psatheesh@marvell.com> This patch adds support to configure channel mask which will be used by rte flow when adding flow rules on SDP interfaces. Signed-off-by: Satheesh Paul <psatheesh@marvell.com> --- doc/guides/nics/cnxk.rst | 21 ++++++++++++++ drivers/net/cnxk/cnxk_ethdev_devargs.c | 40 ++++++++++++++++++++++++-- 2 files changed, 59 insertions(+), 2 deletions(-) diff --git a/doc/guides/nics/cnxk.rst b/doc/guides/nics/cnxk.rst index 837ffc02b4..470e01b811 100644 --- a/doc/guides/nics/cnxk.rst +++ b/doc/guides/nics/cnxk.rst @@ -276,6 +276,27 @@ Runtime Config Options set with this custom mask, inbound encrypted traffic from all ports with matching channel number pattern will be directed to the inline IPSec device. +- ``SDP device channel and mask`` (default ``none``) + Set channel and channel mask configuration for the SDP device. This + will be used when creating flow rules on the SDP device. + + By default, for rules created on the SDP device, the RTE Flow API sets the + channel number and mask to cover the entire SDP channel range in the channel + field of the MCAM entry. This behaviour can be modified using the + ``sdp_channel_mask`` ``devargs`` parameter. + + For example:: + + -a 0002:1d:00.0,sdp_channel_mask=0x700/0xf00 + + With the above configuration, RTE Flow rules API will set the channel + and channel mask as 0x700 and 0xF00 in the MCAM entries of the flow rules + created on the SDP device. This option needs to be used when more than one + SDP interface is in use and RTE Flow rules created need to distinguish + between traffic from each SDP interface. The channel and mask combination + specified should match all the channels(or rings) configured on the SDP + interface. + .. note:: Above devarg parameters are configurable per device, user needs to pass the diff --git a/drivers/net/cnxk/cnxk_ethdev_devargs.c b/drivers/net/cnxk/cnxk_ethdev_devargs.c index e068f55349..ad7babdf52 100644 --- a/drivers/net/cnxk/cnxk_ethdev_devargs.c +++ b/drivers/net/cnxk/cnxk_ethdev_devargs.c @@ -7,6 +7,12 @@ #include "cnxk_ethdev.h" +struct sdp_channel { + bool is_sdp_mask_set; + uint16_t channel; + uint16_t mask; +}; + static int parse_outb_nb_desc(const char *key, const char *value, void *extra_args) { @@ -164,6 +170,27 @@ parse_switch_header_type(const char *key, const char *value, void *extra_args) return 0; } +static int +parse_sdp_channel_mask(const char *key, const char *value, void *extra_args) +{ + RTE_SET_USED(key); + uint16_t chan = 0, mask = 0; + char *next = 0; + + /* next will point to the separator '/' */ + chan = strtol(value, &next, 16); + mask = strtol(++next, 0, 16); + + if (chan > GENMASK(11, 0) || mask > GENMASK(11, 0)) + return -EINVAL; + + ((struct sdp_channel *)extra_args)->channel = chan; + ((struct sdp_channel *)extra_args)->mask = mask; + ((struct sdp_channel *)extra_args)->is_sdp_mask_set = true; + + return 0; +} + #define CNXK_RSS_RETA_SIZE "reta_size" #define CNXK_SCL_ENABLE "scalar_enable" #define CNXK_MAX_SQB_COUNT "max_sqb_count" @@ -177,6 +204,7 @@ parse_switch_header_type(const char *key, const char *value, void *extra_args) #define CNXK_OUTB_NB_DESC "outb_nb_desc" #define CNXK_FORCE_INB_INL_DEV "force_inb_inl_dev" #define CNXK_OUTB_NB_CRYPTO_QS "outb_nb_crypto_qs" +#define CNXK_SDP_CHANNEL_MASK "sdp_channel_mask" int cnxk_ethdev_parse_devargs(struct rte_devargs *devargs, struct cnxk_eth_dev *dev) @@ -191,11 +219,14 @@ cnxk_ethdev_parse_devargs(struct rte_devargs *devargs, struct cnxk_eth_dev *dev) uint16_t force_inb_inl_dev = 0; uint16_t outb_nb_crypto_qs = 1; uint16_t outb_nb_desc = 8200; + struct sdp_channel sdp_chan; uint16_t rss_tag_as_xor = 0; uint16_t scalar_enable = 0; uint8_t lock_rx_ctx = 0; struct rte_kvargs *kvlist; + memset(&sdp_chan, 0, sizeof(sdp_chan)); + if (devargs == NULL) goto null_devargs; @@ -228,6 +259,8 @@ cnxk_ethdev_parse_devargs(struct rte_devargs *devargs, struct cnxk_eth_dev *dev) &parse_outb_nb_crypto_qs, &outb_nb_crypto_qs); rte_kvargs_process(kvlist, CNXK_FORCE_INB_INL_DEV, &parse_flag, &force_inb_inl_dev); + rte_kvargs_process(kvlist, CNXK_SDP_CHANNEL_MASK, + &parse_sdp_channel_mask, &sdp_chan); rte_kvargs_free(kvlist); null_devargs: @@ -246,8 +279,10 @@ cnxk_ethdev_parse_devargs(struct rte_devargs *devargs, struct cnxk_eth_dev *dev) dev->npc.flow_prealloc_size = flow_prealloc_size; dev->npc.flow_max_priority = flow_max_priority; dev->npc.switch_header_type = switch_header_type; + dev->npc.sdp_channel = sdp_chan.channel; + dev->npc.sdp_channel_mask = sdp_chan.mask; + dev->npc.is_sdp_mask_set = sdp_chan.is_sdp_mask_set; return 0; - exit: return -EINVAL; } @@ -263,4 +298,5 @@ RTE_PMD_REGISTER_PARAM_STRING(net_cnxk, CNXK_IPSEC_IN_MAX_SPI "=<1-65535>" CNXK_OUTB_NB_DESC "=<1-65535>" CNXK_OUTB_NB_CRYPTO_QS "=<1-64>" - CNXK_FORCE_INB_INL_DEV "=1"); + CNXK_FORCE_INB_INL_DEV "=1" + CNXK_SDP_CHANNEL_MASK "=<1-4095>/<1-4095>"); -- 2.25.4 ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [dpdk-dev] [PATCH 22.02 2/2] net/cnxk: add devargs for configuring SDP channel mask 2021-11-09 9:42 ` [dpdk-dev] [PATCH 22.02 2/2] net/cnxk: add devargs for configuring SDP channel mask psatheesh @ 2022-01-11 11:56 ` Ferruh Yigit 2022-01-11 14:29 ` [EXT] " Satheesh Paul 0 siblings, 1 reply; 6+ messages in thread From: Ferruh Yigit @ 2022-01-11 11:56 UTC (permalink / raw) To: psatheesh, Nithin Dabilpuram, Kiran Kumar K, Sunil Kumar Kori, Satha Rao Cc: dev, Ori Kam, Andrew Rybchenko On 11/9/2021 9:42 AM, psatheesh@marvell.com wrote: > From: Satheesh Paul <psatheesh@marvell.com> > > This patch adds support to configure channel mask which will > be used by rte flow when adding flow rules on SDP interfaces. > Hi Satheesh, + Ori & Andrew. What 'SDP' stands for? And can this new devarg be provided with flow rule? Why it needs to be a new devarg? Can you please give a sample of the rte flow API that will be used? Thanks, ferruh > Signed-off-by: Satheesh Paul <psatheesh@marvell.com> > --- > doc/guides/nics/cnxk.rst | 21 ++++++++++++++ > drivers/net/cnxk/cnxk_ethdev_devargs.c | 40 ++++++++++++++++++++++++-- > 2 files changed, 59 insertions(+), 2 deletions(-) > > diff --git a/doc/guides/nics/cnxk.rst b/doc/guides/nics/cnxk.rst > index 837ffc02b4..470e01b811 100644 > --- a/doc/guides/nics/cnxk.rst > +++ b/doc/guides/nics/cnxk.rst > @@ -276,6 +276,27 @@ Runtime Config Options > set with this custom mask, inbound encrypted traffic from all ports with > matching channel number pattern will be directed to the inline IPSec device. > > +- ``SDP device channel and mask`` (default ``none``) > + Set channel and channel mask configuration for the SDP device. This > + will be used when creating flow rules on the SDP device. > + > + By default, for rules created on the SDP device, the RTE Flow API sets the > + channel number and mask to cover the entire SDP channel range in the channel > + field of the MCAM entry. This behaviour can be modified using the > + ``sdp_channel_mask`` ``devargs`` parameter. > + > + For example:: > + > + -a 0002:1d:00.0,sdp_channel_mask=0x700/0xf00 > + > + With the above configuration, RTE Flow rules API will set the channel > + and channel mask as 0x700 and 0xF00 in the MCAM entries of the flow rules > + created on the SDP device. This option needs to be used when more than one > + SDP interface is in use and RTE Flow rules created need to distinguish > + between traffic from each SDP interface. The channel and mask combination > + specified should match all the channels(or rings) configured on the SDP > + interface. > + > .. note:: > <...> ^ permalink raw reply [flat|nested] 6+ messages in thread
* RE: [EXT] Re: [dpdk-dev] [PATCH 22.02 2/2] net/cnxk: add devargs for configuring SDP channel mask 2022-01-11 11:56 ` Ferruh Yigit @ 2022-01-11 14:29 ` Satheesh Paul 2022-01-12 10:57 ` Ferruh Yigit 0 siblings, 1 reply; 6+ messages in thread From: Satheesh Paul @ 2022-01-11 14:29 UTC (permalink / raw) To: Ferruh Yigit, Nithin Kumar Dabilpuram, Kiran Kumar Kokkilagadda, Sunil Kumar Kori, Satha Koteswara Rao Kottidi Cc: dev, Ori Kam, Andrew Rybchenko Hi, Please find reply inline. Thanks, Satheesh. -----Original Message----- From: Ferruh Yigit <ferruh.yigit@intel.com> Sent: 11 January 2022 05:26 PM To: Satheesh Paul <psatheesh@marvell.com>; Nithin Kumar Dabilpuram <ndabilpuram@marvell.com>; Kiran Kumar Kokkilagadda <kirankumark@marvell.com>; Sunil Kumar Kori <skori@marvell.com>; Satha Koteswara Rao Kottidi <skoteshwar@marvell.com> Cc: dev@dpdk.org; Ori Kam <orika@nvidia.com>; Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru> Subject: [EXT] Re: [dpdk-dev] [PATCH 22.02 2/2] net/cnxk: add devargs for configuring SDP channel mask External Email ---------------------------------------------------------------------- On 11/9/2021 9:42 AM, psatheesh@marvell.com wrote: > From: Satheesh Paul <psatheesh@marvell.com> > > This patch adds support to configure channel mask which will be used > by rte flow when adding flow rules on SDP interfaces. > >Hi Satheesh, >+ Ori & Andrew. >What 'SDP' stands for? It stands for "System DMA Packet Interface". This is when the system acts as PCIe endpoint. For instance, an x86 machine can act as a host having an Octeon TX* board plugged through this PCIe interface and packets are transferred through this PCIe interface. >And can this new devarg be provided with flow rule? Why it needs to be a new devarg? SDP and its channel related info are specific to the hardware and rte flow api cannot be extended to support them. Hence, it is added as a new devarg. >Can you please give a sample of the rte flow API that will be used? This channel mask will be used by the rte_flow_create() api. It is actually transparent at rte_flow_create() invocation itself. That is, at the time of rte_flow_create() invocation, user does not give any additional information. But internally, the driver's flow creation api takes the SDP channel/mask value supplied at the startup and applies it. Basically, in Octeon tx*, the interfaces have a "channel identifier" number. The rules in packet classification hardware are configured to match the channel number. With this change, we are relaxing the exact match and are allowing a range for this SDP interface. Thanks, ferruh > Signed-off-by: Satheesh Paul <psatheesh@marvell.com> > --- > doc/guides/nics/cnxk.rst | 21 ++++++++++++++ > drivers/net/cnxk/cnxk_ethdev_devargs.c | 40 ++++++++++++++++++++++++-- > 2 files changed, 59 insertions(+), 2 deletions(-) > > diff --git a/doc/guides/nics/cnxk.rst b/doc/guides/nics/cnxk.rst index > 837ffc02b4..470e01b811 100644 > --- a/doc/guides/nics/cnxk.rst > +++ b/doc/guides/nics/cnxk.rst > @@ -276,6 +276,27 @@ Runtime Config Options > set with this custom mask, inbound encrypted traffic from all ports with > matching channel number pattern will be directed to the inline IPSec device. > > +- ``SDP device channel and mask`` (default ``none``) > + Set channel and channel mask configuration for the SDP device. This > + will be used when creating flow rules on the SDP device. > + > + By default, for rules created on the SDP device, the RTE Flow API sets the > + channel number and mask to cover the entire SDP channel range in the channel > + field of the MCAM entry. This behaviour can be modified using the > + ``sdp_channel_mask`` ``devargs`` parameter. > + > + For example:: > + > + -a 0002:1d:00.0,sdp_channel_mask=0x700/0xf00 > + > + With the above configuration, RTE Flow rules API will set the channel > + and channel mask as 0x700 and 0xF00 in the MCAM entries of the flow rules > + created on the SDP device. This option needs to be used when more than one > + SDP interface is in use and RTE Flow rules created need to distinguish > + between traffic from each SDP interface. The channel and mask combination > + specified should match all the channels(or rings) configured on the SDP > + interface. > + > .. note:: > <...> ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [EXT] Re: [dpdk-dev] [PATCH 22.02 2/2] net/cnxk: add devargs for configuring SDP channel mask 2022-01-11 14:29 ` [EXT] " Satheesh Paul @ 2022-01-12 10:57 ` Ferruh Yigit 0 siblings, 0 replies; 6+ messages in thread From: Ferruh Yigit @ 2022-01-12 10:57 UTC (permalink / raw) To: Satheesh Paul, Nithin Kumar Dabilpuram, Kiran Kumar Kokkilagadda, Sunil Kumar Kori, Satha Koteswara Rao Kottidi Cc: dev, Ori Kam, Andrew Rybchenko On 1/11/2022 2:29 PM, Satheesh Paul wrote: > Hi, > > Please find reply inline. > > Thanks, > Satheesh. > > -----Original Message----- > From: Ferruh Yigit <ferruh.yigit@intel.com> > Sent: 11 January 2022 05:26 PM > To: Satheesh Paul <psatheesh@marvell.com>; Nithin Kumar Dabilpuram <ndabilpuram@marvell.com>; Kiran Kumar Kokkilagadda <kirankumark@marvell.com>; Sunil Kumar Kori <skori@marvell.com>; Satha Koteswara Rao Kottidi <skoteshwar@marvell.com> > Cc: dev@dpdk.org; Ori Kam <orika@nvidia.com>; Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru> > Subject: [EXT] Re: [dpdk-dev] [PATCH 22.02 2/2] net/cnxk: add devargs for configuring SDP channel mask > > External Email > > ---------------------------------------------------------------------- > On 11/9/2021 9:42 AM, psatheesh@marvell.com wrote: >> From: Satheesh Paul <psatheesh@marvell.com> >> >> This patch adds support to configure channel mask which will be used >> by rte flow when adding flow rules on SDP interfaces. >> > >> Hi Satheesh, > >> + Ori & Andrew. > >> What 'SDP' stands for? > It stands for "System DMA Packet Interface". This is when the system acts as PCIe endpoint. For instance, an x86 machine can act as a host having an Octeon TX* board plugged through this PCIe interface and packets are transferred through this PCIe interface. > >> And can this new devarg be provided with flow rule? Why it needs to be a new devarg? > SDP and its channel related info are specific to the hardware and rte flow api cannot be extended to support them. Hence, it is added as a new devarg. > >> Can you please give a sample of the rte flow API that will be used? > This channel mask will be used by the rte_flow_create() api. It is actually transparent at rte_flow_create() invocation itself. That is, at the time of rte_flow_create() invocation, user does not give any additional information. But internally, the driver's flow creation api takes the SDP channel/mask value supplied at the startup and applies it. Basically, in Octeon tx*, the interfaces have a "channel identifier" number. The rules in packet classification hardware are configured to match the channel number. With this change, we are relaxing the exact match and are allowing a range for this SDP interface. > Got it. I am still not quite clear what SDP is, but from below document my understanding was user need to provide these channel & mask while creating a flow rule, but according above description that is not the case, but this is internal to the driver, so I am OK to proceed. Thanks for clarification. > Thanks, > ferruh > > >> Signed-off-by: Satheesh Paul <psatheesh@marvell.com> >> --- >> doc/guides/nics/cnxk.rst | 21 ++++++++++++++ >> drivers/net/cnxk/cnxk_ethdev_devargs.c | 40 ++++++++++++++++++++++++-- >> 2 files changed, 59 insertions(+), 2 deletions(-) >> >> diff --git a/doc/guides/nics/cnxk.rst b/doc/guides/nics/cnxk.rst index >> 837ffc02b4..470e01b811 100644 >> --- a/doc/guides/nics/cnxk.rst >> +++ b/doc/guides/nics/cnxk.rst >> @@ -276,6 +276,27 @@ Runtime Config Options >> set with this custom mask, inbound encrypted traffic from all ports with >> matching channel number pattern will be directed to the inline IPSec device. >> >> +- ``SDP device channel and mask`` (default ``none``) >> + Set channel and channel mask configuration for the SDP device. This >> + will be used when creating flow rules on the SDP device. >> + >> + By default, for rules created on the SDP device, the RTE Flow API sets the >> + channel number and mask to cover the entire SDP channel range in the channel >> + field of the MCAM entry. This behaviour can be modified using the >> + ``sdp_channel_mask`` ``devargs`` parameter. >> + >> + For example:: >> + >> + -a 0002:1d:00.0,sdp_channel_mask=0x700/0xf00 >> + >> + With the above configuration, RTE Flow rules API will set the channel >> + and channel mask as 0x700 and 0xF00 in the MCAM entries of the flow rules >> + created on the SDP device. This option needs to be used when more than one >> + SDP interface is in use and RTE Flow rules created need to distinguish >> + between traffic from each SDP interface. The channel and mask combination >> + specified should match all the channels(or rings) configured on the SDP >> + interface. >> + >> .. note:: >> > > <...> ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [dpdk-dev] [PATCH 22.02 1/2] common/cnxk: support to set channel mask for SDP interfaces 2021-11-09 9:42 [dpdk-dev] [PATCH 22.02 1/2] common/cnxk: support to set channel mask for SDP interfaces psatheesh 2021-11-09 9:42 ` [dpdk-dev] [PATCH 22.02 2/2] net/cnxk: add devargs for configuring SDP channel mask psatheesh @ 2021-12-21 10:18 ` Jerin Jacob 1 sibling, 0 replies; 6+ messages in thread From: Jerin Jacob @ 2021-12-21 10:18 UTC (permalink / raw) To: Satheesh Paul, Ferruh Yigit, Andrew Rybchenko Cc: Nithin Dabilpuram, Kiran Kumar K, Sunil Kumar Kori, Satha Rao, dpdk-dev On Tue, Nov 9, 2021 at 3:12 PM <psatheesh@marvell.com> wrote: > > From: Satheesh Paul <psatheesh@marvell.com> > > ROC changes to support setting channel mask for SDP interfaces. > > Signed-off-by: Satheesh Paul <psatheesh@marvell.com> Series Acked-by: Jerin Jacob <jerinj@marvell.com> Series applied to dpdk-next-net-mrvl/for-next-net. Thanks. > --- > drivers/common/cnxk/roc_npc.c | 13 +++++++++++++ > drivers/common/cnxk/roc_npc.h | 3 +++ > drivers/common/cnxk/roc_npc_mcam.c | 10 ++++++++++ > drivers/common/cnxk/roc_npc_priv.h | 3 +++ > 4 files changed, 29 insertions(+) > > diff --git a/drivers/common/cnxk/roc_npc.c b/drivers/common/cnxk/roc_npc.c > index 503c74748f..d18dfd4259 100644 > --- a/drivers/common/cnxk/roc_npc.c > +++ b/drivers/common/cnxk/roc_npc.c > @@ -1152,6 +1152,19 @@ roc_npc_flow_create(struct roc_npc *roc_npc, const struct roc_npc_attr *attr, > int rc; > > npc->channel = roc_npc->channel; > + npc->is_sdp_link = roc_nix_is_sdp(roc_npc->roc_nix); > + if (npc->is_sdp_link) { > + if (roc_npc->is_sdp_mask_set) { > + npc->sdp_channel = roc_npc->sdp_channel; > + npc->sdp_channel_mask = roc_npc->sdp_channel_mask; > + } else { > + /* By default set the channel and mask to cover > + * the whole SDP channel range. > + */ > + npc->sdp_channel = (uint16_t)NIX_CHAN_SDP_CH_START; > + npc->sdp_channel_mask = (uint16_t)NIX_CHAN_SDP_CH_START; > + } > + } > > flow = plt_zmalloc(sizeof(*flow), 0); > if (flow == NULL) { > diff --git a/drivers/common/cnxk/roc_npc.h b/drivers/common/cnxk/roc_npc.h > index e13d557136..8c24126ae8 100644 > --- a/drivers/common/cnxk/roc_npc.h > +++ b/drivers/common/cnxk/roc_npc.h > @@ -195,6 +195,9 @@ struct roc_npc { > uint64_t rx_parse_nibble; > /* Parsed RSS Flowkey cfg for current flow being created */ > uint32_t flowkey_cfg_state; > + bool is_sdp_mask_set; > + uint16_t sdp_channel; > + uint16_t sdp_channel_mask; > > #define ROC_NPC_MEM_SZ (5 * 1024) > uint8_t reserved[ROC_NPC_MEM_SZ]; > diff --git a/drivers/common/cnxk/roc_npc_mcam.c b/drivers/common/cnxk/roc_npc_mcam.c > index ba7f89b45b..80851d6f9f 100644 > --- a/drivers/common/cnxk/roc_npc_mcam.c > +++ b/drivers/common/cnxk/roc_npc_mcam.c > @@ -575,6 +575,16 @@ npc_mcam_alloc_and_write(struct npc *npc, struct roc_npc_flow *flow, > flow->npc_action |= (uint64_t)pf_func << 4; > flow->mcam_data[0] |= (uint64_t)inl_dev->channel; > flow->mcam_mask[0] |= (uint64_t)inl_dev->chan_mask; > + } else if (npc->is_sdp_link) { > + req->entry_data.kw[0] &= ~(GENMASK(11, 0)); > + req->entry_data.kw_mask[0] &= ~(GENMASK(11, 0)); > + req->entry_data.kw[0] |= (uint64_t)npc->sdp_channel; > + req->entry_data.kw_mask[0] |= > + (uint64_t)npc->sdp_channel_mask; > + flow->mcam_data[0] &= ~(GENMASK(11, 0)); > + flow->mcam_mask[0] &= ~(GENMASK(11, 0)); > + flow->mcam_data[0] |= (uint64_t)npc->sdp_channel; > + flow->mcam_mask[0] |= (uint64_t)npc->sdp_channel_mask; > } else { > req->entry_data.kw[0] |= (uint64_t)npc->channel; > req->entry_data.kw_mask[0] |= (BIT_ULL(12) - 1); > diff --git a/drivers/common/cnxk/roc_npc_priv.h b/drivers/common/cnxk/roc_npc_priv.h > index 712302bc5c..86c10ea082 100644 > --- a/drivers/common/cnxk/roc_npc_priv.h > +++ b/drivers/common/cnxk/roc_npc_priv.h > @@ -360,6 +360,9 @@ struct npc { > uint32_t keyw[NPC_MAX_INTF]; /* max key + data len bits */ > uint32_t mcam_entries; /* mcam entries supported */ > uint16_t channel; /* RX Channel number */ > + bool is_sdp_link; > + uint16_t sdp_channel; > + uint16_t sdp_channel_mask; > uint32_t rss_grps; /* rss groups supported */ > uint16_t flow_prealloc_size; /* Pre allocated mcam size */ > uint16_t flow_max_priority; /* Max priority for flow */ > -- > 2.25.4 > ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2022-01-12 10:57 UTC | newest] Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2021-11-09 9:42 [dpdk-dev] [PATCH 22.02 1/2] common/cnxk: support to set channel mask for SDP interfaces psatheesh 2021-11-09 9:42 ` [dpdk-dev] [PATCH 22.02 2/2] net/cnxk: add devargs for configuring SDP channel mask psatheesh 2022-01-11 11:56 ` Ferruh Yigit 2022-01-11 14:29 ` [EXT] " Satheesh Paul 2022-01-12 10:57 ` Ferruh Yigit 2021-12-21 10:18 ` [dpdk-dev] [PATCH 22.02 1/2] common/cnxk: support to set channel mask for SDP interfaces Jerin Jacob
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