* [dpdk-dev] [PATCH 0/8] misc fixes for hns3
@ 2020-11-02 14:38 Lijun Ou
2020-11-02 14:38 ` [dpdk-dev] [PATCH 1/8] net/hns3: add limit promisc mode to VF Lijun Ou
` (8 more replies)
0 siblings, 9 replies; 14+ messages in thread
From: Lijun Ou @ 2020-11-02 14:38 UTC (permalink / raw)
To: ferruh.yigit; +Cc: dev, linuxarm
This patch series includes three Tx checksum
bugs and two static check warnings fixes.
The remaining includes two features fixes.
Chengchang Tang (4):
net/hns3: add limit promisc mode to VF
net/hns3: fix Tx cksum outer header prepare
net/hns3: fix Tx checksum with fix header length
net/hns3: add VXLAN-GPE packets TSO and checksum support
Hongbo Zheng (2):
net/hns3: fix visit unsupported QL register error
net/hns3: fix some static check errors by coverity
Huisong Li (1):
net/hns3: fix configurations of port-level scheduling rate
Lijun Ou (1):
net/hns3: adjust some header files location
drivers/net/hns3/hns3_cmd.c | 15 --
drivers/net/hns3/hns3_cmd.h | 2 +
drivers/net/hns3/hns3_dcb.c | 19 +-
drivers/net/hns3/hns3_dcb.h | 5 +
drivers/net/hns3/hns3_ethdev.c | 71 +++----
drivers/net/hns3/hns3_ethdev.h | 50 +++--
drivers/net/hns3/hns3_ethdev_vf.c | 51 ++---
drivers/net/hns3/hns3_fdir.c | 17 +-
drivers/net/hns3/hns3_flow.c | 6 +-
drivers/net/hns3/hns3_intr.c | 4 -
drivers/net/hns3/hns3_intr.h | 4 +
drivers/net/hns3/hns3_mbx.c | 30 +--
drivers/net/hns3/hns3_mp.c | 4 +-
drivers/net/hns3/hns3_regs.c | 16 --
drivers/net/hns3/hns3_rss.c | 3 -
drivers/net/hns3/hns3_rxtx.c | 386 ++++++++++++++++------------------
drivers/net/hns3/hns3_rxtx.h | 11 +-
drivers/net/hns3/hns3_rxtx_vec_neon.h | 11 +-
drivers/net/hns3/hns3_stats.c | 16 +-
19 files changed, 315 insertions(+), 406 deletions(-)
--
2.7.4
^ permalink raw reply [flat|nested] 14+ messages in thread
* [dpdk-dev] [PATCH 1/8] net/hns3: add limit promisc mode to VF
2020-11-02 14:38 [dpdk-dev] [PATCH 0/8] misc fixes for hns3 Lijun Ou
@ 2020-11-02 14:38 ` Lijun Ou
2020-11-02 14:38 ` [dpdk-dev] [PATCH 2/8] net/hns3: fix Tx cksum outer header prepare Lijun Ou
` (7 subsequent siblings)
8 siblings, 0 replies; 14+ messages in thread
From: Lijun Ou @ 2020-11-02 14:38 UTC (permalink / raw)
To: ferruh.yigit; +Cc: dev, linuxarm
From: Chengchang Tang <tangchengchang@huawei.com>
For kunpeng920, both tx and rx promisc is set when the promisc mode
is open. In the word, all the ingress packets and the packets sent
from the PF and other VFs on the same physical port will be copied
to the function which set promisc mode on.
Kunpeng930 support to turn off the tx unicast promisc. A limit promisc
mode is introduced, which means turn off the tx unicast promisc when
promisc is set.
Signed-off-by: Chengchang Tang <tangchengchang@huawei.com>
Signed-off-by: Lijun Ou <oulijun@huawei.com>
---
drivers/net/hns3/hns3_ethdev.h | 21 +++++++++++++++++++++
drivers/net/hns3/hns3_ethdev_vf.c | 3 +++
2 files changed, 24 insertions(+)
diff --git a/drivers/net/hns3/hns3_ethdev.h b/drivers/net/hns3/hns3_ethdev.h
index dcae154..b23c90e 100644
--- a/drivers/net/hns3/hns3_ethdev.h
+++ b/drivers/net/hns3/hns3_ethdev.h
@@ -41,6 +41,9 @@
#define HNS3_SW_SHIFT_AND_DISCARD_MODE 0
#define HNS3_HW_SHIFT_AND_DISCARD_MODE 1
+#define HNS3_UNLIMIT_PROMISC_MODE 0
+#define HNS3_LIMIT_PROMISC_MODE 1
+
#define HNS3_UC_MACADDR_NUM 128
#define HNS3_VF_UC_MACADDR_NUM 48
#define HNS3_MC_MACADDR_NUM 128
@@ -528,6 +531,24 @@ struct hns3_hw {
* is enabled.
*/
uint8_t vlan_mode;
+ /*
+ * promisc mode.
+ * value range:
+ * HNS3_UNLIMIT_PROMISC_MODE/HNS3_LIMIT_PROMISC_MODE
+ *
+ * - HNS3_UNLIMIT_PROMISC_MODE
+ * In this mode, TX unicast promisc will be configured when promisc
+ * is set, driver can receive all the ingress and outgoing traffic.
+ * In the words, all the ingress packets, all the packets sent from
+ * the PF and other VFs on the same physical port.
+ *
+ * - HNS3_LIMIT_PROMISC_MODE
+ * In this mode, TX unicast promisc is shutdown when promisc mode
+ * is set. So, driver will only receive all the ingress traffic.
+ * The packets sent from the PF and other VFs on the same physical
+ * port won't be copied to the function which has set promisc mode.
+ */
+ uint8_t promisc_mode;
uint8_t max_non_tso_bd_num; /* max BD number of one non-TSO packet */
struct hns3_port_base_vlan_config port_base_vlan_cfg;
diff --git a/drivers/net/hns3/hns3_ethdev_vf.c b/drivers/net/hns3/hns3_ethdev_vf.c
index 05a9341..c903e07 100644
--- a/drivers/net/hns3/hns3_ethdev_vf.c
+++ b/drivers/net/hns3/hns3_ethdev_vf.c
@@ -610,6 +610,7 @@ hns3vf_set_promisc_mode(struct hns3_hw *hw, bool en_bc_pmc,
req->msg[1] = en_bc_pmc ? 1 : 0;
req->msg[2] = en_uc_pmc ? 1 : 0;
req->msg[3] = en_mc_pmc ? 1 : 0;
+ req->msg[4] = hw->promisc_mode == HNS3_LIMIT_PROMISC_MODE ? 1 : 0;
ret = hns3_cmd_send(hw, &desc, 1);
if (ret)
@@ -1214,6 +1215,7 @@ hns3vf_get_capability(struct hns3_hw *hw)
hw->tso_mode = HNS3_TSO_SW_CAL_PSEUDO_H_CSUM;
hw->min_tx_pkt_len = HNS3_HIP08_MIN_TX_PKT_LEN;
hw->rss_info.ipv6_sctp_offload_supported = false;
+ hw->promisc_mode = HNS3_UNLIMIT_PROMISC_MODE;
return 0;
}
@@ -1231,6 +1233,7 @@ hns3vf_get_capability(struct hns3_hw *hw)
hw->tso_mode = HNS3_TSO_HW_CAL_PSEUDO_H_CSUM;
hw->min_tx_pkt_len = HNS3_HIP09_MIN_TX_PKT_LEN;
hw->rss_info.ipv6_sctp_offload_supported = true;
+ hw->promisc_mode = HNS3_LIMIT_PROMISC_MODE;
return 0;
}
--
2.7.4
^ permalink raw reply [flat|nested] 14+ messages in thread
* [dpdk-dev] [PATCH 2/8] net/hns3: fix Tx cksum outer header prepare
2020-11-02 14:38 [dpdk-dev] [PATCH 0/8] misc fixes for hns3 Lijun Ou
2020-11-02 14:38 ` [dpdk-dev] [PATCH 1/8] net/hns3: add limit promisc mode to VF Lijun Ou
@ 2020-11-02 14:38 ` Lijun Ou
2020-11-02 14:38 ` [dpdk-dev] [PATCH 3/8] net/hns3: fix Tx checksum with fix header length Lijun Ou
` (6 subsequent siblings)
8 siblings, 0 replies; 14+ messages in thread
From: Lijun Ou @ 2020-11-02 14:38 UTC (permalink / raw)
To: ferruh.yigit; +Cc: dev, linuxarm
From: Chengchang Tang <tangchengchang@huawei.com>
Currently, there are two mistakes in Tx checksum outer header prepare.
1) Check whether the packet outer header is IPV4 based on PKT_TX_IPV4
which is incorrect.
2) For HIP08, the outer UDP cksum could not be offloaded. And driver
should ensure the outer udp cksum filed set to 0. In current code,
PKT_TX_UDP_CKSUM is used to determine whether the outer layer of
the packet is a UDP header. Actually, for tunnel TSO, the flag will
never be set.
For the first mistake, it is fixed by replacing PKT_TX_IPV4 with
PKT_TX_OUTER_IPV4. And the protocol number in L3 header is used to check
whether the outer L4 header is UDP.
Fixes: bba636698316 ("net/hns3: support Rx/Tx and related operations")
Fixes: 6dca716c9e1d ("net/hns3: support TSO")
Cc: stable@dpdk.org
Signed-off-by: Chengchang Tang <tangchengchang@huawei.com>
Signed-off-by: Lijun Ou <oulijun@huawei.com>
---
drivers/net/hns3/hns3_rxtx.c | 25 ++++++++++++++-----------
1 file changed, 14 insertions(+), 11 deletions(-)
diff --git a/drivers/net/hns3/hns3_rxtx.c b/drivers/net/hns3/hns3_rxtx.c
index 2988a4b..9cd728b 100644
--- a/drivers/net/hns3/hns3_rxtx.c
+++ b/drivers/net/hns3/hns3_rxtx.c
@@ -3151,26 +3151,29 @@ static void
hns3_outer_header_cksum_prepare(struct rte_mbuf *m)
{
uint64_t ol_flags = m->ol_flags;
- struct rte_ipv4_hdr *ipv4_hdr;
- struct rte_udp_hdr *udp_hdr;
- uint32_t paylen, hdr_len;
+ uint32_t paylen, hdr_len, l4_proto;
if (!(ol_flags & (PKT_TX_OUTER_IPV4 | PKT_TX_OUTER_IPV6)))
return;
- if (ol_flags & PKT_TX_IPV4) {
+ if (ol_flags & PKT_TX_OUTER_IPV4) {
+ struct rte_ipv4_hdr *ipv4_hdr;
ipv4_hdr = rte_pktmbuf_mtod_offset(m, struct rte_ipv4_hdr *,
m->outer_l2_len);
-
- if (ol_flags & PKT_TX_IP_CKSUM)
+ l4_proto = ipv4_hdr->next_proto_id;
+ if (ol_flags & PKT_TX_OUTER_IP_CKSUM)
ipv4_hdr->hdr_checksum = 0;
+ } else {
+ struct rte_ipv6_hdr *ipv6_hdr;
+ ipv6_hdr = rte_pktmbuf_mtod_offset(m, struct rte_ipv6_hdr *,
+ m->outer_l2_len);
+ l4_proto = ipv6_hdr->proto;
}
-
- if ((ol_flags & PKT_TX_L4_MASK) == PKT_TX_UDP_CKSUM &&
- ol_flags & PKT_TX_TCP_SEG) {
+ /* driver should ensure the outer udp cksum is 0 for TUNNEL TSO */
+ if (l4_proto == IPPROTO_UDP && (ol_flags & PKT_TX_TCP_SEG)) {
+ struct rte_udp_hdr *udp_hdr;
hdr_len = m->l2_len + m->l3_len + m->l4_len;
- hdr_len += (ol_flags & PKT_TX_TUNNEL_MASK) ?
- m->outer_l2_len + m->outer_l3_len : 0;
+ hdr_len += m->outer_l2_len + m->outer_l3_len;
paylen = m->pkt_len - hdr_len;
if (paylen <= m->tso_segsz)
return;
--
2.7.4
^ permalink raw reply [flat|nested] 14+ messages in thread
* [dpdk-dev] [PATCH 3/8] net/hns3: fix Tx checksum with fix header length
2020-11-02 14:38 [dpdk-dev] [PATCH 0/8] misc fixes for hns3 Lijun Ou
2020-11-02 14:38 ` [dpdk-dev] [PATCH 1/8] net/hns3: add limit promisc mode to VF Lijun Ou
2020-11-02 14:38 ` [dpdk-dev] [PATCH 2/8] net/hns3: fix Tx cksum outer header prepare Lijun Ou
@ 2020-11-02 14:38 ` Lijun Ou
2020-11-02 14:38 ` [dpdk-dev] [PATCH 4/8] net/hns3: add VXLAN-GPE packets TSO and checksum support Lijun Ou
` (5 subsequent siblings)
8 siblings, 0 replies; 14+ messages in thread
From: Lijun Ou @ 2020-11-02 14:38 UTC (permalink / raw)
To: ferruh.yigit; +Cc: dev, linuxarm
From: Chengchang Tang <tangchengchang@huawei.com>
Currently, the header length of all the layers are fixed, It would
lead to a csum error when the header length changed.
This patch fixes above problem by using the header length in mbuf
instead of the fixed header length to perform the TX cksum offload.
Fixes: bba636698316 ("net/hns3: support Rx/Tx and related operations")
Cc: stable@dpdk.org
Signed-off-by: Chengchang Tang <tangchengchang@huawei.com>
Signed-off-by: Lijun Ou <oulijun@huawei.com>
---
drivers/net/hns3/hns3_ethdev.h | 2 +
drivers/net/hns3/hns3_rxtx.c | 318 +++++++++++++++++++----------------------
drivers/net/hns3/hns3_rxtx.h | 8 +-
3 files changed, 154 insertions(+), 174 deletions(-)
diff --git a/drivers/net/hns3/hns3_ethdev.h b/drivers/net/hns3/hns3_ethdev.h
index b23c90e..a2b61ff 100644
--- a/drivers/net/hns3/hns3_ethdev.h
+++ b/drivers/net/hns3/hns3_ethdev.h
@@ -827,6 +827,8 @@ struct hns3_adapter {
#define hns3_get_bit(origin, shift) \
hns3_get_field((origin), (0x1UL << (shift)), (shift))
+#define hns3_gen_field_val(mask, shift, val) (((val) << (shift)) & (mask))
+
/*
* upper_32_bits - return bits 32-63 of a number
* A basic shift-right of a 64- or 32-bit quantity. Use this to suppress
diff --git a/drivers/net/hns3/hns3_rxtx.c b/drivers/net/hns3/hns3_rxtx.c
index 9cd728b..abc2cab 100644
--- a/drivers/net/hns3/hns3_rxtx.c
+++ b/drivers/net/hns3/hns3_rxtx.c
@@ -2641,44 +2641,6 @@ hns3_tx_free_useless_buffer(struct hns3_tx_queue *txq)
txq->tx_bd_ready = tx_bd_ready;
}
-static int
-hns3_tso_proc_tunnel(struct hns3_desc *desc, uint64_t ol_flags,
- struct rte_mbuf *rxm, uint8_t *l2_len)
-{
- uint64_t tun_flags;
- uint8_t ol4_len;
- uint32_t otmp;
-
- tun_flags = ol_flags & PKT_TX_TUNNEL_MASK;
- if (tun_flags == 0)
- return 0;
-
- otmp = rte_le_to_cpu_32(desc->tx.ol_type_vlan_len_msec);
- switch (tun_flags) {
- case PKT_TX_TUNNEL_GENEVE:
- case PKT_TX_TUNNEL_VXLAN:
- *l2_len = rxm->l2_len - RTE_ETHER_VXLAN_HLEN;
- break;
- case PKT_TX_TUNNEL_GRE:
- /*
- * OL4 header size, defined in 4 Bytes, it contains outer
- * L4(GRE) length and tunneling length.
- */
- ol4_len = hns3_get_field(otmp, HNS3_TXD_L4LEN_M,
- HNS3_TXD_L4LEN_S);
- *l2_len = rxm->l2_len - (ol4_len << HNS3_L4_LEN_UNIT);
- break;
- default:
- /* For non UDP / GRE tunneling, drop the tunnel packet */
- return -EINVAL;
- }
- hns3_set_field(otmp, HNS3_TXD_L2LEN_M, HNS3_TXD_L2LEN_S,
- rxm->outer_l2_len >> HNS3_L2_LEN_UNIT);
- desc->tx.ol_type_vlan_len_msec = rte_cpu_to_le_32(otmp);
-
- return 0;
-}
-
int
hns3_config_gro(struct hns3_hw *hw, bool en)
{
@@ -2723,31 +2685,15 @@ hns3_pkt_is_tso(struct rte_mbuf *m)
}
static void
-hns3_set_tso(struct hns3_desc *desc, uint64_t ol_flags,
- uint32_t paylen, struct rte_mbuf *rxm)
+hns3_set_tso(struct hns3_desc *desc, uint32_t paylen, struct rte_mbuf *rxm)
{
- uint8_t l2_len = rxm->l2_len;
- uint32_t tmp;
-
if (!hns3_pkt_is_tso(rxm))
return;
- if (hns3_tso_proc_tunnel(desc, ol_flags, rxm, &l2_len))
- return;
-
if (paylen <= rxm->tso_segsz)
return;
- tmp = rte_le_to_cpu_32(desc->tx.type_cs_vlan_tso_len);
- hns3_set_bit(tmp, HNS3_TXD_TSO_B, 1);
- hns3_set_bit(tmp, HNS3_TXD_L3CS_B, 1);
- hns3_set_field(tmp, HNS3_TXD_L4T_M, HNS3_TXD_L4T_S, HNS3_L4T_TCP);
- hns3_set_bit(tmp, HNS3_TXD_L4CS_B, 1);
- hns3_set_field(tmp, HNS3_TXD_L4LEN_M, HNS3_TXD_L4LEN_S,
- sizeof(struct rte_tcp_hdr) >> HNS3_L4_LEN_UNIT);
- hns3_set_field(tmp, HNS3_TXD_L2LEN_M, HNS3_TXD_L2LEN_S,
- l2_len >> HNS3_L2_LEN_UNIT);
- desc->tx.type_cs_vlan_tso_len = rte_cpu_to_le_32(tmp);
+ desc->tx.type_cs_vlan_tso_len |= rte_cpu_to_le_32(BIT(HNS3_TXD_TSO_B));
desc->tx.mss = rte_cpu_to_le_16(rxm->tso_segsz);
}
@@ -2772,7 +2718,7 @@ hns3_fill_first_desc(struct hns3_tx_queue *txq, struct hns3_desc *desc,
rxm->outer_l2_len + rxm->outer_l3_len : 0;
paylen = rxm->pkt_len - hdr_len;
desc->tx.paylen = rte_cpu_to_le_32(paylen);
- hns3_set_tso(desc, ol_flags, paylen, rxm);
+ hns3_set_tso(desc, paylen, rxm);
/*
* Currently, hardware doesn't support more than two layers VLAN offload
@@ -2917,180 +2863,212 @@ hns3_reassemble_tx_pkts(struct rte_mbuf *tx_pkt, struct rte_mbuf **new_pkt,
}
static void
-hns3_parse_outer_params(uint64_t ol_flags, uint32_t *ol_type_vlan_len_msec)
+hns3_parse_outer_params(struct rte_mbuf *m, uint32_t *ol_type_vlan_len_msec)
{
uint32_t tmp = *ol_type_vlan_len_msec;
+ uint64_t ol_flags = m->ol_flags;
/* (outer) IP header type */
if (ol_flags & PKT_TX_OUTER_IPV4) {
- /* OL3 header size, defined in 4 bytes */
- hns3_set_field(tmp, HNS3_TXD_L3LEN_M, HNS3_TXD_L3LEN_S,
- sizeof(struct rte_ipv4_hdr) >> HNS3_L3_LEN_UNIT);
if (ol_flags & PKT_TX_OUTER_IP_CKSUM)
- hns3_set_field(tmp, HNS3_TXD_OL3T_M,
- HNS3_TXD_OL3T_S, HNS3_OL3T_IPV4_CSUM);
+ tmp |= hns3_gen_field_val(HNS3_TXD_OL3T_M,
+ HNS3_TXD_OL3T_S, HNS3_OL3T_IPV4_CSUM);
else
- hns3_set_field(tmp, HNS3_TXD_OL3T_M, HNS3_TXD_OL3T_S,
- HNS3_OL3T_IPV4_NO_CSUM);
+ tmp |= hns3_gen_field_val(HNS3_TXD_OL3T_M,
+ HNS3_TXD_OL3T_S, HNS3_OL3T_IPV4_NO_CSUM);
} else if (ol_flags & PKT_TX_OUTER_IPV6) {
- hns3_set_field(tmp, HNS3_TXD_OL3T_M, HNS3_TXD_OL3T_S,
- HNS3_OL3T_IPV6);
- /* OL3 header size, defined in 4 bytes */
- hns3_set_field(tmp, HNS3_TXD_L3LEN_M, HNS3_TXD_L3LEN_S,
- sizeof(struct rte_ipv6_hdr) >> HNS3_L3_LEN_UNIT);
+ tmp |= hns3_gen_field_val(HNS3_TXD_OL3T_M, HNS3_TXD_OL3T_S,
+ HNS3_OL3T_IPV6);
}
-
+ /* OL3 header size, defined in 4 bytes */
+ tmp |= hns3_gen_field_val(HNS3_TXD_L3LEN_M, HNS3_TXD_L3LEN_S,
+ m->outer_l3_len >> HNS3_L3_LEN_UNIT);
*ol_type_vlan_len_msec = tmp;
}
static int
-hns3_parse_inner_params(uint64_t ol_flags, uint32_t *ol_type_vlan_len_msec,
- struct rte_net_hdr_lens *hdr_lens)
+hns3_parse_inner_params(struct rte_mbuf *m, uint32_t *ol_type_vlan_len_msec,
+ uint32_t *type_cs_vlan_tso_len)
{
- uint32_t tmp = *ol_type_vlan_len_msec;
- uint8_t l4_len;
-
- /* OL2 header size, defined in 2 bytes */
- hns3_set_field(tmp, HNS3_TXD_L2LEN_M, HNS3_TXD_L2LEN_S,
- sizeof(struct rte_ether_hdr) >> HNS3_L2_LEN_UNIT);
+#define HNS3_NVGRE_HLEN 8
+ uint32_t tmp_outer = *ol_type_vlan_len_msec;
+ uint32_t tmp_inner = *type_cs_vlan_tso_len;
+ uint64_t ol_flags = m->ol_flags;
+ uint16_t inner_l2_len;
- /* L4TUNT: L4 Tunneling Type */
switch (ol_flags & PKT_TX_TUNNEL_MASK) {
case PKT_TX_TUNNEL_GENEVE:
case PKT_TX_TUNNEL_VXLAN:
- /* MAC in UDP tunnelling packet, include VxLAN */
- hns3_set_field(tmp, HNS3_TXD_TUNTYPE_M, HNS3_TXD_TUNTYPE_S,
- HNS3_TUN_MAC_IN_UDP);
+ /* MAC in UDP tunnelling packet, include VxLAN and GENEVE */
+ tmp_outer |= hns3_gen_field_val(HNS3_TXD_TUNTYPE_M,
+ HNS3_TXD_TUNTYPE_S, HNS3_TUN_MAC_IN_UDP);
/*
- * OL4 header size, defined in 4 Bytes, it contains outer
- * L4(UDP) length and tunneling length.
+ * The inner l2 length of mbuf is the sum of outer l4 length,
+ * tunneling header length and inner l2 length for a tunnel
+ * packect. But in hns3 tx descriptor, the tunneling header
+ * length is contained in the field of outer L4 length.
+ * Therefore, driver need to calculate the outer L4 length and
+ * inner L2 length.
*/
- hns3_set_field(tmp, HNS3_TXD_L4LEN_M, HNS3_TXD_L4LEN_S,
- (uint8_t)RTE_ETHER_VXLAN_HLEN >>
- HNS3_L4_LEN_UNIT);
+ tmp_outer |= hns3_gen_field_val(HNS3_TXD_L4LEN_M,
+ HNS3_TXD_L4LEN_S,
+ (uint8_t)RTE_ETHER_VXLAN_HLEN >>
+ HNS3_L4_LEN_UNIT);
+
+ inner_l2_len = m->l2_len - RTE_ETHER_VXLAN_HLEN;
break;
case PKT_TX_TUNNEL_GRE:
- hns3_set_field(tmp, HNS3_TXD_TUNTYPE_M, HNS3_TXD_TUNTYPE_S,
- HNS3_TUN_NVGRE);
+ tmp_outer |= hns3_gen_field_val(HNS3_TXD_TUNTYPE_M,
+ HNS3_TXD_TUNTYPE_S, HNS3_TUN_NVGRE);
/*
- * OL4 header size, defined in 4 Bytes, it contains outer
- * L4(GRE) length and tunneling length.
+ * For NVGRE tunnel packect, the outer L4 is empty. So only
+ * fill the NVGRE header length to the outer L4 field.
*/
- l4_len = hdr_lens->l4_len + hdr_lens->tunnel_len;
- hns3_set_field(tmp, HNS3_TXD_L4LEN_M, HNS3_TXD_L4LEN_S,
- l4_len >> HNS3_L4_LEN_UNIT);
+ tmp_outer |= hns3_gen_field_val(HNS3_TXD_L4LEN_M,
+ HNS3_TXD_L4LEN_S,
+ (uint8_t)HNS3_NVGRE_HLEN >> HNS3_L4_LEN_UNIT);
+
+ inner_l2_len = m->l2_len - HNS3_NVGRE_HLEN;
break;
default:
/* For non UDP / GRE tunneling, drop the tunnel packet */
return -EINVAL;
}
- *ol_type_vlan_len_msec = tmp;
+ tmp_inner |= hns3_gen_field_val(HNS3_TXD_L2LEN_M, HNS3_TXD_L2LEN_S,
+ inner_l2_len >> HNS3_L2_LEN_UNIT);
+ /* OL2 header size, defined in 2 bytes */
+ tmp_outer |= hns3_gen_field_val(HNS3_TXD_L2LEN_M, HNS3_TXD_L2LEN_S,
+ m->outer_l2_len >> HNS3_L2_LEN_UNIT);
+
+ *type_cs_vlan_tso_len = tmp_inner;
+ *ol_type_vlan_len_msec = tmp_outer;
return 0;
}
static int
-hns3_parse_tunneling_params(struct hns3_tx_queue *txq, uint16_t tx_desc_id,
- uint64_t ol_flags,
- struct rte_net_hdr_lens *hdr_lens)
+hns3_parse_tunneling_params(struct hns3_tx_queue *txq, struct rte_mbuf *m,
+ uint16_t tx_desc_id)
{
struct hns3_desc *tx_ring = txq->tx_ring;
struct hns3_desc *desc = &tx_ring[tx_desc_id];
- uint32_t value = 0;
+ uint32_t tmp_outer = 0;
+ uint32_t tmp_inner = 0;
int ret;
- hns3_parse_outer_params(ol_flags, &value);
- ret = hns3_parse_inner_params(ol_flags, &value, hdr_lens);
- if (ret)
- return -EINVAL;
+ /*
+ * The tunnel header is contained in the inner L2 header field of the
+ * mbuf, but for hns3 descriptor, it is contained in the outer L4. So,
+ * there is a need that switching between them. To avoid multiple
+ * calculations, the length of the L2 header include the outer and
+ * inner, will be filled during the parsing of tunnel packects.
+ */
+ if (!(m->ol_flags & PKT_TX_TUNNEL_MASK)) {
+ /*
+ * For non tunnel type the tunnel type id is 0, so no need to
+ * assign a value to it. Only the inner(normal) L2 header length
+ * is assigned.
+ */
+ tmp_inner |= hns3_gen_field_val(HNS3_TXD_L2LEN_M,
+ HNS3_TXD_L2LEN_S, m->l2_len >> HNS3_L2_LEN_UNIT);
+ } else {
+ /*
+ * If outer csum is not offload, the outer length may be filled
+ * with 0. And the length of the outer header is added to the
+ * inner l2_len. It would lead a cksum error. So driver has to
+ * calculate the header length.
+ */
+ if (unlikely(!(m->ol_flags & PKT_TX_OUTER_IP_CKSUM) &&
+ m->outer_l2_len == 0)) {
+ struct rte_net_hdr_lens hdr_len;
+ (void)rte_net_get_ptype(m, &hdr_len,
+ RTE_PTYPE_L2_MASK | RTE_PTYPE_L3_MASK);
+ m->outer_l3_len = hdr_len.l3_len;
+ m->outer_l2_len = hdr_len.l2_len;
+ m->l2_len = m->l2_len - hdr_len.l2_len - hdr_len.l3_len;
+ }
+ hns3_parse_outer_params(m, &tmp_outer);
+ ret = hns3_parse_inner_params(m, &tmp_outer, &tmp_inner);
+ if (ret)
+ return -EINVAL;
+ }
- desc->tx.ol_type_vlan_len_msec |= rte_cpu_to_le_32(value);
+ desc->tx.ol_type_vlan_len_msec = rte_cpu_to_le_32(tmp_outer);
+ desc->tx.type_cs_vlan_tso_len = rte_cpu_to_le_32(tmp_inner);
return 0;
}
static void
-hns3_parse_l3_cksum_params(uint64_t ol_flags, uint32_t *type_cs_vlan_tso_len)
+hns3_parse_l3_cksum_params(struct rte_mbuf *m, uint32_t *type_cs_vlan_tso_len)
{
+ uint64_t ol_flags = m->ol_flags;
+ uint32_t l3_type;
uint32_t tmp;
+ tmp = *type_cs_vlan_tso_len;
+ if (ol_flags & PKT_TX_IPV4)
+ l3_type = HNS3_L3T_IPV4;
+ else if (ol_flags & PKT_TX_IPV6)
+ l3_type = HNS3_L3T_IPV6;
+ else
+ l3_type = HNS3_L3T_NONE;
+
+ /* inner(/normal) L3 header size, defined in 4 bytes */
+ tmp |= hns3_gen_field_val(HNS3_TXD_L3LEN_M, HNS3_TXD_L3LEN_S,
+ m->l3_len >> HNS3_L3_LEN_UNIT);
+
+ tmp |= hns3_gen_field_val(HNS3_TXD_L3T_M, HNS3_TXD_L3T_S, l3_type);
+
/* Enable L3 checksum offloads */
- if (ol_flags & PKT_TX_IPV4) {
- tmp = *type_cs_vlan_tso_len;
- hns3_set_field(tmp, HNS3_TXD_L3T_M, HNS3_TXD_L3T_S,
- HNS3_L3T_IPV4);
- /* inner(/normal) L3 header size, defined in 4 bytes */
- hns3_set_field(tmp, HNS3_TXD_L3LEN_M, HNS3_TXD_L3LEN_S,
- sizeof(struct rte_ipv4_hdr) >> HNS3_L3_LEN_UNIT);
- if (ol_flags & PKT_TX_IP_CKSUM)
- hns3_set_bit(tmp, HNS3_TXD_L3CS_B, 1);
- *type_cs_vlan_tso_len = tmp;
- } else if (ol_flags & PKT_TX_IPV6) {
- tmp = *type_cs_vlan_tso_len;
- /* L3T, IPv6 don't do checksum */
- hns3_set_field(tmp, HNS3_TXD_L3T_M, HNS3_TXD_L3T_S,
- HNS3_L3T_IPV6);
- /* inner(/normal) L3 header size, defined in 4 bytes */
- hns3_set_field(tmp, HNS3_TXD_L3LEN_M, HNS3_TXD_L3LEN_S,
- sizeof(struct rte_ipv6_hdr) >> HNS3_L3_LEN_UNIT);
- *type_cs_vlan_tso_len = tmp;
- }
+ if (ol_flags & PKT_TX_IP_CKSUM)
+ tmp |= BIT(HNS3_TXD_L3CS_B);
+ *type_cs_vlan_tso_len = tmp;
}
static void
-hns3_parse_l4_cksum_params(uint64_t ol_flags, uint32_t *type_cs_vlan_tso_len)
+hns3_parse_l4_cksum_params(struct rte_mbuf *m, uint32_t *type_cs_vlan_tso_len)
{
+ uint64_t ol_flags = m->ol_flags;
uint32_t tmp;
-
/* Enable L4 checksum offloads */
- switch (ol_flags & PKT_TX_L4_MASK) {
+ switch (ol_flags & (PKT_TX_L4_MASK | PKT_TX_TCP_SEG)) {
case PKT_TX_TCP_CKSUM:
+ case PKT_TX_TCP_SEG:
tmp = *type_cs_vlan_tso_len;
- hns3_set_field(tmp, HNS3_TXD_L4T_M, HNS3_TXD_L4T_S,
- HNS3_L4T_TCP);
- hns3_set_bit(tmp, HNS3_TXD_L4CS_B, 1);
- hns3_set_field(tmp, HNS3_TXD_L4LEN_M, HNS3_TXD_L4LEN_S,
- sizeof(struct rte_tcp_hdr) >> HNS3_L4_LEN_UNIT);
- *type_cs_vlan_tso_len = tmp;
+ tmp |= hns3_gen_field_val(HNS3_TXD_L4T_M, HNS3_TXD_L4T_S,
+ HNS3_L4T_TCP);
break;
case PKT_TX_UDP_CKSUM:
tmp = *type_cs_vlan_tso_len;
- hns3_set_field(tmp, HNS3_TXD_L4T_M, HNS3_TXD_L4T_S,
- HNS3_L4T_UDP);
- hns3_set_bit(tmp, HNS3_TXD_L4CS_B, 1);
- hns3_set_field(tmp, HNS3_TXD_L4LEN_M, HNS3_TXD_L4LEN_S,
- sizeof(struct rte_udp_hdr) >> HNS3_L4_LEN_UNIT);
- *type_cs_vlan_tso_len = tmp;
+ tmp |= hns3_gen_field_val(HNS3_TXD_L4T_M, HNS3_TXD_L4T_S,
+ HNS3_L4T_UDP);
break;
case PKT_TX_SCTP_CKSUM:
tmp = *type_cs_vlan_tso_len;
- hns3_set_field(tmp, HNS3_TXD_L4T_M, HNS3_TXD_L4T_S,
- HNS3_L4T_SCTP);
- hns3_set_bit(tmp, HNS3_TXD_L4CS_B, 1);
- hns3_set_field(tmp, HNS3_TXD_L4LEN_M, HNS3_TXD_L4LEN_S,
- sizeof(struct rte_sctp_hdr) >> HNS3_L4_LEN_UNIT);
- *type_cs_vlan_tso_len = tmp;
+ tmp |= hns3_gen_field_val(HNS3_TXD_L4T_M, HNS3_TXD_L4T_S,
+ HNS3_L4T_SCTP);
break;
default:
- break;
+ return;
}
+ tmp |= BIT(HNS3_TXD_L4CS_B);
+ tmp |= hns3_gen_field_val(HNS3_TXD_L4LEN_M, HNS3_TXD_L4LEN_S,
+ m->l4_len >> HNS3_L4_LEN_UNIT);
+ *type_cs_vlan_tso_len = tmp;
}
static void
-hns3_txd_enable_checksum(struct hns3_tx_queue *txq, uint16_t tx_desc_id,
- uint64_t ol_flags)
+hns3_txd_enable_checksum(struct hns3_tx_queue *txq, struct rte_mbuf *m,
+ uint16_t tx_desc_id)
{
struct hns3_desc *tx_ring = txq->tx_ring;
struct hns3_desc *desc = &tx_ring[tx_desc_id];
uint32_t value = 0;
- /* inner(/normal) L2 header size, defined in 2 bytes */
- hns3_set_field(value, HNS3_TXD_L2LEN_M, HNS3_TXD_L2LEN_S,
- sizeof(struct rte_ether_hdr) >> HNS3_L2_LEN_UNIT);
-
- hns3_parse_l3_cksum_params(ol_flags, &value);
- hns3_parse_l4_cksum_params(ol_flags, &value);
+ hns3_parse_l3_cksum_params(m, &value);
+ hns3_parse_l4_cksum_params(m, &value);
desc->tx.type_cs_vlan_tso_len |= rte_cpu_to_le_32(value);
}
@@ -3332,20 +3310,25 @@ hns3_prep_pkts(__rte_unused void *tx_queue, struct rte_mbuf **tx_pkts,
static int
hns3_parse_cksum(struct hns3_tx_queue *txq, uint16_t tx_desc_id,
- const struct rte_mbuf *m, struct rte_net_hdr_lens *hdr_lens)
+ struct rte_mbuf *m)
{
- /* Fill in tunneling parameters if necessary */
- if (m->ol_flags & PKT_TX_TUNNEL_MASK) {
- (void)rte_net_get_ptype(m, hdr_lens, RTE_PTYPE_ALL_MASK);
- if (hns3_parse_tunneling_params(txq, tx_desc_id, m->ol_flags,
- hdr_lens)) {
+ struct hns3_desc *tx_ring = txq->tx_ring;
+ struct hns3_desc *desc = &tx_ring[tx_desc_id];
+
+ /* Enable checksum offloading */
+ if (m->ol_flags & HNS3_TX_CKSUM_OFFLOAD_MASK) {
+ /* Fill in tunneling parameters if necessary */
+ if (hns3_parse_tunneling_params(txq, m, tx_desc_id)) {
txq->unsupported_tunnel_pkt_cnt++;
- return -EINVAL;
+ return -EINVAL;
}
+
+ hns3_txd_enable_checksum(txq, m, tx_desc_id);
+ } else {
+ /* clear the control bit */
+ desc->tx.type_cs_vlan_tso_len = 0;
+ desc->tx.ol_type_vlan_len_msec = 0;
}
- /* Enable checksum offloading */
- if (m->ol_flags & HNS3_TX_CKSUM_OFFLOAD_MASK)
- hns3_txd_enable_checksum(txq, tx_desc_id, m->ol_flags);
return 0;
}
@@ -3536,7 +3519,6 @@ hns3_xmit_pkts_simple(void *tx_queue,
uint16_t
hns3_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
{
- struct rte_net_hdr_lens hdr_lens = {0};
struct hns3_tx_queue *txq = tx_queue;
struct hns3_entry *tx_bak_pkt;
struct hns3_desc *tx_ring;
@@ -3600,7 +3582,7 @@ hns3_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
if (hns3_check_non_tso_pkt(nb_buf, &m_seg, tx_pkt, txq))
goto end_of_tx;
- if (hns3_parse_cksum(txq, tx_next_use, m_seg, &hdr_lens))
+ if (hns3_parse_cksum(txq, tx_next_use, m_seg))
goto end_of_tx;
i = 0;
diff --git a/drivers/net/hns3/hns3_rxtx.h b/drivers/net/hns3/hns3_rxtx.h
index 68497a0..51504ca 100644
--- a/drivers/net/hns3/hns3_rxtx.h
+++ b/drivers/net/hns3/hns3_rxtx.h
@@ -470,14 +470,10 @@ struct hns3_queue_info {
};
#define HNS3_TX_CKSUM_OFFLOAD_MASK ( \
- PKT_TX_OUTER_IPV6 | \
- PKT_TX_OUTER_IPV4 | \
PKT_TX_OUTER_IP_CKSUM | \
- PKT_TX_IPV6 | \
- PKT_TX_IPV4 | \
PKT_TX_IP_CKSUM | \
- PKT_TX_L4_MASK | \
- PKT_TX_TUNNEL_MASK)
+ PKT_TX_TCP_SEG | \
+ PKT_TX_L4_MASK)
enum hns3_cksum_status {
HNS3_CKSUM_NONE = 0,
--
2.7.4
^ permalink raw reply [flat|nested] 14+ messages in thread
* [dpdk-dev] [PATCH 4/8] net/hns3: add VXLAN-GPE packets TSO and checksum support
2020-11-02 14:38 [dpdk-dev] [PATCH 0/8] misc fixes for hns3 Lijun Ou
` (2 preceding siblings ...)
2020-11-02 14:38 ` [dpdk-dev] [PATCH 3/8] net/hns3: fix Tx checksum with fix header length Lijun Ou
@ 2020-11-02 14:38 ` Lijun Ou
2020-11-02 14:38 ` [dpdk-dev] [PATCH 5/8] net/hns3: fix configurations of port-level scheduling rate Lijun Ou
` (4 subsequent siblings)
8 siblings, 0 replies; 14+ messages in thread
From: Lijun Ou @ 2020-11-02 14:38 UTC (permalink / raw)
To: ferruh.yigit; +Cc: dev, linuxarm
From: Chengchang Tang <tangchengchang@huawei.com>
Kupeng920 support tso and checksum offload for VXLAN_GPE with
the next protocol id 3(i.e., Ethernet).
Kupeng930 support TSO and checksum offload for VXLAN_GPE with
the next protocol id 1,2,3(i.e., IPv4, IPv6 and Ethernet).
This patch add support for this tunnel type.
Signed-off-by: Chengchang Tang <tangchengchang@huawei.com>
Signed-off-by: Lijun Ou <oulijun@huawei.com>
---
drivers/net/hns3/hns3_rxtx.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/net/hns3/hns3_rxtx.c b/drivers/net/hns3/hns3_rxtx.c
index abc2cab..c82116d 100644
--- a/drivers/net/hns3/hns3_rxtx.c
+++ b/drivers/net/hns3/hns3_rxtx.c
@@ -2897,6 +2897,7 @@ hns3_parse_inner_params(struct rte_mbuf *m, uint32_t *ol_type_vlan_len_msec,
uint16_t inner_l2_len;
switch (ol_flags & PKT_TX_TUNNEL_MASK) {
+ case PKT_TX_TUNNEL_VXLAN_GPE:
case PKT_TX_TUNNEL_GENEVE:
case PKT_TX_TUNNEL_VXLAN:
/* MAC in UDP tunnelling packet, include VxLAN and GENEVE */
--
2.7.4
^ permalink raw reply [flat|nested] 14+ messages in thread
* [dpdk-dev] [PATCH 5/8] net/hns3: fix configurations of port-level scheduling rate
2020-11-02 14:38 [dpdk-dev] [PATCH 0/8] misc fixes for hns3 Lijun Ou
` (3 preceding siblings ...)
2020-11-02 14:38 ` [dpdk-dev] [PATCH 4/8] net/hns3: add VXLAN-GPE packets TSO and checksum support Lijun Ou
@ 2020-11-02 14:38 ` Lijun Ou
2020-11-02 14:38 ` [dpdk-dev] [PATCH 6/8] net/hns3: fix visit unsupported QL register error Lijun Ou
` (3 subsequent siblings)
8 siblings, 0 replies; 14+ messages in thread
From: Lijun Ou @ 2020-11-02 14:38 UTC (permalink / raw)
To: ferruh.yigit; +Cc: dev, linuxarm
From: Huisong Li <lihuisong@huawei.com>
Scheduling rate of port-level in hns3 PF driver configured to
hardware is obtained from firmware, which determines the
bandwidth capability of the port. The rate in firmware is
generally configured with the maximum value for network engine
supporting multiple rates, such as 10G and 25G. It may cause
the following issues:
1) When a 10G optical module is used on the network engine,
scheduling rate of this port will also be configured to hardware
with 25G. However, the MAC rate of this port is 10G. In this case,
it is unreasonable that the port scheduling rate is different
from the MAC rate.
2) If default speed in firmware is not the maximum value,
the 25G port may not reach the capability of the port.
Therefore, we fix configurations of port-level scheduling rate
according to updating of MAC link speed.
Fixes: 59fad0f32135 ("net/hns3: support link update operation")
Cc: stable@dpdk.org
Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Lijun Ou <oulijun@huawei.com>
---
drivers/net/hns3/hns3_dcb.c | 2 +-
drivers/net/hns3/hns3_dcb.h | 1 +
drivers/net/hns3/hns3_ethdev.c | 8 ++++++++
3 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/net/hns3/hns3_dcb.c b/drivers/net/hns3/hns3_dcb.c
index 27ae014..ae8d826 100644
--- a/drivers/net/hns3/hns3_dcb.c
+++ b/drivers/net/hns3/hns3_dcb.c
@@ -336,7 +336,7 @@ hns3_dcb_get_shapping_para(uint8_t ir_b, uint8_t ir_u, uint8_t ir_s,
return shapping_para;
}
-static int
+int
hns3_dcb_port_shaper_cfg(struct hns3_hw *hw)
{
struct hns3_port_shapping_cmd *shap_cfg_cmd;
diff --git a/drivers/net/hns3/hns3_dcb.h b/drivers/net/hns3/hns3_dcb.h
index 39ff332..7ab9093 100644
--- a/drivers/net/hns3/hns3_dcb.h
+++ b/drivers/net/hns3/hns3_dcb.h
@@ -204,5 +204,6 @@ int hns3_queue_to_tc_mapping(struct hns3_hw *hw, uint16_t nb_rx_q,
uint16_t nb_tx_q);
int hns3_dcb_cfg_update(struct hns3_adapter *hns);
+int hns3_dcb_port_shaper_cfg(struct hns3_hw *hw);
#endif /* _HNS3_DCB_H_ */
diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c
index 6b4be76..1e382f1 100644
--- a/drivers/net/hns3/hns3_ethdev.c
+++ b/drivers/net/hns3/hns3_ethdev.c
@@ -4332,6 +4332,7 @@ static int
hns3_cfg_mac_speed_dup(struct hns3_hw *hw, uint32_t speed, uint8_t duplex)
{
struct hns3_mac *mac = &hw->mac;
+ uint32_t cur_speed = mac->link_speed;
int ret;
duplex = hns3_check_speed_dup(duplex, speed);
@@ -4343,6 +4344,13 @@ hns3_cfg_mac_speed_dup(struct hns3_hw *hw, uint32_t speed, uint8_t duplex)
return ret;
mac->link_speed = speed;
+ ret = hns3_dcb_port_shaper_cfg(hw);
+ if (ret) {
+ hns3_err(hw, "failed to configure port shaper, ret = %d.", ret);
+ mac->link_speed = cur_speed;
+ return ret;
+ }
+
mac->link_duplex = duplex;
return 0;
--
2.7.4
^ permalink raw reply [flat|nested] 14+ messages in thread
* [dpdk-dev] [PATCH 6/8] net/hns3: fix visit unsupported QL register error
2020-11-02 14:38 [dpdk-dev] [PATCH 0/8] misc fixes for hns3 Lijun Ou
` (4 preceding siblings ...)
2020-11-02 14:38 ` [dpdk-dev] [PATCH 5/8] net/hns3: fix configurations of port-level scheduling rate Lijun Ou
@ 2020-11-02 14:38 ` Lijun Ou
2020-11-02 14:38 ` [dpdk-dev] [PATCH 7/8] net/hns3: fix some static check errors by coverity Lijun Ou
` (2 subsequent siblings)
8 siblings, 0 replies; 14+ messages in thread
From: Lijun Ou @ 2020-11-02 14:38 UTC (permalink / raw)
To: ferruh.yigit; +Cc: dev, linuxarm
From: Hongbo Zheng <zhenghongbo3@huawei.com>
If hardware does not support QL(quantity limiter), the int_ql_max
is 0, software should confirm ql_value is less than int_ql_max
before write QL register. This patch add check of int_ql_max
value from firmware and delete the unused variable coalesce_mode.
Fixes: 27911a6e62e5 ("net/hns3: add Rx interrupts compatibility")
Cc: stable@dpdk.org
Signed-off-by: Hongbo Zheng <zhenghongbo3@huawei.com>
Signed-off-by: Lijun Ou <oulijun@huawei.com>
---
drivers/net/hns3/hns3_ethdev.c | 8 ++++++--
drivers/net/hns3/hns3_ethdev.h | 22 ++++------------------
drivers/net/hns3/hns3_ethdev_vf.c | 8 ++++++--
drivers/net/hns3/hns3_rxtx.c | 7 ++++++-
4 files changed, 22 insertions(+), 23 deletions(-)
diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c
index 1e382f1..180b313 100644
--- a/drivers/net/hns3/hns3_ethdev.c
+++ b/drivers/net/hns3/hns3_ethdev.c
@@ -2291,6 +2291,10 @@ hns3_init_ring_with_vector(struct hns3_hw *hw)
hns3_set_queue_intr_gl(hw, i, HNS3_RING_GL_TX,
HNS3_TQP_INTR_GL_DEFAULT);
hns3_set_queue_intr_rl(hw, i, HNS3_TQP_INTR_RL_DEFAULT);
+ /*
+ * QL(quantity limiter) is not used currently, just set 0 to
+ * close it.
+ */
hns3_set_queue_intr_ql(hw, i, HNS3_TQP_INTR_QL_DEFAULT);
ret = hns3_bind_ring_with_vector(hw, vec, false,
@@ -2952,6 +2956,7 @@ hns3_set_default_dev_specifications(struct hns3_hw *hw)
hw->rss_ind_tbl_size = HNS3_RSS_IND_TBL_SIZE;
hw->rss_key_size = HNS3_RSS_KEY_SIZE;
hw->max_tm_rate = HNS3_ETHER_MAX_RATE;
+ hw->intr.int_ql_max = HNS3_INTR_QL_NONE;
}
static void
@@ -2965,6 +2970,7 @@ hns3_parse_dev_specifications(struct hns3_hw *hw, struct hns3_cmd_desc *desc)
hw->rss_ind_tbl_size = rte_le_to_cpu_16(req0->rss_ind_tbl_size);
hw->rss_key_size = rte_le_to_cpu_16(req0->rss_key_size);
hw->max_tm_rate = rte_le_to_cpu_32(req0->max_tm_rate);
+ hw->intr.int_ql_max = rte_le_to_cpu_16(req0->intr_ql_max);
}
static int
@@ -3031,7 +3037,6 @@ hns3_get_capability(struct hns3_hw *hw)
if (revision < PCI_REVISION_ID_HIP09_A) {
hns3_set_default_dev_specifications(hw);
hw->intr.mapping_mode = HNS3_INTR_MAPPING_VEC_RSV_ONE;
- hw->intr.coalesce_mode = HNS3_INTR_COALESCE_NON_QL;
hw->intr.gl_unit = HNS3_INTR_COALESCE_GL_UINT_2US;
hw->tso_mode = HNS3_TSO_SW_CAL_PSEUDO_H_CSUM;
hw->vlan_mode = HNS3_SW_SHIFT_AND_DISCARD_MODE;
@@ -3050,7 +3055,6 @@ hns3_get_capability(struct hns3_hw *hw)
}
hw->intr.mapping_mode = HNS3_INTR_MAPPING_VEC_ALL;
- hw->intr.coalesce_mode = HNS3_INTR_COALESCE_QL;
hw->intr.gl_unit = HNS3_INTR_COALESCE_GL_UINT_1US;
hw->tso_mode = HNS3_TSO_HW_CAL_PSEUDO_H_CSUM;
hw->vlan_mode = HNS3_HW_SHIFT_AND_DISCARD_MODE;
diff --git a/drivers/net/hns3/hns3_ethdev.h b/drivers/net/hns3/hns3_ethdev.h
index a2b61ff..531a6cb 100644
--- a/drivers/net/hns3/hns3_ethdev.h
+++ b/drivers/net/hns3/hns3_ethdev.h
@@ -379,12 +379,11 @@ struct hns3_reset_data {
#define HNS3_INTR_MAPPING_VEC_RSV_ONE 0
#define HNS3_INTR_MAPPING_VEC_ALL 1
-#define HNS3_INTR_COALESCE_NON_QL 0
-#define HNS3_INTR_COALESCE_QL 1
-
#define HNS3_INTR_COALESCE_GL_UINT_2US 0
#define HNS3_INTR_COALESCE_GL_UINT_1US 1
+#define HNS3_INTR_QL_NONE 0
+
struct hns3_queue_intr {
/*
* interrupt mapping mode.
@@ -406,27 +405,14 @@ struct hns3_queue_intr {
*/
uint8_t mapping_mode;
/*
- * interrupt coalesce mode.
- * value range:
- * HNS3_INTR_COALESCE_NON_QL/HNS3_INTR_COALESCE_QL
- *
- * - HNS3_INTR_COALESCE_NON_QL
- * For some versions of hardware network engine, hardware doesn't
- * support QL(quanity limiter) algorithm for interrupt coalesce
- * of queue's interrupt.
- *
- * - HNS3_INTR_COALESCE_QL
- * In this mode, hardware support QL(quanity limiter) algorithm for
- * interrupt coalesce of queue's interrupt.
- */
- uint8_t coalesce_mode;
- /*
* The unit of GL(gap limiter) configuration for interrupt coalesce of
* queue's interrupt.
* value range:
* HNS3_INTR_COALESCE_GL_UINT_2US/HNS3_INTR_COALESCE_GL_UINT_1US
*/
uint8_t gl_unit;
+ /* The max QL(quantity limiter) value */
+ uint16_t int_ql_max;
};
#define HNS3_TSO_SW_CAL_PSEUDO_H_CSUM 0
diff --git a/drivers/net/hns3/hns3_ethdev_vf.c b/drivers/net/hns3/hns3_ethdev_vf.c
index c903e07..088a46f 100644
--- a/drivers/net/hns3/hns3_ethdev_vf.c
+++ b/drivers/net/hns3/hns3_ethdev_vf.c
@@ -757,6 +757,10 @@ hns3vf_init_ring_with_vector(struct hns3_hw *hw)
hns3_set_queue_intr_gl(hw, i, HNS3_RING_GL_TX,
HNS3_TQP_INTR_GL_DEFAULT);
hns3_set_queue_intr_rl(hw, i, HNS3_TQP_INTR_RL_DEFAULT);
+ /*
+ * QL(quantity limiter) is not used currently, just set 0 to
+ * close it.
+ */
hns3_set_queue_intr_ql(hw, i, HNS3_TQP_INTR_QL_DEFAULT);
ret = hns3vf_bind_ring_with_vector(hw, vec, false,
@@ -1149,6 +1153,7 @@ hns3vf_set_default_dev_specifications(struct hns3_hw *hw)
hw->max_non_tso_bd_num = HNS3_MAX_NON_TSO_BD_PER_PKT;
hw->rss_ind_tbl_size = HNS3_RSS_IND_TBL_SIZE;
hw->rss_key_size = HNS3_RSS_KEY_SIZE;
+ hw->intr.int_ql_max = HNS3_INTR_QL_NONE;
}
static void
@@ -1161,6 +1166,7 @@ hns3vf_parse_dev_specifications(struct hns3_hw *hw, struct hns3_cmd_desc *desc)
hw->max_non_tso_bd_num = req0->max_non_tso_bd_num;
hw->rss_ind_tbl_size = rte_le_to_cpu_16(req0->rss_ind_tbl_size);
hw->rss_key_size = rte_le_to_cpu_16(req0->rss_key_size);
+ hw->intr.int_ql_max = rte_le_to_cpu_16(req0->intr_ql_max);
}
static int
@@ -1210,7 +1216,6 @@ hns3vf_get_capability(struct hns3_hw *hw)
if (revision < PCI_REVISION_ID_HIP09_A) {
hns3vf_set_default_dev_specifications(hw);
hw->intr.mapping_mode = HNS3_INTR_MAPPING_VEC_RSV_ONE;
- hw->intr.coalesce_mode = HNS3_INTR_COALESCE_NON_QL;
hw->intr.gl_unit = HNS3_INTR_COALESCE_GL_UINT_2US;
hw->tso_mode = HNS3_TSO_SW_CAL_PSEUDO_H_CSUM;
hw->min_tx_pkt_len = HNS3_HIP08_MIN_TX_PKT_LEN;
@@ -1228,7 +1233,6 @@ hns3vf_get_capability(struct hns3_hw *hw)
}
hw->intr.mapping_mode = HNS3_INTR_MAPPING_VEC_ALL;
- hw->intr.coalesce_mode = HNS3_INTR_COALESCE_QL;
hw->intr.gl_unit = HNS3_INTR_COALESCE_GL_UINT_1US;
hw->tso_mode = HNS3_TSO_HW_CAL_PSEUDO_H_CSUM;
hw->min_tx_pkt_len = HNS3_HIP09_MIN_TX_PKT_LEN;
diff --git a/drivers/net/hns3/hns3_rxtx.c b/drivers/net/hns3/hns3_rxtx.c
index c82116d..afb1e7d 100644
--- a/drivers/net/hns3/hns3_rxtx.c
+++ b/drivers/net/hns3/hns3_rxtx.c
@@ -851,7 +851,12 @@ hns3_set_queue_intr_ql(struct hns3_hw *hw, uint16_t queue_id, uint16_t ql_value)
{
uint32_t addr;
- if (hw->intr.coalesce_mode == HNS3_INTR_COALESCE_NON_QL)
+ /*
+ * int_ql_max == 0 means the hardware does not support QL,
+ * QL regs config is not permitted if QL is not supported,
+ * here just return.
+ */
+ if (hw->intr.int_ql_max == HNS3_INTR_QL_NONE)
return;
addr = HNS3_TQP_INTR_TX_QL_REG + queue_id * HNS3_TQP_INTR_REG_SIZE;
--
2.7.4
^ permalink raw reply [flat|nested] 14+ messages in thread
* [dpdk-dev] [PATCH 7/8] net/hns3: fix some static check errors by coverity
2020-11-02 14:38 [dpdk-dev] [PATCH 0/8] misc fixes for hns3 Lijun Ou
` (5 preceding siblings ...)
2020-11-02 14:38 ` [dpdk-dev] [PATCH 6/8] net/hns3: fix visit unsupported QL register error Lijun Ou
@ 2020-11-02 14:38 ` Lijun Ou
2020-11-03 11:41 ` Ferruh Yigit
2020-11-02 14:38 ` [dpdk-dev] [PATCH 8/8] net/hns3: adjust some header files location Lijun Ou
2020-11-03 12:15 ` [dpdk-dev] [PATCH 0/8] misc fixes for hns3 Ferruh Yigit
8 siblings, 1 reply; 14+ messages in thread
From: Lijun Ou @ 2020-11-02 14:38 UTC (permalink / raw)
To: ferruh.yigit; +Cc: dev, linuxarm
From: Hongbo Zheng <zhenghongbo3@huawei.com>
This patch fixes some warnings.
coverity:function format symbol does not match
coverity:not_unsigned: Violation: Operand
"hw->hw_tc_map & (1UL << i)", Right Expression:
"1UL << i" is not an unsigned type
Coverity issue: 91708127
Coverity issue: 89776953
Fixes: 62e3ccc2b94c ("net/hns3: support flow control")
Fixes: 19a3ca4c99cf ("net/hns3: add start/stop and configure operations")
Fixes: a5475d61fa34 ("net/hns3: support VF")
Fixes: fb94f359481f ("net/hns3: fix adding multicast MAC address")
Fixes: fcba820d9b9e ("net/hns3: support flow director")
Fixes: a951c1ed3ab5 ("net/hns3: support different numbers of Rx and Tx queues")
Fixes: 2790c6464725 ("net/hns3: support device reset")
Fixes: 23d4b61fee5d ("net/hns3: support multiple process")
Fixes: bba636698316 ("net/hns3: support Rx/Tx and related operations")
Fixes: e31f123db06b ("net/hns3: support NEON Tx")
Fixes: 8839c5e202f3 ("net/hns3: support device stats")
Cc: stable@dpdk.org
Signed-off-by: Hongbo Zheng <zhenghongbo3@huawei.com>
Signed-off-by: Lijun Ou <oulijun@huawei.com>
---
drivers/net/hns3/hns3_dcb.c | 10 +++++-----
drivers/net/hns3/hns3_ethdev.c | 32 ++++++++++++++++----------------
drivers/net/hns3/hns3_ethdev_vf.c | 19 ++++++++++---------
drivers/net/hns3/hns3_fdir.c | 16 ++++++++--------
drivers/net/hns3/hns3_flow.c | 4 ++--
drivers/net/hns3/hns3_mbx.c | 16 ++++++++--------
drivers/net/hns3/hns3_mp.c | 2 +-
drivers/net/hns3/hns3_rxtx.c | 22 +++++++++++-----------
drivers/net/hns3/hns3_rxtx_vec_neon.h | 11 +++++------
drivers/net/hns3/hns3_stats.c | 12 ++++++------
10 files changed, 72 insertions(+), 72 deletions(-)
diff --git a/drivers/net/hns3/hns3_dcb.c b/drivers/net/hns3/hns3_dcb.c
index ae8d826..e06561c 100644
--- a/drivers/net/hns3/hns3_dcb.c
+++ b/drivers/net/hns3/hns3_dcb.c
@@ -57,13 +57,13 @@ hns3_shaper_para_calc(struct hns3_hw *hw, uint32_t ir, uint8_t shaper_level,
/* Calc tick */
if (shaper_level >= HNS3_SHAPER_LVL_CNT) {
hns3_err(hw,
- "shaper_level(%d) is greater than HNS3_SHAPER_LVL_CNT(%d)",
+ "shaper_level(%u) is greater than HNS3_SHAPER_LVL_CNT(%d)",
shaper_level, HNS3_SHAPER_LVL_CNT);
return -EINVAL;
}
if (ir > hw->max_tm_rate) {
- hns3_err(hw, "rate(%d) exceeds the max rate(%d) driver "
+ hns3_err(hw, "rate(%u) exceeds the max rate(%u) driver "
"supported.", ir, hw->max_tm_rate);
return -EINVAL;
}
@@ -1145,7 +1145,7 @@ hns3_pause_param_setup_hw(struct hns3_hw *hw, uint16_t pause_time)
pause_time <= PAUSE_TIME_DIV_BY * HNS3_DEFAULT_PAUSE_TRANS_GAP)
pause_trans_gap = pause_time / PAUSE_TIME_DIV_BY - 1;
else {
- hns3_warn(hw, "pause_time(%d) is adjusted to 4", pause_time);
+ hns3_warn(hw, "pause_time(%u) is adjusted to 4", pause_time);
pause_time = PAUSE_TIME_MIN_VALUE;
pause_trans_gap = pause_time / PAUSE_TIME_DIV_BY - 1;
}
@@ -1456,13 +1456,13 @@ hns3_dcb_info_update(struct hns3_adapter *hns, uint8_t num_tc)
return -EINVAL;
if (nb_rx_q < num_tc) {
- hns3_err(hw, "number of Rx queues(%d) is less than tcs(%d).",
+ hns3_err(hw, "number of Rx queues(%u) is less than tcs(%u).",
nb_rx_q, num_tc);
return -EINVAL;
}
if (nb_tx_q < num_tc) {
- hns3_err(hw, "number of Tx queues(%d) is less than tcs(%d).",
+ hns3_err(hw, "number of Tx queues(%u) is less than tcs(%u).",
nb_tx_q, num_tc);
return -EINVAL;
}
diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c
index 180b313..dc02af0 100644
--- a/drivers/net/hns3/hns3_ethdev.c
+++ b/drivers/net/hns3/hns3_ethdev.c
@@ -1115,8 +1115,8 @@ hns3_dev_configure_vlan(struct rte_eth_dev *dev)
hns3_warn(hw,
"hw_vlan_reject_tagged or hw_vlan_reject_untagged "
"configuration is not supported! Ignore these two "
- "parameters: hw_vlan_reject_tagged(%d), "
- "hw_vlan_reject_untagged(%d)",
+ "parameters: hw_vlan_reject_tagged(%u), "
+ "hw_vlan_reject_untagged(%u)",
txmode->hw_vlan_reject_tagged,
txmode->hw_vlan_reject_untagged);
@@ -1140,7 +1140,7 @@ hns3_dev_configure_vlan(struct rte_eth_dev *dev)
ret = hns3_vlan_pvid_set(dev, txmode->pvid,
txmode->hw_vlan_insert_pvid);
if (ret)
- hns3_err(hw, "dev config vlan pvid(%d) failed, ret = %d",
+ hns3_err(hw, "dev config vlan pvid(%u) failed, ret = %d",
txmode->pvid, ret);
return ret;
@@ -1905,7 +1905,7 @@ hns3_set_mc_addr_chk_param(struct hns3_hw *hw,
uint32_t j;
if (nb_mc_addr > HNS3_MC_MACADDR_NUM) {
- hns3_err(hw, "failed to set mc mac addr, nb_mc_addr(%d) "
+ hns3_err(hw, "failed to set mc mac addr, nb_mc_addr(%u) "
"invalid. valid range: 0~%d",
nb_mc_addr, HNS3_MC_MACADDR_NUM);
return -EINVAL;
@@ -2179,7 +2179,7 @@ hns3_check_mq_mode(struct rte_eth_dev *dev)
for (i = 0; i < HNS3_MAX_USER_PRIO; i++) {
if (dcb_rx_conf->dcb_tc[i] != dcb_tx_conf->dcb_tc[i]) {
- hns3_err(hw, "dcb_tc[%d] = %d in rx direction, "
+ hns3_err(hw, "dcb_tc[%d] = %u in rx direction, "
"is not equal to one in tx direction.",
i, dcb_rx_conf->dcb_tc[i]);
return -EINVAL;
@@ -2253,7 +2253,7 @@ hns3_bind_ring_with_vector(struct hns3_hw *hw, uint8_t vector_id, bool mmap,
op_str = mmap ? "Map" : "Unmap";
status = hns3_cmd_send(hw, &desc, 1);
if (status) {
- hns3_err(hw, "%s TQP %d fail, vector_id is %d, status is %d.",
+ hns3_err(hw, "%s TQP %u fail, vector_id is %u, status is %d.",
op_str, queue_id, req->int_vector_id, status);
return status;
}
@@ -2301,7 +2301,7 @@ hns3_init_ring_with_vector(struct hns3_hw *hw)
HNS3_RING_TYPE_TX, i);
if (ret) {
PMD_INIT_LOG(ERR, "PF fail to unbind TX ring(%d) with "
- "vector: %d, ret=%d", i, vec, ret);
+ "vector: %u, ret=%d", i, vec, ret);
return ret;
}
@@ -2309,7 +2309,7 @@ hns3_init_ring_with_vector(struct hns3_hw *hw)
HNS3_RING_TYPE_RX, i);
if (ret) {
PMD_INIT_LOG(ERR, "PF fail to unbind RX ring(%d) with "
- "vector: %d, ret=%d", i, vec, ret);
+ "vector: %u, ret=%d", i, vec, ret);
return ret;
}
}
@@ -3098,7 +3098,7 @@ hns3_get_board_configuration(struct hns3_hw *hw)
ret = hns3_parse_speed(cfg.default_speed, &hw->mac.link_speed);
if (ret) {
- PMD_INIT_LOG(ERR, "Get wrong speed %d, ret = %d",
+ PMD_INIT_LOG(ERR, "Get wrong speed %u, ret = %d",
cfg.default_speed, ret);
return ret;
}
@@ -3943,7 +3943,7 @@ hns3_get_mac_ethertype_cmd_status(uint16_t cmdq_resp, uint8_t resp_code)
if (cmdq_resp) {
PMD_INIT_LOG(ERR,
- "cmdq execute failed for get_mac_ethertype_cmd_status, status=%d.\n",
+ "cmdq execute failed for get_mac_ethertype_cmd_status, status=%u.\n",
cmdq_resp);
return -EIO;
}
@@ -3964,7 +3964,7 @@ hns3_get_mac_ethertype_cmd_status(uint16_t cmdq_resp, uint8_t resp_code)
break;
default:
PMD_INIT_LOG(ERR,
- "add mac ethertype failed for undefined, code=%d.",
+ "add mac ethertype failed for undefined, code=%u.",
resp_code);
return_status = -EIO;
break;
@@ -4122,7 +4122,7 @@ hns3_promisc_init(struct hns3_hw *hw)
hns3_promisc_param_init(¶m, false, false, false, func_id);
ret = hns3_cmd_set_promisc_mode(hw, ¶m);
if (ret) {
- PMD_INIT_LOG(ERR, "failed to clear vf:%d promisc mode,"
+ PMD_INIT_LOG(ERR, "failed to clear vf:%u promisc mode,"
" ret = %d", func_id, ret);
return ret;
}
@@ -4805,7 +4805,7 @@ hns3_map_rx_interrupt(struct rte_eth_dev *dev)
rte_zmalloc("intr_vec",
hw->used_rx_queues * sizeof(int), 0);
if (intr_handle->intr_vec == NULL) {
- hns3_err(hw, "Failed to allocate %d rx_queues"
+ hns3_err(hw, "Failed to allocate %u rx_queues"
" intr_vec", hw->used_rx_queues);
ret = -ENOMEM;
goto alloc_intr_vec_error;
@@ -5071,7 +5071,7 @@ hns3_dev_close(struct rte_eth_dev *eth_dev)
rte_free(eth_dev->process_private);
eth_dev->process_private = NULL;
hns3_mp_uninit_primary();
- hns3_warn(hw, "Close port %d finished", hw->data->port_id);
+ hns3_warn(hw, "Close port %u finished", hw->data->port_id);
return ret;
}
@@ -5149,7 +5149,7 @@ hns3_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
return -EINVAL;
}
if (!fc_conf->pause_time) {
- hns3_err(hw, "Invalid pause time %d setting.",
+ hns3_err(hw, "Invalid pause time %u setting.",
fc_conf->pause_time);
return -EINVAL;
}
@@ -5202,7 +5202,7 @@ hns3_priority_flow_ctrl_set(struct rte_eth_dev *dev,
return -EINVAL;
}
if (pfc_conf->fc.pause_time == 0) {
- hns3_err(hw, "Invalid pause time %d setting.",
+ hns3_err(hw, "Invalid pause time %u setting.",
pfc_conf->fc.pause_time);
return -EINVAL;
}
diff --git a/drivers/net/hns3/hns3_ethdev_vf.c b/drivers/net/hns3/hns3_ethdev_vf.c
index 088a46f..ca1507a 100644
--- a/drivers/net/hns3/hns3_ethdev_vf.c
+++ b/drivers/net/hns3/hns3_ethdev_vf.c
@@ -444,7 +444,7 @@ hns3vf_set_mc_addr_chk_param(struct hns3_hw *hw,
uint32_t j;
if (nb_mc_addr > HNS3_MC_MACADDR_NUM) {
- hns3_err(hw, "failed to set mc mac addr, nb_mc_addr(%d) "
+ hns3_err(hw, "failed to set mc mac addr, nb_mc_addr(%u) "
"invalid. valid range: 0~%d",
nb_mc_addr, HNS3_MC_MACADDR_NUM);
return -EINVAL;
@@ -721,7 +721,7 @@ hns3vf_bind_ring_with_vector(struct hns3_hw *hw, uint8_t vector_id,
ret = hns3_send_mbx_msg(hw, code, 0, (uint8_t *)&bind_msg,
sizeof(bind_msg), false, NULL, 0);
if (ret)
- hns3_err(hw, "%s TQP %d fail, vector_id is %d, ret is %d.",
+ hns3_err(hw, "%s TQP %u fail, vector_id is %u, ret is %d.",
op_str, queue_id, bind_msg.vector_id, ret);
return ret;
@@ -767,7 +767,7 @@ hns3vf_init_ring_with_vector(struct hns3_hw *hw)
HNS3_RING_TYPE_TX, i);
if (ret) {
PMD_INIT_LOG(ERR, "VF fail to unbind TX ring(%d) with "
- "vector: %d, ret=%d", i, vec, ret);
+ "vector: %u, ret=%d", i, vec, ret);
return ret;
}
@@ -775,7 +775,7 @@ hns3vf_init_ring_with_vector(struct hns3_hw *hw)
HNS3_RING_TYPE_RX, i);
if (ret) {
PMD_INIT_LOG(ERR, "VF fail to unbind RX ring(%d) with "
- "vector: %d, ret=%d", i, vec, ret);
+ "vector: %u, ret=%d", i, vec, ret);
return ret;
}
}
@@ -1349,8 +1349,8 @@ static int
hns3vf_get_tc_info(struct hns3_hw *hw)
{
uint8_t resp_msg;
+ uint32_t i;
int ret;
- int i;
ret = hns3_send_mbx_msg(hw, HNS3_MBX_GET_TCINFO, 0, NULL, 0,
true, &resp_msg, sizeof(resp_msg));
@@ -1433,13 +1433,13 @@ hns3vf_set_tc_queue_mapping(struct hns3_adapter *hns, uint16_t nb_rx_q,
struct hns3_hw *hw = &hns->hw;
if (nb_rx_q < hw->num_tc) {
- hns3_err(hw, "number of Rx queues(%d) is less than tcs(%d).",
+ hns3_err(hw, "number of Rx queues(%u) is less than tcs(%u).",
nb_rx_q, hw->num_tc);
return -EINVAL;
}
if (nb_tx_q < hw->num_tc) {
- hns3_err(hw, "number of Tx queues(%d) is less than tcs(%d).",
+ hns3_err(hw, "number of Tx queues(%u) is less than tcs(%u).",
nb_tx_q, hw->num_tc);
return -EINVAL;
}
@@ -2011,7 +2011,7 @@ hns3vf_dev_close(struct rte_eth_dev *eth_dev)
rte_free(eth_dev->process_private);
eth_dev->process_private = NULL;
hns3_mp_uninit_primary();
- hns3_warn(hw, "Close port %d finished", hw->data->port_id);
+ hns3_warn(hw, "Close port %u finished", hw->data->port_id);
return ret;
}
@@ -2065,6 +2065,7 @@ hns3vf_dev_link_update(struct rte_eth_dev *eth_dev,
break;
default:
new_link.link_speed = ETH_SPEED_NUM_100M;
+ hns3_info(hw, "default link speed: %u", new_link.link_speed);
break;
}
@@ -2126,7 +2127,7 @@ hns3vf_map_rx_interrupt(struct rte_eth_dev *dev)
rte_zmalloc("intr_vec",
hw->used_rx_queues * sizeof(int), 0);
if (intr_handle->intr_vec == NULL) {
- hns3_err(hw, "Failed to allocate %d rx_queues"
+ hns3_err(hw, "Failed to allocate %u rx_queues"
" intr_vec", hw->used_rx_queues);
ret = -ENOMEM;
goto vf_alloc_intr_vec_error;
diff --git a/drivers/net/hns3/hns3_fdir.c b/drivers/net/hns3/hns3_fdir.c
index 79e3028..e0e9419 100644
--- a/drivers/net/hns3/hns3_fdir.c
+++ b/drivers/net/hns3/hns3_fdir.c
@@ -321,7 +321,7 @@ int hns3_init_fd_config(struct hns3_adapter *hns)
hns3_warn(hw, "Unsupported tunnel filter in 4K*200Bit");
break;
default:
- hns3_err(hw, "Unsupported flow director mode %d",
+ hns3_err(hw, "Unsupported flow director mode %u",
pf->fdir.fd_cfg.fd_mode);
return -EOPNOTSUPP;
}
@@ -618,7 +618,7 @@ static bool hns3_fd_convert_tuple(struct hns3_hw *hw,
key_conf->mask.ip_proto);
break;
default:
- hns3_warn(hw, "not support tuple of (%d)", tuple);
+ hns3_warn(hw, "not support tuple of (%u)", tuple);
break;
}
return true;
@@ -745,14 +745,14 @@ static int hns3_config_key(struct hns3_adapter *hns,
ret = hns3_fd_tcam_config(hw, false, rule->location, key_y, true);
if (ret) {
- hns3_err(hw, "Config fd key_y fail, loc=%d, ret=%d",
+ hns3_err(hw, "Config fd key_y fail, loc=%u, ret=%d",
rule->queue_id, ret);
return ret;
}
ret = hns3_fd_tcam_config(hw, true, rule->location, key_x, true);
if (ret)
- hns3_err(hw, "Config fd key_x fail, loc=%d, ret=%d",
+ hns3_err(hw, "Config fd key_x fail, loc=%u, ret=%d",
rule->queue_id, ret);
return ret;
}
@@ -966,8 +966,8 @@ int hns3_fdir_filter_program(struct hns3_adapter *hns,
ret = hns3_fd_tcam_config(hw, true, rule->location, NULL,
false);
if (ret)
- hns3_err(hw, "Failed to delete fdir: %d src_ip:%x "
- "dst_ip:%x src_port:%d dst_port:%d ret = %d",
+ hns3_err(hw, "Failed to delete fdir: %u src_ip:%x "
+ "dst_ip:%x src_port:%u dst_port:%u ret = %d",
rule->location,
rule->key_conf.spec.src_ip[IP_ADDR_KEY_ID],
rule->key_conf.spec.dst_ip[IP_ADDR_KEY_ID],
@@ -1007,8 +1007,8 @@ int hns3_fdir_filter_program(struct hns3_adapter *hns,
ret = hns3_config_key(hns, rule);
rte_spinlock_unlock(&fdir_info->flows_lock);
if (ret) {
- hns3_err(hw, "Failed to config fdir: %d src_ip:%x dst_ip:%x "
- "src_port:%d dst_port:%d ret = %d",
+ hns3_err(hw, "Failed to config fdir: %u src_ip:%x dst_ip:%x "
+ "src_port:%u dst_port:%u ret = %d",
rule->location,
rule->key_conf.spec.src_ip[IP_ADDR_KEY_ID],
rule->key_conf.spec.dst_ip[IP_ADDR_KEY_ID],
diff --git a/drivers/net/hns3/hns3_flow.c b/drivers/net/hns3/hns3_flow.c
index 0d5dd1a..72d3745 100644
--- a/drivers/net/hns3/hns3_flow.c
+++ b/drivers/net/hns3/hns3_flow.c
@@ -269,8 +269,8 @@ hns3_handle_action_queue(struct rte_eth_dev *dev,
queue = (const struct rte_flow_action_queue *)action->conf;
if (queue->index >= hw->used_rx_queues) {
- hns3_err(hw, "queue ID(%d) is greater than number of "
- "available queue (%d) in driver.",
+ hns3_err(hw, "queue ID(%u) is greater than number of "
+ "available queue (%u) in driver.",
queue->index, hw->used_rx_queues);
return rte_flow_error_set(error, EINVAL,
RTE_FLOW_ERROR_TYPE_ACTION_CONF,
diff --git a/drivers/net/hns3/hns3_mbx.c b/drivers/net/hns3/hns3_mbx.c
index 305007a..c522c6d 100644
--- a/drivers/net/hns3/hns3_mbx.c
+++ b/drivers/net/hns3/hns3_mbx.c
@@ -88,7 +88,7 @@ hns3_get_mbx_resp(struct hns3_hw *hw, uint16_t code0, uint16_t code1,
uint64_t end;
if (resp_len > HNS3_MBX_MAX_RESP_DATA_SIZE) {
- hns3_err(hw, "VF mbx response len(=%d) exceeds maximum(=%d)",
+ hns3_err(hw, "VF mbx response len(=%u) exceeds maximum(=%d)",
resp_len, HNS3_MBX_MAX_RESP_DATA_SIZE);
return -EINVAL;
}
@@ -127,7 +127,7 @@ hns3_get_mbx_resp(struct hns3_hw *hw, uint16_t code0, uint16_t code1,
if (now >= end) {
hw->mbx_resp.lost++;
hns3_err(hw,
- "VF could not get mbx(%d,%d) head(%d) tail(%d) lost(%d) from PF in_irq:%d",
+ "VF could not get mbx(%u,%u) head(%u) tail(%u) lost(%u) from PF in_irq:%d",
code0, code1, hw->mbx_resp.head, hw->mbx_resp.tail,
hw->mbx_resp.lost, in_irq);
return -ETIME;
@@ -160,7 +160,7 @@ hns3_send_mbx_msg(struct hns3_hw *hw, uint16_t code, uint16_t subcode,
/* first two bytes are reserved for code & subcode */
if (msg_len > (HNS3_MBX_MAX_MSG_SIZE - HNS3_CMD_CODE_OFFSET)) {
hns3_err(hw,
- "VF send mbx msg fail, msg len %d exceeds max payload len %d",
+ "VF send mbx msg fail, msg len %u exceeds max payload len %d",
msg_len, HNS3_MBX_MAX_MSG_SIZE - HNS3_CMD_CODE_OFFSET);
return -EINVAL;
}
@@ -251,7 +251,7 @@ hns3_mbx_handler(struct hns3_hw *hw)
hns3_schedule_reset(HNS3_DEV_HW_TO_ADAPTER(hw));
break;
default:
- hns3_err(hw, "Fetched unsupported(%d) message from arq",
+ hns3_err(hw, "Fetched unsupported(%u) message from arq",
opcode);
break;
}
@@ -280,13 +280,13 @@ hns3_update_resp_position(struct hns3_hw *hw, uint32_t resp_msg)
if (resp->lost)
resp->lost--;
hns3_warn(hw, "Received a mismatched response req_msg(%x) "
- "resp_msg(%x) head(%d) tail(%d) lost(%d)",
+ "resp_msg(%x) head(%u) tail(%u) lost(%u)",
resp->req_msg_data, resp_msg, resp->head, tail,
resp->lost);
} else if (tail + resp->lost > resp->head) {
resp->lost--;
hns3_warn(hw, "Received a new response again resp_msg(%x) "
- "head(%d) tail(%d) lost(%d)", resp_msg,
+ "head(%u) tail(%u) lost(%u)", resp_msg,
resp->head, tail, resp->lost);
}
rte_io_wmb();
@@ -391,7 +391,7 @@ hns3_dev_handle_mbx_msg(struct hns3_hw *hw)
flag = rte_le_to_cpu_16(crq->desc[crq->next_to_use].flag);
if (unlikely(!hns3_get_bit(flag, HNS3_CMDQ_RX_OUTVLD_B))) {
hns3_warn(hw,
- "dropped invalid mailbox message, code = %d",
+ "dropped invalid mailbox message, code = %u",
opcode);
/* dropping/not processing this invalid message */
@@ -442,7 +442,7 @@ hns3_dev_handle_mbx_msg(struct hns3_hw *hw)
break;
default:
hns3_err(hw,
- "VF received unsupported(%d) mbx msg from PF",
+ "VF received unsupported(%u) mbx msg from PF",
req->msg[0]);
break;
}
diff --git a/drivers/net/hns3/hns3_mp.c b/drivers/net/hns3/hns3_mp.c
index 639f46c..7e0fc46 100644
--- a/drivers/net/hns3/hns3_mp.c
+++ b/drivers/net/hns3/hns3_mp.c
@@ -80,7 +80,7 @@ mp_secondary_handle(const struct rte_mp_msg *mp_msg, const void *peer)
if (!rte_eth_dev_is_valid_port(param->port_id)) {
rte_errno = ENODEV;
- PMD_INIT_LOG(ERR, "port %u invalid port ID", param->port_id);
+ PMD_INIT_LOG(ERR, "port %d invalid port ID", param->port_id);
return -rte_errno;
}
dev = &rte_eth_devices[param->port_id];
diff --git a/drivers/net/hns3/hns3_rxtx.c b/drivers/net/hns3/hns3_rxtx.c
index afb1e7d..4e17b12 100644
--- a/drivers/net/hns3/hns3_rxtx.c
+++ b/drivers/net/hns3/hns3_rxtx.c
@@ -269,7 +269,7 @@ hns3_alloc_rx_queue_mbufs(struct hns3_hw *hw, struct hns3_rx_queue *rxq)
for (i = 0; i < rxq->nb_rx_desc; i++) {
mbuf = rte_mbuf_raw_alloc(rxq->mb_pool);
if (unlikely(mbuf == NULL)) {
- hns3_err(hw, "Failed to allocate RXD[%d] for rx queue!",
+ hns3_err(hw, "Failed to allocate RXD[%u] for rx queue!",
i);
hns3_rx_queue_release_mbufs(rxq);
return -ENOMEM;
@@ -1205,7 +1205,7 @@ hns3_alloc_rxq_and_dma_zone(struct rte_eth_dev *dev,
rxq = rte_zmalloc_socket(q_info->type, sizeof(struct hns3_rx_queue),
RTE_CACHE_LINE_SIZE, q_info->socket_id);
if (rxq == NULL) {
- hns3_err(hw, "Failed to allocate memory for No.%d rx ring!",
+ hns3_err(hw, "Failed to allocate memory for No.%u rx ring!",
q_info->idx);
return NULL;
}
@@ -1224,7 +1224,7 @@ hns3_alloc_rxq_and_dma_zone(struct rte_eth_dev *dev,
rx_desc, HNS3_RING_BASE_ALIGN,
q_info->socket_id);
if (rx_mz == NULL) {
- hns3_err(hw, "Failed to reserve DMA memory for No.%d rx ring!",
+ hns3_err(hw, "Failed to reserve DMA memory for No.%u rx ring!",
q_info->idx);
hns3_rx_queue_release(rxq);
return NULL;
@@ -1233,7 +1233,7 @@ hns3_alloc_rxq_and_dma_zone(struct rte_eth_dev *dev,
rxq->rx_ring = (struct hns3_desc *)rx_mz->addr;
rxq->rx_ring_phys_addr = rx_mz->iova;
- hns3_dbg(hw, "No.%d rx descriptors iova 0x%" PRIx64, q_info->idx,
+ hns3_dbg(hw, "No.%u rx descriptors iova 0x%" PRIx64, q_info->idx,
rxq->rx_ring_phys_addr);
return rxq;
@@ -1261,7 +1261,7 @@ hns3_fake_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx,
q_info.ring_name = "rx_fake_ring";
rxq = hns3_alloc_rxq_and_dma_zone(dev, &q_info);
if (rxq == NULL) {
- hns3_err(hw, "Failed to setup No.%d fake rx ring.", idx);
+ hns3_err(hw, "Failed to setup No.%u fake rx ring.", idx);
return -ENOMEM;
}
@@ -1298,7 +1298,7 @@ hns3_alloc_txq_and_dma_zone(struct rte_eth_dev *dev,
txq = rte_zmalloc_socket(q_info->type, sizeof(struct hns3_tx_queue),
RTE_CACHE_LINE_SIZE, q_info->socket_id);
if (txq == NULL) {
- hns3_err(hw, "Failed to allocate memory for No.%d tx ring!",
+ hns3_err(hw, "Failed to allocate memory for No.%u tx ring!",
q_info->idx);
return NULL;
}
@@ -1311,7 +1311,7 @@ hns3_alloc_txq_and_dma_zone(struct rte_eth_dev *dev,
tx_desc, HNS3_RING_BASE_ALIGN,
q_info->socket_id);
if (tx_mz == NULL) {
- hns3_err(hw, "Failed to reserve DMA memory for No.%d tx ring!",
+ hns3_err(hw, "Failed to reserve DMA memory for No.%u tx ring!",
q_info->idx);
hns3_tx_queue_release(txq);
return NULL;
@@ -1320,7 +1320,7 @@ hns3_alloc_txq_and_dma_zone(struct rte_eth_dev *dev,
txq->tx_ring = (struct hns3_desc *)tx_mz->addr;
txq->tx_ring_phys_addr = tx_mz->iova;
- hns3_dbg(hw, "No.%d tx descriptors iova 0x%" PRIx64, q_info->idx,
+ hns3_dbg(hw, "No.%u tx descriptors iova 0x%" PRIx64, q_info->idx,
txq->tx_ring_phys_addr);
/* Clear tx bd */
@@ -1355,7 +1355,7 @@ hns3_fake_tx_queue_setup(struct rte_eth_dev *dev, uint16_t idx,
q_info.ring_name = "tx_fake_ring";
txq = hns3_alloc_txq_and_dma_zone(dev, &q_info);
if (txq == NULL) {
- hns3_err(hw, "Failed to setup No.%d fake tx ring.", idx);
+ hns3_err(hw, "Failed to setup No.%u fake tx ring.", idx);
return -ENOMEM;
}
@@ -2488,8 +2488,8 @@ hns3_tx_queue_conf_check(struct hns3_hw *hw, const struct rte_eth_txconf *conf,
if (rs_thresh + free_thresh > nb_desc || nb_desc % rs_thresh ||
rs_thresh >= nb_desc - HNS3_TX_RS_FREE_THRESH_GAP ||
free_thresh >= nb_desc - HNS3_TX_RS_FREE_THRESH_GAP) {
- hns3_err(hw, "tx_rs_thresh (%d) tx_free_thresh (%d) nb_desc "
- "(%d) of tx descriptors for port=%d queue=%d check "
+ hns3_err(hw, "tx_rs_thresh (%u) tx_free_thresh (%u) nb_desc "
+ "(%u) of tx descriptors for port=%u queue=%u check "
"fail!",
rs_thresh, free_thresh, nb_desc, hw->data->port_id,
idx);
diff --git a/drivers/net/hns3/hns3_rxtx_vec_neon.h b/drivers/net/hns3/hns3_rxtx_vec_neon.h
index 8d7721b..fe525de 100644
--- a/drivers/net/hns3/hns3_rxtx_vec_neon.h
+++ b/drivers/net/hns3/hns3_rxtx_vec_neon.h
@@ -89,13 +89,12 @@ hns3_desc_parse_field(struct hns3_rx_queue *rxq,
struct hns3_desc *rxdp,
uint32_t bd_vld_num)
{
- uint32_t l234_info, ol_info, bd_base_info;
+ uint32_t l234_info, ol_info, bd_base_info, cksum_err, i;
struct rte_mbuf *pkt;
uint32_t retcode = 0;
- uint32_t cksum_err;
- int ret, i;
+ int ret;
- for (i = 0; i < (int)bd_vld_num; i++) {
+ for (i = 0; i < bd_vld_num; i++) {
pkt = sw_ring[i].mbuf;
/* init rte_mbuf.rearm_data last 64-bit */
@@ -129,9 +128,9 @@ hns3_recv_burst_vec(struct hns3_rx_queue *__restrict rxq,
uint16_t rx_id = rxq->next_to_use;
struct hns3_entry *sw_ring = &rxq->sw_ring[rx_id];
struct hns3_desc *rxdp = &rxq->rx_ring[rx_id];
- uint32_t bd_valid_num, parse_retcode;
+ uint32_t bd_valid_num, parse_retcode, pos;
uint16_t nb_rx = 0;
- int pos, offset;
+ int offset;
/* mask to shuffle from desc to mbuf's rx_descriptor_fields1 */
uint8x16_t shuf_desc_fields_msk = {
diff --git a/drivers/net/hns3/hns3_stats.c b/drivers/net/hns3/hns3_stats.c
index 8c3c7cc..ece07a4 100644
--- a/drivers/net/hns3/hns3_stats.c
+++ b/drivers/net/hns3/hns3_stats.c
@@ -461,7 +461,7 @@ hns3_update_tqp_stats(struct hns3_hw *hw)
desc.data[0] = rte_cpu_to_le_32((uint32_t)i);
ret = hns3_cmd_send(hw, &desc, 1);
if (ret) {
- hns3_err(hw, "Failed to query RX No.%d queue stat: %d",
+ hns3_err(hw, "Failed to query RX No.%u queue stat: %d",
i, ret);
return ret;
}
@@ -475,7 +475,7 @@ hns3_update_tqp_stats(struct hns3_hw *hw)
desc.data[0] = rte_cpu_to_le_32((uint32_t)i);
ret = hns3_cmd_send(hw, &desc, 1);
if (ret) {
- hns3_err(hw, "Failed to query TX No.%d queue stat: %d",
+ hns3_err(hw, "Failed to query TX No.%u queue stat: %d",
i, ret);
return ret;
}
@@ -569,7 +569,7 @@ hns3_stats_reset(struct rte_eth_dev *eth_dev)
desc_reset.data[0] = rte_cpu_to_le_32((uint32_t)i);
ret = hns3_cmd_send(hw, &desc_reset, 1);
if (ret) {
- hns3_err(hw, "Failed to reset RX No.%d queue stat: %d",
+ hns3_err(hw, "Failed to reset RX No.%u queue stat: %d",
i, ret);
return ret;
}
@@ -579,7 +579,7 @@ hns3_stats_reset(struct rte_eth_dev *eth_dev)
desc_reset.data[0] = rte_cpu_to_le_32((uint32_t)i);
ret = hns3_cmd_send(hw, &desc_reset, 1);
if (ret) {
- hns3_err(hw, "Failed to reset TX No.%d queue stat: %d",
+ hns3_err(hw, "Failed to reset TX No.%u queue stat: %d",
i, ret);
return ret;
}
@@ -964,7 +964,7 @@ hns3_dev_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids,
for (i = 0; i < size; i++) {
if (ids[i] >= cnt_stats) {
- hns3_err(hw, "ids[%d] (%" PRIx64 ") is invalid, "
+ hns3_err(hw, "ids[%u] (%" PRIx64 ") is invalid, "
"should < %u", i, ids[i], cnt_stats);
rte_free(values_copy);
return -EINVAL;
@@ -1025,7 +1025,7 @@ hns3_dev_xstats_get_names_by_id(struct rte_eth_dev *dev,
for (i = 0; i < size; i++) {
if (ids[i] >= cnt_stats) {
- hns3_err(hw, "ids[%d] (%" PRIx64 ") is invalid, "
+ hns3_err(hw, "ids[%u] (%" PRIx64 ") is invalid, "
"should < %u", i, ids[i], cnt_stats);
rte_free(names_copy);
return -EINVAL;
--
2.7.4
^ permalink raw reply [flat|nested] 14+ messages in thread
* [dpdk-dev] [PATCH 8/8] net/hns3: adjust some header files location
2020-11-02 14:38 [dpdk-dev] [PATCH 0/8] misc fixes for hns3 Lijun Ou
` (6 preceding siblings ...)
2020-11-02 14:38 ` [dpdk-dev] [PATCH 7/8] net/hns3: fix some static check errors by coverity Lijun Ou
@ 2020-11-02 14:38 ` Lijun Ou
2020-11-03 12:15 ` [dpdk-dev] [PATCH 0/8] misc fixes for hns3 Ferruh Yigit
8 siblings, 0 replies; 14+ messages in thread
From: Lijun Ou @ 2020-11-02 14:38 UTC (permalink / raw)
To: ferruh.yigit; +Cc: dev, linuxarm
Some header files have included by others. Also,
some header files have a header file self-contained
error will trigger building warning. As a result,
it is unnecessary and move it into the correct
location.
Beside, here also remove some unused lines.
Signed-off-by: Lijun Ou <oulijun@huawei.com>
---
drivers/net/hns3/hns3_cmd.c | 15 ---------------
drivers/net/hns3/hns3_cmd.h | 2 ++
drivers/net/hns3/hns3_dcb.c | 7 -------
drivers/net/hns3/hns3_dcb.h | 4 ++++
drivers/net/hns3/hns3_ethdev.c | 23 ++++-------------------
drivers/net/hns3/hns3_ethdev.h | 5 -----
drivers/net/hns3/hns3_ethdev_vf.c | 21 +--------------------
drivers/net/hns3/hns3_fdir.c | 1 -
drivers/net/hns3/hns3_flow.c | 2 --
drivers/net/hns3/hns3_intr.c | 4 ----
drivers/net/hns3/hns3_intr.h | 4 ++++
drivers/net/hns3/hns3_mbx.c | 14 --------------
drivers/net/hns3/hns3_mp.c | 2 --
drivers/net/hns3/hns3_regs.c | 16 ----------------
| 3 ---
drivers/net/hns3/hns3_rxtx.c | 13 -------------
drivers/net/hns3/hns3_rxtx.h | 3 +++
drivers/net/hns3/hns3_stats.c | 4 ----
18 files changed, 18 insertions(+), 125 deletions(-)
diff --git a/drivers/net/hns3/hns3_cmd.c b/drivers/net/hns3/hns3_cmd.c
index 589547c..4f52ed0 100644
--- a/drivers/net/hns3/hns3_cmd.c
+++ b/drivers/net/hns3/hns3_cmd.c
@@ -2,21 +2,6 @@
* Copyright(c) 2018-2019 Hisilicon Limited.
*/
-#include <errno.h>
-#include <stdbool.h>
-#include <stdint.h>
-#include <stdio.h>
-#include <string.h>
-#include <sys/queue.h>
-#include <inttypes.h>
-#include <unistd.h>
-#include <rte_bus_pci.h>
-#include <rte_common.h>
-#include <rte_cycles.h>
-#include <rte_dev.h>
-#include <rte_eal.h>
-#include <rte_ether.h>
-#include <rte_ethdev_driver.h>
#include <rte_ethdev_pci.h>
#include <rte_io.h>
diff --git a/drivers/net/hns3/hns3_cmd.h b/drivers/net/hns3/hns3_cmd.h
index 13550b9..194c3a7 100644
--- a/drivers/net/hns3/hns3_cmd.h
+++ b/drivers/net/hns3/hns3_cmd.h
@@ -5,6 +5,8 @@
#ifndef _HNS3_CMD_H_
#define _HNS3_CMD_H_
+#include <stdint.h>
+
#define HNS3_CMDQ_TX_TIMEOUT 30000
#define HNS3_CMDQ_RX_INVLD_B 0
#define HNS3_CMDQ_RX_OUTVLD_B 1
diff --git a/drivers/net/hns3/hns3_dcb.c b/drivers/net/hns3/hns3_dcb.c
index e06561c..ab02c87 100644
--- a/drivers/net/hns3/hns3_dcb.c
+++ b/drivers/net/hns3/hns3_dcb.c
@@ -2,17 +2,10 @@
* Copyright(c) 2018-2019 Hisilicon Limited.
*/
-#include <errno.h>
-#include <inttypes.h>
-#include <stdbool.h>
-#include <string.h>
-#include <unistd.h>
#include <rte_io.h>
-#include <rte_common.h>
#include <rte_ethdev.h>
#include "hns3_logs.h"
-#include "hns3_regs.h"
#include "hns3_ethdev.h"
#include "hns3_dcb.h"
diff --git a/drivers/net/hns3/hns3_dcb.h b/drivers/net/hns3/hns3_dcb.h
index 7ab9093..fee23d9 100644
--- a/drivers/net/hns3/hns3_dcb.h
+++ b/drivers/net/hns3/hns3_dcb.h
@@ -5,6 +5,10 @@
#ifndef _HNS3_DCB_H_
#define _HNS3_DCB_H_
+#include <stdint.h>
+
+#include "hns3_cmd.h"
+
#define HNS3_ETHER_MAX_RATE 100000
/* MAC Pause */
diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c
index dc02af0..ba96724 100644
--- a/drivers/net/hns3/hns3_ethdev.c
+++ b/drivers/net/hns3/hns3_ethdev.c
@@ -2,25 +2,10 @@
* Copyright(c) 2018-2019 Hisilicon Limited.
*/
-#include <errno.h>
-#include <stdarg.h>
-#include <stdbool.h>
-#include <stdio.h>
-#include <stdint.h>
-#include <inttypes.h>
-#include <unistd.h>
-#include <rte_atomic.h>
+#include <rte_alarm.h>
#include <rte_bus_pci.h>
-#include <rte_common.h>
-#include <rte_cycles.h>
-#include <rte_dev.h>
-#include <rte_eal.h>
-#include <rte_ether.h>
-#include <rte_ethdev_driver.h>
#include <rte_ethdev_pci.h>
-#include <rte_interrupts.h>
#include <rte_io.h>
-#include <rte_log.h>
#include <rte_pci.h>
#include "hns3_ethdev.h"
@@ -3450,8 +3435,8 @@ hns3_is_rx_buf_ok(struct hns3_hw *hw, struct hns3_pkt_buf_alloc *buf_alloc,
hi_thrd = shared_buf - pf->dv_buf_size;
if (tc_num <= NEED_RESERVE_TC_NUM)
- hi_thrd = hi_thrd * BUF_RESERVE_PERCENT
- / BUF_MAX_PERCENT;
+ hi_thrd = hi_thrd * BUF_RESERVE_PERCENT /
+ BUF_MAX_PERCENT;
if (tc_num)
hi_thrd = hi_thrd / tc_num;
@@ -6256,7 +6241,7 @@ static const struct rte_pci_id pci_id_hns3_map[] = {
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, HNS3_DEV_ID_50GE_RDMA) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, HNS3_DEV_ID_100G_RDMA_MACSEC) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, HNS3_DEV_ID_200G_RDMA) },
- { .vendor_id = 0, /* sentinel */ },
+ { .vendor_id = 0, }, /* sentinel */
};
static struct rte_pci_driver rte_hns3_pmd = {
diff --git a/drivers/net/hns3/hns3_ethdev.h b/drivers/net/hns3/hns3_ethdev.h
index 531a6cb..63e0c2f 100644
--- a/drivers/net/hns3/hns3_ethdev.h
+++ b/drivers/net/hns3/hns3_ethdev.h
@@ -6,7 +6,6 @@
#define _HNS3_ETHDEV_H_
#include <sys/time.h>
-#include <rte_alarm.h>
#include <rte_ethdev_driver.h>
#include "hns3_cmd.h"
@@ -792,12 +791,8 @@ struct hns3_adapter {
#define HNS3_DEV_PRIVATE_TO_HW(adapter) \
(&((struct hns3_adapter *)adapter)->hw)
-#define HNS3_DEV_PRIVATE_TO_ADAPTER(adapter) \
- ((struct hns3_adapter *)adapter)
#define HNS3_DEV_PRIVATE_TO_PF(adapter) \
(&((struct hns3_adapter *)adapter)->pf)
-#define HNS3VF_DEV_PRIVATE_TO_VF(adapter) \
- (&((struct hns3_adapter *)adapter)->vf)
#define HNS3_DEV_HW_TO_ADAPTER(hw) \
container_of(hw, struct hns3_adapter, hw)
diff --git a/drivers/net/hns3/hns3_ethdev_vf.c b/drivers/net/hns3/hns3_ethdev_vf.c
index ca1507a..3111dfb 100644
--- a/drivers/net/hns3/hns3_ethdev_vf.c
+++ b/drivers/net/hns3/hns3_ethdev_vf.c
@@ -2,29 +2,10 @@
* Copyright(c) 2018-2019 Hisilicon Limited.
*/
-#include <errno.h>
-#include <stdio.h>
-#include <stdbool.h>
-#include <string.h>
-#include <inttypes.h>
-#include <unistd.h>
-#include <arpa/inet.h>
#include <linux/pci_regs.h>
-
#include <rte_alarm.h>
-#include <rte_atomic.h>
-#include <rte_bus_pci.h>
-#include <rte_byteorder.h>
-#include <rte_common.h>
-#include <rte_cycles.h>
-#include <rte_dev.h>
-#include <rte_eal.h>
-#include <rte_ether.h>
-#include <rte_ethdev_driver.h>
#include <rte_ethdev_pci.h>
-#include <rte_interrupts.h>
#include <rte_io.h>
-#include <rte_log.h>
#include <rte_pci.h>
#include <rte_vfio.h>
@@ -2888,7 +2869,7 @@ eth_hns3vf_pci_remove(struct rte_pci_device *pci_dev)
static const struct rte_pci_id pci_id_hns3vf_map[] = {
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, HNS3_DEV_ID_100G_VF) },
{ RTE_PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, HNS3_DEV_ID_100G_RDMA_PFC_VF) },
- { .vendor_id = 0, /* sentinel */ },
+ { .vendor_id = 0, }, /* sentinel */
};
static struct rte_pci_driver rte_hns3vf_pmd = {
diff --git a/drivers/net/hns3/hns3_fdir.c b/drivers/net/hns3/hns3_fdir.c
index e0e9419..857cc94 100644
--- a/drivers/net/hns3/hns3_fdir.c
+++ b/drivers/net/hns3/hns3_fdir.c
@@ -2,7 +2,6 @@
* Copyright(c) 2018-2019 Hisilicon Limited.
*/
-#include <stdbool.h>
#include <rte_ethdev_driver.h>
#include <rte_hash.h>
#include <rte_hash_crc.h>
diff --git a/drivers/net/hns3/hns3_flow.c b/drivers/net/hns3/hns3_flow.c
index 72d3745..2fff157 100644
--- a/drivers/net/hns3/hns3_flow.c
+++ b/drivers/net/hns3/hns3_flow.c
@@ -2,8 +2,6 @@
* Copyright(c) 2018-2019 Hisilicon Limited.
*/
-#include <stdbool.h>
-#include <sys/queue.h>
#include <rte_flow_driver.h>
#include <rte_io.h>
#include <rte_malloc.h>
diff --git a/drivers/net/hns3/hns3_intr.c b/drivers/net/hns3/hns3_intr.c
index 2565688..bfd2ba8 100644
--- a/drivers/net/hns3/hns3_intr.c
+++ b/drivers/net/hns3/hns3_intr.c
@@ -2,15 +2,11 @@
* Copyright(c) 2018-2019 Hisilicon Limited.
*/
-#include <stdbool.h>
-#include <rte_atomic.h>
#include <rte_alarm.h>
#include <rte_cycles.h>
#include <rte_ethdev.h>
#include <rte_io.h>
#include <rte_malloc.h>
-#include <rte_pci.h>
-#include <rte_bus_pci.h>
#include "hns3_ethdev.h"
#include "hns3_logs.h"
diff --git a/drivers/net/hns3/hns3_intr.h b/drivers/net/hns3/hns3_intr.h
index 2b802bc..19de1aa 100644
--- a/drivers/net/hns3/hns3_intr.h
+++ b/drivers/net/hns3/hns3_intr.h
@@ -5,6 +5,10 @@
#ifndef _HNS3_INTR_H_
#define _HNS3_INTR_H_
+#include <stdint.h>
+
+#include "hns3_ethdev.h"
+
#define HNS3_PPP_MPF_ECC_ERR_INT0_EN 0xFFFFFFFF
#define HNS3_PPP_MPF_ECC_ERR_INT0_EN_MASK 0xFFFFFFFF
#define HNS3_PPP_MPF_ECC_ERR_INT1_EN 0xFFFFFFFF
diff --git a/drivers/net/hns3/hns3_mbx.c b/drivers/net/hns3/hns3_mbx.c
index c522c6d..d2a5db8 100644
--- a/drivers/net/hns3/hns3_mbx.c
+++ b/drivers/net/hns3/hns3_mbx.c
@@ -2,22 +2,8 @@
* Copyright(c) 2018-2019 Hisilicon Limited.
*/
-#include <errno.h>
-#include <stdbool.h>
-#include <stdint.h>
-#include <stdio.h>
-#include <string.h>
-#include <inttypes.h>
-#include <unistd.h>
-#include <rte_byteorder.h>
-#include <rte_common.h>
-#include <rte_cycles.h>
-#include <rte_dev.h>
#include <rte_ethdev_driver.h>
#include <rte_io.h>
-#include <rte_spinlock.h>
-#include <rte_pci.h>
-#include <rte_bus_pci.h>
#include "hns3_ethdev.h"
#include "hns3_regs.h"
diff --git a/drivers/net/hns3/hns3_mp.c b/drivers/net/hns3/hns3_mp.c
index 7e0fc46..ed2567a 100644
--- a/drivers/net/hns3/hns3_mp.c
+++ b/drivers/net/hns3/hns3_mp.c
@@ -2,8 +2,6 @@
* Copyright(c) 2018-2019 Hisilicon Limited.
*/
-#include <stdbool.h>
-
#include <rte_eal.h>
#include <rte_ethdev_driver.h>
#include <rte_string_fns.h>
diff --git a/drivers/net/hns3/hns3_regs.c b/drivers/net/hns3/hns3_regs.c
index 1b7dd72..b2cc599 100644
--- a/drivers/net/hns3/hns3_regs.c
+++ b/drivers/net/hns3/hns3_regs.c
@@ -2,24 +2,8 @@
* Copyright(c) 2018-2019 Hisilicon Limited.
*/
-#include <errno.h>
-#include <stdarg.h>
-#include <stdbool.h>
-#include <string.h>
-#include <stdint.h>
-#include <stdio.h>
-#include <inttypes.h>
-#include <unistd.h>
-#include <rte_bus_pci.h>
-#include <rte_byteorder.h>
-#include <rte_common.h>
-#include <rte_dev.h>
-#include <rte_eal.h>
-#include <rte_ether.h>
-#include <rte_ethdev_driver.h>
#include <rte_ethdev_pci.h>
#include <rte_io.h>
-#include <rte_pci.h>
#include "hns3_ethdev.h"
#include "hns3_logs.h"
--git a/drivers/net/hns3/hns3_rss.c b/drivers/net/hns3/hns3_rss.c
index a4e552b..e2f0468 100644
--- a/drivers/net/hns3/hns3_rss.c
+++ b/drivers/net/hns3/hns3_rss.c
@@ -2,12 +2,9 @@
* Copyright(c) 2018-2019 Hisilicon Limited.
*/
-#include <stdbool.h>
#include <rte_ethdev.h>
#include <rte_io.h>
#include <rte_malloc.h>
-#include <rte_memcpy.h>
-#include <rte_spinlock.h>
#include "hns3_ethdev.h"
#include "hns3_logs.h"
diff --git a/drivers/net/hns3/hns3_rxtx.c b/drivers/net/hns3/hns3_rxtx.c
index 4e17b12..85316ca 100644
--- a/drivers/net/hns3/hns3_rxtx.c
+++ b/drivers/net/hns3/hns3_rxtx.c
@@ -2,27 +2,14 @@
* Copyright(c) 2018-2019 Hisilicon Limited.
*/
-#include <stdarg.h>
-#include <stdbool.h>
-#include <stdint.h>
-#include <stdio.h>
-#include <unistd.h>
-#include <inttypes.h>
#include <rte_bus_pci.h>
-#include <rte_byteorder.h>
#include <rte_common.h>
#include <rte_cycles.h>
-#include <rte_dev.h>
-#include <rte_eal.h>
-#include <rte_ether.h>
#include <rte_vxlan.h>
#include <rte_ethdev_driver.h>
#include <rte_io.h>
-#include <rte_ip.h>
-#include <rte_gre.h>
#include <rte_net.h>
#include <rte_malloc.h>
-#include <rte_pci.h>
#if defined(RTE_ARCH_ARM64) && defined(CC_SVE_SUPPORT)
#include <rte_cpuflags.h>
#endif
diff --git a/drivers/net/hns3/hns3_rxtx.h b/drivers/net/hns3/hns3_rxtx.h
index 51504ca..8b32abe 100644
--- a/drivers/net/hns3/hns3_rxtx.h
+++ b/drivers/net/hns3/hns3_rxtx.h
@@ -5,6 +5,9 @@
#ifndef _HNS3_RXTX_H_
#define _HNS3_RXTX_H_
+#include <stdint.h>
+#include <rte_mbuf_core.h>
+
#define HNS3_MIN_RING_DESC 64
#define HNS3_MAX_RING_DESC 32768
#define HNS3_DEFAULT_RING_DESC 1024
diff --git a/drivers/net/hns3/hns3_stats.c b/drivers/net/hns3/hns3_stats.c
index ece07a4..c590647 100644
--- a/drivers/net/hns3/hns3_stats.c
+++ b/drivers/net/hns3/hns3_stats.c
@@ -2,13 +2,9 @@
* Copyright(c) 2018-2019 Hisilicon Limited.
*/
-#include <stdbool.h>
-#include <stdint.h>
-#include <rte_common.h>
#include <rte_ethdev.h>
#include <rte_io.h>
#include <rte_malloc.h>
-#include <rte_spinlock.h>
#include "hns3_ethdev.h"
#include "hns3_rxtx.h"
--
2.7.4
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [dpdk-dev] [PATCH 7/8] net/hns3: fix some static check errors by coverity
2020-11-02 14:38 ` [dpdk-dev] [PATCH 7/8] net/hns3: fix some static check errors by coverity Lijun Ou
@ 2020-11-03 11:41 ` Ferruh Yigit
2020-11-03 12:11 ` oulijun
0 siblings, 1 reply; 14+ messages in thread
From: Ferruh Yigit @ 2020-11-03 11:41 UTC (permalink / raw)
To: Lijun Ou; +Cc: dev, linuxarm
On 11/2/2020 2:38 PM, Lijun Ou wrote:
> From: Hongbo Zheng <zhenghongbo3@huawei.com>
>
> This patch fixes some warnings.
> coverity:function format symbol does not match
I think we are not getting these warnings in the public coverity, is there a
specific configuration for it?
>
> coverity:not_unsigned: Violation: Operand
> "hw->hw_tc_map & (1UL << i)", Right Expression:
> "1UL << i" is not an unsigned type
>
Can you please split this patch into multiple patches, one for each type of issue?
> Coverity issue: 91708127
> Coverity issue: 89776953
I assume these are internal coverity ids, it has not much value to record them
in the commit log.
We record the public coverity [1] ids with this tag.
[1]
https://scan.coverity.com/projects/dpdk-data-plane-development-kit?tab=overview
> Fixes: 62e3ccc2b94c ("net/hns3: support flow control")
> Fixes: 19a3ca4c99cf ("net/hns3: add start/stop and configure operations")
> Fixes: a5475d61fa34 ("net/hns3: support VF")
> Fixes: fb94f359481f ("net/hns3: fix adding multicast MAC address")
> Fixes: fcba820d9b9e ("net/hns3: support flow director")
> Fixes: a951c1ed3ab5 ("net/hns3: support different numbers of Rx and Tx queues")
> Fixes: 2790c6464725 ("net/hns3: support device reset")
> Fixes: 23d4b61fee5d ("net/hns3: support multiple process")
> Fixes: bba636698316 ("net/hns3: support Rx/Tx and related operations")
> Fixes: e31f123db06b ("net/hns3: support NEON Tx")
> Fixes: 8839c5e202f3 ("net/hns3: support device stats")
> Cc: stable@dpdk.org
>
> Signed-off-by: Hongbo Zheng <zhenghongbo3@huawei.com>
> Signed-off-by: Lijun Ou <oulijun@huawei.com>
<...>
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [dpdk-dev] [PATCH 7/8] net/hns3: fix some static check errors by coverity
2020-11-03 11:41 ` Ferruh Yigit
@ 2020-11-03 12:11 ` oulijun
2020-11-03 12:18 ` Ferruh Yigit
0 siblings, 1 reply; 14+ messages in thread
From: oulijun @ 2020-11-03 12:11 UTC (permalink / raw)
To: Ferruh Yigit; +Cc: dev, linuxarm
在 2020/11/3 19:41, Ferruh Yigit 写道:
> On 11/2/2020 2:38 PM, Lijun Ou wrote:
>> From: Hongbo Zheng <zhenghongbo3@huawei.com>
>>
>> This patch fixes some warnings.
>> coverity:function format symbol does not match
>
> I think we are not getting these warnings in the public coverity, is
> there a specific configuration for it?
>
Yes, the coverity scan is configured internally instead of the DPDK CI
coverity warning. However, we think it is reasonable.
>>
>> coverity:not_unsigned: Violation: Operand
>> "hw->hw_tc_map & (1UL << i)", Right Expression:
>> "1UL << i" is not an unsigned type
>>
>
> Can you please split this patch into multiple patches, one for each type
> of issue?
>
>> Coverity issue: 91708127
>> Coverity issue: 89776953
>
> I assume these are internal coverity ids, it has not much value to
> record them in the commit log.
>
> We record the public coverity [1] ids with this tag.
Hi, Ferruh
The warning is our configuration. As a result, it has no public id.If
the ID is not added, the check-git-log check fails.
Do you have any good advice?
Thanks
Lijun Ou
>
> [1]
> https://scan.coverity.com/projects/dpdk-data-plane-development-kit?tab=overview
>
>
>> Fixes: 62e3ccc2b94c ("net/hns3: support flow control")
>> Fixes: 19a3ca4c99cf ("net/hns3: add start/stop and configure operations")
>> Fixes: a5475d61fa34 ("net/hns3: support VF")
>> Fixes: fb94f359481f ("net/hns3: fix adding multicast MAC address")
>> Fixes: fcba820d9b9e ("net/hns3: support flow director")
>> Fixes: a951c1ed3ab5 ("net/hns3: support different numbers of Rx and Tx
>> queues")
>> Fixes: 2790c6464725 ("net/hns3: support device reset")
>> Fixes: 23d4b61fee5d ("net/hns3: support multiple process")
>> Fixes: bba636698316 ("net/hns3: support Rx/Tx and related operations")
>> Fixes: e31f123db06b ("net/hns3: support NEON Tx")
>> Fixes: 8839c5e202f3 ("net/hns3: support device stats")
>> Cc: stable@dpdk.org
>>
>> Signed-off-by: Hongbo Zheng <zhenghongbo3@huawei.com>
>> Signed-off-by: Lijun Ou <oulijun@huawei.com>
>
> <...>
>
> .
>
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [dpdk-dev] [PATCH 0/8] misc fixes for hns3
2020-11-02 14:38 [dpdk-dev] [PATCH 0/8] misc fixes for hns3 Lijun Ou
` (7 preceding siblings ...)
2020-11-02 14:38 ` [dpdk-dev] [PATCH 8/8] net/hns3: adjust some header files location Lijun Ou
@ 2020-11-03 12:15 ` Ferruh Yigit
2020-11-04 8:34 ` oulijun
8 siblings, 1 reply; 14+ messages in thread
From: Ferruh Yigit @ 2020-11-03 12:15 UTC (permalink / raw)
To: Lijun Ou; +Cc: dev, linuxarm
On 11/2/2020 2:38 PM, Lijun Ou wrote:
> This patch series includes three Tx checksum
> bugs and two static check warnings fixes.
> The remaining includes two features fixes.
>
> Chengchang Tang (4):
> net/hns3: add limit promisc mode to VF
> net/hns3: fix Tx cksum outer header prepare
> net/hns3: fix Tx checksum with fix header length
> net/hns3: add VXLAN-GPE packets TSO and checksum support
>
> Hongbo Zheng (2):
> net/hns3: fix visit unsupported QL register error
> net/hns3: fix some static check errors by coverity
>
> Huisong Li (1):
> net/hns3: fix configurations of port-level scheduling rate
>
> Lijun Ou (1):
> net/hns3: adjust some header files location
>
Except 7/8,
Series applied to dpdk-next-net/main, thanks.
Can you please send a new version of the 7/8 as separate patch(es)?
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [dpdk-dev] [PATCH 7/8] net/hns3: fix some static check errors by coverity
2020-11-03 12:11 ` oulijun
@ 2020-11-03 12:18 ` Ferruh Yigit
0 siblings, 0 replies; 14+ messages in thread
From: Ferruh Yigit @ 2020-11-03 12:18 UTC (permalink / raw)
To: oulijun; +Cc: dev, linuxarm
On 11/3/2020 12:11 PM, oulijun wrote:
>
>
> 在 2020/11/3 19:41, Ferruh Yigit 写道:
>> On 11/2/2020 2:38 PM, Lijun Ou wrote:
>>> From: Hongbo Zheng <zhenghongbo3@huawei.com>
>>>
>>> This patch fixes some warnings.
>>> coverity:function format symbol does not match
>>
>> I think we are not getting these warnings in the public coverity, is there a
>> specific configuration for it?
>>
> Yes, the coverity scan is configured internally instead of the DPDK CI coverity
> warning. However, we think it is reasonable.
>
That is OK, I just wonder if it is enabled explicitly with a config, and what
that config is (for the record).
>>>
>>> coverity:not_unsigned: Violation: Operand
>>> "hw->hw_tc_map & (1UL << i)", Right Expression:
>>> "1UL << i" is not an unsigned type
>>>
>>
>> Can you please split this patch into multiple patches, one for each type of
>> issue?
>>
>>> Coverity issue: 91708127
>>> Coverity issue: 89776953
>>
>> I assume these are internal coverity ids, it has not much value to record them
>> in the commit log.
>>
>> We record the public coverity [1] ids with this tag.
> Hi, Ferruh
> The warning is our configuration. As a result, it has no public id.If the ID
> is not added, the check-git-log check fails.
>
> Do you have any good advice?
>
Doesn't mention from coverity at all in the commit log,
like first patch can be:
"
net/hns3: fix logging format symbols
<more details>
"
etc...
> Thanks
> Lijun Ou
>>
>> [1]
>> https://scan.coverity.com/projects/dpdk-data-plane-development-kit?tab=overview
>>
>>> Fixes: 62e3ccc2b94c ("net/hns3: support flow control")
>>> Fixes: 19a3ca4c99cf ("net/hns3: add start/stop and configure operations")
>>> Fixes: a5475d61fa34 ("net/hns3: support VF")
>>> Fixes: fb94f359481f ("net/hns3: fix adding multicast MAC address")
>>> Fixes: fcba820d9b9e ("net/hns3: support flow director")
>>> Fixes: a951c1ed3ab5 ("net/hns3: support different numbers of Rx and Tx queues")
>>> Fixes: 2790c6464725 ("net/hns3: support device reset")
>>> Fixes: 23d4b61fee5d ("net/hns3: support multiple process")
>>> Fixes: bba636698316 ("net/hns3: support Rx/Tx and related operations")
>>> Fixes: e31f123db06b ("net/hns3: support NEON Tx")
>>> Fixes: 8839c5e202f3 ("net/hns3: support device stats")
>>> Cc: stable@dpdk.org
>>>
>>> Signed-off-by: Hongbo Zheng <zhenghongbo3@huawei.com>
>>> Signed-off-by: Lijun Ou <oulijun@huawei.com>
>>
>> <...>
>>
>> .
>>
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [dpdk-dev] [PATCH 0/8] misc fixes for hns3
2020-11-03 12:15 ` [dpdk-dev] [PATCH 0/8] misc fixes for hns3 Ferruh Yigit
@ 2020-11-04 8:34 ` oulijun
0 siblings, 0 replies; 14+ messages in thread
From: oulijun @ 2020-11-04 8:34 UTC (permalink / raw)
To: Ferruh Yigit; +Cc: dev, linuxarm
在 2020/11/3 20:15, Ferruh Yigit 写道:
> On 11/2/2020 2:38 PM, Lijun Ou wrote:
>> This patch series includes three Tx checksum
>> bugs and two static check warnings fixes.
>> The remaining includes two features fixes.
>>
>> Chengchang Tang (4):
>> net/hns3: add limit promisc mode to VF
>> net/hns3: fix Tx cksum outer header prepare
>> net/hns3: fix Tx checksum with fix header length
>> net/hns3: add VXLAN-GPE packets TSO and checksum support
>>
>> Hongbo Zheng (2):
>> net/hns3: fix visit unsupported QL register error
>> net/hns3: fix some static check errors by coverity
>>
>> Huisong Li (1):
>> net/hns3: fix configurations of port-level scheduling rate
>>
>> Lijun Ou (1):
>> net/hns3: adjust some header files location
>>
>
> Except 7/8,
> Series applied to dpdk-next-net/main, thanks.
>
> Can you please send a new version of the 7/8 as separate patch(es)?
> .
Yes, I can. thanks
>
^ permalink raw reply [flat|nested] 14+ messages in thread
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-- links below jump to the message on this page --
2020-11-02 14:38 [dpdk-dev] [PATCH 0/8] misc fixes for hns3 Lijun Ou
2020-11-02 14:38 ` [dpdk-dev] [PATCH 1/8] net/hns3: add limit promisc mode to VF Lijun Ou
2020-11-02 14:38 ` [dpdk-dev] [PATCH 2/8] net/hns3: fix Tx cksum outer header prepare Lijun Ou
2020-11-02 14:38 ` [dpdk-dev] [PATCH 3/8] net/hns3: fix Tx checksum with fix header length Lijun Ou
2020-11-02 14:38 ` [dpdk-dev] [PATCH 4/8] net/hns3: add VXLAN-GPE packets TSO and checksum support Lijun Ou
2020-11-02 14:38 ` [dpdk-dev] [PATCH 5/8] net/hns3: fix configurations of port-level scheduling rate Lijun Ou
2020-11-02 14:38 ` [dpdk-dev] [PATCH 6/8] net/hns3: fix visit unsupported QL register error Lijun Ou
2020-11-02 14:38 ` [dpdk-dev] [PATCH 7/8] net/hns3: fix some static check errors by coverity Lijun Ou
2020-11-03 11:41 ` Ferruh Yigit
2020-11-03 12:11 ` oulijun
2020-11-03 12:18 ` Ferruh Yigit
2020-11-02 14:38 ` [dpdk-dev] [PATCH 8/8] net/hns3: adjust some header files location Lijun Ou
2020-11-03 12:15 ` [dpdk-dev] [PATCH 0/8] misc fixes for hns3 Ferruh Yigit
2020-11-04 8:34 ` oulijun
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