From: Ferruh Yigit <ferruh.yigit@intel.com> To: 谢华伟(此时此刻) <huawei.xhw@alibaba-inc.com> Cc: dev@dpdk.org, maxime.coquelin@redhat.com, anatoly.burakov@intel.com, david.marchand@redhat.com, zhihong.wang@intel.com, chenbo.xia@intel.com, grive@u256.net Subject: Re: [dpdk-dev] [PATCH v5 2/3] PCI: support MMIO in rte_pci_ioport_map/unap/read/write Date: Wed, 27 Jan 2021 10:40:16 +0000 Message-ID: <820d8f58-0a88-e9bc-e86e-6876f7f5f50f@intel.com> (raw) In-Reply-To: <1603381885-88819-3-git-send-email-huawei.xhw@alibaba-inc.com> On 10/22/2020 4:51 PM, 谢华伟(此时此刻) wrote: > From: "huawei.xhw" <huawei.xhw@alibaba-inc.com> > > If IO BAR, we get PIO address. > If MMIO BAR, we get mapped virtual address. > We distinguish PIO and MMIO by their address like how kernel does. > ioread/write8/16/32 is provided to access PIO/MMIO. > BTW, for virtio on arch other than x86, BAR flag indicates PIO but is mapped. > > Signed-off-by: huawei.xhw <huawei.xhw@alibaba-inc.com> <...> > @@ -408,15 +403,30 @@ > &end_addr, &flags) < 0) > goto error; > > - if (!(flags & IORESOURCE_IO)) { > - RTE_LOG(ERR, EAL, "%s(): bar resource other than IO is not supported\n", __func__); > + if (flags & IORESOURCE_IO) { > + iobar = 1; > + base = (unsigned long)phys_addr; > + RTE_LOG(INFO, EAL, "%s(): PIO BAR %08lx detected\n", __func__, base); > + } else if (flags & IORESOURCE_MEM) { > + iobar = 0; > + base = (unsigned long)dev->mem_resource[bar].addr; Hi Huawei, At this stage, to have a valid 'addr' it should be already mmap'ed, can you please provide the call stack when it is set/mmaped, to confirm it will be always valid at this point? Thanks, ferruh
next prev parent reply other threads:[~2021-01-27 10:40 UTC|newest] Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-09-30 14:59 [dpdk-dev] [PATCH v2] pci: support both PIO and MMIO BAR for legacy virtio on x86 谢华伟(此时此刻) 2020-10-01 10:22 ` Burakov, Anatoly 2020-10-02 5:44 ` 谢华伟(此时此刻) 2020-10-09 8:36 ` [dpdk-dev] [PATCH v3] " 谢华伟(此时此刻) 2020-10-13 8:41 ` [dpdk-dev] [PATCH v4] support both PIO and MMIO bar for virtio pci device 谢华伟(此时此刻) 2020-10-13 8:41 ` [dpdk-dev] [PATCH v4] pci: support both PIO and MMIO BAR for legacy virtio on x86 谢华伟(此时此刻) 2020-10-13 12:34 ` 谢华伟(此时此刻) 2020-10-21 8:46 ` 谢华伟(此时此刻) 2020-10-21 11:49 ` Ferruh Yigit 2020-10-21 12:32 ` 谢华伟(此时此刻) 2020-10-21 17:24 ` Ferruh Yigit 2020-10-22 9:15 ` 谢华伟(此时此刻) 2020-10-22 9:44 ` Ferruh Yigit 2020-10-22 9:57 ` 谢华伟(此时此刻) 2020-10-22 15:51 ` [dpdk-dev] [PATCH v5 0/3] support both PIO and MMIO BAR for virtio PMD 谢华伟(此时此刻) 2020-10-22 15:51 ` [dpdk-dev] [PATCH v5 1/3] PCI: use PCI standard sysfs entry to get PIO address 谢华伟(此时此刻) 2021-01-12 8:07 ` Maxime Coquelin 2021-01-14 18:23 ` 谢华伟(此时此刻) 2021-01-24 15:10 ` Xueming(Steven) Li 2020-10-22 15:51 ` [dpdk-dev] [PATCH v5 2/3] PCI: support MMIO in rte_pci_ioport_map/unap/read/write 谢华伟(此时此刻) 2021-01-12 8:23 ` Maxime Coquelin 2021-01-21 6:30 ` 谢华伟(此时此刻) 2021-01-24 15:22 ` Xueming(Steven) Li 2021-01-25 3:08 ` 谢华伟(此时此刻) 2021-01-27 10:40 ` Ferruh Yigit [this message] 2021-01-27 15:34 ` 谢华伟(此时此刻) 2021-01-27 16:45 ` Ferruh Yigit 2020-10-22 15:51 ` [dpdk-dev] [PATCH v5 3/3] PCI: don't use vfio ioctl call to access PIO resource 谢华伟(此时此刻) 2021-01-12 9:37 ` Maxime Coquelin 2021-01-12 16:58 ` Maxime Coquelin 2021-01-20 14:54 ` 谢华伟(此时此刻) 2021-01-21 8:29 ` Maxime Coquelin 2021-01-21 14:57 ` 谢华伟(此时此刻) 2021-01-21 15:00 ` 谢华伟(此时此刻) 2021-01-21 15:38 ` Maxime Coquelin 2021-01-22 7:25 ` 谢华伟(此时此刻) 2021-01-26 10:44 ` Maxime Coquelin 2021-01-27 10:32 ` Ferruh Yigit 2021-01-27 12:17 ` Maxime Coquelin 2021-01-27 14:43 ` 谢华伟(此时此刻) 2021-01-27 16:45 ` Ferruh Yigit 2021-01-28 13:43 ` 谢华伟(此时此刻) 2021-01-26 12:30 ` 谢华伟(此时此刻) 2021-01-26 12:35 ` Maxime Coquelin 2021-01-26 14:24 ` 谢华伟(此时此刻) 2020-10-27 8:50 ` [dpdk-dev] [PATCH v5 0/3] support both PIO and MMIO BAR for virtio PMD 谢华伟(此时此刻) 2020-10-28 3:48 ` 谢华伟(此时此刻) 2020-11-02 11:56 ` 谢华伟(此时此刻) 2020-11-10 12:35 ` 谢华伟(此时此刻) 2020-11-10 12:42 ` David Marchand 2020-11-12 13:35 ` 谢华伟(此时此刻) 2020-12-14 14:24 ` 谢华伟(此时此刻) 2020-12-16 7:54 ` Maxime Coquelin 2021-01-12 17:37 ` Maxime Coquelin 2021-01-14 18:19 ` 谢华伟(此时此刻) 2021-01-21 4:12 ` 谢华伟(此时此刻) 2021-01-21 8:47 ` Maxime Coquelin 2021-01-21 13:51 ` 谢华伟(此时此刻)
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