Re: [dpdk-dev] [PATCH v5 0/3] support both PIO and MMIO BAR for virtio PMD

["谢华伟(此时此刻）" <huawei.xhw@alibaba-inc.com>]

On 2021/1/21 16:47, Maxime Coquelin wrote:
>
> On 1/21/21 5:12 AM, 谢华伟(此时此刻） wrote:
>> On 2021/1/13 1:37, Maxime Coquelin wrote:
>>> On 10/22/20 5:51 PM, 谢华伟(此时此刻） wrote:
>>>> From: "huawei.xhw" <huawei.xhw@alibaba-inc.com>
>>>>
>>>> Legacy virtio-pci only supports PIO BAR resource. As we need to
>>>> create lots of
>>>> virtio devices and PIO resource on x86 is very limited, we expose
>>>> MMIO BAR.
>>>>
>>>> Kernel supports both PIO  and MMIO BAR for legacy virtio-pci device.
>>>> We handles
>>>> different type of BAR in the similar way.
>>>>
>>>> In previous implementation, with igb_uio we get PIO address from igb_uio
>>>> sysfs entry; with uio_pci_generic, we get PIO address from
>>>> /proc/ioports.
>>>> For PIO/MMIO RW, there is different path for different drivers and arch.
>>>> For VFIO, PIO/MMIO RW is through syscall, which has big performance
>>>> issue.
>>> Regarding the performance issue, do you have some numbers to share?
>>> AFAICS, it can only have an impact on performance when interrupt mode is
>>> used or queue notification is enabled.
>>>
>>> Does your HW Virtio implementation requires notification?
>> Yes, hardware needs notification to tell which queue has more buffer.
>>
>> vhost backend also needs notification when it is not running in polling
>> mode.
>>
>> It is easy for software backend to sync with frontend whether it needs
>> notification through memory but a big burden for hardware.
> Yes, I understand, thanks for the clarification.
>
>> Anyway, using vfio ioctl isn't needed at all. virtio PMD is only the
>> consumer of pci_vfio_ioport_read.
> My understanding is that using VFIO read/write ops is required for IOMMU
> enabled case without cap_sys_rawio. And anyway, using inb/outb is just
> bypassing VFIO. As I suggest in my other reply, it is better to document
> that in the case of devices having PIO BARs, the user should consider
> using UIO driver if performance is a concern.

Get it. so user could read/write PIO using VFIO without iopl permission, 
with some performance penalty.


>> we could consider if we still need pci_vfio_ioport_read related API in
>> future.
> I disagree. I think the pci_vfio_ioport_* API is required at least for
> the IOMMU enabled case.
>
> Documentation is the way to go in my opinion, we can also add a warning
> that performance may be degraded compared to UIO in
> pci_vfio_ioport_map() when IOMMU is disabled if you think it may help
> the users.
>
> Thanks,
> Maxime
>
>> /huawei
>>> Is performance the only issue to have your HW working with Virtio PMD,
>>> or is this series also fixing some functionnal issues?
>>>
>>> Best regards,
>>> Maxime
>>>