* Re: [dpdk-dev] [PATCH] net: introduce IPv4 ihl and version fields
2021-05-28 10:20 0% ` Ananyev, Konstantin
@ 2021-05-28 10:52 0% ` Morten Brørup
0 siblings, 0 replies; 200+ results
From: Morten Brørup @ 2021-05-28 10:52 UTC (permalink / raw)
To: Ananyev, Konstantin, Gregory Etelson, dev
Cc: matan, orika, rasland, Iremonger, Bernard, Olivier Matz
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Ananyev,
> Konstantin
> Sent: Friday, 28 May 2021 12.21
>
> > > From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Gregory
> Etelson
> > > Sent: Thursday, 27 May 2021 17.29
> > and version fields
> > >
> > > RTE IPv4 header definition combines the `version' and `ihl' fields
> > > into a single structure member.
> > > This patch introduces dedicated structure members for both
> `version'
> > > and `ihl' IPv4 fields. Separated header fields definitions allow to
> > > create simplified code to match on the IHL value in a flow rule.
> > > The original `version_ihl' structure member is kept for backward
> > > compatibility.
> > >
> > > Signed-off-by: Gregory Etelson <getelson@nvidia.com>
> > > ---
> > > app/test/test_flow_classify.c | 8 ++++----
> > > lib/net/rte_ip.h | 16 +++++++++++++++-
> > > 2 files changed, 19 insertions(+), 5 deletions(-)
> > >
> > > diff --git a/app/test/test_flow_classify.c
> > > b/app/test/test_flow_classify.c
> > > index 951606f248..4f64be5357 100644
> > > --- a/app/test/test_flow_classify.c
> > > +++ b/app/test/test_flow_classify.c
> > > @@ -95,7 +95,7 @@ static struct rte_acl_field_def
> > > ipv4_defs[NUM_FIELDS_IPV4] = {
> > > * dst mask 255.255.255.00 / udp src is 32 dst is 33 / end"
> > > */
> > > static struct rte_flow_item_ipv4 ipv4_udp_spec_1 = {
> > > - { 0, 0, 0, 0, 0, 0, IPPROTO_UDP, 0,
> > > + { { .version_ihl = 0}, 0, 0, 0, 0, 0, IPPROTO_UDP, 0,
> > > RTE_IPV4(2, 2, 2, 3), RTE_IPV4(2, 2, 2, 7)}
> > > };
> > > static const struct rte_flow_item_ipv4 ipv4_mask_24 = {
> > > @@ -131,7 +131,7 @@ static struct rte_flow_item end_item = {
> > > RTE_FLOW_ITEM_TYPE_END,
> > > * dst mask 255.255.255.00 / tcp src is 16 dst is 17 / end"
> > > */
> > > static struct rte_flow_item_ipv4 ipv4_tcp_spec_1 = {
> > > - { 0, 0, 0, 0, 0, 0, IPPROTO_TCP, 0,
> > > + { { .version_ihl = 0}, 0, 0, 0, 0, 0, IPPROTO_TCP, 0,
> > > RTE_IPV4(1, 2, 3, 4), RTE_IPV4(5, 6, 7, 8)}
> > > };
> > >
> > > @@ -150,8 +150,8 @@ static struct rte_flow_item tcp_item_1 = {
> > > RTE_FLOW_ITEM_TYPE_TCP,
> > > * dst mask 255.255.255.00 / sctp src is 16 dst is 17/ end"
> > > */
> > > static struct rte_flow_item_ipv4 ipv4_sctp_spec_1 = {
> > > - { 0, 0, 0, 0, 0, 0, IPPROTO_SCTP, 0, RTE_IPV4(11, 12, 13, 14),
> > > - RTE_IPV4(15, 16, 17, 18)}
> > > + { { .version_ihl = 0}, 0, 0, 0, 0, 0, IPPROTO_SCTP, 0,
> > > + RTE_IPV4(11, 12, 13, 14), RTE_IPV4(15, 16, 17, 18)}
> > > };
> > >
> > > static struct rte_flow_item_sctp sctp_spec_1 = {
> > > diff --git a/lib/net/rte_ip.h b/lib/net/rte_ip.h
> > > index 4b728969c1..684bb028b2 100644
> > > --- a/lib/net/rte_ip.h
> > > +++ b/lib/net/rte_ip.h
> > > @@ -38,7 +38,21 @@ extern "C" {
> > > * IPv4 Header
> > > */
> > > struct rte_ipv4_hdr {
> > > - uint8_t version_ihl; /**< version and header length */
> > > + __extension__
> > > + union {
> > > + uint8_t version_ihl; /**< version and header length */
> > > + struct {
> > > +#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
> > > + uint8_t ihl:4;
> > > + uint8_t version:4;
> > > +#elif RTE_BYTE_ORDER == RTE_BIG_ENDIAN
> > > + uint8_t version:4;
> > > + uint8_t ihl:4;
> > > +#else
> > > +#error "setup endian definition"
> > > +#endif
> > > + };
> > > + };
> > > uint8_t type_of_service; /**< type of service */
> > > rte_be16_t total_length; /**< length of packet */
> > > rte_be16_t packet_id; /**< packet ID */
> > > --
> > > 2.31.1
> > >
> >
> > This does not break the ABI, but it could be discussed if it breaks
> the API due to the required structure initialization changes shown in
> > test_flow_classify.c.
>
> Yep, I guess it might be classified as API change.
> Another thing that concerns me - it is not the only place in IPv4
> header when we unite multiple bit-fields into one field:
> type_of_service, fragment_offset.
> If we start splitting ipv4 fields into actual bitfields, I suppose
> we'll end-up splitting these ones too.
> But I am not sure it will pay off - as compiler not always generates
> optimal code for reading/updating bitfields.
> Did you consider just adding extra macros to simplify access to these
> fields (like RTE_IPV4_HDR_(GET_SET)_*),
> instead?
>
Let's please not introduce accessor macros for bitfields. If we don't introduce bitfields like these, I would rather stick with the current _MASK, _SHIFT and _FLAG defines.
Yes, this change will lead to the introduction of more bitfields, both here and in other places. We already accepted it in the eCPRI structure (/lib/net/rte_ecpri.h), so why not just generally accept it.
Are modern compilers really worse at handling a bitfield defined like this, compared to handling a single uint8_t with hand coding? I consider your concern very important, so I'm only asking if it is still relevant, to avoid making decisions based on past experience that might be outdated. (I admit to falling into that trap myself, once in a while.)
> > I think this patch is an improvement, and that such structure
> modifications should be generally accepted, so:
> >
> > Acked-by: Morten Brørup <mb@smartsharesystems.com>
>
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH] net: introduce IPv4 ihl and version fields
2021-05-27 15:56 3% ` Morten Brørup
@ 2021-05-28 10:20 0% ` Ananyev, Konstantin
2021-05-28 10:52 0% ` Morten Brørup
0 siblings, 1 reply; 200+ results
From: Ananyev, Konstantin @ 2021-05-28 10:20 UTC (permalink / raw)
To: Morten Brørup, Gregory Etelson, dev
Cc: matan, orika, rasland, Iremonger, Bernard, Olivier Matz
> > From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Gregory Etelson
> > Sent: Thursday, 27 May 2021 17.29
> and version fields
> >
> > RTE IPv4 header definition combines the `version' and `ihl' fields
> > into a single structure member.
> > This patch introduces dedicated structure members for both `version'
> > and `ihl' IPv4 fields. Separated header fields definitions allow to
> > create simplified code to match on the IHL value in a flow rule.
> > The original `version_ihl' structure member is kept for backward
> > compatibility.
> >
> > Signed-off-by: Gregory Etelson <getelson@nvidia.com>
> > ---
> > app/test/test_flow_classify.c | 8 ++++----
> > lib/net/rte_ip.h | 16 +++++++++++++++-
> > 2 files changed, 19 insertions(+), 5 deletions(-)
> >
> > diff --git a/app/test/test_flow_classify.c
> > b/app/test/test_flow_classify.c
> > index 951606f248..4f64be5357 100644
> > --- a/app/test/test_flow_classify.c
> > +++ b/app/test/test_flow_classify.c
> > @@ -95,7 +95,7 @@ static struct rte_acl_field_def
> > ipv4_defs[NUM_FIELDS_IPV4] = {
> > * dst mask 255.255.255.00 / udp src is 32 dst is 33 / end"
> > */
> > static struct rte_flow_item_ipv4 ipv4_udp_spec_1 = {
> > - { 0, 0, 0, 0, 0, 0, IPPROTO_UDP, 0,
> > + { { .version_ihl = 0}, 0, 0, 0, 0, 0, IPPROTO_UDP, 0,
> > RTE_IPV4(2, 2, 2, 3), RTE_IPV4(2, 2, 2, 7)}
> > };
> > static const struct rte_flow_item_ipv4 ipv4_mask_24 = {
> > @@ -131,7 +131,7 @@ static struct rte_flow_item end_item = {
> > RTE_FLOW_ITEM_TYPE_END,
> > * dst mask 255.255.255.00 / tcp src is 16 dst is 17 / end"
> > */
> > static struct rte_flow_item_ipv4 ipv4_tcp_spec_1 = {
> > - { 0, 0, 0, 0, 0, 0, IPPROTO_TCP, 0,
> > + { { .version_ihl = 0}, 0, 0, 0, 0, 0, IPPROTO_TCP, 0,
> > RTE_IPV4(1, 2, 3, 4), RTE_IPV4(5, 6, 7, 8)}
> > };
> >
> > @@ -150,8 +150,8 @@ static struct rte_flow_item tcp_item_1 = {
> > RTE_FLOW_ITEM_TYPE_TCP,
> > * dst mask 255.255.255.00 / sctp src is 16 dst is 17/ end"
> > */
> > static struct rte_flow_item_ipv4 ipv4_sctp_spec_1 = {
> > - { 0, 0, 0, 0, 0, 0, IPPROTO_SCTP, 0, RTE_IPV4(11, 12, 13, 14),
> > - RTE_IPV4(15, 16, 17, 18)}
> > + { { .version_ihl = 0}, 0, 0, 0, 0, 0, IPPROTO_SCTP, 0,
> > + RTE_IPV4(11, 12, 13, 14), RTE_IPV4(15, 16, 17, 18)}
> > };
> >
> > static struct rte_flow_item_sctp sctp_spec_1 = {
> > diff --git a/lib/net/rte_ip.h b/lib/net/rte_ip.h
> > index 4b728969c1..684bb028b2 100644
> > --- a/lib/net/rte_ip.h
> > +++ b/lib/net/rte_ip.h
> > @@ -38,7 +38,21 @@ extern "C" {
> > * IPv4 Header
> > */
> > struct rte_ipv4_hdr {
> > - uint8_t version_ihl; /**< version and header length */
> > + __extension__
> > + union {
> > + uint8_t version_ihl; /**< version and header length */
> > + struct {
> > +#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
> > + uint8_t ihl:4;
> > + uint8_t version:4;
> > +#elif RTE_BYTE_ORDER == RTE_BIG_ENDIAN
> > + uint8_t version:4;
> > + uint8_t ihl:4;
> > +#else
> > +#error "setup endian definition"
> > +#endif
> > + };
> > + };
> > uint8_t type_of_service; /**< type of service */
> > rte_be16_t total_length; /**< length of packet */
> > rte_be16_t packet_id; /**< packet ID */
> > --
> > 2.31.1
> >
>
> This does not break the ABI, but it could be discussed if it breaks the API due to the required structure initialization changes shown in
> test_flow_classify.c.
Yep, I guess it might be classified as API change.
Another thing that concerns me - it is not the only place in IPv4 header when we unite multiple bit-fields into one field:
type_of_service, fragment_offset.
If we start splitting ipv4 fields into actual bitfields, I suppose we'll end-up splitting these ones too.
But I am not sure it will pay off - as compiler not always generates optimal code for reading/updating bitfields.
Did you consider just adding extra macros to simplify access to these fields (like RTE_IPV4_HDR_(GET_SET)_*),
instead?
> I think this patch is an improvement, and that such structure modifications should be generally accepted, so:
>
> Acked-by: Morten Brørup <mb@smartsharesystems.com>
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH] net: introduce IPv4 ihl and version fields
@ 2021-05-27 15:56 3% ` Morten Brørup
2021-05-28 10:20 0% ` Ananyev, Konstantin
0 siblings, 1 reply; 200+ results
From: Morten Brørup @ 2021-05-27 15:56 UTC (permalink / raw)
To: Gregory Etelson, dev
Cc: matan, orika, rasland, Bernard Iremonger, Olivier Matz
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Gregory Etelson
> Sent: Thursday, 27 May 2021 17.29
and version fields
>
> RTE IPv4 header definition combines the `version' and `ihl' fields
> into a single structure member.
> This patch introduces dedicated structure members for both `version'
> and `ihl' IPv4 fields. Separated header fields definitions allow to
> create simplified code to match on the IHL value in a flow rule.
> The original `version_ihl' structure member is kept for backward
> compatibility.
>
> Signed-off-by: Gregory Etelson <getelson@nvidia.com>
> ---
> app/test/test_flow_classify.c | 8 ++++----
> lib/net/rte_ip.h | 16 +++++++++++++++-
> 2 files changed, 19 insertions(+), 5 deletions(-)
>
> diff --git a/app/test/test_flow_classify.c
> b/app/test/test_flow_classify.c
> index 951606f248..4f64be5357 100644
> --- a/app/test/test_flow_classify.c
> +++ b/app/test/test_flow_classify.c
> @@ -95,7 +95,7 @@ static struct rte_acl_field_def
> ipv4_defs[NUM_FIELDS_IPV4] = {
> * dst mask 255.255.255.00 / udp src is 32 dst is 33 / end"
> */
> static struct rte_flow_item_ipv4 ipv4_udp_spec_1 = {
> - { 0, 0, 0, 0, 0, 0, IPPROTO_UDP, 0,
> + { { .version_ihl = 0}, 0, 0, 0, 0, 0, IPPROTO_UDP, 0,
> RTE_IPV4(2, 2, 2, 3), RTE_IPV4(2, 2, 2, 7)}
> };
> static const struct rte_flow_item_ipv4 ipv4_mask_24 = {
> @@ -131,7 +131,7 @@ static struct rte_flow_item end_item = {
> RTE_FLOW_ITEM_TYPE_END,
> * dst mask 255.255.255.00 / tcp src is 16 dst is 17 / end"
> */
> static struct rte_flow_item_ipv4 ipv4_tcp_spec_1 = {
> - { 0, 0, 0, 0, 0, 0, IPPROTO_TCP, 0,
> + { { .version_ihl = 0}, 0, 0, 0, 0, 0, IPPROTO_TCP, 0,
> RTE_IPV4(1, 2, 3, 4), RTE_IPV4(5, 6, 7, 8)}
> };
>
> @@ -150,8 +150,8 @@ static struct rte_flow_item tcp_item_1 = {
> RTE_FLOW_ITEM_TYPE_TCP,
> * dst mask 255.255.255.00 / sctp src is 16 dst is 17/ end"
> */
> static struct rte_flow_item_ipv4 ipv4_sctp_spec_1 = {
> - { 0, 0, 0, 0, 0, 0, IPPROTO_SCTP, 0, RTE_IPV4(11, 12, 13, 14),
> - RTE_IPV4(15, 16, 17, 18)}
> + { { .version_ihl = 0}, 0, 0, 0, 0, 0, IPPROTO_SCTP, 0,
> + RTE_IPV4(11, 12, 13, 14), RTE_IPV4(15, 16, 17, 18)}
> };
>
> static struct rte_flow_item_sctp sctp_spec_1 = {
> diff --git a/lib/net/rte_ip.h b/lib/net/rte_ip.h
> index 4b728969c1..684bb028b2 100644
> --- a/lib/net/rte_ip.h
> +++ b/lib/net/rte_ip.h
> @@ -38,7 +38,21 @@ extern "C" {
> * IPv4 Header
> */
> struct rte_ipv4_hdr {
> - uint8_t version_ihl; /**< version and header length */
> + __extension__
> + union {
> + uint8_t version_ihl; /**< version and header length */
> + struct {
> +#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
> + uint8_t ihl:4;
> + uint8_t version:4;
> +#elif RTE_BYTE_ORDER == RTE_BIG_ENDIAN
> + uint8_t version:4;
> + uint8_t ihl:4;
> +#else
> +#error "setup endian definition"
> +#endif
> + };
> + };
> uint8_t type_of_service; /**< type of service */
> rte_be16_t total_length; /**< length of packet */
> rte_be16_t packet_id; /**< packet ID */
> --
> 2.31.1
>
This does not break the ABI, but it could be discussed if it breaks the API due to the required structure initialization changes shown in test_flow_classify.c. I think this patch is an improvement, and that such structure modifications should be generally accepted, so:
Acked-by: Morten Brørup <mb@smartsharesystems.com>
^ permalink raw reply [relevance 3%]
* [dpdk-dev] Minutes of Technical Board Meeting, 2021-05-19
[not found] <YKdg/B0dJOqC74ii@platinum>
@ 2021-05-25 11:50 4% ` Olivier Matz
0 siblings, 0 replies; 200+ results
From: Olivier Matz @ 2021-05-25 11:50 UTC (permalink / raw)
To: dev
Minutes of Technical Board Meeting, 2021-05-19
==============================================
Members Attending
-----------------
- Aaron
- Bruce
- Ferruh
- Hemant
- Honnappa
- Jerin
- Kevin
- Konstantin
- Maxime
- Olivier (chair)
- Thomas
NOTE: The technical board meetings every second Wednesday at
https://meet.jit.si/DPDK at 3 pm UTC.
Meetings are public, and DPDK community members are welcome to attend.
NOTE: Next meeting will be on Wednesday 2021-06-02 @3pm UTC, and will be
chaired by Stephen.
1/ Tech Board Membership Policy
-------------------------------
Governing board wants the techboard to better document the current
policy for membership.
Hemant started to write a document about the current policy. We will
continue the discussion based on it.
2/ Crypto maintainership
------------------------
There is no backup maintainer for the crypto tree for Akhil since he
took the leading role. Requesting companies involved in crypto to
nominate someone.
Action on Ferruh to internally check if someone can take the role at
Intel.
3/ Use of Travis CI
-------------------
Currently, Travis CI is used for Arm tests. It is triggered by the CI
bot, but we regularly run out of credits.
Honnappa and Aaron are already discussing with Travis to be unblocked.
Arm is also working on a their own CI infrastructure (no ETA yet).
4/ Enhancing build system's developer mode
------------------------------------------
Discussion about adding more checks to the developer mode of the
build system (like code/doc consistency).
See https://git.dpdk.org/dpdk/commit/?id=bc4617433845
Independent scripts can already be added to the tree, like this one:
http://git.dpdk.org/dpdk/commit/devtools?id=947dff12bc
If these scripts are added to the developer mode build, they should only
be called when necessary (i.e. when files impacting the result are
modified). That way, the build stays fast when there is nothing to do.
The alternative is to add these checks to a checkpatch script (to be run
before patch submission instead of build).
5/ Feature announcement
-----------------------
We encourage companies and developers involved in DPDK to announce
their roadmap for next versions. It gives visibility to users, avoids
people to blindly work on the same features, helps to plan how much time
is needed for integration and review, and to check that nothing is
forgotten.
The techboard decided that patches for features announced earlier in the
roadmap have a priority bonus for integration, all other things being
equal (patch quality, submission date, ...)
Action on Thomas to integrate this in the documentation.
6/ ABI stability period
-----------------------
At next meeting, we would like to discuss the extension of the ABI
stability period. The meeting could be dedicated to this discussion.
7/ Examples to remove
---------------------
AR for everyone: check if examples should be removed (one was mentionned
during the meeting: examples/performance-thread).
^ permalink raw reply [relevance 4%]
* Re: [dpdk-dev] [RFC PATCH 0/3] Add PIE support for HQoS library
2021-05-24 10:58 3% [dpdk-dev] [RFC PATCH 0/3] Add PIE support for HQoS library Liguzinski, WojciechX
2021-05-24 16:19 0% ` Stephen Hemminger
@ 2021-05-25 8:56 0% ` Morten Brørup
1 sibling, 0 replies; 200+ results
From: Morten Brørup @ 2021-05-25 8:56 UTC (permalink / raw)
To: Liguzinski, WojciechX, dev, jasvinder.singh, cristian.dumitrescu
Cc: savinay.dharmappa
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Liguzinski,
> WojciechX
> Sent: Monday, 24 May 2021 12.58
>
> DPDK sched library is equipped with mechanism that secures it from the
> bufferbloat problem
> which is a situation when excess buffers in the network cause high
> latency and latency
> variation. Currently, it supports RED for queue congestion control
The correct term is "active queue management", not "queue congestion control".
> (which is designed
> to control the queue length but it does not control latency directly
> and is now being
> obsoleted ).
Some might prefer other algorithms, such as PIE, CoDel, CAKE, etc., but RED is not obsolete!
> However, more advanced queue management is required to
> address this problem
> and provide desirable quality of service to users.
>
> This solution (RFC) proposes usage of new algorithm called "PIE"
> (Proportional Integral
> controller Enhanced) that can effectively and directly control queuing
> latency to address
> the bufferbloat problem.
>
> The implementation of mentioned functionality includes modification of
> existing and
> adding a new set of data structures to the library, adding PIE related
> APIs.
> This affects structures in public API/ABI. That is why deprecation
> notice is going
> to be prepared and sent.
>
>
> Liguzinski, WojciechX (3):
> sched: add pie based congestion management
> example/qos_sched: add pie support
> example/ip_pipeline: add pie support
It's "PIE", not "pie". :-)
Nonetheless, the RFC looks good!
-Morten
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [RFC PATCH 0/3] Add PIE support for HQoS library
2021-05-24 10:58 3% [dpdk-dev] [RFC PATCH 0/3] Add PIE support for HQoS library Liguzinski, WojciechX
@ 2021-05-24 16:19 0% ` Stephen Hemminger
2021-05-25 8:56 0% ` Morten Brørup
1 sibling, 0 replies; 200+ results
From: Stephen Hemminger @ 2021-05-24 16:19 UTC (permalink / raw)
To: Liguzinski, WojciechX
Cc: dev, jasvinder.singh, cristian.dumitrescu, savinay.dharmappa
On Mon, 24 May 2021 11:58:19 +0100
"Liguzinski, WojciechX" <wojciechx.liguzinski@intel.com> wrote:
> DPDK sched library is equipped with mechanism that secures it from the bufferbloat problem
> which is a situation when excess buffers in the network cause high latency and latency
> variation. Currently, it supports RED for queue congestion control (which is designed
> to control the queue length but it does not control latency directly and is now being
> obsoleted ). However, more advanced queue management is required to address this problem
> and provide desirable quality of service to users.
>
> This solution (RFC) proposes usage of new algorithm called "PIE" (Proportional Integral
> controller Enhanced) that can effectively and directly control queuing latency to address
> the bufferbloat problem.
>
> The implementation of mentioned functionality includes modification of existing and
> adding a new set of data structures to the library, adding PIE related APIs.
> This affects structures in public API/ABI. That is why deprecation notice is going
> to be prepared and sent.
>
>
> Liguzinski, WojciechX (3):
> sched: add pie based congestion management
> example/qos_sched: add pie support
> example/ip_pipeline: add pie support
>
> config/rte_config.h | 1 -
> drivers/net/softnic/rte_eth_softnic_tm.c | 4 +-
> examples/ip_pipeline/tmgr.c | 4 +-
> examples/qos_sched/app_thread.c | 1 -
> examples/qos_sched/cfg_file.c | 82 +++++++--
> examples/qos_sched/init.c | 5 +-
> examples/qos_sched/profile.cfg | 196 +++++++++++++-------
> lib/sched/meson.build | 10 +-
> lib/sched/rte_sched.c | 220 +++++++++++++++++------
> lib/sched/rte_sched.h | 53 ++++--
> 10 files changed, 411 insertions(+), 165 deletions(-)
What about FQ codel which is more widely deployed, has less configuration?
^ permalink raw reply [relevance 0%]
* [dpdk-dev] [PATCH v4 1/3] common/sfc_efx/base: update MCDI headers
@ 2021-05-24 11:48 1% ` Ivan Malov
0 siblings, 0 replies; 200+ results
From: Ivan Malov @ 2021-05-24 11:48 UTC (permalink / raw)
To: dev; +Cc: Ray Kinsella, Ferruh Yigit, Andrew Rybchenko
From: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
---
drivers/common/sfc_efx/base/efx_regs_mcdi.h | 3532 +++++++++++++++--
.../common/sfc_efx/base/efx_regs_mcdi_aoe.h | 142 +-
.../common/sfc_efx/base/efx_regs_mcdi_strs.h | 2 +-
3 files changed, 3331 insertions(+), 345 deletions(-)
diff --git a/drivers/common/sfc_efx/base/efx_regs_mcdi.h b/drivers/common/sfc_efx/base/efx_regs_mcdi.h
index 976db37d6..a3c9f076e 100644
--- a/drivers/common/sfc_efx/base/efx_regs_mcdi.h
+++ b/drivers/common/sfc_efx/base/efx_regs_mcdi.h
@@ -6,7 +6,7 @@
/*
* This file is automatically generated. DO NOT EDIT IT.
- * To make changes, edit the .yml files in sfregistry under doc/mcdi/ and
+ * To make changes, edit the .yml files in smartnic_registry under doc/mcdi/ and
* rebuild this file with "make mcdi_headers_v5".
*/
@@ -410,6 +410,48 @@
#define MC_CMD_RESOURCE_INSTANCE_ANY 0xffffffff
#define MC_CMD_RESOURCE_INSTANCE_NONE 0xfffffffe /* enum */
+/* MC_CMD_FPGA_FLASH_INDEX enum */
+#define MC_CMD_FPGA_FLASH_PRIMARY 0x0 /* enum */
+#define MC_CMD_FPGA_FLASH_SECONDARY 0x1 /* enum */
+
+/* MC_CMD_EXTERNAL_MAE_LINK_MODE enum */
+/* enum: Legacy mode as described in XN-200039-TC. */
+#define MC_CMD_EXTERNAL_MAE_LINK_MODE_LEGACY 0x0
+/* enum: Switchdev mode as described in XN-200039-TC. */
+#define MC_CMD_EXTERNAL_MAE_LINK_MODE_SWITCHDEV 0x1
+/* enum: Bootstrap mode as described in XN-200039-TC. */
+#define MC_CMD_EXTERNAL_MAE_LINK_MODE_BOOTSTRAP 0x2
+/* enum: Link-mode change is in-progress as described in XN-200039-TC. */
+#define MC_CMD_EXTERNAL_MAE_LINK_MODE_PENDING 0xf
+
+/* PCIE_INTERFACE enum: From EF100 onwards, SFC products can have multiple PCIe
+ * interfaces. There is a need to refer to interfaces explicitly from drivers
+ * (for example, a management driver on one interface administering a function
+ * on another interface). This enumeration provides stable identifiers to all
+ * interfaces present on a product. Product documentation will specify which
+ * interfaces exist and their associated identifier. In general, drivers,
+ * should not assign special meanings to specific values. Instead, behaviour
+ * should be determined by NIC configuration, which will identify interfaces
+ * where appropriate.
+ */
+/* enum: Primary host interfaces. Typically (i.e. for all known SFC products)
+ * the interface exposed on the edge connector (or form factor equivalent).
+ */
+#define PCIE_INTERFACE_HOST_PRIMARY 0x0
+/* enum: Riverhead and keystone products have a second PCIe interface to which
+ * an on-NIC ARM module is expected to be connected.
+ */
+#define PCIE_INTERFACE_NIC_EMBEDDED 0x1
+/* enum: For MCDI commands issued over a PCIe interface, this value is
+ * translated into the interface over which the command was issued. Not
+ * meaningful for other MCDI transports.
+ */
+#define PCIE_INTERFACE_CALLER 0xffffffff
+
+/* MC_CLIENT_ID_SPECIFIER enum */
+/* enum: Equivalent to the caller's client ID */
+#define MC_CMD_CLIENT_ID_SELF 0xffffffff
+
/* MAE_FIELD_SUPPORT_STATUS enum */
/* enum: The NIC does not support this field. The driver must ensure that any
* mask associated with this field in a match rule is zeroed. The NIC may
@@ -470,6 +512,20 @@
#define MAE_FIELD_CT_PRIVATE_FLAGS 0x8
/* enum: 1 if the packet ingressed the NIC from one of the MACs, else 0. */
#define MAE_FIELD_IS_FROM_NETWORK 0x9
+/* enum: 1 if the packet has 1 or more VLAN tags, else 0. */
+#define MAE_FIELD_HAS_OVLAN 0xa
+/* enum: 1 if the packet has 2 or more VLAN tags, else 0. */
+#define MAE_FIELD_HAS_IVLAN 0xb
+/* enum: 1 if the outer packet has 1 or more VLAN tags, else 0; only present
+ * when encap
+ */
+#define MAE_FIELD_ENC_HAS_OVLAN 0xc
+/* enum: 1 if the outer packet has 2 or more VLAN tags, else 0; only present
+ * when encap
+ */
+#define MAE_FIELD_ENC_HAS_IVLAN 0xd
+/* enum: Packet is IP fragment */
+#define MAE_FIELD_ENC_IP_FRAG 0xe
#define MAE_FIELD_ETHER_TYPE 0x21 /* enum */
#define MAE_FIELD_VLAN0_TCI 0x22 /* enum */
#define MAE_FIELD_VLAN0_PROTO 0x23 /* enum */
@@ -508,6 +564,10 @@
#define MAE_FIELD_L4_DPORT 0x33
/* enum: Inner when encap */
#define MAE_FIELD_TCP_FLAGS 0x34
+/* enum: TCP packet with any of SYN, FIN or RST flag set */
+#define MAE_FIELD_TCP_SYN_FIN_RST 0x35
+/* enum: Packet is IP fragment with fragment offset 0 */
+#define MAE_FIELD_IP_FIRST_FRAG 0x36
/* enum: The type of encapsulated used for this packet. Value as per
* ENCAP_TYPE_*.
*/
@@ -550,8 +610,8 @@
#define MAE_FIELD_ENC_L4_SPORT 0x52
/* enum: Outer; only present when encap */
#define MAE_FIELD_ENC_L4_DPORT 0x53
-/* enum: VNI (when VXLAN or GENEVE) VSID (when NVGRE) Outer; only present when
- * encap
+/* enum: VNI (when VXLAN or GENEVE) VSID (when NVGRE) Bottom 24 bits of Key
+ * (when L2GRE) Outer; only present when encap
*/
#define MAE_FIELD_ENC_VNET_ID 0x54
@@ -566,6 +626,14 @@
#define MAE_MCDI_ENCAP_TYPE_GENEVE 0x3 /* enum */
#define MAE_MCDI_ENCAP_TYPE_L2GRE 0x4 /* enum */
+/* MAE_MPORT_END enum: Selects which end of the logical link identified by an
+ * MPORT_SELECTOR is targeted by an operation.
+ */
+/* enum: Selects the port on the MAE virtual switch */
+#define MAE_MPORT_END_MAE 0x1
+/* enum: Selects the virtual NIC plugged into the MAE switch */
+#define MAE_MPORT_END_VNIC 0x2
+
/* MCDI_EVENT structuredef: The structure of an MCDI_EVENT on Siena/EF10/EF100
* platforms
*/
@@ -647,17 +715,21 @@
#define MCDI_EVENT_TX_ERR_TYPE_OFST 0
#define MCDI_EVENT_TX_ERR_TYPE_LBN 12
#define MCDI_EVENT_TX_ERR_TYPE_WIDTH 4
-/* enum: Descriptor loader reported failure */
+/* enum: Descriptor loader reported failure. Specific to EF10-family NICs. */
#define MCDI_EVENT_TX_ERR_DL_FAIL 0x1
-/* enum: Descriptor ring empty and no EOP seen for packet */
+/* enum: Descriptor ring empty and no EOP seen for packet. Specific to
+ * EF10-family NICs
+ */
#define MCDI_EVENT_TX_ERR_NO_EOP 0x2
-/* enum: Overlength packet */
+/* enum: Overlength packet. Specific to EF10-family NICs. */
#define MCDI_EVENT_TX_ERR_2BIG 0x3
-/* enum: Malformed option descriptor */
+/* enum: Malformed option descriptor. Specific to EF10-family NICs. */
#define MCDI_EVENT_TX_BAD_OPTDESC 0x5
-/* enum: Option descriptor part way through a packet */
+/* enum: Option descriptor part way through a packet. Specific to EF10-family
+ * NICs.
+ */
#define MCDI_EVENT_TX_OPT_IN_PKT 0x8
-/* enum: DMA or PIO data access error */
+/* enum: DMA or PIO data access error. Specific to EF10-family NICs */
#define MCDI_EVENT_TX_ERR_BAD_DMA_OR_PIO 0x9
#define MCDI_EVENT_TX_ERR_INFO_OFST 0
#define MCDI_EVENT_TX_ERR_INFO_LBN 16
@@ -1270,7 +1342,13 @@
#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_OFST 8
#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LEN 8
#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LO_OFST 8
+#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LO_LEN 4
+#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LO_LBN 64
+#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LO_WIDTH 32
#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_HI_OFST 12
+#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_HI_LEN 4
+#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_HI_LBN 96
+#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_HI_WIDTH 32
#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_MINNUM 1
#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_MAXNUM 30
#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_MAXNUM_MCDI2 126
@@ -1384,6 +1462,7 @@
* has additional checks to reject insecure calls.
*/
#define MC_CMD_READ32 0x1
+#define MC_CMD_READ32_MSGSET 0x1
#undef MC_CMD_0x1_PRIVILEGE_CTG
#define MC_CMD_0x1_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -1413,6 +1492,7 @@
* Write multiple 32byte words to MC memory.
*/
#define MC_CMD_WRITE32 0x2
+#define MC_CMD_WRITE32_MSGSET 0x2
#undef MC_CMD_0x2_PRIVILEGE_CTG
#define MC_CMD_0x2_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -1442,6 +1522,7 @@
* has additional checks to reject insecure calls.
*/
#define MC_CMD_COPYCODE 0x3
+#define MC_CMD_COPYCODE_MSGSET 0x3
#undef MC_CMD_0x3_PRIVILEGE_CTG
#define MC_CMD_0x3_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -1505,6 +1586,7 @@
* Select function for function-specific commands.
*/
#define MC_CMD_SET_FUNC 0x4
+#define MC_CMD_SET_FUNC_MSGSET 0x4
#undef MC_CMD_0x4_PRIVILEGE_CTG
#define MC_CMD_0x4_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -1524,6 +1606,7 @@
* Get the instruction address from which the MC booted.
*/
#define MC_CMD_GET_BOOT_STATUS 0x5
+#define MC_CMD_GET_BOOT_STATUS_MSGSET 0x5
#undef MC_CMD_0x5_PRIVILEGE_CTG
#define MC_CMD_0x5_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -1558,6 +1641,7 @@
* fields will only be present if OUT.GLOBAL_FLAGS != NO_FAILS
*/
#define MC_CMD_GET_ASSERTS 0x6
+#define MC_CMD_GET_ASSERTS_MSGSET 0x6
#undef MC_CMD_0x6_PRIVILEGE_CTG
#define MC_CMD_0x6_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -1682,12 +1766,24 @@
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_OFST 260
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_LEN 8
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_LO_OFST 260
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_LO_LEN 4
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_LO_LBN 2080
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_LO_WIDTH 32
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_HI_OFST 264
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_HI_LEN 4
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_HI_LBN 2112
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_HI_WIDTH 32
/* MC firmware version number */
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_OFST 268
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_LEN 8
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_LO_OFST 268
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_LO_LEN 4
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_LO_LBN 2144
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_LO_WIDTH 32
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_HI_OFST 272
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_HI_LEN 4
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_HI_LBN 2176
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_HI_WIDTH 32
/* MC firmware security level */
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_SECURITY_LEVEL_OFST 276
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_SECURITY_LEVEL_LEN 4
@@ -1705,6 +1801,7 @@
* sensor notifications and MCDI completions
*/
#define MC_CMD_LOG_CTRL 0x7
+#define MC_CMD_LOG_CTRL_MSGSET 0x7
#undef MC_CMD_0x7_PRIVILEGE_CTG
#define MC_CMD_0x7_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -1731,6 +1828,7 @@
* Get version information about adapter components.
*/
#define MC_CMD_GET_VERSION 0x8
+#define MC_CMD_GET_VERSION_MSGSET 0x8
#undef MC_CMD_0x8_PRIVILEGE_CTG
#define MC_CMD_0x8_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -1771,7 +1869,13 @@
#define MC_CMD_GET_VERSION_OUT_VERSION_OFST 24
#define MC_CMD_GET_VERSION_OUT_VERSION_LEN 8
#define MC_CMD_GET_VERSION_OUT_VERSION_LO_OFST 24
+#define MC_CMD_GET_VERSION_OUT_VERSION_LO_LEN 4
+#define MC_CMD_GET_VERSION_OUT_VERSION_LO_LBN 192
+#define MC_CMD_GET_VERSION_OUT_VERSION_LO_WIDTH 32
#define MC_CMD_GET_VERSION_OUT_VERSION_HI_OFST 28
+#define MC_CMD_GET_VERSION_OUT_VERSION_HI_LEN 4
+#define MC_CMD_GET_VERSION_OUT_VERSION_HI_LBN 224
+#define MC_CMD_GET_VERSION_OUT_VERSION_HI_WIDTH 32
/* MC_CMD_GET_VERSION_EXT_OUT msgresponse */
#define MC_CMD_GET_VERSION_EXT_OUT_LEN 48
@@ -1787,7 +1891,13 @@
#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_OFST 24
#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_LEN 8
#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_LO_OFST 24
+#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_LO_LEN 4
+#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_LO_LBN 192
+#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_LO_WIDTH 32
#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_HI_OFST 28
+#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_HI_LEN 4
+#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_HI_LBN 224
+#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_HI_WIDTH 32
/* extra info */
#define MC_CMD_GET_VERSION_EXT_OUT_EXTRA_OFST 32
#define MC_CMD_GET_VERSION_EXT_OUT_EXTRA_LEN 16
@@ -1811,7 +1921,13 @@
#define MC_CMD_GET_VERSION_V2_OUT_VERSION_OFST 24
#define MC_CMD_GET_VERSION_V2_OUT_VERSION_LEN 8
#define MC_CMD_GET_VERSION_V2_OUT_VERSION_LO_OFST 24
+#define MC_CMD_GET_VERSION_V2_OUT_VERSION_LO_LEN 4
+#define MC_CMD_GET_VERSION_V2_OUT_VERSION_LO_LBN 192
+#define MC_CMD_GET_VERSION_V2_OUT_VERSION_LO_WIDTH 32
#define MC_CMD_GET_VERSION_V2_OUT_VERSION_HI_OFST 28
+#define MC_CMD_GET_VERSION_V2_OUT_VERSION_HI_LEN 4
+#define MC_CMD_GET_VERSION_V2_OUT_VERSION_HI_LBN 224
+#define MC_CMD_GET_VERSION_V2_OUT_VERSION_HI_WIDTH 32
/* extra info */
#define MC_CMD_GET_VERSION_V2_OUT_EXTRA_OFST 32
#define MC_CMD_GET_VERSION_V2_OUT_EXTRA_LEN 16
@@ -1833,6 +1949,33 @@
#define MC_CMD_GET_VERSION_V2_OUT_BOARD_EXT_INFO_PRESENT_OFST 48
#define MC_CMD_GET_VERSION_V2_OUT_BOARD_EXT_INFO_PRESENT_LBN 4
#define MC_CMD_GET_VERSION_V2_OUT_BOARD_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_DATAPATH_HW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_DATAPATH_HW_VERSION_PRESENT_LBN 5
+#define MC_CMD_GET_VERSION_V2_OUT_DATAPATH_HW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_DATAPATH_FW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_DATAPATH_FW_VERSION_PRESENT_LBN 6
+#define MC_CMD_GET_VERSION_V2_OUT_DATAPATH_FW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_BOOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_BOOT_VERSION_PRESENT_LBN 7
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_BOOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_UBOOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_UBOOT_VERSION_PRESENT_LBN 8
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_UBOOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_LBN 9
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_LBN 10
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_VERSION_PRESENT_LBN 11
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_BOARD_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_BOARD_VERSION_PRESENT_LBN 12
+#define MC_CMD_GET_VERSION_V2_OUT_BOARD_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_BUNDLE_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_BUNDLE_VERSION_PRESENT_LBN 13
+#define MC_CMD_GET_VERSION_V2_OUT_BUNDLE_VERSION_PRESENT_WIDTH 1
/* MC firmware unique build ID (as binary SHA-1 value) */
#define MC_CMD_GET_VERSION_V2_OUT_MCFW_BUILD_ID_OFST 52
#define MC_CMD_GET_VERSION_V2_OUT_MCFW_BUILD_ID_LEN 20
@@ -1850,7 +1993,13 @@
#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_OFST 156
#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_LEN 8
#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_LO_OFST 156
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_LO_LEN 4
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_LO_LBN 1248
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_LO_WIDTH 32
#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_HI_OFST 160
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_HI_LEN 4
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_HI_LBN 1280
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_HI_WIDTH 32
/* The ID of the SUC chip. This is specific to the platform but typically
* indicates family, memory sizes etc. See SF-116728-SW for further details.
*/
@@ -1864,7 +2013,13 @@
#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_OFST 184
#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_LEN 8
#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_LO_OFST 184
+#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_LO_LEN 4
+#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_LO_LBN 1472
+#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_LO_WIDTH 32
#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_HI_OFST 188
+#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_HI_LEN 4
+#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_HI_LBN 1504
+#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_HI_WIDTH 32
/* FPGA version as three numbers. On Riverhead based systems this field uses
* the same encoding as hardware version ID registers (MC_FPGA_BUILD_HWRD_REG):
* FPGA_VERSION[0]: x => Image H{x} FPGA_VERSION[1]: Revision letter (0 => A, 1
@@ -1886,12 +2041,496 @@
#define MC_CMD_GET_VERSION_V2_OUT_BOARD_SERIAL_OFST 240
#define MC_CMD_GET_VERSION_V2_OUT_BOARD_SERIAL_LEN 64
+/* MC_CMD_GET_VERSION_V3_OUT msgresponse: Extended response providing version
+ * information for all adapter components. For Riverhead based designs, base MC
+ * firmware version fields refer to NMC firmware, while CMC firmware data is in
+ * dedicated CMC fields. Flags indicate which data is present in the response
+ * (depending on which components exist on a particular adapter)
+ */
+#define MC_CMD_GET_VERSION_V3_OUT_LEN 328
+/* MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */
+/* MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */
+/* Enum values, see field(s): */
+/* MC_CMD_GET_VERSION_V0_OUT/MC_CMD_GET_VERSION_OUT_FIRMWARE */
+#define MC_CMD_GET_VERSION_V3_OUT_PCOL_OFST 4
+#define MC_CMD_GET_VERSION_V3_OUT_PCOL_LEN 4
+/* 128bit mask of functions supported by the current firmware */
+#define MC_CMD_GET_VERSION_V3_OUT_SUPPORTED_FUNCS_OFST 8
+#define MC_CMD_GET_VERSION_V3_OUT_SUPPORTED_FUNCS_LEN 16
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_OFST 24
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_LEN 8
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_LO_OFST 24
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_LO_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_LO_LBN 192
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_HI_OFST 28
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_HI_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_HI_LBN 224
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_HI_WIDTH 32
+/* extra info */
+#define MC_CMD_GET_VERSION_V3_OUT_EXTRA_OFST 32
+#define MC_CMD_GET_VERSION_V3_OUT_EXTRA_LEN 16
+/* Flags indicating which extended fields are valid */
+#define MC_CMD_GET_VERSION_V3_OUT_FLAGS_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_FLAGS_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_EXT_INFO_PRESENT_LBN 0
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_EXT_INFO_PRESENT_LBN 1
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_CMC_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_CMC_EXT_INFO_PRESENT_LBN 2
+#define MC_CMD_GET_VERSION_V3_OUT_CMC_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_FPGA_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_FPGA_EXT_INFO_PRESENT_LBN 3
+#define MC_CMD_GET_VERSION_V3_OUT_FPGA_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_EXT_INFO_PRESENT_LBN 4
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_HW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_HW_VERSION_PRESENT_LBN 5
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_HW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_FW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_FW_VERSION_PRESENT_LBN 6
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_FW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_BOOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_BOOT_VERSION_PRESENT_LBN 7
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_BOOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_UBOOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_UBOOT_VERSION_PRESENT_LBN 8
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_UBOOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_LBN 9
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_LBN 10
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_VERSION_PRESENT_LBN 11
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_VERSION_PRESENT_LBN 12
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_BUNDLE_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_BUNDLE_VERSION_PRESENT_LBN 13
+#define MC_CMD_GET_VERSION_V3_OUT_BUNDLE_VERSION_PRESENT_WIDTH 1
+/* MC firmware unique build ID (as binary SHA-1 value) */
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_BUILD_ID_OFST 52
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_BUILD_ID_LEN 20
+/* MC firmware security level */
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_SECURITY_LEVEL_OFST 72
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_SECURITY_LEVEL_LEN 4
+/* MC firmware build name (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_BUILD_NAME_OFST 76
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_BUILD_NAME_LEN 64
+/* The SUC firmware version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_VERSION_OFST 140
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_VERSION_NUM 4
+/* SUC firmware build date (as 64-bit Unix timestamp) */
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_OFST 156
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_LEN 8
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_LO_OFST 156
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_LO_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_LO_LBN 1248
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_HI_OFST 160
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_HI_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_HI_LBN 1280
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_HI_WIDTH 32
+/* The ID of the SUC chip. This is specific to the platform but typically
+ * indicates family, memory sizes etc. See SF-116728-SW for further details.
+ */
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_CHIP_ID_OFST 164
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_CHIP_ID_LEN 4
+/* The CMC firmware version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_VERSION_OFST 168
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_VERSION_NUM 4
+/* CMC firmware build date (as 64-bit Unix timestamp) */
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_OFST 184
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_LEN 8
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_LO_OFST 184
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_LO_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_LO_LBN 1472
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_HI_OFST 188
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_HI_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_HI_LBN 1504
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_HI_WIDTH 32
+/* FPGA version as three numbers. On Riverhead based systems this field uses
+ * the same encoding as hardware version ID registers (MC_FPGA_BUILD_HWRD_REG):
+ * FPGA_VERSION[0]: x => Image H{x} FPGA_VERSION[1]: Revision letter (0 => A, 1
+ * => B, ...) FPGA_VERSION[2]: Sub-revision number
+ */
+#define MC_CMD_GET_VERSION_V3_OUT_FPGA_VERSION_OFST 192
+#define MC_CMD_GET_VERSION_V3_OUT_FPGA_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_FPGA_VERSION_NUM 3
+/* Extra FPGA revision information (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V3_OUT_FPGA_EXTRA_OFST 204
+#define MC_CMD_GET_VERSION_V3_OUT_FPGA_EXTRA_LEN 16
+/* Board name / adapter model (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_NAME_OFST 220
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_NAME_LEN 16
+/* Board revision number */
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_REVISION_OFST 236
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_REVISION_LEN 4
+/* Board serial number (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_SERIAL_OFST 240
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_SERIAL_LEN 64
+/* The version of the datapath hardware design as three number - a.b.c */
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_HW_VERSION_OFST 304
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_HW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_HW_VERSION_NUM 3
+/* The version of the firmware library used to control the datapath as three
+ * number - a.b.c
+ */
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_FW_VERSION_OFST 316
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_FW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_FW_VERSION_NUM 3
+
+/* MC_CMD_GET_VERSION_V4_OUT msgresponse: Extended response providing SoC
+ * version information
+ */
+#define MC_CMD_GET_VERSION_V4_OUT_LEN 392
+/* MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */
+/* MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */
+/* Enum values, see field(s): */
+/* MC_CMD_GET_VERSION_V0_OUT/MC_CMD_GET_VERSION_OUT_FIRMWARE */
+#define MC_CMD_GET_VERSION_V4_OUT_PCOL_OFST 4
+#define MC_CMD_GET_VERSION_V4_OUT_PCOL_LEN 4
+/* 128bit mask of functions supported by the current firmware */
+#define MC_CMD_GET_VERSION_V4_OUT_SUPPORTED_FUNCS_OFST 8
+#define MC_CMD_GET_VERSION_V4_OUT_SUPPORTED_FUNCS_LEN 16
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_OFST 24
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_LEN 8
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_LO_OFST 24
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_LO_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_LO_LBN 192
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_HI_OFST 28
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_HI_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_HI_LBN 224
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_HI_WIDTH 32
+/* extra info */
+#define MC_CMD_GET_VERSION_V4_OUT_EXTRA_OFST 32
+#define MC_CMD_GET_VERSION_V4_OUT_EXTRA_LEN 16
+/* Flags indicating which extended fields are valid */
+#define MC_CMD_GET_VERSION_V4_OUT_FLAGS_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_FLAGS_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_EXT_INFO_PRESENT_LBN 0
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_EXT_INFO_PRESENT_LBN 1
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_CMC_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_CMC_EXT_INFO_PRESENT_LBN 2
+#define MC_CMD_GET_VERSION_V4_OUT_CMC_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_FPGA_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_FPGA_EXT_INFO_PRESENT_LBN 3
+#define MC_CMD_GET_VERSION_V4_OUT_FPGA_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_EXT_INFO_PRESENT_LBN 4
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_HW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_HW_VERSION_PRESENT_LBN 5
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_HW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_FW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_FW_VERSION_PRESENT_LBN 6
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_FW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_BOOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_BOOT_VERSION_PRESENT_LBN 7
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_BOOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_UBOOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_UBOOT_VERSION_PRESENT_LBN 8
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_UBOOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_LBN 9
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_LBN 10
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_VERSION_PRESENT_LBN 11
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_VERSION_PRESENT_LBN 12
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_BUNDLE_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_BUNDLE_VERSION_PRESENT_LBN 13
+#define MC_CMD_GET_VERSION_V4_OUT_BUNDLE_VERSION_PRESENT_WIDTH 1
+/* MC firmware unique build ID (as binary SHA-1 value) */
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_BUILD_ID_OFST 52
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_BUILD_ID_LEN 20
+/* MC firmware security level */
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_SECURITY_LEVEL_OFST 72
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_SECURITY_LEVEL_LEN 4
+/* MC firmware build name (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_BUILD_NAME_OFST 76
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_BUILD_NAME_LEN 64
+/* The SUC firmware version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_VERSION_OFST 140
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_VERSION_NUM 4
+/* SUC firmware build date (as 64-bit Unix timestamp) */
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_OFST 156
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_LEN 8
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_LO_OFST 156
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_LO_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_LO_LBN 1248
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_HI_OFST 160
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_HI_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_HI_LBN 1280
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_HI_WIDTH 32
+/* The ID of the SUC chip. This is specific to the platform but typically
+ * indicates family, memory sizes etc. See SF-116728-SW for further details.
+ */
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_CHIP_ID_OFST 164
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_CHIP_ID_LEN 4
+/* The CMC firmware version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_VERSION_OFST 168
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_VERSION_NUM 4
+/* CMC firmware build date (as 64-bit Unix timestamp) */
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_OFST 184
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_LEN 8
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_LO_OFST 184
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_LO_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_LO_LBN 1472
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_HI_OFST 188
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_HI_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_HI_LBN 1504
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_HI_WIDTH 32
+/* FPGA version as three numbers. On Riverhead based systems this field uses
+ * the same encoding as hardware version ID registers (MC_FPGA_BUILD_HWRD_REG):
+ * FPGA_VERSION[0]: x => Image H{x} FPGA_VERSION[1]: Revision letter (0 => A, 1
+ * => B, ...) FPGA_VERSION[2]: Sub-revision number
+ */
+#define MC_CMD_GET_VERSION_V4_OUT_FPGA_VERSION_OFST 192
+#define MC_CMD_GET_VERSION_V4_OUT_FPGA_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_FPGA_VERSION_NUM 3
+/* Extra FPGA revision information (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V4_OUT_FPGA_EXTRA_OFST 204
+#define MC_CMD_GET_VERSION_V4_OUT_FPGA_EXTRA_LEN 16
+/* Board name / adapter model (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_NAME_OFST 220
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_NAME_LEN 16
+/* Board revision number */
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_REVISION_OFST 236
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_REVISION_LEN 4
+/* Board serial number (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_SERIAL_OFST 240
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_SERIAL_LEN 64
+/* The version of the datapath hardware design as three number - a.b.c */
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_HW_VERSION_OFST 304
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_HW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_HW_VERSION_NUM 3
+/* The version of the firmware library used to control the datapath as three
+ * number - a.b.c
+ */
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_FW_VERSION_OFST 316
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_FW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_FW_VERSION_NUM 3
+/* The SOC boot version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_BOOT_VERSION_OFST 328
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_BOOT_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_BOOT_VERSION_NUM 4
+/* The SOC uboot version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_UBOOT_VERSION_OFST 344
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_UBOOT_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_UBOOT_VERSION_NUM 4
+/* The SOC main rootfs version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_MAIN_ROOTFS_VERSION_OFST 360
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_MAIN_ROOTFS_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_MAIN_ROOTFS_VERSION_NUM 4
+/* The SOC recovery buildroot version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_RECOVERY_BUILDROOT_VERSION_OFST 376
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_RECOVERY_BUILDROOT_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_RECOVERY_BUILDROOT_VERSION_NUM 4
+
+/* MC_CMD_GET_VERSION_V5_OUT msgresponse: Extended response providing bundle
+ * and board version information
+ */
+#define MC_CMD_GET_VERSION_V5_OUT_LEN 424
+/* MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */
+/* MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */
+/* Enum values, see field(s): */
+/* MC_CMD_GET_VERSION_V0_OUT/MC_CMD_GET_VERSION_OUT_FIRMWARE */
+#define MC_CMD_GET_VERSION_V5_OUT_PCOL_OFST 4
+#define MC_CMD_GET_VERSION_V5_OUT_PCOL_LEN 4
+/* 128bit mask of functions supported by the current firmware */
+#define MC_CMD_GET_VERSION_V5_OUT_SUPPORTED_FUNCS_OFST 8
+#define MC_CMD_GET_VERSION_V5_OUT_SUPPORTED_FUNCS_LEN 16
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_OFST 24
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_LEN 8
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_LO_OFST 24
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_LO_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_LO_LBN 192
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_HI_OFST 28
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_HI_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_HI_LBN 224
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_HI_WIDTH 32
+/* extra info */
+#define MC_CMD_GET_VERSION_V5_OUT_EXTRA_OFST 32
+#define MC_CMD_GET_VERSION_V5_OUT_EXTRA_LEN 16
+/* Flags indicating which extended fields are valid */
+#define MC_CMD_GET_VERSION_V5_OUT_FLAGS_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_FLAGS_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_EXT_INFO_PRESENT_LBN 0
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_EXT_INFO_PRESENT_LBN 1
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_CMC_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_CMC_EXT_INFO_PRESENT_LBN 2
+#define MC_CMD_GET_VERSION_V5_OUT_CMC_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_FPGA_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_FPGA_EXT_INFO_PRESENT_LBN 3
+#define MC_CMD_GET_VERSION_V5_OUT_FPGA_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_EXT_INFO_PRESENT_LBN 4
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_HW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_HW_VERSION_PRESENT_LBN 5
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_HW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_FW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_FW_VERSION_PRESENT_LBN 6
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_FW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_BOOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_BOOT_VERSION_PRESENT_LBN 7
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_BOOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_UBOOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_UBOOT_VERSION_PRESENT_LBN 8
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_UBOOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_LBN 9
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_LBN 10
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_VERSION_PRESENT_LBN 11
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_VERSION_PRESENT_LBN 12
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_BUNDLE_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_BUNDLE_VERSION_PRESENT_LBN 13
+#define MC_CMD_GET_VERSION_V5_OUT_BUNDLE_VERSION_PRESENT_WIDTH 1
+/* MC firmware unique build ID (as binary SHA-1 value) */
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_BUILD_ID_OFST 52
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_BUILD_ID_LEN 20
+/* MC firmware security level */
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_SECURITY_LEVEL_OFST 72
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_SECURITY_LEVEL_LEN 4
+/* MC firmware build name (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_BUILD_NAME_OFST 76
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_BUILD_NAME_LEN 64
+/* The SUC firmware version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_VERSION_OFST 140
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_VERSION_NUM 4
+/* SUC firmware build date (as 64-bit Unix timestamp) */
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_OFST 156
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_LEN 8
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_LO_OFST 156
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_LO_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_LO_LBN 1248
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_HI_OFST 160
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_HI_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_HI_LBN 1280
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_HI_WIDTH 32
+/* The ID of the SUC chip. This is specific to the platform but typically
+ * indicates family, memory sizes etc. See SF-116728-SW for further details.
+ */
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_CHIP_ID_OFST 164
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_CHIP_ID_LEN 4
+/* The CMC firmware version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_VERSION_OFST 168
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_VERSION_NUM 4
+/* CMC firmware build date (as 64-bit Unix timestamp) */
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_OFST 184
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_LEN 8
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_LO_OFST 184
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_LO_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_LO_LBN 1472
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_HI_OFST 188
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_HI_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_HI_LBN 1504
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_HI_WIDTH 32
+/* FPGA version as three numbers. On Riverhead based systems this field uses
+ * the same encoding as hardware version ID registers (MC_FPGA_BUILD_HWRD_REG):
+ * FPGA_VERSION[0]: x => Image H{x} FPGA_VERSION[1]: Revision letter (0 => A, 1
+ * => B, ...) FPGA_VERSION[2]: Sub-revision number
+ */
+#define MC_CMD_GET_VERSION_V5_OUT_FPGA_VERSION_OFST 192
+#define MC_CMD_GET_VERSION_V5_OUT_FPGA_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_FPGA_VERSION_NUM 3
+/* Extra FPGA revision information (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V5_OUT_FPGA_EXTRA_OFST 204
+#define MC_CMD_GET_VERSION_V5_OUT_FPGA_EXTRA_LEN 16
+/* Board name / adapter model (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_NAME_OFST 220
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_NAME_LEN 16
+/* Board revision number */
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_REVISION_OFST 236
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_REVISION_LEN 4
+/* Board serial number (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_SERIAL_OFST 240
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_SERIAL_LEN 64
+/* The version of the datapath hardware design as three number - a.b.c */
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_HW_VERSION_OFST 304
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_HW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_HW_VERSION_NUM 3
+/* The version of the firmware library used to control the datapath as three
+ * number - a.b.c
+ */
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_FW_VERSION_OFST 316
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_FW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_FW_VERSION_NUM 3
+/* The SOC boot version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_BOOT_VERSION_OFST 328
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_BOOT_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_BOOT_VERSION_NUM 4
+/* The SOC uboot version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_UBOOT_VERSION_OFST 344
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_UBOOT_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_UBOOT_VERSION_NUM 4
+/* The SOC main rootfs version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_MAIN_ROOTFS_VERSION_OFST 360
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_MAIN_ROOTFS_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_MAIN_ROOTFS_VERSION_NUM 4
+/* The SOC recovery buildroot version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_RECOVERY_BUILDROOT_VERSION_OFST 376
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_RECOVERY_BUILDROOT_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_RECOVERY_BUILDROOT_VERSION_NUM 4
+/* Board version as four numbers - a.b.c.d. BOARD_VERSION[0] duplicates the
+ * BOARD_REVISION field
+ */
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_VERSION_OFST 392
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_VERSION_NUM 4
+/* Bundle version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V5_OUT_BUNDLE_VERSION_OFST 408
+#define MC_CMD_GET_VERSION_V5_OUT_BUNDLE_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_BUNDLE_VERSION_NUM 4
+
/***********************************/
/* MC_CMD_PTP
* Perform PTP operation
*/
#define MC_CMD_PTP 0xb
+#define MC_CMD_PTP_MSGSET 0xb
#undef MC_CMD_0xb_PRIVILEGE_CTG
#define MC_CMD_0xb_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -2066,7 +2705,13 @@
#define MC_CMD_PTP_IN_ADJUST_FREQ_OFST 8
#define MC_CMD_PTP_IN_ADJUST_FREQ_LEN 8
#define MC_CMD_PTP_IN_ADJUST_FREQ_LO_OFST 8
+#define MC_CMD_PTP_IN_ADJUST_FREQ_LO_LEN 4
+#define MC_CMD_PTP_IN_ADJUST_FREQ_LO_LBN 64
+#define MC_CMD_PTP_IN_ADJUST_FREQ_LO_WIDTH 32
#define MC_CMD_PTP_IN_ADJUST_FREQ_HI_OFST 12
+#define MC_CMD_PTP_IN_ADJUST_FREQ_HI_LEN 4
+#define MC_CMD_PTP_IN_ADJUST_FREQ_HI_LBN 96
+#define MC_CMD_PTP_IN_ADJUST_FREQ_HI_WIDTH 32
/* enum: Number of fractional bits in frequency adjustment */
#define MC_CMD_PTP_IN_ADJUST_BITS 0x28
/* enum: Number of fractional bits in frequency adjustment when FP44_FREQ_ADJ
@@ -2097,7 +2742,13 @@
#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_OFST 8
#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_LEN 8
#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_LO_OFST 8
+#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_LO_LEN 4
+#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_LO_LBN 64
+#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_LO_WIDTH 32
#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_HI_OFST 12
+#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_HI_LEN 4
+#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_HI_LBN 96
+#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_HI_WIDTH 32
/* enum: Number of fractional bits in frequency adjustment */
/* MC_CMD_PTP_IN_ADJUST_BITS 0x28 */
/* enum: Number of fractional bits in frequency adjustment when FP44_FREQ_ADJ
@@ -2136,7 +2787,13 @@
#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_OFST 12
#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_LEN 8
#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_LO_OFST 12
+#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_LO_LEN 4
+#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_LO_LBN 96
+#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_LO_WIDTH 32
#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_HI_OFST 16
+#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_HI_LEN 4
+#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_HI_LBN 128
+#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_HI_WIDTH 32
/* MC_CMD_PTP_IN_MANFTEST_BASIC msgrequest */
#define MC_CMD_PTP_IN_MANFTEST_BASIC_LEN 8
@@ -2252,7 +2909,13 @@
#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_OFST 8
#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_LEN 8
#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_LO_OFST 8
+#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_LO_LEN 4
+#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_LO_LBN 64
+#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_LO_WIDTH 32
#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_HI_OFST 12
+#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_HI_LEN 4
+#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_HI_LBN 96
+#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_HI_WIDTH 32
/* Enum values, see field(s): */
/* MC_CMD_PTP/MC_CMD_PTP_IN_ADJUST/FREQ */
@@ -2283,7 +2946,13 @@
#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_OFST 12
#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_LEN 8
#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_LO_OFST 12
+#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_LO_LEN 4
+#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_LO_LBN 96
+#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_LO_WIDTH 32
#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_HI_OFST 16
+#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_HI_LEN 4
+#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_HI_LBN 128
+#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_HI_WIDTH 32
/* MC_CMD_PTP_IN_RX_SET_DOMAIN_FILTER msgrequest */
#define MC_CMD_PTP_IN_RX_SET_DOMAIN_FILTER_LEN 16
@@ -2745,6 +3414,7 @@
* Read 32bit words from the indirect memory map.
*/
#define MC_CMD_CSR_READ32 0xc
+#define MC_CMD_CSR_READ32_MSGSET 0xc
#undef MC_CMD_0xc_PRIVILEGE_CTG
#define MC_CMD_0xc_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -2778,6 +3448,7 @@
* Write 32bit dwords to the indirect memory map.
*/
#define MC_CMD_CSR_WRITE32 0xd
+#define MC_CMD_CSR_WRITE32_MSGSET 0xd
#undef MC_CMD_0xd_PRIVILEGE_CTG
#define MC_CMD_0xd_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -2811,6 +3482,7 @@
* MCDI command to avoid creating too many MCDI commands.
*/
#define MC_CMD_HP 0x54
+#define MC_CMD_HP_MSGSET 0x54
#undef MC_CMD_0x54_PRIVILEGE_CTG
#define MC_CMD_0x54_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -2834,7 +3506,13 @@
#define MC_CMD_HP_IN_OCSD_ADDR_OFST 4
#define MC_CMD_HP_IN_OCSD_ADDR_LEN 8
#define MC_CMD_HP_IN_OCSD_ADDR_LO_OFST 4
+#define MC_CMD_HP_IN_OCSD_ADDR_LO_LEN 4
+#define MC_CMD_HP_IN_OCSD_ADDR_LO_LBN 32
+#define MC_CMD_HP_IN_OCSD_ADDR_LO_WIDTH 32
#define MC_CMD_HP_IN_OCSD_ADDR_HI_OFST 8
+#define MC_CMD_HP_IN_OCSD_ADDR_HI_LEN 4
+#define MC_CMD_HP_IN_OCSD_ADDR_HI_LBN 64
+#define MC_CMD_HP_IN_OCSD_ADDR_HI_WIDTH 32
/* The requested update interval, in seconds. (Or the sub-command if ADDR is
* NULL.)
*/
@@ -2858,6 +3536,7 @@
* Get stack information.
*/
#define MC_CMD_STACKINFO 0xf
+#define MC_CMD_STACKINFO_MSGSET 0xf
#undef MC_CMD_0xf_PRIVILEGE_CTG
#define MC_CMD_0xf_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -2884,6 +3563,7 @@
* MDIO register read.
*/
#define MC_CMD_MDIO_READ 0x10
+#define MC_CMD_MDIO_READ_MSGSET 0x10
#undef MC_CMD_0x10_PRIVILEGE_CTG
#define MC_CMD_0x10_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -2932,6 +3612,7 @@
* MDIO register write.
*/
#define MC_CMD_MDIO_WRITE 0x11
+#define MC_CMD_MDIO_WRITE_MSGSET 0x11
#undef MC_CMD_0x11_PRIVILEGE_CTG
#define MC_CMD_0x11_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -2980,6 +3661,7 @@
* Write DBI register(s).
*/
#define MC_CMD_DBI_WRITE 0x12
+#define MC_CMD_DBI_WRITE_MSGSET 0x12
#undef MC_CMD_0x12_PRIVILEGE_CTG
#define MC_CMD_0x12_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -3033,6 +3715,7 @@
* access is implied by the Shared memory channel used.
*/
#define MC_CMD_PORT_READ32 0x14
+#define MC_CMD_PORT_READ32_MSGSET 0x14
/* MC_CMD_PORT_READ32_IN msgrequest */
#define MC_CMD_PORT_READ32_IN_LEN 4
@@ -3056,6 +3739,7 @@
* access is implied by the Shared memory channel used.
*/
#define MC_CMD_PORT_WRITE32 0x15
+#define MC_CMD_PORT_WRITE32_MSGSET 0x15
/* MC_CMD_PORT_WRITE32_IN msgrequest */
#define MC_CMD_PORT_WRITE32_IN_LEN 8
@@ -3079,6 +3763,7 @@
* access is implied by the Shared memory channel used.
*/
#define MC_CMD_PORT_READ128 0x16
+#define MC_CMD_PORT_READ128_MSGSET 0x16
/* MC_CMD_PORT_READ128_IN msgrequest */
#define MC_CMD_PORT_READ128_IN_LEN 4
@@ -3102,6 +3787,7 @@
* access is implied by the Shared memory channel used.
*/
#define MC_CMD_PORT_WRITE128 0x17
+#define MC_CMD_PORT_WRITE128_MSGSET 0x17
/* MC_CMD_PORT_WRITE128_IN msgrequest */
#define MC_CMD_PORT_WRITE128_IN_LEN 20
@@ -3150,6 +3836,7 @@
* Returns the MC firmware configuration structure.
*/
#define MC_CMD_GET_BOARD_CFG 0x18
+#define MC_CMD_GET_BOARD_CFG_MSGSET 0x18
#undef MC_CMD_0x18_PRIVILEGE_CTG
#define MC_CMD_0x18_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -3225,6 +3912,7 @@
* Read DBI register(s) -- extended functionality
*/
#define MC_CMD_DBI_READX 0x19
+#define MC_CMD_DBI_READX_MSGSET 0x19
#undef MC_CMD_0x19_PRIVILEGE_CTG
#define MC_CMD_0x19_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -3239,7 +3927,13 @@
#define MC_CMD_DBI_READX_IN_DBIRDOP_OFST 0
#define MC_CMD_DBI_READX_IN_DBIRDOP_LEN 8
#define MC_CMD_DBI_READX_IN_DBIRDOP_LO_OFST 0
+#define MC_CMD_DBI_READX_IN_DBIRDOP_LO_LEN 4
+#define MC_CMD_DBI_READX_IN_DBIRDOP_LO_LBN 0
+#define MC_CMD_DBI_READX_IN_DBIRDOP_LO_WIDTH 32
#define MC_CMD_DBI_READX_IN_DBIRDOP_HI_OFST 4
+#define MC_CMD_DBI_READX_IN_DBIRDOP_HI_LEN 4
+#define MC_CMD_DBI_READX_IN_DBIRDOP_HI_LBN 32
+#define MC_CMD_DBI_READX_IN_DBIRDOP_HI_WIDTH 32
#define MC_CMD_DBI_READX_IN_DBIRDOP_MINNUM 1
#define MC_CMD_DBI_READX_IN_DBIRDOP_MAXNUM 31
#define MC_CMD_DBI_READX_IN_DBIRDOP_MAXNUM_MCDI2 127
@@ -3283,6 +3977,7 @@
* Set the 16byte seed for the MC pseudo-random generator.
*/
#define MC_CMD_SET_RAND_SEED 0x1a
+#define MC_CMD_SET_RAND_SEED_MSGSET 0x1a
#undef MC_CMD_0x1a_PRIVILEGE_CTG
#define MC_CMD_0x1a_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -3302,6 +3997,7 @@
* Retrieve the history of the LTSSM, if the build supports it.
*/
#define MC_CMD_LTSSM_HIST 0x1b
+#define MC_CMD_LTSSM_HIST_MSGSET 0x1b
/* MC_CMD_LTSSM_HIST_IN msgrequest */
#define MC_CMD_LTSSM_HIST_IN_LEN 0
@@ -3330,6 +4026,7 @@
* platforms.
*/
#define MC_CMD_DRV_ATTACH 0x1c
+#define MC_CMD_DRV_ATTACH_MSGSET 0x1c
#undef MC_CMD_0x1c_PRIVILEGE_CTG
#define MC_CMD_0x1c_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -3524,6 +4221,7 @@
* Route UART output to circular buffer in shared memory instead.
*/
#define MC_CMD_SHMUART 0x1f
+#define MC_CMD_SHMUART_MSGSET 0x1f
/* MC_CMD_SHMUART_IN msgrequest */
#define MC_CMD_SHMUART_IN_LEN 4
@@ -3542,6 +4240,7 @@
* use MC_CMD_ENTITY_RESET instead.
*/
#define MC_CMD_PORT_RESET 0x20
+#define MC_CMD_PORT_RESET_MSGSET 0x20
#undef MC_CMD_0x20_PRIVILEGE_CTG
#define MC_CMD_0x20_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -3560,6 +4259,7 @@
* extended version of the deprecated MC_CMD_PORT_RESET with added fields.
*/
#define MC_CMD_ENTITY_RESET 0x20
+#define MC_CMD_ENTITY_RESET_MSGSET 0x20
/* MC_CMD_0x20_PRIVILEGE_CTG SRIOV_CTG_GENERAL */
/* MC_CMD_ENTITY_RESET_IN msgrequest */
@@ -3582,6 +4282,7 @@
* Read instantaneous and minimum flow control thresholds.
*/
#define MC_CMD_PCIE_CREDITS 0x21
+#define MC_CMD_PCIE_CREDITS_MSGSET 0x21
/* MC_CMD_PCIE_CREDITS_IN msgrequest */
#define MC_CMD_PCIE_CREDITS_IN_LEN 8
@@ -3617,6 +4318,7 @@
* Get histogram of RX queue fill level.
*/
#define MC_CMD_RXD_MONITOR 0x22
+#define MC_CMD_RXD_MONITOR_MSGSET 0x22
/* MC_CMD_RXD_MONITOR_IN msgrequest */
#define MC_CMD_RXD_MONITOR_IN_LEN 12
@@ -3676,6 +4378,7 @@
* Copy the given ASCII string out onto UART and/or out of the network port.
*/
#define MC_CMD_PUTS 0x23
+#define MC_CMD_PUTS_MSGSET 0x23
#undef MC_CMD_0x23_PRIVILEGE_CTG
#define MC_CMD_0x23_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -3712,6 +4415,7 @@
* 'zombie' state. Locks required: None
*/
#define MC_CMD_GET_PHY_CFG 0x24
+#define MC_CMD_GET_PHY_CFG_MSGSET 0x24
#undef MC_CMD_0x24_PRIVILEGE_CTG
#define MC_CMD_0x24_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -3868,6 +4572,7 @@
* Return code: 0, EINVAL, EACCES (if PHY_LOCK is not held)
*/
#define MC_CMD_START_BIST 0x25
+#define MC_CMD_START_BIST_MSGSET 0x25
#undef MC_CMD_0x25_PRIVILEGE_CTG
#define MC_CMD_0x25_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -3908,6 +4613,7 @@
* EACCES (if PHY_LOCK is not held).
*/
#define MC_CMD_POLL_BIST 0x26
+#define MC_CMD_POLL_BIST_MSGSET 0x26
#undef MC_CMD_0x26_PRIVILEGE_CTG
#define MC_CMD_0x26_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -4077,6 +4783,7 @@
* returns). The driver must still wait for flush done/failure events as usual.
*/
#define MC_CMD_FLUSH_RX_QUEUES 0x27
+#define MC_CMD_FLUSH_RX_QUEUES_MSGSET 0x27
/* MC_CMD_FLUSH_RX_QUEUES_IN msgrequest */
#define MC_CMD_FLUSH_RX_QUEUES_IN_LENMIN 4
@@ -4099,6 +4806,7 @@
* Returns a bitmask of loopback modes available at each speed.
*/
#define MC_CMD_GET_LOOPBACK_MODES 0x28
+#define MC_CMD_GET_LOOPBACK_MODES_MSGSET 0x28
#undef MC_CMD_0x28_PRIVILEGE_CTG
#define MC_CMD_0x28_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -4112,7 +4820,13 @@
#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_OFST 0
#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_LO_OFST 0
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_LO_LBN 0
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_HI_OFST 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_HI_LBN 32
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_HI_WIDTH 32
/* enum: None. */
#define MC_CMD_LOOPBACK_NONE 0x0
/* enum: Data. */
@@ -4195,28 +4909,52 @@
#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_OFST 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_LO_OFST 8
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_LO_LBN 64
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_HI_OFST 12
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_HI_LBN 96
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_OFST 16
#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_LO_OFST 16
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_LO_LBN 128
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_HI_OFST 20
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_HI_LBN 160
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_OFST 24
#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_LO_OFST 24
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_LO_LBN 192
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_HI_OFST 28
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_HI_LBN 224
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_OFST 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_LO_OFST 32
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_LO_LBN 256
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_HI_OFST 36
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_HI_LBN 288
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
@@ -4228,7 +4966,13 @@
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_OFST 0
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_LO_OFST 0
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_LO_LBN 0
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_HI_OFST 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_HI_LBN 32
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_HI_WIDTH 32
/* enum: None. */
/* MC_CMD_LOOPBACK_NONE 0x0 */
/* enum: Data. */
@@ -4311,49 +5055,91 @@
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_OFST 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_LO_OFST 8
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_LO_LBN 64
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_HI_OFST 12
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_HI_LBN 96
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_OFST 16
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_LO_OFST 16
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_LO_LBN 128
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_HI_OFST 20
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_HI_LBN 160
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_OFST 24
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_LO_OFST 24
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_LO_LBN 192
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_HI_OFST 28
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_HI_LBN 224
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_OFST 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_LO_OFST 32
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_LO_LBN 256
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_HI_OFST 36
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_HI_LBN 288
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported 25G loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_OFST 40
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_LO_OFST 40
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_LO_LBN 320
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_HI_OFST 44
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_HI_LBN 352
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported 50 loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_OFST 48
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_LO_OFST 48
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_LO_LBN 384
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_HI_OFST 52
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_HI_LBN 416
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported 100G loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_OFST 56
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_LO_OFST 56
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_LO_LBN 448
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_HI_OFST 60
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_HI_LBN 480
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
@@ -4395,6 +5181,7 @@
* ETIME.
*/
#define MC_CMD_GET_LINK 0x29
+#define MC_CMD_GET_LINK_MSGSET 0x29
#undef MC_CMD_0x29_PRIVILEGE_CTG
#define MC_CMD_0x29_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -4596,6 +5383,7 @@
* code: 0, EINVAL, ETIME, EAGAIN
*/
#define MC_CMD_SET_LINK 0x2a
+#define MC_CMD_SET_LINK_MSGSET 0x2a
#undef MC_CMD_0x2a_PRIVILEGE_CTG
#define MC_CMD_0x2a_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -4686,6 +5474,7 @@
* Set identification LED state. Locks required: None. Return code: 0, EINVAL
*/
#define MC_CMD_SET_ID_LED 0x2b
+#define MC_CMD_SET_ID_LED_MSGSET 0x2b
#undef MC_CMD_0x2b_PRIVILEGE_CTG
#define MC_CMD_0x2b_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -4708,6 +5497,7 @@
* Set MAC configuration. Locks required: None. Return code: 0, EINVAL
*/
#define MC_CMD_SET_MAC 0x2c
+#define MC_CMD_SET_MAC_MSGSET 0x2c
#undef MC_CMD_0x2c_PRIVILEGE_CTG
#define MC_CMD_0x2c_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -4724,7 +5514,13 @@
#define MC_CMD_SET_MAC_IN_ADDR_OFST 8
#define MC_CMD_SET_MAC_IN_ADDR_LEN 8
#define MC_CMD_SET_MAC_IN_ADDR_LO_OFST 8
+#define MC_CMD_SET_MAC_IN_ADDR_LO_LEN 4
+#define MC_CMD_SET_MAC_IN_ADDR_LO_LBN 64
+#define MC_CMD_SET_MAC_IN_ADDR_LO_WIDTH 32
#define MC_CMD_SET_MAC_IN_ADDR_HI_OFST 12
+#define MC_CMD_SET_MAC_IN_ADDR_HI_LEN 4
+#define MC_CMD_SET_MAC_IN_ADDR_HI_LBN 96
+#define MC_CMD_SET_MAC_IN_ADDR_HI_WIDTH 32
#define MC_CMD_SET_MAC_IN_REJECT_OFST 16
#define MC_CMD_SET_MAC_IN_REJECT_LEN 4
#define MC_CMD_SET_MAC_IN_REJECT_UNCST_OFST 16
@@ -4765,7 +5561,13 @@
#define MC_CMD_SET_MAC_EXT_IN_ADDR_OFST 8
#define MC_CMD_SET_MAC_EXT_IN_ADDR_LEN 8
#define MC_CMD_SET_MAC_EXT_IN_ADDR_LO_OFST 8
+#define MC_CMD_SET_MAC_EXT_IN_ADDR_LO_LEN 4
+#define MC_CMD_SET_MAC_EXT_IN_ADDR_LO_LBN 64
+#define MC_CMD_SET_MAC_EXT_IN_ADDR_LO_WIDTH 32
#define MC_CMD_SET_MAC_EXT_IN_ADDR_HI_OFST 12
+#define MC_CMD_SET_MAC_EXT_IN_ADDR_HI_LEN 4
+#define MC_CMD_SET_MAC_EXT_IN_ADDR_HI_LBN 96
+#define MC_CMD_SET_MAC_EXT_IN_ADDR_HI_WIDTH 32
#define MC_CMD_SET_MAC_EXT_IN_REJECT_OFST 16
#define MC_CMD_SET_MAC_EXT_IN_REJECT_LEN 4
#define MC_CMD_SET_MAC_EXT_IN_REJECT_UNCST_OFST 16
@@ -4816,6 +5618,129 @@
#define MC_CMD_SET_MAC_EXT_IN_CFG_FCS_LBN 4
#define MC_CMD_SET_MAC_EXT_IN_CFG_FCS_WIDTH 1
+/* MC_CMD_SET_MAC_V3_IN msgrequest */
+#define MC_CMD_SET_MAC_V3_IN_LEN 40
+/* The MTU is the MTU programmed directly into the XMAC/GMAC (inclusive of
+ * EtherII, VLAN, bug16011 padding).
+ */
+#define MC_CMD_SET_MAC_V3_IN_MTU_OFST 0
+#define MC_CMD_SET_MAC_V3_IN_MTU_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_DRAIN_OFST 4
+#define MC_CMD_SET_MAC_V3_IN_DRAIN_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_ADDR_OFST 8
+#define MC_CMD_SET_MAC_V3_IN_ADDR_LEN 8
+#define MC_CMD_SET_MAC_V3_IN_ADDR_LO_OFST 8
+#define MC_CMD_SET_MAC_V3_IN_ADDR_LO_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_ADDR_LO_LBN 64
+#define MC_CMD_SET_MAC_V3_IN_ADDR_LO_WIDTH 32
+#define MC_CMD_SET_MAC_V3_IN_ADDR_HI_OFST 12
+#define MC_CMD_SET_MAC_V3_IN_ADDR_HI_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_ADDR_HI_LBN 96
+#define MC_CMD_SET_MAC_V3_IN_ADDR_HI_WIDTH 32
+#define MC_CMD_SET_MAC_V3_IN_REJECT_OFST 16
+#define MC_CMD_SET_MAC_V3_IN_REJECT_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_REJECT_UNCST_OFST 16
+#define MC_CMD_SET_MAC_V3_IN_REJECT_UNCST_LBN 0
+#define MC_CMD_SET_MAC_V3_IN_REJECT_UNCST_WIDTH 1
+#define MC_CMD_SET_MAC_V3_IN_REJECT_BRDCST_OFST 16
+#define MC_CMD_SET_MAC_V3_IN_REJECT_BRDCST_LBN 1
+#define MC_CMD_SET_MAC_V3_IN_REJECT_BRDCST_WIDTH 1
+#define MC_CMD_SET_MAC_V3_IN_FCNTL_OFST 20
+#define MC_CMD_SET_MAC_V3_IN_FCNTL_LEN 4
+/* enum: Flow control is off. */
+/* MC_CMD_FCNTL_OFF 0x0 */
+/* enum: Respond to flow control. */
+/* MC_CMD_FCNTL_RESPOND 0x1 */
+/* enum: Respond to and Issue flow control. */
+/* MC_CMD_FCNTL_BIDIR 0x2 */
+/* enum: Auto neg flow control. */
+/* MC_CMD_FCNTL_AUTO 0x3 */
+/* enum: Priority flow control (eftest builds only). */
+/* MC_CMD_FCNTL_QBB 0x4 */
+/* enum: Issue flow control. */
+/* MC_CMD_FCNTL_GENERATE 0x5 */
+#define MC_CMD_SET_MAC_V3_IN_FLAGS_OFST 24
+#define MC_CMD_SET_MAC_V3_IN_FLAGS_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_FLAG_INCLUDE_FCS_OFST 24
+#define MC_CMD_SET_MAC_V3_IN_FLAG_INCLUDE_FCS_LBN 0
+#define MC_CMD_SET_MAC_V3_IN_FLAG_INCLUDE_FCS_WIDTH 1
+/* Select which parameters to configure. A parameter will only be modified if
+ * the corresponding control flag is set. If SET_MAC_ENHANCED is not set in
+ * capabilities then this field is ignored (and all flags are assumed to be
+ * set).
+ */
+#define MC_CMD_SET_MAC_V3_IN_CONTROL_OFST 28
+#define MC_CMD_SET_MAC_V3_IN_CONTROL_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_CFG_MTU_OFST 28
+#define MC_CMD_SET_MAC_V3_IN_CFG_MTU_LBN 0
+#define MC_CMD_SET_MAC_V3_IN_CFG_MTU_WIDTH 1
+#define MC_CMD_SET_MAC_V3_IN_CFG_DRAIN_OFST 28
+#define MC_CMD_SET_MAC_V3_IN_CFG_DRAIN_LBN 1
+#define MC_CMD_SET_MAC_V3_IN_CFG_DRAIN_WIDTH 1
+#define MC_CMD_SET_MAC_V3_IN_CFG_REJECT_OFST 28
+#define MC_CMD_SET_MAC_V3_IN_CFG_REJECT_LBN 2
+#define MC_CMD_SET_MAC_V3_IN_CFG_REJECT_WIDTH 1
+#define MC_CMD_SET_MAC_V3_IN_CFG_FCNTL_OFST 28
+#define MC_CMD_SET_MAC_V3_IN_CFG_FCNTL_LBN 3
+#define MC_CMD_SET_MAC_V3_IN_CFG_FCNTL_WIDTH 1
+#define MC_CMD_SET_MAC_V3_IN_CFG_FCS_OFST 28
+#define MC_CMD_SET_MAC_V3_IN_CFG_FCS_LBN 4
+#define MC_CMD_SET_MAC_V3_IN_CFG_FCS_WIDTH 1
+/* Identifies the MAC to update by the specifying the end of a logical MAE
+ * link. Setting TARGET to MAE_LINK_ENDPOINT_COMPAT is equivalent to using the
+ * previous version of the command (MC_CMD_SET_MAC_EXT). Not all possible
+ * combinations of MPORT_END and MPORT_SELECTOR in TARGET will work in all
+ * circumstances. 1. Some will always work (e.g. a VF can always address its
+ * logical MAC using MPORT_SELECTOR=ASSIGNED,LINK_END=VNIC), 2. Some are not
+ * meaningful and will always fail with EINVAL (e.g. attempting to address the
+ * VNIC end of a link to a physical port), 3. Some are meaningful but require
+ * the MCDI client to have the required permission and fail with EPERM
+ * otherwise (e.g. trying to set the MAC on a VF the caller cannot administer),
+ * and 4. Some could be implementation-specific and fail with ENOTSUP if not
+ * available (no examples exist right now). See SF-123581-TC section 4.3 for
+ * more details.
+ */
+#define MC_CMD_SET_MAC_V3_IN_TARGET_OFST 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_LEN 8
+#define MC_CMD_SET_MAC_V3_IN_TARGET_LO_OFST 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_LO_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_LO_LBN 256
+#define MC_CMD_SET_MAC_V3_IN_TARGET_LO_WIDTH 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_HI_OFST 36
+#define MC_CMD_SET_MAC_V3_IN_TARGET_HI_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_HI_LBN 288
+#define MC_CMD_SET_MAC_V3_IN_TARGET_HI_WIDTH 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_OFST 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FLAT_OFST 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FLAT_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_TYPE_OFST 35
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_TYPE_LEN 1
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_MPORT_ID_OFST 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_MPORT_ID_LEN 3
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_PPORT_ID_LBN 256
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_PPORT_ID_WIDTH 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_LBN 276
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_WIDTH 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_LBN 272
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_WIDTH 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FUNC_PF_ID_OFST 34
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FUNC_PF_ID_LEN 1
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FUNC_VF_ID_OFST 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FUNC_VF_ID_LEN 2
+#define MC_CMD_SET_MAC_V3_IN_TARGET_LINK_END_OFST 36
+#define MC_CMD_SET_MAC_V3_IN_TARGET_LINK_END_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_OFST 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_LEN 8
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_LO_OFST 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_LO_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_LO_LBN 256
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_LO_WIDTH 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_HI_OFST 36
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_HI_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_HI_LBN 288
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_HI_WIDTH 32
+
/* MC_CMD_SET_MAC_OUT msgresponse */
#define MC_CMD_SET_MAC_OUT_LEN 0
@@ -4839,6 +5764,7 @@
* Returns: 0, ETIME
*/
#define MC_CMD_PHY_STATS 0x2d
+#define MC_CMD_PHY_STATS_MSGSET 0x2d
#undef MC_CMD_0x2d_PRIVILEGE_CTG
#define MC_CMD_0x2d_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -4849,7 +5775,13 @@
#define MC_CMD_PHY_STATS_IN_DMA_ADDR_OFST 0
#define MC_CMD_PHY_STATS_IN_DMA_ADDR_LEN 8
#define MC_CMD_PHY_STATS_IN_DMA_ADDR_LO_OFST 0
+#define MC_CMD_PHY_STATS_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_PHY_STATS_IN_DMA_ADDR_LO_LBN 0
+#define MC_CMD_PHY_STATS_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_PHY_STATS_IN_DMA_ADDR_HI_OFST 4
+#define MC_CMD_PHY_STATS_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_PHY_STATS_IN_DMA_ADDR_HI_LBN 32
+#define MC_CMD_PHY_STATS_IN_DMA_ADDR_HI_WIDTH 32
/* MC_CMD_PHY_STATS_OUT_DMA msgresponse */
#define MC_CMD_PHY_STATS_OUT_DMA_LEN 0
@@ -4921,6 +5853,7 @@
* effect. Returns: 0, ETIME
*/
#define MC_CMD_MAC_STATS 0x2e
+#define MC_CMD_MAC_STATS_MSGSET 0x2e
#undef MC_CMD_0x2e_PRIVILEGE_CTG
#define MC_CMD_0x2e_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -4931,7 +5864,13 @@
#define MC_CMD_MAC_STATS_IN_DMA_ADDR_OFST 0
#define MC_CMD_MAC_STATS_IN_DMA_ADDR_LEN 8
#define MC_CMD_MAC_STATS_IN_DMA_ADDR_LO_OFST 0
+#define MC_CMD_MAC_STATS_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_MAC_STATS_IN_DMA_ADDR_LO_LBN 0
+#define MC_CMD_MAC_STATS_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_MAC_STATS_IN_DMA_ADDR_HI_OFST 4
+#define MC_CMD_MAC_STATS_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_MAC_STATS_IN_DMA_ADDR_HI_LBN 32
+#define MC_CMD_MAC_STATS_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_MAC_STATS_IN_CMD_OFST 8
#define MC_CMD_MAC_STATS_IN_CMD_LEN 4
#define MC_CMD_MAC_STATS_IN_DMA_OFST 8
@@ -4974,7 +5913,13 @@
#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_OFST 0
#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_LEN 8
#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_LO_OFST 0
+#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_LO_LEN 4
+#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_LO_LBN 0
+#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_LO_WIDTH 32
#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_HI_OFST 4
+#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_HI_LEN 4
+#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_HI_LBN 32
+#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_HI_WIDTH 32
#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS
#define MC_CMD_MAC_GENERATION_START 0x0 /* enum */
#define MC_CMD_MAC_DMABUF_START 0x1 /* enum */
@@ -5130,7 +6075,13 @@
#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_OFST 0
#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_LEN 8
#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_LO_OFST 0
+#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_LO_LEN 4
+#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_LO_LBN 0
+#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_LO_WIDTH 32
#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_HI_OFST 4
+#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_HI_LEN 4
+#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_HI_LBN 32
+#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_HI_WIDTH 32
#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS_V2
/* enum: Start of FEC stats buffer space, Medford2 and up */
#define MC_CMD_MAC_FEC_DMABUF_START 0x61
@@ -5163,7 +6114,13 @@
#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_OFST 0
#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_LEN 8
#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_LO_OFST 0
+#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_LO_LEN 4
+#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_LO_LBN 0
+#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_LO_WIDTH 32
#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_HI_OFST 4
+#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_HI_LEN 4
+#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_HI_LBN 32
+#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_HI_WIDTH 32
#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS_V3
/* enum: Start of CTPIO stats buffer space, Medford2 and up */
#define MC_CMD_MAC_CTPIO_DMABUF_START 0x68
@@ -5237,7 +6194,13 @@
#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_OFST 0
#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_LEN 8
#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_LO_OFST 0
+#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_LO_LEN 4
+#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_LO_LBN 0
+#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_LO_WIDTH 32
#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_HI_OFST 4
+#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_HI_LEN 4
+#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_HI_LBN 32
+#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_HI_WIDTH 32
#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS_V4
/* enum: Start of V4 stats buffer space */
#define MC_CMD_MAC_V4_DMABUF_START 0x79
@@ -5266,6 +6229,7 @@
* to be documented
*/
#define MC_CMD_SRIOV 0x30
+#define MC_CMD_SRIOV_MSGSET 0x30
/* MC_CMD_SRIOV_IN msgrequest */
#define MC_CMD_SRIOV_IN_LEN 12
@@ -5297,7 +6261,13 @@
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_OFST 8
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LEN 8
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LO_OFST 8
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LO_LEN 4
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LO_LBN 64
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LO_WIDTH 32
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_HI_OFST 12
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_HI_LEN 4
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_HI_LBN 96
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_HI_WIDTH 32
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LBN 64
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_WIDTH 64
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_RID_OFST 16
@@ -5308,7 +6278,13 @@
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_OFST 20
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LEN 8
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LO_OFST 20
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LO_LEN 4
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LO_LBN 160
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LO_WIDTH 32
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_HI_OFST 24
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_HI_LEN 4
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_HI_LBN 192
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_HI_WIDTH 32
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LBN 160
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_WIDTH 64
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_LENGTH_OFST 28
@@ -5338,6 +6314,7 @@
* Returns: 0, EINVAL (invalid RID)
*/
#define MC_CMD_MEMCPY 0x31
+#define MC_CMD_MEMCPY_MSGSET 0x31
/* MC_CMD_MEMCPY_IN msgrequest */
#define MC_CMD_MEMCPY_IN_LENMIN 32
@@ -5361,6 +6338,7 @@
* Set a WoL filter.
*/
#define MC_CMD_WOL_FILTER_SET 0x32
+#define MC_CMD_WOL_FILTER_SET_MSGSET 0x32
#undef MC_CMD_0x32_PRIVILEGE_CTG
#define MC_CMD_0x32_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -5401,7 +6379,13 @@
#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_OFST 8
#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_LEN 8
#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_LO_OFST 8
+#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_LO_LEN 4
+#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_LO_LBN 64
+#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_LO_WIDTH 32
#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_HI_OFST 12
+#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_HI_LEN 4
+#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_HI_LBN 96
+#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_HI_WIDTH 32
/* MC_CMD_WOL_FILTER_SET_IN_IPV4_SYN msgrequest */
#define MC_CMD_WOL_FILTER_SET_IN_IPV4_SYN_LEN 20
@@ -5476,6 +6460,7 @@
* Remove a WoL filter. Locks required: None. Returns: 0, EINVAL, ENOSYS
*/
#define MC_CMD_WOL_FILTER_REMOVE 0x33
+#define MC_CMD_WOL_FILTER_REMOVE_MSGSET 0x33
#undef MC_CMD_0x33_PRIVILEGE_CTG
#define MC_CMD_0x33_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -5495,6 +6480,7 @@
* ENOSYS
*/
#define MC_CMD_WOL_FILTER_RESET 0x34
+#define MC_CMD_WOL_FILTER_RESET_MSGSET 0x34
#undef MC_CMD_0x34_PRIVILEGE_CTG
#define MC_CMD_0x34_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -5515,6 +6501,7 @@
* Set the MCAST hash value without otherwise reconfiguring the MAC
*/
#define MC_CMD_SET_MCAST_HASH 0x35
+#define MC_CMD_SET_MCAST_HASH_MSGSET 0x35
/* MC_CMD_SET_MCAST_HASH_IN msgrequest */
#define MC_CMD_SET_MCAST_HASH_IN_LEN 32
@@ -5533,6 +6520,7 @@
* Locks required: none. Returns: 0
*/
#define MC_CMD_NVRAM_TYPES 0x36
+#define MC_CMD_NVRAM_TYPES_MSGSET 0x36
#undef MC_CMD_0x36_PRIVILEGE_CTG
#define MC_CMD_0x36_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -5595,6 +6583,7 @@
* EINVAL (bad type).
*/
#define MC_CMD_NVRAM_INFO 0x37
+#define MC_CMD_NVRAM_INFO_MSGSET 0x37
#undef MC_CMD_0x37_PRIVILEGE_CTG
#define MC_CMD_0x37_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -5692,6 +6681,7 @@
* EPERM.
*/
#define MC_CMD_NVRAM_UPDATE_START 0x38
+#define MC_CMD_NVRAM_UPDATE_START_MSGSET 0x38
#undef MC_CMD_0x38_PRIVILEGE_CTG
#define MC_CMD_0x38_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -5732,6 +6722,7 @@
* PHY_LOCK required and not held)
*/
#define MC_CMD_NVRAM_READ 0x39
+#define MC_CMD_NVRAM_READ_MSGSET 0x39
#undef MC_CMD_0x39_PRIVILEGE_CTG
#define MC_CMD_0x39_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -5803,6 +6794,7 @@
* PHY_LOCK required and not held)
*/
#define MC_CMD_NVRAM_WRITE 0x3a
+#define MC_CMD_NVRAM_WRITE_MSGSET 0x3a
#undef MC_CMD_0x3a_PRIVILEGE_CTG
#define MC_CMD_0x3a_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -5838,6 +6830,7 @@
* PHY_LOCK required and not held)
*/
#define MC_CMD_NVRAM_ERASE 0x3b
+#define MC_CMD_NVRAM_ERASE_MSGSET 0x3b
#undef MC_CMD_0x3b_PRIVILEGE_CTG
#define MC_CMD_0x3b_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -5868,6 +6861,7 @@
* the error EPERM.
*/
#define MC_CMD_NVRAM_UPDATE_FINISH 0x3c
+#define MC_CMD_NVRAM_UPDATE_FINISH_MSGSET 0x3c
#undef MC_CMD_0x3c_PRIVILEGE_CTG
#define MC_CMD_0x3c_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -5906,6 +6900,9 @@
#define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_POLL_VERIFY_RESULT_OFST 8
#define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_POLL_VERIFY_RESULT_LBN 2
#define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_POLL_VERIFY_RESULT_WIDTH 1
+#define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_ABORT_OFST 8
+#define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_ABORT_LBN 3
+#define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_ABORT_WIDTH 1
/* MC_CMD_NVRAM_UPDATE_FINISH_OUT msgresponse: Legacy NVRAM_UPDATE_FINISH
* response. Use NVRAM_UPDATE_FINISH_V2_OUT in new code
@@ -6036,6 +7033,7 @@
* DATALEN=0
*/
#define MC_CMD_REBOOT 0x3d
+#define MC_CMD_REBOOT_MSGSET 0x3d
#undef MC_CMD_0x3d_PRIVILEGE_CTG
#define MC_CMD_0x3d_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -6057,6 +7055,7 @@
* thread address.
*/
#define MC_CMD_SCHEDINFO 0x3e
+#define MC_CMD_SCHEDINFO_MSGSET 0x3e
#undef MC_CMD_0x3e_PRIVILEGE_CTG
#define MC_CMD_0x3e_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -6083,6 +7082,7 @@
* mode to the specified value. Returns the old mode.
*/
#define MC_CMD_REBOOT_MODE 0x3f
+#define MC_CMD_REBOOT_MODE_MSGSET 0x3f
#undef MC_CMD_0x3f_PRIVILEGE_CTG
#define MC_CMD_0x3f_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -6141,6 +7141,7 @@
* Locks required: None Returns: 0
*/
#define MC_CMD_SENSOR_INFO 0x41
+#define MC_CMD_SENSOR_INFO_MSGSET 0x41
#undef MC_CMD_0x41_PRIVILEGE_CTG
#define MC_CMD_0x41_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -6380,7 +7381,13 @@
#define MC_CMD_SENSOR_ENTRY_OFST 4
#define MC_CMD_SENSOR_ENTRY_LEN 8
#define MC_CMD_SENSOR_ENTRY_LO_OFST 4
+#define MC_CMD_SENSOR_ENTRY_LO_LEN 4
+#define MC_CMD_SENSOR_ENTRY_LO_LBN 32
+#define MC_CMD_SENSOR_ENTRY_LO_WIDTH 32
#define MC_CMD_SENSOR_ENTRY_HI_OFST 8
+#define MC_CMD_SENSOR_ENTRY_HI_LEN 4
+#define MC_CMD_SENSOR_ENTRY_HI_LBN 64
+#define MC_CMD_SENSOR_ENTRY_HI_WIDTH 32
#define MC_CMD_SENSOR_ENTRY_MINNUM 0
#define MC_CMD_SENSOR_ENTRY_MAXNUM 31
#define MC_CMD_SENSOR_ENTRY_MAXNUM_MCDI2 127
@@ -6402,7 +7409,13 @@
/* MC_CMD_SENSOR_ENTRY_OFST 4 */
/* MC_CMD_SENSOR_ENTRY_LEN 8 */
/* MC_CMD_SENSOR_ENTRY_LO_OFST 4 */
+/* MC_CMD_SENSOR_ENTRY_LO_LEN 4 */
+/* MC_CMD_SENSOR_ENTRY_LO_LBN 32 */
+/* MC_CMD_SENSOR_ENTRY_LO_WIDTH 32 */
/* MC_CMD_SENSOR_ENTRY_HI_OFST 8 */
+/* MC_CMD_SENSOR_ENTRY_HI_LEN 4 */
+/* MC_CMD_SENSOR_ENTRY_HI_LBN 64 */
+/* MC_CMD_SENSOR_ENTRY_HI_WIDTH 32 */
/* MC_CMD_SENSOR_ENTRY_MINNUM 0 */
/* MC_CMD_SENSOR_ENTRY_MAXNUM 31 */
/* MC_CMD_SENSOR_ENTRY_MAXNUM_MCDI2 127 */
@@ -6445,6 +7458,7 @@
* STATE_WARNING. Otherwise the board should not be expected to function.
*/
#define MC_CMD_READ_SENSORS 0x42
+#define MC_CMD_READ_SENSORS_MSGSET 0x42
#undef MC_CMD_0x42_PRIVILEGE_CTG
#define MC_CMD_0x42_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -6459,7 +7473,13 @@
#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_OFST 0
#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_LEN 8
#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_LO_OFST 0
+#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_LO_LBN 0
+#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_HI_OFST 4
+#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_HI_LBN 32
+#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_HI_WIDTH 32
/* MC_CMD_READ_SENSORS_EXT_IN msgrequest */
#define MC_CMD_READ_SENSORS_EXT_IN_LEN 12
@@ -6471,7 +7491,13 @@
#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_OFST 0
#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_LEN 8
#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_LO_OFST 0
+#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_LO_LBN 0
+#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_HI_OFST 4
+#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_HI_LBN 32
+#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_HI_WIDTH 32
/* Size in bytes of host buffer. */
#define MC_CMD_READ_SENSORS_EXT_IN_LENGTH_OFST 8
#define MC_CMD_READ_SENSORS_EXT_IN_LENGTH_LEN 4
@@ -6486,7 +7512,13 @@
#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_OFST 0
#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_LEN 8
#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_LO_OFST 0
+#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_LO_LEN 4
+#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_LO_LBN 0
+#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_HI_OFST 4
+#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_HI_LEN 4
+#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_HI_LBN 32
+#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_HI_WIDTH 32
/* Size in bytes of host buffer. */
#define MC_CMD_READ_SENSORS_EXT_IN_V2_LENGTH_OFST 8
#define MC_CMD_READ_SENSORS_EXT_IN_V2_LENGTH_LEN 4
@@ -6540,6 +7572,7 @@
* code: 0
*/
#define MC_CMD_GET_PHY_STATE 0x43
+#define MC_CMD_GET_PHY_STATE_MSGSET 0x43
#undef MC_CMD_0x43_PRIVILEGE_CTG
#define MC_CMD_0x43_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -6563,6 +7596,7 @@
* disable 802.Qbb for a given priority.
*/
#define MC_CMD_SETUP_8021QBB 0x44
+#define MC_CMD_SETUP_8021QBB_MSGSET 0x44
/* MC_CMD_SETUP_8021QBB_IN msgrequest */
#define MC_CMD_SETUP_8021QBB_IN_LEN 32
@@ -6578,6 +7612,7 @@
* Retrieve ID of any WoL filters. Locks required: None. Returns: 0, ENOSYS
*/
#define MC_CMD_WOL_FILTER_GET 0x45
+#define MC_CMD_WOL_FILTER_GET_MSGSET 0x45
#undef MC_CMD_0x45_PRIVILEGE_CTG
#define MC_CMD_0x45_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -6597,6 +7632,7 @@
* Returns: 0, ENOSYS
*/
#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD 0x46
+#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_MSGSET 0x46
#undef MC_CMD_0x46_PRIVILEGE_CTG
#define MC_CMD_0x46_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -6649,6 +7685,7 @@
* None. Returns: 0, ENOSYS
*/
#define MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD 0x47
+#define MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_MSGSET 0x47
#undef MC_CMD_0x47_PRIVILEGE_CTG
#define MC_CMD_0x47_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -6669,6 +7706,7 @@
* Restore MAC after block reset. Locks required: None. Returns: 0.
*/
#define MC_CMD_MAC_RESET_RESTORE 0x48
+#define MC_CMD_MAC_RESET_RESTORE_MSGSET 0x48
/* MC_CMD_MAC_RESET_RESTORE_IN msgrequest */
#define MC_CMD_MAC_RESET_RESTORE_IN_LEN 0
@@ -6684,6 +7722,7 @@
* required: None Returns: 0
*/
#define MC_CMD_TESTASSERT 0x49
+#define MC_CMD_TESTASSERT_MSGSET 0x49
#undef MC_CMD_0x49_PRIVILEGE_CTG
#define MC_CMD_0x49_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -6727,6 +7766,7 @@
* basis. Locks required: None. Returns: 0, EINVAL .
*/
#define MC_CMD_WORKAROUND 0x4a
+#define MC_CMD_WORKAROUND_MSGSET 0x4a
#undef MC_CMD_0x4a_PRIVILEGE_CTG
#define MC_CMD_0x4a_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -6790,6 +7830,7 @@
* Anything else: currently undefined. Locks required: None. Return code: 0.
*/
#define MC_CMD_GET_PHY_MEDIA_INFO 0x4b
+#define MC_CMD_GET_PHY_MEDIA_INFO_MSGSET 0x4b
#undef MC_CMD_0x4b_PRIVILEGE_CTG
#define MC_CMD_0x4b_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -6821,6 +7862,7 @@
* on the type of partition).
*/
#define MC_CMD_NVRAM_TEST 0x4c
+#define MC_CMD_NVRAM_TEST_MSGSET 0x4c
#undef MC_CMD_0x4c_PRIVILEGE_CTG
#define MC_CMD_0x4c_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -6851,6 +7893,7 @@
* they are configured first. Locks required: None. Return code: 0, EINVAL.
*/
#define MC_CMD_MRSFP_TWEAK 0x4d
+#define MC_CMD_MRSFP_TWEAK_MSGSET 0x4d
/* MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG msgrequest */
#define MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_LEN 16
@@ -6894,6 +7937,7 @@
* of range.
*/
#define MC_CMD_SENSOR_SET_LIMS 0x4e
+#define MC_CMD_SENSOR_SET_LIMS_MSGSET 0x4e
#undef MC_CMD_0x4e_PRIVILEGE_CTG
#define MC_CMD_0x4e_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -6925,6 +7969,7 @@
/* MC_CMD_GET_RESOURCE_LIMITS
*/
#define MC_CMD_GET_RESOURCE_LIMITS 0x4f
+#define MC_CMD_GET_RESOURCE_LIMITS_MSGSET 0x4f
/* MC_CMD_GET_RESOURCE_LIMITS_IN msgrequest */
#define MC_CMD_GET_RESOURCE_LIMITS_IN_LEN 0
@@ -6947,6 +7992,7 @@
* none. Returns: 0, EINVAL (bad type).
*/
#define MC_CMD_NVRAM_PARTITIONS 0x51
+#define MC_CMD_NVRAM_PARTITIONS_MSGSET 0x51
#undef MC_CMD_0x51_PRIVILEGE_CTG
#define MC_CMD_0x51_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -6977,6 +8023,7 @@
* none. Returns: 0, EINVAL (bad type).
*/
#define MC_CMD_NVRAM_METADATA 0x52
+#define MC_CMD_NVRAM_METADATA_MSGSET 0x52
#undef MC_CMD_0x52_PRIVILEGE_CTG
#define MC_CMD_0x52_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -7035,6 +8082,7 @@
* Returns the base MAC, count and stride for the requesting function
*/
#define MC_CMD_GET_MAC_ADDRESSES 0x55
+#define MC_CMD_GET_MAC_ADDRESSES_MSGSET 0x55
#undef MC_CMD_0x55_PRIVILEGE_CTG
#define MC_CMD_0x55_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -7066,6 +8114,7 @@
* SF-120509-TC and SF-117282-PS.
*/
#define MC_CMD_CLP 0x56
+#define MC_CMD_CLP_MSGSET 0x56
#undef MC_CMD_0x56_PRIVILEGE_CTG
#define MC_CMD_0x56_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -7188,6 +8237,7 @@
* Perform a MUM operation
*/
#define MC_CMD_MUM 0x57
+#define MC_CMD_MUM_MSGSET 0x57
#undef MC_CMD_0x57_PRIVILEGE_CTG
#define MC_CMD_0x57_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -7604,7 +8654,13 @@
#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_OFST 4
#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_LEN 8
#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_LO_OFST 4
+#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_LO_LEN 4
+#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_LO_LBN 32
+#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_LO_WIDTH 32
#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_HI_OFST 8
+#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_HI_LEN 4
+#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_HI_LBN 64
+#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_HI_WIDTH 32
/* MC_CMD_MUM_OUT_RAW_CMD msgresponse */
#define MC_CMD_MUM_OUT_RAW_CMD_LENMIN 1
@@ -7789,7 +8845,13 @@
#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_OFST 8
#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_LEN 8
#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_LO_OFST 8
+#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_LO_LEN 4
+#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_LO_LBN 64
+#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_LO_WIDTH 32
#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_HI_OFST 12
+#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_HI_LEN 4
+#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_HI_LBN 96
+#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_HI_WIDTH 32
#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_MINNUM 2
#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_MAXNUM 30
#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_MAXNUM_MCDI2 126
@@ -7986,6 +9048,7 @@
* sensor_query SPHINX service.
*/
#define MC_CMD_DYNAMIC_SENSORS_LIST 0x66
+#define MC_CMD_DYNAMIC_SENSORS_LIST_MSGSET 0x66
#undef MC_CMD_0x66_PRIVILEGE_CTG
#define MC_CMD_0x66_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -8031,6 +9094,7 @@
* `get_descriptions` in the sensor_query SPHINX service.
*/
#define MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS 0x67
+#define MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_MSGSET 0x67
#undef MC_CMD_0x67_PRIVILEGE_CTG
#define MC_CMD_0x67_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -8080,6 +9144,7 @@
* in the sensor_query SPHINX service.
*/
#define MC_CMD_DYNAMIC_SENSORS_GET_READINGS 0x68
+#define MC_CMD_DYNAMIC_SENSORS_GET_READINGS_MSGSET 0x68
#undef MC_CMD_0x68_PRIVILEGE_CTG
#define MC_CMD_0x68_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -8117,6 +9182,7 @@
* receive (Riverhead).
*/
#define MC_CMD_EVENT_CTRL 0x69
+#define MC_CMD_EVENT_CTRL_MSGSET 0x69
#undef MC_CMD_0x69_PRIVILEGE_CTG
#define MC_CMD_0x69_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -8197,7 +9263,13 @@
#define BUFTBL_ENTRY_RAWADDR_OFST 4
#define BUFTBL_ENTRY_RAWADDR_LEN 8
#define BUFTBL_ENTRY_RAWADDR_LO_OFST 4
+#define BUFTBL_ENTRY_RAWADDR_LO_LEN 4
+#define BUFTBL_ENTRY_RAWADDR_LO_LBN 32
+#define BUFTBL_ENTRY_RAWADDR_LO_WIDTH 32
#define BUFTBL_ENTRY_RAWADDR_HI_OFST 8
+#define BUFTBL_ENTRY_RAWADDR_HI_LEN 4
+#define BUFTBL_ENTRY_RAWADDR_HI_LBN 64
+#define BUFTBL_ENTRY_RAWADDR_HI_WIDTH 32
#define BUFTBL_ENTRY_RAWADDR_LBN 32
#define BUFTBL_ENTRY_RAWADDR_WIDTH 64
@@ -8207,14 +9279,25 @@
#define NVRAM_PARTITION_TYPE_ID_LEN 2
/* enum: Primary MC firmware partition */
#define NVRAM_PARTITION_TYPE_MC_FIRMWARE 0x100
+/* enum: NMC firmware partition (this is intentionally an alias of MC_FIRMWARE)
+ */
+#define NVRAM_PARTITION_TYPE_NMC_FIRMWARE 0x100
/* enum: Secondary MC firmware partition */
#define NVRAM_PARTITION_TYPE_MC_FIRMWARE_BACKUP 0x200
/* enum: Expansion ROM partition */
#define NVRAM_PARTITION_TYPE_EXPANSION_ROM 0x300
/* enum: Static configuration TLV partition */
#define NVRAM_PARTITION_TYPE_STATIC_CONFIG 0x400
+/* enum: Factory configuration TLV partition (this is intentionally an alias of
+ * STATIC_CONFIG)
+ */
+#define NVRAM_PARTITION_TYPE_FACTORY_CONFIG 0x400
/* enum: Dynamic configuration TLV partition */
#define NVRAM_PARTITION_TYPE_DYNAMIC_CONFIG 0x500
+/* enum: User configuration TLV partition (this is intentionally an alias of
+ * DYNAMIC_CONFIG)
+ */
+#define NVRAM_PARTITION_TYPE_USER_CONFIG 0x500
/* enum: Expansion ROM configuration data for port 0 */
#define NVRAM_PARTITION_TYPE_EXPROM_CONFIG_PORT0 0x600
/* enum: Synonym for EXPROM_CONFIG_PORT0 as used in pmap files */
@@ -8227,10 +9310,16 @@
#define NVRAM_PARTITION_TYPE_EXPROM_CONFIG_PORT3 0x603
/* enum: Non-volatile log output partition */
#define NVRAM_PARTITION_TYPE_LOG 0x700
+/* enum: Non-volatile log output partition for NMC firmware (this is
+ * intentionally an alias of LOG)
+ */
+#define NVRAM_PARTITION_TYPE_NMC_LOG 0x700
/* enum: Non-volatile log output of second core on dual-core device */
#define NVRAM_PARTITION_TYPE_LOG_SLAVE 0x701
/* enum: Device state dump output partition */
#define NVRAM_PARTITION_TYPE_DUMP 0x800
+/* enum: Crash log partition for NMC firmware */
+#define NVRAM_PARTITION_TYPE_NMC_CRASH_LOG 0x801
/* enum: Application license key storage partition */
#define NVRAM_PARTITION_TYPE_LICENSE 0x900
/* enum: Start of range used for PHY partitions (low 8 bits are the PHY ID) */
@@ -8247,6 +9336,20 @@
#define NVRAM_PARTITION_TYPE_FC_LICENSE 0xb03
/* enum: Non-volatile log output partition for FC */
#define NVRAM_PARTITION_TYPE_FC_LOG 0xb04
+/* enum: FPGA Stage 1 bitstream */
+#define NVRAM_PARTITION_TYPE_FPGA_STAGE1 0xb05
+/* enum: FPGA Stage 2 bitstream */
+#define NVRAM_PARTITION_TYPE_FPGA_STAGE2 0xb06
+/* enum: FPGA User XCLBIN / Programmable Region 0 bitstream */
+#define NVRAM_PARTITION_TYPE_FPGA_REGION0 0xb07
+/* enum: FPGA User XCLBIN (this is intentionally an alias of FPGA_REGION0) */
+#define NVRAM_PARTITION_TYPE_FPGA_XCLBIN_USER 0xb07
+/* enum: FPGA jump instruction (a.k.a. boot) partition to select Stage1
+ * bitstream
+ */
+#define NVRAM_PARTITION_TYPE_FPGA_JUMP 0xb08
+/* enum: FPGA Validate XCLBIN */
+#define NVRAM_PARTITION_TYPE_FPGA_XCLBIN_VALIDATE 0xb09
/* enum: MUM firmware partition */
#define NVRAM_PARTITION_TYPE_MUM_FIRMWARE 0xc00
/* enum: SUC firmware partition (this is intentionally an alias of
@@ -8255,6 +9358,10 @@
#define NVRAM_PARTITION_TYPE_SUC_FIRMWARE 0xc00
/* enum: MUM Non-volatile log output partition. */
#define NVRAM_PARTITION_TYPE_MUM_LOG 0xc01
+/* enum: SUC Non-volatile log output partition (this is intentionally an alias
+ * of MUM_LOG).
+ */
+#define NVRAM_PARTITION_TYPE_SUC_LOG 0xc01
/* enum: MUM Application table partition. */
#define NVRAM_PARTITION_TYPE_MUM_APPTABLE 0xc02
/* enum: MUM boot rom partition. */
@@ -8269,6 +9376,10 @@
#define NVRAM_PARTITION_TYPE_EXPANSION_UEFI 0xd00
/* enum: Used by the expansion ROM for logging */
#define NVRAM_PARTITION_TYPE_PXE_LOG 0x1000
+/* enum: Non-volatile log output partition for Expansion ROM (this is
+ * intentionally an alias of PXE_LOG).
+ */
+#define NVRAM_PARTITION_TYPE_EXPROM_LOG 0x1000
/* enum: Used for XIP code of shmbooted images */
#define NVRAM_PARTITION_TYPE_XIP_SCRATCH 0x1100
/* enum: Spare partition 2 */
@@ -8277,6 +9388,10 @@
* between XJTAG and Manftest.
*/
#define NVRAM_PARTITION_TYPE_MANUFACTURING 0x1300
+/* enum: Deployment configuration TLV partition (this is intentionally an alias
+ * of MANUFACTURING)
+ */
+#define NVRAM_PARTITION_TYPE_DEPLOYMENT_CONFIG 0x1300
/* enum: Spare partition 4 */
#define NVRAM_PARTITION_TYPE_SPARE_4 0x1400
/* enum: Spare partition 5 */
@@ -8312,14 +9427,43 @@
#define NVRAM_PARTITION_TYPE_BUNDLE_LOG 0x1e02
/* enum: Partition for Solarflare gPXE bootrom installed via Bundle update. */
#define NVRAM_PARTITION_TYPE_EXPANSION_ROM_INTERNAL 0x1e03
+/* enum: Test partition on SmartNIC system microcontroller (SUC) */
+#define NVRAM_PARTITION_TYPE_SUC_TEST 0x1f00
+/* enum: System microcontroller access to primary FPGA flash. */
+#define NVRAM_PARTITION_TYPE_SUC_FPGA_PRIMARY 0x1f01
+/* enum: System microcontroller access to secondary FPGA flash (if present) */
+#define NVRAM_PARTITION_TYPE_SUC_FPGA_SECONDARY 0x1f02
+/* enum: System microcontroller access to primary System-on-Chip flash */
+#define NVRAM_PARTITION_TYPE_SUC_SOC_PRIMARY 0x1f03
+/* enum: System microcontroller access to secondary System-on-Chip flash (if
+ * present)
+ */
+#define NVRAM_PARTITION_TYPE_SUC_SOC_SECONDARY 0x1f04
+/* enum: System microcontroller critical failure logs. Contains structured
+ * details of sensors leading up to a critical failure (where the board is shut
+ * down).
+ */
+#define NVRAM_PARTITION_TYPE_SUC_FAILURE_LOG 0x1f05
+/* enum: System-on-Chip configuration information (see XN-200467-PS). */
+#define NVRAM_PARTITION_TYPE_SUC_SOC_CONFIG 0x1f07
+/* enum: System-on-Chip update information. */
+#define NVRAM_PARTITION_TYPE_SOC_UPDATE 0x2003
/* enum: Start of reserved value range (firmware may use for any purpose) */
#define NVRAM_PARTITION_TYPE_RESERVED_VALUES_MIN 0xff00
/* enum: End of reserved value range (firmware may use for any purpose) */
#define NVRAM_PARTITION_TYPE_RESERVED_VALUES_MAX 0xfffd
/* enum: Recovery partition map (provided if real map is missing or corrupt) */
#define NVRAM_PARTITION_TYPE_RECOVERY_MAP 0xfffe
+/* enum: Recovery Flash Partition Table, see SF-122606-TC. (this is
+ * intentionally an alias of RECOVERY_MAP)
+ */
+#define NVRAM_PARTITION_TYPE_RECOVERY_FPT 0xfffe
/* enum: Partition map (real map as stored in flash) */
#define NVRAM_PARTITION_TYPE_PARTITION_MAP 0xffff
+/* enum: Flash Partition Table, see SF-122606-TC. (this is intentionally an
+ * alias of PARTITION_MAP)
+ */
+#define NVRAM_PARTITION_TYPE_FPT 0xffff
#define NVRAM_PARTITION_TYPE_ID_LBN 0
#define NVRAM_PARTITION_TYPE_ID_WIDTH 16
@@ -8368,7 +9512,13 @@
#define LICENSED_FEATURES_MASK_OFST 0
#define LICENSED_FEATURES_MASK_LEN 8
#define LICENSED_FEATURES_MASK_LO_OFST 0
+#define LICENSED_FEATURES_MASK_LO_LEN 4
+#define LICENSED_FEATURES_MASK_LO_LBN 0
+#define LICENSED_FEATURES_MASK_LO_WIDTH 32
#define LICENSED_FEATURES_MASK_HI_OFST 4
+#define LICENSED_FEATURES_MASK_HI_LEN 4
+#define LICENSED_FEATURES_MASK_HI_LBN 32
+#define LICENSED_FEATURES_MASK_HI_WIDTH 32
#define LICENSED_FEATURES_RX_CUT_THROUGH_OFST 0
#define LICENSED_FEATURES_RX_CUT_THROUGH_LBN 0
#define LICENSED_FEATURES_RX_CUT_THROUGH_WIDTH 1
@@ -8408,7 +9558,13 @@
#define LICENSED_V3_APPS_MASK_OFST 0
#define LICENSED_V3_APPS_MASK_LEN 8
#define LICENSED_V3_APPS_MASK_LO_OFST 0
+#define LICENSED_V3_APPS_MASK_LO_LEN 4
+#define LICENSED_V3_APPS_MASK_LO_LBN 0
+#define LICENSED_V3_APPS_MASK_LO_WIDTH 32
#define LICENSED_V3_APPS_MASK_HI_OFST 4
+#define LICENSED_V3_APPS_MASK_HI_LEN 4
+#define LICENSED_V3_APPS_MASK_HI_LBN 32
+#define LICENSED_V3_APPS_MASK_HI_WIDTH 32
#define LICENSED_V3_APPS_ONLOAD_OFST 0
#define LICENSED_V3_APPS_ONLOAD_LBN 0
#define LICENSED_V3_APPS_ONLOAD_WIDTH 1
@@ -8466,7 +9622,13 @@
#define LICENSED_V3_FEATURES_MASK_OFST 0
#define LICENSED_V3_FEATURES_MASK_LEN 8
#define LICENSED_V3_FEATURES_MASK_LO_OFST 0
+#define LICENSED_V3_FEATURES_MASK_LO_LEN 4
+#define LICENSED_V3_FEATURES_MASK_LO_LBN 0
+#define LICENSED_V3_FEATURES_MASK_LO_WIDTH 32
#define LICENSED_V3_FEATURES_MASK_HI_OFST 4
+#define LICENSED_V3_FEATURES_MASK_HI_LEN 4
+#define LICENSED_V3_FEATURES_MASK_HI_LBN 32
+#define LICENSED_V3_FEATURES_MASK_HI_WIDTH 32
#define LICENSED_V3_FEATURES_RX_CUT_THROUGH_OFST 0
#define LICENSED_V3_FEATURES_RX_CUT_THROUGH_LBN 0
#define LICENSED_V3_FEATURES_RX_CUT_THROUGH_WIDTH 1
@@ -8617,6 +9779,7 @@
* Get a dump of the MCPU registers
*/
#define MC_CMD_READ_REGS 0x50
+#define MC_CMD_READ_REGS_MSGSET 0x50
#undef MC_CMD_0x50_PRIVILEGE_CTG
#define MC_CMD_0x50_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -8643,6 +9806,7 @@
* end with an address for each 4k of host memory required to back the EVQ.
*/
#define MC_CMD_INIT_EVQ 0x80
+#define MC_CMD_INIT_EVQ_MSGSET 0x80
#undef MC_CMD_0x80_PRIVILEGE_CTG
#define MC_CMD_0x80_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -8657,7 +9821,8 @@
#define MC_CMD_INIT_EVQ_IN_SIZE_OFST 0
#define MC_CMD_INIT_EVQ_IN_SIZE_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_EVQ_IN_INSTANCE_OFST 4
#define MC_CMD_INIT_EVQ_IN_INSTANCE_LEN 4
@@ -8729,7 +9894,13 @@
#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_OFST 36
#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_LO_OFST 36
+#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_LO_LBN 288
+#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_HI_OFST 40
+#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_HI_LBN 320
+#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_MINNUM 1
#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_MAXNUM 64
#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_MAXNUM_MCDI2 64
@@ -8750,7 +9921,8 @@
#define MC_CMD_INIT_EVQ_V2_IN_SIZE_OFST 0
#define MC_CMD_INIT_EVQ_V2_IN_SIZE_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_EVQ_V2_IN_INSTANCE_OFST 4
#define MC_CMD_INIT_EVQ_V2_IN_INSTANCE_LEN 4
@@ -8847,7 +10019,13 @@
#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_OFST 36
#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_LO_OFST 36
+#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_LO_LBN 288
+#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_HI_OFST 40
+#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_HI_LBN 320
+#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_MINNUM 1
#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_MAXNUM 64
#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_MAXNUM_MCDI2 64
@@ -8900,6 +10078,7 @@
* the RXQ.
*/
#define MC_CMD_INIT_RXQ 0x81
+#define MC_CMD_INIT_RXQ_MSGSET 0x81
#undef MC_CMD_0x81_PRIVILEGE_CTG
#define MC_CMD_0x81_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -8923,7 +10102,8 @@
#define MC_CMD_INIT_RXQ_IN_LABEL_OFST 8
#define MC_CMD_INIT_RXQ_IN_LABEL_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_RXQ_IN_INSTANCE_OFST 12
#define MC_CMD_INIT_RXQ_IN_INSTANCE_LEN 4
@@ -8964,7 +10144,13 @@
#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_OFST 28
#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_LO_OFST 28
+#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_LO_LBN 224
+#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_HI_OFST 32
+#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_HI_LBN 256
+#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_MINNUM 1
#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_MAXNUM 28
#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_MAXNUM_MCDI2 124
@@ -8988,7 +10174,8 @@
#define MC_CMD_INIT_RXQ_EXT_IN_LABEL_OFST 8
#define MC_CMD_INIT_RXQ_EXT_IN_LABEL_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_RXQ_EXT_IN_INSTANCE_OFST 12
#define MC_CMD_INIT_RXQ_EXT_IN_INSTANCE_LEN 4
@@ -9062,7 +10249,13 @@
#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_OFST 28
#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_LO_OFST 28
+#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_LO_LBN 224
+#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_HI_OFST 32
+#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_HI_LBN 256
+#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_NUM 64
/* Maximum length of packet to receive, if SNAPSHOT_MODE flag is set */
#define MC_CMD_INIT_RXQ_EXT_IN_SNAPSHOT_LENGTH_OFST 540
@@ -9085,7 +10278,8 @@
#define MC_CMD_INIT_RXQ_V3_IN_LABEL_OFST 8
#define MC_CMD_INIT_RXQ_V3_IN_LABEL_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_RXQ_V3_IN_INSTANCE_OFST 12
#define MC_CMD_INIT_RXQ_V3_IN_INSTANCE_LEN 4
@@ -9159,7 +10353,13 @@
#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_OFST 28
#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_LO_OFST 28
+#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_LO_LBN 224
+#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_HI_OFST 32
+#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_HI_LBN 256
+#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_NUM 64
/* Maximum length of packet to receive, if SNAPSHOT_MODE flag is set */
#define MC_CMD_INIT_RXQ_V3_IN_SNAPSHOT_LENGTH_OFST 540
@@ -9211,7 +10411,8 @@
#define MC_CMD_INIT_RXQ_V4_IN_LABEL_OFST 8
#define MC_CMD_INIT_RXQ_V4_IN_LABEL_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_RXQ_V4_IN_INSTANCE_OFST 12
#define MC_CMD_INIT_RXQ_V4_IN_INSTANCE_LEN 4
@@ -9285,7 +10486,13 @@
#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_OFST 28
#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_LO_OFST 28
+#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_LO_LBN 224
+#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_HI_OFST 32
+#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_HI_LBN 256
+#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_NUM 64
/* Maximum length of packet to receive, if SNAPSHOT_MODE flag is set */
#define MC_CMD_INIT_RXQ_V4_IN_SNAPSHOT_LENGTH_OFST 540
@@ -9350,7 +10557,8 @@
#define MC_CMD_INIT_RXQ_V5_IN_LABEL_OFST 8
#define MC_CMD_INIT_RXQ_V5_IN_LABEL_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_RXQ_V5_IN_INSTANCE_OFST 12
#define MC_CMD_INIT_RXQ_V5_IN_INSTANCE_LEN 4
@@ -9424,7 +10632,13 @@
#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_OFST 28
#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_LO_OFST 28
+#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_LO_LBN 224
+#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_HI_OFST 32
+#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_HI_LBN 256
+#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_NUM 64
/* Maximum length of packet to receive, if SNAPSHOT_MODE flag is set */
#define MC_CMD_INIT_RXQ_V5_IN_SNAPSHOT_LENGTH_OFST 540
@@ -9497,6 +10711,7 @@
/* MC_CMD_INIT_TXQ
*/
#define MC_CMD_INIT_TXQ 0x82
+#define MC_CMD_INIT_TXQ_MSGSET 0x82
#undef MC_CMD_0x82_PRIVILEGE_CTG
#define MC_CMD_0x82_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -9521,7 +10736,8 @@
#define MC_CMD_INIT_TXQ_IN_LABEL_OFST 8
#define MC_CMD_INIT_TXQ_IN_LABEL_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_TXQ_IN_INSTANCE_OFST 12
#define MC_CMD_INIT_TXQ_IN_INSTANCE_LEN 4
@@ -9565,7 +10781,13 @@
#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_OFST 28
#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_LO_OFST 28
+#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_LO_LBN 224
+#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_HI_OFST 32
+#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_HI_LBN 256
+#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_MINNUM 1
#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_MAXNUM 28
#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_MAXNUM_MCDI2 124
@@ -9586,7 +10808,8 @@
#define MC_CMD_INIT_TXQ_EXT_IN_LABEL_OFST 8
#define MC_CMD_INIT_TXQ_EXT_IN_LABEL_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_TXQ_EXT_IN_INSTANCE_OFST 12
#define MC_CMD_INIT_TXQ_EXT_IN_INSTANCE_LEN 4
@@ -9648,7 +10871,13 @@
#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_OFST 28
#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_LO_OFST 28
+#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_LO_LBN 224
+#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_HI_OFST 32
+#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_HI_LBN 256
+#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_MINNUM 1
#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_MAXNUM 64
#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_MAXNUM_MCDI2 64
@@ -9674,6 +10903,7 @@
* or the operation will fail with EBUSY
*/
#define MC_CMD_FINI_EVQ 0x83
+#define MC_CMD_FINI_EVQ_MSGSET 0x83
#undef MC_CMD_0x83_PRIVILEGE_CTG
#define MC_CMD_0x83_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -9695,6 +10925,7 @@
* Teardown a RXQ.
*/
#define MC_CMD_FINI_RXQ 0x84
+#define MC_CMD_FINI_RXQ_MSGSET 0x84
#undef MC_CMD_0x84_PRIVILEGE_CTG
#define MC_CMD_0x84_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -9714,6 +10945,7 @@
* Teardown a TXQ.
*/
#define MC_CMD_FINI_TXQ 0x85
+#define MC_CMD_FINI_TXQ_MSGSET 0x85
#undef MC_CMD_0x85_PRIVILEGE_CTG
#define MC_CMD_0x85_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -9733,6 +10965,7 @@
* Generate an event on an EVQ belonging to the function issuing the command.
*/
#define MC_CMD_DRIVER_EVENT 0x86
+#define MC_CMD_DRIVER_EVENT_MSGSET 0x86
#undef MC_CMD_0x86_PRIVILEGE_CTG
#define MC_CMD_0x86_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -9746,7 +10979,13 @@
#define MC_CMD_DRIVER_EVENT_IN_DATA_OFST 4
#define MC_CMD_DRIVER_EVENT_IN_DATA_LEN 8
#define MC_CMD_DRIVER_EVENT_IN_DATA_LO_OFST 4
+#define MC_CMD_DRIVER_EVENT_IN_DATA_LO_LEN 4
+#define MC_CMD_DRIVER_EVENT_IN_DATA_LO_LBN 32
+#define MC_CMD_DRIVER_EVENT_IN_DATA_LO_WIDTH 32
#define MC_CMD_DRIVER_EVENT_IN_DATA_HI_OFST 8
+#define MC_CMD_DRIVER_EVENT_IN_DATA_HI_LEN 4
+#define MC_CMD_DRIVER_EVENT_IN_DATA_HI_LBN 64
+#define MC_CMD_DRIVER_EVENT_IN_DATA_HI_WIDTH 32
/* MC_CMD_DRIVER_EVENT_OUT msgresponse */
#define MC_CMD_DRIVER_EVENT_OUT_LEN 0
@@ -9760,6 +10999,7 @@
* MC_CMD_SET_FUNC, which remains available for Siena but now deprecated.
*/
#define MC_CMD_PROXY_CMD 0x5b
+#define MC_CMD_PROXY_CMD_MSGSET 0x5b
#undef MC_CMD_0x5b_PRIVILEGE_CTG
#define MC_CMD_0x5b_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -9828,6 +11068,7 @@
* a designated admin function
*/
#define MC_CMD_PROXY_CONFIGURE 0x58
+#define MC_CMD_PROXY_CONFIGURE_MSGSET 0x58
#undef MC_CMD_0x58_PRIVILEGE_CTG
#define MC_CMD_0x58_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -9845,7 +11086,13 @@
#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_OFST 4
#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_LEN 8
#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_LO_OFST 4
+#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_LO_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_LO_LBN 32
+#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_LO_WIDTH 32
#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_HI_OFST 8
+#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_HI_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_HI_LBN 64
+#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_HI_WIDTH 32
/* Must be a power of 2 */
#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BLOCK_SIZE_OFST 12
#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BLOCK_SIZE_LEN 4
@@ -9855,7 +11102,13 @@
#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_OFST 16
#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_LEN 8
#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_LO_OFST 16
+#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_LO_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_LO_LBN 128
+#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_LO_WIDTH 32
#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_HI_OFST 20
+#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_HI_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_HI_LBN 160
+#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_HI_WIDTH 32
/* Must be a power of 2 */
#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BLOCK_SIZE_OFST 24
#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BLOCK_SIZE_LEN 4
@@ -9866,7 +11119,13 @@
#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_OFST 28
#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_LEN 8
#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_LO_OFST 28
+#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_LO_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_LO_LBN 224
+#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_LO_WIDTH 32
#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_HI_OFST 32
+#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_HI_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_HI_LBN 256
+#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_HI_WIDTH 32
/* Must be a power of 2, or zero if this buffer is not provided */
#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BLOCK_SIZE_OFST 36
#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BLOCK_SIZE_LEN 4
@@ -9890,7 +11149,13 @@
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_OFST 4
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_LEN 8
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_LO_OFST 4
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_LO_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_LO_LBN 32
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_LO_WIDTH 32
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_HI_OFST 8
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_HI_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_HI_LBN 64
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_HI_WIDTH 32
/* Must be a power of 2 */
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BLOCK_SIZE_OFST 12
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BLOCK_SIZE_LEN 4
@@ -9900,7 +11165,13 @@
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_OFST 16
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_LEN 8
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_LO_OFST 16
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_LO_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_LO_LBN 128
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_LO_WIDTH 32
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_HI_OFST 20
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_HI_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_HI_LBN 160
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_HI_WIDTH 32
/* Must be a power of 2 */
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BLOCK_SIZE_OFST 24
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BLOCK_SIZE_LEN 4
@@ -9911,7 +11182,13 @@
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_OFST 28
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_LEN 8
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_LO_OFST 28
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_LO_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_LO_LBN 224
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_LO_WIDTH 32
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_HI_OFST 32
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_HI_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_HI_LBN 256
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_HI_WIDTH 32
/* Must be a power of 2, or zero if this buffer is not provided */
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BLOCK_SIZE_OFST 36
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BLOCK_SIZE_LEN 4
@@ -9936,6 +11213,7 @@
* MC_CMD_PROXY_CONFIGURE).
*/
#define MC_CMD_PROXY_COMPLETE 0x5f
+#define MC_CMD_PROXY_COMPLETE_MSGSET 0x5f
#undef MC_CMD_0x5f_PRIVILEGE_CTG
#define MC_CMD_0x5f_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -9974,6 +11252,7 @@
* cannot do so). The buffer table entries will initially be zeroed.
*/
#define MC_CMD_ALLOC_BUFTBL_CHUNK 0x87
+#define MC_CMD_ALLOC_BUFTBL_CHUNK_MSGSET 0x87
#undef MC_CMD_0x87_PRIVILEGE_CTG
#define MC_CMD_0x87_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -10005,6 +11284,7 @@
* Reprogram a set of buffer table entries in the specified chunk.
*/
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES 0x88
+#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_MSGSET 0x88
#undef MC_CMD_0x88_PRIVILEGE_CTG
#define MC_CMD_0x88_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -10027,7 +11307,13 @@
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_OFST 12
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LEN 8
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LO_OFST 12
+#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LO_LEN 4
+#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LO_LBN 96
+#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LO_WIDTH 32
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_HI_OFST 16
+#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_HI_LEN 4
+#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_HI_LBN 128
+#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_HI_WIDTH 32
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_MINNUM 1
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_MAXNUM 32
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_MAXNUM_MCDI2 32
@@ -10040,6 +11326,7 @@
/* MC_CMD_FREE_BUFTBL_CHUNK
*/
#define MC_CMD_FREE_BUFTBL_CHUNK 0x89
+#define MC_CMD_FREE_BUFTBL_CHUNK_MSGSET 0x89
#undef MC_CMD_0x89_PRIVILEGE_CTG
#define MC_CMD_0x89_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -10058,6 +11345,7 @@
* Multiplexed MCDI call for filter operations
*/
#define MC_CMD_FILTER_OP 0x8a
+#define MC_CMD_FILTER_OP_MSGSET 0x8a
#undef MC_CMD_0x8a_PRIVILEGE_CTG
#define MC_CMD_0x8a_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -10083,7 +11371,13 @@
#define MC_CMD_FILTER_OP_IN_HANDLE_OFST 4
#define MC_CMD_FILTER_OP_IN_HANDLE_LEN 8
#define MC_CMD_FILTER_OP_IN_HANDLE_LO_OFST 4
+#define MC_CMD_FILTER_OP_IN_HANDLE_LO_LEN 4
+#define MC_CMD_FILTER_OP_IN_HANDLE_LO_LBN 32
+#define MC_CMD_FILTER_OP_IN_HANDLE_LO_WIDTH 32
#define MC_CMD_FILTER_OP_IN_HANDLE_HI_OFST 8
+#define MC_CMD_FILTER_OP_IN_HANDLE_HI_LEN 4
+#define MC_CMD_FILTER_OP_IN_HANDLE_HI_LBN 64
+#define MC_CMD_FILTER_OP_IN_HANDLE_HI_WIDTH 32
/* The port ID associated with the v-adaptor which should contain this filter.
*/
#define MC_CMD_FILTER_OP_IN_PORT_ID_OFST 12
@@ -10239,7 +11533,13 @@
#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_OFST 4
#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_LEN 8
#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_LO_OFST 4
+#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_LO_LEN 4
+#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_LO_LBN 32
+#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_LO_WIDTH 32
#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_HI_OFST 8
+#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_HI_LEN 4
+#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_HI_LBN 64
+#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_HI_WIDTH 32
/* The port ID associated with the v-adaptor which should contain this filter.
*/
#define MC_CMD_FILTER_OP_EXT_IN_PORT_ID_OFST 12
@@ -10518,7 +11818,13 @@
#define MC_CMD_FILTER_OP_V3_IN_HANDLE_OFST 4
#define MC_CMD_FILTER_OP_V3_IN_HANDLE_LEN 8
#define MC_CMD_FILTER_OP_V3_IN_HANDLE_LO_OFST 4
+#define MC_CMD_FILTER_OP_V3_IN_HANDLE_LO_LEN 4
+#define MC_CMD_FILTER_OP_V3_IN_HANDLE_LO_LBN 32
+#define MC_CMD_FILTER_OP_V3_IN_HANDLE_LO_WIDTH 32
#define MC_CMD_FILTER_OP_V3_IN_HANDLE_HI_OFST 8
+#define MC_CMD_FILTER_OP_V3_IN_HANDLE_HI_LEN 4
+#define MC_CMD_FILTER_OP_V3_IN_HANDLE_HI_LBN 64
+#define MC_CMD_FILTER_OP_V3_IN_HANDLE_HI_WIDTH 32
/* The port ID associated with the v-adaptor which should contain this filter.
*/
#define MC_CMD_FILTER_OP_V3_IN_PORT_ID_OFST 12
@@ -10779,15 +12085,15 @@
*/
#define MC_CMD_FILTER_OP_V3_IN_IFRM_DST_IP_OFST 156
#define MC_CMD_FILTER_OP_V3_IN_IFRM_DST_IP_LEN 16
-/* Flags controlling mutations of the user_mark and user_flag fields of
- * matching packets, with logic as follows: if (req.MATCH_BITOR_FLAG == 1)
- * user_flag = req.MATCH_SET_FLAG bit_or user_flag; else user_flag =
- * req.MATCH_SET_FLAG; if (req.MATCH_SET_MARK == 0) user_mark = 0; else if
- * (req.MATCH_BITOR_MARK == 1) user_mark = req.MATCH_SET_MARK bit_or user_mark;
- * else user_mark = req.MATCH_SET_MARK; N.B. These flags overlap with the
- * MATCH_ACTION field, which is deprecated in favour of this field. For the
- * cases where these flags induce a valid encoding of the MATCH_ACTION field,
- * the semantics agree.
+/* Flags controlling mutations of the packet and/or metadata when the filter is
+ * matched. The user_mark and user_flag fields' logic is as follows: if
+ * (req.MATCH_BITOR_FLAG == 1) user_flag = req.MATCH_SET_FLAG bit_or user_flag;
+ * else user_flag = req.MATCH_SET_FLAG; if (req.MATCH_SET_MARK == 0) user_mark
+ * = 0; else if (req.MATCH_BITOR_MARK == 1) user_mark = req.MATCH_SET_MARK
+ * bit_or user_mark; else user_mark = req.MATCH_SET_MARK; N.B. These flags
+ * overlap with the MATCH_ACTION field, which is deprecated in favour of this
+ * field. For the cases where these flags induce a valid encoding of the
+ * MATCH_ACTION field, the semantics agree.
*/
#define MC_CMD_FILTER_OP_V3_IN_MATCH_ACTION_FLAGS_OFST 172
#define MC_CMD_FILTER_OP_V3_IN_MATCH_ACTION_FLAGS_LEN 4
@@ -10803,6 +12109,9 @@
#define MC_CMD_FILTER_OP_V3_IN_MATCH_BITOR_MARK_OFST 172
#define MC_CMD_FILTER_OP_V3_IN_MATCH_BITOR_MARK_LBN 3
#define MC_CMD_FILTER_OP_V3_IN_MATCH_BITOR_MARK_WIDTH 1
+#define MC_CMD_FILTER_OP_V3_IN_MATCH_STRIP_VLAN_OFST 172
+#define MC_CMD_FILTER_OP_V3_IN_MATCH_STRIP_VLAN_LBN 4
+#define MC_CMD_FILTER_OP_V3_IN_MATCH_STRIP_VLAN_WIDTH 1
/* Deprecated: the overlapping MATCH_ACTION_FLAGS field exposes all of the
* functionality of this field in an ABI-backwards-compatible manner, and
* should be used instead. Any future extensions should be made to the
@@ -10848,7 +12157,13 @@
#define MC_CMD_FILTER_OP_OUT_HANDLE_OFST 4
#define MC_CMD_FILTER_OP_OUT_HANDLE_LEN 8
#define MC_CMD_FILTER_OP_OUT_HANDLE_LO_OFST 4
+#define MC_CMD_FILTER_OP_OUT_HANDLE_LO_LEN 4
+#define MC_CMD_FILTER_OP_OUT_HANDLE_LO_LBN 32
+#define MC_CMD_FILTER_OP_OUT_HANDLE_LO_WIDTH 32
#define MC_CMD_FILTER_OP_OUT_HANDLE_HI_OFST 8
+#define MC_CMD_FILTER_OP_OUT_HANDLE_HI_LEN 4
+#define MC_CMD_FILTER_OP_OUT_HANDLE_HI_LBN 64
+#define MC_CMD_FILTER_OP_OUT_HANDLE_HI_WIDTH 32
/* enum: guaranteed invalid filter handle (low 32 bits) */
#define MC_CMD_FILTER_OP_OUT_HANDLE_LO_INVALID 0xffffffff
/* enum: guaranteed invalid filter handle (high 32 bits) */
@@ -10868,7 +12183,13 @@
#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_OFST 4
#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_LEN 8
#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_LO_OFST 4
+#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_LO_LEN 4
+#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_LO_LBN 32
+#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_LO_WIDTH 32
#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_HI_OFST 8
+#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_HI_LEN 4
+#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_HI_LBN 64
+#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_HI_WIDTH 32
/* Enum values, see field(s): */
/* MC_CMD_FILTER_OP_OUT/HANDLE */
@@ -10878,6 +12199,7 @@
* Get information related to the parser-dispatcher subsystem
*/
#define MC_CMD_GET_PARSER_DISP_INFO 0xe4
+#define MC_CMD_GET_PARSER_DISP_INFO_MSGSET 0xe4
#undef MC_CMD_0xe4_PRIVILEGE_CTG
#define MC_CMD_0xe4_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11025,6 +12347,7 @@
* permitted.
*/
#define MC_CMD_PARSER_DISP_RW 0xe5
+#define MC_CMD_PARSER_DISP_RW_MSGSET 0xe5
#undef MC_CMD_0xe5_PRIVILEGE_CTG
#define MC_CMD_0xe5_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -11115,6 +12438,7 @@
* Get number of PFs on the device.
*/
#define MC_CMD_GET_PF_COUNT 0xb6
+#define MC_CMD_GET_PF_COUNT_MSGSET 0xb6
#undef MC_CMD_0xb6_PRIVILEGE_CTG
#define MC_CMD_0xb6_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11134,6 +12458,7 @@
* Set number of PFs on the device.
*/
#define MC_CMD_SET_PF_COUNT 0xb7
+#define MC_CMD_SET_PF_COUNT_MSGSET 0xb7
/* MC_CMD_SET_PF_COUNT_IN msgrequest */
#define MC_CMD_SET_PF_COUNT_IN_LEN 4
@@ -11150,6 +12475,7 @@
* Get port assignment for current PCI function.
*/
#define MC_CMD_GET_PORT_ASSIGNMENT 0xb8
+#define MC_CMD_GET_PORT_ASSIGNMENT_MSGSET 0xb8
#undef MC_CMD_0xb8_PRIVILEGE_CTG
#define MC_CMD_0xb8_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11175,6 +12501,7 @@
* Set port assignment for current PCI function.
*/
#define MC_CMD_SET_PORT_ASSIGNMENT 0xb9
+#define MC_CMD_SET_PORT_ASSIGNMENT_MSGSET 0xb9
#undef MC_CMD_0xb9_PRIVILEGE_CTG
#define MC_CMD_0xb9_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -11194,6 +12521,7 @@
* Allocate VIs for current PCI function.
*/
#define MC_CMD_ALLOC_VIS 0x8b
+#define MC_CMD_ALLOC_VIS_MSGSET 0x8b
#undef MC_CMD_0x8b_PRIVILEGE_CTG
#define MC_CMD_0x8b_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11241,6 +12569,7 @@
* but not freed.
*/
#define MC_CMD_FREE_VIS 0x8c
+#define MC_CMD_FREE_VIS_MSGSET 0x8c
#undef MC_CMD_0x8c_PRIVILEGE_CTG
#define MC_CMD_0x8c_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11257,6 +12586,7 @@
* Get SRIOV config for this PF.
*/
#define MC_CMD_GET_SRIOV_CFG 0xba
+#define MC_CMD_GET_SRIOV_CFG_MSGSET 0xba
#undef MC_CMD_0xba_PRIVILEGE_CTG
#define MC_CMD_0xba_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11290,6 +12620,7 @@
* Set SRIOV config for this PF.
*/
#define MC_CMD_SET_SRIOV_CFG 0xbb
+#define MC_CMD_SET_SRIOV_CFG_MSGSET 0xbb
#undef MC_CMD_0xbb_PRIVILEGE_CTG
#define MC_CMD_0xbb_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -11325,9 +12656,11 @@
/***********************************/
/* MC_CMD_GET_VI_ALLOC_INFO
* Get information about number of VI's and base VI number allocated to this
- * function.
+ * function. This message is not available to dynamic clients created by
+ * MC_CMD_CLIENT_ALLOC.
*/
#define MC_CMD_GET_VI_ALLOC_INFO 0x8d
+#define MC_CMD_GET_VI_ALLOC_INFO_MSGSET 0x8d
#undef MC_CMD_0x8d_PRIVILEGE_CTG
#define MC_CMD_0x8d_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11352,9 +12685,12 @@
/***********************************/
/* MC_CMD_DUMP_VI_STATE
- * For CmdClient use. Dump pertinent information on a specific absolute VI.
+ * For CmdClient use. Dump pertinent information on a specific absolute VI. The
+ * VI must be owned by the calling client or one of its ancestors; usership of
+ * the VI (as set by MC_CMD_SET_VI_USER) is not sufficient.
*/
#define MC_CMD_DUMP_VI_STATE 0x8e
+#define MC_CMD_DUMP_VI_STATE_MSGSET 0x8e
#undef MC_CMD_0x8e_PRIVILEGE_CTG
#define MC_CMD_0x8e_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11366,7 +12702,7 @@
#define MC_CMD_DUMP_VI_STATE_IN_VI_NUMBER_LEN 4
/* MC_CMD_DUMP_VI_STATE_OUT msgresponse */
-#define MC_CMD_DUMP_VI_STATE_OUT_LEN 96
+#define MC_CMD_DUMP_VI_STATE_OUT_LEN 100
/* The PF part of the function owning this VI. */
#define MC_CMD_DUMP_VI_STATE_OUT_OWNER_PF_OFST 0
#define MC_CMD_DUMP_VI_STATE_OUT_OWNER_PF_LEN 2
@@ -11389,12 +12725,24 @@
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_OFST 12
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_LO_OFST 12
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_LO_LBN 96
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_HI_OFST 16
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_HI_LBN 128
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_HI_WIDTH 32
/* Raw evq timer table data. */
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_OFST 20
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_LO_OFST 20
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_LO_LBN 160
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_HI_OFST 24
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_HI_LBN 192
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_HI_WIDTH 32
/* Combined metadata field. */
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_OFST 28
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_LEN 4
@@ -11411,22 +12759,46 @@
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_OFST 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_LO_OFST 32
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_LO_LBN 256
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_HI_OFST 36
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_HI_LBN 288
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_HI_WIDTH 32
/* TXDPCPU raw table data for queue. */
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_OFST 40
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_LO_OFST 40
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_LO_LBN 320
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_HI_OFST 44
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_HI_LBN 352
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_HI_WIDTH 32
/* TXDPCPU raw table data for queue. */
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_OFST 48
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_LO_OFST 48
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_LO_LBN 384
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_HI_OFST 52
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_HI_LBN 416
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_HI_WIDTH 32
/* Combined metadata field. */
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_OFST 56
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_LO_OFST 56
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_LO_LBN 448
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_HI_OFST 60
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_HI_LBN 480
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_HI_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_BUFS_BASE_OFST 56
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_BUFS_BASE_LBN 0
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_BUFS_BASE_WIDTH 16
@@ -11446,22 +12818,46 @@
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_OFST 64
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_LO_OFST 64
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_LO_LBN 512
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_HI_OFST 68
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_HI_LBN 544
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_HI_WIDTH 32
/* RXDPCPU raw table data for queue. */
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_OFST 72
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_LO_OFST 72
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_LO_LBN 576
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_HI_OFST 76
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_HI_LBN 608
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_HI_WIDTH 32
/* Reserved, currently 0. */
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_OFST 80
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_LO_OFST 80
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_LO_LBN 640
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_HI_OFST 84
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_HI_LBN 672
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_HI_WIDTH 32
/* Combined metadata field. */
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_OFST 88
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_LO_OFST 88
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_LO_LBN 704
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_HI_OFST 92
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_HI_LBN 736
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_HI_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_BUFS_BASE_OFST 88
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_BUFS_BASE_LBN 0
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_BUFS_BASE_WIDTH 16
@@ -11474,6 +12870,9 @@
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_WAITCOUNT_OFST 88
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_WAITCOUNT_LBN 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_WAITCOUNT_WIDTH 8
+/* Current user, as assigned by MC_CMD_SET_VI_USER. */
+#define MC_CMD_DUMP_VI_STATE_OUT_USER_CLIENT_ID_OFST 96
+#define MC_CMD_DUMP_VI_STATE_OUT_USER_CLIENT_ID_LEN 4
/***********************************/
@@ -11481,6 +12880,7 @@
* Allocate a push I/O buffer for later use with a tx queue.
*/
#define MC_CMD_ALLOC_PIOBUF 0x8f
+#define MC_CMD_ALLOC_PIOBUF_MSGSET 0x8f
#undef MC_CMD_0x8f_PRIVILEGE_CTG
#define MC_CMD_0x8f_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -11500,6 +12900,7 @@
* Free a push I/O buffer.
*/
#define MC_CMD_FREE_PIOBUF 0x90
+#define MC_CMD_FREE_PIOBUF_MSGSET 0x90
#undef MC_CMD_0x90_PRIVILEGE_CTG
#define MC_CMD_0x90_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -11516,9 +12917,12 @@
/***********************************/
/* MC_CMD_GET_VI_TLP_PROCESSING
- * Get TLP steering and ordering information for a VI.
+ * Get TLP steering and ordering information for a VI. The caller must have the
+ * GRP_FUNC_DMA privilege and must be the currently-assigned user of this VI or
+ * an ancestor of the current user (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_GET_VI_TLP_PROCESSING 0xb0
+#define MC_CMD_GET_VI_TLP_PROCESSING_MSGSET 0xb0
#undef MC_CMD_0xb0_PRIVILEGE_CTG
#define MC_CMD_0xb0_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11555,9 +12959,12 @@
/***********************************/
/* MC_CMD_SET_VI_TLP_PROCESSING
- * Set TLP steering and ordering information for a VI.
+ * Set TLP steering and ordering information for a VI. The caller must have the
+ * GRP_FUNC_DMA privilege and must be the currently-assigned user of this VI or
+ * an ancestor of the current user (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_SET_VI_TLP_PROCESSING 0xb1
+#define MC_CMD_SET_VI_TLP_PROCESSING_MSGSET 0xb1
#undef MC_CMD_0xb1_PRIVILEGE_CTG
#define MC_CMD_0xb1_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11597,6 +13004,7 @@
* Get global PCIe steering and transaction processing configuration.
*/
#define MC_CMD_GET_TLP_PROCESSING_GLOBALS 0xbc
+#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_MSGSET 0xbc
#undef MC_CMD_0xbc_PRIVILEGE_CTG
#define MC_CMD_0xbc_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -11681,6 +13089,7 @@
* Set global PCIe steering and transaction processing configuration.
*/
#define MC_CMD_SET_TLP_PROCESSING_GLOBALS 0xbd
+#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_MSGSET 0xbd
#undef MC_CMD_0xbd_PRIVILEGE_CTG
#define MC_CMD_0xbd_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -11746,6 +13155,7 @@
* Download a new set of images to the satellite CPUs from the host.
*/
#define MC_CMD_SATELLITE_DOWNLOAD 0x91
+#define MC_CMD_SATELLITE_DOWNLOAD_MSGSET 0x91
#undef MC_CMD_0x91_PRIVILEGE_CTG
#define MC_CMD_0x91_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -11873,6 +13283,7 @@
* reference inherent device capabilities as opposed to current NVRAM config.
*/
#define MC_CMD_GET_CAPABILITIES 0xbe
+#define MC_CMD_GET_CAPABILITIES_MSGSET 0xbe
#undef MC_CMD_0xbe_PRIVILEGE_CTG
#define MC_CMD_0xbe_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -14813,6 +16224,18 @@
#define MC_CMD_GET_CAPABILITIES_V7_OUT_UNSOL_EV_CREDIT_SUPPORTED_OFST 148
#define MC_CMD_GET_CAPABILITIES_V7_OUT_UNSOL_EV_CREDIT_SUPPORTED_LBN 7
#define MC_CMD_GET_CAPABILITIES_V7_OUT_UNSOL_EV_CREDIT_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_ENCAPSULATED_MCDI_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_ENCAPSULATED_MCDI_SUPPORTED_LBN 8
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_ENCAPSULATED_MCDI_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_EXTERNAL_MAE_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_EXTERNAL_MAE_SUPPORTED_LBN 9
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_EXTERNAL_MAE_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_LBN 10
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_LBN 11
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_WIDTH 1
/* MC_CMD_GET_CAPABILITIES_V8_OUT msgresponse */
#define MC_CMD_GET_CAPABILITIES_V8_OUT_LEN 160
@@ -15299,6 +16722,18 @@
#define MC_CMD_GET_CAPABILITIES_V8_OUT_UNSOL_EV_CREDIT_SUPPORTED_OFST 148
#define MC_CMD_GET_CAPABILITIES_V8_OUT_UNSOL_EV_CREDIT_SUPPORTED_LBN 7
#define MC_CMD_GET_CAPABILITIES_V8_OUT_UNSOL_EV_CREDIT_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_ENCAPSULATED_MCDI_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_ENCAPSULATED_MCDI_SUPPORTED_LBN 8
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_ENCAPSULATED_MCDI_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_EXTERNAL_MAE_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_EXTERNAL_MAE_SUPPORTED_LBN 9
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_EXTERNAL_MAE_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_LBN 10
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_LBN 11
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_WIDTH 1
/* These bits are reserved for communicating test-specific capabilities to
* host-side test software. All production drivers should treat this field as
* opaque.
@@ -15306,7 +16741,13 @@
#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_OFST 152
#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_LEN 8
#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_LO_OFST 152
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_LO_LEN 4
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_LO_LBN 1216
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_LO_WIDTH 32
#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_HI_OFST 156
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_HI_LEN 4
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_HI_LBN 1248
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_HI_WIDTH 32
/* MC_CMD_GET_CAPABILITIES_V9_OUT msgresponse */
#define MC_CMD_GET_CAPABILITIES_V9_OUT_LEN 184
@@ -15793,6 +17234,18 @@
#define MC_CMD_GET_CAPABILITIES_V9_OUT_UNSOL_EV_CREDIT_SUPPORTED_OFST 148
#define MC_CMD_GET_CAPABILITIES_V9_OUT_UNSOL_EV_CREDIT_SUPPORTED_LBN 7
#define MC_CMD_GET_CAPABILITIES_V9_OUT_UNSOL_EV_CREDIT_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_ENCAPSULATED_MCDI_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_ENCAPSULATED_MCDI_SUPPORTED_LBN 8
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_ENCAPSULATED_MCDI_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_EXTERNAL_MAE_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_EXTERNAL_MAE_SUPPORTED_LBN 9
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_EXTERNAL_MAE_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_LBN 10
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_LBN 11
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_WIDTH 1
/* These bits are reserved for communicating test-specific capabilities to
* host-side test software. All production drivers should treat this field as
* opaque.
@@ -15800,7 +17253,13 @@
#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_OFST 152
#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_LEN 8
#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_LO_OFST 152
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_LO_LEN 4
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_LO_LBN 1216
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_LO_WIDTH 32
#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_HI_OFST 156
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_HI_LEN 4
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_HI_LBN 1248
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_HI_WIDTH 32
/* The minimum size (in table entries) of indirection table to be allocated
* from the pool for an RSS context. Note that the table size used must be a
* power of 2.
@@ -16322,6 +17781,18 @@
#define MC_CMD_GET_CAPABILITIES_V10_OUT_UNSOL_EV_CREDIT_SUPPORTED_OFST 148
#define MC_CMD_GET_CAPABILITIES_V10_OUT_UNSOL_EV_CREDIT_SUPPORTED_LBN 7
#define MC_CMD_GET_CAPABILITIES_V10_OUT_UNSOL_EV_CREDIT_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_ENCAPSULATED_MCDI_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_ENCAPSULATED_MCDI_SUPPORTED_LBN 8
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_ENCAPSULATED_MCDI_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_EXTERNAL_MAE_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_EXTERNAL_MAE_SUPPORTED_LBN 9
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_EXTERNAL_MAE_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_LBN 10
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_LBN 11
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_WIDTH 1
/* These bits are reserved for communicating test-specific capabilities to
* host-side test software. All production drivers should treat this field as
* opaque.
@@ -16329,7 +17800,13 @@
#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_OFST 152
#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_LEN 8
#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_LO_OFST 152
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_LO_LEN 4
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_LO_LBN 1216
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_LO_WIDTH 32
#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_HI_OFST 156
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_HI_LEN 4
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_HI_LBN 1248
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_HI_WIDTH 32
/* The minimum size (in table entries) of indirection table to be allocated
* from the pool for an RSS context. Note that the table size used must be a
* power of 2.
@@ -16386,6 +17863,7 @@
* Encapsulation for a v2 extended command
*/
#define MC_CMD_V2_EXTN 0x7f
+#define MC_CMD_V2_EXTN_MSGSET 0x7f
/* MC_CMD_V2_EXTN_IN msgrequest */
#define MC_CMD_V2_EXTN_IN_LEN 4
@@ -16417,6 +17895,7 @@
* Allocate a pacer bucket (for qau rp or a snapper test)
*/
#define MC_CMD_TCM_BUCKET_ALLOC 0xb2
+#define MC_CMD_TCM_BUCKET_ALLOC_MSGSET 0xb2
#undef MC_CMD_0xb2_PRIVILEGE_CTG
#define MC_CMD_0xb2_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16436,6 +17915,7 @@
* Free a pacer bucket
*/
#define MC_CMD_TCM_BUCKET_FREE 0xb3
+#define MC_CMD_TCM_BUCKET_FREE_MSGSET 0xb3
#undef MC_CMD_0xb3_PRIVILEGE_CTG
#define MC_CMD_0xb3_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16455,6 +17935,7 @@
* Initialise pacer bucket with a given rate
*/
#define MC_CMD_TCM_BUCKET_INIT 0xb4
+#define MC_CMD_TCM_BUCKET_INIT_MSGSET 0xb4
#undef MC_CMD_0xb4_PRIVILEGE_CTG
#define MC_CMD_0xb4_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16489,6 +17970,7 @@
* Initialise txq in pacer with given options or set options
*/
#define MC_CMD_TCM_TXQ_INIT 0xb5
+#define MC_CMD_TCM_TXQ_INIT_MSGSET 0xb5
#undef MC_CMD_0xb5_PRIVILEGE_CTG
#define MC_CMD_0xb5_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16579,6 +18061,7 @@
* Link a push I/O buffer to a TxQ
*/
#define MC_CMD_LINK_PIOBUF 0x92
+#define MC_CMD_LINK_PIOBUF_MSGSET 0x92
#undef MC_CMD_0x92_PRIVILEGE_CTG
#define MC_CMD_0x92_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -16588,7 +18071,7 @@
/* Handle for allocated push I/O buffer. */
#define MC_CMD_LINK_PIOBUF_IN_PIOBUF_HANDLE_OFST 0
#define MC_CMD_LINK_PIOBUF_IN_PIOBUF_HANDLE_LEN 4
-/* Function Local Instance (VI) number. */
+/* Function Local Instance (VI) number which has a TxQ allocated to it. */
#define MC_CMD_LINK_PIOBUF_IN_TXQ_INSTANCE_OFST 4
#define MC_CMD_LINK_PIOBUF_IN_TXQ_INSTANCE_LEN 4
@@ -16601,6 +18084,7 @@
* Unlink a push I/O buffer from a TxQ
*/
#define MC_CMD_UNLINK_PIOBUF 0x93
+#define MC_CMD_UNLINK_PIOBUF_MSGSET 0x93
#undef MC_CMD_0x93_PRIVILEGE_CTG
#define MC_CMD_0x93_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -16620,6 +18104,7 @@
* allocate and initialise a v-switch.
*/
#define MC_CMD_VSWITCH_ALLOC 0x94
+#define MC_CMD_VSWITCH_ALLOC_MSGSET 0x94
#undef MC_CMD_0x94_PRIVILEGE_CTG
#define MC_CMD_0x94_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16667,6 +18152,7 @@
* de-allocate a v-switch.
*/
#define MC_CMD_VSWITCH_FREE 0x95
+#define MC_CMD_VSWITCH_FREE_MSGSET 0x95
#undef MC_CMD_0x95_PRIVILEGE_CTG
#define MC_CMD_0x95_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16688,6 +18174,7 @@
* not, then the command returns ENOENT).
*/
#define MC_CMD_VSWITCH_QUERY 0x63
+#define MC_CMD_VSWITCH_QUERY_MSGSET 0x63
#undef MC_CMD_0x63_PRIVILEGE_CTG
#define MC_CMD_0x63_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16707,6 +18194,7 @@
* allocate a v-port.
*/
#define MC_CMD_VPORT_ALLOC 0x96
+#define MC_CMD_VPORT_ALLOC_MSGSET 0x96
#undef MC_CMD_0x96_PRIVILEGE_CTG
#define MC_CMD_0x96_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16774,6 +18262,7 @@
* de-allocate a v-port.
*/
#define MC_CMD_VPORT_FREE 0x97
+#define MC_CMD_VPORT_FREE_MSGSET 0x97
#undef MC_CMD_0x97_PRIVILEGE_CTG
#define MC_CMD_0x97_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16793,6 +18282,7 @@
* allocate a v-adaptor.
*/
#define MC_CMD_VADAPTOR_ALLOC 0x98
+#define MC_CMD_VADAPTOR_ALLOC_MSGSET 0x98
#undef MC_CMD_0x98_PRIVILEGE_CTG
#define MC_CMD_0x98_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16841,6 +18331,7 @@
* de-allocate a v-adaptor.
*/
#define MC_CMD_VADAPTOR_FREE 0x99
+#define MC_CMD_VADAPTOR_FREE_MSGSET 0x99
#undef MC_CMD_0x99_PRIVILEGE_CTG
#define MC_CMD_0x99_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16860,6 +18351,7 @@
* assign a new MAC address to a v-adaptor.
*/
#define MC_CMD_VADAPTOR_SET_MAC 0x5d
+#define MC_CMD_VADAPTOR_SET_MAC_MSGSET 0x5d
#undef MC_CMD_0x5d_PRIVILEGE_CTG
#define MC_CMD_0x5d_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16882,6 +18374,7 @@
* read the MAC address assigned to a v-adaptor.
*/
#define MC_CMD_VADAPTOR_GET_MAC 0x5e
+#define MC_CMD_VADAPTOR_GET_MAC_MSGSET 0x5e
#undef MC_CMD_0x5e_PRIVILEGE_CTG
#define MC_CMD_0x5e_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16904,6 +18397,7 @@
* read some config of v-adaptor.
*/
#define MC_CMD_VADAPTOR_QUERY 0x61
+#define MC_CMD_VADAPTOR_QUERY_MSGSET 0x61
#undef MC_CMD_0x61_PRIVILEGE_CTG
#define MC_CMD_0x61_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16932,6 +18426,7 @@
* assign a port to a PCI function.
*/
#define MC_CMD_EVB_PORT_ASSIGN 0x9a
+#define MC_CMD_EVB_PORT_ASSIGN_MSGSET 0x9a
#undef MC_CMD_0x9a_PRIVILEGE_CTG
#define MC_CMD_0x9a_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16960,6 +18455,7 @@
* Assign the 64 bit region addresses.
*/
#define MC_CMD_RDWR_A64_REGIONS 0x9b
+#define MC_CMD_RDWR_A64_REGIONS_MSGSET 0x9b
#undef MC_CMD_0x9b_PRIVILEGE_CTG
#define MC_CMD_0x9b_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -16999,6 +18495,7 @@
* Allocate an Onload stack ID.
*/
#define MC_CMD_ONLOAD_STACK_ALLOC 0x9c
+#define MC_CMD_ONLOAD_STACK_ALLOC_MSGSET 0x9c
#undef MC_CMD_0x9c_PRIVILEGE_CTG
#define MC_CMD_0x9c_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -17021,6 +18518,7 @@
* Free an Onload stack ID.
*/
#define MC_CMD_ONLOAD_STACK_FREE 0x9d
+#define MC_CMD_ONLOAD_STACK_FREE_MSGSET 0x9d
#undef MC_CMD_0x9d_PRIVILEGE_CTG
#define MC_CMD_0x9d_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -17040,6 +18538,7 @@
* Allocate an RSS context.
*/
#define MC_CMD_RSS_CONTEXT_ALLOC 0x9e
+#define MC_CMD_RSS_CONTEXT_ALLOC_MSGSET 0x9e
#undef MC_CMD_0x9e_PRIVILEGE_CTG
#define MC_CMD_0x9e_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17140,6 +18639,7 @@
* Free an RSS context.
*/
#define MC_CMD_RSS_CONTEXT_FREE 0x9f
+#define MC_CMD_RSS_CONTEXT_FREE_MSGSET 0x9f
#undef MC_CMD_0x9f_PRIVILEGE_CTG
#define MC_CMD_0x9f_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17159,6 +18659,7 @@
* Set the Toeplitz hash key for an RSS context.
*/
#define MC_CMD_RSS_CONTEXT_SET_KEY 0xa0
+#define MC_CMD_RSS_CONTEXT_SET_KEY_MSGSET 0xa0
#undef MC_CMD_0xa0_PRIVILEGE_CTG
#define MC_CMD_0xa0_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17181,6 +18682,7 @@
* Get the Toeplitz hash key for an RSS context.
*/
#define MC_CMD_RSS_CONTEXT_GET_KEY 0xa1
+#define MC_CMD_RSS_CONTEXT_GET_KEY_MSGSET 0xa1
#undef MC_CMD_0xa1_PRIVILEGE_CTG
#define MC_CMD_0xa1_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17205,6 +18707,7 @@
* when the RSS context is allocated without specifying a table size.
*/
#define MC_CMD_RSS_CONTEXT_SET_TABLE 0xa2
+#define MC_CMD_RSS_CONTEXT_SET_TABLE_MSGSET 0xa2
#undef MC_CMD_0xa2_PRIVILEGE_CTG
#define MC_CMD_0xa2_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17229,6 +18732,7 @@
* when the RSS context is allocated without specifying a table size.
*/
#define MC_CMD_RSS_CONTEXT_GET_TABLE 0xa3
+#define MC_CMD_RSS_CONTEXT_GET_TABLE_MSGSET 0xa3
#undef MC_CMD_0xa3_PRIVILEGE_CTG
#define MC_CMD_0xa3_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17253,6 +18757,7 @@
* RSS_SELECTABLE_TABLE_SIZE bit is set in MC_CMD_GET_CAPABILITIES.
*/
#define MC_CMD_RSS_CONTEXT_WRITE_TABLE 0x13e
+#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_MSGSET 0x13e
#undef MC_CMD_0x13e_PRIVILEGE_CTG
#define MC_CMD_0x13e_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17299,6 +18804,7 @@
* RSS_SELECTABLE_TABLE_SIZE bit is set in MC_CMD_GET_CAPABILITIES.
*/
#define MC_CMD_RSS_CONTEXT_READ_TABLE 0x13f
+#define MC_CMD_RSS_CONTEXT_READ_TABLE_MSGSET 0x13f
#undef MC_CMD_0x13f_PRIVILEGE_CTG
#define MC_CMD_0x13f_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17338,6 +18844,7 @@
* Set various control flags for an RSS context.
*/
#define MC_CMD_RSS_CONTEXT_SET_FLAGS 0xe1
+#define MC_CMD_RSS_CONTEXT_SET_FLAGS_MSGSET 0xe1
#undef MC_CMD_0xe1_PRIVILEGE_CTG
#define MC_CMD_0xe1_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17404,6 +18911,7 @@
* Get various control flags for an RSS context.
*/
#define MC_CMD_RSS_CONTEXT_GET_FLAGS 0xe2
+#define MC_CMD_RSS_CONTEXT_GET_FLAGS_MSGSET 0xe2
#undef MC_CMD_0xe2_PRIVILEGE_CTG
#define MC_CMD_0xe2_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17471,6 +18979,7 @@
* Allocate a .1p mapping.
*/
#define MC_CMD_DOT1P_MAPPING_ALLOC 0xa4
+#define MC_CMD_DOT1P_MAPPING_ALLOC_MSGSET 0xa4
#undef MC_CMD_0xa4_PRIVILEGE_CTG
#define MC_CMD_0xa4_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -17504,6 +19013,7 @@
* Free a .1p mapping.
*/
#define MC_CMD_DOT1P_MAPPING_FREE 0xa5
+#define MC_CMD_DOT1P_MAPPING_FREE_MSGSET 0xa5
#undef MC_CMD_0xa5_PRIVILEGE_CTG
#define MC_CMD_0xa5_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -17523,6 +19033,7 @@
* Set the mapping table for a .1p mapping.
*/
#define MC_CMD_DOT1P_MAPPING_SET_TABLE 0xa6
+#define MC_CMD_DOT1P_MAPPING_SET_TABLE_MSGSET 0xa6
#undef MC_CMD_0xa6_PRIVILEGE_CTG
#define MC_CMD_0xa6_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -17547,6 +19058,7 @@
* Get the mapping table for a .1p mapping.
*/
#define MC_CMD_DOT1P_MAPPING_GET_TABLE 0xa7
+#define MC_CMD_DOT1P_MAPPING_GET_TABLE_MSGSET 0xa7
#undef MC_CMD_0xa7_PRIVILEGE_CTG
#define MC_CMD_0xa7_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -17571,6 +19083,7 @@
* Get Interrupt Vector config for this PF.
*/
#define MC_CMD_GET_VECTOR_CFG 0xbf
+#define MC_CMD_GET_VECTOR_CFG_MSGSET 0xbf
#undef MC_CMD_0xbf_PRIVILEGE_CTG
#define MC_CMD_0xbf_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17596,6 +19109,7 @@
* Set Interrupt Vector config for this PF.
*/
#define MC_CMD_SET_VECTOR_CFG 0xc0
+#define MC_CMD_SET_VECTOR_CFG_MSGSET 0xc0
#undef MC_CMD_0xc0_PRIVILEGE_CTG
#define MC_CMD_0xc0_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17623,6 +19137,7 @@
* Add a MAC address to a v-port
*/
#define MC_CMD_VPORT_ADD_MAC_ADDRESS 0xa8
+#define MC_CMD_VPORT_ADD_MAC_ADDRESS_MSGSET 0xa8
#undef MC_CMD_0xa8_PRIVILEGE_CTG
#define MC_CMD_0xa8_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17645,6 +19160,7 @@
* Delete a MAC address from a v-port
*/
#define MC_CMD_VPORT_DEL_MAC_ADDRESS 0xa9
+#define MC_CMD_VPORT_DEL_MAC_ADDRESS_MSGSET 0xa9
#undef MC_CMD_0xa9_PRIVILEGE_CTG
#define MC_CMD_0xa9_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17667,6 +19183,7 @@
* Delete a MAC address from a v-port
*/
#define MC_CMD_VPORT_GET_MAC_ADDRESSES 0xaa
+#define MC_CMD_VPORT_GET_MAC_ADDRESSES_MSGSET 0xaa
#undef MC_CMD_0xaa_PRIVILEGE_CTG
#define MC_CMD_0xaa_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17701,6 +19218,7 @@
* function will be reset before applying the changes.
*/
#define MC_CMD_VPORT_RECONFIGURE 0xeb
+#define MC_CMD_VPORT_RECONFIGURE_MSGSET 0xeb
#undef MC_CMD_0xeb_PRIVILEGE_CTG
#define MC_CMD_0xeb_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17756,6 +19274,7 @@
* read some config of v-port.
*/
#define MC_CMD_EVB_PORT_QUERY 0x62
+#define MC_CMD_EVB_PORT_QUERY_MSGSET 0x62
#undef MC_CMD_0x62_PRIVILEGE_CTG
#define MC_CMD_0x62_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17786,6 +19305,7 @@
* lifted in future.
*/
#define MC_CMD_DUMP_BUFTBL_ENTRIES 0xab
+#define MC_CMD_DUMP_BUFTBL_ENTRIES_MSGSET 0xab
#undef MC_CMD_0xab_PRIVILEGE_CTG
#define MC_CMD_0xab_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -17818,6 +19338,7 @@
* Set global RXDP configuration settings
*/
#define MC_CMD_SET_RXDP_CONFIG 0xc1
+#define MC_CMD_SET_RXDP_CONFIG_MSGSET 0xc1
#undef MC_CMD_0xc1_PRIVILEGE_CTG
#define MC_CMD_0xc1_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -17848,6 +19369,7 @@
* Get global RXDP configuration settings
*/
#define MC_CMD_GET_RXDP_CONFIG 0xc2
+#define MC_CMD_GET_RXDP_CONFIG_MSGSET 0xc2
#undef MC_CMD_0xc2_PRIVILEGE_CTG
#define MC_CMD_0xc2_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17874,6 +19396,7 @@
* Return the system and PDCPU clock frequencies.
*/
#define MC_CMD_GET_CLOCK 0xac
+#define MC_CMD_GET_CLOCK_MSGSET 0xac
#undef MC_CMD_0xac_PRIVILEGE_CTG
#define MC_CMD_0xac_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17896,6 +19419,7 @@
* Control the system and DPCPU clock frequencies. Changes are lost reboot.
*/
#define MC_CMD_SET_CLOCK 0xad
+#define MC_CMD_SET_CLOCK_MSGSET 0xad
#undef MC_CMD_0xad_PRIVILEGE_CTG
#define MC_CMD_0xad_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -17982,6 +19506,7 @@
* Send an arbitrary DPCPU message.
*/
#define MC_CMD_DPCPU_RPC 0xae
+#define MC_CMD_DPCPU_RPC_MSGSET 0xae
#undef MC_CMD_0xae_PRIVILEGE_CTG
#define MC_CMD_0xae_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -18100,6 +19625,7 @@
* Trigger an interrupt by prodding the BIU.
*/
#define MC_CMD_TRIGGER_INTERRUPT 0xe3
+#define MC_CMD_TRIGGER_INTERRUPT_MSGSET 0xe3
#undef MC_CMD_0xe3_PRIVILEGE_CTG
#define MC_CMD_0xe3_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -18119,6 +19645,7 @@
* Special operations to support (for now) shmboot.
*/
#define MC_CMD_SHMBOOT_OP 0xe6
+#define MC_CMD_SHMBOOT_OP_MSGSET 0xe6
#undef MC_CMD_0xe6_PRIVILEGE_CTG
#define MC_CMD_0xe6_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -18140,6 +19667,7 @@
* Read multiple 64bit words from capture block memory
*/
#define MC_CMD_CAP_BLK_READ 0xe7
+#define MC_CMD_CAP_BLK_READ_MSGSET 0xe7
#undef MC_CMD_0xe7_PRIVILEGE_CTG
#define MC_CMD_0xe7_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -18162,7 +19690,13 @@
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_OFST 0
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_LEN 8
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_LO_OFST 0
+#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_LO_LEN 4
+#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_LO_LBN 0
+#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_LO_WIDTH 32
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_HI_OFST 4
+#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_HI_LEN 4
+#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_HI_LBN 32
+#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_HI_WIDTH 32
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_MINNUM 1
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_MAXNUM 31
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_MAXNUM_MCDI2 127
@@ -18173,6 +19707,7 @@
* Take a dump of the DUT state
*/
#define MC_CMD_DUMP_DO 0xe8
+#define MC_CMD_DUMP_DO_MSGSET 0xe8
#undef MC_CMD_0xe8_PRIVILEGE_CTG
#define MC_CMD_0xe8_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -18253,6 +19788,7 @@
* Configure unsolicited dumps
*/
#define MC_CMD_DUMP_CONFIGURE_UNSOLICITED 0xe9
+#define MC_CMD_DUMP_CONFIGURE_UNSOLICITED_MSGSET 0xe9
#undef MC_CMD_0xe9_PRIVILEGE_CTG
#define MC_CMD_0xe9_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -18322,6 +19858,7 @@
* the parameter is out of range.
*/
#define MC_CMD_SET_PSU 0xea
+#define MC_CMD_SET_PSU_MSGSET 0xea
#undef MC_CMD_0xea_PRIVILEGE_CTG
#define MC_CMD_0xea_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -18348,6 +19885,7 @@
* Get function information. PF and VF number.
*/
#define MC_CMD_GET_FUNCTION_INFO 0xec
+#define MC_CMD_GET_FUNCTION_INFO_MSGSET 0xec
#undef MC_CMD_0xec_PRIVILEGE_CTG
#define MC_CMD_0xec_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -18370,6 +19908,7 @@
* reboot.
*/
#define MC_CMD_ENABLE_OFFLINE_BIST 0xed
+#define MC_CMD_ENABLE_OFFLINE_BIST_MSGSET 0xed
#undef MC_CMD_0xed_PRIVILEGE_CTG
#define MC_CMD_0xed_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -18388,6 +19927,7 @@
* forget.
*/
#define MC_CMD_UART_SEND_DATA 0xee
+#define MC_CMD_UART_SEND_DATA_MSGSET 0xee
#undef MC_CMD_0xee_PRIVILEGE_CTG
#define MC_CMD_0xee_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -18426,6 +19966,7 @@
* subject to change and not currently implemented.
*/
#define MC_CMD_UART_RECV_DATA 0xef
+#define MC_CMD_UART_RECV_DATA_MSGSET 0xef
#undef MC_CMD_0xef_PRIVILEGE_CTG
#define MC_CMD_0xef_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -18475,6 +20016,7 @@
* Read data programmed into the device One-Time-Programmable (OTP) Fuses
*/
#define MC_CMD_READ_FUSES 0xf0
+#define MC_CMD_READ_FUSES_MSGSET 0xf0
#undef MC_CMD_0xf0_PRIVILEGE_CTG
#define MC_CMD_0xf0_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -18510,6 +20052,7 @@
* Get or set KR Serdes RXEQ and TX Driver settings
*/
#define MC_CMD_KR_TUNE 0xf1
+#define MC_CMD_KR_TUNE_MSGSET 0xf1
#undef MC_CMD_0xf1_PRIVILEGE_CTG
#define MC_CMD_0xf1_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -19066,6 +20609,7 @@
* Get or set PCIE Serdes RXEQ and TX Driver settings
*/
#define MC_CMD_PCIE_TUNE 0xf2
+#define MC_CMD_PCIE_TUNE_MSGSET 0xf2
#undef MC_CMD_0xf2_PRIVILEGE_CTG
#define MC_CMD_0xf2_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -19323,6 +20867,7 @@
* - not used for V3 licensing
*/
#define MC_CMD_LICENSING 0xf3
+#define MC_CMD_LICENSING_MSGSET 0xf3
#undef MC_CMD_0xf3_PRIVILEGE_CTG
#define MC_CMD_0xf3_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19379,6 +20924,7 @@
* - V3 licensing (Medford)
*/
#define MC_CMD_LICENSING_V3 0xd0
+#define MC_CMD_LICENSING_V3_MSGSET 0xd0
#undef MC_CMD_0xd0_PRIVILEGE_CTG
#define MC_CMD_0xd0_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19429,7 +20975,13 @@
#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_OFST 24
#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_LEN 8
#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_LO_OFST 24
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_LO_LEN 4
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_LO_LBN 192
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_LO_WIDTH 32
#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_HI_OFST 28
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_HI_LEN 4
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_HI_LBN 224
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_HI_WIDTH 32
/* reserved for future use */
#define MC_CMD_LICENSING_V3_OUT_RESERVED_0_OFST 32
#define MC_CMD_LICENSING_V3_OUT_RESERVED_0_LEN 24
@@ -19437,7 +20989,13 @@
#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_OFST 56
#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_LEN 8
#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_LO_OFST 56
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_LO_LEN 4
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_LO_LBN 448
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_LO_WIDTH 32
#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_HI_OFST 60
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_HI_LEN 4
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_HI_LBN 480
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_HI_WIDTH 32
/* reserved for future use */
#define MC_CMD_LICENSING_V3_OUT_RESERVED_1_OFST 64
#define MC_CMD_LICENSING_V3_OUT_RESERVED_1_LEN 24
@@ -19449,6 +21007,7 @@
* partition - V3 licensing (Medford)
*/
#define MC_CMD_LICENSING_GET_ID_V3 0xd1
+#define MC_CMD_LICENSING_GET_ID_V3_MSGSET 0xd1
#undef MC_CMD_0xd1_PRIVILEGE_CTG
#define MC_CMD_0xd1_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19482,6 +21041,7 @@
* This will fail on a single-core system.
*/
#define MC_CMD_MC2MC_PROXY 0xf4
+#define MC_CMD_MC2MC_PROXY_MSGSET 0xf4
#undef MC_CMD_0xf4_PRIVILEGE_CTG
#define MC_CMD_0xf4_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19500,6 +21060,7 @@
* or a reboot of the MC.) Not used for V3 licensing
*/
#define MC_CMD_GET_LICENSED_APP_STATE 0xf5
+#define MC_CMD_GET_LICENSED_APP_STATE_MSGSET 0xf5
#undef MC_CMD_0xf5_PRIVILEGE_CTG
#define MC_CMD_0xf5_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19528,6 +21089,7 @@
* operation or a reboot of the MC.) Used for V3 licensing (Medford)
*/
#define MC_CMD_GET_LICENSED_V3_APP_STATE 0xd2
+#define MC_CMD_GET_LICENSED_V3_APP_STATE_MSGSET 0xd2
#undef MC_CMD_0xd2_PRIVILEGE_CTG
#define MC_CMD_0xd2_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19540,7 +21102,13 @@
#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_OFST 0
#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_LEN 8
#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_LO_OFST 0
+#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_LO_LEN 4
+#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_LO_LBN 0
+#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_LO_WIDTH 32
#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_HI_OFST 4
+#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_HI_LEN 4
+#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_HI_LBN 32
+#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_HI_WIDTH 32
/* MC_CMD_GET_LICENSED_V3_APP_STATE_OUT msgresponse */
#define MC_CMD_GET_LICENSED_V3_APP_STATE_OUT_LEN 4
@@ -19560,6 +21128,7 @@
* operation or a reboot of the MC.) Used for V3 licensing (Medford)
*/
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES 0xd3
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_MSGSET 0xd3
#undef MC_CMD_0xd3_PRIVILEGE_CTG
#define MC_CMD_0xd3_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19572,7 +21141,13 @@
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_OFST 0
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_LEN 8
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_LO_OFST 0
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_LO_LEN 4
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_LO_LBN 0
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_LO_WIDTH 32
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_HI_OFST 4
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_HI_LEN 4
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_HI_LBN 32
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_HI_WIDTH 32
/* MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT msgresponse */
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_LEN 8
@@ -19580,7 +21155,13 @@
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_OFST 0
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_LEN 8
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_LO_OFST 0
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_LO_LEN 4
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_LO_LBN 0
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_LO_WIDTH 32
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_HI_OFST 4
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_HI_LEN 4
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_HI_LBN 32
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_HI_WIDTH 32
/***********************************/
@@ -19589,6 +21170,7 @@
* licensing.
*/
#define MC_CMD_LICENSED_APP_OP 0xf6
+#define MC_CMD_LICENSED_APP_OP_MSGSET 0xf6
#undef MC_CMD_0xf6_PRIVILEGE_CTG
#define MC_CMD_0xf6_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19672,6 +21254,7 @@
* (Medford)
*/
#define MC_CMD_LICENSED_V3_VALIDATE_APP 0xd4
+#define MC_CMD_LICENSED_V3_VALIDATE_APP_MSGSET 0xd4
#undef MC_CMD_0xd4_PRIVILEGE_CTG
#define MC_CMD_0xd4_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19685,7 +21268,13 @@
#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_OFST 48
#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_LEN 8
#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_LO_OFST 48
+#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_LO_LEN 4
+#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_LO_LBN 384
+#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_LO_WIDTH 32
#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_HI_OFST 52
+#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_HI_LEN 4
+#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_HI_LBN 416
+#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_HI_WIDTH 32
/* MC_CMD_LICENSED_V3_VALIDATE_APP_OUT msgresponse */
#define MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_LEN 116
@@ -19725,6 +21314,7 @@
* Mask features - V3 licensing (Medford)
*/
#define MC_CMD_LICENSED_V3_MASK_FEATURES 0xd5
+#define MC_CMD_LICENSED_V3_MASK_FEATURES_MSGSET 0xd5
#undef MC_CMD_0xd5_PRIVILEGE_CTG
#define MC_CMD_0xd5_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -19735,7 +21325,13 @@
#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_OFST 0
#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_LEN 8
#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_LO_OFST 0
+#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_LO_LEN 4
+#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_LO_LBN 0
+#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_LO_WIDTH 32
#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_HI_OFST 4
+#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_HI_LEN 4
+#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_HI_LBN 32
+#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_HI_WIDTH 32
/* whether to turn on or turn off the masked features */
#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_FLAG_OFST 8
#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_FLAG_LEN 4
@@ -19757,6 +21353,7 @@
* erased when the adapter is power cycled
*/
#define MC_CMD_LICENSING_V3_TEMPORARY 0xd6
+#define MC_CMD_LICENSING_V3_TEMPORARY_MSGSET 0xd6
#undef MC_CMD_0xd6_PRIVILEGE_CTG
#define MC_CMD_0xd6_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -19815,7 +21412,13 @@
#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_OFST 4
#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_LEN 8
#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_LO_OFST 4
+#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_LO_LEN 4
+#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_LO_LBN 32
+#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_LO_WIDTH 32
#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_HI_OFST 8
+#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_HI_LEN 4
+#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_HI_LBN 64
+#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_HI_WIDTH 32
/***********************************/
@@ -19827,6 +21430,7 @@
* delivered to a specific queue, or a set of queues with RSS.
*/
#define MC_CMD_SET_PORT_SNIFF_CONFIG 0xf7
+#define MC_CMD_SET_PORT_SNIFF_CONFIG_MSGSET 0xf7
#undef MC_CMD_0xf7_PRIVILEGE_CTG
#define MC_CMD_0xf7_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -19870,6 +21474,7 @@
* the configuration.
*/
#define MC_CMD_GET_PORT_SNIFF_CONFIG 0xf8
+#define MC_CMD_GET_PORT_SNIFF_CONFIG_MSGSET 0xf8
#undef MC_CMD_0xf8_PRIVILEGE_CTG
#define MC_CMD_0xf8_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19908,6 +21513,7 @@
* Change configuration related to the parser-dispatcher subsystem.
*/
#define MC_CMD_SET_PARSER_DISP_CONFIG 0xf9
+#define MC_CMD_SET_PARSER_DISP_CONFIG_MSGSET 0xf9
#undef MC_CMD_0xf9_PRIVILEGE_CTG
#define MC_CMD_0xf9_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19953,6 +21559,7 @@
* Read configuration related to the parser-dispatcher subsystem.
*/
#define MC_CMD_GET_PARSER_DISP_CONFIG 0xfa
+#define MC_CMD_GET_PARSER_DISP_CONFIG_MSGSET 0xfa
#undef MC_CMD_0xfa_PRIVILEGE_CTG
#define MC_CMD_0xfa_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19997,6 +21604,7 @@
* dedicated as TX sniff receivers.
*/
#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG 0xfb
+#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG_MSGSET 0xfb
#undef MC_CMD_0xfb_PRIVILEGE_CTG
#define MC_CMD_0xfb_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -20037,6 +21645,7 @@
* the configuration.
*/
#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG 0xfc
+#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG_MSGSET 0xfc
#undef MC_CMD_0xfc_PRIVILEGE_CTG
#define MC_CMD_0xfc_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -20072,6 +21681,7 @@
* Per queue rx error stats.
*/
#define MC_CMD_RMON_STATS_RX_ERRORS 0xfe
+#define MC_CMD_RMON_STATS_RX_ERRORS_MSGSET 0xfe
#undef MC_CMD_0xfe_PRIVILEGE_CTG
#define MC_CMD_0xfe_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -20104,6 +21714,7 @@
* Find out about available PCIE resources
*/
#define MC_CMD_GET_PCIE_RESOURCE_INFO 0xfd
+#define MC_CMD_GET_PCIE_RESOURCE_INFO_MSGSET 0xfd
#undef MC_CMD_0xfd_PRIVILEGE_CTG
#define MC_CMD_0xfd_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -20143,6 +21754,7 @@
* Find out about available port modes
*/
#define MC_CMD_GET_PORT_MODES 0xff
+#define MC_CMD_GET_PORT_MODES_MSGSET 0xff
#undef MC_CMD_0xff_PRIVILEGE_CTG
#define MC_CMD_0xff_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -20199,6 +21811,7 @@
* the new port mode, as the override does not affect PF configuration.
*/
#define MC_CMD_OVERRIDE_PORT_MODE 0x137
+#define MC_CMD_OVERRIDE_PORT_MODE_MSGSET 0x137
#undef MC_CMD_0x137_PRIVILEGE_CTG
#define MC_CMD_0x137_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -20223,6 +21836,7 @@
* Sample voltages on the ATB
*/
#define MC_CMD_READ_ATB 0x100
+#define MC_CMD_READ_ATB_MSGSET 0x100
#undef MC_CMD_0x100_PRIVILEGE_CTG
#define MC_CMD_0x100_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20253,6 +21867,7 @@
* enums here must correspond with those in MC_CMD_WORKAROUND.
*/
#define MC_CMD_GET_WORKAROUNDS 0x59
+#define MC_CMD_GET_WORKAROUNDS_MSGSET 0x59
#undef MC_CMD_0x59_PRIVILEGE_CTG
#define MC_CMD_0x59_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -20290,6 +21905,7 @@
* Read/set privileges of an arbitrary PCIe function
*/
#define MC_CMD_PRIVILEGE_MASK 0x5a
+#define MC_CMD_PRIVILEGE_MASK_MSGSET 0x5a
#undef MC_CMD_0x5a_PRIVILEGE_CTG
#define MC_CMD_0x5a_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -20351,6 +21967,20 @@
#define MC_CMD_PRIVILEGE_MASK_IN_GRP_ADMIN_TSA_UNBOUND 0x8000
/* enum: Control the Match-Action Engine if present. See mcdi_mae.yml. */
#define MC_CMD_PRIVILEGE_MASK_IN_GRP_MAE 0x10000
+/* enum: This Function/client may call MC_CMD_CLIENT_ALLOC to create new
+ * dynamic client children of itself.
+ */
+#define MC_CMD_PRIVILEGE_MASK_IN_GRP_ALLOC_CLIENT 0x20000
+/* enum: A dynamic client with this privilege may perform all the same DMA
+ * operations as the function client from which it is descended.
+ */
+#define MC_CMD_PRIVILEGE_MASK_IN_GRP_FUNC_DMA 0x40000
+/* enum: A client with this privilege may perform DMA as any PCIe function on
+ * the device and to on-device DDR. It allows clients to use TX-DESC2CMPT-DESC
+ * descriptors, and to use TX-SEG-DESC and TX-MEM2MEM-DESC with an address
+ * space override (i.e. with the ADDR_SPC_EN bit set).
+ */
+#define MC_CMD_PRIVILEGE_MASK_IN_GRP_ARBITRARY_DMA 0x80000
/* enum: Set this bit to indicate that a new privilege mask is to be set,
* otherwise the command will only read the existing mask.
*/
@@ -20368,6 +21998,7 @@
* Read/set link state mode of a VF
*/
#define MC_CMD_LINK_STATE_MODE 0x5c
+#define MC_CMD_LINK_STATE_MODE_MSGSET 0x5c
#undef MC_CMD_0x5c_PRIVILEGE_CTG
#define MC_CMD_0x5c_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -20407,6 +22038,7 @@
* parameter to MC_CMD_INIT_RXQ.
*/
#define MC_CMD_GET_SNAPSHOT_LENGTH 0x101
+#define MC_CMD_GET_SNAPSHOT_LENGTH_MSGSET 0x101
#undef MC_CMD_0x101_PRIVILEGE_CTG
#define MC_CMD_0x101_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -20429,6 +22061,7 @@
* Additional fuse diagnostics
*/
#define MC_CMD_FUSE_DIAGS 0x102
+#define MC_CMD_FUSE_DIAGS_MSGSET 0x102
#undef MC_CMD_0x102_PRIVILEGE_CTG
#define MC_CMD_0x102_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20483,6 +22116,7 @@
* included in one of the masks provided.
*/
#define MC_CMD_PRIVILEGE_MODIFY 0x60
+#define MC_CMD_PRIVILEGE_MODIFY_MSGSET 0x60
#undef MC_CMD_0x60_PRIVILEGE_CTG
#define MC_CMD_0x60_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -20527,6 +22161,7 @@
* Read XPM memory
*/
#define MC_CMD_XPM_READ_BYTES 0x103
+#define MC_CMD_XPM_READ_BYTES_MSGSET 0x103
#undef MC_CMD_0x103_PRIVILEGE_CTG
#define MC_CMD_0x103_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -20559,6 +22194,7 @@
* Write XPM memory
*/
#define MC_CMD_XPM_WRITE_BYTES 0x104
+#define MC_CMD_XPM_WRITE_BYTES_MSGSET 0x104
#undef MC_CMD_0x104_PRIVILEGE_CTG
#define MC_CMD_0x104_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20591,6 +22227,7 @@
* Read XPM sector
*/
#define MC_CMD_XPM_READ_SECTOR 0x105
+#define MC_CMD_XPM_READ_SECTOR_MSGSET 0x105
#undef MC_CMD_0x105_PRIVILEGE_CTG
#define MC_CMD_0x105_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20631,6 +22268,7 @@
* Write XPM sector
*/
#define MC_CMD_XPM_WRITE_SECTOR 0x106
+#define MC_CMD_XPM_WRITE_SECTOR_MSGSET 0x106
#undef MC_CMD_0x106_PRIVILEGE_CTG
#define MC_CMD_0x106_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20677,6 +22315,7 @@
* Invalidate XPM sector
*/
#define MC_CMD_XPM_INVALIDATE_SECTOR 0x107
+#define MC_CMD_XPM_INVALIDATE_SECTOR_MSGSET 0x107
#undef MC_CMD_0x107_PRIVILEGE_CTG
#define MC_CMD_0x107_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20696,6 +22335,7 @@
* Blank-check XPM memory and report bad locations
*/
#define MC_CMD_XPM_BLANK_CHECK 0x108
+#define MC_CMD_XPM_BLANK_CHECK_MSGSET 0x108
#undef MC_CMD_0x108_PRIVILEGE_CTG
#define MC_CMD_0x108_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20733,6 +22373,7 @@
* Blank-check and repair XPM memory
*/
#define MC_CMD_XPM_REPAIR 0x109
+#define MC_CMD_XPM_REPAIR_MSGSET 0x109
#undef MC_CMD_0x109_PRIVILEGE_CTG
#define MC_CMD_0x109_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20756,6 +22397,7 @@
* be performed on an unprogrammed part.
*/
#define MC_CMD_XPM_DECODER_TEST 0x10a
+#define MC_CMD_XPM_DECODER_TEST_MSGSET 0x10a
#undef MC_CMD_0x10a_PRIVILEGE_CTG
#define MC_CMD_0x10a_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20776,6 +22418,7 @@
* first available location to use, or fail with ENOSPC if none left.
*/
#define MC_CMD_XPM_WRITE_TEST 0x10b
+#define MC_CMD_XPM_WRITE_TEST_MSGSET 0x10b
#undef MC_CMD_0x10b_PRIVILEGE_CTG
#define MC_CMD_0x10b_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20797,6 +22440,7 @@
* does match, otherwise it will respond with success before it jumps to IMEM.
*/
#define MC_CMD_EXEC_SIGNED 0x10c
+#define MC_CMD_EXEC_SIGNED_MSGSET 0x10c
#undef MC_CMD_0x10c_PRIVILEGE_CTG
#define MC_CMD_0x10c_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -20827,6 +22471,7 @@
* MC_CMD_EXEC_SIGNED.
*/
#define MC_CMD_PREPARE_SIGNED 0x10d
+#define MC_CMD_PREPARE_SIGNED_MSGSET 0x10d
#undef MC_CMD_0x10d_PRIVILEGE_CTG
#define MC_CMD_0x10d_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -20850,6 +22495,7 @@
* will be removed once it is regarded as stable.
*/
#define MC_CMD_SET_SECURITY_RULE 0x10f
+#define MC_CMD_SET_SECURITY_RULE_MSGSET 0x10f
#undef MC_CMD_0x10f_PRIVILEGE_CTG
#define MC_CMD_0x10f_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -21040,6 +22686,7 @@
* development. This note will be removed once it is regarded as stable.
*/
#define MC_CMD_RESET_SECURITY_RULES 0x110
+#define MC_CMD_RESET_SECURITY_RULES_MSGSET 0x110
#undef MC_CMD_0x110_PRIVILEGE_CTG
#define MC_CMD_0x110_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -21066,6 +22713,7 @@
* will be removed once it is regarded as stable.
*/
#define MC_CMD_GET_SECURITY_RULESET_VERSION 0x111
+#define MC_CMD_GET_SECURITY_RULESET_VERSION_MSGSET 0x111
#undef MC_CMD_0x111_PRIVILEGE_CTG
#define MC_CMD_0x111_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -21096,6 +22744,7 @@
* removed once it is regarded as stable.
*/
#define MC_CMD_SECURITY_RULE_COUNTER_ALLOC 0x112
+#define MC_CMD_SECURITY_RULE_COUNTER_ALLOC_MSGSET 0x112
#undef MC_CMD_0x112_PRIVILEGE_CTG
#define MC_CMD_0x112_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -21134,6 +22783,7 @@
* removed once it is regarded as stable.
*/
#define MC_CMD_SECURITY_RULE_COUNTER_FREE 0x113
+#define MC_CMD_SECURITY_RULE_COUNTER_FREE_MSGSET 0x113
#undef MC_CMD_0x113_PRIVILEGE_CTG
#define MC_CMD_0x113_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -21169,6 +22819,7 @@
* will be removed once it is regarded as stable.
*/
#define MC_CMD_SUBNET_MAP_SET_NODE 0x114
+#define MC_CMD_SUBNET_MAP_SET_NODE_MSGSET 0x114
#undef MC_CMD_0x114_PRIVILEGE_CTG
#define MC_CMD_0x114_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -21224,6 +22875,7 @@
* will be removed once it is regarded as stable.
*/
#define MC_CMD_REMOTE_PORTRANGE_MAP_SET_TREE 0x115
+#define MC_CMD_REMOTE_PORTRANGE_MAP_SET_TREE_MSGSET 0x115
#undef MC_CMD_0x115_PRIVILEGE_CTG
#define MC_CMD_0x115_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -21258,6 +22910,7 @@
* will be removed once it is regarded as stable.
*/
#define MC_CMD_LOCAL_PORTRANGE_MAP_SET_TREE 0x116
+#define MC_CMD_LOCAL_PORTRANGE_MAP_SET_TREE_MSGSET 0x116
#undef MC_CMD_0x116_PRIVILEGE_CTG
#define MC_CMD_0x116_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -21311,6 +22964,7 @@
* cause all functions to see a reset. (Available on Medford only.)
*/
#define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS 0x117
+#define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_MSGSET 0x117
#undef MC_CMD_0x117_PRIVILEGE_CTG
#define MC_CMD_0x117_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -21357,6 +23011,7 @@
* priority.
*/
#define MC_CMD_RX_BALANCING 0x118
+#define MC_CMD_RX_BALANCING_MSGSET 0x118
#undef MC_CMD_0x118_PRIVILEGE_CTG
#define MC_CMD_0x118_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -21386,6 +23041,7 @@
* info in respect to the binding protocol.
*/
#define MC_CMD_TSA_BIND 0x119
+#define MC_CMD_TSA_BIND_MSGSET 0x119
#undef MC_CMD_0x119_PRIVILEGE_CTG
#define MC_CMD_0x119_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -21951,6 +23607,7 @@
* OP_GET_CACHED_VERSION. All other sub-operations are prohibited.
*/
#define MC_CMD_MANAGE_SECURITY_RULESET_CACHE 0x11a
+#define MC_CMD_MANAGE_SECURITY_RULESET_CACHE_MSGSET 0x11a
#undef MC_CMD_0x11a_PRIVILEGE_CTG
#define MC_CMD_0x11a_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -22007,6 +23664,7 @@
* if the tag is already present.
*/
#define MC_CMD_NVRAM_PRIVATE_APPEND 0x11c
+#define MC_CMD_NVRAM_PRIVATE_APPEND_MSGSET 0x11c
#undef MC_CMD_0x11c_PRIVILEGE_CTG
#define MC_CMD_0x11c_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -22041,6 +23699,7 @@
* correctly at ATE.
*/
#define MC_CMD_XPM_VERIFY_CONTENTS 0x11b
+#define MC_CMD_XPM_VERIFY_CONTENTS_MSGSET 0x11b
#undef MC_CMD_0x11b_PRIVILEGE_CTG
#define MC_CMD_0x11b_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -22084,6 +23743,7 @@
* and TMR_RELOAD_ACT_NS).
*/
#define MC_CMD_SET_EVQ_TMR 0x120
+#define MC_CMD_SET_EVQ_TMR_MSGSET 0x120
#undef MC_CMD_0x120_PRIVILEGE_CTG
#define MC_CMD_0x120_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -22122,6 +23782,7 @@
* Query properties about the event queue timers.
*/
#define MC_CMD_GET_EVQ_TMR_PROPERTIES 0x122
+#define MC_CMD_GET_EVQ_TMR_PROPERTIES_MSGSET 0x122
#undef MC_CMD_0x122_PRIVILEGE_CTG
#define MC_CMD_0x122_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -22191,6 +23852,7 @@
* non used switch buffers.
*/
#define MC_CMD_ALLOCATE_TX_VFIFO_CP 0x11d
+#define MC_CMD_ALLOCATE_TX_VFIFO_CP_MSGSET 0x11d
#undef MC_CMD_0x11d_PRIVILEGE_CTG
#define MC_CMD_0x11d_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -22198,7 +23860,8 @@
/* MC_CMD_ALLOCATE_TX_VFIFO_CP_IN msgrequest */
#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_LEN 20
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_INSTANCE_OFST 0
#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_INSTANCE_LEN 4
@@ -22243,6 +23906,7 @@
* previously allocated common pools.
*/
#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO 0x11e
+#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_MSGSET 0x11e
#undef MC_CMD_0x11e_PRIVILEGE_CTG
#define MC_CMD_0x11e_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -22296,6 +23960,7 @@
* ready to be re-used.
*/
#define MC_CMD_TEARDOWN_TX_VFIFO_VF 0x11f
+#define MC_CMD_TEARDOWN_TX_VFIFO_VF_MSGSET 0x11f
#undef MC_CMD_0x11f_PRIVILEGE_CTG
#define MC_CMD_0x11f_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -22316,6 +23981,7 @@
* it ready to be re-used.
*/
#define MC_CMD_DEALLOCATE_TX_VFIFO_CP 0x121
+#define MC_CMD_DEALLOCATE_TX_VFIFO_CP_MSGSET 0x121
#undef MC_CMD_0x121_PRIVILEGE_CTG
#define MC_CMD_0x121_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -22344,6 +24010,7 @@
* or 0 if there has not been a previous rekey.
*/
#define MC_CMD_REKEY 0x123
+#define MC_CMD_REKEY_MSGSET 0x123
#undef MC_CMD_0x123_PRIVILEGE_CTG
#define MC_CMD_0x123_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -22368,6 +24035,7 @@
* not yet assigned.
*/
#define MC_CMD_SWITCH_GET_UNASSIGNED_BUFFERS 0x124
+#define MC_CMD_SWITCH_GET_UNASSIGNED_BUFFERS_MSGSET 0x124
#undef MC_CMD_0x124_PRIVILEGE_CTG
#define MC_CMD_0x124_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -22396,6 +24064,7 @@
* the required bits were not set.
*/
#define MC_CMD_SET_SECURITY_FUSES 0x126
+#define MC_CMD_SET_SECURITY_FUSES_MSGSET 0x126
#undef MC_CMD_0x126_PRIVILEGE_CTG
#define MC_CMD_0x126_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -22438,6 +24107,7 @@
* SF-117371-SW
*/
#define MC_CMD_TSA_INFO 0x127
+#define MC_CMD_TSA_INFO_MSGSET 0x127
#undef MC_CMD_0x127_PRIVILEGE_CTG
#define MC_CMD_0x127_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -22614,6 +24284,7 @@
* Doxbox reference SF-117371-SW
*/
#define MC_CMD_HOST_INFO 0x128
+#define MC_CMD_HOST_INFO_MSGSET 0x128
#undef MC_CMD_0x128_PRIVILEGE_CTG
#define MC_CMD_0x128_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -22681,6 +24352,7 @@
* section 'Adapter Information'
*/
#define MC_CMD_TSAN_INFO 0x129
+#define MC_CMD_TSAN_INFO_MSGSET 0x129
#undef MC_CMD_0x129_PRIVILEGE_CTG
#define MC_CMD_0x129_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -22780,6 +24452,7 @@
* TSA adapter statistics operations.
*/
#define MC_CMD_TSA_STATISTICS 0x130
+#define MC_CMD_TSA_STATISTICS_MSGSET 0x130
#undef MC_CMD_0x130_PRIVILEGE_CTG
#define MC_CMD_0x130_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -22884,14 +24557,26 @@
#define MC_TSA_STATISTICS_ENTRY_TX_STAT_OFST 0
#define MC_TSA_STATISTICS_ENTRY_TX_STAT_LEN 8
#define MC_TSA_STATISTICS_ENTRY_TX_STAT_LO_OFST 0
+#define MC_TSA_STATISTICS_ENTRY_TX_STAT_LO_LEN 4
+#define MC_TSA_STATISTICS_ENTRY_TX_STAT_LO_LBN 0
+#define MC_TSA_STATISTICS_ENTRY_TX_STAT_LO_WIDTH 32
#define MC_TSA_STATISTICS_ENTRY_TX_STAT_HI_OFST 4
+#define MC_TSA_STATISTICS_ENTRY_TX_STAT_HI_LEN 4
+#define MC_TSA_STATISTICS_ENTRY_TX_STAT_HI_LBN 32
+#define MC_TSA_STATISTICS_ENTRY_TX_STAT_HI_WIDTH 32
#define MC_TSA_STATISTICS_ENTRY_TX_STAT_LBN 0
#define MC_TSA_STATISTICS_ENTRY_TX_STAT_WIDTH 64
/* Rx statistics counter */
#define MC_TSA_STATISTICS_ENTRY_RX_STAT_OFST 8
#define MC_TSA_STATISTICS_ENTRY_RX_STAT_LEN 8
#define MC_TSA_STATISTICS_ENTRY_RX_STAT_LO_OFST 8
+#define MC_TSA_STATISTICS_ENTRY_RX_STAT_LO_LEN 4
+#define MC_TSA_STATISTICS_ENTRY_RX_STAT_LO_LBN 64
+#define MC_TSA_STATISTICS_ENTRY_RX_STAT_LO_WIDTH 32
#define MC_TSA_STATISTICS_ENTRY_RX_STAT_HI_OFST 12
+#define MC_TSA_STATISTICS_ENTRY_RX_STAT_HI_LEN 4
+#define MC_TSA_STATISTICS_ENTRY_RX_STAT_HI_LBN 96
+#define MC_TSA_STATISTICS_ENTRY_RX_STAT_HI_WIDTH 32
#define MC_TSA_STATISTICS_ENTRY_RX_STAT_LBN 64
#define MC_TSA_STATISTICS_ENTRY_RX_STAT_WIDTH 64
@@ -22904,6 +24589,7 @@
* installing TSA binding certificates. See SF-117631-TC.
*/
#define MC_CMD_ERASE_INITIAL_NIC_SECRET 0x131
+#define MC_CMD_ERASE_INITIAL_NIC_SECRET_MSGSET 0x131
#undef MC_CMD_0x131_PRIVILEGE_CTG
#define MC_CMD_0x131_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -22921,6 +24607,7 @@
* NIC for TSA binding.
*/
#define MC_CMD_TSA_CONFIG 0x64
+#define MC_CMD_TSA_CONFIG_MSGSET 0x64
#undef MC_CMD_0x64_PRIVILEGE_CTG
#define MC_CMD_0x64_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -23038,6 +24725,7 @@
* to a TSA adapter.
*/
#define MC_CMD_TSA_IPADDR 0x65
+#define MC_CMD_TSA_IPADDR_MSGSET 0x65
#undef MC_CMD_0x65_PRIVILEGE_CTG
#define MC_CMD_0x65_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -23089,7 +24777,13 @@
#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_OFST 8
#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_LEN 8
#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_LO_OFST 8
+#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_LO_LEN 4
+#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_LO_LBN 64
+#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_LO_WIDTH 32
#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_HI_OFST 12
+#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_HI_LEN 4
+#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_HI_LBN 96
+#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_HI_WIDTH 32
#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_MINNUM 1
#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_MAXNUM 30
#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_MAXNUM_MCDI2 126
@@ -23119,7 +24813,13 @@
#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_OFST 8
#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_LEN 8
#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_LO_OFST 8
+#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_LO_LEN 4
+#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_LO_LBN 64
+#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_LO_WIDTH 32
#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_HI_OFST 12
+#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_HI_LEN 4
+#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_HI_LBN 96
+#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_HI_WIDTH 32
#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_MINNUM 1
#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_MAXNUM 30
#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_MAXNUM_MCDI2 126
@@ -23135,6 +24835,7 @@
* disabled.
*/
#define MC_CMD_SECURE_NIC_INFO 0x132
+#define MC_CMD_SECURE_NIC_INFO_MSGSET 0x132
#undef MC_CMD_0x132_PRIVILEGE_CTG
#define MC_CMD_0x132_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -23228,6 +24929,7 @@
* parameters in request or response.
*/
#define MC_CMD_TSA_TEST 0x125
+#define MC_CMD_TSA_TEST_MSGSET 0x125
#undef MC_CMD_0x125_PRIVILEGE_CTG
#define MC_CMD_0x125_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -23249,6 +24951,7 @@
* rule-set transitions.
*/
#define MC_CMD_TSA_RULESET_OVERRIDE 0x12a
+#define MC_CMD_TSA_RULESET_OVERRIDE_MSGSET 0x12a
#undef MC_CMD_0x12a_PRIVILEGE_CTG
#define MC_CMD_0x12a_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -23281,6 +24984,7 @@
* Specific usage is determined by the TYPE field.
*/
#define MC_CMD_TSAC_REQUEST 0x12b
+#define MC_CMD_TSAC_REQUEST_MSGSET 0x12b
#undef MC_CMD_0x12b_PRIVILEGE_CTG
#define MC_CMD_0x12b_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -23305,6 +25009,7 @@
* Get the version of the SUC
*/
#define MC_CMD_SUC_VERSION 0x134
+#define MC_CMD_SUC_VERSION_MSGSET 0x134
#undef MC_CMD_0x134_PRIVILEGE_CTG
#define MC_CMD_0x134_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -23350,6 +25055,7 @@
* Operations to support manftest on SUC based systems.
*/
#define MC_CMD_SUC_MANFTEST 0x135
+#define MC_CMD_SUC_MANFTEST_MSGSET 0x135
#undef MC_CMD_0x135_PRIVILEGE_CTG
#define MC_CMD_0x135_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -23546,6 +25252,7 @@
* Request a certificate.
*/
#define MC_CMD_GET_CERTIFICATE 0x12c
+#define MC_CMD_GET_CERTIFICATE_MSGSET 0x12c
#undef MC_CMD_0x12c_PRIVILEGE_CTG
#define MC_CMD_0x12c_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -23620,6 +25327,7 @@
* Get a global value which applies to all PCI functions
*/
#define MC_CMD_GET_NIC_GLOBAL 0x12d
+#define MC_CMD_GET_NIC_GLOBAL_MSGSET 0x12d
#undef MC_CMD_0x12d_PRIVILEGE_CTG
#define MC_CMD_0x12d_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -23647,6 +25355,7 @@
* appropriate error otherwise (see key descriptions).
*/
#define MC_CMD_SET_NIC_GLOBAL 0x12e
+#define MC_CMD_SET_NIC_GLOBAL_MSGSET 0x12e
#undef MC_CMD_0x12e_PRIVILEGE_CTG
#define MC_CMD_0x12e_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -23694,6 +25403,7 @@
* firmware buffer for later extraction.
*/
#define MC_CMD_LTSSM_TRACE_POLL 0x12f
+#define MC_CMD_LTSSM_TRACE_POLL_MSGSET 0x12f
#undef MC_CMD_0x12f_PRIVILEGE_CTG
#define MC_CMD_0x12f_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -23731,7 +25441,13 @@
#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_OFST 8
#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_LEN 8
#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_LO_OFST 8
+#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_LO_LEN 4
+#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_LO_LBN 64
+#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_LO_WIDTH 32
#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_HI_OFST 12
+#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_HI_LEN 4
+#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_HI_LBN 96
+#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_HI_WIDTH 32
#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_MINNUM 0
#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_MAXNUM 30
#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_MAXNUM_MCDI2 126
@@ -23765,6 +25481,7 @@
* firmware variant.
*/
#define MC_CMD_TELEMETRY_ENABLE 0x138
+#define MC_CMD_TELEMETRY_ENABLE_MSGSET 0x138
#undef MC_CMD_0x138_PRIVILEGE_CTG
#define MC_CMD_0x138_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -23856,6 +25573,7 @@
* Reference - SF-120569-SW Telemetry Firmware Design.
*/
#define MC_CMD_TELEMETRY_CONFIG 0x139
+#define MC_CMD_TELEMETRY_CONFIG_MSGSET 0x139
#undef MC_CMD_0x139_PRIVILEGE_CTG
#define MC_CMD_0x139_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -23925,6 +25643,7 @@
* due to resource constraints, returns ENOSPC.
*/
#define MC_CMD_GET_RX_PREFIX_ID 0x13b
+#define MC_CMD_GET_RX_PREFIX_ID_MSGSET 0x13b
#undef MC_CMD_0x13b_PRIVILEGE_CTG
#define MC_CMD_0x13b_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -23935,7 +25654,13 @@
#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_OFST 0
#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_LEN 8
#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_LO_OFST 0
+#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_LO_LEN 4
+#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_LO_LBN 0
+#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_LO_WIDTH 32
#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_HI_OFST 4
+#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_HI_LEN 4
+#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_HI_LBN 32
+#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_HI_WIDTH 32
#define MC_CMD_GET_RX_PREFIX_ID_IN_LENGTH_OFST 0
#define MC_CMD_GET_RX_PREFIX_ID_IN_LENGTH_LBN 0
#define MC_CMD_GET_RX_PREFIX_ID_IN_LENGTH_WIDTH 1
@@ -24056,6 +25781,7 @@
* created with that prefix id
*/
#define MC_CMD_QUERY_RX_PREFIX_ID 0x13c
+#define MC_CMD_QUERY_RX_PREFIX_ID_MSGSET 0x13c
#undef MC_CMD_0x13c_PRIVILEGE_CTG
#define MC_CMD_0x13c_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24092,6 +25818,7 @@
* A command to perform various bundle-related operations on insecure cards.
*/
#define MC_CMD_BUNDLE 0x13d
+#define MC_CMD_BUNDLE_MSGSET 0x13d
#undef MC_CMD_0x13d_PRIVILEGE_CTG
#define MC_CMD_0x13d_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -24154,6 +25881,7 @@
* Read all VPD starting from a given address
*/
#define MC_CMD_GET_VPD 0x165
+#define MC_CMD_GET_VPD_MSGSET 0x165
#undef MC_CMD_0x165_PRIVILEGE_CTG
#define MC_CMD_0x165_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24185,6 +25913,7 @@
* Provide information about the NC-SI stack
*/
#define MC_CMD_GET_NCSI_INFO 0x167
+#define MC_CMD_GET_NCSI_INFO_MSGSET 0x167
#undef MC_CMD_0x167_PRIVILEGE_CTG
#define MC_CMD_0x167_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24256,6 +25985,7 @@
* System lockdown, when enabled firmware updates are blocked.
*/
#define MC_CMD_FIRMWARE_SET_LOCKDOWN 0x16f
+#define MC_CMD_FIRMWARE_SET_LOCKDOWN_MSGSET 0x16f
#undef MC_CMD_0x16f_PRIVILEGE_CTG
#define MC_CMD_0x16f_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -24278,6 +26008,7 @@
* documentation.
*/
#define MC_CMD_GET_TEST_FEATURES 0x1ac
+#define MC_CMD_GET_TEST_FEATURES_MSGSET 0x1ac
#undef MC_CMD_0x1ac_PRIVILEGE_CTG
#define MC_CMD_0x1ac_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24300,6 +26031,253 @@
#define MC_CMD_GET_TEST_FEATURE_OUT_TEST_FEATURES_MAXNUM 63
#define MC_CMD_GET_TEST_FEATURE_OUT_TEST_FEATURES_MAXNUM_MCDI2 255
+
+/***********************************/
+/* MC_CMD_FPGA
+ * A command to perform various fpga-related operations on platforms that
+ * include FPGAs. Note that some platforms may only support a subset of these
+ * operations.
+ */
+#define MC_CMD_FPGA 0x1bf
+#define MC_CMD_FPGA_MSGSET 0x1bf
+#undef MC_CMD_0x1bf_PRIVILEGE_CTG
+
+#define MC_CMD_0x1bf_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_FPGA_IN msgrequest */
+#define MC_CMD_FPGA_IN_LEN 4
+/* Sub-command code */
+#define MC_CMD_FPGA_IN_OP_OFST 0
+#define MC_CMD_FPGA_IN_OP_LEN 4
+/* enum: Get the FPGA version string. */
+#define MC_CMD_FPGA_IN_OP_GET_VERSION 0x0
+/* enum: Read bitmask of features supported in the FPGA image. */
+#define MC_CMD_FPGA_IN_OP_GET_CAPABILITIES 0x1
+/* enum: Perform a FPGA reset. */
+#define MC_CMD_FPGA_IN_OP_RESET 0x2
+/* enum: Set active flash device. */
+#define MC_CMD_FPGA_IN_OP_SELECT_FLASH 0x3
+/* enum: Get active flash device. */
+#define MC_CMD_FPGA_IN_OP_GET_ACTIVE_FLASH 0x4
+/* enum: Configure internal link i.e. the FPGA port facing the ASIC. */
+#define MC_CMD_FPGA_IN_OP_SET_INTERNAL_LINK 0x5
+/* enum: Read internal link configuration. */
+#define MC_CMD_FPGA_IN_OP_GET_INTERNAL_LINK 0x6
+
+/* MC_CMD_FPGA_OP_GET_VERSION_IN msgrequest: Get the FPGA version string. A
+ * free-format string is returned in response to this command. Any checks on
+ * supported FPGA operations are based on the response to
+ * MC_CMD_FPGA_OP_GET_CAPABILITIES.
+ */
+#define MC_CMD_FPGA_OP_GET_VERSION_IN_LEN 4
+/* Sub-command code. Must be OP_GET_VERSION */
+#define MC_CMD_FPGA_OP_GET_VERSION_IN_OP_OFST 0
+#define MC_CMD_FPGA_OP_GET_VERSION_IN_OP_LEN 4
+
+/* MC_CMD_FPGA_OP_GET_VERSION_OUT msgresponse: Returns the version string. */
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_LENMIN 0
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_LENMAX 252
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_LENMAX_MCDI2 1020
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_LEN(num) (0+1*(num))
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_VERSION_NUM(len) (((len)-0)/1)
+/* Null-terminated string containing version information. */
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_VERSION_OFST 0
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_VERSION_LEN 1
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_VERSION_MINNUM 0
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_VERSION_MAXNUM 252
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_VERSION_MAXNUM_MCDI2 1020
+
+/* MC_CMD_FPGA_OP_GET_CAPABILITIES_IN msgrequest: Read bitmask of features
+ * supported in the FPGA image.
+ */
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_IN_LEN 4
+/* Sub-command code. Must be OP_GET_CAPABILITIES */
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_IN_OP_OFST 0
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_IN_OP_LEN 4
+
+/* MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT msgresponse: Returns the version string.
+ */
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_LEN 4
+/* Bit-mask of supported features. */
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_CAPABILITIES_OFST 0
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_CAPABILITIES_LEN 4
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_MAC_OFST 0
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_MAC_LBN 0
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_MAC_WIDTH 1
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_MAE_OFST 0
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_MAE_LBN 1
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_MAE_WIDTH 1
+
+/* MC_CMD_FPGA_OP_RESET_IN msgrequest: Perform a FPGA reset operation where
+ * supported.
+ */
+#define MC_CMD_FPGA_OP_RESET_IN_LEN 4
+/* Sub-command code. Must be OP_RESET */
+#define MC_CMD_FPGA_OP_RESET_IN_OP_OFST 0
+#define MC_CMD_FPGA_OP_RESET_IN_OP_LEN 4
+
+/* MC_CMD_FPGA_OP_RESET_OUT msgresponse */
+#define MC_CMD_FPGA_OP_RESET_OUT_LEN 0
+
+/* MC_CMD_FPGA_OP_SELECT_FLASH_IN msgrequest: Set active FPGA flash device.
+ * Returns EINVAL if selected flash index does not exist on the platform under
+ * test.
+ */
+#define MC_CMD_FPGA_OP_SELECT_FLASH_IN_LEN 8
+/* Sub-command code. Must be OP_SELECT_FLASH */
+#define MC_CMD_FPGA_OP_SELECT_FLASH_IN_OP_OFST 0
+#define MC_CMD_FPGA_OP_SELECT_FLASH_IN_OP_LEN 4
+/* Flash device identifier. */
+#define MC_CMD_FPGA_OP_SELECT_FLASH_IN_FLASH_ID_OFST 4
+#define MC_CMD_FPGA_OP_SELECT_FLASH_IN_FLASH_ID_LEN 4
+/* Enum values, see field(s): */
+/* MC_CMD_FPGA_FLASH_INDEX */
+
+/* MC_CMD_FPGA_OP_SELECT_FLASH_OUT msgresponse */
+#define MC_CMD_FPGA_OP_SELECT_FLASH_OUT_LEN 0
+
+/* MC_CMD_FPGA_OP_GET_ACTIVE_FLASH_IN msgrequest: Get active FPGA flash device.
+ */
+#define MC_CMD_FPGA_OP_GET_ACTIVE_FLASH_IN_LEN 4
+/* Sub-command code. Must be OP_GET_ACTIVE_FLASH */
+#define MC_CMD_FPGA_OP_GET_ACTIVE_FLASH_IN_OP_OFST 0
+#define MC_CMD_FPGA_OP_GET_ACTIVE_FLASH_IN_OP_LEN 4
+
+/* MC_CMD_FPGA_OP_GET_ACTIVE_FLASH_OUT msgresponse: Returns flash identifier
+ * for current active flash.
+ */
+#define MC_CMD_FPGA_OP_GET_ACTIVE_FLASH_OUT_LEN 4
+/* Flash device identifier. */
+#define MC_CMD_FPGA_OP_GET_ACTIVE_FLASH_OUT_FLASH_ID_OFST 0
+#define MC_CMD_FPGA_OP_GET_ACTIVE_FLASH_OUT_FLASH_ID_LEN 4
+/* Enum values, see field(s): */
+/* MC_CMD_FPGA_FLASH_INDEX */
+
+/* MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN msgrequest: Configure FPGA internal
+ * port, facing the ASIC
+ */
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_LEN 12
+/* Sub-command code. Must be OP_SET_INTERNAL_LINK */
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_OP_OFST 0
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_OP_LEN 4
+/* Flags */
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_FLAGS_OFST 4
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_FLAGS_LEN 4
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_LINK_STATE_OFST 4
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_LINK_STATE_LBN 0
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_LINK_STATE_WIDTH 2
+/* enum: Unmodified, same as last state set by firmware */
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_AUTO 0x0
+/* enum: Configure link-up */
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_UP 0x1
+/* enum: Configure link-down */
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_DOWN 0x2
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_FLUSH_OFST 4
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_FLUSH_LBN 2
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_FLUSH_WIDTH 1
+/* Link speed to be applied on FPGA internal port MAC. */
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_SPEED_OFST 8
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_SPEED_LEN 4
+
+/* MC_CMD_FPGA_OP_SET_INTERNAL_LINK_OUT msgresponse */
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_OUT_LEN 0
+
+/* MC_CMD_FPGA_OP_GET_INTERNAL_LINK_IN msgrequest: Read FPGA internal port
+ * configuration and status
+ */
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_IN_LEN 4
+/* Sub-command code. Must be OP_GET_INTERNAL_LINK */
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_IN_OP_OFST 0
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_IN_OP_LEN 4
+
+/* MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT msgresponse: Response format for read
+ * FPGA internal port configuration and status
+ */
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT_LEN 8
+/* Flags */
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT_FLAGS_OFST 0
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT_FLAGS_LEN 4
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT_LINK_STATE_OFST 0
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT_LINK_STATE_LBN 0
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT_LINK_STATE_WIDTH 2
+/* Enum values, see field(s): */
+/* MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN/FLAGS */
+/* Link speed set on FPGA internal port MAC. */
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT_SPEED_OFST 4
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT_SPEED_LEN 4
+
+
+/***********************************/
+/* MC_CMD_EXTERNAL_MAE_GET_LINK_MODE
+ * This command is expected to be used on a U25 board with an MAE in the FPGA.
+ * It does not modify the operational state of the NIC. The modes are described
+ * in XN-200039-TC - U25 OVS packet formats.
+ */
+#define MC_CMD_EXTERNAL_MAE_GET_LINK_MODE 0x1c0
+#define MC_CMD_EXTERNAL_MAE_GET_LINK_MODE_MSGSET 0x1c0
+#undef MC_CMD_0x1c0_PRIVILEGE_CTG
+
+#define MC_CMD_0x1c0_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_EXTERNAL_MAE_GET_LINK_MODE_IN msgrequest */
+#define MC_CMD_EXTERNAL_MAE_GET_LINK_MODE_IN_LEN 0
+
+/* MC_CMD_EXTERNAL_MAE_GET_LINK_MODE_OUT msgresponse */
+#define MC_CMD_EXTERNAL_MAE_GET_LINK_MODE_OUT_LEN 4
+/* The current link mode */
+#define MC_CMD_EXTERNAL_MAE_GET_LINK_MODE_OUT_MODE_OFST 0
+#define MC_CMD_EXTERNAL_MAE_GET_LINK_MODE_OUT_MODE_LEN 4
+/* Enum values, see field(s): */
+/* MC_CMD_EXTERNAL_MAE_LINK_MODE */
+
+
+/***********************************/
+/* MC_CMD_EXTERNAL_MAE_SET_LINK_MODE
+ * This command is expected to be used on a U25 board with an MAE in the FPGA.
+ * The modes are described in XN-200039-TC - U25 OVS packet formats. This
+ * command will set the link between the FPGA and the X2 to the specified new
+ * mode. It will first enter bootstrap mode, make sure there are no packets in
+ * flight and then enter the requested mode. In order to make sure there are no
+ * packets in flight, it will flush the X2 TX path, the FPGA RX path from the
+ * X2, the FPGA TX path to the X2 and the X2 RX path. The driver is responsible
+ * for making sure there are no TX or RX descriptors posted on any TXQ or RXQ
+ * associated with the affected port before invoking this command. This command
+ * is run implicitly with MODE set to LEGACY when MC_CMD_DRV_ATTACH is
+ * executed.
+ */
+#define MC_CMD_EXTERNAL_MAE_SET_LINK_MODE 0x1c1
+#define MC_CMD_EXTERNAL_MAE_SET_LINK_MODE_MSGSET 0x1c1
+#undef MC_CMD_0x1c1_PRIVILEGE_CTG
+
+#define MC_CMD_0x1c1_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_EXTERNAL_MAE_SET_LINK_MODE_IN msgrequest */
+#define MC_CMD_EXTERNAL_MAE_SET_LINK_MODE_IN_LEN 4
+/* The new link mode. */
+#define MC_CMD_EXTERNAL_MAE_SET_LINK_MODE_IN_MODE_OFST 0
+#define MC_CMD_EXTERNAL_MAE_SET_LINK_MODE_IN_MODE_LEN 4
+/* Enum values, see field(s): */
+/* MC_CMD_EXTERNAL_MAE_LINK_MODE */
+
+/* MC_CMD_EXTERNAL_MAE_SET_LINK_MODE_OUT msgresponse */
+#define MC_CMD_EXTERNAL_MAE_SET_LINK_MODE_OUT_LEN 0
+
+/* CLIENT_HANDLE structuredef: A client is an abstract entity that can make
+ * requests of the device and that can own resources managed by the device.
+ * Examples of clients include PCIe functions and dynamic clients. A client
+ * handle is a 32b opaque value used to refer to a client. Further details can
+ * be found within XN-200418-TC.
+ */
+#define CLIENT_HANDLE_LEN 4
+#define CLIENT_HANDLE_OPAQUE_OFST 0
+#define CLIENT_HANDLE_OPAQUE_LEN 4
+/* enum: A client handle guaranteed never to refer to a real client. */
+#define CLIENT_HANDLE_NULL 0xffffffff
+/* enum: Used to refer to the calling client. */
+#define CLIENT_HANDLE_SELF 0xfffffffe
+#define CLIENT_HANDLE_OPAQUE_LBN 0
+#define CLIENT_HANDLE_OPAQUE_WIDTH 32
+
/* CLOCK_INFO structuredef: Information about a single hardware clock */
#define CLOCK_INFO_LEN 28
/* Enumeration that uniquely identifies the clock */
@@ -24333,7 +26311,13 @@
#define CLOCK_INFO_FREQUENCY_OFST 4
#define CLOCK_INFO_FREQUENCY_LEN 8
#define CLOCK_INFO_FREQUENCY_LO_OFST 4
+#define CLOCK_INFO_FREQUENCY_LO_LEN 4
+#define CLOCK_INFO_FREQUENCY_LO_LBN 32
+#define CLOCK_INFO_FREQUENCY_LO_WIDTH 32
#define CLOCK_INFO_FREQUENCY_HI_OFST 8
+#define CLOCK_INFO_FREQUENCY_HI_LEN 4
+#define CLOCK_INFO_FREQUENCY_HI_LBN 64
+#define CLOCK_INFO_FREQUENCY_HI_WIDTH 32
#define CLOCK_INFO_FREQUENCY_LBN 32
#define CLOCK_INFO_FREQUENCY_WIDTH 64
/* Human-readable ASCII name for clock, with NUL termination */
@@ -24343,12 +26327,62 @@
#define CLOCK_INFO_NAME_LBN 96
#define CLOCK_INFO_NAME_WIDTH 8
+/* SCHED_CREDIT_CHECK_RESULT structuredef */
+#define SCHED_CREDIT_CHECK_RESULT_LEN 16
+/* The instance of the scheduler. Refer to XN-200389-AW for the location of
+ * these schedulers in the hardware.
+ */
+#define SCHED_CREDIT_CHECK_RESULT_SCHED_INSTANCE_OFST 0
+#define SCHED_CREDIT_CHECK_RESULT_SCHED_INSTANCE_LEN 1
+#define SCHED_CREDIT_CHECK_RESULT_HUB_HOST_A 0x0 /* enum */
+#define SCHED_CREDIT_CHECK_RESULT_HUB_NET_A 0x1 /* enum */
+#define SCHED_CREDIT_CHECK_RESULT_HUB_B 0x2 /* enum */
+#define SCHED_CREDIT_CHECK_RESULT_HUB_HOST_C 0x3 /* enum */
+#define SCHED_CREDIT_CHECK_RESULT_HUB_NET_TX 0x4 /* enum */
+#define SCHED_CREDIT_CHECK_RESULT_HUB_HOST_D 0x5 /* enum */
+#define SCHED_CREDIT_CHECK_RESULT_HUB_REPLAY 0x6 /* enum */
+#define SCHED_CREDIT_CHECK_RESULT_DMAC_H2C 0x7 /* enum */
+#define SCHED_CREDIT_CHECK_RESULT_SCHED_INSTANCE_LBN 0
+#define SCHED_CREDIT_CHECK_RESULT_SCHED_INSTANCE_WIDTH 8
+/* The type of node that this result refers to. */
+#define SCHED_CREDIT_CHECK_RESULT_NODE_TYPE_OFST 1
+#define SCHED_CREDIT_CHECK_RESULT_NODE_TYPE_LEN 1
+/* enum: Destination node */
+#define SCHED_CREDIT_CHECK_RESULT_DEST 0x0
+/* enum: Source node */
+#define SCHED_CREDIT_CHECK_RESULT_SOURCE 0x1
+#define SCHED_CREDIT_CHECK_RESULT_NODE_TYPE_LBN 8
+#define SCHED_CREDIT_CHECK_RESULT_NODE_TYPE_WIDTH 8
+/* Level of node in scheduler hierarchy (level 0 is the bottom of the
+ * hierarchy, increasing towards the root node).
+ */
+#define SCHED_CREDIT_CHECK_RESULT_NODE_LEVEL_OFST 2
+#define SCHED_CREDIT_CHECK_RESULT_NODE_LEVEL_LEN 2
+#define SCHED_CREDIT_CHECK_RESULT_NODE_LEVEL_LBN 16
+#define SCHED_CREDIT_CHECK_RESULT_NODE_LEVEL_WIDTH 16
+/* Node index */
+#define SCHED_CREDIT_CHECK_RESULT_NODE_INDEX_OFST 4
+#define SCHED_CREDIT_CHECK_RESULT_NODE_INDEX_LEN 4
+#define SCHED_CREDIT_CHECK_RESULT_NODE_INDEX_LBN 32
+#define SCHED_CREDIT_CHECK_RESULT_NODE_INDEX_WIDTH 32
+/* The number of credits the node is expected to have. */
+#define SCHED_CREDIT_CHECK_RESULT_EXPECTED_CREDITS_OFST 8
+#define SCHED_CREDIT_CHECK_RESULT_EXPECTED_CREDITS_LEN 4
+#define SCHED_CREDIT_CHECK_RESULT_EXPECTED_CREDITS_LBN 64
+#define SCHED_CREDIT_CHECK_RESULT_EXPECTED_CREDITS_WIDTH 32
+/* The number of credits the node actually had. */
+#define SCHED_CREDIT_CHECK_RESULT_ACTUAL_CREDITS_OFST 12
+#define SCHED_CREDIT_CHECK_RESULT_ACTUAL_CREDITS_LEN 4
+#define SCHED_CREDIT_CHECK_RESULT_ACTUAL_CREDITS_LBN 96
+#define SCHED_CREDIT_CHECK_RESULT_ACTUAL_CREDITS_WIDTH 32
+
/***********************************/
/* MC_CMD_GET_CLOCKS_INFO
* Get information about the device clocks
*/
#define MC_CMD_GET_CLOCKS_INFO 0x166
+#define MC_CMD_GET_CLOCKS_INFO_MSGSET 0x166
#undef MC_CMD_0x166_PRIVILEGE_CTG
#define MC_CMD_0x166_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24387,6 +26421,7 @@
* returns ENOSPC if the caller's table is full.
*/
#define MC_CMD_VNIC_ENCAP_RULE_ADD 0x16d
+#define MC_CMD_VNIC_ENCAP_RULE_ADD_MSGSET 0x16d
#undef MC_CMD_0x16d_PRIVILEGE_CTG
#define MC_CMD_0x16d_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24469,6 +26504,7 @@
* if the input HANDLE doesn't correspond to an existing rule.
*/
#define MC_CMD_VNIC_ENCAP_RULE_REMOVE 0x16e
+#define MC_CMD_VNIC_ENCAP_RULE_REMOVE_MSGSET 0x16e
#undef MC_CMD_0x16e_PRIVILEGE_CTG
#define MC_CMD_0x16e_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24508,303 +26544,568 @@
#define UUID_NODE_LBN 80
#define UUID_NODE_WIDTH 48
-/* MC_CMD_DEVEL_DUMP_VI_ENTRY structuredef */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_LEN 28
-/* Type of entry */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_TYPE_OFST 0
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_TYPE_LEN 4
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QDMA_SW_C2H 0x0 /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QDMA_SW_H2C 0x1 /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QDMA_HW_C2H 0x2 /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QDMA_HW_H2C 0x3 /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QDMA_CR_C2H 0x4 /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QDMA_CR_H2C 0x5 /* enum */
-/* enum: First QDMA writeback/completion queue. Used for ef100, C2H VDPA and
- * plain virtio.
- */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QDMA_WRB 0x6
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QDMA_PFTCH 0x7 /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_DMAC_H2C_QTBL 0x100 /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_DMAC_C2H_QTBL 0x101 /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_DMAC_H2C_VIO 0x10a /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_TYPE_LBN 0
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_TYPE_WIDTH 32
-/* Internal QDMA/dmac queue number for this entry */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QUEUE_NUMBER_OFST 4
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QUEUE_NUMBER_LEN 4
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QUEUE_NUMBER_LBN 32
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QUEUE_NUMBER_WIDTH 32
-/* Size of entry data */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_SIZE_OFST 8
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_SIZE_LEN 4
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_SIZE_LBN 64
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_SIZE_WIDTH 32
-/* Offset of entry data from start of MCDI message response payload */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_OFFSET_OFST 12
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_OFFSET_LEN 4
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_OFFSET_LBN 96
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_OFFSET_WIDTH 32
-/* Absolute VI of the entry, or 0xffffffff if not available/applicable */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_ABS_VI_OFST 16
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_ABS_VI_LEN 4
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_NO_ABS_VI 0xffffffff /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_ABS_VI_LBN 128
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_ABS_VI_WIDTH 32
-/* Reserved */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_RESERVED_OFST 20
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_RESERVED_LEN 8
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_RESERVED_LO_OFST 20
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_RESERVED_HI_OFST 24
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_RESERVED_LBN 160
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_RESERVED_WIDTH 64
-
-
-/***********************************/
-/* MC_CMD_DEVEL_DUMP_VI
- * Dump various parts of the hardware's state for a VI.
- */
-#define MC_CMD_DEVEL_DUMP_VI 0x1b5
-#undef MC_CMD_0x1b5_PRIVILEGE_CTG
-
-#define MC_CMD_0x1b5_PRIVILEGE_CTG SRIOV_CTG_GENERAL
-
-/* MC_CMD_DEVEL_DUMP_VI_IN msgrequest */
-#define MC_CMD_DEVEL_DUMP_VI_IN_LEN 4
-/* Absolute queue id of queue to dump state for */
-#define MC_CMD_DEVEL_DUMP_VI_IN_QID_OFST 0
-#define MC_CMD_DEVEL_DUMP_VI_IN_QID_LEN 4
-
-/* MC_CMD_DEVEL_DUMP_VI_IN_V2 msgrequest */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_LEN 20
-/* Which queue to dump. The meaning of this field dependes on ADDRESS_MODE. */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_ID_OFST 0
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_ID_LEN 4
-/* Method of referring to the queue to dump */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_ADDRESS_MODE_OFST 4
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_ADDRESS_MODE_LEN 4
-/* enum: First field refers to queue number as understood by QDMA/DMAC hardware
- */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_QUEUE_NUMBER 0x0
-/* enum: First field refers to absolute VI number */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_ABS_VI 0x1
-/* enum: First field refers to function-relative VI number on the command's
- * function
+/* PLUGIN_EXTENSION structuredef: Used within MC_CMD_PLUGIN_GET_ALL to describe
+ * an individual extension.
+ */
+#define PLUGIN_EXTENSION_LEN 20
+#define PLUGIN_EXTENSION_UUID_OFST 0
+#define PLUGIN_EXTENSION_UUID_LEN 16
+#define PLUGIN_EXTENSION_UUID_LBN 0
+#define PLUGIN_EXTENSION_UUID_WIDTH 128
+#define PLUGIN_EXTENSION_ADMIN_GROUP_OFST 16
+#define PLUGIN_EXTENSION_ADMIN_GROUP_LEN 1
+#define PLUGIN_EXTENSION_ADMIN_GROUP_LBN 128
+#define PLUGIN_EXTENSION_ADMIN_GROUP_WIDTH 8
+#define PLUGIN_EXTENSION_FLAG_ENABLED_LBN 136
+#define PLUGIN_EXTENSION_FLAG_ENABLED_WIDTH 1
+#define PLUGIN_EXTENSION_RESERVED_LBN 137
+#define PLUGIN_EXTENSION_RESERVED_WIDTH 23
+
+/* DESC_ADDR_REGION structuredef: Describes a contiguous region of DESC_ADDR
+ * space that maps to a contiguous region of TRGT_ADDR space. Addresses
+ * DESC_ADDR in the range [DESC_ADDR_BASE:DESC_ADDR_BASE + 1 <<
+ * WINDOW_SIZE_LOG2) map to TRGT_ADDR = DESC_ADDR - DESC_ADDR_BASE +
+ * TRGT_ADDR_BASE.
+ */
+#define DESC_ADDR_REGION_LEN 32
+/* The start of the region in DESC_ADDR space. */
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_OFST 0
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_LEN 8
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_LO_OFST 0
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_LO_LEN 4
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_LO_LBN 0
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_LO_WIDTH 32
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_HI_OFST 4
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_HI_LEN 4
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_HI_LBN 32
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_HI_WIDTH 32
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_LBN 0
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_WIDTH 64
+/* The start of the region in TRGT_ADDR space. Drivers can set this via
+ * MC_CMD_SET_DESC_ADDR_REGIONS.
+ */
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_OFST 8
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_LEN 8
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_LO_OFST 8
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_LO_LEN 4
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_LO_LBN 64
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_LO_WIDTH 32
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_HI_OFST 12
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_HI_LEN 4
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_HI_LBN 96
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_HI_WIDTH 32
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_LBN 64
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_WIDTH 64
+/* The size of the region. */
+#define DESC_ADDR_REGION_WINDOW_SIZE_LOG2_OFST 16
+#define DESC_ADDR_REGION_WINDOW_SIZE_LOG2_LEN 4
+#define DESC_ADDR_REGION_WINDOW_SIZE_LOG2_LBN 128
+#define DESC_ADDR_REGION_WINDOW_SIZE_LOG2_WIDTH 32
+/* The alignment restriction on TRGT_ADDR. TRGT_ADDR values set by the driver
+ * must be a multiple of 1 << TRGT_ADDR_ALIGN_LOG2.
+ */
+#define DESC_ADDR_REGION_TRGT_ADDR_ALIGN_LOG2_OFST 20
+#define DESC_ADDR_REGION_TRGT_ADDR_ALIGN_LOG2_LEN 4
+#define DESC_ADDR_REGION_TRGT_ADDR_ALIGN_LOG2_LBN 160
+#define DESC_ADDR_REGION_TRGT_ADDR_ALIGN_LOG2_WIDTH 32
+#define DESC_ADDR_REGION_RSVD_OFST 24
+#define DESC_ADDR_REGION_RSVD_LEN 8
+#define DESC_ADDR_REGION_RSVD_LO_OFST 24
+#define DESC_ADDR_REGION_RSVD_LO_LEN 4
+#define DESC_ADDR_REGION_RSVD_LO_LBN 192
+#define DESC_ADDR_REGION_RSVD_LO_WIDTH 32
+#define DESC_ADDR_REGION_RSVD_HI_OFST 28
+#define DESC_ADDR_REGION_RSVD_HI_LEN 4
+#define DESC_ADDR_REGION_RSVD_HI_LBN 224
+#define DESC_ADDR_REGION_RSVD_HI_WIDTH 32
+#define DESC_ADDR_REGION_RSVD_LBN 192
+#define DESC_ADDR_REGION_RSVD_WIDTH 64
+
+
+/***********************************/
+/* MC_CMD_GET_DESC_ADDR_INFO
+ * Returns a description of the mapping from DESC_ADDR to TRGT_ADDR for the calling function's address space.
+ */
+#define MC_CMD_GET_DESC_ADDR_INFO 0x1b7
+#define MC_CMD_GET_DESC_ADDR_INFO_MSGSET 0x1b7
+#undef MC_CMD_0x1b7_PRIVILEGE_CTG
+
+#define MC_CMD_0x1b7_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_GET_DESC_ADDR_INFO_IN msgrequest */
+#define MC_CMD_GET_DESC_ADDR_INFO_IN_LEN 0
+
+/* MC_CMD_GET_DESC_ADDR_INFO_OUT msgresponse */
+#define MC_CMD_GET_DESC_ADDR_INFO_OUT_LEN 4
+/* The type of mapping; see SF-nnnnnn-xx (EF100 driver writer's guide, once
+ * written) for details of each type.
+ */
+#define MC_CMD_GET_DESC_ADDR_INFO_OUT_MAPPING_TYPE_OFST 0
+#define MC_CMD_GET_DESC_ADDR_INFO_OUT_MAPPING_TYPE_LEN 4
+/* enum: TRGT_ADDR = DESC_ADDR */
+#define MC_CMD_GET_DESC_ADDR_INFO_OUT_MAPPING_FLAT 0x0
+/* enum: DESC_ADDR has one or more regions that map into TRGT_ADDR. The base
+ * TRGT_ADDR for each region is programmable via MCDI.
+ */
+#define MC_CMD_GET_DESC_ADDR_INFO_OUT_MAPPING_REGIONED 0x1
+
+
+/***********************************/
+/* MC_CMD_GET_DESC_ADDR_REGIONS
+ * Returns a list of the DESC_ADDR regions for the calling function's address space. Only valid if that function's address space has the REGIONED mapping from DESC_ADDR to TRGT_ADDR.
+ */
+#define MC_CMD_GET_DESC_ADDR_REGIONS 0x1b8
+#define MC_CMD_GET_DESC_ADDR_REGIONS_MSGSET 0x1b8
+#undef MC_CMD_0x1b8_PRIVILEGE_CTG
+
+#define MC_CMD_0x1b8_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_GET_DESC_ADDR_REGIONS_IN msgrequest */
+#define MC_CMD_GET_DESC_ADDR_REGIONS_IN_LEN 0
+
+/* MC_CMD_GET_DESC_ADDR_REGIONS_OUT msgresponse */
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_LENMIN 32
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_LENMAX 224
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_LENMAX_MCDI2 992
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_LEN(num) (0+32*(num))
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_REGIONS_NUM(len) (((len)-0)/32)
+/* An array of DESC_ADDR_REGION strutures. The number of entries in the array
+ * indicates the number of available regions.
+ */
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_REGIONS_OFST 0
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_REGIONS_LEN 32
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_REGIONS_MINNUM 1
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_REGIONS_MAXNUM 7
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_REGIONS_MAXNUM_MCDI2 31
+
+
+/***********************************/
+/* MC_CMD_SET_DESC_ADDR_REGIONS
+ * Set the base TRGT_ADDR for a set of DESC_ADDR regions for the calling function's address space. Only valid if that function's address space had the REGIONED mapping from DESC_ADDR to TRGT_ADDR.
+ */
+#define MC_CMD_SET_DESC_ADDR_REGIONS 0x1b9
+#define MC_CMD_SET_DESC_ADDR_REGIONS_MSGSET 0x1b9
+#undef MC_CMD_0x1b9_PRIVILEGE_CTG
+
+#define MC_CMD_0x1b9_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_SET_DESC_ADDR_REGIONS_IN msgrequest */
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_LENMIN 16
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_LENMAX 248
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_LENMAX_MCDI2 1016
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_LEN(num) (8+8*(num))
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_NUM(len) (((len)-8)/8)
+/* A bitmask indicating which regions should have their base TRGT_ADDR updated.
+ * To update the base TRGR_ADDR for a DESC_ADDR region, the corresponding bit
+ * should be set to 1.
+ */
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_SET_REGION_MASK_OFST 0
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_SET_REGION_MASK_LEN 4
+/* Reserved field; must be set to zero. */
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_RSVD_OFST 4
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_RSVD_LEN 4
+/* An array of values used to updated the base TRGT_ADDR for DESC_ADDR regions.
+ * Array indices corresponding to region numbers (i.e. the array is sparse, and
+ * included entries for regions even if the corresponding SET_REGION_MASK bit
+ * is zero).
*/
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_REL_VI 0x2
-/* enum: First field refers to function-relative VI number on a specified
- * function
- */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_REL_VI_PROXY 0x3
-/* Type of VI. Not needed if ADDRESS_MODE is QUEUE_NUMBER. */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_VI_TYPE_OFST 8
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_VI_TYPE_LEN 4
-/* enum: Return only entries used for ef100 queues (a single hardware queue) */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_EF100 0x0
-/* enum: Return entries used for virtio (Potentially two hardware queues,
- * depending on hardware implementation)
- */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_VIRTIO 0x1
-/* Only if ADDRESS_MODE is REL_VI_PROXY. Interface of function the queue is on.
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_OFST 8
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_LEN 8
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_LO_OFST 8
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_LO_LEN 4
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_LO_LBN 64
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_LO_WIDTH 32
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_HI_OFST 12
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_HI_LEN 4
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_HI_LBN 96
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_HI_WIDTH 32
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_MINNUM 1
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_MAXNUM 30
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_MAXNUM_MCDI2 126
+
+/* MC_CMD_SET_DESC_ADDR_REGIONS_OUT msgresponse */
+#define MC_CMD_SET_DESC_ADDR_REGIONS_OUT_LEN 0
+
+
+/***********************************/
+/* MC_CMD_CLIENT_CMD
+ * Execute an arbitrary MCDI command on behalf of a different client. The
+ * consequences of the command (e.g. ownership of any resources created) apply
+ * to the indicated client rather than the function client which actually sent
+ * this command. All inherent permission checks are also performed on the
+ * indicated client. The given client must be a descendant of the requestor.
+ * The command to be proxied follows immediately afterward in the host buffer
+ * (or on the UART). Chaining multiple MC_CMD_CLIENT_CMD is unnecessary and not
+ * supported. New dynamic clients may be created with MC_CMD_CLIENT_ALLOC.
*/
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_PCIE_INTERFACE_OFST 12
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_PCIE_INTERFACE_LEN 4
-/* Enum values, see field(s): */
-/* DEVEL_PCIE_INTERFACE */
-/* Only if ADDRESS_MODE is REL_VI_PROXY. PF number of the function the queue is
- * on.
- */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_PF_OFST 16
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_PF_LEN 2
-/* Only if ADDRESS_MODE is REL_VI_PROXY. VF number of the function the queue is
- * on.
- */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_VF_OFST 18
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_VF_LEN 2
-/* enum: The function is on a PF, not a VF. */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_VF_NULL 0xffff
-
-/* MC_CMD_DEVEL_DUMP_VI_OUT msgresponse */
-#define MC_CMD_DEVEL_DUMP_VI_OUT_LENMIN 4
-#define MC_CMD_DEVEL_DUMP_VI_OUT_LENMAX 252
-#define MC_CMD_DEVEL_DUMP_VI_OUT_LENMAX_MCDI2 1012
-#define MC_CMD_DEVEL_DUMP_VI_OUT_LEN(num) (0+1*(num))
-#define MC_CMD_DEVEL_DUMP_VI_OUT_DATA_NUM(len) (((len)-0)/1)
-/* Number of dump entries returned */
-#define MC_CMD_DEVEL_DUMP_VI_OUT_NUM_ENTRIES_OFST 0
-#define MC_CMD_DEVEL_DUMP_VI_OUT_NUM_ENTRIES_LEN 4
-#define MC_CMD_DEVEL_DUMP_VI_OUT_DATA_OFST 0
-#define MC_CMD_DEVEL_DUMP_VI_OUT_DATA_LBN 0
-#define MC_CMD_DEVEL_DUMP_VI_OUT_DATA_WIDTH 8
-#define MC_CMD_DEVEL_DUMP_VI_OUT_DATA_MINNUM 0
-#define MC_CMD_DEVEL_DUMP_VI_OUT_DATA_MAXNUM 252
-#define MC_CMD_DEVEL_DUMP_VI_OUT_DATA_MAXNUM_MCDI2 1020
-/* Array of MC_CMD_DEVEL_DUMP_VI_ENTRY structures of length NUM_ENTRIES */
-#define MC_CMD_DEVEL_DUMP_VI_OUT_ENTRIES_OFST 4
-#define MC_CMD_DEVEL_DUMP_VI_OUT_ENTRIES_LEN 28
-#define MC_CMD_DEVEL_DUMP_VI_OUT_ENTRIES_MINNUM 0
-#define MC_CMD_DEVEL_DUMP_VI_OUT_ENTRIES_MAXNUM 8
-#define MC_CMD_DEVEL_DUMP_VI_OUT_ENTRIES_MAXNUM_MCDI2 36
-
-/* MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY structuredef */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_LEN 16
-/* What register this is */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_REG_OFST 0
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_REG_LEN 4
-/* enum: Catchall for registers that aren't in this enum. Nothing should be in
- * this long-term
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_UNKNOWN 0xffffffff
-/* enum: S2IC Converter Debug Packet Counter register. Informs number of
- * packets passed through Converter.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_H2C_S2IC_DBG_PKT_CNT 0x0
-/* enum: IC2S Converter Debug Packet Counter register. Informs number of
- * packets passed through Converter.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_C2H_IC2S_DBG_PKT_CNT 0x1
-/* enum: Event Controller Tx path Debug register. Count of Moderator Tx events,
- * not incl D2C, VirtIO, Dproxy.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TX_DEBUG 0x2
-/* enum: Event Controller Rx path Debug register. Count of Moderator Rx events.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_RX_DEBUG 0x3
-/* enum: Event Controller Debug register. Count of Total EVC events. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TOTAL_DEBUG 0x4
-/* enum: Same info as EVC_RX_DEBUG; collected at different location in design
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_RX_EF100_DEBUG 0x5
-/* enum: Same info as EVC_TX_DEBUG; collected at different location in design
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TX_EF100_DEBUG 0x6
-/* enum: Event Controller Debug register. Count of Tx VirtIO events. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TX_VIRTIO_DEBUG 0x7
-/* enum: Event Controller Debug register. Count of Tx Descriptor Proxy events.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TX_DPRXY_DEBUG 0x8
-/* enum: Event Controller Debug register. Count of Tx VirtQ Descriptor Proxy
- * events.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TX_VIRTQ_DPRXY_DEBUG 0x9
-/* enum: Event Controller Debug register. Count of Tx Descriptor-to-Completion
- * events.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TX_D2C_DEBUG 0xa
-/* enum: Event Controller Debug register. Count of Tx VirtIO Descriptor-to-
- * Completion events.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TX_VIRTQ_D2C_DEBUG 0xb
-/* enum: Event Controller Debug register. Count of Tx Timestamp events. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TX_TSTAMP_DEBUG 0xc
-/* enum: Event Controller Debug register. Count of Rx EvQ Timeout events. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_RX_EVQ_TIMEOUT_DEBUG 0xd
-/* enum: Event Controller Debug register. Count of MC events. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_MC_DEBUG 0xe
-/* enum: Event Controller Debug register. Count of EQDMA VirtIO Control events.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_EQDMA_VIO_CTL_DEBUG 0xf
-/* enum: Counter of QDMA Dropped C2H packets. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_DMAC_C2H_DROP_CTR_REG 0x10
-/* enum: Number of packets received by c host fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_C_H_PACKETS_IN_TBL 0x11
-/* enum: Number of packets sent by c host fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_C_H_PACKETS_OUT_TBL 0x12
-/* enum: Number of packets received by c plugin fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_C_P_PACKETS_IN_TBL 0x13
-/* enum: Number of packets received by b host fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_B_H_PACKETS_IN_TBL 0x14
-/* enum: Number of packets received by b net fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_B_N_PACKETS_IN_TBL 0x15
-/* enum: Number of packets received by b host fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_B_PH_PACKETS_IN_TBL 0x16
-/* enum: Number of packets received by b net fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_B_PN_PACKETS_IN_TBL 0x17
-/* enum: Number of packets sent by b net fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_B_PACKETS_OUT_TBL 0x18
-/* enum: Number of packets received by c net fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_C_N_PACKETS_IN_TBL 0x19
-/* enum: Number of packets sent by c net fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_C_N_PACKETS_OUT_TBL 0x1a
-/* enum: Number of packets received by ha fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_HA_PACKETS_IN_TBL 0x1b
-/* enum: Number of packets received by ha host shadow fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_HA_PH_PACKETS_IN_TBL 0x1c
-/* enum: Number of packets received by ha fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_HA_PACKETS_OUT_TBL 0x1d
-/* enum: Number of packets received by d hub fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_D_PACKETS_IN_TBL 0x1e
-/* enum: Number of packets received by d hub plugin fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_D_P_PACKETS_IN_TBL 0x1f
-/* enum: Number of packets received by d hub plugin fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_D_O_PACKETS_IN_TBL 0x20
-/* enum: Number of packets sent to dmac. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_D_PACKETS_OUT_TBL 0x21
-/* enum: Number of packets received by na fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_NA_PACKETS_IN_TBL 0x22
-/* enum: Number of packets dropped by na fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_NA_PACKETS_DROPPED_TBL 0x23
-/* enum: Number of packets sent by na fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_NA_PACKETS_OUT_TBL 0x24
-/* enum: Number of packets received by rp hub fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_RP_PACKETS_IN_TBL 0x25
-/* enum: Number of packets removed from fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_RP_PACKETS_OUT_TBL 0x26
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_REG_LBN 0
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_REG_WIDTH 32
-/* If REG is a table, the table row. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_ROW_OFST 4
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_ROW_LEN 4
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_ROW_LBN 32
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_ROW_WIDTH 32
-/* Address of the register (as seen by the MC) */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_ADDRESS_OFST 8
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_ADDRESS_LEN 4
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_ADDRESS_LBN 64
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_ADDRESS_WIDTH 32
-/* Value of the register */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_VALUE_OFST 12
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_VALUE_LEN 4
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_VALUE_LBN 96
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_VALUE_WIDTH 32
-
-
-/***********************************/
-/* MC_CMD_DEVEL_DUMP_RHEAD_REGS
- * Dump an assortment of hopefully useful riverhead debug registers
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS 0x1b6
-#undef MC_CMD_0x1b6_PRIVILEGE_CTG
-
-#define MC_CMD_0x1b6_PRIVILEGE_CTG SRIOV_CTG_GENERAL
-
-/* MC_CMD_DEVEL_DUMP_RHEAD_REGS_IN msgrequest */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_IN_LEN 4
-/* Which page of registers to retrieve. Page 0 always exists, later pages may
- * also exist if there are too many registers to fit in a single mcdi response.
- * NUM_PAGES in the response will tell you how many there are.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_IN_PAGE_OFST 0
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_IN_PAGE_LEN 4
-
-/* MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT msgresponse */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_LENMIN 8
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_LENMAX 248
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_LENMAX_MCDI2 1016
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_LEN(num) (8+16*(num))
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_REGS_NUM(len) (((len)-8)/16)
-/* Number of registers dumped in this response */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_NUM_REGS_OFST 0
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_NUM_REGS_LEN 4
-/* How many pages of registers are available to extract */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_NUM_PAGES_OFST 4
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_NUM_PAGES_LEN 4
-/* Array of MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY structs, one for each register
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_REGS_OFST 8
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_REGS_LEN 16
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_REGS_MINNUM 0
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_REGS_MAXNUM 15
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_REGS_MAXNUM_MCDI2 63
+#define MC_CMD_CLIENT_CMD 0x1ba
+#define MC_CMD_CLIENT_CMD_MSGSET 0x1ba
+#undef MC_CMD_0x1ba_PRIVILEGE_CTG
+
+#define MC_CMD_0x1ba_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_CLIENT_CMD_IN msgrequest */
+#define MC_CMD_CLIENT_CMD_IN_LEN 4
+/* The client as which to execute the following command. */
+#define MC_CMD_CLIENT_CMD_IN_CLIENT_ID_OFST 0
+#define MC_CMD_CLIENT_CMD_IN_CLIENT_ID_LEN 4
+
+/* MC_CMD_CLIENT_CMD_OUT msgresponse */
+#define MC_CMD_CLIENT_CMD_OUT_LEN 0
+
+
+/***********************************/
+/* MC_CMD_CLIENT_ALLOC
+ * Create a new client object. Clients are a system for delineating NIC
+ * resource ownership, such that groups of resources may be torn down as a
+ * unit. See also MC_CMD_CLIENT_CMD. See XN-200265-TC for background, concepts
+ * and a glossary. Clients created by this command are known as "dynamic
+ * clients". The newly-created client is a child of the client which sent this
+ * command. The caller must have the GRP_ALLOC_CLIENT privilege. The new client
+ * initially has no permission to do anything; see
+ * MC_CMD_DEVEL_CLIENT_PRIVILEGE_MODIFY.
+ */
+#define MC_CMD_CLIENT_ALLOC 0x1bb
+#define MC_CMD_CLIENT_ALLOC_MSGSET 0x1bb
+#undef MC_CMD_0x1bb_PRIVILEGE_CTG
+
+#define MC_CMD_0x1bb_PRIVILEGE_CTG SRIOV_CTG_ALLOC_CLIENT
+
+/* MC_CMD_CLIENT_ALLOC_IN msgrequest */
+#define MC_CMD_CLIENT_ALLOC_IN_LEN 0
+
+/* MC_CMD_CLIENT_ALLOC_OUT msgresponse */
+#define MC_CMD_CLIENT_ALLOC_OUT_LEN 4
+/* The ID of the new client object which has been created. */
+#define MC_CMD_CLIENT_ALLOC_OUT_CLIENT_ID_OFST 0
+#define MC_CMD_CLIENT_ALLOC_OUT_CLIENT_ID_LEN 4
+
+
+/***********************************/
+/* MC_CMD_CLIENT_FREE
+ * Destroy and release an existing client object. All resources owned by that
+ * client (including its child clients, and thus all resources owned by the
+ * entire family tree) are freed.
+ */
+#define MC_CMD_CLIENT_FREE 0x1bc
+#define MC_CMD_CLIENT_FREE_MSGSET 0x1bc
+#undef MC_CMD_0x1bc_PRIVILEGE_CTG
+
+#define MC_CMD_0x1bc_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_CLIENT_FREE_IN msgrequest */
+#define MC_CMD_CLIENT_FREE_IN_LEN 4
+/* The ID of the client to be freed. This client must be a descendant of the
+ * requestor. A client cannot free itself.
+ */
+#define MC_CMD_CLIENT_FREE_IN_CLIENT_ID_OFST 0
+#define MC_CMD_CLIENT_FREE_IN_CLIENT_ID_LEN 4
+
+/* MC_CMD_CLIENT_FREE_OUT msgresponse */
+#define MC_CMD_CLIENT_FREE_OUT_LEN 0
+
+
+/***********************************/
+/* MC_CMD_SET_VI_USER
+ * Assign partial rights over this VI to another client. VIs have an 'owner'
+ * and a 'user'. The owner is the client which allocated the VI
+ * (MC_CMD_ALLOC_VIS) and cannot be changed. The user is the client which has
+ * permission to create queues and other resources on that VI. Initially
+ * user==owner, but the user can be changed by this command; the resources thus
+ * created are then owned by the user-client. Only the VI owner can call this
+ * command, and the request will fail if there are any outstanding child
+ * resources (e.g. queues) currently allocated from this VI.
+ */
+#define MC_CMD_SET_VI_USER 0x1be
+#define MC_CMD_SET_VI_USER_MSGSET 0x1be
+#undef MC_CMD_0x1be_PRIVILEGE_CTG
+
+#define MC_CMD_0x1be_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_SET_VI_USER_IN msgrequest */
+#define MC_CMD_SET_VI_USER_IN_LEN 8
+/* Function-relative VI number to modify. */
+#define MC_CMD_SET_VI_USER_IN_INSTANCE_OFST 0
+#define MC_CMD_SET_VI_USER_IN_INSTANCE_LEN 4
+/* Client ID to become the new user. This must be a descendant of the owning
+ * client, the owning client itself, or the special value MC_CMD_CLIENT_ID_SELF
+ * which is synonymous with the owning client.
+ */
+#define MC_CMD_SET_VI_USER_IN_CLIENT_ID_OFST 4
+#define MC_CMD_SET_VI_USER_IN_CLIENT_ID_LEN 4
+
+/* MC_CMD_SET_VI_USER_OUT msgresponse */
+#define MC_CMD_SET_VI_USER_OUT_LEN 0
+
+
+/***********************************/
+/* MC_CMD_GET_CLIENT_MAC_ADDRESSES
+ * A device reports a set of MAC addresses for each client to use, known as the
+ * "permanent MAC addresses". Those MAC addresses are provided by the client's
+ * administrator, e.g. via MC_CMD_SET_CLIENT_MAC_ADDRESSES, and are intended as
+ * a hint to that client which MAC address its administrator would like to use
+ * to identity itself. This API exists solely to allow communication of MAC
+ * address from administrator to adminstree, and has no inherent interaction
+ * with switching within the device. There is no guarantee that a client will
+ * be able to send traffic with a source MAC address taken from the list of MAC
+ * address reported, nor is there a guarantee that a client will be able to
+ * resource traffic with a destination MAC taken from the list of MAC
+ * addresses. Likewise, there is no guarantee that a client will not be able to
+ * use a MAC address not present in the list. Restrictions on switching are
+ * controlled either through the EVB API if operating in EVB mode, or via MAE
+ * rules if host software is directly managing the MAE. In order to allow
+ * tenants to use this API whilst a provider is using the EVB API, the MAC
+ * addresses reported by MC_CMD_GET_CLIENT_MAC_ADDRESSES will be augmented with
+ * any MAC addresses associated with the vPort assigned to the caller. In order
+ * to allow tenants to use the EVB API whilst a provider is using this API, if
+ * a client queries the MAC addresses for a vPort using the host_evb_port_id
+ * EVB_PORT_ASSIGNED, that list of MAC addresses will be augmented with the MAC
+ * addresses assigned to the calling client. This query can either be explicit
+ * (i.e. MC_CMD_VPORT_GET_MAC_ADDRESSES) or implicit (e.g. creation of a
+ * vAdaptor with a NULL/automatic MAC address). Changing the MAC address on a
+ * vAdaptor only affects VNIC steering filters; it has no effect on the MAC
+ * addresses assigned to the vAdaptor's owner. VirtIO clients behave as EVB
+ * clients. On VirtIO device reset, a vAdaptor is created with an automatic MAC
+ * address. Querying the VirtIO device's MAC address queries the underlying
+ * vAdaptor's MAC address. Setting the VirtIO device's MAC address sets the
+ * underlying vAdaptor's MAC addresses.
+ */
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES 0x1c4
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_MSGSET 0x1c4
+#undef MC_CMD_0x1c4_PRIVILEGE_CTG
+
+#define MC_CMD_0x1c4_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_GET_CLIENT_MAC_ADDRESSES_IN msgrequest */
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_IN_LEN 4
+/* A handle for the client for whom MAC address should be obtained. Use
+ * CLIENT_HANDLE_SELF to obtain the MAC addresses assigned to the calling
+ * client.
+ */
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_IN_CLIENT_HANDLE_OFST 0
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_IN_CLIENT_HANDLE_LEN 4
+
+/* MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT msgresponse */
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_LENMIN 0
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_LENMAX 252
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_LENMAX_MCDI2 1020
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_LEN(num) (0+6*(num))
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_MAC_ADDRS_NUM(len) (((len)-0)/6)
+/* An array of MAC addresses assigned to the client. */
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_MAC_ADDRS_OFST 0
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_MAC_ADDRS_LEN 6
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_MAC_ADDRS_MINNUM 0
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_MAC_ADDRS_MAXNUM 42
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_MAC_ADDRS_MAXNUM_MCDI2 170
+
+
+/***********************************/
+/* MC_CMD_SET_CLIENT_MAC_ADDRESSES
+ * Set the permanent MAC addresses for a client. The caller must by an
+ * administrator of the target client. See MC_CMD_GET_CLIENT_MAC_ADDRESSES for
+ * additional detail.
+ */
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES 0x1c5
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_MSGSET 0x1c5
+#undef MC_CMD_0x1c5_PRIVILEGE_CTG
+
+#define MC_CMD_0x1c5_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN msgrequest */
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_LENMIN 4
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_LENMAX 250
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_LENMAX_MCDI2 1018
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_LEN(num) (4+6*(num))
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_MAC_ADDRS_NUM(len) (((len)-4)/6)
+/* A handle for the client for whom MAC addresses should be set */
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_CLIENT_HANDLE_OFST 0
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_CLIENT_HANDLE_LEN 4
+/* An array of MAC addresses to assign to the client. */
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_MAC_ADDRS_OFST 4
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_MAC_ADDRS_LEN 6
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_MAC_ADDRS_MINNUM 0
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_MAC_ADDRS_MAXNUM 41
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_MAC_ADDRS_MAXNUM_MCDI2 169
+
+/* MC_CMD_SET_CLIENT_MAC_ADDRESSES_OUT msgresponse */
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_OUT_LEN 0
+
+
+/***********************************/
+/* MC_CMD_GET_BOARD_ATTR
+ * Retrieve physical build-level board attributes as configured at
+ * manufacturing stage. Fields originate from EEPROM and per-platform constants
+ * in firmware. Fields are used in development to identify/ differentiate
+ * boards based on build levels/parameters, and also in manufacturing to cross
+ * check "what was programmed in manufacturing" is same as "what firmware
+ * thinks has been programmed" as there are two layers to translation within
+ * firmware before the attributes reach this MCDI handler. Some parameters are
+ * retrieved as part of other commands and therefore not replicated here. See
+ * GET_VERSION_OUT.
+ */
+#define MC_CMD_GET_BOARD_ATTR 0x1c6
+#define MC_CMD_GET_BOARD_ATTR_MSGSET 0x1c6
+#undef MC_CMD_0x1c6_PRIVILEGE_CTG
+
+#define MC_CMD_0x1c6_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_GET_BOARD_ATTR_IN msgrequest */
+#define MC_CMD_GET_BOARD_ATTR_IN_LEN 0
+
+/* MC_CMD_GET_BOARD_ATTR_OUT msgresponse */
+#define MC_CMD_GET_BOARD_ATTR_OUT_LEN 16
+/* Defines board capabilities and validity of attributes returned in this
+ * response-message.
+ */
+#define MC_CMD_GET_BOARD_ATTR_OUT_FLAGS_OFST 0
+#define MC_CMD_GET_BOARD_ATTR_OUT_FLAGS_LEN 4
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_FAN_OFST 0
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_FAN_LBN 0
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_FAN_WIDTH 1
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_SOC_OFST 0
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_SOC_LBN 1
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_SOC_WIDTH 1
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_AUX_POWER_OFST 0
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_AUX_POWER_LBN 2
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_AUX_POWER_WIDTH 1
+#define MC_CMD_GET_BOARD_ATTR_OUT_ATTRIBUTES_OFST 4
+#define MC_CMD_GET_BOARD_ATTR_OUT_ATTRIBUTES_LEN 4
+#define MC_CMD_GET_BOARD_ATTR_OUT_SOC_EE_OFST 4
+#define MC_CMD_GET_BOARD_ATTR_OUT_SOC_EE_LBN 0
+#define MC_CMD_GET_BOARD_ATTR_OUT_SOC_EE_WIDTH 1
+#define MC_CMD_GET_BOARD_ATTR_OUT_SUC_EE_OFST 4
+#define MC_CMD_GET_BOARD_ATTR_OUT_SUC_EE_LBN 1
+#define MC_CMD_GET_BOARD_ATTR_OUT_SUC_EE_WIDTH 1
+#define MC_CMD_GET_BOARD_ATTR_OUT_FPGA_VOLTAGES_SUPPORTED_OFST 4
+#define MC_CMD_GET_BOARD_ATTR_OUT_FPGA_VOLTAGES_SUPPORTED_LBN 16
+#define MC_CMD_GET_BOARD_ATTR_OUT_FPGA_VOLTAGES_SUPPORTED_WIDTH 8
+/* enum: The FPGA voltage on the adapter can be set to low */
+#define MC_CMD_FPGA_VOLTAGE_LOW 0x0
+/* enum: The FPGA voltage on the adapter can be set to regular */
+#define MC_CMD_FPGA_VOLTAGE_REG 0x1
+/* enum: The FPGA voltage on the adapter can be set to high */
+#define MC_CMD_FPGA_VOLTAGE_HIGH 0x2
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_COUNT_OFST 4
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_COUNT_LBN 24
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_COUNT_WIDTH 8
+/* An array of cage types on the board */
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_OFST 8
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_LEN 1
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_NUM 8
+/* enum: The cages are not known */
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_UNKNOWN 0x0
+/* enum: The cages are SFP/SFP+ */
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_SFP 0x1
+/* enum: The cages are QSFP/QSFP+ */
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_QSFP 0x2
+
+
+/***********************************/
+/* MC_CMD_GET_SOC_STATE
+ * Retrieve current state of the System-on-Chip. This command is valid when
+ * MC_CMD_GET_BOARD_ATTR:HAS_SOC is set.
+ */
+#define MC_CMD_GET_SOC_STATE 0x1c7
+#define MC_CMD_GET_SOC_STATE_MSGSET 0x1c7
+#undef MC_CMD_0x1c7_PRIVILEGE_CTG
+
+#define MC_CMD_0x1c7_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_GET_SOC_STATE_IN msgrequest */
+#define MC_CMD_GET_SOC_STATE_IN_LEN 0
+
+/* MC_CMD_GET_SOC_STATE_OUT msgresponse */
+#define MC_CMD_GET_SOC_STATE_OUT_LEN 12
+/* Status flags for the SoC */
+#define MC_CMD_GET_SOC_STATE_OUT_FLAGS_OFST 0
+#define MC_CMD_GET_SOC_STATE_OUT_FLAGS_LEN 4
+#define MC_CMD_GET_SOC_STATE_OUT_SHOULD_THROTTLE_OFST 0
+#define MC_CMD_GET_SOC_STATE_OUT_SHOULD_THROTTLE_LBN 0
+#define MC_CMD_GET_SOC_STATE_OUT_SHOULD_THROTTLE_WIDTH 1
+#define MC_CMD_GET_SOC_STATE_OUT_OS_RECOVERY_REQUIRED_OFST 0
+#define MC_CMD_GET_SOC_STATE_OUT_OS_RECOVERY_REQUIRED_LBN 1
+#define MC_CMD_GET_SOC_STATE_OUT_OS_RECOVERY_REQUIRED_WIDTH 1
+#define MC_CMD_GET_SOC_STATE_OUT_WDT_FIRED_OFST 0
+#define MC_CMD_GET_SOC_STATE_OUT_WDT_FIRED_LBN 2
+#define MC_CMD_GET_SOC_STATE_OUT_WDT_FIRED_WIDTH 1
+/* Status fields for the SoC */
+#define MC_CMD_GET_SOC_STATE_OUT_ATTRIBUTES_OFST 4
+#define MC_CMD_GET_SOC_STATE_OUT_ATTRIBUTES_LEN 4
+#define MC_CMD_GET_SOC_STATE_OUT_RUN_STATE_OFST 4
+#define MC_CMD_GET_SOC_STATE_OUT_RUN_STATE_LBN 0
+#define MC_CMD_GET_SOC_STATE_OUT_RUN_STATE_WIDTH 8
+/* enum: Power on (set by SUC on power up) */
+#define MC_CMD_GET_SOC_STATE_OUT_SOC_BOOT 0x0
+/* enum: Running bootloader */
+#define MC_CMD_GET_SOC_STATE_OUT_SOC_BOOTLOADER 0x1
+/* enum: Bootloader has started OS. OS is booting */
+#define MC_CMD_GET_SOC_STATE_OUT_SOC_OS_START 0x2
+/* enum: OS is running */
+#define MC_CMD_GET_SOC_STATE_OUT_SOC_OS_RUNNING 0x3
+/* enum: Maintenance OS is running */
+#define MC_CMD_GET_SOC_STATE_OUT_SOC_OS_MAINTENANCE 0x4
+/* Number of SoC resets since power on */
+#define MC_CMD_GET_SOC_STATE_OUT_RESET_COUNT_OFST 8
+#define MC_CMD_GET_SOC_STATE_OUT_RESET_COUNT_LEN 4
+
+
+/***********************************/
+/* MC_CMD_CHECK_SCHEDULER_CREDITS
+ * For debugging purposes. For each source and destination node in the hardware
+ * schedulers, check whether the number of credits is as it should be. This
+ * should only be used when the NIC is idle, because collection is not atomic
+ * and because the expected credit counts are only meaningful when no traffic
+ * is flowing.
+ */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS 0x1c8
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_MSGSET 0x1c8
+#undef MC_CMD_0x1c8_PRIVILEGE_CTG
+
+#define MC_CMD_0x1c8_PRIVILEGE_CTG SRIOV_CTG_ADMIN
+
+/* MC_CMD_CHECK_SCHEDULER_CREDITS_IN msgrequest */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_IN_LEN 8
+/* Flags for the request */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_IN_FLAGS_OFST 0
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_IN_FLAGS_LEN 4
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_IN_REPORT_ALL_OFST 0
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_IN_REPORT_ALL_LBN 0
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_IN_REPORT_ALL_WIDTH 1
+/* If there are too many results to fit into an MCDI response, they're split
+ * into pages. This field specifies which (0-indexed) page to request. A
+ * request with PAGE=0 will snapshot the results, and subsequent requests with
+ * PAGE>0 will return data from the most recent snapshot. The GENERATION field
+ * in the response allows callers to verify that all responses correspond to
+ * the same snapshot.
+ */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_IN_PAGE_OFST 4
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_IN_PAGE_LEN 4
+
+/* MC_CMD_CHECK_SCHEDULER_CREDITS_OUT msgresponse */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_LENMIN 16
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_LENMAX 240
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_LENMAX_MCDI2 1008
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_LEN(num) (16+16*(num))
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_NUM(len) (((len)-16)/16)
+/* The total number of results (across all pages). */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_TOTAL_RESULTS_OFST 0
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_TOTAL_RESULTS_LEN 4
+/* The number of pages that the response is split across. */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_NUM_PAGES_OFST 4
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_NUM_PAGES_LEN 4
+/* The number of results in this response. */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_THIS_PAGE_OFST 8
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_THIS_PAGE_LEN 4
+/* Result generation count. Incremented any time a request is made with PAGE=0.
+ */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_GENERATION_OFST 12
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_GENERATION_LEN 4
+/* The results, as an array of SCHED_CREDIT_CHECK_RESULT structures. */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_OFST 16
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_LEN 16
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_MINNUM 0
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_MAXNUM 14
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_MAXNUM_MCDI2 62
/* FUNCTION_PERSONALITY structuredef: The meanings of the personalities are
* defined in SF-120734-TC with more information in SF-122717-TC.
@@ -24839,6 +27140,7 @@
* Get a list of the virtio features supported by the device.
*/
#define MC_CMD_VIRTIO_GET_FEATURES 0x168
+#define MC_CMD_VIRTIO_GET_FEATURES_MSGSET 0x168
#undef MC_CMD_0x168_PRIVILEGE_CTG
#define MC_CMD_0x168_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24867,7 +27169,13 @@
#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_OFST 0
#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_LEN 8
#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_LO_OFST 0
+#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_LO_LEN 4
+#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_LO_LBN 0
+#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_LO_WIDTH 32
#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_HI_OFST 4
+#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_HI_LEN 4
+#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_HI_LBN 32
+#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_HI_WIDTH 32
/***********************************/
@@ -24877,6 +27185,7 @@
* the driver fails to request a feature which the device requires.
*/
#define MC_CMD_VIRTIO_TEST_FEATURES 0x169
+#define MC_CMD_VIRTIO_TEST_FEATURES_MSGSET 0x169
#undef MC_CMD_0x169_PRIVILEGE_CTG
#define MC_CMD_0x169_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24898,7 +27207,13 @@
#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_OFST 8
#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_LEN 8
#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_LO_OFST 8
+#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_LO_LEN 4
+#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_LO_LBN 64
+#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_LO_WIDTH 32
#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_HI_OFST 12
+#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_HI_LEN 4
+#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_HI_LBN 96
+#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_HI_WIDTH 32
/* MC_CMD_VIRTIO_TEST_FEATURES_OUT msgresponse */
#define MC_CMD_VIRTIO_TEST_FEATURES_OUT_LEN 0
@@ -24912,6 +27227,7 @@
* invalid.
*/
#define MC_CMD_VIRTIO_INIT_QUEUE 0x16a
+#define MC_CMD_VIRTIO_INIT_QUEUE_MSGSET 0x16a
#undef MC_CMD_0x16a_PRIVILEGE_CTG
#define MC_CMD_0x16a_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24956,17 +27272,35 @@
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_OFST 16
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_LEN 8
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_LO_OFST 16
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_LO_LEN 4
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_LO_LBN 128
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_LO_WIDTH 32
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_HI_OFST 20
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_HI_LEN 4
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_HI_LBN 160
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_HI_WIDTH 32
/* Address of the available ring in the virtqueue. */
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_OFST 24
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_LEN 8
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_LO_OFST 24
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_LO_LEN 4
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_LO_LBN 192
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_LO_WIDTH 32
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_HI_OFST 28
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_HI_LEN 4
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_HI_LBN 224
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_HI_WIDTH 32
/* Address of the used ring in the virtqueue. */
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_OFST 32
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_LEN 8
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_LO_OFST 32
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_LO_LEN 4
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_LO_LBN 256
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_LO_WIDTH 32
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_HI_OFST 36
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_HI_LEN 4
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_HI_LBN 288
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_HI_WIDTH 32
/* PASID to use on PCIe transactions involving this queue. Ignored if the
* USE_PASID flag is not set.
*/
@@ -24990,7 +27324,13 @@
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_OFST 48
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_LEN 8
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_LO_OFST 48
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_LO_LEN 4
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_LO_LBN 384
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_LO_WIDTH 32
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_HI_OFST 52
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_HI_LEN 4
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_HI_LBN 416
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_HI_WIDTH 32
/* Enum values, see field(s): */
/* MC_CMD_VIRTIO_GET_FEATURES/MC_CMD_VIRTIO_GET_FEATURES_OUT/FEATURES */
/* The initial producer index for this queue's used ring. If this queue is
@@ -25023,6 +27363,7 @@
* Destroy a virtio virtqueue
*/
#define MC_CMD_VIRTIO_FINI_QUEUE 0x16b
+#define MC_CMD_VIRTIO_FINI_QUEUE_MSGSET 0x16b
#undef MC_CMD_0x16b_PRIVILEGE_CTG
#define MC_CMD_0x16b_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -25063,6 +27404,7 @@
* queue(s) to be allocated.
*/
#define MC_CMD_VIRTIO_GET_DOORBELL_OFFSET 0x16c
+#define MC_CMD_VIRTIO_GET_DOORBELL_OFFSET_MSGSET 0x16c
#undef MC_CMD_0x16c_PRIVILEGE_CTG
#define MC_CMD_0x16c_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -25132,12 +27474,18 @@
#define PCIE_FUNCTION_VF_NULL 0xffff
#define PCIE_FUNCTION_VF_LBN 16
#define PCIE_FUNCTION_VF_WIDTH 16
-/* PCIe interface of the function */
+/* PCIe interface of the function. Values should be taken from the
+ * PCIE_INTERFACE enum
+ */
#define PCIE_FUNCTION_INTF_OFST 4
#define PCIE_FUNCTION_INTF_LEN 4
-/* enum: Host PCIe interface */
+/* enum: Host PCIe interface. (Alias for HOST_PRIMARY, provided for backwards
+ * compatibility)
+ */
#define PCIE_FUNCTION_INTF_HOST 0x0
-/* enum: Application Processor interface */
+/* enum: Application Processor interface (alias for NIC_EMBEDDED, provided for
+ * backwards compatibility)
+ */
#define PCIE_FUNCTION_INTF_AP 0x1
#define PCIE_FUNCTION_INTF_LBN 32
#define PCIE_FUNCTION_INTF_WIDTH 32
@@ -25157,6 +27505,7 @@
* MC_CMD_DESC_PROXY_FUNC_COMMIT_IN.
*/
#define MC_CMD_DESC_PROXY_FUNC_CREATE 0x172
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_MSGSET 0x172
#undef MC_CMD_0x172_PRIVILEGE_CTG
#define MC_CMD_0x172_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25170,7 +27519,19 @@
#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_OFST 0
#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_LEN 8
#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_LO_OFST 0
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_LO_LEN 4
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_LO_LBN 0
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_LO_WIDTH 32
#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_HI_OFST 4
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_HI_LEN 4
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_HI_LBN 32
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_HI_WIDTH 32
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_PF_OFST 0
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_PF_LEN 2
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_VF_OFST 2
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_VF_LEN 2
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_INTF_OFST 4
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_INTF_LEN 4
/* The personality to set. The meanings of the personalities are defined in
* SF-120734-TC with more information in SF-122717-TC. At present, we only
* support proxying for VIRTIO_BLK
@@ -25194,7 +27555,19 @@
#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_OFST 4
#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_LEN 8
#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_LO_OFST 4
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_LO_LEN 4
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_LO_LBN 32
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_LO_WIDTH 32
#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_HI_OFST 8
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_HI_LEN 4
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_HI_LBN 64
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_HI_WIDTH 32
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_PF_OFST 4
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_PF_LEN 2
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_VF_OFST 6
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_VF_LEN 2
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_INTF_OFST 8
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_INTF_LEN 4
/***********************************/
@@ -25205,6 +27578,7 @@
* ownership is released.
*/
#define MC_CMD_DESC_PROXY_FUNC_DESTROY 0x173
+#define MC_CMD_DESC_PROXY_FUNC_DESTROY_MSGSET 0x173
#undef MC_CMD_0x173_PRIVILEGE_CTG
#define MC_CMD_0x173_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25235,7 +27609,13 @@
#define VIRTIO_BLK_CONFIG_FEATURES_OFST 0
#define VIRTIO_BLK_CONFIG_FEATURES_LEN 8
#define VIRTIO_BLK_CONFIG_FEATURES_LO_OFST 0
+#define VIRTIO_BLK_CONFIG_FEATURES_LO_LEN 4
+#define VIRTIO_BLK_CONFIG_FEATURES_LO_LBN 0
+#define VIRTIO_BLK_CONFIG_FEATURES_LO_WIDTH 32
#define VIRTIO_BLK_CONFIG_FEATURES_HI_OFST 4
+#define VIRTIO_BLK_CONFIG_FEATURES_HI_LEN 4
+#define VIRTIO_BLK_CONFIG_FEATURES_HI_LBN 32
+#define VIRTIO_BLK_CONFIG_FEATURES_HI_WIDTH 32
#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_BARRIER_OFST 0
#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_BARRIER_LBN 0
#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_BARRIER_WIDTH 1
@@ -25308,7 +27688,13 @@
#define VIRTIO_BLK_CONFIG_CAPACITY_OFST 8
#define VIRTIO_BLK_CONFIG_CAPACITY_LEN 8
#define VIRTIO_BLK_CONFIG_CAPACITY_LO_OFST 8
+#define VIRTIO_BLK_CONFIG_CAPACITY_LO_LEN 4
+#define VIRTIO_BLK_CONFIG_CAPACITY_LO_LBN 64
+#define VIRTIO_BLK_CONFIG_CAPACITY_LO_WIDTH 32
#define VIRTIO_BLK_CONFIG_CAPACITY_HI_OFST 12
+#define VIRTIO_BLK_CONFIG_CAPACITY_HI_LEN 4
+#define VIRTIO_BLK_CONFIG_CAPACITY_HI_LBN 96
+#define VIRTIO_BLK_CONFIG_CAPACITY_HI_WIDTH 32
#define VIRTIO_BLK_CONFIG_CAPACITY_LBN 64
#define VIRTIO_BLK_CONFIG_CAPACITY_WIDTH 64
/* Maximum size of any single segment. Only valid when VIRTIO_BLK_F_SIZE_MAX is
@@ -25445,6 +27831,7 @@
* not persisted until the caller commits with MC_CMD_DESC_PROXY_FUNC_COMMIT_IN
*/
#define MC_CMD_DESC_PROXY_FUNC_CONFIG_SET 0x174
+#define MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_MSGSET 0x174
#undef MC_CMD_0x174_PRIVILEGE_CTG
#define MC_CMD_0x174_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25485,6 +27872,7 @@
* delivered to callers MCDI event queue.
*/
#define MC_CMD_DESC_PROXY_FUNC_COMMIT 0x175
+#define MC_CMD_DESC_PROXY_FUNC_COMMIT_MSGSET 0x175
#undef MC_CMD_0x175_PRIVILEGE_CTG
#define MC_CMD_0x175_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25518,6 +27906,7 @@
* cycle. Returns ENODEV if no function with given label exists.
*/
#define MC_CMD_DESC_PROXY_FUNC_OPEN 0x176
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_MSGSET 0x176
#undef MC_CMD_0x176_PRIVILEGE_CTG
#define MC_CMD_0x176_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25543,7 +27932,19 @@
#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_OFST 4
#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_LEN 8
#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_LO_OFST 4
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_LO_LEN 4
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_LO_LBN 32
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_LO_WIDTH 32
#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_HI_OFST 8
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_HI_LEN 4
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_HI_LBN 64
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_HI_WIDTH 32
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_PF_OFST 4
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_PF_LEN 2
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_VF_OFST 6
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_VF_LEN 2
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_INTF_OFST 8
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_INTF_LEN 4
/* Function personality */
#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_PERSONALITY_OFST 12
#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_PERSONALITY_LEN 4
@@ -25588,6 +27989,7 @@
* error (for virtio, DEVICE_NEEDS_RESET flag would be set on the host side)
*/
#define MC_CMD_DESC_PROXY_FUNC_CLOSE 0x1a1
+#define MC_CMD_DESC_PROXY_FUNC_CLOSE_MSGSET 0x1a1
#undef MC_CMD_0x1a1_PRIVILEGE_CTG
#define MC_CMD_0x1a1_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25607,9 +28009,27 @@
#define DESC_PROXY_FUNC_MAP_FUNC_OFST 0
#define DESC_PROXY_FUNC_MAP_FUNC_LEN 8
#define DESC_PROXY_FUNC_MAP_FUNC_LO_OFST 0
+#define DESC_PROXY_FUNC_MAP_FUNC_LO_LEN 4
+#define DESC_PROXY_FUNC_MAP_FUNC_LO_LBN 0
+#define DESC_PROXY_FUNC_MAP_FUNC_LO_WIDTH 32
#define DESC_PROXY_FUNC_MAP_FUNC_HI_OFST 4
+#define DESC_PROXY_FUNC_MAP_FUNC_HI_LEN 4
+#define DESC_PROXY_FUNC_MAP_FUNC_HI_LBN 32
+#define DESC_PROXY_FUNC_MAP_FUNC_HI_WIDTH 32
#define DESC_PROXY_FUNC_MAP_FUNC_LBN 0
#define DESC_PROXY_FUNC_MAP_FUNC_WIDTH 64
+#define DESC_PROXY_FUNC_MAP_FUNC_PF_OFST 0
+#define DESC_PROXY_FUNC_MAP_FUNC_PF_LEN 2
+#define DESC_PROXY_FUNC_MAP_FUNC_PF_LBN 0
+#define DESC_PROXY_FUNC_MAP_FUNC_PF_WIDTH 16
+#define DESC_PROXY_FUNC_MAP_FUNC_VF_OFST 2
+#define DESC_PROXY_FUNC_MAP_FUNC_VF_LEN 2
+#define DESC_PROXY_FUNC_MAP_FUNC_VF_LBN 16
+#define DESC_PROXY_FUNC_MAP_FUNC_VF_WIDTH 16
+#define DESC_PROXY_FUNC_MAP_FUNC_INTF_OFST 4
+#define DESC_PROXY_FUNC_MAP_FUNC_INTF_LEN 4
+#define DESC_PROXY_FUNC_MAP_FUNC_INTF_LBN 32
+#define DESC_PROXY_FUNC_MAP_FUNC_INTF_WIDTH 32
/* Function personality */
#define DESC_PROXY_FUNC_MAP_PERSONALITY_OFST 8
#define DESC_PROXY_FUNC_MAP_PERSONALITY_LEN 4
@@ -25631,6 +28051,7 @@
* Enumerate existing descriptor proxy functions
*/
#define MC_CMD_DESC_PROXY_FUNC_ENUM 0x177
+#define MC_CMD_DESC_PROXY_FUNC_ENUM_MSGSET 0x177
#undef MC_CMD_0x177_PRIVILEGE_CTG
#define MC_CMD_0x177_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25670,6 +28091,7 @@
* function.
*/
#define MC_CMD_DESC_PROXY_FUNC_ENABLE 0x178
+#define MC_CMD_DESC_PROXY_FUNC_ENABLE_MSGSET 0x178
#undef MC_CMD_0x178_PRIVILEGE_CTG
#define MC_CMD_0x178_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25702,6 +28124,7 @@
* Disable descriptor proxying for function
*/
#define MC_CMD_DESC_PROXY_FUNC_DISABLE 0x179
+#define MC_CMD_DESC_PROXY_FUNC_DISABLE_MSGSET 0x179
#undef MC_CMD_0x179_PRIVILEGE_CTG
#define MC_CMD_0x179_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25725,6 +28148,7 @@
* descriptors.
*/
#define MC_CMD_GET_ADDR_SPC_ID 0x1a0
+#define MC_CMD_GET_ADDR_SPC_ID_MSGSET 0x1a0
#undef MC_CMD_0x1a0_PRIVILEGE_CTG
#define MC_CMD_0x1a0_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25769,7 +28193,19 @@
#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_OFST 4
#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_LEN 8
#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_LO_OFST 4
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_LO_LEN 4
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_LO_LBN 32
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_LO_WIDTH 32
#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_HI_OFST 8
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_HI_LEN 4
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_HI_LBN 64
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_HI_WIDTH 32
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_PF_OFST 4
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_PF_LEN 2
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_VF_OFST 6
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_VF_LEN 2
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_INTF_OFST 8
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_INTF_LEN 4
/* PASID value. Only valid if TYPE is PCI_FUNC_PASID. */
#define MC_CMD_GET_ADDR_SPC_ID_IN_PASID_OFST 12
#define MC_CMD_GET_ADDR_SPC_ID_IN_PASID_LEN 4
@@ -25789,7 +28225,72 @@
#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_OFST 0
#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_LEN 8
#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_LO_OFST 0
+#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_LO_LEN 4
+#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_LO_LBN 0
+#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_LO_WIDTH 32
#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_HI_OFST 4
+#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_HI_LEN 4
+#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_HI_LBN 32
+#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_HI_WIDTH 32
+
+
+/***********************************/
+/* MC_CMD_GET_CLIENT_HANDLE
+ * Obtain a handle for a client given a description of that client. N.B. this
+ * command is subject to change given the open discussion about how PCIe
+ * functions should be referenced on an iEP (integrated endpoint: functions
+ * span multiple buses) and multihost (multiple PCIe interfaces) system.
+ */
+#define MC_CMD_GET_CLIENT_HANDLE 0x1c3
+#define MC_CMD_GET_CLIENT_HANDLE_MSGSET 0x1c3
+#undef MC_CMD_0x1c3_PRIVILEGE_CTG
+
+#define MC_CMD_0x1c3_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_GET_CLIENT_HANDLE_IN msgrequest */
+#define MC_CMD_GET_CLIENT_HANDLE_IN_LEN 12
+/* Type of client to get a client handle for */
+#define MC_CMD_GET_CLIENT_HANDLE_IN_TYPE_OFST 0
+#define MC_CMD_GET_CLIENT_HANDLE_IN_TYPE_LEN 4
+/* enum: Obtain a client handle for a PCIe function-type client. */
+#define MC_CMD_GET_CLIENT_HANDLE_IN_TYPE_FUNC 0x0
+/* PCIe Function ID (as struct PCIE_FUNCTION). Valid when TYPE==FUNC. Use: -
+ * INTF=CALLER, PF=PF_NULL, VF=VF_NULL to refer to the calling function -
+ * INTF=CALLER, PF=PF_NULL, VF=... to refer to a VF child of the calling PF or
+ * a sibling VF of the calling VF. - INTF=CALLER, PF=..., VF=VF_NULL to refer
+ * to a PF on the calling interface - INTF=CALLER, PF=..., VF=... to refer to a
+ * VF on the calling interface - INTF=..., PF=..., VF=VF_NULL to refer to a PF
+ * on a named interface - INTF=..., PF=..., VF=... to refer to a VF on a named
+ * interface where ... refers to a small integer for the VF/PF fields, and to
+ * values from the PCIE_INTERFACE enum for for the INTF field. It's only
+ * meaningful to use INTF=CALLER within a structure that's an argument to
+ * MC_CMD_DEVEL_GET_CLIENT_HANDLE.
+ */
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_OFST 4
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_LEN 8
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_LO_OFST 4
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_LO_LEN 4
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_LO_LBN 32
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_LO_WIDTH 32
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_HI_OFST 8
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_HI_LEN 4
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_HI_LBN 64
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_HI_WIDTH 32
+/* enum: NULL value for the INTF field of struct PCIE_FUNCTION. Provided for
+ * backwards compatibility only, callers should use PCIE_INTERFACE_CALLER.
+ */
+#define MC_CMD_GET_CLIENT_HANDLE_IN_PCIE_FUNCTION_INTF_NULL 0xffffffff
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_PF_OFST 4
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_PF_LEN 2
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_VF_OFST 6
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_VF_LEN 2
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_INTF_OFST 8
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_INTF_LEN 4
+
+/* MC_CMD_GET_CLIENT_HANDLE_OUT msgresponse */
+#define MC_CMD_GET_CLIENT_HANDLE_OUT_LEN 4
+#define MC_CMD_GET_CLIENT_HANDLE_OUT_HANDLE_OFST 0
+#define MC_CMD_GET_CLIENT_HANDLE_OUT_HANDLE_LEN 4
/* MAE_FIELD_FLAGS structuredef */
#define MAE_FIELD_FLAGS_LEN 4
@@ -25937,6 +28438,40 @@
#define MAE_ENC_FIELD_PAIRS_ENC_IP_TTL_MASK_LEN 1
#define MAE_ENC_FIELD_PAIRS_ENC_IP_TTL_MASK_LBN 1096
#define MAE_ENC_FIELD_PAIRS_ENC_IP_TTL_MASK_WIDTH 8
+#define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_OFST 138
+#define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_LEN 1
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_OVLAN_OFST 138
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_OVLAN_LBN 0
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_OVLAN_WIDTH 1
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_IVLAN_OFST 138
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_IVLAN_LBN 1
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_IVLAN_WIDTH 1
+#define MAE_ENC_FIELD_PAIRS_ENC_IP_FRAG_OFST 138
+#define MAE_ENC_FIELD_PAIRS_ENC_IP_FRAG_LBN 2
+#define MAE_ENC_FIELD_PAIRS_ENC_IP_FRAG_WIDTH 1
+#define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_LBN 1104
+#define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_WIDTH 8
+#define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_OFST 138
+#define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_LEN 1
+#define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_LBN 1104
+#define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_WIDTH 8
+#define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_MASK_OFST 139
+#define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_MASK_LEN 1
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_OVLAN_MASK_OFST 139
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_OVLAN_MASK_LBN 0
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_OVLAN_MASK_WIDTH 1
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_IVLAN_MASK_OFST 139
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_IVLAN_MASK_LBN 1
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_IVLAN_MASK_WIDTH 1
+#define MAE_ENC_FIELD_PAIRS_ENC_IP_FRAG_MASK_OFST 139
+#define MAE_ENC_FIELD_PAIRS_ENC_IP_FRAG_MASK_LBN 2
+#define MAE_ENC_FIELD_PAIRS_ENC_IP_FRAG_MASK_WIDTH 1
+#define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_MASK_LBN 1112
+#define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_MASK_WIDTH 8
+#define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_MASK_OFST 139
+#define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_MASK_LEN 1
+#define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_MASK_LBN 1112
+#define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_MASK_WIDTH 8
#define MAE_ENC_FIELD_PAIRS_ENC_IP_FLAGS_BE_OFST 140
#define MAE_ENC_FIELD_PAIRS_ENC_IP_FLAGS_BE_LEN 4
#define MAE_ENC_FIELD_PAIRS_ENC_IP_FLAGS_BE_LBN 1120
@@ -26623,9 +29158,24 @@
#define MAE_FIELD_MASK_VALUE_PAIRS_V2_IS_FROM_NETWORK_OFST 344
#define MAE_FIELD_MASK_VALUE_PAIRS_V2_IS_FROM_NETWORK_LBN 3
#define MAE_FIELD_MASK_VALUE_PAIRS_V2_IS_FROM_NETWORK_WIDTH 1
-#define MAE_FIELD_MASK_VALUE_PAIRS_V2_RSVD_OFST 344
-#define MAE_FIELD_MASK_VALUE_PAIRS_V2_RSVD_LBN 4
-#define MAE_FIELD_MASK_VALUE_PAIRS_V2_RSVD_WIDTH 28
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_HAS_OVLAN_OFST 344
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_HAS_OVLAN_LBN 4
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_HAS_OVLAN_WIDTH 1
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_HAS_IVLAN_OFST 344
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_HAS_IVLAN_LBN 5
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_HAS_IVLAN_WIDTH 1
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_ENC_HAS_OVLAN_OFST 344
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_ENC_HAS_OVLAN_LBN 6
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_ENC_HAS_OVLAN_WIDTH 1
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_ENC_HAS_IVLAN_OFST 344
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_ENC_HAS_IVLAN_LBN 7
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_ENC_HAS_IVLAN_WIDTH 1
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_TCP_SYN_FIN_RST_OFST 344
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_TCP_SYN_FIN_RST_LBN 8
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_TCP_SYN_FIN_RST_WIDTH 1
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_IP_FIRST_FRAG_OFST 344
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_IP_FIRST_FRAG_LBN 9
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_IP_FIRST_FRAG_WIDTH 1
#define MAE_FIELD_MASK_VALUE_PAIRS_V2_FLAGS_LBN 2752
#define MAE_FIELD_MASK_VALUE_PAIRS_V2_FLAGS_WIDTH 32
#define MAE_FIELD_MASK_VALUE_PAIRS_V2_FLAGS_MASK_OFST 348
@@ -26707,16 +29257,34 @@
#define MAE_MPORT_SELECTOR_TYPE_WIDTH 8
/* enum: The MPORT connected to a given physical port */
#define MAE_MPORT_SELECTOR_TYPE_PPORT 0x2
-/* enum: The MPORT assigned to a given PCIe function */
+/* enum: The MPORT assigned to a given PCIe function. Deprecated in favour of
+ * MH_FUNC.
+ */
#define MAE_MPORT_SELECTOR_TYPE_FUNC 0x3
/* enum: An mport_id */
#define MAE_MPORT_SELECTOR_TYPE_MPORT_ID 0x4
+/* enum: The MPORT assigned to a given PCIe function (see also FWRIVERHD-1108)
+ */
+#define MAE_MPORT_SELECTOR_TYPE_MH_FUNC 0x5
+/* enum: This is guaranteed never to be a valid selector type */
+#define MAE_MPORT_SELECTOR_TYPE_INVALID 0xff
#define MAE_MPORT_SELECTOR_MPORT_ID_OFST 0
#define MAE_MPORT_SELECTOR_MPORT_ID_LBN 0
#define MAE_MPORT_SELECTOR_MPORT_ID_WIDTH 24
#define MAE_MPORT_SELECTOR_PPORT_ID_OFST 0
#define MAE_MPORT_SELECTOR_PPORT_ID_LBN 0
#define MAE_MPORT_SELECTOR_PPORT_ID_WIDTH 4
+#define MAE_MPORT_SELECTOR_FUNC_INTF_ID_OFST 0
+#define MAE_MPORT_SELECTOR_FUNC_INTF_ID_LBN 20
+#define MAE_MPORT_SELECTOR_FUNC_INTF_ID_WIDTH 4
+#define MAE_MPORT_SELECTOR_HOST_PRIMARY 0x1 /* enum */
+#define MAE_MPORT_SELECTOR_NIC_EMBEDDED 0x2 /* enum */
+/* enum: Deprecated, use CALLER_INTF instead. */
+#define MAE_MPORT_SELECTOR_CALLER 0xf
+#define MAE_MPORT_SELECTOR_CALLER_INTF 0xf /* enum */
+#define MAE_MPORT_SELECTOR_FUNC_MH_PF_ID_OFST 0
+#define MAE_MPORT_SELECTOR_FUNC_MH_PF_ID_LBN 16
+#define MAE_MPORT_SELECTOR_FUNC_MH_PF_ID_WIDTH 4
#define MAE_MPORT_SELECTOR_FUNC_PF_ID_OFST 0
#define MAE_MPORT_SELECTOR_FUNC_PF_ID_LBN 16
#define MAE_MPORT_SELECTOR_FUNC_PF_ID_WIDTH 8
@@ -26737,15 +29305,56 @@
* function.
*/
#define MAE_MPORT_SELECTOR_FUNC_PF_ID_CALLER 0xff
+/* enum: Same as PF_ID_CALLER, but for use in the smaller MH_PF_ID field. Only
+ * valid if FUNC_INTF_ID is CALLER.
+ */
+#define MAE_MPORT_SELECTOR_FUNC_MH_PF_ID_CALLER 0xf
#define MAE_MPORT_SELECTOR_FLAT_LBN 0
#define MAE_MPORT_SELECTOR_FLAT_WIDTH 32
+/* MAE_LINK_ENDPOINT_SELECTOR structuredef: Structure that identifies a real or
+ * virtual network port by MAE port and link end
+ */
+#define MAE_LINK_ENDPOINT_SELECTOR_LEN 8
+/* The MAE MPORT of interest */
+#define MAE_LINK_ENDPOINT_SELECTOR_MPORT_SELECTOR_OFST 0
+#define MAE_LINK_ENDPOINT_SELECTOR_MPORT_SELECTOR_LEN 4
+#define MAE_LINK_ENDPOINT_SELECTOR_MPORT_SELECTOR_LBN 0
+#define MAE_LINK_ENDPOINT_SELECTOR_MPORT_SELECTOR_WIDTH 32
+/* Which end of the link identified by MPORT to consider */
+#define MAE_LINK_ENDPOINT_SELECTOR_LINK_END_OFST 4
+#define MAE_LINK_ENDPOINT_SELECTOR_LINK_END_LEN 4
+/* Enum values, see field(s): */
+/* MAE_MPORT_END */
+#define MAE_LINK_ENDPOINT_SELECTOR_LINK_END_LBN 32
+#define MAE_LINK_ENDPOINT_SELECTOR_LINK_END_WIDTH 32
+/* A field for accessing the endpoint selector as a collection of bits */
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_OFST 0
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_LEN 8
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_LO_OFST 0
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_LO_LEN 4
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_LO_LBN 0
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_LO_WIDTH 32
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_HI_OFST 4
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_HI_LEN 4
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_HI_LBN 32
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_HI_WIDTH 32
+/* enum: Set FLAT to this value to obtain backward-compatible behaviour in
+ * commands that have been extended to take a MAE_LINK_ENDPOINT_SELECTOR
+ * argument. New commands that are designed to take such an argument from the
+ * start will not support this.
+ */
+#define MAE_LINK_ENDPOINT_SELECTOR_MAE_LINK_ENDPOINT_COMPAT 0x0
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_LBN 0
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_WIDTH 64
+
/***********************************/
/* MC_CMD_MAE_GET_CAPS
* Describes capabilities of the MAE (Match-Action Engine)
*/
#define MC_CMD_MAE_GET_CAPS 0x140
+#define MC_CMD_MAE_GET_CAPS_MSGSET 0x140
#undef MC_CMD_0x140_PRIVILEGE_CTG
#define MC_CMD_0x140_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -26772,6 +29381,9 @@
#define MC_CMD_MAE_GET_CAPS_OUT_ENCAP_TYPE_GENEVE_OFST 4
#define MC_CMD_MAE_GET_CAPS_OUT_ENCAP_TYPE_GENEVE_LBN 2
#define MC_CMD_MAE_GET_CAPS_OUT_ENCAP_TYPE_GENEVE_WIDTH 1
+#define MC_CMD_MAE_GET_CAPS_OUT_ENCAP_TYPE_L2GRE_OFST 4
+#define MC_CMD_MAE_GET_CAPS_OUT_ENCAP_TYPE_L2GRE_LBN 3
+#define MC_CMD_MAE_GET_CAPS_OUT_ENCAP_TYPE_L2GRE_WIDTH 1
/* The total number of counters available to allocate. */
#define MC_CMD_MAE_GET_CAPS_OUT_COUNTERS_OFST 8
#define MC_CMD_MAE_GET_CAPS_OUT_COUNTERS_LEN 4
@@ -26823,6 +29435,7 @@
* Get a level of support for match fields when used in match-action rules
*/
#define MC_CMD_MAE_GET_AR_CAPS 0x141
+#define MC_CMD_MAE_GET_AR_CAPS_MSGSET 0x141
#undef MC_CMD_0x141_PRIVILEGE_CTG
#define MC_CMD_0x141_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -26855,6 +29468,7 @@
* Get a level of support for fields used in outer rule keys.
*/
#define MC_CMD_MAE_GET_OR_CAPS 0x142
+#define MC_CMD_MAE_GET_OR_CAPS_MSGSET 0x142
#undef MC_CMD_0x142_PRIVILEGE_CTG
#define MC_CMD_0x142_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -26885,6 +29499,7 @@
* Rules.
*/
#define MC_CMD_MAE_COUNTER_ALLOC 0x143
+#define MC_CMD_MAE_COUNTER_ALLOC_MSGSET 0x143
#undef MC_CMD_0x143_PRIVILEGE_CTG
#define MC_CMD_0x143_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -26928,6 +29543,7 @@
* Free match-action-engine counters
*/
#define MC_CMD_MAE_COUNTER_FREE 0x144
+#define MC_CMD_MAE_COUNTER_FREE_MSGSET 0x144
#undef MC_CMD_0x144_PRIVILEGE_CTG
#define MC_CMD_0x144_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -26995,6 +29611,7 @@
* delivering packets to the current queue first.
*/
#define MC_CMD_MAE_COUNTERS_STREAM_START 0x151
+#define MC_CMD_MAE_COUNTERS_STREAM_START_MSGSET 0x151
#undef MC_CMD_0x151_PRIVILEGE_CTG
#define MC_CMD_0x151_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27031,6 +29648,7 @@
* Stop streaming counter values to the specified RxQ.
*/
#define MC_CMD_MAE_COUNTERS_STREAM_STOP 0x152
+#define MC_CMD_MAE_COUNTERS_STREAM_STOP_MSGSET 0x152
#undef MC_CMD_0x152_PRIVILEGE_CTG
#define MC_CMD_0x152_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27060,6 +29678,7 @@
* MAE_COUNTERS_PACKETISER_STREAM_START/PACKET_SIZE and rung the doorbell.
*/
#define MC_CMD_MAE_COUNTERS_STREAM_GIVE_CREDITS 0x153
+#define MC_CMD_MAE_COUNTERS_STREAM_GIVE_CREDITS_MSGSET 0x153
#undef MC_CMD_0x153_PRIVILEGE_CTG
#define MC_CMD_0x153_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27076,9 +29695,15 @@
/***********************************/
/* MC_CMD_MAE_ENCAP_HEADER_ALLOC
- * Allocate encap action metadata
+ * Allocate an encapsulation header to be used in an Action Rule response. The
+ * header must be constructed as a valid packet with 0-length payload.
+ * Specifically, the L3/L4 lengths & checksums will only be incrementally fixed
+ * by the NIC, rather than recomputed entirely. Currently only IPv4, IPv6 and
+ * UDP are supported. If the maximum number of headers have already been
+ * allocated then the command will fail with MC_CMD_ERR_ENOSPC.
*/
#define MC_CMD_MAE_ENCAP_HEADER_ALLOC 0x148
+#define MC_CMD_MAE_ENCAP_HEADER_ALLOC_MSGSET 0x148
#undef MC_CMD_0x148_PRIVILEGE_CTG
#define MC_CMD_0x148_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27109,9 +29734,10 @@
/***********************************/
/* MC_CMD_MAE_ENCAP_HEADER_UPDATE
- * Update encap action metadata
+ * Update encap action metadata. See comments for MAE_ENCAP_HEADER_ALLOC.
*/
#define MC_CMD_MAE_ENCAP_HEADER_UPDATE 0x149
+#define MC_CMD_MAE_ENCAP_HEADER_UPDATE_MSGSET 0x149
#undef MC_CMD_0x149_PRIVILEGE_CTG
#define MC_CMD_0x149_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27141,6 +29767,7 @@
* Free encap action metadata
*/
#define MC_CMD_MAE_ENCAP_HEADER_FREE 0x14a
+#define MC_CMD_MAE_ENCAP_HEADER_FREE_MSGSET 0x14a
#undef MC_CMD_0x14a_PRIVILEGE_CTG
#define MC_CMD_0x14a_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27176,9 +29803,12 @@
/* MC_CMD_MAE_MAC_ADDR_ALLOC
* Allocate MAC address. Hardware implementations have MAC addresses programmed
* into an indirection table, and clients should take care not to allocate the
- * same MAC address twice (but instead reuse its ID).
+ * same MAC address twice (but instead reuse its ID). If the maximum number of
+ * MAC addresses have already been allocated then the command will fail with
+ * MC_CMD_ERR_ENOSPC.
*/
#define MC_CMD_MAE_MAC_ADDR_ALLOC 0x15e
+#define MC_CMD_MAE_MAC_ADDR_ALLOC_MSGSET 0x15e
#undef MC_CMD_0x15e_PRIVILEGE_CTG
#define MC_CMD_0x15e_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27204,6 +29834,7 @@
* Free MAC address.
*/
#define MC_CMD_MAE_MAC_ADDR_FREE 0x15f
+#define MC_CMD_MAE_MAC_ADDR_FREE_MSGSET 0x15f
#undef MC_CMD_0x15f_PRIVILEGE_CTG
#define MC_CMD_0x15f_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27238,9 +29869,12 @@
/***********************************/
/* MC_CMD_MAE_ACTION_SET_ALLOC
* Allocate an action set, which can be referenced either in response to an
- * Action Rule, or as part of an Action Set List.
+ * Action Rule, or as part of an Action Set List. If the maxmimum number of
+ * action sets have already been allocated then the command will fail with
+ * MC_CMD_ERR_ENOSPC.
*/
#define MC_CMD_MAE_ACTION_SET_ALLOC 0x14d
+#define MC_CMD_MAE_ACTION_SET_ALLOC_MSGSET 0x14d
#undef MC_CMD_0x14d_PRIVILEGE_CTG
#define MC_CMD_0x14d_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27267,6 +29901,15 @@
#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_NAT_OFST 0
#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_NAT_LBN 11
#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_NAT_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_DECR_IP_TTL_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_DECR_IP_TTL_LBN 12
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_DECR_IP_TTL_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_SET_SRC_MPORT_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_SET_SRC_MPORT_LBN 13
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_SET_SRC_MPORT_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_SUPPRESS_SELF_DELIVERY_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_SUPPRESS_SELF_DELIVERY_LBN 14
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_SUPPRESS_SELF_DELIVERY_WIDTH 1
/* If VLAN_PUSH >= 1, TCI value to be inserted as outermost VLAN. */
#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_VLAN0_TCI_BE_OFST 4
#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_VLAN0_TCI_BE_LEN 2
@@ -27313,8 +29956,135 @@
#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DST_MAC_ID_OFST 40
#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DST_MAC_ID_LEN 4
+/* MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN msgrequest: Only supported if
+ * MAE_ACTION_SET_ALLOC_V2_SUPPORTED is advertised in
+ * MC_CMD_GET_CAPABILITIES_V7_OUT.
+ */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_LEN 51
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_FLAGS_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_FLAGS_LEN 4
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN_PUSH_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN_PUSH_LBN 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN_PUSH_WIDTH 2
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN_POP_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN_POP_LBN 4
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN_POP_WIDTH 2
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DECAP_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DECAP_LBN 8
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DECAP_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_MARK_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_MARK_LBN 9
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_MARK_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_FLAG_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_FLAG_LBN 10
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_FLAG_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_NAT_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_NAT_LBN 11
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_NAT_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DECR_IP_TTL_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DECR_IP_TTL_LBN 12
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DECR_IP_TTL_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_SET_SRC_MPORT_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_SET_SRC_MPORT_LBN 13
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_SET_SRC_MPORT_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_SUPPRESS_SELF_DELIVERY_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_SUPPRESS_SELF_DELIVERY_LBN 14
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_SUPPRESS_SELF_DELIVERY_WIDTH 1
+/* If VLAN_PUSH >= 1, TCI value to be inserted as outermost VLAN. */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN0_TCI_BE_OFST 4
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN0_TCI_BE_LEN 2
+/* If VLAN_PUSH >= 1, TPID value to be inserted as outermost VLAN. */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN0_PROTO_BE_OFST 6
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN0_PROTO_BE_LEN 2
+/* If VLAN_PUSH == 2, inner TCI value to be inserted. */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN1_TCI_BE_OFST 8
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN1_TCI_BE_LEN 2
+/* If VLAN_PUSH == 2, inner TPID value to be inserted. */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN1_PROTO_BE_OFST 10
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN1_PROTO_BE_LEN 2
+/* Reserved. Ignored by firmware. Should be set to zero or 0xffffffff. */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_RSVD_OFST 12
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_RSVD_LEN 4
+/* Set to ENCAP_HEADER_ID_NULL to request no encap action */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ENCAP_HEADER_ID_OFST 16
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ENCAP_HEADER_ID_LEN 4
+/* An m-port selector identifying the m-port that the modified packet should be
+ * delivered to. Set to MPORT_SELECTOR_NULL to request no delivery of the
+ * packet.
+ */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DELIVER_OFST 20
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DELIVER_LEN 4
+/* Allows an action set to trigger several counter updates. Set to
+ * COUNTER_LIST_ID_NULL to request no counter action.
+ */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_COUNTER_LIST_ID_OFST 24
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_COUNTER_LIST_ID_LEN 4
+/* If a driver only wished to update one counter within this action set, then
+ * it can supply a COUNTER_ID instead of allocating a single-element counter
+ * list. This field should be set to COUNTER_ID_NULL if this behaviour is not
+ * required. It is not valid to supply a non-NULL value for both
+ * COUNTER_LIST_ID and COUNTER_ID.
+ */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_COUNTER_ID_OFST 28
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_COUNTER_ID_LEN 4
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_MARK_VALUE_OFST 32
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_MARK_VALUE_LEN 4
+/* Set to MAC_ID_NULL to request no source MAC replacement. */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_SRC_MAC_ID_OFST 36
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_SRC_MAC_ID_LEN 4
+/* Set to MAC_ID_NULL to request no destination MAC replacement. */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DST_MAC_ID_OFST 40
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DST_MAC_ID_LEN 4
+/* Source m-port ID to be reported for DO_SET_SRC_MPORT action. */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_REPORTED_SRC_MPORT_OFST 44
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_REPORTED_SRC_MPORT_LEN 4
+/* Actions for modifying the Differentiated Services Code-Point (DSCP) bits
+ * within IPv4 and IPv6 headers.
+ */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DSCP_CONTROL_OFST 48
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DSCP_CONTROL_LEN 2
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DSCP_ENCAP_COPY_OFST 48
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DSCP_ENCAP_COPY_LBN 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DSCP_ENCAP_COPY_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DSCP_DECAP_COPY_OFST 48
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DSCP_DECAP_COPY_LBN 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DSCP_DECAP_COPY_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_DSCP_OFST 48
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_DSCP_LBN 2
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_DSCP_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DSCP_VALUE_OFST 48
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DSCP_VALUE_LBN 3
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DSCP_VALUE_WIDTH 6
+/* Actions for modifying the Explicit Congestion Notification (ECN) bits within
+ * IPv4 and IPv6 headers.
+ */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_CONTROL_OFST 50
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_CONTROL_LEN 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_ECN_ENCAP_COPY_OFST 50
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_ECN_ENCAP_COPY_LBN 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_ECN_ENCAP_COPY_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_ECN_DECAP_COPY_OFST 50
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_ECN_DECAP_COPY_LBN 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_ECN_DECAP_COPY_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_ECN_OFST 50
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_ECN_LBN 2
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_ECN_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_VALUE_OFST 50
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_VALUE_LBN 3
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_VALUE_WIDTH 2
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_ECT_0_TO_CE_OFST 50
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_ECT_0_TO_CE_LBN 5
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_ECT_0_TO_CE_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_ECT_1_TO_CE_OFST 50
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_ECT_1_TO_CE_LBN 6
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_ECT_1_TO_CE_WIDTH 1
+
/* MC_CMD_MAE_ACTION_SET_ALLOC_OUT msgresponse */
#define MC_CMD_MAE_ACTION_SET_ALLOC_OUT_LEN 4
+/* The MSB of the AS_ID is guaranteed to be clear if the ID is not
+ * ACTION_SET_ID_NULL. This allows an AS_ID to be distinguished from an ASL_ID
+ * returned from MC_CMD_MAE_ACTION_SET_LIST_ALLOC.
+ */
#define MC_CMD_MAE_ACTION_SET_ALLOC_OUT_AS_ID_OFST 0
#define MC_CMD_MAE_ACTION_SET_ALLOC_OUT_AS_ID_LEN 4
/* enum: An action set ID that is guaranteed never to represent an action set
@@ -27326,6 +30096,7 @@
/* MC_CMD_MAE_ACTION_SET_FREE
*/
#define MC_CMD_MAE_ACTION_SET_FREE 0x14e
+#define MC_CMD_MAE_ACTION_SET_FREE_MSGSET 0x14e
#undef MC_CMD_0x14e_PRIVILEGE_CTG
#define MC_CMD_0x14e_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27361,9 +30132,12 @@
/* MC_CMD_MAE_ACTION_SET_LIST_ALLOC
* Allocate an action set list (ASL) that can be referenced by an ID. The ASL
* ID can be used when inserting an action rule, so that for each packet
- * matching the rule every action set in the list is applied.
+ * matching the rule every action set in the list is applied. If the maximum
+ * number of ASLs have already been allocated then the command will fail with
+ * MC_CMD_ERR_ENOSPC.
*/
#define MC_CMD_MAE_ACTION_SET_LIST_ALLOC 0x14f
+#define MC_CMD_MAE_ACTION_SET_LIST_ALLOC_MSGSET 0x14f
#undef MC_CMD_0x14f_PRIVILEGE_CTG
#define MC_CMD_0x14f_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27394,6 +30168,9 @@
/* MC_CMD_MAE_ACTION_SET_LIST_ALLOC_OUT msgresponse */
#define MC_CMD_MAE_ACTION_SET_LIST_ALLOC_OUT_LEN 4
+/* The MSB of the ASL_ID is guaranteed to be set. This allows an ASL_ID to be
+ * distinguished from an AS_ID returned from MC_CMD_MAE_ACTION_SET_ALLOC.
+ */
#define MC_CMD_MAE_ACTION_SET_LIST_ALLOC_OUT_ASL_ID_OFST 0
#define MC_CMD_MAE_ACTION_SET_LIST_ALLOC_OUT_ASL_ID_LEN 4
/* enum: An action set list ID that is guaranteed never to represent an action
@@ -27407,6 +30184,7 @@
* Free match-action-engine redirect_lists
*/
#define MC_CMD_MAE_ACTION_SET_LIST_FREE 0x150
+#define MC_CMD_MAE_ACTION_SET_LIST_FREE_MSGSET 0x150
#undef MC_CMD_0x150_PRIVILEGE_CTG
#define MC_CMD_0x150_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27441,9 +30219,11 @@
/***********************************/
/* MC_CMD_MAE_OUTER_RULE_INSERT
* Inserts an Outer Rule, which controls encapsulation parsing, and may
- * influence the Lookup Sequence.
+ * influence the Lookup Sequence. If the maximum number of rules have already
+ * been inserted then the command will fail with MC_CMD_ERR_ENOSPC.
*/
#define MC_CMD_MAE_OUTER_RULE_INSERT 0x15a
+#define MC_CMD_MAE_OUTER_RULE_INSERT_MSGSET 0x15a
#undef MC_CMD_0x15a_PRIVILEGE_CTG
#define MC_CMD_0x15a_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27504,6 +30284,7 @@
/* MC_CMD_MAE_OUTER_RULE_REMOVE
*/
#define MC_CMD_MAE_OUTER_RULE_REMOVE 0x15b
+#define MC_CMD_MAE_OUTER_RULE_REMOVE_MSGSET 0x15b
#undef MC_CMD_0x15b_PRIVILEGE_CTG
#define MC_CMD_0x15b_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27583,9 +30364,11 @@
/* MC_CMD_MAE_ACTION_RULE_INSERT
* Insert a rule specify that packets matching a filter be processed according
* to a previous allocated action. Masks can be set as indicated by
- * MC_CMD_MAE_GET_MATCH_FIELD_CAPABILITIES.
+ * MC_CMD_MAE_GET_MATCH_FIELD_CAPABILITIES. If the maximum number of rules have
+ * already been inserted then the command will fail with MC_CMD_ERR_ENOSPC.
*/
#define MC_CMD_MAE_ACTION_RULE_INSERT 0x15c
+#define MC_CMD_MAE_ACTION_RULE_INSERT_MSGSET 0x15c
#undef MC_CMD_0x15c_PRIVILEGE_CTG
#define MC_CMD_0x15c_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27627,6 +30410,7 @@
* ENOTSUP, in which case the driver should DELETE/INSERT.
*/
#define MC_CMD_MAE_ACTION_RULE_UPDATE 0x15d
+#define MC_CMD_MAE_ACTION_RULE_UPDATE_MSGSET 0x15d
#undef MC_CMD_0x15d_PRIVILEGE_CTG
#define MC_CMD_0x15d_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27648,6 +30432,7 @@
/* MC_CMD_MAE_ACTION_RULE_DELETE
*/
#define MC_CMD_MAE_ACTION_RULE_DELETE 0x155
+#define MC_CMD_MAE_ACTION_RULE_DELETE_MSGSET 0x155
#undef MC_CMD_0x155_PRIVILEGE_CTG
#define MC_CMD_0x155_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27684,6 +30469,7 @@
* Return the m-port corresponding to a selector.
*/
#define MC_CMD_MAE_MPORT_LOOKUP 0x160
+#define MC_CMD_MAE_MPORT_LOOKUP_MSGSET 0x160
#undef MC_CMD_0x160_PRIVILEGE_CTG
#define MC_CMD_0x160_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -27705,6 +30491,7 @@
* match or delivery argument.
*/
#define MC_CMD_MAE_MPORT_ALLOC 0x163
+#define MC_CMD_MAE_MPORT_ALLOC_MSGSET 0x163
#undef MC_CMD_0x163_PRIVILEGE_CTG
#define MC_CMD_0x163_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27812,6 +30599,7 @@
* Free a m-port which was previously allocated by the driver.
*/
#define MC_CMD_MAE_MPORT_FREE 0x164
+#define MC_CMD_MAE_MPORT_FREE_MSGSET 0x164
#undef MC_CMD_0x164_PRIVILEGE_CTG
#define MC_CMD_0x164_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27847,6 +30635,9 @@
#define MAE_MPORT_DESC_CAN_DELETE_OFST 8
#define MAE_MPORT_DESC_CAN_DELETE_LBN 2
#define MAE_MPORT_DESC_CAN_DELETE_WIDTH 1
+#define MAE_MPORT_DESC_IS_ZOMBIE_OFST 8
+#define MAE_MPORT_DESC_IS_ZOMBIE_LBN 3
+#define MAE_MPORT_DESC_IS_ZOMBIE_WIDTH 1
#define MAE_MPORT_DESC_CALLER_FLAGS_LBN 64
#define MAE_MPORT_DESC_CALLER_FLAGS_WIDTH 32
/* Not the ideal name; it's really the type of thing connected to the m-port */
@@ -27869,7 +30660,13 @@
#define MAE_MPORT_DESC_RESERVED_OFST 32
#define MAE_MPORT_DESC_RESERVED_LEN 8
#define MAE_MPORT_DESC_RESERVED_LO_OFST 32
+#define MAE_MPORT_DESC_RESERVED_LO_LEN 4
+#define MAE_MPORT_DESC_RESERVED_LO_LBN 256
+#define MAE_MPORT_DESC_RESERVED_LO_WIDTH 32
#define MAE_MPORT_DESC_RESERVED_HI_OFST 36
+#define MAE_MPORT_DESC_RESERVED_HI_LEN 4
+#define MAE_MPORT_DESC_RESERVED_HI_LBN 288
+#define MAE_MPORT_DESC_RESERVED_HI_WIDTH 32
#define MAE_MPORT_DESC_RESERVED_LBN 256
#define MAE_MPORT_DESC_RESERVED_WIDTH 64
/* Logical port index. Only valid when type NET Port. */
@@ -27916,8 +30713,11 @@
/***********************************/
/* MC_CMD_MAE_MPORT_ENUMERATE
+ * Deprecated in favour of MAE_MPORT_READ_JOURNAL. Support for this command
+ * will be removed at some future point.
*/
#define MC_CMD_MAE_MPORT_ENUMERATE 0x17c
+#define MC_CMD_MAE_MPORT_ENUMERATE_MSGSET 0x17c
#undef MC_CMD_0x17c_PRIVILEGE_CTG
#define MC_CMD_0x17c_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -27945,4 +30745,50 @@
#define MC_CMD_MAE_MPORT_ENUMERATE_OUT_MPORT_DESC_DATA_MAXNUM 244
#define MC_CMD_MAE_MPORT_ENUMERATE_OUT_MPORT_DESC_DATA_MAXNUM_MCDI2 1012
+
+/***********************************/
+/* MC_CMD_MAE_MPORT_READ_JOURNAL
+ * Firmware maintains a per-client journal of mport creations and deletions.
+ * This journal is clear-on-read, i.e. repeated calls of this command will
+ * drain the buffer. Whenever the caller resets its function via FLR or
+ * MC_CMD_ENTITY_RESET, the journal is regenerated from a blank start.
+ */
+#define MC_CMD_MAE_MPORT_READ_JOURNAL 0x147
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_MSGSET 0x147
+#undef MC_CMD_0x147_PRIVILEGE_CTG
+
+#define MC_CMD_0x147_PRIVILEGE_CTG SRIOV_CTG_MAE
+
+/* MC_CMD_MAE_MPORT_READ_JOURNAL_IN msgrequest */
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_IN_LEN 4
+/* Any unused flags are reserved and must be set to zero. */
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_IN_FLAGS_OFST 0
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_IN_FLAGS_LEN 4
+
+/* MC_CMD_MAE_MPORT_READ_JOURNAL_OUT msgresponse */
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_LENMIN 12
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_LENMAX 252
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_LENMAX_MCDI2 1020
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_LEN(num) (12+1*(num))
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_DATA_NUM(len) (((len)-12)/1)
+/* Any unused flags are reserved and must be ignored. */
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_FLAGS_OFST 0
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_FLAGS_LEN 4
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MORE_OFST 0
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MORE_LBN 0
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MORE_WIDTH 1
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_COUNT_OFST 4
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_COUNT_LEN 4
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_SIZEOF_MPORT_DESC_OFST 8
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_SIZEOF_MPORT_DESC_LEN 4
+/* Any array of MAE_MPORT_DESC structures. The MAE_MPORT_DESC structure may
+ * grow in future version of this command. Drivers should use a stride of
+ * SIZEOF_MPORT_DESC. Fields beyond SIZEOF_MPORT_DESC are not present.
+ */
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_DATA_OFST 12
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_DATA_LEN 1
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_DATA_MINNUM 0
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_DATA_MAXNUM 240
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_DATA_MAXNUM_MCDI2 1008
+
#endif /* _SIENA_MC_DRIVER_PCOL_H */
diff --git a/drivers/common/sfc_efx/base/efx_regs_mcdi_aoe.h b/drivers/common/sfc_efx/base/efx_regs_mcdi_aoe.h
index f7c89fabc..c45f678c2 100644
--- a/drivers/common/sfc_efx/base/efx_regs_mcdi_aoe.h
+++ b/drivers/common/sfc_efx/base/efx_regs_mcdi_aoe.h
@@ -6,7 +6,7 @@
/*
* This file is automatically generated. DO NOT EDIT IT.
- * To make changes, edit the .yml files in sfregistry under doc/mcdi/ and
+ * To make changes, edit the .yml files in smartnic_registry under doc/mcdi/ and
* rebuild this file with "make mcdi_headers_v5".
*/
@@ -20,6 +20,7 @@
* Perform an FC operation
*/
#define MC_CMD_FC 0x9
+#define MC_CMD_FC_MSGSET 0x9
/* MC_CMD_FC_IN msgrequest */
#define MC_CMD_FC_IN_LEN 4
@@ -212,7 +213,13 @@
#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_OFST 16
#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_LEN 8
#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_LO_OFST 16
+#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_LO_LEN 4
+#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_LO_LBN 128
+#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_LO_WIDTH 32
#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_HI_OFST 20
+#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_HI_LEN 4
+#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_HI_LBN 160
+#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_HI_WIDTH 32
#define MC_CMD_FC_IN_MAC_SET_LINK_REJECT_OFST 24
#define MC_CMD_FC_IN_MAC_SET_LINK_REJECT_LEN 4
#define MC_CMD_FC_IN_MAC_SET_LINK_REJECT_UNICAST_OFST 24
@@ -784,12 +791,24 @@
#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_OFST 12
#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_LEN 8
#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_LO_OFST 12
+#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_LO_LEN 4
+#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_LO_LBN 96
+#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_LO_WIDTH 32
#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_HI_OFST 16
+#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_HI_LEN 4
+#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_HI_LBN 128
+#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_HI_WIDTH 32
/* AOE address from which to transfer data */
#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_OFST 20
#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_LEN 8
#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_LO_OFST 20
+#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_LO_LEN 4
+#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_LO_LBN 160
+#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_LO_WIDTH 32
#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_HI_OFST 24
+#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_HI_LEN 4
+#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_HI_LBN 192
+#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_HI_WIDTH 32
/* Length of AOE transfer (total) */
#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_LENGTH_OFST 28
#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_LENGTH_LEN 4
@@ -916,7 +935,13 @@
#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_OFST 12
#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_LEN 8
#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_LO_OFST 12
+#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_LO_LEN 4
+#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_LO_LBN 96
+#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_LO_WIDTH 32
#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_HI_OFST 16
+#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_HI_LEN 4
+#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_HI_LBN 128
+#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_HI_WIDTH 32
#define MC_CMD_FC_IN_CLOCK_SET_TIME_NANOSECONDS_OFST 20
#define MC_CMD_FC_IN_CLOCK_SET_TIME_NANOSECONDS_LEN 4
@@ -1016,7 +1041,13 @@
#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_OFST 12
#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_LEN 8
#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_LO_OFST 12
+#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_LO_LEN 4
+#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_LO_LBN 96
+#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_LO_WIDTH 32
#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_HI_OFST 16
+#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_HI_LEN 4
+#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_HI_LBN 128
+#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_HI_WIDTH 32
/* Port number of PTP packet for which timestamp required */
#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_PORT_NUM_OFST 20
#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_PORT_NUM_LEN 4
@@ -1320,7 +1351,13 @@
#define MC_CMD_FC_OUT_GET_VERSION_VERSION_OFST 4
#define MC_CMD_FC_OUT_GET_VERSION_VERSION_LEN 8
#define MC_CMD_FC_OUT_GET_VERSION_VERSION_LO_OFST 4
+#define MC_CMD_FC_OUT_GET_VERSION_VERSION_LO_LEN 4
+#define MC_CMD_FC_OUT_GET_VERSION_VERSION_LO_LBN 32
+#define MC_CMD_FC_OUT_GET_VERSION_VERSION_LO_WIDTH 32
#define MC_CMD_FC_OUT_GET_VERSION_VERSION_HI_OFST 8
+#define MC_CMD_FC_OUT_GET_VERSION_VERSION_HI_LEN 4
+#define MC_CMD_FC_OUT_GET_VERSION_VERSION_HI_LBN 64
+#define MC_CMD_FC_OUT_GET_VERSION_VERSION_HI_WIDTH 32
/* MC_CMD_FC_OUT_TRC_RX_READ msgresponse */
#define MC_CMD_FC_OUT_TRC_RX_READ_LEN 8
@@ -1347,7 +1384,13 @@
#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_OFST 0
#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_LEN 8
#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_LO_OFST 0
+#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_LO_LEN 4
+#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_LO_LBN 0
+#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_LO_WIDTH 32
#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_HI_OFST 4
+#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_HI_LEN 4
+#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_HI_LBN 32
+#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_HI_WIDTH 32
#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_NUM MC_CMD_FC_MAC_RX_NSTATS
#define MC_CMD_FC_MAC_RX_STATS_OCTETS 0x0 /* enum */
#define MC_CMD_FC_MAC_RX_OCTETS_OK 0x1 /* enum */
@@ -1382,7 +1425,13 @@
#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_OFST 0
#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_LEN 8
#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_LO_OFST 0
+#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_LO_LEN 4
+#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_LO_LBN 0
+#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_LO_WIDTH 32
#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_HI_OFST 4
+#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_HI_LEN 4
+#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_HI_LBN 32
+#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_HI_WIDTH 32
#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_NUM MC_CMD_FC_MAC_TX_NSTATS
#define MC_CMD_FC_MAC_TX_STATS_OCTETS 0x0 /* enum */
#define MC_CMD_FC_MAC_TX_OCTETS_OK 0x1 /* enum */
@@ -1415,7 +1464,13 @@
#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_OFST 0
#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_LEN 8
#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_LO_OFST 0
+#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_LO_LEN 4
+#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_LO_LBN 0
+#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_LO_WIDTH 32
#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_HI_OFST 4
+#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_HI_LEN 4
+#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_HI_LBN 32
+#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_HI_WIDTH 32
#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_NUM MC_CMD_FC_MAC_NSTATS_PER_BLOCK
/* MC_CMD_FC_OUT_MAC msgresponse */
@@ -1636,7 +1691,13 @@
#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_OFST 16
#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_LEN 8
#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_LO_OFST 16
+#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_LO_LEN 4
+#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_LO_LBN 128
+#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_LO_WIDTH 32
#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_HI_OFST 20
+#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_HI_LEN 4
+#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_HI_LBN 160
+#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_HI_WIDTH 32
#define MC_CMD_FC_OUT_FPGA_BUILD_REVISION_LO_OFST 24
#define MC_CMD_FC_OUT_FPGA_BUILD_REVISION_LO_LEN 4
#define MC_CMD_FC_OUT_FPGA_BUILD_REVISION_HI_OFST 28
@@ -1976,12 +2037,24 @@
#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_OFST 8
#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_LEN 8
#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_LO_OFST 8
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_LO_LEN 4
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_LO_LBN 64
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_LO_WIDTH 32
#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_HI_OFST 12
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_HI_LEN 4
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_HI_LBN 96
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_HI_WIDTH 32
/* Length of address map */
#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_OFST 16
#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_LEN 8
#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_LO_OFST 16
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_LO_LEN 4
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_LO_LBN 128
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_LO_WIDTH 32
#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_HI_OFST 20
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_HI_LEN 4
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_HI_LBN 160
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_HI_WIDTH 32
/* Component information field */
#define MC_CMD_FC_OUT_READ_MAP_INDEX_COMP_INFO_OFST 24
#define MC_CMD_FC_OUT_READ_MAP_INDEX_COMP_INFO_LEN 4
@@ -1989,7 +2062,13 @@
#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_OFST 28
#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_LEN 8
#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_LO_OFST 28
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_LO_LEN 4
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_LO_LBN 224
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_LO_WIDTH 32
#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_HI_OFST 32
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_HI_LEN 4
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_HI_LBN 256
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_HI_WIDTH 32
/* Name of the component */
#define MC_CMD_FC_OUT_READ_MAP_INDEX_NAME_OFST 36
#define MC_CMD_FC_OUT_READ_MAP_INDEX_NAME_LEN 1
@@ -2132,7 +2211,13 @@
#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_OFST 12
#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_LEN 8
#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_LO_OFST 12
+#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_LO_LEN 4
+#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_LO_LBN 96
+#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_LO_WIDTH 32
#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_HI_OFST 16
+#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_HI_LEN 4
+#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_HI_LBN 128
+#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_HI_WIDTH 32
/* MC_CMD_FC_OUT_UHLINK_RX_EYE msgresponse */
#define MC_CMD_FC_OUT_UHLINK_RX_EYE_LEN ((((0-1+(32*MC_CMD_FC_UHLINK_RX_EYE_PER_BLOCK))+1))>>3)
@@ -2153,7 +2238,13 @@
#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_OFST 4
#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_LEN 8
#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_LO_OFST 4
+#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_LO_LEN 4
+#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_LO_LBN 32
+#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_LO_WIDTH 32
#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_HI_OFST 8
+#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_HI_LEN 4
+#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_HI_LBN 64
+#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_HI_WIDTH 32
#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_NUM MC_CMD_FC_UHLINK_RX_EYE_PLOT_ROWS_PER_BLOCK
/* MC_CMD_FC_OUT_UHLINK_RX_TUNE msgresponse */
@@ -2222,12 +2313,24 @@
#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_OFST 4
#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_LEN 8
#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_LO_OFST 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_LO_LEN 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_LO_LBN 32
+#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_LO_WIDTH 32
#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_HI_OFST 8
+#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_HI_LEN 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_HI_LBN 64
+#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_HI_WIDTH 32
/* AOE address from which to transfer data */
#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_OFST 12
#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_LEN 8
#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_LO_OFST 12
+#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_LO_LEN 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_LO_LBN 96
+#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_LO_WIDTH 32
#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_HI_OFST 16
+#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_HI_LEN 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_HI_LBN 128
+#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_HI_WIDTH 32
/* Length of AOE transfer (total) */
#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_LENGTH_OFST 20
#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_LENGTH_LEN 4
@@ -2243,12 +2346,24 @@
#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_OFST 36
#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_LEN 8
#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_LO_OFST 36
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_LO_LEN 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_LO_LBN 288
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_LO_WIDTH 32
#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_HI_OFST 40
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_HI_LEN 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_HI_LBN 320
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_HI_WIDTH 32
/* When active, end read time */
#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_OFST 44
#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_LEN 8
#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_LO_OFST 44
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_LO_LEN 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_LO_LBN 352
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_LO_WIDTH 32
#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_HI_OFST 48
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_HI_LEN 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_HI_LBN 384
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_HI_WIDTH 32
/* MC_CMD_FC_OUT_LOG_ADDR_RANGE msgresponse */
#define MC_CMD_FC_OUT_LOG_ADDR_RANGE_LEN 0
@@ -2263,7 +2378,13 @@
#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_OFST 4
#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_LEN 8
#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_LO_OFST 4
+#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_LO_LEN 4
+#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_LO_LBN 32
+#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_LO_WIDTH 32
#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_HI_OFST 8
+#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_HI_LEN 4
+#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_HI_LBN 64
+#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_HI_WIDTH 32
#define MC_CMD_FC_OUT_CLOCK_GET_TIME_NANOSECONDS_OFST 12
#define MC_CMD_FC_OUT_CLOCK_GET_TIME_NANOSECONDS_LEN 4
#define MC_CMD_FC_OUT_CLOCK_GET_TIME_RANGE_OFST 16
@@ -2311,7 +2432,13 @@
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_OFST 0
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_LEN 8
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_LO_OFST 0
+#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_LO_LEN 4
+#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_LO_LBN 0
+#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_LO_WIDTH 32
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_HI_OFST 4
+#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_HI_LEN 4
+#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_HI_LBN 32
+#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_HI_WIDTH 32
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_MINNUM 0
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_MAXNUM 31
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_MAXNUM_MCDI2 127
@@ -2391,6 +2518,7 @@
* AOE operations on MC
*/
#define MC_CMD_AOE 0xa
+#define MC_CMD_AOE_MSGSET 0xa
/* MC_CMD_AOE_IN msgrequest */
#define MC_CMD_AOE_IN_LEN 4
@@ -2580,7 +2708,13 @@
#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_OFST 8
#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_LEN 8
#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_LO_OFST 8
+#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_LO_LEN 4
+#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_LO_LBN 64
+#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_HI_OFST 12
+#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_HI_LEN 4
+#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_HI_LBN 96
+#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_AOE_IN_MAC_STATS_CMD_OFST 16
#define MC_CMD_AOE_IN_MAC_STATS_CMD_LEN 4
#define MC_CMD_AOE_IN_MAC_STATS_DMA_OFST 16
@@ -3024,7 +3158,13 @@
#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_OFST 0
#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_LEN 8
#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_LO_OFST 0
+#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_LO_LEN 4
+#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_LO_LBN 0
+#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_LO_WIDTH 32
#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_HI_OFST 4
+#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_HI_LEN 4
+#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_HI_LBN 32
+#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_HI_WIDTH 32
#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS
/* MC_CMD_AOE_OUT_GET_PHY_MEDIA_INFO msgresponse */
diff --git a/drivers/common/sfc_efx/base/efx_regs_mcdi_strs.h b/drivers/common/sfc_efx/base/efx_regs_mcdi_strs.h
index be570bc0a..e8fbb6f94 100644
--- a/drivers/common/sfc_efx/base/efx_regs_mcdi_strs.h
+++ b/drivers/common/sfc_efx/base/efx_regs_mcdi_strs.h
@@ -6,7 +6,7 @@
/*
* This file is automatically generated. DO NOT EDIT IT.
- * To make changes, edit the .yml files in sfregistry under doc/mcdi/ and
+ * To make changes, edit the .yml files in smartnic_registry under doc/mcdi/ and
* rebuild this file with "make mcdi_headers_v5".
*
* The version of this file has MCDI strings really used in the libefx.
--
2.20.1
^ permalink raw reply [relevance 1%]
* [dpdk-dev] [PATCH v3 1/3] common/sfc_efx/base: update MCDI headers
2021-04-28 9:49 1% [dpdk-dev] [PATCH 1/3] common/sfc_efx/base: update MCDI headers Ivan Malov
2021-05-22 19:32 1% ` [dpdk-dev] [PATCH v2 " Ivan Malov
@ 2021-05-24 11:18 1% ` Ivan Malov
2 siblings, 0 replies; 200+ results
From: Ivan Malov @ 2021-05-24 11:18 UTC (permalink / raw)
To: dev; +Cc: Andrew Rybchenko, Ray Kinsella, Ferruh Yigit
From: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
---
drivers/common/sfc_efx/base/efx_regs_mcdi.h | 3532 +++++++++++++++--
.../common/sfc_efx/base/efx_regs_mcdi_aoe.h | 142 +-
.../common/sfc_efx/base/efx_regs_mcdi_strs.h | 2 +-
3 files changed, 3331 insertions(+), 345 deletions(-)
diff --git a/drivers/common/sfc_efx/base/efx_regs_mcdi.h b/drivers/common/sfc_efx/base/efx_regs_mcdi.h
index 976db37d6..a3c9f076e 100644
--- a/drivers/common/sfc_efx/base/efx_regs_mcdi.h
+++ b/drivers/common/sfc_efx/base/efx_regs_mcdi.h
@@ -6,7 +6,7 @@
/*
* This file is automatically generated. DO NOT EDIT IT.
- * To make changes, edit the .yml files in sfregistry under doc/mcdi/ and
+ * To make changes, edit the .yml files in smartnic_registry under doc/mcdi/ and
* rebuild this file with "make mcdi_headers_v5".
*/
@@ -410,6 +410,48 @@
#define MC_CMD_RESOURCE_INSTANCE_ANY 0xffffffff
#define MC_CMD_RESOURCE_INSTANCE_NONE 0xfffffffe /* enum */
+/* MC_CMD_FPGA_FLASH_INDEX enum */
+#define MC_CMD_FPGA_FLASH_PRIMARY 0x0 /* enum */
+#define MC_CMD_FPGA_FLASH_SECONDARY 0x1 /* enum */
+
+/* MC_CMD_EXTERNAL_MAE_LINK_MODE enum */
+/* enum: Legacy mode as described in XN-200039-TC. */
+#define MC_CMD_EXTERNAL_MAE_LINK_MODE_LEGACY 0x0
+/* enum: Switchdev mode as described in XN-200039-TC. */
+#define MC_CMD_EXTERNAL_MAE_LINK_MODE_SWITCHDEV 0x1
+/* enum: Bootstrap mode as described in XN-200039-TC. */
+#define MC_CMD_EXTERNAL_MAE_LINK_MODE_BOOTSTRAP 0x2
+/* enum: Link-mode change is in-progress as described in XN-200039-TC. */
+#define MC_CMD_EXTERNAL_MAE_LINK_MODE_PENDING 0xf
+
+/* PCIE_INTERFACE enum: From EF100 onwards, SFC products can have multiple PCIe
+ * interfaces. There is a need to refer to interfaces explicitly from drivers
+ * (for example, a management driver on one interface administering a function
+ * on another interface). This enumeration provides stable identifiers to all
+ * interfaces present on a product. Product documentation will specify which
+ * interfaces exist and their associated identifier. In general, drivers,
+ * should not assign special meanings to specific values. Instead, behaviour
+ * should be determined by NIC configuration, which will identify interfaces
+ * where appropriate.
+ */
+/* enum: Primary host interfaces. Typically (i.e. for all known SFC products)
+ * the interface exposed on the edge connector (or form factor equivalent).
+ */
+#define PCIE_INTERFACE_HOST_PRIMARY 0x0
+/* enum: Riverhead and keystone products have a second PCIe interface to which
+ * an on-NIC ARM module is expected to be connected.
+ */
+#define PCIE_INTERFACE_NIC_EMBEDDED 0x1
+/* enum: For MCDI commands issued over a PCIe interface, this value is
+ * translated into the interface over which the command was issued. Not
+ * meaningful for other MCDI transports.
+ */
+#define PCIE_INTERFACE_CALLER 0xffffffff
+
+/* MC_CLIENT_ID_SPECIFIER enum */
+/* enum: Equivalent to the caller's client ID */
+#define MC_CMD_CLIENT_ID_SELF 0xffffffff
+
/* MAE_FIELD_SUPPORT_STATUS enum */
/* enum: The NIC does not support this field. The driver must ensure that any
* mask associated with this field in a match rule is zeroed. The NIC may
@@ -470,6 +512,20 @@
#define MAE_FIELD_CT_PRIVATE_FLAGS 0x8
/* enum: 1 if the packet ingressed the NIC from one of the MACs, else 0. */
#define MAE_FIELD_IS_FROM_NETWORK 0x9
+/* enum: 1 if the packet has 1 or more VLAN tags, else 0. */
+#define MAE_FIELD_HAS_OVLAN 0xa
+/* enum: 1 if the packet has 2 or more VLAN tags, else 0. */
+#define MAE_FIELD_HAS_IVLAN 0xb
+/* enum: 1 if the outer packet has 1 or more VLAN tags, else 0; only present
+ * when encap
+ */
+#define MAE_FIELD_ENC_HAS_OVLAN 0xc
+/* enum: 1 if the outer packet has 2 or more VLAN tags, else 0; only present
+ * when encap
+ */
+#define MAE_FIELD_ENC_HAS_IVLAN 0xd
+/* enum: Packet is IP fragment */
+#define MAE_FIELD_ENC_IP_FRAG 0xe
#define MAE_FIELD_ETHER_TYPE 0x21 /* enum */
#define MAE_FIELD_VLAN0_TCI 0x22 /* enum */
#define MAE_FIELD_VLAN0_PROTO 0x23 /* enum */
@@ -508,6 +564,10 @@
#define MAE_FIELD_L4_DPORT 0x33
/* enum: Inner when encap */
#define MAE_FIELD_TCP_FLAGS 0x34
+/* enum: TCP packet with any of SYN, FIN or RST flag set */
+#define MAE_FIELD_TCP_SYN_FIN_RST 0x35
+/* enum: Packet is IP fragment with fragment offset 0 */
+#define MAE_FIELD_IP_FIRST_FRAG 0x36
/* enum: The type of encapsulated used for this packet. Value as per
* ENCAP_TYPE_*.
*/
@@ -550,8 +610,8 @@
#define MAE_FIELD_ENC_L4_SPORT 0x52
/* enum: Outer; only present when encap */
#define MAE_FIELD_ENC_L4_DPORT 0x53
-/* enum: VNI (when VXLAN or GENEVE) VSID (when NVGRE) Outer; only present when
- * encap
+/* enum: VNI (when VXLAN or GENEVE) VSID (when NVGRE) Bottom 24 bits of Key
+ * (when L2GRE) Outer; only present when encap
*/
#define MAE_FIELD_ENC_VNET_ID 0x54
@@ -566,6 +626,14 @@
#define MAE_MCDI_ENCAP_TYPE_GENEVE 0x3 /* enum */
#define MAE_MCDI_ENCAP_TYPE_L2GRE 0x4 /* enum */
+/* MAE_MPORT_END enum: Selects which end of the logical link identified by an
+ * MPORT_SELECTOR is targeted by an operation.
+ */
+/* enum: Selects the port on the MAE virtual switch */
+#define MAE_MPORT_END_MAE 0x1
+/* enum: Selects the virtual NIC plugged into the MAE switch */
+#define MAE_MPORT_END_VNIC 0x2
+
/* MCDI_EVENT structuredef: The structure of an MCDI_EVENT on Siena/EF10/EF100
* platforms
*/
@@ -647,17 +715,21 @@
#define MCDI_EVENT_TX_ERR_TYPE_OFST 0
#define MCDI_EVENT_TX_ERR_TYPE_LBN 12
#define MCDI_EVENT_TX_ERR_TYPE_WIDTH 4
-/* enum: Descriptor loader reported failure */
+/* enum: Descriptor loader reported failure. Specific to EF10-family NICs. */
#define MCDI_EVENT_TX_ERR_DL_FAIL 0x1
-/* enum: Descriptor ring empty and no EOP seen for packet */
+/* enum: Descriptor ring empty and no EOP seen for packet. Specific to
+ * EF10-family NICs
+ */
#define MCDI_EVENT_TX_ERR_NO_EOP 0x2
-/* enum: Overlength packet */
+/* enum: Overlength packet. Specific to EF10-family NICs. */
#define MCDI_EVENT_TX_ERR_2BIG 0x3
-/* enum: Malformed option descriptor */
+/* enum: Malformed option descriptor. Specific to EF10-family NICs. */
#define MCDI_EVENT_TX_BAD_OPTDESC 0x5
-/* enum: Option descriptor part way through a packet */
+/* enum: Option descriptor part way through a packet. Specific to EF10-family
+ * NICs.
+ */
#define MCDI_EVENT_TX_OPT_IN_PKT 0x8
-/* enum: DMA or PIO data access error */
+/* enum: DMA or PIO data access error. Specific to EF10-family NICs */
#define MCDI_EVENT_TX_ERR_BAD_DMA_OR_PIO 0x9
#define MCDI_EVENT_TX_ERR_INFO_OFST 0
#define MCDI_EVENT_TX_ERR_INFO_LBN 16
@@ -1270,7 +1342,13 @@
#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_OFST 8
#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LEN 8
#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LO_OFST 8
+#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LO_LEN 4
+#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LO_LBN 64
+#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LO_WIDTH 32
#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_HI_OFST 12
+#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_HI_LEN 4
+#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_HI_LBN 96
+#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_HI_WIDTH 32
#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_MINNUM 1
#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_MAXNUM 30
#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_MAXNUM_MCDI2 126
@@ -1384,6 +1462,7 @@
* has additional checks to reject insecure calls.
*/
#define MC_CMD_READ32 0x1
+#define MC_CMD_READ32_MSGSET 0x1
#undef MC_CMD_0x1_PRIVILEGE_CTG
#define MC_CMD_0x1_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -1413,6 +1492,7 @@
* Write multiple 32byte words to MC memory.
*/
#define MC_CMD_WRITE32 0x2
+#define MC_CMD_WRITE32_MSGSET 0x2
#undef MC_CMD_0x2_PRIVILEGE_CTG
#define MC_CMD_0x2_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -1442,6 +1522,7 @@
* has additional checks to reject insecure calls.
*/
#define MC_CMD_COPYCODE 0x3
+#define MC_CMD_COPYCODE_MSGSET 0x3
#undef MC_CMD_0x3_PRIVILEGE_CTG
#define MC_CMD_0x3_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -1505,6 +1586,7 @@
* Select function for function-specific commands.
*/
#define MC_CMD_SET_FUNC 0x4
+#define MC_CMD_SET_FUNC_MSGSET 0x4
#undef MC_CMD_0x4_PRIVILEGE_CTG
#define MC_CMD_0x4_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -1524,6 +1606,7 @@
* Get the instruction address from which the MC booted.
*/
#define MC_CMD_GET_BOOT_STATUS 0x5
+#define MC_CMD_GET_BOOT_STATUS_MSGSET 0x5
#undef MC_CMD_0x5_PRIVILEGE_CTG
#define MC_CMD_0x5_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -1558,6 +1641,7 @@
* fields will only be present if OUT.GLOBAL_FLAGS != NO_FAILS
*/
#define MC_CMD_GET_ASSERTS 0x6
+#define MC_CMD_GET_ASSERTS_MSGSET 0x6
#undef MC_CMD_0x6_PRIVILEGE_CTG
#define MC_CMD_0x6_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -1682,12 +1766,24 @@
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_OFST 260
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_LEN 8
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_LO_OFST 260
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_LO_LEN 4
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_LO_LBN 2080
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_LO_WIDTH 32
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_HI_OFST 264
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_HI_LEN 4
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_HI_LBN 2112
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_HI_WIDTH 32
/* MC firmware version number */
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_OFST 268
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_LEN 8
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_LO_OFST 268
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_LO_LEN 4
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_LO_LBN 2144
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_LO_WIDTH 32
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_HI_OFST 272
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_HI_LEN 4
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_HI_LBN 2176
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_HI_WIDTH 32
/* MC firmware security level */
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_SECURITY_LEVEL_OFST 276
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_SECURITY_LEVEL_LEN 4
@@ -1705,6 +1801,7 @@
* sensor notifications and MCDI completions
*/
#define MC_CMD_LOG_CTRL 0x7
+#define MC_CMD_LOG_CTRL_MSGSET 0x7
#undef MC_CMD_0x7_PRIVILEGE_CTG
#define MC_CMD_0x7_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -1731,6 +1828,7 @@
* Get version information about adapter components.
*/
#define MC_CMD_GET_VERSION 0x8
+#define MC_CMD_GET_VERSION_MSGSET 0x8
#undef MC_CMD_0x8_PRIVILEGE_CTG
#define MC_CMD_0x8_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -1771,7 +1869,13 @@
#define MC_CMD_GET_VERSION_OUT_VERSION_OFST 24
#define MC_CMD_GET_VERSION_OUT_VERSION_LEN 8
#define MC_CMD_GET_VERSION_OUT_VERSION_LO_OFST 24
+#define MC_CMD_GET_VERSION_OUT_VERSION_LO_LEN 4
+#define MC_CMD_GET_VERSION_OUT_VERSION_LO_LBN 192
+#define MC_CMD_GET_VERSION_OUT_VERSION_LO_WIDTH 32
#define MC_CMD_GET_VERSION_OUT_VERSION_HI_OFST 28
+#define MC_CMD_GET_VERSION_OUT_VERSION_HI_LEN 4
+#define MC_CMD_GET_VERSION_OUT_VERSION_HI_LBN 224
+#define MC_CMD_GET_VERSION_OUT_VERSION_HI_WIDTH 32
/* MC_CMD_GET_VERSION_EXT_OUT msgresponse */
#define MC_CMD_GET_VERSION_EXT_OUT_LEN 48
@@ -1787,7 +1891,13 @@
#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_OFST 24
#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_LEN 8
#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_LO_OFST 24
+#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_LO_LEN 4
+#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_LO_LBN 192
+#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_LO_WIDTH 32
#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_HI_OFST 28
+#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_HI_LEN 4
+#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_HI_LBN 224
+#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_HI_WIDTH 32
/* extra info */
#define MC_CMD_GET_VERSION_EXT_OUT_EXTRA_OFST 32
#define MC_CMD_GET_VERSION_EXT_OUT_EXTRA_LEN 16
@@ -1811,7 +1921,13 @@
#define MC_CMD_GET_VERSION_V2_OUT_VERSION_OFST 24
#define MC_CMD_GET_VERSION_V2_OUT_VERSION_LEN 8
#define MC_CMD_GET_VERSION_V2_OUT_VERSION_LO_OFST 24
+#define MC_CMD_GET_VERSION_V2_OUT_VERSION_LO_LEN 4
+#define MC_CMD_GET_VERSION_V2_OUT_VERSION_LO_LBN 192
+#define MC_CMD_GET_VERSION_V2_OUT_VERSION_LO_WIDTH 32
#define MC_CMD_GET_VERSION_V2_OUT_VERSION_HI_OFST 28
+#define MC_CMD_GET_VERSION_V2_OUT_VERSION_HI_LEN 4
+#define MC_CMD_GET_VERSION_V2_OUT_VERSION_HI_LBN 224
+#define MC_CMD_GET_VERSION_V2_OUT_VERSION_HI_WIDTH 32
/* extra info */
#define MC_CMD_GET_VERSION_V2_OUT_EXTRA_OFST 32
#define MC_CMD_GET_VERSION_V2_OUT_EXTRA_LEN 16
@@ -1833,6 +1949,33 @@
#define MC_CMD_GET_VERSION_V2_OUT_BOARD_EXT_INFO_PRESENT_OFST 48
#define MC_CMD_GET_VERSION_V2_OUT_BOARD_EXT_INFO_PRESENT_LBN 4
#define MC_CMD_GET_VERSION_V2_OUT_BOARD_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_DATAPATH_HW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_DATAPATH_HW_VERSION_PRESENT_LBN 5
+#define MC_CMD_GET_VERSION_V2_OUT_DATAPATH_HW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_DATAPATH_FW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_DATAPATH_FW_VERSION_PRESENT_LBN 6
+#define MC_CMD_GET_VERSION_V2_OUT_DATAPATH_FW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_BOOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_BOOT_VERSION_PRESENT_LBN 7
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_BOOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_UBOOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_UBOOT_VERSION_PRESENT_LBN 8
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_UBOOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_LBN 9
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_LBN 10
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_VERSION_PRESENT_LBN 11
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_BOARD_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_BOARD_VERSION_PRESENT_LBN 12
+#define MC_CMD_GET_VERSION_V2_OUT_BOARD_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_BUNDLE_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_BUNDLE_VERSION_PRESENT_LBN 13
+#define MC_CMD_GET_VERSION_V2_OUT_BUNDLE_VERSION_PRESENT_WIDTH 1
/* MC firmware unique build ID (as binary SHA-1 value) */
#define MC_CMD_GET_VERSION_V2_OUT_MCFW_BUILD_ID_OFST 52
#define MC_CMD_GET_VERSION_V2_OUT_MCFW_BUILD_ID_LEN 20
@@ -1850,7 +1993,13 @@
#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_OFST 156
#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_LEN 8
#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_LO_OFST 156
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_LO_LEN 4
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_LO_LBN 1248
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_LO_WIDTH 32
#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_HI_OFST 160
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_HI_LEN 4
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_HI_LBN 1280
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_HI_WIDTH 32
/* The ID of the SUC chip. This is specific to the platform but typically
* indicates family, memory sizes etc. See SF-116728-SW for further details.
*/
@@ -1864,7 +2013,13 @@
#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_OFST 184
#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_LEN 8
#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_LO_OFST 184
+#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_LO_LEN 4
+#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_LO_LBN 1472
+#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_LO_WIDTH 32
#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_HI_OFST 188
+#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_HI_LEN 4
+#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_HI_LBN 1504
+#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_HI_WIDTH 32
/* FPGA version as three numbers. On Riverhead based systems this field uses
* the same encoding as hardware version ID registers (MC_FPGA_BUILD_HWRD_REG):
* FPGA_VERSION[0]: x => Image H{x} FPGA_VERSION[1]: Revision letter (0 => A, 1
@@ -1886,12 +2041,496 @@
#define MC_CMD_GET_VERSION_V2_OUT_BOARD_SERIAL_OFST 240
#define MC_CMD_GET_VERSION_V2_OUT_BOARD_SERIAL_LEN 64
+/* MC_CMD_GET_VERSION_V3_OUT msgresponse: Extended response providing version
+ * information for all adapter components. For Riverhead based designs, base MC
+ * firmware version fields refer to NMC firmware, while CMC firmware data is in
+ * dedicated CMC fields. Flags indicate which data is present in the response
+ * (depending on which components exist on a particular adapter)
+ */
+#define MC_CMD_GET_VERSION_V3_OUT_LEN 328
+/* MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */
+/* MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */
+/* Enum values, see field(s): */
+/* MC_CMD_GET_VERSION_V0_OUT/MC_CMD_GET_VERSION_OUT_FIRMWARE */
+#define MC_CMD_GET_VERSION_V3_OUT_PCOL_OFST 4
+#define MC_CMD_GET_VERSION_V3_OUT_PCOL_LEN 4
+/* 128bit mask of functions supported by the current firmware */
+#define MC_CMD_GET_VERSION_V3_OUT_SUPPORTED_FUNCS_OFST 8
+#define MC_CMD_GET_VERSION_V3_OUT_SUPPORTED_FUNCS_LEN 16
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_OFST 24
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_LEN 8
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_LO_OFST 24
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_LO_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_LO_LBN 192
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_HI_OFST 28
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_HI_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_HI_LBN 224
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_HI_WIDTH 32
+/* extra info */
+#define MC_CMD_GET_VERSION_V3_OUT_EXTRA_OFST 32
+#define MC_CMD_GET_VERSION_V3_OUT_EXTRA_LEN 16
+/* Flags indicating which extended fields are valid */
+#define MC_CMD_GET_VERSION_V3_OUT_FLAGS_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_FLAGS_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_EXT_INFO_PRESENT_LBN 0
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_EXT_INFO_PRESENT_LBN 1
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_CMC_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_CMC_EXT_INFO_PRESENT_LBN 2
+#define MC_CMD_GET_VERSION_V3_OUT_CMC_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_FPGA_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_FPGA_EXT_INFO_PRESENT_LBN 3
+#define MC_CMD_GET_VERSION_V3_OUT_FPGA_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_EXT_INFO_PRESENT_LBN 4
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_HW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_HW_VERSION_PRESENT_LBN 5
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_HW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_FW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_FW_VERSION_PRESENT_LBN 6
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_FW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_BOOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_BOOT_VERSION_PRESENT_LBN 7
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_BOOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_UBOOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_UBOOT_VERSION_PRESENT_LBN 8
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_UBOOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_LBN 9
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_LBN 10
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_VERSION_PRESENT_LBN 11
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_VERSION_PRESENT_LBN 12
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_BUNDLE_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_BUNDLE_VERSION_PRESENT_LBN 13
+#define MC_CMD_GET_VERSION_V3_OUT_BUNDLE_VERSION_PRESENT_WIDTH 1
+/* MC firmware unique build ID (as binary SHA-1 value) */
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_BUILD_ID_OFST 52
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_BUILD_ID_LEN 20
+/* MC firmware security level */
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_SECURITY_LEVEL_OFST 72
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_SECURITY_LEVEL_LEN 4
+/* MC firmware build name (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_BUILD_NAME_OFST 76
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_BUILD_NAME_LEN 64
+/* The SUC firmware version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_VERSION_OFST 140
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_VERSION_NUM 4
+/* SUC firmware build date (as 64-bit Unix timestamp) */
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_OFST 156
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_LEN 8
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_LO_OFST 156
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_LO_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_LO_LBN 1248
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_HI_OFST 160
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_HI_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_HI_LBN 1280
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_HI_WIDTH 32
+/* The ID of the SUC chip. This is specific to the platform but typically
+ * indicates family, memory sizes etc. See SF-116728-SW for further details.
+ */
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_CHIP_ID_OFST 164
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_CHIP_ID_LEN 4
+/* The CMC firmware version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_VERSION_OFST 168
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_VERSION_NUM 4
+/* CMC firmware build date (as 64-bit Unix timestamp) */
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_OFST 184
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_LEN 8
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_LO_OFST 184
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_LO_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_LO_LBN 1472
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_HI_OFST 188
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_HI_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_HI_LBN 1504
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_HI_WIDTH 32
+/* FPGA version as three numbers. On Riverhead based systems this field uses
+ * the same encoding as hardware version ID registers (MC_FPGA_BUILD_HWRD_REG):
+ * FPGA_VERSION[0]: x => Image H{x} FPGA_VERSION[1]: Revision letter (0 => A, 1
+ * => B, ...) FPGA_VERSION[2]: Sub-revision number
+ */
+#define MC_CMD_GET_VERSION_V3_OUT_FPGA_VERSION_OFST 192
+#define MC_CMD_GET_VERSION_V3_OUT_FPGA_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_FPGA_VERSION_NUM 3
+/* Extra FPGA revision information (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V3_OUT_FPGA_EXTRA_OFST 204
+#define MC_CMD_GET_VERSION_V3_OUT_FPGA_EXTRA_LEN 16
+/* Board name / adapter model (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_NAME_OFST 220
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_NAME_LEN 16
+/* Board revision number */
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_REVISION_OFST 236
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_REVISION_LEN 4
+/* Board serial number (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_SERIAL_OFST 240
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_SERIAL_LEN 64
+/* The version of the datapath hardware design as three number - a.b.c */
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_HW_VERSION_OFST 304
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_HW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_HW_VERSION_NUM 3
+/* The version of the firmware library used to control the datapath as three
+ * number - a.b.c
+ */
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_FW_VERSION_OFST 316
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_FW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_FW_VERSION_NUM 3
+
+/* MC_CMD_GET_VERSION_V4_OUT msgresponse: Extended response providing SoC
+ * version information
+ */
+#define MC_CMD_GET_VERSION_V4_OUT_LEN 392
+/* MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */
+/* MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */
+/* Enum values, see field(s): */
+/* MC_CMD_GET_VERSION_V0_OUT/MC_CMD_GET_VERSION_OUT_FIRMWARE */
+#define MC_CMD_GET_VERSION_V4_OUT_PCOL_OFST 4
+#define MC_CMD_GET_VERSION_V4_OUT_PCOL_LEN 4
+/* 128bit mask of functions supported by the current firmware */
+#define MC_CMD_GET_VERSION_V4_OUT_SUPPORTED_FUNCS_OFST 8
+#define MC_CMD_GET_VERSION_V4_OUT_SUPPORTED_FUNCS_LEN 16
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_OFST 24
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_LEN 8
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_LO_OFST 24
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_LO_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_LO_LBN 192
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_HI_OFST 28
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_HI_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_HI_LBN 224
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_HI_WIDTH 32
+/* extra info */
+#define MC_CMD_GET_VERSION_V4_OUT_EXTRA_OFST 32
+#define MC_CMD_GET_VERSION_V4_OUT_EXTRA_LEN 16
+/* Flags indicating which extended fields are valid */
+#define MC_CMD_GET_VERSION_V4_OUT_FLAGS_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_FLAGS_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_EXT_INFO_PRESENT_LBN 0
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_EXT_INFO_PRESENT_LBN 1
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_CMC_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_CMC_EXT_INFO_PRESENT_LBN 2
+#define MC_CMD_GET_VERSION_V4_OUT_CMC_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_FPGA_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_FPGA_EXT_INFO_PRESENT_LBN 3
+#define MC_CMD_GET_VERSION_V4_OUT_FPGA_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_EXT_INFO_PRESENT_LBN 4
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_HW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_HW_VERSION_PRESENT_LBN 5
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_HW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_FW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_FW_VERSION_PRESENT_LBN 6
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_FW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_BOOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_BOOT_VERSION_PRESENT_LBN 7
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_BOOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_UBOOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_UBOOT_VERSION_PRESENT_LBN 8
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_UBOOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_LBN 9
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_LBN 10
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_VERSION_PRESENT_LBN 11
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_VERSION_PRESENT_LBN 12
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_BUNDLE_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_BUNDLE_VERSION_PRESENT_LBN 13
+#define MC_CMD_GET_VERSION_V4_OUT_BUNDLE_VERSION_PRESENT_WIDTH 1
+/* MC firmware unique build ID (as binary SHA-1 value) */
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_BUILD_ID_OFST 52
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_BUILD_ID_LEN 20
+/* MC firmware security level */
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_SECURITY_LEVEL_OFST 72
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_SECURITY_LEVEL_LEN 4
+/* MC firmware build name (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_BUILD_NAME_OFST 76
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_BUILD_NAME_LEN 64
+/* The SUC firmware version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_VERSION_OFST 140
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_VERSION_NUM 4
+/* SUC firmware build date (as 64-bit Unix timestamp) */
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_OFST 156
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_LEN 8
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_LO_OFST 156
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_LO_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_LO_LBN 1248
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_HI_OFST 160
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_HI_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_HI_LBN 1280
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_HI_WIDTH 32
+/* The ID of the SUC chip. This is specific to the platform but typically
+ * indicates family, memory sizes etc. See SF-116728-SW for further details.
+ */
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_CHIP_ID_OFST 164
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_CHIP_ID_LEN 4
+/* The CMC firmware version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_VERSION_OFST 168
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_VERSION_NUM 4
+/* CMC firmware build date (as 64-bit Unix timestamp) */
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_OFST 184
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_LEN 8
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_LO_OFST 184
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_LO_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_LO_LBN 1472
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_HI_OFST 188
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_HI_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_HI_LBN 1504
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_HI_WIDTH 32
+/* FPGA version as three numbers. On Riverhead based systems this field uses
+ * the same encoding as hardware version ID registers (MC_FPGA_BUILD_HWRD_REG):
+ * FPGA_VERSION[0]: x => Image H{x} FPGA_VERSION[1]: Revision letter (0 => A, 1
+ * => B, ...) FPGA_VERSION[2]: Sub-revision number
+ */
+#define MC_CMD_GET_VERSION_V4_OUT_FPGA_VERSION_OFST 192
+#define MC_CMD_GET_VERSION_V4_OUT_FPGA_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_FPGA_VERSION_NUM 3
+/* Extra FPGA revision information (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V4_OUT_FPGA_EXTRA_OFST 204
+#define MC_CMD_GET_VERSION_V4_OUT_FPGA_EXTRA_LEN 16
+/* Board name / adapter model (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_NAME_OFST 220
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_NAME_LEN 16
+/* Board revision number */
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_REVISION_OFST 236
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_REVISION_LEN 4
+/* Board serial number (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_SERIAL_OFST 240
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_SERIAL_LEN 64
+/* The version of the datapath hardware design as three number - a.b.c */
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_HW_VERSION_OFST 304
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_HW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_HW_VERSION_NUM 3
+/* The version of the firmware library used to control the datapath as three
+ * number - a.b.c
+ */
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_FW_VERSION_OFST 316
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_FW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_FW_VERSION_NUM 3
+/* The SOC boot version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_BOOT_VERSION_OFST 328
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_BOOT_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_BOOT_VERSION_NUM 4
+/* The SOC uboot version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_UBOOT_VERSION_OFST 344
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_UBOOT_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_UBOOT_VERSION_NUM 4
+/* The SOC main rootfs version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_MAIN_ROOTFS_VERSION_OFST 360
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_MAIN_ROOTFS_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_MAIN_ROOTFS_VERSION_NUM 4
+/* The SOC recovery buildroot version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_RECOVERY_BUILDROOT_VERSION_OFST 376
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_RECOVERY_BUILDROOT_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_RECOVERY_BUILDROOT_VERSION_NUM 4
+
+/* MC_CMD_GET_VERSION_V5_OUT msgresponse: Extended response providing bundle
+ * and board version information
+ */
+#define MC_CMD_GET_VERSION_V5_OUT_LEN 424
+/* MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */
+/* MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */
+/* Enum values, see field(s): */
+/* MC_CMD_GET_VERSION_V0_OUT/MC_CMD_GET_VERSION_OUT_FIRMWARE */
+#define MC_CMD_GET_VERSION_V5_OUT_PCOL_OFST 4
+#define MC_CMD_GET_VERSION_V5_OUT_PCOL_LEN 4
+/* 128bit mask of functions supported by the current firmware */
+#define MC_CMD_GET_VERSION_V5_OUT_SUPPORTED_FUNCS_OFST 8
+#define MC_CMD_GET_VERSION_V5_OUT_SUPPORTED_FUNCS_LEN 16
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_OFST 24
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_LEN 8
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_LO_OFST 24
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_LO_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_LO_LBN 192
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_HI_OFST 28
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_HI_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_HI_LBN 224
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_HI_WIDTH 32
+/* extra info */
+#define MC_CMD_GET_VERSION_V5_OUT_EXTRA_OFST 32
+#define MC_CMD_GET_VERSION_V5_OUT_EXTRA_LEN 16
+/* Flags indicating which extended fields are valid */
+#define MC_CMD_GET_VERSION_V5_OUT_FLAGS_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_FLAGS_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_EXT_INFO_PRESENT_LBN 0
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_EXT_INFO_PRESENT_LBN 1
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_CMC_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_CMC_EXT_INFO_PRESENT_LBN 2
+#define MC_CMD_GET_VERSION_V5_OUT_CMC_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_FPGA_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_FPGA_EXT_INFO_PRESENT_LBN 3
+#define MC_CMD_GET_VERSION_V5_OUT_FPGA_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_EXT_INFO_PRESENT_LBN 4
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_HW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_HW_VERSION_PRESENT_LBN 5
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_HW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_FW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_FW_VERSION_PRESENT_LBN 6
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_FW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_BOOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_BOOT_VERSION_PRESENT_LBN 7
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_BOOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_UBOOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_UBOOT_VERSION_PRESENT_LBN 8
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_UBOOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_LBN 9
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_LBN 10
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_VERSION_PRESENT_LBN 11
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_VERSION_PRESENT_LBN 12
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_BUNDLE_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_BUNDLE_VERSION_PRESENT_LBN 13
+#define MC_CMD_GET_VERSION_V5_OUT_BUNDLE_VERSION_PRESENT_WIDTH 1
+/* MC firmware unique build ID (as binary SHA-1 value) */
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_BUILD_ID_OFST 52
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_BUILD_ID_LEN 20
+/* MC firmware security level */
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_SECURITY_LEVEL_OFST 72
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_SECURITY_LEVEL_LEN 4
+/* MC firmware build name (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_BUILD_NAME_OFST 76
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_BUILD_NAME_LEN 64
+/* The SUC firmware version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_VERSION_OFST 140
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_VERSION_NUM 4
+/* SUC firmware build date (as 64-bit Unix timestamp) */
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_OFST 156
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_LEN 8
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_LO_OFST 156
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_LO_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_LO_LBN 1248
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_HI_OFST 160
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_HI_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_HI_LBN 1280
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_HI_WIDTH 32
+/* The ID of the SUC chip. This is specific to the platform but typically
+ * indicates family, memory sizes etc. See SF-116728-SW for further details.
+ */
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_CHIP_ID_OFST 164
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_CHIP_ID_LEN 4
+/* The CMC firmware version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_VERSION_OFST 168
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_VERSION_NUM 4
+/* CMC firmware build date (as 64-bit Unix timestamp) */
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_OFST 184
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_LEN 8
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_LO_OFST 184
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_LO_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_LO_LBN 1472
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_HI_OFST 188
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_HI_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_HI_LBN 1504
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_HI_WIDTH 32
+/* FPGA version as three numbers. On Riverhead based systems this field uses
+ * the same encoding as hardware version ID registers (MC_FPGA_BUILD_HWRD_REG):
+ * FPGA_VERSION[0]: x => Image H{x} FPGA_VERSION[1]: Revision letter (0 => A, 1
+ * => B, ...) FPGA_VERSION[2]: Sub-revision number
+ */
+#define MC_CMD_GET_VERSION_V5_OUT_FPGA_VERSION_OFST 192
+#define MC_CMD_GET_VERSION_V5_OUT_FPGA_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_FPGA_VERSION_NUM 3
+/* Extra FPGA revision information (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V5_OUT_FPGA_EXTRA_OFST 204
+#define MC_CMD_GET_VERSION_V5_OUT_FPGA_EXTRA_LEN 16
+/* Board name / adapter model (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_NAME_OFST 220
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_NAME_LEN 16
+/* Board revision number */
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_REVISION_OFST 236
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_REVISION_LEN 4
+/* Board serial number (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_SERIAL_OFST 240
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_SERIAL_LEN 64
+/* The version of the datapath hardware design as three number - a.b.c */
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_HW_VERSION_OFST 304
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_HW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_HW_VERSION_NUM 3
+/* The version of the firmware library used to control the datapath as three
+ * number - a.b.c
+ */
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_FW_VERSION_OFST 316
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_FW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_FW_VERSION_NUM 3
+/* The SOC boot version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_BOOT_VERSION_OFST 328
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_BOOT_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_BOOT_VERSION_NUM 4
+/* The SOC uboot version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_UBOOT_VERSION_OFST 344
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_UBOOT_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_UBOOT_VERSION_NUM 4
+/* The SOC main rootfs version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_MAIN_ROOTFS_VERSION_OFST 360
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_MAIN_ROOTFS_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_MAIN_ROOTFS_VERSION_NUM 4
+/* The SOC recovery buildroot version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_RECOVERY_BUILDROOT_VERSION_OFST 376
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_RECOVERY_BUILDROOT_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_RECOVERY_BUILDROOT_VERSION_NUM 4
+/* Board version as four numbers - a.b.c.d. BOARD_VERSION[0] duplicates the
+ * BOARD_REVISION field
+ */
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_VERSION_OFST 392
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_VERSION_NUM 4
+/* Bundle version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V5_OUT_BUNDLE_VERSION_OFST 408
+#define MC_CMD_GET_VERSION_V5_OUT_BUNDLE_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_BUNDLE_VERSION_NUM 4
+
/***********************************/
/* MC_CMD_PTP
* Perform PTP operation
*/
#define MC_CMD_PTP 0xb
+#define MC_CMD_PTP_MSGSET 0xb
#undef MC_CMD_0xb_PRIVILEGE_CTG
#define MC_CMD_0xb_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -2066,7 +2705,13 @@
#define MC_CMD_PTP_IN_ADJUST_FREQ_OFST 8
#define MC_CMD_PTP_IN_ADJUST_FREQ_LEN 8
#define MC_CMD_PTP_IN_ADJUST_FREQ_LO_OFST 8
+#define MC_CMD_PTP_IN_ADJUST_FREQ_LO_LEN 4
+#define MC_CMD_PTP_IN_ADJUST_FREQ_LO_LBN 64
+#define MC_CMD_PTP_IN_ADJUST_FREQ_LO_WIDTH 32
#define MC_CMD_PTP_IN_ADJUST_FREQ_HI_OFST 12
+#define MC_CMD_PTP_IN_ADJUST_FREQ_HI_LEN 4
+#define MC_CMD_PTP_IN_ADJUST_FREQ_HI_LBN 96
+#define MC_CMD_PTP_IN_ADJUST_FREQ_HI_WIDTH 32
/* enum: Number of fractional bits in frequency adjustment */
#define MC_CMD_PTP_IN_ADJUST_BITS 0x28
/* enum: Number of fractional bits in frequency adjustment when FP44_FREQ_ADJ
@@ -2097,7 +2742,13 @@
#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_OFST 8
#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_LEN 8
#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_LO_OFST 8
+#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_LO_LEN 4
+#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_LO_LBN 64
+#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_LO_WIDTH 32
#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_HI_OFST 12
+#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_HI_LEN 4
+#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_HI_LBN 96
+#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_HI_WIDTH 32
/* enum: Number of fractional bits in frequency adjustment */
/* MC_CMD_PTP_IN_ADJUST_BITS 0x28 */
/* enum: Number of fractional bits in frequency adjustment when FP44_FREQ_ADJ
@@ -2136,7 +2787,13 @@
#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_OFST 12
#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_LEN 8
#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_LO_OFST 12
+#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_LO_LEN 4
+#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_LO_LBN 96
+#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_LO_WIDTH 32
#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_HI_OFST 16
+#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_HI_LEN 4
+#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_HI_LBN 128
+#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_HI_WIDTH 32
/* MC_CMD_PTP_IN_MANFTEST_BASIC msgrequest */
#define MC_CMD_PTP_IN_MANFTEST_BASIC_LEN 8
@@ -2252,7 +2909,13 @@
#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_OFST 8
#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_LEN 8
#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_LO_OFST 8
+#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_LO_LEN 4
+#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_LO_LBN 64
+#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_LO_WIDTH 32
#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_HI_OFST 12
+#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_HI_LEN 4
+#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_HI_LBN 96
+#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_HI_WIDTH 32
/* Enum values, see field(s): */
/* MC_CMD_PTP/MC_CMD_PTP_IN_ADJUST/FREQ */
@@ -2283,7 +2946,13 @@
#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_OFST 12
#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_LEN 8
#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_LO_OFST 12
+#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_LO_LEN 4
+#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_LO_LBN 96
+#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_LO_WIDTH 32
#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_HI_OFST 16
+#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_HI_LEN 4
+#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_HI_LBN 128
+#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_HI_WIDTH 32
/* MC_CMD_PTP_IN_RX_SET_DOMAIN_FILTER msgrequest */
#define MC_CMD_PTP_IN_RX_SET_DOMAIN_FILTER_LEN 16
@@ -2745,6 +3414,7 @@
* Read 32bit words from the indirect memory map.
*/
#define MC_CMD_CSR_READ32 0xc
+#define MC_CMD_CSR_READ32_MSGSET 0xc
#undef MC_CMD_0xc_PRIVILEGE_CTG
#define MC_CMD_0xc_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -2778,6 +3448,7 @@
* Write 32bit dwords to the indirect memory map.
*/
#define MC_CMD_CSR_WRITE32 0xd
+#define MC_CMD_CSR_WRITE32_MSGSET 0xd
#undef MC_CMD_0xd_PRIVILEGE_CTG
#define MC_CMD_0xd_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -2811,6 +3482,7 @@
* MCDI command to avoid creating too many MCDI commands.
*/
#define MC_CMD_HP 0x54
+#define MC_CMD_HP_MSGSET 0x54
#undef MC_CMD_0x54_PRIVILEGE_CTG
#define MC_CMD_0x54_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -2834,7 +3506,13 @@
#define MC_CMD_HP_IN_OCSD_ADDR_OFST 4
#define MC_CMD_HP_IN_OCSD_ADDR_LEN 8
#define MC_CMD_HP_IN_OCSD_ADDR_LO_OFST 4
+#define MC_CMD_HP_IN_OCSD_ADDR_LO_LEN 4
+#define MC_CMD_HP_IN_OCSD_ADDR_LO_LBN 32
+#define MC_CMD_HP_IN_OCSD_ADDR_LO_WIDTH 32
#define MC_CMD_HP_IN_OCSD_ADDR_HI_OFST 8
+#define MC_CMD_HP_IN_OCSD_ADDR_HI_LEN 4
+#define MC_CMD_HP_IN_OCSD_ADDR_HI_LBN 64
+#define MC_CMD_HP_IN_OCSD_ADDR_HI_WIDTH 32
/* The requested update interval, in seconds. (Or the sub-command if ADDR is
* NULL.)
*/
@@ -2858,6 +3536,7 @@
* Get stack information.
*/
#define MC_CMD_STACKINFO 0xf
+#define MC_CMD_STACKINFO_MSGSET 0xf
#undef MC_CMD_0xf_PRIVILEGE_CTG
#define MC_CMD_0xf_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -2884,6 +3563,7 @@
* MDIO register read.
*/
#define MC_CMD_MDIO_READ 0x10
+#define MC_CMD_MDIO_READ_MSGSET 0x10
#undef MC_CMD_0x10_PRIVILEGE_CTG
#define MC_CMD_0x10_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -2932,6 +3612,7 @@
* MDIO register write.
*/
#define MC_CMD_MDIO_WRITE 0x11
+#define MC_CMD_MDIO_WRITE_MSGSET 0x11
#undef MC_CMD_0x11_PRIVILEGE_CTG
#define MC_CMD_0x11_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -2980,6 +3661,7 @@
* Write DBI register(s).
*/
#define MC_CMD_DBI_WRITE 0x12
+#define MC_CMD_DBI_WRITE_MSGSET 0x12
#undef MC_CMD_0x12_PRIVILEGE_CTG
#define MC_CMD_0x12_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -3033,6 +3715,7 @@
* access is implied by the Shared memory channel used.
*/
#define MC_CMD_PORT_READ32 0x14
+#define MC_CMD_PORT_READ32_MSGSET 0x14
/* MC_CMD_PORT_READ32_IN msgrequest */
#define MC_CMD_PORT_READ32_IN_LEN 4
@@ -3056,6 +3739,7 @@
* access is implied by the Shared memory channel used.
*/
#define MC_CMD_PORT_WRITE32 0x15
+#define MC_CMD_PORT_WRITE32_MSGSET 0x15
/* MC_CMD_PORT_WRITE32_IN msgrequest */
#define MC_CMD_PORT_WRITE32_IN_LEN 8
@@ -3079,6 +3763,7 @@
* access is implied by the Shared memory channel used.
*/
#define MC_CMD_PORT_READ128 0x16
+#define MC_CMD_PORT_READ128_MSGSET 0x16
/* MC_CMD_PORT_READ128_IN msgrequest */
#define MC_CMD_PORT_READ128_IN_LEN 4
@@ -3102,6 +3787,7 @@
* access is implied by the Shared memory channel used.
*/
#define MC_CMD_PORT_WRITE128 0x17
+#define MC_CMD_PORT_WRITE128_MSGSET 0x17
/* MC_CMD_PORT_WRITE128_IN msgrequest */
#define MC_CMD_PORT_WRITE128_IN_LEN 20
@@ -3150,6 +3836,7 @@
* Returns the MC firmware configuration structure.
*/
#define MC_CMD_GET_BOARD_CFG 0x18
+#define MC_CMD_GET_BOARD_CFG_MSGSET 0x18
#undef MC_CMD_0x18_PRIVILEGE_CTG
#define MC_CMD_0x18_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -3225,6 +3912,7 @@
* Read DBI register(s) -- extended functionality
*/
#define MC_CMD_DBI_READX 0x19
+#define MC_CMD_DBI_READX_MSGSET 0x19
#undef MC_CMD_0x19_PRIVILEGE_CTG
#define MC_CMD_0x19_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -3239,7 +3927,13 @@
#define MC_CMD_DBI_READX_IN_DBIRDOP_OFST 0
#define MC_CMD_DBI_READX_IN_DBIRDOP_LEN 8
#define MC_CMD_DBI_READX_IN_DBIRDOP_LO_OFST 0
+#define MC_CMD_DBI_READX_IN_DBIRDOP_LO_LEN 4
+#define MC_CMD_DBI_READX_IN_DBIRDOP_LO_LBN 0
+#define MC_CMD_DBI_READX_IN_DBIRDOP_LO_WIDTH 32
#define MC_CMD_DBI_READX_IN_DBIRDOP_HI_OFST 4
+#define MC_CMD_DBI_READX_IN_DBIRDOP_HI_LEN 4
+#define MC_CMD_DBI_READX_IN_DBIRDOP_HI_LBN 32
+#define MC_CMD_DBI_READX_IN_DBIRDOP_HI_WIDTH 32
#define MC_CMD_DBI_READX_IN_DBIRDOP_MINNUM 1
#define MC_CMD_DBI_READX_IN_DBIRDOP_MAXNUM 31
#define MC_CMD_DBI_READX_IN_DBIRDOP_MAXNUM_MCDI2 127
@@ -3283,6 +3977,7 @@
* Set the 16byte seed for the MC pseudo-random generator.
*/
#define MC_CMD_SET_RAND_SEED 0x1a
+#define MC_CMD_SET_RAND_SEED_MSGSET 0x1a
#undef MC_CMD_0x1a_PRIVILEGE_CTG
#define MC_CMD_0x1a_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -3302,6 +3997,7 @@
* Retrieve the history of the LTSSM, if the build supports it.
*/
#define MC_CMD_LTSSM_HIST 0x1b
+#define MC_CMD_LTSSM_HIST_MSGSET 0x1b
/* MC_CMD_LTSSM_HIST_IN msgrequest */
#define MC_CMD_LTSSM_HIST_IN_LEN 0
@@ -3330,6 +4026,7 @@
* platforms.
*/
#define MC_CMD_DRV_ATTACH 0x1c
+#define MC_CMD_DRV_ATTACH_MSGSET 0x1c
#undef MC_CMD_0x1c_PRIVILEGE_CTG
#define MC_CMD_0x1c_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -3524,6 +4221,7 @@
* Route UART output to circular buffer in shared memory instead.
*/
#define MC_CMD_SHMUART 0x1f
+#define MC_CMD_SHMUART_MSGSET 0x1f
/* MC_CMD_SHMUART_IN msgrequest */
#define MC_CMD_SHMUART_IN_LEN 4
@@ -3542,6 +4240,7 @@
* use MC_CMD_ENTITY_RESET instead.
*/
#define MC_CMD_PORT_RESET 0x20
+#define MC_CMD_PORT_RESET_MSGSET 0x20
#undef MC_CMD_0x20_PRIVILEGE_CTG
#define MC_CMD_0x20_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -3560,6 +4259,7 @@
* extended version of the deprecated MC_CMD_PORT_RESET with added fields.
*/
#define MC_CMD_ENTITY_RESET 0x20
+#define MC_CMD_ENTITY_RESET_MSGSET 0x20
/* MC_CMD_0x20_PRIVILEGE_CTG SRIOV_CTG_GENERAL */
/* MC_CMD_ENTITY_RESET_IN msgrequest */
@@ -3582,6 +4282,7 @@
* Read instantaneous and minimum flow control thresholds.
*/
#define MC_CMD_PCIE_CREDITS 0x21
+#define MC_CMD_PCIE_CREDITS_MSGSET 0x21
/* MC_CMD_PCIE_CREDITS_IN msgrequest */
#define MC_CMD_PCIE_CREDITS_IN_LEN 8
@@ -3617,6 +4318,7 @@
* Get histogram of RX queue fill level.
*/
#define MC_CMD_RXD_MONITOR 0x22
+#define MC_CMD_RXD_MONITOR_MSGSET 0x22
/* MC_CMD_RXD_MONITOR_IN msgrequest */
#define MC_CMD_RXD_MONITOR_IN_LEN 12
@@ -3676,6 +4378,7 @@
* Copy the given ASCII string out onto UART and/or out of the network port.
*/
#define MC_CMD_PUTS 0x23
+#define MC_CMD_PUTS_MSGSET 0x23
#undef MC_CMD_0x23_PRIVILEGE_CTG
#define MC_CMD_0x23_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -3712,6 +4415,7 @@
* 'zombie' state. Locks required: None
*/
#define MC_CMD_GET_PHY_CFG 0x24
+#define MC_CMD_GET_PHY_CFG_MSGSET 0x24
#undef MC_CMD_0x24_PRIVILEGE_CTG
#define MC_CMD_0x24_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -3868,6 +4572,7 @@
* Return code: 0, EINVAL, EACCES (if PHY_LOCK is not held)
*/
#define MC_CMD_START_BIST 0x25
+#define MC_CMD_START_BIST_MSGSET 0x25
#undef MC_CMD_0x25_PRIVILEGE_CTG
#define MC_CMD_0x25_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -3908,6 +4613,7 @@
* EACCES (if PHY_LOCK is not held).
*/
#define MC_CMD_POLL_BIST 0x26
+#define MC_CMD_POLL_BIST_MSGSET 0x26
#undef MC_CMD_0x26_PRIVILEGE_CTG
#define MC_CMD_0x26_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -4077,6 +4783,7 @@
* returns). The driver must still wait for flush done/failure events as usual.
*/
#define MC_CMD_FLUSH_RX_QUEUES 0x27
+#define MC_CMD_FLUSH_RX_QUEUES_MSGSET 0x27
/* MC_CMD_FLUSH_RX_QUEUES_IN msgrequest */
#define MC_CMD_FLUSH_RX_QUEUES_IN_LENMIN 4
@@ -4099,6 +4806,7 @@
* Returns a bitmask of loopback modes available at each speed.
*/
#define MC_CMD_GET_LOOPBACK_MODES 0x28
+#define MC_CMD_GET_LOOPBACK_MODES_MSGSET 0x28
#undef MC_CMD_0x28_PRIVILEGE_CTG
#define MC_CMD_0x28_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -4112,7 +4820,13 @@
#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_OFST 0
#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_LO_OFST 0
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_LO_LBN 0
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_HI_OFST 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_HI_LBN 32
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_HI_WIDTH 32
/* enum: None. */
#define MC_CMD_LOOPBACK_NONE 0x0
/* enum: Data. */
@@ -4195,28 +4909,52 @@
#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_OFST 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_LO_OFST 8
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_LO_LBN 64
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_HI_OFST 12
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_HI_LBN 96
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_OFST 16
#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_LO_OFST 16
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_LO_LBN 128
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_HI_OFST 20
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_HI_LBN 160
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_OFST 24
#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_LO_OFST 24
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_LO_LBN 192
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_HI_OFST 28
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_HI_LBN 224
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_OFST 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_LO_OFST 32
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_LO_LBN 256
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_HI_OFST 36
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_HI_LBN 288
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
@@ -4228,7 +4966,13 @@
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_OFST 0
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_LO_OFST 0
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_LO_LBN 0
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_HI_OFST 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_HI_LBN 32
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_HI_WIDTH 32
/* enum: None. */
/* MC_CMD_LOOPBACK_NONE 0x0 */
/* enum: Data. */
@@ -4311,49 +5055,91 @@
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_OFST 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_LO_OFST 8
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_LO_LBN 64
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_HI_OFST 12
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_HI_LBN 96
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_OFST 16
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_LO_OFST 16
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_LO_LBN 128
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_HI_OFST 20
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_HI_LBN 160
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_OFST 24
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_LO_OFST 24
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_LO_LBN 192
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_HI_OFST 28
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_HI_LBN 224
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_OFST 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_LO_OFST 32
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_LO_LBN 256
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_HI_OFST 36
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_HI_LBN 288
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported 25G loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_OFST 40
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_LO_OFST 40
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_LO_LBN 320
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_HI_OFST 44
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_HI_LBN 352
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported 50 loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_OFST 48
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_LO_OFST 48
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_LO_LBN 384
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_HI_OFST 52
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_HI_LBN 416
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported 100G loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_OFST 56
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_LO_OFST 56
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_LO_LBN 448
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_HI_OFST 60
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_HI_LBN 480
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
@@ -4395,6 +5181,7 @@
* ETIME.
*/
#define MC_CMD_GET_LINK 0x29
+#define MC_CMD_GET_LINK_MSGSET 0x29
#undef MC_CMD_0x29_PRIVILEGE_CTG
#define MC_CMD_0x29_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -4596,6 +5383,7 @@
* code: 0, EINVAL, ETIME, EAGAIN
*/
#define MC_CMD_SET_LINK 0x2a
+#define MC_CMD_SET_LINK_MSGSET 0x2a
#undef MC_CMD_0x2a_PRIVILEGE_CTG
#define MC_CMD_0x2a_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -4686,6 +5474,7 @@
* Set identification LED state. Locks required: None. Return code: 0, EINVAL
*/
#define MC_CMD_SET_ID_LED 0x2b
+#define MC_CMD_SET_ID_LED_MSGSET 0x2b
#undef MC_CMD_0x2b_PRIVILEGE_CTG
#define MC_CMD_0x2b_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -4708,6 +5497,7 @@
* Set MAC configuration. Locks required: None. Return code: 0, EINVAL
*/
#define MC_CMD_SET_MAC 0x2c
+#define MC_CMD_SET_MAC_MSGSET 0x2c
#undef MC_CMD_0x2c_PRIVILEGE_CTG
#define MC_CMD_0x2c_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -4724,7 +5514,13 @@
#define MC_CMD_SET_MAC_IN_ADDR_OFST 8
#define MC_CMD_SET_MAC_IN_ADDR_LEN 8
#define MC_CMD_SET_MAC_IN_ADDR_LO_OFST 8
+#define MC_CMD_SET_MAC_IN_ADDR_LO_LEN 4
+#define MC_CMD_SET_MAC_IN_ADDR_LO_LBN 64
+#define MC_CMD_SET_MAC_IN_ADDR_LO_WIDTH 32
#define MC_CMD_SET_MAC_IN_ADDR_HI_OFST 12
+#define MC_CMD_SET_MAC_IN_ADDR_HI_LEN 4
+#define MC_CMD_SET_MAC_IN_ADDR_HI_LBN 96
+#define MC_CMD_SET_MAC_IN_ADDR_HI_WIDTH 32
#define MC_CMD_SET_MAC_IN_REJECT_OFST 16
#define MC_CMD_SET_MAC_IN_REJECT_LEN 4
#define MC_CMD_SET_MAC_IN_REJECT_UNCST_OFST 16
@@ -4765,7 +5561,13 @@
#define MC_CMD_SET_MAC_EXT_IN_ADDR_OFST 8
#define MC_CMD_SET_MAC_EXT_IN_ADDR_LEN 8
#define MC_CMD_SET_MAC_EXT_IN_ADDR_LO_OFST 8
+#define MC_CMD_SET_MAC_EXT_IN_ADDR_LO_LEN 4
+#define MC_CMD_SET_MAC_EXT_IN_ADDR_LO_LBN 64
+#define MC_CMD_SET_MAC_EXT_IN_ADDR_LO_WIDTH 32
#define MC_CMD_SET_MAC_EXT_IN_ADDR_HI_OFST 12
+#define MC_CMD_SET_MAC_EXT_IN_ADDR_HI_LEN 4
+#define MC_CMD_SET_MAC_EXT_IN_ADDR_HI_LBN 96
+#define MC_CMD_SET_MAC_EXT_IN_ADDR_HI_WIDTH 32
#define MC_CMD_SET_MAC_EXT_IN_REJECT_OFST 16
#define MC_CMD_SET_MAC_EXT_IN_REJECT_LEN 4
#define MC_CMD_SET_MAC_EXT_IN_REJECT_UNCST_OFST 16
@@ -4816,6 +5618,129 @@
#define MC_CMD_SET_MAC_EXT_IN_CFG_FCS_LBN 4
#define MC_CMD_SET_MAC_EXT_IN_CFG_FCS_WIDTH 1
+/* MC_CMD_SET_MAC_V3_IN msgrequest */
+#define MC_CMD_SET_MAC_V3_IN_LEN 40
+/* The MTU is the MTU programmed directly into the XMAC/GMAC (inclusive of
+ * EtherII, VLAN, bug16011 padding).
+ */
+#define MC_CMD_SET_MAC_V3_IN_MTU_OFST 0
+#define MC_CMD_SET_MAC_V3_IN_MTU_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_DRAIN_OFST 4
+#define MC_CMD_SET_MAC_V3_IN_DRAIN_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_ADDR_OFST 8
+#define MC_CMD_SET_MAC_V3_IN_ADDR_LEN 8
+#define MC_CMD_SET_MAC_V3_IN_ADDR_LO_OFST 8
+#define MC_CMD_SET_MAC_V3_IN_ADDR_LO_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_ADDR_LO_LBN 64
+#define MC_CMD_SET_MAC_V3_IN_ADDR_LO_WIDTH 32
+#define MC_CMD_SET_MAC_V3_IN_ADDR_HI_OFST 12
+#define MC_CMD_SET_MAC_V3_IN_ADDR_HI_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_ADDR_HI_LBN 96
+#define MC_CMD_SET_MAC_V3_IN_ADDR_HI_WIDTH 32
+#define MC_CMD_SET_MAC_V3_IN_REJECT_OFST 16
+#define MC_CMD_SET_MAC_V3_IN_REJECT_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_REJECT_UNCST_OFST 16
+#define MC_CMD_SET_MAC_V3_IN_REJECT_UNCST_LBN 0
+#define MC_CMD_SET_MAC_V3_IN_REJECT_UNCST_WIDTH 1
+#define MC_CMD_SET_MAC_V3_IN_REJECT_BRDCST_OFST 16
+#define MC_CMD_SET_MAC_V3_IN_REJECT_BRDCST_LBN 1
+#define MC_CMD_SET_MAC_V3_IN_REJECT_BRDCST_WIDTH 1
+#define MC_CMD_SET_MAC_V3_IN_FCNTL_OFST 20
+#define MC_CMD_SET_MAC_V3_IN_FCNTL_LEN 4
+/* enum: Flow control is off. */
+/* MC_CMD_FCNTL_OFF 0x0 */
+/* enum: Respond to flow control. */
+/* MC_CMD_FCNTL_RESPOND 0x1 */
+/* enum: Respond to and Issue flow control. */
+/* MC_CMD_FCNTL_BIDIR 0x2 */
+/* enum: Auto neg flow control. */
+/* MC_CMD_FCNTL_AUTO 0x3 */
+/* enum: Priority flow control (eftest builds only). */
+/* MC_CMD_FCNTL_QBB 0x4 */
+/* enum: Issue flow control. */
+/* MC_CMD_FCNTL_GENERATE 0x5 */
+#define MC_CMD_SET_MAC_V3_IN_FLAGS_OFST 24
+#define MC_CMD_SET_MAC_V3_IN_FLAGS_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_FLAG_INCLUDE_FCS_OFST 24
+#define MC_CMD_SET_MAC_V3_IN_FLAG_INCLUDE_FCS_LBN 0
+#define MC_CMD_SET_MAC_V3_IN_FLAG_INCLUDE_FCS_WIDTH 1
+/* Select which parameters to configure. A parameter will only be modified if
+ * the corresponding control flag is set. If SET_MAC_ENHANCED is not set in
+ * capabilities then this field is ignored (and all flags are assumed to be
+ * set).
+ */
+#define MC_CMD_SET_MAC_V3_IN_CONTROL_OFST 28
+#define MC_CMD_SET_MAC_V3_IN_CONTROL_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_CFG_MTU_OFST 28
+#define MC_CMD_SET_MAC_V3_IN_CFG_MTU_LBN 0
+#define MC_CMD_SET_MAC_V3_IN_CFG_MTU_WIDTH 1
+#define MC_CMD_SET_MAC_V3_IN_CFG_DRAIN_OFST 28
+#define MC_CMD_SET_MAC_V3_IN_CFG_DRAIN_LBN 1
+#define MC_CMD_SET_MAC_V3_IN_CFG_DRAIN_WIDTH 1
+#define MC_CMD_SET_MAC_V3_IN_CFG_REJECT_OFST 28
+#define MC_CMD_SET_MAC_V3_IN_CFG_REJECT_LBN 2
+#define MC_CMD_SET_MAC_V3_IN_CFG_REJECT_WIDTH 1
+#define MC_CMD_SET_MAC_V3_IN_CFG_FCNTL_OFST 28
+#define MC_CMD_SET_MAC_V3_IN_CFG_FCNTL_LBN 3
+#define MC_CMD_SET_MAC_V3_IN_CFG_FCNTL_WIDTH 1
+#define MC_CMD_SET_MAC_V3_IN_CFG_FCS_OFST 28
+#define MC_CMD_SET_MAC_V3_IN_CFG_FCS_LBN 4
+#define MC_CMD_SET_MAC_V3_IN_CFG_FCS_WIDTH 1
+/* Identifies the MAC to update by the specifying the end of a logical MAE
+ * link. Setting TARGET to MAE_LINK_ENDPOINT_COMPAT is equivalent to using the
+ * previous version of the command (MC_CMD_SET_MAC_EXT). Not all possible
+ * combinations of MPORT_END and MPORT_SELECTOR in TARGET will work in all
+ * circumstances. 1. Some will always work (e.g. a VF can always address its
+ * logical MAC using MPORT_SELECTOR=ASSIGNED,LINK_END=VNIC), 2. Some are not
+ * meaningful and will always fail with EINVAL (e.g. attempting to address the
+ * VNIC end of a link to a physical port), 3. Some are meaningful but require
+ * the MCDI client to have the required permission and fail with EPERM
+ * otherwise (e.g. trying to set the MAC on a VF the caller cannot administer),
+ * and 4. Some could be implementation-specific and fail with ENOTSUP if not
+ * available (no examples exist right now). See SF-123581-TC section 4.3 for
+ * more details.
+ */
+#define MC_CMD_SET_MAC_V3_IN_TARGET_OFST 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_LEN 8
+#define MC_CMD_SET_MAC_V3_IN_TARGET_LO_OFST 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_LO_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_LO_LBN 256
+#define MC_CMD_SET_MAC_V3_IN_TARGET_LO_WIDTH 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_HI_OFST 36
+#define MC_CMD_SET_MAC_V3_IN_TARGET_HI_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_HI_LBN 288
+#define MC_CMD_SET_MAC_V3_IN_TARGET_HI_WIDTH 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_OFST 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FLAT_OFST 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FLAT_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_TYPE_OFST 35
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_TYPE_LEN 1
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_MPORT_ID_OFST 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_MPORT_ID_LEN 3
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_PPORT_ID_LBN 256
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_PPORT_ID_WIDTH 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_LBN 276
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_WIDTH 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_LBN 272
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_WIDTH 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FUNC_PF_ID_OFST 34
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FUNC_PF_ID_LEN 1
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FUNC_VF_ID_OFST 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FUNC_VF_ID_LEN 2
+#define MC_CMD_SET_MAC_V3_IN_TARGET_LINK_END_OFST 36
+#define MC_CMD_SET_MAC_V3_IN_TARGET_LINK_END_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_OFST 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_LEN 8
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_LO_OFST 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_LO_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_LO_LBN 256
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_LO_WIDTH 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_HI_OFST 36
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_HI_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_HI_LBN 288
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_HI_WIDTH 32
+
/* MC_CMD_SET_MAC_OUT msgresponse */
#define MC_CMD_SET_MAC_OUT_LEN 0
@@ -4839,6 +5764,7 @@
* Returns: 0, ETIME
*/
#define MC_CMD_PHY_STATS 0x2d
+#define MC_CMD_PHY_STATS_MSGSET 0x2d
#undef MC_CMD_0x2d_PRIVILEGE_CTG
#define MC_CMD_0x2d_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -4849,7 +5775,13 @@
#define MC_CMD_PHY_STATS_IN_DMA_ADDR_OFST 0
#define MC_CMD_PHY_STATS_IN_DMA_ADDR_LEN 8
#define MC_CMD_PHY_STATS_IN_DMA_ADDR_LO_OFST 0
+#define MC_CMD_PHY_STATS_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_PHY_STATS_IN_DMA_ADDR_LO_LBN 0
+#define MC_CMD_PHY_STATS_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_PHY_STATS_IN_DMA_ADDR_HI_OFST 4
+#define MC_CMD_PHY_STATS_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_PHY_STATS_IN_DMA_ADDR_HI_LBN 32
+#define MC_CMD_PHY_STATS_IN_DMA_ADDR_HI_WIDTH 32
/* MC_CMD_PHY_STATS_OUT_DMA msgresponse */
#define MC_CMD_PHY_STATS_OUT_DMA_LEN 0
@@ -4921,6 +5853,7 @@
* effect. Returns: 0, ETIME
*/
#define MC_CMD_MAC_STATS 0x2e
+#define MC_CMD_MAC_STATS_MSGSET 0x2e
#undef MC_CMD_0x2e_PRIVILEGE_CTG
#define MC_CMD_0x2e_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -4931,7 +5864,13 @@
#define MC_CMD_MAC_STATS_IN_DMA_ADDR_OFST 0
#define MC_CMD_MAC_STATS_IN_DMA_ADDR_LEN 8
#define MC_CMD_MAC_STATS_IN_DMA_ADDR_LO_OFST 0
+#define MC_CMD_MAC_STATS_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_MAC_STATS_IN_DMA_ADDR_LO_LBN 0
+#define MC_CMD_MAC_STATS_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_MAC_STATS_IN_DMA_ADDR_HI_OFST 4
+#define MC_CMD_MAC_STATS_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_MAC_STATS_IN_DMA_ADDR_HI_LBN 32
+#define MC_CMD_MAC_STATS_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_MAC_STATS_IN_CMD_OFST 8
#define MC_CMD_MAC_STATS_IN_CMD_LEN 4
#define MC_CMD_MAC_STATS_IN_DMA_OFST 8
@@ -4974,7 +5913,13 @@
#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_OFST 0
#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_LEN 8
#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_LO_OFST 0
+#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_LO_LEN 4
+#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_LO_LBN 0
+#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_LO_WIDTH 32
#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_HI_OFST 4
+#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_HI_LEN 4
+#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_HI_LBN 32
+#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_HI_WIDTH 32
#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS
#define MC_CMD_MAC_GENERATION_START 0x0 /* enum */
#define MC_CMD_MAC_DMABUF_START 0x1 /* enum */
@@ -5130,7 +6075,13 @@
#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_OFST 0
#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_LEN 8
#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_LO_OFST 0
+#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_LO_LEN 4
+#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_LO_LBN 0
+#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_LO_WIDTH 32
#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_HI_OFST 4
+#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_HI_LEN 4
+#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_HI_LBN 32
+#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_HI_WIDTH 32
#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS_V2
/* enum: Start of FEC stats buffer space, Medford2 and up */
#define MC_CMD_MAC_FEC_DMABUF_START 0x61
@@ -5163,7 +6114,13 @@
#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_OFST 0
#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_LEN 8
#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_LO_OFST 0
+#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_LO_LEN 4
+#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_LO_LBN 0
+#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_LO_WIDTH 32
#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_HI_OFST 4
+#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_HI_LEN 4
+#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_HI_LBN 32
+#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_HI_WIDTH 32
#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS_V3
/* enum: Start of CTPIO stats buffer space, Medford2 and up */
#define MC_CMD_MAC_CTPIO_DMABUF_START 0x68
@@ -5237,7 +6194,13 @@
#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_OFST 0
#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_LEN 8
#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_LO_OFST 0
+#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_LO_LEN 4
+#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_LO_LBN 0
+#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_LO_WIDTH 32
#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_HI_OFST 4
+#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_HI_LEN 4
+#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_HI_LBN 32
+#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_HI_WIDTH 32
#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS_V4
/* enum: Start of V4 stats buffer space */
#define MC_CMD_MAC_V4_DMABUF_START 0x79
@@ -5266,6 +6229,7 @@
* to be documented
*/
#define MC_CMD_SRIOV 0x30
+#define MC_CMD_SRIOV_MSGSET 0x30
/* MC_CMD_SRIOV_IN msgrequest */
#define MC_CMD_SRIOV_IN_LEN 12
@@ -5297,7 +6261,13 @@
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_OFST 8
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LEN 8
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LO_OFST 8
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LO_LEN 4
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LO_LBN 64
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LO_WIDTH 32
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_HI_OFST 12
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_HI_LEN 4
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_HI_LBN 96
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_HI_WIDTH 32
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LBN 64
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_WIDTH 64
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_RID_OFST 16
@@ -5308,7 +6278,13 @@
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_OFST 20
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LEN 8
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LO_OFST 20
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LO_LEN 4
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LO_LBN 160
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LO_WIDTH 32
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_HI_OFST 24
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_HI_LEN 4
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_HI_LBN 192
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_HI_WIDTH 32
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LBN 160
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_WIDTH 64
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_LENGTH_OFST 28
@@ -5338,6 +6314,7 @@
* Returns: 0, EINVAL (invalid RID)
*/
#define MC_CMD_MEMCPY 0x31
+#define MC_CMD_MEMCPY_MSGSET 0x31
/* MC_CMD_MEMCPY_IN msgrequest */
#define MC_CMD_MEMCPY_IN_LENMIN 32
@@ -5361,6 +6338,7 @@
* Set a WoL filter.
*/
#define MC_CMD_WOL_FILTER_SET 0x32
+#define MC_CMD_WOL_FILTER_SET_MSGSET 0x32
#undef MC_CMD_0x32_PRIVILEGE_CTG
#define MC_CMD_0x32_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -5401,7 +6379,13 @@
#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_OFST 8
#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_LEN 8
#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_LO_OFST 8
+#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_LO_LEN 4
+#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_LO_LBN 64
+#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_LO_WIDTH 32
#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_HI_OFST 12
+#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_HI_LEN 4
+#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_HI_LBN 96
+#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_HI_WIDTH 32
/* MC_CMD_WOL_FILTER_SET_IN_IPV4_SYN msgrequest */
#define MC_CMD_WOL_FILTER_SET_IN_IPV4_SYN_LEN 20
@@ -5476,6 +6460,7 @@
* Remove a WoL filter. Locks required: None. Returns: 0, EINVAL, ENOSYS
*/
#define MC_CMD_WOL_FILTER_REMOVE 0x33
+#define MC_CMD_WOL_FILTER_REMOVE_MSGSET 0x33
#undef MC_CMD_0x33_PRIVILEGE_CTG
#define MC_CMD_0x33_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -5495,6 +6480,7 @@
* ENOSYS
*/
#define MC_CMD_WOL_FILTER_RESET 0x34
+#define MC_CMD_WOL_FILTER_RESET_MSGSET 0x34
#undef MC_CMD_0x34_PRIVILEGE_CTG
#define MC_CMD_0x34_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -5515,6 +6501,7 @@
* Set the MCAST hash value without otherwise reconfiguring the MAC
*/
#define MC_CMD_SET_MCAST_HASH 0x35
+#define MC_CMD_SET_MCAST_HASH_MSGSET 0x35
/* MC_CMD_SET_MCAST_HASH_IN msgrequest */
#define MC_CMD_SET_MCAST_HASH_IN_LEN 32
@@ -5533,6 +6520,7 @@
* Locks required: none. Returns: 0
*/
#define MC_CMD_NVRAM_TYPES 0x36
+#define MC_CMD_NVRAM_TYPES_MSGSET 0x36
#undef MC_CMD_0x36_PRIVILEGE_CTG
#define MC_CMD_0x36_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -5595,6 +6583,7 @@
* EINVAL (bad type).
*/
#define MC_CMD_NVRAM_INFO 0x37
+#define MC_CMD_NVRAM_INFO_MSGSET 0x37
#undef MC_CMD_0x37_PRIVILEGE_CTG
#define MC_CMD_0x37_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -5692,6 +6681,7 @@
* EPERM.
*/
#define MC_CMD_NVRAM_UPDATE_START 0x38
+#define MC_CMD_NVRAM_UPDATE_START_MSGSET 0x38
#undef MC_CMD_0x38_PRIVILEGE_CTG
#define MC_CMD_0x38_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -5732,6 +6722,7 @@
* PHY_LOCK required and not held)
*/
#define MC_CMD_NVRAM_READ 0x39
+#define MC_CMD_NVRAM_READ_MSGSET 0x39
#undef MC_CMD_0x39_PRIVILEGE_CTG
#define MC_CMD_0x39_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -5803,6 +6794,7 @@
* PHY_LOCK required and not held)
*/
#define MC_CMD_NVRAM_WRITE 0x3a
+#define MC_CMD_NVRAM_WRITE_MSGSET 0x3a
#undef MC_CMD_0x3a_PRIVILEGE_CTG
#define MC_CMD_0x3a_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -5838,6 +6830,7 @@
* PHY_LOCK required and not held)
*/
#define MC_CMD_NVRAM_ERASE 0x3b
+#define MC_CMD_NVRAM_ERASE_MSGSET 0x3b
#undef MC_CMD_0x3b_PRIVILEGE_CTG
#define MC_CMD_0x3b_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -5868,6 +6861,7 @@
* the error EPERM.
*/
#define MC_CMD_NVRAM_UPDATE_FINISH 0x3c
+#define MC_CMD_NVRAM_UPDATE_FINISH_MSGSET 0x3c
#undef MC_CMD_0x3c_PRIVILEGE_CTG
#define MC_CMD_0x3c_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -5906,6 +6900,9 @@
#define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_POLL_VERIFY_RESULT_OFST 8
#define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_POLL_VERIFY_RESULT_LBN 2
#define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_POLL_VERIFY_RESULT_WIDTH 1
+#define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_ABORT_OFST 8
+#define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_ABORT_LBN 3
+#define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_ABORT_WIDTH 1
/* MC_CMD_NVRAM_UPDATE_FINISH_OUT msgresponse: Legacy NVRAM_UPDATE_FINISH
* response. Use NVRAM_UPDATE_FINISH_V2_OUT in new code
@@ -6036,6 +7033,7 @@
* DATALEN=0
*/
#define MC_CMD_REBOOT 0x3d
+#define MC_CMD_REBOOT_MSGSET 0x3d
#undef MC_CMD_0x3d_PRIVILEGE_CTG
#define MC_CMD_0x3d_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -6057,6 +7055,7 @@
* thread address.
*/
#define MC_CMD_SCHEDINFO 0x3e
+#define MC_CMD_SCHEDINFO_MSGSET 0x3e
#undef MC_CMD_0x3e_PRIVILEGE_CTG
#define MC_CMD_0x3e_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -6083,6 +7082,7 @@
* mode to the specified value. Returns the old mode.
*/
#define MC_CMD_REBOOT_MODE 0x3f
+#define MC_CMD_REBOOT_MODE_MSGSET 0x3f
#undef MC_CMD_0x3f_PRIVILEGE_CTG
#define MC_CMD_0x3f_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -6141,6 +7141,7 @@
* Locks required: None Returns: 0
*/
#define MC_CMD_SENSOR_INFO 0x41
+#define MC_CMD_SENSOR_INFO_MSGSET 0x41
#undef MC_CMD_0x41_PRIVILEGE_CTG
#define MC_CMD_0x41_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -6380,7 +7381,13 @@
#define MC_CMD_SENSOR_ENTRY_OFST 4
#define MC_CMD_SENSOR_ENTRY_LEN 8
#define MC_CMD_SENSOR_ENTRY_LO_OFST 4
+#define MC_CMD_SENSOR_ENTRY_LO_LEN 4
+#define MC_CMD_SENSOR_ENTRY_LO_LBN 32
+#define MC_CMD_SENSOR_ENTRY_LO_WIDTH 32
#define MC_CMD_SENSOR_ENTRY_HI_OFST 8
+#define MC_CMD_SENSOR_ENTRY_HI_LEN 4
+#define MC_CMD_SENSOR_ENTRY_HI_LBN 64
+#define MC_CMD_SENSOR_ENTRY_HI_WIDTH 32
#define MC_CMD_SENSOR_ENTRY_MINNUM 0
#define MC_CMD_SENSOR_ENTRY_MAXNUM 31
#define MC_CMD_SENSOR_ENTRY_MAXNUM_MCDI2 127
@@ -6402,7 +7409,13 @@
/* MC_CMD_SENSOR_ENTRY_OFST 4 */
/* MC_CMD_SENSOR_ENTRY_LEN 8 */
/* MC_CMD_SENSOR_ENTRY_LO_OFST 4 */
+/* MC_CMD_SENSOR_ENTRY_LO_LEN 4 */
+/* MC_CMD_SENSOR_ENTRY_LO_LBN 32 */
+/* MC_CMD_SENSOR_ENTRY_LO_WIDTH 32 */
/* MC_CMD_SENSOR_ENTRY_HI_OFST 8 */
+/* MC_CMD_SENSOR_ENTRY_HI_LEN 4 */
+/* MC_CMD_SENSOR_ENTRY_HI_LBN 64 */
+/* MC_CMD_SENSOR_ENTRY_HI_WIDTH 32 */
/* MC_CMD_SENSOR_ENTRY_MINNUM 0 */
/* MC_CMD_SENSOR_ENTRY_MAXNUM 31 */
/* MC_CMD_SENSOR_ENTRY_MAXNUM_MCDI2 127 */
@@ -6445,6 +7458,7 @@
* STATE_WARNING. Otherwise the board should not be expected to function.
*/
#define MC_CMD_READ_SENSORS 0x42
+#define MC_CMD_READ_SENSORS_MSGSET 0x42
#undef MC_CMD_0x42_PRIVILEGE_CTG
#define MC_CMD_0x42_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -6459,7 +7473,13 @@
#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_OFST 0
#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_LEN 8
#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_LO_OFST 0
+#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_LO_LBN 0
+#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_HI_OFST 4
+#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_HI_LBN 32
+#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_HI_WIDTH 32
/* MC_CMD_READ_SENSORS_EXT_IN msgrequest */
#define MC_CMD_READ_SENSORS_EXT_IN_LEN 12
@@ -6471,7 +7491,13 @@
#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_OFST 0
#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_LEN 8
#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_LO_OFST 0
+#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_LO_LBN 0
+#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_HI_OFST 4
+#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_HI_LBN 32
+#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_HI_WIDTH 32
/* Size in bytes of host buffer. */
#define MC_CMD_READ_SENSORS_EXT_IN_LENGTH_OFST 8
#define MC_CMD_READ_SENSORS_EXT_IN_LENGTH_LEN 4
@@ -6486,7 +7512,13 @@
#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_OFST 0
#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_LEN 8
#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_LO_OFST 0
+#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_LO_LEN 4
+#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_LO_LBN 0
+#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_HI_OFST 4
+#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_HI_LEN 4
+#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_HI_LBN 32
+#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_HI_WIDTH 32
/* Size in bytes of host buffer. */
#define MC_CMD_READ_SENSORS_EXT_IN_V2_LENGTH_OFST 8
#define MC_CMD_READ_SENSORS_EXT_IN_V2_LENGTH_LEN 4
@@ -6540,6 +7572,7 @@
* code: 0
*/
#define MC_CMD_GET_PHY_STATE 0x43
+#define MC_CMD_GET_PHY_STATE_MSGSET 0x43
#undef MC_CMD_0x43_PRIVILEGE_CTG
#define MC_CMD_0x43_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -6563,6 +7596,7 @@
* disable 802.Qbb for a given priority.
*/
#define MC_CMD_SETUP_8021QBB 0x44
+#define MC_CMD_SETUP_8021QBB_MSGSET 0x44
/* MC_CMD_SETUP_8021QBB_IN msgrequest */
#define MC_CMD_SETUP_8021QBB_IN_LEN 32
@@ -6578,6 +7612,7 @@
* Retrieve ID of any WoL filters. Locks required: None. Returns: 0, ENOSYS
*/
#define MC_CMD_WOL_FILTER_GET 0x45
+#define MC_CMD_WOL_FILTER_GET_MSGSET 0x45
#undef MC_CMD_0x45_PRIVILEGE_CTG
#define MC_CMD_0x45_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -6597,6 +7632,7 @@
* Returns: 0, ENOSYS
*/
#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD 0x46
+#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_MSGSET 0x46
#undef MC_CMD_0x46_PRIVILEGE_CTG
#define MC_CMD_0x46_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -6649,6 +7685,7 @@
* None. Returns: 0, ENOSYS
*/
#define MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD 0x47
+#define MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_MSGSET 0x47
#undef MC_CMD_0x47_PRIVILEGE_CTG
#define MC_CMD_0x47_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -6669,6 +7706,7 @@
* Restore MAC after block reset. Locks required: None. Returns: 0.
*/
#define MC_CMD_MAC_RESET_RESTORE 0x48
+#define MC_CMD_MAC_RESET_RESTORE_MSGSET 0x48
/* MC_CMD_MAC_RESET_RESTORE_IN msgrequest */
#define MC_CMD_MAC_RESET_RESTORE_IN_LEN 0
@@ -6684,6 +7722,7 @@
* required: None Returns: 0
*/
#define MC_CMD_TESTASSERT 0x49
+#define MC_CMD_TESTASSERT_MSGSET 0x49
#undef MC_CMD_0x49_PRIVILEGE_CTG
#define MC_CMD_0x49_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -6727,6 +7766,7 @@
* basis. Locks required: None. Returns: 0, EINVAL .
*/
#define MC_CMD_WORKAROUND 0x4a
+#define MC_CMD_WORKAROUND_MSGSET 0x4a
#undef MC_CMD_0x4a_PRIVILEGE_CTG
#define MC_CMD_0x4a_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -6790,6 +7830,7 @@
* Anything else: currently undefined. Locks required: None. Return code: 0.
*/
#define MC_CMD_GET_PHY_MEDIA_INFO 0x4b
+#define MC_CMD_GET_PHY_MEDIA_INFO_MSGSET 0x4b
#undef MC_CMD_0x4b_PRIVILEGE_CTG
#define MC_CMD_0x4b_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -6821,6 +7862,7 @@
* on the type of partition).
*/
#define MC_CMD_NVRAM_TEST 0x4c
+#define MC_CMD_NVRAM_TEST_MSGSET 0x4c
#undef MC_CMD_0x4c_PRIVILEGE_CTG
#define MC_CMD_0x4c_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -6851,6 +7893,7 @@
* they are configured first. Locks required: None. Return code: 0, EINVAL.
*/
#define MC_CMD_MRSFP_TWEAK 0x4d
+#define MC_CMD_MRSFP_TWEAK_MSGSET 0x4d
/* MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG msgrequest */
#define MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_LEN 16
@@ -6894,6 +7937,7 @@
* of range.
*/
#define MC_CMD_SENSOR_SET_LIMS 0x4e
+#define MC_CMD_SENSOR_SET_LIMS_MSGSET 0x4e
#undef MC_CMD_0x4e_PRIVILEGE_CTG
#define MC_CMD_0x4e_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -6925,6 +7969,7 @@
/* MC_CMD_GET_RESOURCE_LIMITS
*/
#define MC_CMD_GET_RESOURCE_LIMITS 0x4f
+#define MC_CMD_GET_RESOURCE_LIMITS_MSGSET 0x4f
/* MC_CMD_GET_RESOURCE_LIMITS_IN msgrequest */
#define MC_CMD_GET_RESOURCE_LIMITS_IN_LEN 0
@@ -6947,6 +7992,7 @@
* none. Returns: 0, EINVAL (bad type).
*/
#define MC_CMD_NVRAM_PARTITIONS 0x51
+#define MC_CMD_NVRAM_PARTITIONS_MSGSET 0x51
#undef MC_CMD_0x51_PRIVILEGE_CTG
#define MC_CMD_0x51_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -6977,6 +8023,7 @@
* none. Returns: 0, EINVAL (bad type).
*/
#define MC_CMD_NVRAM_METADATA 0x52
+#define MC_CMD_NVRAM_METADATA_MSGSET 0x52
#undef MC_CMD_0x52_PRIVILEGE_CTG
#define MC_CMD_0x52_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -7035,6 +8082,7 @@
* Returns the base MAC, count and stride for the requesting function
*/
#define MC_CMD_GET_MAC_ADDRESSES 0x55
+#define MC_CMD_GET_MAC_ADDRESSES_MSGSET 0x55
#undef MC_CMD_0x55_PRIVILEGE_CTG
#define MC_CMD_0x55_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -7066,6 +8114,7 @@
* SF-120509-TC and SF-117282-PS.
*/
#define MC_CMD_CLP 0x56
+#define MC_CMD_CLP_MSGSET 0x56
#undef MC_CMD_0x56_PRIVILEGE_CTG
#define MC_CMD_0x56_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -7188,6 +8237,7 @@
* Perform a MUM operation
*/
#define MC_CMD_MUM 0x57
+#define MC_CMD_MUM_MSGSET 0x57
#undef MC_CMD_0x57_PRIVILEGE_CTG
#define MC_CMD_0x57_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -7604,7 +8654,13 @@
#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_OFST 4
#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_LEN 8
#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_LO_OFST 4
+#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_LO_LEN 4
+#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_LO_LBN 32
+#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_LO_WIDTH 32
#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_HI_OFST 8
+#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_HI_LEN 4
+#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_HI_LBN 64
+#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_HI_WIDTH 32
/* MC_CMD_MUM_OUT_RAW_CMD msgresponse */
#define MC_CMD_MUM_OUT_RAW_CMD_LENMIN 1
@@ -7789,7 +8845,13 @@
#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_OFST 8
#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_LEN 8
#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_LO_OFST 8
+#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_LO_LEN 4
+#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_LO_LBN 64
+#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_LO_WIDTH 32
#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_HI_OFST 12
+#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_HI_LEN 4
+#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_HI_LBN 96
+#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_HI_WIDTH 32
#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_MINNUM 2
#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_MAXNUM 30
#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_MAXNUM_MCDI2 126
@@ -7986,6 +9048,7 @@
* sensor_query SPHINX service.
*/
#define MC_CMD_DYNAMIC_SENSORS_LIST 0x66
+#define MC_CMD_DYNAMIC_SENSORS_LIST_MSGSET 0x66
#undef MC_CMD_0x66_PRIVILEGE_CTG
#define MC_CMD_0x66_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -8031,6 +9094,7 @@
* `get_descriptions` in the sensor_query SPHINX service.
*/
#define MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS 0x67
+#define MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_MSGSET 0x67
#undef MC_CMD_0x67_PRIVILEGE_CTG
#define MC_CMD_0x67_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -8080,6 +9144,7 @@
* in the sensor_query SPHINX service.
*/
#define MC_CMD_DYNAMIC_SENSORS_GET_READINGS 0x68
+#define MC_CMD_DYNAMIC_SENSORS_GET_READINGS_MSGSET 0x68
#undef MC_CMD_0x68_PRIVILEGE_CTG
#define MC_CMD_0x68_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -8117,6 +9182,7 @@
* receive (Riverhead).
*/
#define MC_CMD_EVENT_CTRL 0x69
+#define MC_CMD_EVENT_CTRL_MSGSET 0x69
#undef MC_CMD_0x69_PRIVILEGE_CTG
#define MC_CMD_0x69_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -8197,7 +9263,13 @@
#define BUFTBL_ENTRY_RAWADDR_OFST 4
#define BUFTBL_ENTRY_RAWADDR_LEN 8
#define BUFTBL_ENTRY_RAWADDR_LO_OFST 4
+#define BUFTBL_ENTRY_RAWADDR_LO_LEN 4
+#define BUFTBL_ENTRY_RAWADDR_LO_LBN 32
+#define BUFTBL_ENTRY_RAWADDR_LO_WIDTH 32
#define BUFTBL_ENTRY_RAWADDR_HI_OFST 8
+#define BUFTBL_ENTRY_RAWADDR_HI_LEN 4
+#define BUFTBL_ENTRY_RAWADDR_HI_LBN 64
+#define BUFTBL_ENTRY_RAWADDR_HI_WIDTH 32
#define BUFTBL_ENTRY_RAWADDR_LBN 32
#define BUFTBL_ENTRY_RAWADDR_WIDTH 64
@@ -8207,14 +9279,25 @@
#define NVRAM_PARTITION_TYPE_ID_LEN 2
/* enum: Primary MC firmware partition */
#define NVRAM_PARTITION_TYPE_MC_FIRMWARE 0x100
+/* enum: NMC firmware partition (this is intentionally an alias of MC_FIRMWARE)
+ */
+#define NVRAM_PARTITION_TYPE_NMC_FIRMWARE 0x100
/* enum: Secondary MC firmware partition */
#define NVRAM_PARTITION_TYPE_MC_FIRMWARE_BACKUP 0x200
/* enum: Expansion ROM partition */
#define NVRAM_PARTITION_TYPE_EXPANSION_ROM 0x300
/* enum: Static configuration TLV partition */
#define NVRAM_PARTITION_TYPE_STATIC_CONFIG 0x400
+/* enum: Factory configuration TLV partition (this is intentionally an alias of
+ * STATIC_CONFIG)
+ */
+#define NVRAM_PARTITION_TYPE_FACTORY_CONFIG 0x400
/* enum: Dynamic configuration TLV partition */
#define NVRAM_PARTITION_TYPE_DYNAMIC_CONFIG 0x500
+/* enum: User configuration TLV partition (this is intentionally an alias of
+ * DYNAMIC_CONFIG)
+ */
+#define NVRAM_PARTITION_TYPE_USER_CONFIG 0x500
/* enum: Expansion ROM configuration data for port 0 */
#define NVRAM_PARTITION_TYPE_EXPROM_CONFIG_PORT0 0x600
/* enum: Synonym for EXPROM_CONFIG_PORT0 as used in pmap files */
@@ -8227,10 +9310,16 @@
#define NVRAM_PARTITION_TYPE_EXPROM_CONFIG_PORT3 0x603
/* enum: Non-volatile log output partition */
#define NVRAM_PARTITION_TYPE_LOG 0x700
+/* enum: Non-volatile log output partition for NMC firmware (this is
+ * intentionally an alias of LOG)
+ */
+#define NVRAM_PARTITION_TYPE_NMC_LOG 0x700
/* enum: Non-volatile log output of second core on dual-core device */
#define NVRAM_PARTITION_TYPE_LOG_SLAVE 0x701
/* enum: Device state dump output partition */
#define NVRAM_PARTITION_TYPE_DUMP 0x800
+/* enum: Crash log partition for NMC firmware */
+#define NVRAM_PARTITION_TYPE_NMC_CRASH_LOG 0x801
/* enum: Application license key storage partition */
#define NVRAM_PARTITION_TYPE_LICENSE 0x900
/* enum: Start of range used for PHY partitions (low 8 bits are the PHY ID) */
@@ -8247,6 +9336,20 @@
#define NVRAM_PARTITION_TYPE_FC_LICENSE 0xb03
/* enum: Non-volatile log output partition for FC */
#define NVRAM_PARTITION_TYPE_FC_LOG 0xb04
+/* enum: FPGA Stage 1 bitstream */
+#define NVRAM_PARTITION_TYPE_FPGA_STAGE1 0xb05
+/* enum: FPGA Stage 2 bitstream */
+#define NVRAM_PARTITION_TYPE_FPGA_STAGE2 0xb06
+/* enum: FPGA User XCLBIN / Programmable Region 0 bitstream */
+#define NVRAM_PARTITION_TYPE_FPGA_REGION0 0xb07
+/* enum: FPGA User XCLBIN (this is intentionally an alias of FPGA_REGION0) */
+#define NVRAM_PARTITION_TYPE_FPGA_XCLBIN_USER 0xb07
+/* enum: FPGA jump instruction (a.k.a. boot) partition to select Stage1
+ * bitstream
+ */
+#define NVRAM_PARTITION_TYPE_FPGA_JUMP 0xb08
+/* enum: FPGA Validate XCLBIN */
+#define NVRAM_PARTITION_TYPE_FPGA_XCLBIN_VALIDATE 0xb09
/* enum: MUM firmware partition */
#define NVRAM_PARTITION_TYPE_MUM_FIRMWARE 0xc00
/* enum: SUC firmware partition (this is intentionally an alias of
@@ -8255,6 +9358,10 @@
#define NVRAM_PARTITION_TYPE_SUC_FIRMWARE 0xc00
/* enum: MUM Non-volatile log output partition. */
#define NVRAM_PARTITION_TYPE_MUM_LOG 0xc01
+/* enum: SUC Non-volatile log output partition (this is intentionally an alias
+ * of MUM_LOG).
+ */
+#define NVRAM_PARTITION_TYPE_SUC_LOG 0xc01
/* enum: MUM Application table partition. */
#define NVRAM_PARTITION_TYPE_MUM_APPTABLE 0xc02
/* enum: MUM boot rom partition. */
@@ -8269,6 +9376,10 @@
#define NVRAM_PARTITION_TYPE_EXPANSION_UEFI 0xd00
/* enum: Used by the expansion ROM for logging */
#define NVRAM_PARTITION_TYPE_PXE_LOG 0x1000
+/* enum: Non-volatile log output partition for Expansion ROM (this is
+ * intentionally an alias of PXE_LOG).
+ */
+#define NVRAM_PARTITION_TYPE_EXPROM_LOG 0x1000
/* enum: Used for XIP code of shmbooted images */
#define NVRAM_PARTITION_TYPE_XIP_SCRATCH 0x1100
/* enum: Spare partition 2 */
@@ -8277,6 +9388,10 @@
* between XJTAG and Manftest.
*/
#define NVRAM_PARTITION_TYPE_MANUFACTURING 0x1300
+/* enum: Deployment configuration TLV partition (this is intentionally an alias
+ * of MANUFACTURING)
+ */
+#define NVRAM_PARTITION_TYPE_DEPLOYMENT_CONFIG 0x1300
/* enum: Spare partition 4 */
#define NVRAM_PARTITION_TYPE_SPARE_4 0x1400
/* enum: Spare partition 5 */
@@ -8312,14 +9427,43 @@
#define NVRAM_PARTITION_TYPE_BUNDLE_LOG 0x1e02
/* enum: Partition for Solarflare gPXE bootrom installed via Bundle update. */
#define NVRAM_PARTITION_TYPE_EXPANSION_ROM_INTERNAL 0x1e03
+/* enum: Test partition on SmartNIC system microcontroller (SUC) */
+#define NVRAM_PARTITION_TYPE_SUC_TEST 0x1f00
+/* enum: System microcontroller access to primary FPGA flash. */
+#define NVRAM_PARTITION_TYPE_SUC_FPGA_PRIMARY 0x1f01
+/* enum: System microcontroller access to secondary FPGA flash (if present) */
+#define NVRAM_PARTITION_TYPE_SUC_FPGA_SECONDARY 0x1f02
+/* enum: System microcontroller access to primary System-on-Chip flash */
+#define NVRAM_PARTITION_TYPE_SUC_SOC_PRIMARY 0x1f03
+/* enum: System microcontroller access to secondary System-on-Chip flash (if
+ * present)
+ */
+#define NVRAM_PARTITION_TYPE_SUC_SOC_SECONDARY 0x1f04
+/* enum: System microcontroller critical failure logs. Contains structured
+ * details of sensors leading up to a critical failure (where the board is shut
+ * down).
+ */
+#define NVRAM_PARTITION_TYPE_SUC_FAILURE_LOG 0x1f05
+/* enum: System-on-Chip configuration information (see XN-200467-PS). */
+#define NVRAM_PARTITION_TYPE_SUC_SOC_CONFIG 0x1f07
+/* enum: System-on-Chip update information. */
+#define NVRAM_PARTITION_TYPE_SOC_UPDATE 0x2003
/* enum: Start of reserved value range (firmware may use for any purpose) */
#define NVRAM_PARTITION_TYPE_RESERVED_VALUES_MIN 0xff00
/* enum: End of reserved value range (firmware may use for any purpose) */
#define NVRAM_PARTITION_TYPE_RESERVED_VALUES_MAX 0xfffd
/* enum: Recovery partition map (provided if real map is missing or corrupt) */
#define NVRAM_PARTITION_TYPE_RECOVERY_MAP 0xfffe
+/* enum: Recovery Flash Partition Table, see SF-122606-TC. (this is
+ * intentionally an alias of RECOVERY_MAP)
+ */
+#define NVRAM_PARTITION_TYPE_RECOVERY_FPT 0xfffe
/* enum: Partition map (real map as stored in flash) */
#define NVRAM_PARTITION_TYPE_PARTITION_MAP 0xffff
+/* enum: Flash Partition Table, see SF-122606-TC. (this is intentionally an
+ * alias of PARTITION_MAP)
+ */
+#define NVRAM_PARTITION_TYPE_FPT 0xffff
#define NVRAM_PARTITION_TYPE_ID_LBN 0
#define NVRAM_PARTITION_TYPE_ID_WIDTH 16
@@ -8368,7 +9512,13 @@
#define LICENSED_FEATURES_MASK_OFST 0
#define LICENSED_FEATURES_MASK_LEN 8
#define LICENSED_FEATURES_MASK_LO_OFST 0
+#define LICENSED_FEATURES_MASK_LO_LEN 4
+#define LICENSED_FEATURES_MASK_LO_LBN 0
+#define LICENSED_FEATURES_MASK_LO_WIDTH 32
#define LICENSED_FEATURES_MASK_HI_OFST 4
+#define LICENSED_FEATURES_MASK_HI_LEN 4
+#define LICENSED_FEATURES_MASK_HI_LBN 32
+#define LICENSED_FEATURES_MASK_HI_WIDTH 32
#define LICENSED_FEATURES_RX_CUT_THROUGH_OFST 0
#define LICENSED_FEATURES_RX_CUT_THROUGH_LBN 0
#define LICENSED_FEATURES_RX_CUT_THROUGH_WIDTH 1
@@ -8408,7 +9558,13 @@
#define LICENSED_V3_APPS_MASK_OFST 0
#define LICENSED_V3_APPS_MASK_LEN 8
#define LICENSED_V3_APPS_MASK_LO_OFST 0
+#define LICENSED_V3_APPS_MASK_LO_LEN 4
+#define LICENSED_V3_APPS_MASK_LO_LBN 0
+#define LICENSED_V3_APPS_MASK_LO_WIDTH 32
#define LICENSED_V3_APPS_MASK_HI_OFST 4
+#define LICENSED_V3_APPS_MASK_HI_LEN 4
+#define LICENSED_V3_APPS_MASK_HI_LBN 32
+#define LICENSED_V3_APPS_MASK_HI_WIDTH 32
#define LICENSED_V3_APPS_ONLOAD_OFST 0
#define LICENSED_V3_APPS_ONLOAD_LBN 0
#define LICENSED_V3_APPS_ONLOAD_WIDTH 1
@@ -8466,7 +9622,13 @@
#define LICENSED_V3_FEATURES_MASK_OFST 0
#define LICENSED_V3_FEATURES_MASK_LEN 8
#define LICENSED_V3_FEATURES_MASK_LO_OFST 0
+#define LICENSED_V3_FEATURES_MASK_LO_LEN 4
+#define LICENSED_V3_FEATURES_MASK_LO_LBN 0
+#define LICENSED_V3_FEATURES_MASK_LO_WIDTH 32
#define LICENSED_V3_FEATURES_MASK_HI_OFST 4
+#define LICENSED_V3_FEATURES_MASK_HI_LEN 4
+#define LICENSED_V3_FEATURES_MASK_HI_LBN 32
+#define LICENSED_V3_FEATURES_MASK_HI_WIDTH 32
#define LICENSED_V3_FEATURES_RX_CUT_THROUGH_OFST 0
#define LICENSED_V3_FEATURES_RX_CUT_THROUGH_LBN 0
#define LICENSED_V3_FEATURES_RX_CUT_THROUGH_WIDTH 1
@@ -8617,6 +9779,7 @@
* Get a dump of the MCPU registers
*/
#define MC_CMD_READ_REGS 0x50
+#define MC_CMD_READ_REGS_MSGSET 0x50
#undef MC_CMD_0x50_PRIVILEGE_CTG
#define MC_CMD_0x50_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -8643,6 +9806,7 @@
* end with an address for each 4k of host memory required to back the EVQ.
*/
#define MC_CMD_INIT_EVQ 0x80
+#define MC_CMD_INIT_EVQ_MSGSET 0x80
#undef MC_CMD_0x80_PRIVILEGE_CTG
#define MC_CMD_0x80_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -8657,7 +9821,8 @@
#define MC_CMD_INIT_EVQ_IN_SIZE_OFST 0
#define MC_CMD_INIT_EVQ_IN_SIZE_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_EVQ_IN_INSTANCE_OFST 4
#define MC_CMD_INIT_EVQ_IN_INSTANCE_LEN 4
@@ -8729,7 +9894,13 @@
#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_OFST 36
#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_LO_OFST 36
+#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_LO_LBN 288
+#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_HI_OFST 40
+#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_HI_LBN 320
+#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_MINNUM 1
#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_MAXNUM 64
#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_MAXNUM_MCDI2 64
@@ -8750,7 +9921,8 @@
#define MC_CMD_INIT_EVQ_V2_IN_SIZE_OFST 0
#define MC_CMD_INIT_EVQ_V2_IN_SIZE_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_EVQ_V2_IN_INSTANCE_OFST 4
#define MC_CMD_INIT_EVQ_V2_IN_INSTANCE_LEN 4
@@ -8847,7 +10019,13 @@
#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_OFST 36
#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_LO_OFST 36
+#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_LO_LBN 288
+#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_HI_OFST 40
+#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_HI_LBN 320
+#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_MINNUM 1
#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_MAXNUM 64
#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_MAXNUM_MCDI2 64
@@ -8900,6 +10078,7 @@
* the RXQ.
*/
#define MC_CMD_INIT_RXQ 0x81
+#define MC_CMD_INIT_RXQ_MSGSET 0x81
#undef MC_CMD_0x81_PRIVILEGE_CTG
#define MC_CMD_0x81_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -8923,7 +10102,8 @@
#define MC_CMD_INIT_RXQ_IN_LABEL_OFST 8
#define MC_CMD_INIT_RXQ_IN_LABEL_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_RXQ_IN_INSTANCE_OFST 12
#define MC_CMD_INIT_RXQ_IN_INSTANCE_LEN 4
@@ -8964,7 +10144,13 @@
#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_OFST 28
#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_LO_OFST 28
+#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_LO_LBN 224
+#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_HI_OFST 32
+#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_HI_LBN 256
+#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_MINNUM 1
#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_MAXNUM 28
#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_MAXNUM_MCDI2 124
@@ -8988,7 +10174,8 @@
#define MC_CMD_INIT_RXQ_EXT_IN_LABEL_OFST 8
#define MC_CMD_INIT_RXQ_EXT_IN_LABEL_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_RXQ_EXT_IN_INSTANCE_OFST 12
#define MC_CMD_INIT_RXQ_EXT_IN_INSTANCE_LEN 4
@@ -9062,7 +10249,13 @@
#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_OFST 28
#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_LO_OFST 28
+#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_LO_LBN 224
+#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_HI_OFST 32
+#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_HI_LBN 256
+#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_NUM 64
/* Maximum length of packet to receive, if SNAPSHOT_MODE flag is set */
#define MC_CMD_INIT_RXQ_EXT_IN_SNAPSHOT_LENGTH_OFST 540
@@ -9085,7 +10278,8 @@
#define MC_CMD_INIT_RXQ_V3_IN_LABEL_OFST 8
#define MC_CMD_INIT_RXQ_V3_IN_LABEL_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_RXQ_V3_IN_INSTANCE_OFST 12
#define MC_CMD_INIT_RXQ_V3_IN_INSTANCE_LEN 4
@@ -9159,7 +10353,13 @@
#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_OFST 28
#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_LO_OFST 28
+#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_LO_LBN 224
+#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_HI_OFST 32
+#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_HI_LBN 256
+#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_NUM 64
/* Maximum length of packet to receive, if SNAPSHOT_MODE flag is set */
#define MC_CMD_INIT_RXQ_V3_IN_SNAPSHOT_LENGTH_OFST 540
@@ -9211,7 +10411,8 @@
#define MC_CMD_INIT_RXQ_V4_IN_LABEL_OFST 8
#define MC_CMD_INIT_RXQ_V4_IN_LABEL_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_RXQ_V4_IN_INSTANCE_OFST 12
#define MC_CMD_INIT_RXQ_V4_IN_INSTANCE_LEN 4
@@ -9285,7 +10486,13 @@
#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_OFST 28
#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_LO_OFST 28
+#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_LO_LBN 224
+#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_HI_OFST 32
+#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_HI_LBN 256
+#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_NUM 64
/* Maximum length of packet to receive, if SNAPSHOT_MODE flag is set */
#define MC_CMD_INIT_RXQ_V4_IN_SNAPSHOT_LENGTH_OFST 540
@@ -9350,7 +10557,8 @@
#define MC_CMD_INIT_RXQ_V5_IN_LABEL_OFST 8
#define MC_CMD_INIT_RXQ_V5_IN_LABEL_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_RXQ_V5_IN_INSTANCE_OFST 12
#define MC_CMD_INIT_RXQ_V5_IN_INSTANCE_LEN 4
@@ -9424,7 +10632,13 @@
#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_OFST 28
#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_LO_OFST 28
+#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_LO_LBN 224
+#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_HI_OFST 32
+#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_HI_LBN 256
+#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_NUM 64
/* Maximum length of packet to receive, if SNAPSHOT_MODE flag is set */
#define MC_CMD_INIT_RXQ_V5_IN_SNAPSHOT_LENGTH_OFST 540
@@ -9497,6 +10711,7 @@
/* MC_CMD_INIT_TXQ
*/
#define MC_CMD_INIT_TXQ 0x82
+#define MC_CMD_INIT_TXQ_MSGSET 0x82
#undef MC_CMD_0x82_PRIVILEGE_CTG
#define MC_CMD_0x82_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -9521,7 +10736,8 @@
#define MC_CMD_INIT_TXQ_IN_LABEL_OFST 8
#define MC_CMD_INIT_TXQ_IN_LABEL_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_TXQ_IN_INSTANCE_OFST 12
#define MC_CMD_INIT_TXQ_IN_INSTANCE_LEN 4
@@ -9565,7 +10781,13 @@
#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_OFST 28
#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_LO_OFST 28
+#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_LO_LBN 224
+#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_HI_OFST 32
+#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_HI_LBN 256
+#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_MINNUM 1
#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_MAXNUM 28
#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_MAXNUM_MCDI2 124
@@ -9586,7 +10808,8 @@
#define MC_CMD_INIT_TXQ_EXT_IN_LABEL_OFST 8
#define MC_CMD_INIT_TXQ_EXT_IN_LABEL_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_TXQ_EXT_IN_INSTANCE_OFST 12
#define MC_CMD_INIT_TXQ_EXT_IN_INSTANCE_LEN 4
@@ -9648,7 +10871,13 @@
#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_OFST 28
#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_LO_OFST 28
+#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_LO_LBN 224
+#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_HI_OFST 32
+#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_HI_LBN 256
+#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_MINNUM 1
#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_MAXNUM 64
#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_MAXNUM_MCDI2 64
@@ -9674,6 +10903,7 @@
* or the operation will fail with EBUSY
*/
#define MC_CMD_FINI_EVQ 0x83
+#define MC_CMD_FINI_EVQ_MSGSET 0x83
#undef MC_CMD_0x83_PRIVILEGE_CTG
#define MC_CMD_0x83_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -9695,6 +10925,7 @@
* Teardown a RXQ.
*/
#define MC_CMD_FINI_RXQ 0x84
+#define MC_CMD_FINI_RXQ_MSGSET 0x84
#undef MC_CMD_0x84_PRIVILEGE_CTG
#define MC_CMD_0x84_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -9714,6 +10945,7 @@
* Teardown a TXQ.
*/
#define MC_CMD_FINI_TXQ 0x85
+#define MC_CMD_FINI_TXQ_MSGSET 0x85
#undef MC_CMD_0x85_PRIVILEGE_CTG
#define MC_CMD_0x85_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -9733,6 +10965,7 @@
* Generate an event on an EVQ belonging to the function issuing the command.
*/
#define MC_CMD_DRIVER_EVENT 0x86
+#define MC_CMD_DRIVER_EVENT_MSGSET 0x86
#undef MC_CMD_0x86_PRIVILEGE_CTG
#define MC_CMD_0x86_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -9746,7 +10979,13 @@
#define MC_CMD_DRIVER_EVENT_IN_DATA_OFST 4
#define MC_CMD_DRIVER_EVENT_IN_DATA_LEN 8
#define MC_CMD_DRIVER_EVENT_IN_DATA_LO_OFST 4
+#define MC_CMD_DRIVER_EVENT_IN_DATA_LO_LEN 4
+#define MC_CMD_DRIVER_EVENT_IN_DATA_LO_LBN 32
+#define MC_CMD_DRIVER_EVENT_IN_DATA_LO_WIDTH 32
#define MC_CMD_DRIVER_EVENT_IN_DATA_HI_OFST 8
+#define MC_CMD_DRIVER_EVENT_IN_DATA_HI_LEN 4
+#define MC_CMD_DRIVER_EVENT_IN_DATA_HI_LBN 64
+#define MC_CMD_DRIVER_EVENT_IN_DATA_HI_WIDTH 32
/* MC_CMD_DRIVER_EVENT_OUT msgresponse */
#define MC_CMD_DRIVER_EVENT_OUT_LEN 0
@@ -9760,6 +10999,7 @@
* MC_CMD_SET_FUNC, which remains available for Siena but now deprecated.
*/
#define MC_CMD_PROXY_CMD 0x5b
+#define MC_CMD_PROXY_CMD_MSGSET 0x5b
#undef MC_CMD_0x5b_PRIVILEGE_CTG
#define MC_CMD_0x5b_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -9828,6 +11068,7 @@
* a designated admin function
*/
#define MC_CMD_PROXY_CONFIGURE 0x58
+#define MC_CMD_PROXY_CONFIGURE_MSGSET 0x58
#undef MC_CMD_0x58_PRIVILEGE_CTG
#define MC_CMD_0x58_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -9845,7 +11086,13 @@
#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_OFST 4
#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_LEN 8
#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_LO_OFST 4
+#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_LO_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_LO_LBN 32
+#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_LO_WIDTH 32
#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_HI_OFST 8
+#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_HI_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_HI_LBN 64
+#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_HI_WIDTH 32
/* Must be a power of 2 */
#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BLOCK_SIZE_OFST 12
#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BLOCK_SIZE_LEN 4
@@ -9855,7 +11102,13 @@
#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_OFST 16
#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_LEN 8
#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_LO_OFST 16
+#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_LO_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_LO_LBN 128
+#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_LO_WIDTH 32
#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_HI_OFST 20
+#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_HI_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_HI_LBN 160
+#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_HI_WIDTH 32
/* Must be a power of 2 */
#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BLOCK_SIZE_OFST 24
#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BLOCK_SIZE_LEN 4
@@ -9866,7 +11119,13 @@
#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_OFST 28
#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_LEN 8
#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_LO_OFST 28
+#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_LO_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_LO_LBN 224
+#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_LO_WIDTH 32
#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_HI_OFST 32
+#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_HI_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_HI_LBN 256
+#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_HI_WIDTH 32
/* Must be a power of 2, or zero if this buffer is not provided */
#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BLOCK_SIZE_OFST 36
#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BLOCK_SIZE_LEN 4
@@ -9890,7 +11149,13 @@
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_OFST 4
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_LEN 8
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_LO_OFST 4
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_LO_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_LO_LBN 32
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_LO_WIDTH 32
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_HI_OFST 8
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_HI_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_HI_LBN 64
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_HI_WIDTH 32
/* Must be a power of 2 */
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BLOCK_SIZE_OFST 12
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BLOCK_SIZE_LEN 4
@@ -9900,7 +11165,13 @@
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_OFST 16
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_LEN 8
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_LO_OFST 16
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_LO_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_LO_LBN 128
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_LO_WIDTH 32
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_HI_OFST 20
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_HI_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_HI_LBN 160
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_HI_WIDTH 32
/* Must be a power of 2 */
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BLOCK_SIZE_OFST 24
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BLOCK_SIZE_LEN 4
@@ -9911,7 +11182,13 @@
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_OFST 28
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_LEN 8
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_LO_OFST 28
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_LO_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_LO_LBN 224
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_LO_WIDTH 32
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_HI_OFST 32
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_HI_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_HI_LBN 256
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_HI_WIDTH 32
/* Must be a power of 2, or zero if this buffer is not provided */
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BLOCK_SIZE_OFST 36
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BLOCK_SIZE_LEN 4
@@ -9936,6 +11213,7 @@
* MC_CMD_PROXY_CONFIGURE).
*/
#define MC_CMD_PROXY_COMPLETE 0x5f
+#define MC_CMD_PROXY_COMPLETE_MSGSET 0x5f
#undef MC_CMD_0x5f_PRIVILEGE_CTG
#define MC_CMD_0x5f_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -9974,6 +11252,7 @@
* cannot do so). The buffer table entries will initially be zeroed.
*/
#define MC_CMD_ALLOC_BUFTBL_CHUNK 0x87
+#define MC_CMD_ALLOC_BUFTBL_CHUNK_MSGSET 0x87
#undef MC_CMD_0x87_PRIVILEGE_CTG
#define MC_CMD_0x87_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -10005,6 +11284,7 @@
* Reprogram a set of buffer table entries in the specified chunk.
*/
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES 0x88
+#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_MSGSET 0x88
#undef MC_CMD_0x88_PRIVILEGE_CTG
#define MC_CMD_0x88_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -10027,7 +11307,13 @@
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_OFST 12
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LEN 8
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LO_OFST 12
+#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LO_LEN 4
+#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LO_LBN 96
+#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LO_WIDTH 32
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_HI_OFST 16
+#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_HI_LEN 4
+#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_HI_LBN 128
+#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_HI_WIDTH 32
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_MINNUM 1
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_MAXNUM 32
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_MAXNUM_MCDI2 32
@@ -10040,6 +11326,7 @@
/* MC_CMD_FREE_BUFTBL_CHUNK
*/
#define MC_CMD_FREE_BUFTBL_CHUNK 0x89
+#define MC_CMD_FREE_BUFTBL_CHUNK_MSGSET 0x89
#undef MC_CMD_0x89_PRIVILEGE_CTG
#define MC_CMD_0x89_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -10058,6 +11345,7 @@
* Multiplexed MCDI call for filter operations
*/
#define MC_CMD_FILTER_OP 0x8a
+#define MC_CMD_FILTER_OP_MSGSET 0x8a
#undef MC_CMD_0x8a_PRIVILEGE_CTG
#define MC_CMD_0x8a_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -10083,7 +11371,13 @@
#define MC_CMD_FILTER_OP_IN_HANDLE_OFST 4
#define MC_CMD_FILTER_OP_IN_HANDLE_LEN 8
#define MC_CMD_FILTER_OP_IN_HANDLE_LO_OFST 4
+#define MC_CMD_FILTER_OP_IN_HANDLE_LO_LEN 4
+#define MC_CMD_FILTER_OP_IN_HANDLE_LO_LBN 32
+#define MC_CMD_FILTER_OP_IN_HANDLE_LO_WIDTH 32
#define MC_CMD_FILTER_OP_IN_HANDLE_HI_OFST 8
+#define MC_CMD_FILTER_OP_IN_HANDLE_HI_LEN 4
+#define MC_CMD_FILTER_OP_IN_HANDLE_HI_LBN 64
+#define MC_CMD_FILTER_OP_IN_HANDLE_HI_WIDTH 32
/* The port ID associated with the v-adaptor which should contain this filter.
*/
#define MC_CMD_FILTER_OP_IN_PORT_ID_OFST 12
@@ -10239,7 +11533,13 @@
#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_OFST 4
#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_LEN 8
#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_LO_OFST 4
+#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_LO_LEN 4
+#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_LO_LBN 32
+#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_LO_WIDTH 32
#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_HI_OFST 8
+#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_HI_LEN 4
+#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_HI_LBN 64
+#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_HI_WIDTH 32
/* The port ID associated with the v-adaptor which should contain this filter.
*/
#define MC_CMD_FILTER_OP_EXT_IN_PORT_ID_OFST 12
@@ -10518,7 +11818,13 @@
#define MC_CMD_FILTER_OP_V3_IN_HANDLE_OFST 4
#define MC_CMD_FILTER_OP_V3_IN_HANDLE_LEN 8
#define MC_CMD_FILTER_OP_V3_IN_HANDLE_LO_OFST 4
+#define MC_CMD_FILTER_OP_V3_IN_HANDLE_LO_LEN 4
+#define MC_CMD_FILTER_OP_V3_IN_HANDLE_LO_LBN 32
+#define MC_CMD_FILTER_OP_V3_IN_HANDLE_LO_WIDTH 32
#define MC_CMD_FILTER_OP_V3_IN_HANDLE_HI_OFST 8
+#define MC_CMD_FILTER_OP_V3_IN_HANDLE_HI_LEN 4
+#define MC_CMD_FILTER_OP_V3_IN_HANDLE_HI_LBN 64
+#define MC_CMD_FILTER_OP_V3_IN_HANDLE_HI_WIDTH 32
/* The port ID associated with the v-adaptor which should contain this filter.
*/
#define MC_CMD_FILTER_OP_V3_IN_PORT_ID_OFST 12
@@ -10779,15 +12085,15 @@
*/
#define MC_CMD_FILTER_OP_V3_IN_IFRM_DST_IP_OFST 156
#define MC_CMD_FILTER_OP_V3_IN_IFRM_DST_IP_LEN 16
-/* Flags controlling mutations of the user_mark and user_flag fields of
- * matching packets, with logic as follows: if (req.MATCH_BITOR_FLAG == 1)
- * user_flag = req.MATCH_SET_FLAG bit_or user_flag; else user_flag =
- * req.MATCH_SET_FLAG; if (req.MATCH_SET_MARK == 0) user_mark = 0; else if
- * (req.MATCH_BITOR_MARK == 1) user_mark = req.MATCH_SET_MARK bit_or user_mark;
- * else user_mark = req.MATCH_SET_MARK; N.B. These flags overlap with the
- * MATCH_ACTION field, which is deprecated in favour of this field. For the
- * cases where these flags induce a valid encoding of the MATCH_ACTION field,
- * the semantics agree.
+/* Flags controlling mutations of the packet and/or metadata when the filter is
+ * matched. The user_mark and user_flag fields' logic is as follows: if
+ * (req.MATCH_BITOR_FLAG == 1) user_flag = req.MATCH_SET_FLAG bit_or user_flag;
+ * else user_flag = req.MATCH_SET_FLAG; if (req.MATCH_SET_MARK == 0) user_mark
+ * = 0; else if (req.MATCH_BITOR_MARK == 1) user_mark = req.MATCH_SET_MARK
+ * bit_or user_mark; else user_mark = req.MATCH_SET_MARK; N.B. These flags
+ * overlap with the MATCH_ACTION field, which is deprecated in favour of this
+ * field. For the cases where these flags induce a valid encoding of the
+ * MATCH_ACTION field, the semantics agree.
*/
#define MC_CMD_FILTER_OP_V3_IN_MATCH_ACTION_FLAGS_OFST 172
#define MC_CMD_FILTER_OP_V3_IN_MATCH_ACTION_FLAGS_LEN 4
@@ -10803,6 +12109,9 @@
#define MC_CMD_FILTER_OP_V3_IN_MATCH_BITOR_MARK_OFST 172
#define MC_CMD_FILTER_OP_V3_IN_MATCH_BITOR_MARK_LBN 3
#define MC_CMD_FILTER_OP_V3_IN_MATCH_BITOR_MARK_WIDTH 1
+#define MC_CMD_FILTER_OP_V3_IN_MATCH_STRIP_VLAN_OFST 172
+#define MC_CMD_FILTER_OP_V3_IN_MATCH_STRIP_VLAN_LBN 4
+#define MC_CMD_FILTER_OP_V3_IN_MATCH_STRIP_VLAN_WIDTH 1
/* Deprecated: the overlapping MATCH_ACTION_FLAGS field exposes all of the
* functionality of this field in an ABI-backwards-compatible manner, and
* should be used instead. Any future extensions should be made to the
@@ -10848,7 +12157,13 @@
#define MC_CMD_FILTER_OP_OUT_HANDLE_OFST 4
#define MC_CMD_FILTER_OP_OUT_HANDLE_LEN 8
#define MC_CMD_FILTER_OP_OUT_HANDLE_LO_OFST 4
+#define MC_CMD_FILTER_OP_OUT_HANDLE_LO_LEN 4
+#define MC_CMD_FILTER_OP_OUT_HANDLE_LO_LBN 32
+#define MC_CMD_FILTER_OP_OUT_HANDLE_LO_WIDTH 32
#define MC_CMD_FILTER_OP_OUT_HANDLE_HI_OFST 8
+#define MC_CMD_FILTER_OP_OUT_HANDLE_HI_LEN 4
+#define MC_CMD_FILTER_OP_OUT_HANDLE_HI_LBN 64
+#define MC_CMD_FILTER_OP_OUT_HANDLE_HI_WIDTH 32
/* enum: guaranteed invalid filter handle (low 32 bits) */
#define MC_CMD_FILTER_OP_OUT_HANDLE_LO_INVALID 0xffffffff
/* enum: guaranteed invalid filter handle (high 32 bits) */
@@ -10868,7 +12183,13 @@
#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_OFST 4
#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_LEN 8
#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_LO_OFST 4
+#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_LO_LEN 4
+#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_LO_LBN 32
+#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_LO_WIDTH 32
#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_HI_OFST 8
+#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_HI_LEN 4
+#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_HI_LBN 64
+#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_HI_WIDTH 32
/* Enum values, see field(s): */
/* MC_CMD_FILTER_OP_OUT/HANDLE */
@@ -10878,6 +12199,7 @@
* Get information related to the parser-dispatcher subsystem
*/
#define MC_CMD_GET_PARSER_DISP_INFO 0xe4
+#define MC_CMD_GET_PARSER_DISP_INFO_MSGSET 0xe4
#undef MC_CMD_0xe4_PRIVILEGE_CTG
#define MC_CMD_0xe4_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11025,6 +12347,7 @@
* permitted.
*/
#define MC_CMD_PARSER_DISP_RW 0xe5
+#define MC_CMD_PARSER_DISP_RW_MSGSET 0xe5
#undef MC_CMD_0xe5_PRIVILEGE_CTG
#define MC_CMD_0xe5_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -11115,6 +12438,7 @@
* Get number of PFs on the device.
*/
#define MC_CMD_GET_PF_COUNT 0xb6
+#define MC_CMD_GET_PF_COUNT_MSGSET 0xb6
#undef MC_CMD_0xb6_PRIVILEGE_CTG
#define MC_CMD_0xb6_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11134,6 +12458,7 @@
* Set number of PFs on the device.
*/
#define MC_CMD_SET_PF_COUNT 0xb7
+#define MC_CMD_SET_PF_COUNT_MSGSET 0xb7
/* MC_CMD_SET_PF_COUNT_IN msgrequest */
#define MC_CMD_SET_PF_COUNT_IN_LEN 4
@@ -11150,6 +12475,7 @@
* Get port assignment for current PCI function.
*/
#define MC_CMD_GET_PORT_ASSIGNMENT 0xb8
+#define MC_CMD_GET_PORT_ASSIGNMENT_MSGSET 0xb8
#undef MC_CMD_0xb8_PRIVILEGE_CTG
#define MC_CMD_0xb8_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11175,6 +12501,7 @@
* Set port assignment for current PCI function.
*/
#define MC_CMD_SET_PORT_ASSIGNMENT 0xb9
+#define MC_CMD_SET_PORT_ASSIGNMENT_MSGSET 0xb9
#undef MC_CMD_0xb9_PRIVILEGE_CTG
#define MC_CMD_0xb9_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -11194,6 +12521,7 @@
* Allocate VIs for current PCI function.
*/
#define MC_CMD_ALLOC_VIS 0x8b
+#define MC_CMD_ALLOC_VIS_MSGSET 0x8b
#undef MC_CMD_0x8b_PRIVILEGE_CTG
#define MC_CMD_0x8b_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11241,6 +12569,7 @@
* but not freed.
*/
#define MC_CMD_FREE_VIS 0x8c
+#define MC_CMD_FREE_VIS_MSGSET 0x8c
#undef MC_CMD_0x8c_PRIVILEGE_CTG
#define MC_CMD_0x8c_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11257,6 +12586,7 @@
* Get SRIOV config for this PF.
*/
#define MC_CMD_GET_SRIOV_CFG 0xba
+#define MC_CMD_GET_SRIOV_CFG_MSGSET 0xba
#undef MC_CMD_0xba_PRIVILEGE_CTG
#define MC_CMD_0xba_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11290,6 +12620,7 @@
* Set SRIOV config for this PF.
*/
#define MC_CMD_SET_SRIOV_CFG 0xbb
+#define MC_CMD_SET_SRIOV_CFG_MSGSET 0xbb
#undef MC_CMD_0xbb_PRIVILEGE_CTG
#define MC_CMD_0xbb_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -11325,9 +12656,11 @@
/***********************************/
/* MC_CMD_GET_VI_ALLOC_INFO
* Get information about number of VI's and base VI number allocated to this
- * function.
+ * function. This message is not available to dynamic clients created by
+ * MC_CMD_CLIENT_ALLOC.
*/
#define MC_CMD_GET_VI_ALLOC_INFO 0x8d
+#define MC_CMD_GET_VI_ALLOC_INFO_MSGSET 0x8d
#undef MC_CMD_0x8d_PRIVILEGE_CTG
#define MC_CMD_0x8d_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11352,9 +12685,12 @@
/***********************************/
/* MC_CMD_DUMP_VI_STATE
- * For CmdClient use. Dump pertinent information on a specific absolute VI.
+ * For CmdClient use. Dump pertinent information on a specific absolute VI. The
+ * VI must be owned by the calling client or one of its ancestors; usership of
+ * the VI (as set by MC_CMD_SET_VI_USER) is not sufficient.
*/
#define MC_CMD_DUMP_VI_STATE 0x8e
+#define MC_CMD_DUMP_VI_STATE_MSGSET 0x8e
#undef MC_CMD_0x8e_PRIVILEGE_CTG
#define MC_CMD_0x8e_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11366,7 +12702,7 @@
#define MC_CMD_DUMP_VI_STATE_IN_VI_NUMBER_LEN 4
/* MC_CMD_DUMP_VI_STATE_OUT msgresponse */
-#define MC_CMD_DUMP_VI_STATE_OUT_LEN 96
+#define MC_CMD_DUMP_VI_STATE_OUT_LEN 100
/* The PF part of the function owning this VI. */
#define MC_CMD_DUMP_VI_STATE_OUT_OWNER_PF_OFST 0
#define MC_CMD_DUMP_VI_STATE_OUT_OWNER_PF_LEN 2
@@ -11389,12 +12725,24 @@
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_OFST 12
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_LO_OFST 12
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_LO_LBN 96
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_HI_OFST 16
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_HI_LBN 128
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_HI_WIDTH 32
/* Raw evq timer table data. */
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_OFST 20
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_LO_OFST 20
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_LO_LBN 160
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_HI_OFST 24
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_HI_LBN 192
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_HI_WIDTH 32
/* Combined metadata field. */
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_OFST 28
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_LEN 4
@@ -11411,22 +12759,46 @@
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_OFST 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_LO_OFST 32
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_LO_LBN 256
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_HI_OFST 36
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_HI_LBN 288
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_HI_WIDTH 32
/* TXDPCPU raw table data for queue. */
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_OFST 40
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_LO_OFST 40
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_LO_LBN 320
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_HI_OFST 44
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_HI_LBN 352
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_HI_WIDTH 32
/* TXDPCPU raw table data for queue. */
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_OFST 48
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_LO_OFST 48
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_LO_LBN 384
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_HI_OFST 52
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_HI_LBN 416
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_HI_WIDTH 32
/* Combined metadata field. */
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_OFST 56
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_LO_OFST 56
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_LO_LBN 448
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_HI_OFST 60
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_HI_LBN 480
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_HI_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_BUFS_BASE_OFST 56
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_BUFS_BASE_LBN 0
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_BUFS_BASE_WIDTH 16
@@ -11446,22 +12818,46 @@
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_OFST 64
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_LO_OFST 64
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_LO_LBN 512
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_HI_OFST 68
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_HI_LBN 544
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_HI_WIDTH 32
/* RXDPCPU raw table data for queue. */
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_OFST 72
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_LO_OFST 72
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_LO_LBN 576
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_HI_OFST 76
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_HI_LBN 608
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_HI_WIDTH 32
/* Reserved, currently 0. */
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_OFST 80
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_LO_OFST 80
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_LO_LBN 640
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_HI_OFST 84
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_HI_LBN 672
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_HI_WIDTH 32
/* Combined metadata field. */
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_OFST 88
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_LO_OFST 88
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_LO_LBN 704
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_HI_OFST 92
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_HI_LBN 736
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_HI_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_BUFS_BASE_OFST 88
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_BUFS_BASE_LBN 0
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_BUFS_BASE_WIDTH 16
@@ -11474,6 +12870,9 @@
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_WAITCOUNT_OFST 88
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_WAITCOUNT_LBN 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_WAITCOUNT_WIDTH 8
+/* Current user, as assigned by MC_CMD_SET_VI_USER. */
+#define MC_CMD_DUMP_VI_STATE_OUT_USER_CLIENT_ID_OFST 96
+#define MC_CMD_DUMP_VI_STATE_OUT_USER_CLIENT_ID_LEN 4
/***********************************/
@@ -11481,6 +12880,7 @@
* Allocate a push I/O buffer for later use with a tx queue.
*/
#define MC_CMD_ALLOC_PIOBUF 0x8f
+#define MC_CMD_ALLOC_PIOBUF_MSGSET 0x8f
#undef MC_CMD_0x8f_PRIVILEGE_CTG
#define MC_CMD_0x8f_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -11500,6 +12900,7 @@
* Free a push I/O buffer.
*/
#define MC_CMD_FREE_PIOBUF 0x90
+#define MC_CMD_FREE_PIOBUF_MSGSET 0x90
#undef MC_CMD_0x90_PRIVILEGE_CTG
#define MC_CMD_0x90_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -11516,9 +12917,12 @@
/***********************************/
/* MC_CMD_GET_VI_TLP_PROCESSING
- * Get TLP steering and ordering information for a VI.
+ * Get TLP steering and ordering information for a VI. The caller must have the
+ * GRP_FUNC_DMA privilege and must be the currently-assigned user of this VI or
+ * an ancestor of the current user (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_GET_VI_TLP_PROCESSING 0xb0
+#define MC_CMD_GET_VI_TLP_PROCESSING_MSGSET 0xb0
#undef MC_CMD_0xb0_PRIVILEGE_CTG
#define MC_CMD_0xb0_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11555,9 +12959,12 @@
/***********************************/
/* MC_CMD_SET_VI_TLP_PROCESSING
- * Set TLP steering and ordering information for a VI.
+ * Set TLP steering and ordering information for a VI. The caller must have the
+ * GRP_FUNC_DMA privilege and must be the currently-assigned user of this VI or
+ * an ancestor of the current user (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_SET_VI_TLP_PROCESSING 0xb1
+#define MC_CMD_SET_VI_TLP_PROCESSING_MSGSET 0xb1
#undef MC_CMD_0xb1_PRIVILEGE_CTG
#define MC_CMD_0xb1_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11597,6 +13004,7 @@
* Get global PCIe steering and transaction processing configuration.
*/
#define MC_CMD_GET_TLP_PROCESSING_GLOBALS 0xbc
+#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_MSGSET 0xbc
#undef MC_CMD_0xbc_PRIVILEGE_CTG
#define MC_CMD_0xbc_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -11681,6 +13089,7 @@
* Set global PCIe steering and transaction processing configuration.
*/
#define MC_CMD_SET_TLP_PROCESSING_GLOBALS 0xbd
+#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_MSGSET 0xbd
#undef MC_CMD_0xbd_PRIVILEGE_CTG
#define MC_CMD_0xbd_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -11746,6 +13155,7 @@
* Download a new set of images to the satellite CPUs from the host.
*/
#define MC_CMD_SATELLITE_DOWNLOAD 0x91
+#define MC_CMD_SATELLITE_DOWNLOAD_MSGSET 0x91
#undef MC_CMD_0x91_PRIVILEGE_CTG
#define MC_CMD_0x91_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -11873,6 +13283,7 @@
* reference inherent device capabilities as opposed to current NVRAM config.
*/
#define MC_CMD_GET_CAPABILITIES 0xbe
+#define MC_CMD_GET_CAPABILITIES_MSGSET 0xbe
#undef MC_CMD_0xbe_PRIVILEGE_CTG
#define MC_CMD_0xbe_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -14813,6 +16224,18 @@
#define MC_CMD_GET_CAPABILITIES_V7_OUT_UNSOL_EV_CREDIT_SUPPORTED_OFST 148
#define MC_CMD_GET_CAPABILITIES_V7_OUT_UNSOL_EV_CREDIT_SUPPORTED_LBN 7
#define MC_CMD_GET_CAPABILITIES_V7_OUT_UNSOL_EV_CREDIT_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_ENCAPSULATED_MCDI_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_ENCAPSULATED_MCDI_SUPPORTED_LBN 8
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_ENCAPSULATED_MCDI_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_EXTERNAL_MAE_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_EXTERNAL_MAE_SUPPORTED_LBN 9
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_EXTERNAL_MAE_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_LBN 10
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_LBN 11
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_WIDTH 1
/* MC_CMD_GET_CAPABILITIES_V8_OUT msgresponse */
#define MC_CMD_GET_CAPABILITIES_V8_OUT_LEN 160
@@ -15299,6 +16722,18 @@
#define MC_CMD_GET_CAPABILITIES_V8_OUT_UNSOL_EV_CREDIT_SUPPORTED_OFST 148
#define MC_CMD_GET_CAPABILITIES_V8_OUT_UNSOL_EV_CREDIT_SUPPORTED_LBN 7
#define MC_CMD_GET_CAPABILITIES_V8_OUT_UNSOL_EV_CREDIT_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_ENCAPSULATED_MCDI_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_ENCAPSULATED_MCDI_SUPPORTED_LBN 8
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_ENCAPSULATED_MCDI_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_EXTERNAL_MAE_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_EXTERNAL_MAE_SUPPORTED_LBN 9
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_EXTERNAL_MAE_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_LBN 10
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_LBN 11
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_WIDTH 1
/* These bits are reserved for communicating test-specific capabilities to
* host-side test software. All production drivers should treat this field as
* opaque.
@@ -15306,7 +16741,13 @@
#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_OFST 152
#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_LEN 8
#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_LO_OFST 152
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_LO_LEN 4
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_LO_LBN 1216
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_LO_WIDTH 32
#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_HI_OFST 156
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_HI_LEN 4
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_HI_LBN 1248
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_HI_WIDTH 32
/* MC_CMD_GET_CAPABILITIES_V9_OUT msgresponse */
#define MC_CMD_GET_CAPABILITIES_V9_OUT_LEN 184
@@ -15793,6 +17234,18 @@
#define MC_CMD_GET_CAPABILITIES_V9_OUT_UNSOL_EV_CREDIT_SUPPORTED_OFST 148
#define MC_CMD_GET_CAPABILITIES_V9_OUT_UNSOL_EV_CREDIT_SUPPORTED_LBN 7
#define MC_CMD_GET_CAPABILITIES_V9_OUT_UNSOL_EV_CREDIT_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_ENCAPSULATED_MCDI_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_ENCAPSULATED_MCDI_SUPPORTED_LBN 8
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_ENCAPSULATED_MCDI_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_EXTERNAL_MAE_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_EXTERNAL_MAE_SUPPORTED_LBN 9
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_EXTERNAL_MAE_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_LBN 10
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_LBN 11
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_WIDTH 1
/* These bits are reserved for communicating test-specific capabilities to
* host-side test software. All production drivers should treat this field as
* opaque.
@@ -15800,7 +17253,13 @@
#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_OFST 152
#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_LEN 8
#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_LO_OFST 152
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_LO_LEN 4
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_LO_LBN 1216
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_LO_WIDTH 32
#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_HI_OFST 156
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_HI_LEN 4
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_HI_LBN 1248
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_HI_WIDTH 32
/* The minimum size (in table entries) of indirection table to be allocated
* from the pool for an RSS context. Note that the table size used must be a
* power of 2.
@@ -16322,6 +17781,18 @@
#define MC_CMD_GET_CAPABILITIES_V10_OUT_UNSOL_EV_CREDIT_SUPPORTED_OFST 148
#define MC_CMD_GET_CAPABILITIES_V10_OUT_UNSOL_EV_CREDIT_SUPPORTED_LBN 7
#define MC_CMD_GET_CAPABILITIES_V10_OUT_UNSOL_EV_CREDIT_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_ENCAPSULATED_MCDI_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_ENCAPSULATED_MCDI_SUPPORTED_LBN 8
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_ENCAPSULATED_MCDI_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_EXTERNAL_MAE_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_EXTERNAL_MAE_SUPPORTED_LBN 9
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_EXTERNAL_MAE_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_LBN 10
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_LBN 11
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_WIDTH 1
/* These bits are reserved for communicating test-specific capabilities to
* host-side test software. All production drivers should treat this field as
* opaque.
@@ -16329,7 +17800,13 @@
#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_OFST 152
#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_LEN 8
#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_LO_OFST 152
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_LO_LEN 4
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_LO_LBN 1216
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_LO_WIDTH 32
#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_HI_OFST 156
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_HI_LEN 4
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_HI_LBN 1248
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_HI_WIDTH 32
/* The minimum size (in table entries) of indirection table to be allocated
* from the pool for an RSS context. Note that the table size used must be a
* power of 2.
@@ -16386,6 +17863,7 @@
* Encapsulation for a v2 extended command
*/
#define MC_CMD_V2_EXTN 0x7f
+#define MC_CMD_V2_EXTN_MSGSET 0x7f
/* MC_CMD_V2_EXTN_IN msgrequest */
#define MC_CMD_V2_EXTN_IN_LEN 4
@@ -16417,6 +17895,7 @@
* Allocate a pacer bucket (for qau rp or a snapper test)
*/
#define MC_CMD_TCM_BUCKET_ALLOC 0xb2
+#define MC_CMD_TCM_BUCKET_ALLOC_MSGSET 0xb2
#undef MC_CMD_0xb2_PRIVILEGE_CTG
#define MC_CMD_0xb2_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16436,6 +17915,7 @@
* Free a pacer bucket
*/
#define MC_CMD_TCM_BUCKET_FREE 0xb3
+#define MC_CMD_TCM_BUCKET_FREE_MSGSET 0xb3
#undef MC_CMD_0xb3_PRIVILEGE_CTG
#define MC_CMD_0xb3_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16455,6 +17935,7 @@
* Initialise pacer bucket with a given rate
*/
#define MC_CMD_TCM_BUCKET_INIT 0xb4
+#define MC_CMD_TCM_BUCKET_INIT_MSGSET 0xb4
#undef MC_CMD_0xb4_PRIVILEGE_CTG
#define MC_CMD_0xb4_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16489,6 +17970,7 @@
* Initialise txq in pacer with given options or set options
*/
#define MC_CMD_TCM_TXQ_INIT 0xb5
+#define MC_CMD_TCM_TXQ_INIT_MSGSET 0xb5
#undef MC_CMD_0xb5_PRIVILEGE_CTG
#define MC_CMD_0xb5_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16579,6 +18061,7 @@
* Link a push I/O buffer to a TxQ
*/
#define MC_CMD_LINK_PIOBUF 0x92
+#define MC_CMD_LINK_PIOBUF_MSGSET 0x92
#undef MC_CMD_0x92_PRIVILEGE_CTG
#define MC_CMD_0x92_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -16588,7 +18071,7 @@
/* Handle for allocated push I/O buffer. */
#define MC_CMD_LINK_PIOBUF_IN_PIOBUF_HANDLE_OFST 0
#define MC_CMD_LINK_PIOBUF_IN_PIOBUF_HANDLE_LEN 4
-/* Function Local Instance (VI) number. */
+/* Function Local Instance (VI) number which has a TxQ allocated to it. */
#define MC_CMD_LINK_PIOBUF_IN_TXQ_INSTANCE_OFST 4
#define MC_CMD_LINK_PIOBUF_IN_TXQ_INSTANCE_LEN 4
@@ -16601,6 +18084,7 @@
* Unlink a push I/O buffer from a TxQ
*/
#define MC_CMD_UNLINK_PIOBUF 0x93
+#define MC_CMD_UNLINK_PIOBUF_MSGSET 0x93
#undef MC_CMD_0x93_PRIVILEGE_CTG
#define MC_CMD_0x93_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -16620,6 +18104,7 @@
* allocate and initialise a v-switch.
*/
#define MC_CMD_VSWITCH_ALLOC 0x94
+#define MC_CMD_VSWITCH_ALLOC_MSGSET 0x94
#undef MC_CMD_0x94_PRIVILEGE_CTG
#define MC_CMD_0x94_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16667,6 +18152,7 @@
* de-allocate a v-switch.
*/
#define MC_CMD_VSWITCH_FREE 0x95
+#define MC_CMD_VSWITCH_FREE_MSGSET 0x95
#undef MC_CMD_0x95_PRIVILEGE_CTG
#define MC_CMD_0x95_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16688,6 +18174,7 @@
* not, then the command returns ENOENT).
*/
#define MC_CMD_VSWITCH_QUERY 0x63
+#define MC_CMD_VSWITCH_QUERY_MSGSET 0x63
#undef MC_CMD_0x63_PRIVILEGE_CTG
#define MC_CMD_0x63_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16707,6 +18194,7 @@
* allocate a v-port.
*/
#define MC_CMD_VPORT_ALLOC 0x96
+#define MC_CMD_VPORT_ALLOC_MSGSET 0x96
#undef MC_CMD_0x96_PRIVILEGE_CTG
#define MC_CMD_0x96_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16774,6 +18262,7 @@
* de-allocate a v-port.
*/
#define MC_CMD_VPORT_FREE 0x97
+#define MC_CMD_VPORT_FREE_MSGSET 0x97
#undef MC_CMD_0x97_PRIVILEGE_CTG
#define MC_CMD_0x97_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16793,6 +18282,7 @@
* allocate a v-adaptor.
*/
#define MC_CMD_VADAPTOR_ALLOC 0x98
+#define MC_CMD_VADAPTOR_ALLOC_MSGSET 0x98
#undef MC_CMD_0x98_PRIVILEGE_CTG
#define MC_CMD_0x98_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16841,6 +18331,7 @@
* de-allocate a v-adaptor.
*/
#define MC_CMD_VADAPTOR_FREE 0x99
+#define MC_CMD_VADAPTOR_FREE_MSGSET 0x99
#undef MC_CMD_0x99_PRIVILEGE_CTG
#define MC_CMD_0x99_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16860,6 +18351,7 @@
* assign a new MAC address to a v-adaptor.
*/
#define MC_CMD_VADAPTOR_SET_MAC 0x5d
+#define MC_CMD_VADAPTOR_SET_MAC_MSGSET 0x5d
#undef MC_CMD_0x5d_PRIVILEGE_CTG
#define MC_CMD_0x5d_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16882,6 +18374,7 @@
* read the MAC address assigned to a v-adaptor.
*/
#define MC_CMD_VADAPTOR_GET_MAC 0x5e
+#define MC_CMD_VADAPTOR_GET_MAC_MSGSET 0x5e
#undef MC_CMD_0x5e_PRIVILEGE_CTG
#define MC_CMD_0x5e_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16904,6 +18397,7 @@
* read some config of v-adaptor.
*/
#define MC_CMD_VADAPTOR_QUERY 0x61
+#define MC_CMD_VADAPTOR_QUERY_MSGSET 0x61
#undef MC_CMD_0x61_PRIVILEGE_CTG
#define MC_CMD_0x61_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16932,6 +18426,7 @@
* assign a port to a PCI function.
*/
#define MC_CMD_EVB_PORT_ASSIGN 0x9a
+#define MC_CMD_EVB_PORT_ASSIGN_MSGSET 0x9a
#undef MC_CMD_0x9a_PRIVILEGE_CTG
#define MC_CMD_0x9a_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16960,6 +18455,7 @@
* Assign the 64 bit region addresses.
*/
#define MC_CMD_RDWR_A64_REGIONS 0x9b
+#define MC_CMD_RDWR_A64_REGIONS_MSGSET 0x9b
#undef MC_CMD_0x9b_PRIVILEGE_CTG
#define MC_CMD_0x9b_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -16999,6 +18495,7 @@
* Allocate an Onload stack ID.
*/
#define MC_CMD_ONLOAD_STACK_ALLOC 0x9c
+#define MC_CMD_ONLOAD_STACK_ALLOC_MSGSET 0x9c
#undef MC_CMD_0x9c_PRIVILEGE_CTG
#define MC_CMD_0x9c_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -17021,6 +18518,7 @@
* Free an Onload stack ID.
*/
#define MC_CMD_ONLOAD_STACK_FREE 0x9d
+#define MC_CMD_ONLOAD_STACK_FREE_MSGSET 0x9d
#undef MC_CMD_0x9d_PRIVILEGE_CTG
#define MC_CMD_0x9d_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -17040,6 +18538,7 @@
* Allocate an RSS context.
*/
#define MC_CMD_RSS_CONTEXT_ALLOC 0x9e
+#define MC_CMD_RSS_CONTEXT_ALLOC_MSGSET 0x9e
#undef MC_CMD_0x9e_PRIVILEGE_CTG
#define MC_CMD_0x9e_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17140,6 +18639,7 @@
* Free an RSS context.
*/
#define MC_CMD_RSS_CONTEXT_FREE 0x9f
+#define MC_CMD_RSS_CONTEXT_FREE_MSGSET 0x9f
#undef MC_CMD_0x9f_PRIVILEGE_CTG
#define MC_CMD_0x9f_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17159,6 +18659,7 @@
* Set the Toeplitz hash key for an RSS context.
*/
#define MC_CMD_RSS_CONTEXT_SET_KEY 0xa0
+#define MC_CMD_RSS_CONTEXT_SET_KEY_MSGSET 0xa0
#undef MC_CMD_0xa0_PRIVILEGE_CTG
#define MC_CMD_0xa0_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17181,6 +18682,7 @@
* Get the Toeplitz hash key for an RSS context.
*/
#define MC_CMD_RSS_CONTEXT_GET_KEY 0xa1
+#define MC_CMD_RSS_CONTEXT_GET_KEY_MSGSET 0xa1
#undef MC_CMD_0xa1_PRIVILEGE_CTG
#define MC_CMD_0xa1_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17205,6 +18707,7 @@
* when the RSS context is allocated without specifying a table size.
*/
#define MC_CMD_RSS_CONTEXT_SET_TABLE 0xa2
+#define MC_CMD_RSS_CONTEXT_SET_TABLE_MSGSET 0xa2
#undef MC_CMD_0xa2_PRIVILEGE_CTG
#define MC_CMD_0xa2_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17229,6 +18732,7 @@
* when the RSS context is allocated without specifying a table size.
*/
#define MC_CMD_RSS_CONTEXT_GET_TABLE 0xa3
+#define MC_CMD_RSS_CONTEXT_GET_TABLE_MSGSET 0xa3
#undef MC_CMD_0xa3_PRIVILEGE_CTG
#define MC_CMD_0xa3_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17253,6 +18757,7 @@
* RSS_SELECTABLE_TABLE_SIZE bit is set in MC_CMD_GET_CAPABILITIES.
*/
#define MC_CMD_RSS_CONTEXT_WRITE_TABLE 0x13e
+#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_MSGSET 0x13e
#undef MC_CMD_0x13e_PRIVILEGE_CTG
#define MC_CMD_0x13e_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17299,6 +18804,7 @@
* RSS_SELECTABLE_TABLE_SIZE bit is set in MC_CMD_GET_CAPABILITIES.
*/
#define MC_CMD_RSS_CONTEXT_READ_TABLE 0x13f
+#define MC_CMD_RSS_CONTEXT_READ_TABLE_MSGSET 0x13f
#undef MC_CMD_0x13f_PRIVILEGE_CTG
#define MC_CMD_0x13f_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17338,6 +18844,7 @@
* Set various control flags for an RSS context.
*/
#define MC_CMD_RSS_CONTEXT_SET_FLAGS 0xe1
+#define MC_CMD_RSS_CONTEXT_SET_FLAGS_MSGSET 0xe1
#undef MC_CMD_0xe1_PRIVILEGE_CTG
#define MC_CMD_0xe1_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17404,6 +18911,7 @@
* Get various control flags for an RSS context.
*/
#define MC_CMD_RSS_CONTEXT_GET_FLAGS 0xe2
+#define MC_CMD_RSS_CONTEXT_GET_FLAGS_MSGSET 0xe2
#undef MC_CMD_0xe2_PRIVILEGE_CTG
#define MC_CMD_0xe2_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17471,6 +18979,7 @@
* Allocate a .1p mapping.
*/
#define MC_CMD_DOT1P_MAPPING_ALLOC 0xa4
+#define MC_CMD_DOT1P_MAPPING_ALLOC_MSGSET 0xa4
#undef MC_CMD_0xa4_PRIVILEGE_CTG
#define MC_CMD_0xa4_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -17504,6 +19013,7 @@
* Free a .1p mapping.
*/
#define MC_CMD_DOT1P_MAPPING_FREE 0xa5
+#define MC_CMD_DOT1P_MAPPING_FREE_MSGSET 0xa5
#undef MC_CMD_0xa5_PRIVILEGE_CTG
#define MC_CMD_0xa5_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -17523,6 +19033,7 @@
* Set the mapping table for a .1p mapping.
*/
#define MC_CMD_DOT1P_MAPPING_SET_TABLE 0xa6
+#define MC_CMD_DOT1P_MAPPING_SET_TABLE_MSGSET 0xa6
#undef MC_CMD_0xa6_PRIVILEGE_CTG
#define MC_CMD_0xa6_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -17547,6 +19058,7 @@
* Get the mapping table for a .1p mapping.
*/
#define MC_CMD_DOT1P_MAPPING_GET_TABLE 0xa7
+#define MC_CMD_DOT1P_MAPPING_GET_TABLE_MSGSET 0xa7
#undef MC_CMD_0xa7_PRIVILEGE_CTG
#define MC_CMD_0xa7_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -17571,6 +19083,7 @@
* Get Interrupt Vector config for this PF.
*/
#define MC_CMD_GET_VECTOR_CFG 0xbf
+#define MC_CMD_GET_VECTOR_CFG_MSGSET 0xbf
#undef MC_CMD_0xbf_PRIVILEGE_CTG
#define MC_CMD_0xbf_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17596,6 +19109,7 @@
* Set Interrupt Vector config for this PF.
*/
#define MC_CMD_SET_VECTOR_CFG 0xc0
+#define MC_CMD_SET_VECTOR_CFG_MSGSET 0xc0
#undef MC_CMD_0xc0_PRIVILEGE_CTG
#define MC_CMD_0xc0_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17623,6 +19137,7 @@
* Add a MAC address to a v-port
*/
#define MC_CMD_VPORT_ADD_MAC_ADDRESS 0xa8
+#define MC_CMD_VPORT_ADD_MAC_ADDRESS_MSGSET 0xa8
#undef MC_CMD_0xa8_PRIVILEGE_CTG
#define MC_CMD_0xa8_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17645,6 +19160,7 @@
* Delete a MAC address from a v-port
*/
#define MC_CMD_VPORT_DEL_MAC_ADDRESS 0xa9
+#define MC_CMD_VPORT_DEL_MAC_ADDRESS_MSGSET 0xa9
#undef MC_CMD_0xa9_PRIVILEGE_CTG
#define MC_CMD_0xa9_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17667,6 +19183,7 @@
* Delete a MAC address from a v-port
*/
#define MC_CMD_VPORT_GET_MAC_ADDRESSES 0xaa
+#define MC_CMD_VPORT_GET_MAC_ADDRESSES_MSGSET 0xaa
#undef MC_CMD_0xaa_PRIVILEGE_CTG
#define MC_CMD_0xaa_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17701,6 +19218,7 @@
* function will be reset before applying the changes.
*/
#define MC_CMD_VPORT_RECONFIGURE 0xeb
+#define MC_CMD_VPORT_RECONFIGURE_MSGSET 0xeb
#undef MC_CMD_0xeb_PRIVILEGE_CTG
#define MC_CMD_0xeb_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17756,6 +19274,7 @@
* read some config of v-port.
*/
#define MC_CMD_EVB_PORT_QUERY 0x62
+#define MC_CMD_EVB_PORT_QUERY_MSGSET 0x62
#undef MC_CMD_0x62_PRIVILEGE_CTG
#define MC_CMD_0x62_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17786,6 +19305,7 @@
* lifted in future.
*/
#define MC_CMD_DUMP_BUFTBL_ENTRIES 0xab
+#define MC_CMD_DUMP_BUFTBL_ENTRIES_MSGSET 0xab
#undef MC_CMD_0xab_PRIVILEGE_CTG
#define MC_CMD_0xab_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -17818,6 +19338,7 @@
* Set global RXDP configuration settings
*/
#define MC_CMD_SET_RXDP_CONFIG 0xc1
+#define MC_CMD_SET_RXDP_CONFIG_MSGSET 0xc1
#undef MC_CMD_0xc1_PRIVILEGE_CTG
#define MC_CMD_0xc1_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -17848,6 +19369,7 @@
* Get global RXDP configuration settings
*/
#define MC_CMD_GET_RXDP_CONFIG 0xc2
+#define MC_CMD_GET_RXDP_CONFIG_MSGSET 0xc2
#undef MC_CMD_0xc2_PRIVILEGE_CTG
#define MC_CMD_0xc2_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17874,6 +19396,7 @@
* Return the system and PDCPU clock frequencies.
*/
#define MC_CMD_GET_CLOCK 0xac
+#define MC_CMD_GET_CLOCK_MSGSET 0xac
#undef MC_CMD_0xac_PRIVILEGE_CTG
#define MC_CMD_0xac_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17896,6 +19419,7 @@
* Control the system and DPCPU clock frequencies. Changes are lost reboot.
*/
#define MC_CMD_SET_CLOCK 0xad
+#define MC_CMD_SET_CLOCK_MSGSET 0xad
#undef MC_CMD_0xad_PRIVILEGE_CTG
#define MC_CMD_0xad_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -17982,6 +19506,7 @@
* Send an arbitrary DPCPU message.
*/
#define MC_CMD_DPCPU_RPC 0xae
+#define MC_CMD_DPCPU_RPC_MSGSET 0xae
#undef MC_CMD_0xae_PRIVILEGE_CTG
#define MC_CMD_0xae_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -18100,6 +19625,7 @@
* Trigger an interrupt by prodding the BIU.
*/
#define MC_CMD_TRIGGER_INTERRUPT 0xe3
+#define MC_CMD_TRIGGER_INTERRUPT_MSGSET 0xe3
#undef MC_CMD_0xe3_PRIVILEGE_CTG
#define MC_CMD_0xe3_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -18119,6 +19645,7 @@
* Special operations to support (for now) shmboot.
*/
#define MC_CMD_SHMBOOT_OP 0xe6
+#define MC_CMD_SHMBOOT_OP_MSGSET 0xe6
#undef MC_CMD_0xe6_PRIVILEGE_CTG
#define MC_CMD_0xe6_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -18140,6 +19667,7 @@
* Read multiple 64bit words from capture block memory
*/
#define MC_CMD_CAP_BLK_READ 0xe7
+#define MC_CMD_CAP_BLK_READ_MSGSET 0xe7
#undef MC_CMD_0xe7_PRIVILEGE_CTG
#define MC_CMD_0xe7_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -18162,7 +19690,13 @@
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_OFST 0
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_LEN 8
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_LO_OFST 0
+#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_LO_LEN 4
+#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_LO_LBN 0
+#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_LO_WIDTH 32
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_HI_OFST 4
+#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_HI_LEN 4
+#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_HI_LBN 32
+#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_HI_WIDTH 32
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_MINNUM 1
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_MAXNUM 31
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_MAXNUM_MCDI2 127
@@ -18173,6 +19707,7 @@
* Take a dump of the DUT state
*/
#define MC_CMD_DUMP_DO 0xe8
+#define MC_CMD_DUMP_DO_MSGSET 0xe8
#undef MC_CMD_0xe8_PRIVILEGE_CTG
#define MC_CMD_0xe8_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -18253,6 +19788,7 @@
* Configure unsolicited dumps
*/
#define MC_CMD_DUMP_CONFIGURE_UNSOLICITED 0xe9
+#define MC_CMD_DUMP_CONFIGURE_UNSOLICITED_MSGSET 0xe9
#undef MC_CMD_0xe9_PRIVILEGE_CTG
#define MC_CMD_0xe9_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -18322,6 +19858,7 @@
* the parameter is out of range.
*/
#define MC_CMD_SET_PSU 0xea
+#define MC_CMD_SET_PSU_MSGSET 0xea
#undef MC_CMD_0xea_PRIVILEGE_CTG
#define MC_CMD_0xea_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -18348,6 +19885,7 @@
* Get function information. PF and VF number.
*/
#define MC_CMD_GET_FUNCTION_INFO 0xec
+#define MC_CMD_GET_FUNCTION_INFO_MSGSET 0xec
#undef MC_CMD_0xec_PRIVILEGE_CTG
#define MC_CMD_0xec_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -18370,6 +19908,7 @@
* reboot.
*/
#define MC_CMD_ENABLE_OFFLINE_BIST 0xed
+#define MC_CMD_ENABLE_OFFLINE_BIST_MSGSET 0xed
#undef MC_CMD_0xed_PRIVILEGE_CTG
#define MC_CMD_0xed_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -18388,6 +19927,7 @@
* forget.
*/
#define MC_CMD_UART_SEND_DATA 0xee
+#define MC_CMD_UART_SEND_DATA_MSGSET 0xee
#undef MC_CMD_0xee_PRIVILEGE_CTG
#define MC_CMD_0xee_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -18426,6 +19966,7 @@
* subject to change and not currently implemented.
*/
#define MC_CMD_UART_RECV_DATA 0xef
+#define MC_CMD_UART_RECV_DATA_MSGSET 0xef
#undef MC_CMD_0xef_PRIVILEGE_CTG
#define MC_CMD_0xef_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -18475,6 +20016,7 @@
* Read data programmed into the device One-Time-Programmable (OTP) Fuses
*/
#define MC_CMD_READ_FUSES 0xf0
+#define MC_CMD_READ_FUSES_MSGSET 0xf0
#undef MC_CMD_0xf0_PRIVILEGE_CTG
#define MC_CMD_0xf0_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -18510,6 +20052,7 @@
* Get or set KR Serdes RXEQ and TX Driver settings
*/
#define MC_CMD_KR_TUNE 0xf1
+#define MC_CMD_KR_TUNE_MSGSET 0xf1
#undef MC_CMD_0xf1_PRIVILEGE_CTG
#define MC_CMD_0xf1_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -19066,6 +20609,7 @@
* Get or set PCIE Serdes RXEQ and TX Driver settings
*/
#define MC_CMD_PCIE_TUNE 0xf2
+#define MC_CMD_PCIE_TUNE_MSGSET 0xf2
#undef MC_CMD_0xf2_PRIVILEGE_CTG
#define MC_CMD_0xf2_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -19323,6 +20867,7 @@
* - not used for V3 licensing
*/
#define MC_CMD_LICENSING 0xf3
+#define MC_CMD_LICENSING_MSGSET 0xf3
#undef MC_CMD_0xf3_PRIVILEGE_CTG
#define MC_CMD_0xf3_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19379,6 +20924,7 @@
* - V3 licensing (Medford)
*/
#define MC_CMD_LICENSING_V3 0xd0
+#define MC_CMD_LICENSING_V3_MSGSET 0xd0
#undef MC_CMD_0xd0_PRIVILEGE_CTG
#define MC_CMD_0xd0_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19429,7 +20975,13 @@
#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_OFST 24
#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_LEN 8
#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_LO_OFST 24
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_LO_LEN 4
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_LO_LBN 192
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_LO_WIDTH 32
#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_HI_OFST 28
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_HI_LEN 4
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_HI_LBN 224
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_HI_WIDTH 32
/* reserved for future use */
#define MC_CMD_LICENSING_V3_OUT_RESERVED_0_OFST 32
#define MC_CMD_LICENSING_V3_OUT_RESERVED_0_LEN 24
@@ -19437,7 +20989,13 @@
#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_OFST 56
#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_LEN 8
#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_LO_OFST 56
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_LO_LEN 4
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_LO_LBN 448
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_LO_WIDTH 32
#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_HI_OFST 60
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_HI_LEN 4
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_HI_LBN 480
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_HI_WIDTH 32
/* reserved for future use */
#define MC_CMD_LICENSING_V3_OUT_RESERVED_1_OFST 64
#define MC_CMD_LICENSING_V3_OUT_RESERVED_1_LEN 24
@@ -19449,6 +21007,7 @@
* partition - V3 licensing (Medford)
*/
#define MC_CMD_LICENSING_GET_ID_V3 0xd1
+#define MC_CMD_LICENSING_GET_ID_V3_MSGSET 0xd1
#undef MC_CMD_0xd1_PRIVILEGE_CTG
#define MC_CMD_0xd1_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19482,6 +21041,7 @@
* This will fail on a single-core system.
*/
#define MC_CMD_MC2MC_PROXY 0xf4
+#define MC_CMD_MC2MC_PROXY_MSGSET 0xf4
#undef MC_CMD_0xf4_PRIVILEGE_CTG
#define MC_CMD_0xf4_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19500,6 +21060,7 @@
* or a reboot of the MC.) Not used for V3 licensing
*/
#define MC_CMD_GET_LICENSED_APP_STATE 0xf5
+#define MC_CMD_GET_LICENSED_APP_STATE_MSGSET 0xf5
#undef MC_CMD_0xf5_PRIVILEGE_CTG
#define MC_CMD_0xf5_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19528,6 +21089,7 @@
* operation or a reboot of the MC.) Used for V3 licensing (Medford)
*/
#define MC_CMD_GET_LICENSED_V3_APP_STATE 0xd2
+#define MC_CMD_GET_LICENSED_V3_APP_STATE_MSGSET 0xd2
#undef MC_CMD_0xd2_PRIVILEGE_CTG
#define MC_CMD_0xd2_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19540,7 +21102,13 @@
#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_OFST 0
#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_LEN 8
#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_LO_OFST 0
+#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_LO_LEN 4
+#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_LO_LBN 0
+#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_LO_WIDTH 32
#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_HI_OFST 4
+#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_HI_LEN 4
+#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_HI_LBN 32
+#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_HI_WIDTH 32
/* MC_CMD_GET_LICENSED_V3_APP_STATE_OUT msgresponse */
#define MC_CMD_GET_LICENSED_V3_APP_STATE_OUT_LEN 4
@@ -19560,6 +21128,7 @@
* operation or a reboot of the MC.) Used for V3 licensing (Medford)
*/
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES 0xd3
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_MSGSET 0xd3
#undef MC_CMD_0xd3_PRIVILEGE_CTG
#define MC_CMD_0xd3_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19572,7 +21141,13 @@
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_OFST 0
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_LEN 8
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_LO_OFST 0
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_LO_LEN 4
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_LO_LBN 0
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_LO_WIDTH 32
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_HI_OFST 4
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_HI_LEN 4
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_HI_LBN 32
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_HI_WIDTH 32
/* MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT msgresponse */
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_LEN 8
@@ -19580,7 +21155,13 @@
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_OFST 0
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_LEN 8
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_LO_OFST 0
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_LO_LEN 4
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_LO_LBN 0
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_LO_WIDTH 32
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_HI_OFST 4
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_HI_LEN 4
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_HI_LBN 32
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_HI_WIDTH 32
/***********************************/
@@ -19589,6 +21170,7 @@
* licensing.
*/
#define MC_CMD_LICENSED_APP_OP 0xf6
+#define MC_CMD_LICENSED_APP_OP_MSGSET 0xf6
#undef MC_CMD_0xf6_PRIVILEGE_CTG
#define MC_CMD_0xf6_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19672,6 +21254,7 @@
* (Medford)
*/
#define MC_CMD_LICENSED_V3_VALIDATE_APP 0xd4
+#define MC_CMD_LICENSED_V3_VALIDATE_APP_MSGSET 0xd4
#undef MC_CMD_0xd4_PRIVILEGE_CTG
#define MC_CMD_0xd4_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19685,7 +21268,13 @@
#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_OFST 48
#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_LEN 8
#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_LO_OFST 48
+#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_LO_LEN 4
+#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_LO_LBN 384
+#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_LO_WIDTH 32
#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_HI_OFST 52
+#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_HI_LEN 4
+#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_HI_LBN 416
+#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_HI_WIDTH 32
/* MC_CMD_LICENSED_V3_VALIDATE_APP_OUT msgresponse */
#define MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_LEN 116
@@ -19725,6 +21314,7 @@
* Mask features - V3 licensing (Medford)
*/
#define MC_CMD_LICENSED_V3_MASK_FEATURES 0xd5
+#define MC_CMD_LICENSED_V3_MASK_FEATURES_MSGSET 0xd5
#undef MC_CMD_0xd5_PRIVILEGE_CTG
#define MC_CMD_0xd5_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -19735,7 +21325,13 @@
#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_OFST 0
#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_LEN 8
#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_LO_OFST 0
+#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_LO_LEN 4
+#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_LO_LBN 0
+#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_LO_WIDTH 32
#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_HI_OFST 4
+#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_HI_LEN 4
+#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_HI_LBN 32
+#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_HI_WIDTH 32
/* whether to turn on or turn off the masked features */
#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_FLAG_OFST 8
#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_FLAG_LEN 4
@@ -19757,6 +21353,7 @@
* erased when the adapter is power cycled
*/
#define MC_CMD_LICENSING_V3_TEMPORARY 0xd6
+#define MC_CMD_LICENSING_V3_TEMPORARY_MSGSET 0xd6
#undef MC_CMD_0xd6_PRIVILEGE_CTG
#define MC_CMD_0xd6_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -19815,7 +21412,13 @@
#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_OFST 4
#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_LEN 8
#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_LO_OFST 4
+#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_LO_LEN 4
+#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_LO_LBN 32
+#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_LO_WIDTH 32
#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_HI_OFST 8
+#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_HI_LEN 4
+#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_HI_LBN 64
+#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_HI_WIDTH 32
/***********************************/
@@ -19827,6 +21430,7 @@
* delivered to a specific queue, or a set of queues with RSS.
*/
#define MC_CMD_SET_PORT_SNIFF_CONFIG 0xf7
+#define MC_CMD_SET_PORT_SNIFF_CONFIG_MSGSET 0xf7
#undef MC_CMD_0xf7_PRIVILEGE_CTG
#define MC_CMD_0xf7_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -19870,6 +21474,7 @@
* the configuration.
*/
#define MC_CMD_GET_PORT_SNIFF_CONFIG 0xf8
+#define MC_CMD_GET_PORT_SNIFF_CONFIG_MSGSET 0xf8
#undef MC_CMD_0xf8_PRIVILEGE_CTG
#define MC_CMD_0xf8_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19908,6 +21513,7 @@
* Change configuration related to the parser-dispatcher subsystem.
*/
#define MC_CMD_SET_PARSER_DISP_CONFIG 0xf9
+#define MC_CMD_SET_PARSER_DISP_CONFIG_MSGSET 0xf9
#undef MC_CMD_0xf9_PRIVILEGE_CTG
#define MC_CMD_0xf9_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19953,6 +21559,7 @@
* Read configuration related to the parser-dispatcher subsystem.
*/
#define MC_CMD_GET_PARSER_DISP_CONFIG 0xfa
+#define MC_CMD_GET_PARSER_DISP_CONFIG_MSGSET 0xfa
#undef MC_CMD_0xfa_PRIVILEGE_CTG
#define MC_CMD_0xfa_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19997,6 +21604,7 @@
* dedicated as TX sniff receivers.
*/
#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG 0xfb
+#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG_MSGSET 0xfb
#undef MC_CMD_0xfb_PRIVILEGE_CTG
#define MC_CMD_0xfb_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -20037,6 +21645,7 @@
* the configuration.
*/
#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG 0xfc
+#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG_MSGSET 0xfc
#undef MC_CMD_0xfc_PRIVILEGE_CTG
#define MC_CMD_0xfc_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -20072,6 +21681,7 @@
* Per queue rx error stats.
*/
#define MC_CMD_RMON_STATS_RX_ERRORS 0xfe
+#define MC_CMD_RMON_STATS_RX_ERRORS_MSGSET 0xfe
#undef MC_CMD_0xfe_PRIVILEGE_CTG
#define MC_CMD_0xfe_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -20104,6 +21714,7 @@
* Find out about available PCIE resources
*/
#define MC_CMD_GET_PCIE_RESOURCE_INFO 0xfd
+#define MC_CMD_GET_PCIE_RESOURCE_INFO_MSGSET 0xfd
#undef MC_CMD_0xfd_PRIVILEGE_CTG
#define MC_CMD_0xfd_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -20143,6 +21754,7 @@
* Find out about available port modes
*/
#define MC_CMD_GET_PORT_MODES 0xff
+#define MC_CMD_GET_PORT_MODES_MSGSET 0xff
#undef MC_CMD_0xff_PRIVILEGE_CTG
#define MC_CMD_0xff_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -20199,6 +21811,7 @@
* the new port mode, as the override does not affect PF configuration.
*/
#define MC_CMD_OVERRIDE_PORT_MODE 0x137
+#define MC_CMD_OVERRIDE_PORT_MODE_MSGSET 0x137
#undef MC_CMD_0x137_PRIVILEGE_CTG
#define MC_CMD_0x137_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -20223,6 +21836,7 @@
* Sample voltages on the ATB
*/
#define MC_CMD_READ_ATB 0x100
+#define MC_CMD_READ_ATB_MSGSET 0x100
#undef MC_CMD_0x100_PRIVILEGE_CTG
#define MC_CMD_0x100_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20253,6 +21867,7 @@
* enums here must correspond with those in MC_CMD_WORKAROUND.
*/
#define MC_CMD_GET_WORKAROUNDS 0x59
+#define MC_CMD_GET_WORKAROUNDS_MSGSET 0x59
#undef MC_CMD_0x59_PRIVILEGE_CTG
#define MC_CMD_0x59_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -20290,6 +21905,7 @@
* Read/set privileges of an arbitrary PCIe function
*/
#define MC_CMD_PRIVILEGE_MASK 0x5a
+#define MC_CMD_PRIVILEGE_MASK_MSGSET 0x5a
#undef MC_CMD_0x5a_PRIVILEGE_CTG
#define MC_CMD_0x5a_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -20351,6 +21967,20 @@
#define MC_CMD_PRIVILEGE_MASK_IN_GRP_ADMIN_TSA_UNBOUND 0x8000
/* enum: Control the Match-Action Engine if present. See mcdi_mae.yml. */
#define MC_CMD_PRIVILEGE_MASK_IN_GRP_MAE 0x10000
+/* enum: This Function/client may call MC_CMD_CLIENT_ALLOC to create new
+ * dynamic client children of itself.
+ */
+#define MC_CMD_PRIVILEGE_MASK_IN_GRP_ALLOC_CLIENT 0x20000
+/* enum: A dynamic client with this privilege may perform all the same DMA
+ * operations as the function client from which it is descended.
+ */
+#define MC_CMD_PRIVILEGE_MASK_IN_GRP_FUNC_DMA 0x40000
+/* enum: A client with this privilege may perform DMA as any PCIe function on
+ * the device and to on-device DDR. It allows clients to use TX-DESC2CMPT-DESC
+ * descriptors, and to use TX-SEG-DESC and TX-MEM2MEM-DESC with an address
+ * space override (i.e. with the ADDR_SPC_EN bit set).
+ */
+#define MC_CMD_PRIVILEGE_MASK_IN_GRP_ARBITRARY_DMA 0x80000
/* enum: Set this bit to indicate that a new privilege mask is to be set,
* otherwise the command will only read the existing mask.
*/
@@ -20368,6 +21998,7 @@
* Read/set link state mode of a VF
*/
#define MC_CMD_LINK_STATE_MODE 0x5c
+#define MC_CMD_LINK_STATE_MODE_MSGSET 0x5c
#undef MC_CMD_0x5c_PRIVILEGE_CTG
#define MC_CMD_0x5c_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -20407,6 +22038,7 @@
* parameter to MC_CMD_INIT_RXQ.
*/
#define MC_CMD_GET_SNAPSHOT_LENGTH 0x101
+#define MC_CMD_GET_SNAPSHOT_LENGTH_MSGSET 0x101
#undef MC_CMD_0x101_PRIVILEGE_CTG
#define MC_CMD_0x101_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -20429,6 +22061,7 @@
* Additional fuse diagnostics
*/
#define MC_CMD_FUSE_DIAGS 0x102
+#define MC_CMD_FUSE_DIAGS_MSGSET 0x102
#undef MC_CMD_0x102_PRIVILEGE_CTG
#define MC_CMD_0x102_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20483,6 +22116,7 @@
* included in one of the masks provided.
*/
#define MC_CMD_PRIVILEGE_MODIFY 0x60
+#define MC_CMD_PRIVILEGE_MODIFY_MSGSET 0x60
#undef MC_CMD_0x60_PRIVILEGE_CTG
#define MC_CMD_0x60_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -20527,6 +22161,7 @@
* Read XPM memory
*/
#define MC_CMD_XPM_READ_BYTES 0x103
+#define MC_CMD_XPM_READ_BYTES_MSGSET 0x103
#undef MC_CMD_0x103_PRIVILEGE_CTG
#define MC_CMD_0x103_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -20559,6 +22194,7 @@
* Write XPM memory
*/
#define MC_CMD_XPM_WRITE_BYTES 0x104
+#define MC_CMD_XPM_WRITE_BYTES_MSGSET 0x104
#undef MC_CMD_0x104_PRIVILEGE_CTG
#define MC_CMD_0x104_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20591,6 +22227,7 @@
* Read XPM sector
*/
#define MC_CMD_XPM_READ_SECTOR 0x105
+#define MC_CMD_XPM_READ_SECTOR_MSGSET 0x105
#undef MC_CMD_0x105_PRIVILEGE_CTG
#define MC_CMD_0x105_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20631,6 +22268,7 @@
* Write XPM sector
*/
#define MC_CMD_XPM_WRITE_SECTOR 0x106
+#define MC_CMD_XPM_WRITE_SECTOR_MSGSET 0x106
#undef MC_CMD_0x106_PRIVILEGE_CTG
#define MC_CMD_0x106_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20677,6 +22315,7 @@
* Invalidate XPM sector
*/
#define MC_CMD_XPM_INVALIDATE_SECTOR 0x107
+#define MC_CMD_XPM_INVALIDATE_SECTOR_MSGSET 0x107
#undef MC_CMD_0x107_PRIVILEGE_CTG
#define MC_CMD_0x107_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20696,6 +22335,7 @@
* Blank-check XPM memory and report bad locations
*/
#define MC_CMD_XPM_BLANK_CHECK 0x108
+#define MC_CMD_XPM_BLANK_CHECK_MSGSET 0x108
#undef MC_CMD_0x108_PRIVILEGE_CTG
#define MC_CMD_0x108_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20733,6 +22373,7 @@
* Blank-check and repair XPM memory
*/
#define MC_CMD_XPM_REPAIR 0x109
+#define MC_CMD_XPM_REPAIR_MSGSET 0x109
#undef MC_CMD_0x109_PRIVILEGE_CTG
#define MC_CMD_0x109_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20756,6 +22397,7 @@
* be performed on an unprogrammed part.
*/
#define MC_CMD_XPM_DECODER_TEST 0x10a
+#define MC_CMD_XPM_DECODER_TEST_MSGSET 0x10a
#undef MC_CMD_0x10a_PRIVILEGE_CTG
#define MC_CMD_0x10a_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20776,6 +22418,7 @@
* first available location to use, or fail with ENOSPC if none left.
*/
#define MC_CMD_XPM_WRITE_TEST 0x10b
+#define MC_CMD_XPM_WRITE_TEST_MSGSET 0x10b
#undef MC_CMD_0x10b_PRIVILEGE_CTG
#define MC_CMD_0x10b_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20797,6 +22440,7 @@
* does match, otherwise it will respond with success before it jumps to IMEM.
*/
#define MC_CMD_EXEC_SIGNED 0x10c
+#define MC_CMD_EXEC_SIGNED_MSGSET 0x10c
#undef MC_CMD_0x10c_PRIVILEGE_CTG
#define MC_CMD_0x10c_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -20827,6 +22471,7 @@
* MC_CMD_EXEC_SIGNED.
*/
#define MC_CMD_PREPARE_SIGNED 0x10d
+#define MC_CMD_PREPARE_SIGNED_MSGSET 0x10d
#undef MC_CMD_0x10d_PRIVILEGE_CTG
#define MC_CMD_0x10d_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -20850,6 +22495,7 @@
* will be removed once it is regarded as stable.
*/
#define MC_CMD_SET_SECURITY_RULE 0x10f
+#define MC_CMD_SET_SECURITY_RULE_MSGSET 0x10f
#undef MC_CMD_0x10f_PRIVILEGE_CTG
#define MC_CMD_0x10f_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -21040,6 +22686,7 @@
* development. This note will be removed once it is regarded as stable.
*/
#define MC_CMD_RESET_SECURITY_RULES 0x110
+#define MC_CMD_RESET_SECURITY_RULES_MSGSET 0x110
#undef MC_CMD_0x110_PRIVILEGE_CTG
#define MC_CMD_0x110_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -21066,6 +22713,7 @@
* will be removed once it is regarded as stable.
*/
#define MC_CMD_GET_SECURITY_RULESET_VERSION 0x111
+#define MC_CMD_GET_SECURITY_RULESET_VERSION_MSGSET 0x111
#undef MC_CMD_0x111_PRIVILEGE_CTG
#define MC_CMD_0x111_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -21096,6 +22744,7 @@
* removed once it is regarded as stable.
*/
#define MC_CMD_SECURITY_RULE_COUNTER_ALLOC 0x112
+#define MC_CMD_SECURITY_RULE_COUNTER_ALLOC_MSGSET 0x112
#undef MC_CMD_0x112_PRIVILEGE_CTG
#define MC_CMD_0x112_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -21134,6 +22783,7 @@
* removed once it is regarded as stable.
*/
#define MC_CMD_SECURITY_RULE_COUNTER_FREE 0x113
+#define MC_CMD_SECURITY_RULE_COUNTER_FREE_MSGSET 0x113
#undef MC_CMD_0x113_PRIVILEGE_CTG
#define MC_CMD_0x113_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -21169,6 +22819,7 @@
* will be removed once it is regarded as stable.
*/
#define MC_CMD_SUBNET_MAP_SET_NODE 0x114
+#define MC_CMD_SUBNET_MAP_SET_NODE_MSGSET 0x114
#undef MC_CMD_0x114_PRIVILEGE_CTG
#define MC_CMD_0x114_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -21224,6 +22875,7 @@
* will be removed once it is regarded as stable.
*/
#define MC_CMD_REMOTE_PORTRANGE_MAP_SET_TREE 0x115
+#define MC_CMD_REMOTE_PORTRANGE_MAP_SET_TREE_MSGSET 0x115
#undef MC_CMD_0x115_PRIVILEGE_CTG
#define MC_CMD_0x115_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -21258,6 +22910,7 @@
* will be removed once it is regarded as stable.
*/
#define MC_CMD_LOCAL_PORTRANGE_MAP_SET_TREE 0x116
+#define MC_CMD_LOCAL_PORTRANGE_MAP_SET_TREE_MSGSET 0x116
#undef MC_CMD_0x116_PRIVILEGE_CTG
#define MC_CMD_0x116_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -21311,6 +22964,7 @@
* cause all functions to see a reset. (Available on Medford only.)
*/
#define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS 0x117
+#define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_MSGSET 0x117
#undef MC_CMD_0x117_PRIVILEGE_CTG
#define MC_CMD_0x117_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -21357,6 +23011,7 @@
* priority.
*/
#define MC_CMD_RX_BALANCING 0x118
+#define MC_CMD_RX_BALANCING_MSGSET 0x118
#undef MC_CMD_0x118_PRIVILEGE_CTG
#define MC_CMD_0x118_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -21386,6 +23041,7 @@
* info in respect to the binding protocol.
*/
#define MC_CMD_TSA_BIND 0x119
+#define MC_CMD_TSA_BIND_MSGSET 0x119
#undef MC_CMD_0x119_PRIVILEGE_CTG
#define MC_CMD_0x119_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -21951,6 +23607,7 @@
* OP_GET_CACHED_VERSION. All other sub-operations are prohibited.
*/
#define MC_CMD_MANAGE_SECURITY_RULESET_CACHE 0x11a
+#define MC_CMD_MANAGE_SECURITY_RULESET_CACHE_MSGSET 0x11a
#undef MC_CMD_0x11a_PRIVILEGE_CTG
#define MC_CMD_0x11a_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -22007,6 +23664,7 @@
* if the tag is already present.
*/
#define MC_CMD_NVRAM_PRIVATE_APPEND 0x11c
+#define MC_CMD_NVRAM_PRIVATE_APPEND_MSGSET 0x11c
#undef MC_CMD_0x11c_PRIVILEGE_CTG
#define MC_CMD_0x11c_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -22041,6 +23699,7 @@
* correctly at ATE.
*/
#define MC_CMD_XPM_VERIFY_CONTENTS 0x11b
+#define MC_CMD_XPM_VERIFY_CONTENTS_MSGSET 0x11b
#undef MC_CMD_0x11b_PRIVILEGE_CTG
#define MC_CMD_0x11b_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -22084,6 +23743,7 @@
* and TMR_RELOAD_ACT_NS).
*/
#define MC_CMD_SET_EVQ_TMR 0x120
+#define MC_CMD_SET_EVQ_TMR_MSGSET 0x120
#undef MC_CMD_0x120_PRIVILEGE_CTG
#define MC_CMD_0x120_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -22122,6 +23782,7 @@
* Query properties about the event queue timers.
*/
#define MC_CMD_GET_EVQ_TMR_PROPERTIES 0x122
+#define MC_CMD_GET_EVQ_TMR_PROPERTIES_MSGSET 0x122
#undef MC_CMD_0x122_PRIVILEGE_CTG
#define MC_CMD_0x122_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -22191,6 +23852,7 @@
* non used switch buffers.
*/
#define MC_CMD_ALLOCATE_TX_VFIFO_CP 0x11d
+#define MC_CMD_ALLOCATE_TX_VFIFO_CP_MSGSET 0x11d
#undef MC_CMD_0x11d_PRIVILEGE_CTG
#define MC_CMD_0x11d_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -22198,7 +23860,8 @@
/* MC_CMD_ALLOCATE_TX_VFIFO_CP_IN msgrequest */
#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_LEN 20
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_INSTANCE_OFST 0
#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_INSTANCE_LEN 4
@@ -22243,6 +23906,7 @@
* previously allocated common pools.
*/
#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO 0x11e
+#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_MSGSET 0x11e
#undef MC_CMD_0x11e_PRIVILEGE_CTG
#define MC_CMD_0x11e_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -22296,6 +23960,7 @@
* ready to be re-used.
*/
#define MC_CMD_TEARDOWN_TX_VFIFO_VF 0x11f
+#define MC_CMD_TEARDOWN_TX_VFIFO_VF_MSGSET 0x11f
#undef MC_CMD_0x11f_PRIVILEGE_CTG
#define MC_CMD_0x11f_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -22316,6 +23981,7 @@
* it ready to be re-used.
*/
#define MC_CMD_DEALLOCATE_TX_VFIFO_CP 0x121
+#define MC_CMD_DEALLOCATE_TX_VFIFO_CP_MSGSET 0x121
#undef MC_CMD_0x121_PRIVILEGE_CTG
#define MC_CMD_0x121_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -22344,6 +24010,7 @@
* or 0 if there has not been a previous rekey.
*/
#define MC_CMD_REKEY 0x123
+#define MC_CMD_REKEY_MSGSET 0x123
#undef MC_CMD_0x123_PRIVILEGE_CTG
#define MC_CMD_0x123_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -22368,6 +24035,7 @@
* not yet assigned.
*/
#define MC_CMD_SWITCH_GET_UNASSIGNED_BUFFERS 0x124
+#define MC_CMD_SWITCH_GET_UNASSIGNED_BUFFERS_MSGSET 0x124
#undef MC_CMD_0x124_PRIVILEGE_CTG
#define MC_CMD_0x124_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -22396,6 +24064,7 @@
* the required bits were not set.
*/
#define MC_CMD_SET_SECURITY_FUSES 0x126
+#define MC_CMD_SET_SECURITY_FUSES_MSGSET 0x126
#undef MC_CMD_0x126_PRIVILEGE_CTG
#define MC_CMD_0x126_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -22438,6 +24107,7 @@
* SF-117371-SW
*/
#define MC_CMD_TSA_INFO 0x127
+#define MC_CMD_TSA_INFO_MSGSET 0x127
#undef MC_CMD_0x127_PRIVILEGE_CTG
#define MC_CMD_0x127_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -22614,6 +24284,7 @@
* Doxbox reference SF-117371-SW
*/
#define MC_CMD_HOST_INFO 0x128
+#define MC_CMD_HOST_INFO_MSGSET 0x128
#undef MC_CMD_0x128_PRIVILEGE_CTG
#define MC_CMD_0x128_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -22681,6 +24352,7 @@
* section 'Adapter Information'
*/
#define MC_CMD_TSAN_INFO 0x129
+#define MC_CMD_TSAN_INFO_MSGSET 0x129
#undef MC_CMD_0x129_PRIVILEGE_CTG
#define MC_CMD_0x129_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -22780,6 +24452,7 @@
* TSA adapter statistics operations.
*/
#define MC_CMD_TSA_STATISTICS 0x130
+#define MC_CMD_TSA_STATISTICS_MSGSET 0x130
#undef MC_CMD_0x130_PRIVILEGE_CTG
#define MC_CMD_0x130_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -22884,14 +24557,26 @@
#define MC_TSA_STATISTICS_ENTRY_TX_STAT_OFST 0
#define MC_TSA_STATISTICS_ENTRY_TX_STAT_LEN 8
#define MC_TSA_STATISTICS_ENTRY_TX_STAT_LO_OFST 0
+#define MC_TSA_STATISTICS_ENTRY_TX_STAT_LO_LEN 4
+#define MC_TSA_STATISTICS_ENTRY_TX_STAT_LO_LBN 0
+#define MC_TSA_STATISTICS_ENTRY_TX_STAT_LO_WIDTH 32
#define MC_TSA_STATISTICS_ENTRY_TX_STAT_HI_OFST 4
+#define MC_TSA_STATISTICS_ENTRY_TX_STAT_HI_LEN 4
+#define MC_TSA_STATISTICS_ENTRY_TX_STAT_HI_LBN 32
+#define MC_TSA_STATISTICS_ENTRY_TX_STAT_HI_WIDTH 32
#define MC_TSA_STATISTICS_ENTRY_TX_STAT_LBN 0
#define MC_TSA_STATISTICS_ENTRY_TX_STAT_WIDTH 64
/* Rx statistics counter */
#define MC_TSA_STATISTICS_ENTRY_RX_STAT_OFST 8
#define MC_TSA_STATISTICS_ENTRY_RX_STAT_LEN 8
#define MC_TSA_STATISTICS_ENTRY_RX_STAT_LO_OFST 8
+#define MC_TSA_STATISTICS_ENTRY_RX_STAT_LO_LEN 4
+#define MC_TSA_STATISTICS_ENTRY_RX_STAT_LO_LBN 64
+#define MC_TSA_STATISTICS_ENTRY_RX_STAT_LO_WIDTH 32
#define MC_TSA_STATISTICS_ENTRY_RX_STAT_HI_OFST 12
+#define MC_TSA_STATISTICS_ENTRY_RX_STAT_HI_LEN 4
+#define MC_TSA_STATISTICS_ENTRY_RX_STAT_HI_LBN 96
+#define MC_TSA_STATISTICS_ENTRY_RX_STAT_HI_WIDTH 32
#define MC_TSA_STATISTICS_ENTRY_RX_STAT_LBN 64
#define MC_TSA_STATISTICS_ENTRY_RX_STAT_WIDTH 64
@@ -22904,6 +24589,7 @@
* installing TSA binding certificates. See SF-117631-TC.
*/
#define MC_CMD_ERASE_INITIAL_NIC_SECRET 0x131
+#define MC_CMD_ERASE_INITIAL_NIC_SECRET_MSGSET 0x131
#undef MC_CMD_0x131_PRIVILEGE_CTG
#define MC_CMD_0x131_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -22921,6 +24607,7 @@
* NIC for TSA binding.
*/
#define MC_CMD_TSA_CONFIG 0x64
+#define MC_CMD_TSA_CONFIG_MSGSET 0x64
#undef MC_CMD_0x64_PRIVILEGE_CTG
#define MC_CMD_0x64_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -23038,6 +24725,7 @@
* to a TSA adapter.
*/
#define MC_CMD_TSA_IPADDR 0x65
+#define MC_CMD_TSA_IPADDR_MSGSET 0x65
#undef MC_CMD_0x65_PRIVILEGE_CTG
#define MC_CMD_0x65_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -23089,7 +24777,13 @@
#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_OFST 8
#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_LEN 8
#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_LO_OFST 8
+#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_LO_LEN 4
+#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_LO_LBN 64
+#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_LO_WIDTH 32
#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_HI_OFST 12
+#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_HI_LEN 4
+#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_HI_LBN 96
+#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_HI_WIDTH 32
#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_MINNUM 1
#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_MAXNUM 30
#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_MAXNUM_MCDI2 126
@@ -23119,7 +24813,13 @@
#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_OFST 8
#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_LEN 8
#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_LO_OFST 8
+#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_LO_LEN 4
+#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_LO_LBN 64
+#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_LO_WIDTH 32
#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_HI_OFST 12
+#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_HI_LEN 4
+#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_HI_LBN 96
+#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_HI_WIDTH 32
#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_MINNUM 1
#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_MAXNUM 30
#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_MAXNUM_MCDI2 126
@@ -23135,6 +24835,7 @@
* disabled.
*/
#define MC_CMD_SECURE_NIC_INFO 0x132
+#define MC_CMD_SECURE_NIC_INFO_MSGSET 0x132
#undef MC_CMD_0x132_PRIVILEGE_CTG
#define MC_CMD_0x132_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -23228,6 +24929,7 @@
* parameters in request or response.
*/
#define MC_CMD_TSA_TEST 0x125
+#define MC_CMD_TSA_TEST_MSGSET 0x125
#undef MC_CMD_0x125_PRIVILEGE_CTG
#define MC_CMD_0x125_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -23249,6 +24951,7 @@
* rule-set transitions.
*/
#define MC_CMD_TSA_RULESET_OVERRIDE 0x12a
+#define MC_CMD_TSA_RULESET_OVERRIDE_MSGSET 0x12a
#undef MC_CMD_0x12a_PRIVILEGE_CTG
#define MC_CMD_0x12a_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -23281,6 +24984,7 @@
* Specific usage is determined by the TYPE field.
*/
#define MC_CMD_TSAC_REQUEST 0x12b
+#define MC_CMD_TSAC_REQUEST_MSGSET 0x12b
#undef MC_CMD_0x12b_PRIVILEGE_CTG
#define MC_CMD_0x12b_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -23305,6 +25009,7 @@
* Get the version of the SUC
*/
#define MC_CMD_SUC_VERSION 0x134
+#define MC_CMD_SUC_VERSION_MSGSET 0x134
#undef MC_CMD_0x134_PRIVILEGE_CTG
#define MC_CMD_0x134_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -23350,6 +25055,7 @@
* Operations to support manftest on SUC based systems.
*/
#define MC_CMD_SUC_MANFTEST 0x135
+#define MC_CMD_SUC_MANFTEST_MSGSET 0x135
#undef MC_CMD_0x135_PRIVILEGE_CTG
#define MC_CMD_0x135_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -23546,6 +25252,7 @@
* Request a certificate.
*/
#define MC_CMD_GET_CERTIFICATE 0x12c
+#define MC_CMD_GET_CERTIFICATE_MSGSET 0x12c
#undef MC_CMD_0x12c_PRIVILEGE_CTG
#define MC_CMD_0x12c_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -23620,6 +25327,7 @@
* Get a global value which applies to all PCI functions
*/
#define MC_CMD_GET_NIC_GLOBAL 0x12d
+#define MC_CMD_GET_NIC_GLOBAL_MSGSET 0x12d
#undef MC_CMD_0x12d_PRIVILEGE_CTG
#define MC_CMD_0x12d_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -23647,6 +25355,7 @@
* appropriate error otherwise (see key descriptions).
*/
#define MC_CMD_SET_NIC_GLOBAL 0x12e
+#define MC_CMD_SET_NIC_GLOBAL_MSGSET 0x12e
#undef MC_CMD_0x12e_PRIVILEGE_CTG
#define MC_CMD_0x12e_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -23694,6 +25403,7 @@
* firmware buffer for later extraction.
*/
#define MC_CMD_LTSSM_TRACE_POLL 0x12f
+#define MC_CMD_LTSSM_TRACE_POLL_MSGSET 0x12f
#undef MC_CMD_0x12f_PRIVILEGE_CTG
#define MC_CMD_0x12f_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -23731,7 +25441,13 @@
#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_OFST 8
#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_LEN 8
#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_LO_OFST 8
+#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_LO_LEN 4
+#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_LO_LBN 64
+#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_LO_WIDTH 32
#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_HI_OFST 12
+#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_HI_LEN 4
+#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_HI_LBN 96
+#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_HI_WIDTH 32
#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_MINNUM 0
#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_MAXNUM 30
#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_MAXNUM_MCDI2 126
@@ -23765,6 +25481,7 @@
* firmware variant.
*/
#define MC_CMD_TELEMETRY_ENABLE 0x138
+#define MC_CMD_TELEMETRY_ENABLE_MSGSET 0x138
#undef MC_CMD_0x138_PRIVILEGE_CTG
#define MC_CMD_0x138_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -23856,6 +25573,7 @@
* Reference - SF-120569-SW Telemetry Firmware Design.
*/
#define MC_CMD_TELEMETRY_CONFIG 0x139
+#define MC_CMD_TELEMETRY_CONFIG_MSGSET 0x139
#undef MC_CMD_0x139_PRIVILEGE_CTG
#define MC_CMD_0x139_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -23925,6 +25643,7 @@
* due to resource constraints, returns ENOSPC.
*/
#define MC_CMD_GET_RX_PREFIX_ID 0x13b
+#define MC_CMD_GET_RX_PREFIX_ID_MSGSET 0x13b
#undef MC_CMD_0x13b_PRIVILEGE_CTG
#define MC_CMD_0x13b_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -23935,7 +25654,13 @@
#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_OFST 0
#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_LEN 8
#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_LO_OFST 0
+#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_LO_LEN 4
+#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_LO_LBN 0
+#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_LO_WIDTH 32
#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_HI_OFST 4
+#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_HI_LEN 4
+#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_HI_LBN 32
+#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_HI_WIDTH 32
#define MC_CMD_GET_RX_PREFIX_ID_IN_LENGTH_OFST 0
#define MC_CMD_GET_RX_PREFIX_ID_IN_LENGTH_LBN 0
#define MC_CMD_GET_RX_PREFIX_ID_IN_LENGTH_WIDTH 1
@@ -24056,6 +25781,7 @@
* created with that prefix id
*/
#define MC_CMD_QUERY_RX_PREFIX_ID 0x13c
+#define MC_CMD_QUERY_RX_PREFIX_ID_MSGSET 0x13c
#undef MC_CMD_0x13c_PRIVILEGE_CTG
#define MC_CMD_0x13c_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24092,6 +25818,7 @@
* A command to perform various bundle-related operations on insecure cards.
*/
#define MC_CMD_BUNDLE 0x13d
+#define MC_CMD_BUNDLE_MSGSET 0x13d
#undef MC_CMD_0x13d_PRIVILEGE_CTG
#define MC_CMD_0x13d_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -24154,6 +25881,7 @@
* Read all VPD starting from a given address
*/
#define MC_CMD_GET_VPD 0x165
+#define MC_CMD_GET_VPD_MSGSET 0x165
#undef MC_CMD_0x165_PRIVILEGE_CTG
#define MC_CMD_0x165_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24185,6 +25913,7 @@
* Provide information about the NC-SI stack
*/
#define MC_CMD_GET_NCSI_INFO 0x167
+#define MC_CMD_GET_NCSI_INFO_MSGSET 0x167
#undef MC_CMD_0x167_PRIVILEGE_CTG
#define MC_CMD_0x167_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24256,6 +25985,7 @@
* System lockdown, when enabled firmware updates are blocked.
*/
#define MC_CMD_FIRMWARE_SET_LOCKDOWN 0x16f
+#define MC_CMD_FIRMWARE_SET_LOCKDOWN_MSGSET 0x16f
#undef MC_CMD_0x16f_PRIVILEGE_CTG
#define MC_CMD_0x16f_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -24278,6 +26008,7 @@
* documentation.
*/
#define MC_CMD_GET_TEST_FEATURES 0x1ac
+#define MC_CMD_GET_TEST_FEATURES_MSGSET 0x1ac
#undef MC_CMD_0x1ac_PRIVILEGE_CTG
#define MC_CMD_0x1ac_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24300,6 +26031,253 @@
#define MC_CMD_GET_TEST_FEATURE_OUT_TEST_FEATURES_MAXNUM 63
#define MC_CMD_GET_TEST_FEATURE_OUT_TEST_FEATURES_MAXNUM_MCDI2 255
+
+/***********************************/
+/* MC_CMD_FPGA
+ * A command to perform various fpga-related operations on platforms that
+ * include FPGAs. Note that some platforms may only support a subset of these
+ * operations.
+ */
+#define MC_CMD_FPGA 0x1bf
+#define MC_CMD_FPGA_MSGSET 0x1bf
+#undef MC_CMD_0x1bf_PRIVILEGE_CTG
+
+#define MC_CMD_0x1bf_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_FPGA_IN msgrequest */
+#define MC_CMD_FPGA_IN_LEN 4
+/* Sub-command code */
+#define MC_CMD_FPGA_IN_OP_OFST 0
+#define MC_CMD_FPGA_IN_OP_LEN 4
+/* enum: Get the FPGA version string. */
+#define MC_CMD_FPGA_IN_OP_GET_VERSION 0x0
+/* enum: Read bitmask of features supported in the FPGA image. */
+#define MC_CMD_FPGA_IN_OP_GET_CAPABILITIES 0x1
+/* enum: Perform a FPGA reset. */
+#define MC_CMD_FPGA_IN_OP_RESET 0x2
+/* enum: Set active flash device. */
+#define MC_CMD_FPGA_IN_OP_SELECT_FLASH 0x3
+/* enum: Get active flash device. */
+#define MC_CMD_FPGA_IN_OP_GET_ACTIVE_FLASH 0x4
+/* enum: Configure internal link i.e. the FPGA port facing the ASIC. */
+#define MC_CMD_FPGA_IN_OP_SET_INTERNAL_LINK 0x5
+/* enum: Read internal link configuration. */
+#define MC_CMD_FPGA_IN_OP_GET_INTERNAL_LINK 0x6
+
+/* MC_CMD_FPGA_OP_GET_VERSION_IN msgrequest: Get the FPGA version string. A
+ * free-format string is returned in response to this command. Any checks on
+ * supported FPGA operations are based on the response to
+ * MC_CMD_FPGA_OP_GET_CAPABILITIES.
+ */
+#define MC_CMD_FPGA_OP_GET_VERSION_IN_LEN 4
+/* Sub-command code. Must be OP_GET_VERSION */
+#define MC_CMD_FPGA_OP_GET_VERSION_IN_OP_OFST 0
+#define MC_CMD_FPGA_OP_GET_VERSION_IN_OP_LEN 4
+
+/* MC_CMD_FPGA_OP_GET_VERSION_OUT msgresponse: Returns the version string. */
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_LENMIN 0
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_LENMAX 252
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_LENMAX_MCDI2 1020
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_LEN(num) (0+1*(num))
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_VERSION_NUM(len) (((len)-0)/1)
+/* Null-terminated string containing version information. */
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_VERSION_OFST 0
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_VERSION_LEN 1
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_VERSION_MINNUM 0
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_VERSION_MAXNUM 252
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_VERSION_MAXNUM_MCDI2 1020
+
+/* MC_CMD_FPGA_OP_GET_CAPABILITIES_IN msgrequest: Read bitmask of features
+ * supported in the FPGA image.
+ */
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_IN_LEN 4
+/* Sub-command code. Must be OP_GET_CAPABILITIES */
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_IN_OP_OFST 0
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_IN_OP_LEN 4
+
+/* MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT msgresponse: Returns the version string.
+ */
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_LEN 4
+/* Bit-mask of supported features. */
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_CAPABILITIES_OFST 0
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_CAPABILITIES_LEN 4
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_MAC_OFST 0
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_MAC_LBN 0
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_MAC_WIDTH 1
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_MAE_OFST 0
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_MAE_LBN 1
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_MAE_WIDTH 1
+
+/* MC_CMD_FPGA_OP_RESET_IN msgrequest: Perform a FPGA reset operation where
+ * supported.
+ */
+#define MC_CMD_FPGA_OP_RESET_IN_LEN 4
+/* Sub-command code. Must be OP_RESET */
+#define MC_CMD_FPGA_OP_RESET_IN_OP_OFST 0
+#define MC_CMD_FPGA_OP_RESET_IN_OP_LEN 4
+
+/* MC_CMD_FPGA_OP_RESET_OUT msgresponse */
+#define MC_CMD_FPGA_OP_RESET_OUT_LEN 0
+
+/* MC_CMD_FPGA_OP_SELECT_FLASH_IN msgrequest: Set active FPGA flash device.
+ * Returns EINVAL if selected flash index does not exist on the platform under
+ * test.
+ */
+#define MC_CMD_FPGA_OP_SELECT_FLASH_IN_LEN 8
+/* Sub-command code. Must be OP_SELECT_FLASH */
+#define MC_CMD_FPGA_OP_SELECT_FLASH_IN_OP_OFST 0
+#define MC_CMD_FPGA_OP_SELECT_FLASH_IN_OP_LEN 4
+/* Flash device identifier. */
+#define MC_CMD_FPGA_OP_SELECT_FLASH_IN_FLASH_ID_OFST 4
+#define MC_CMD_FPGA_OP_SELECT_FLASH_IN_FLASH_ID_LEN 4
+/* Enum values, see field(s): */
+/* MC_CMD_FPGA_FLASH_INDEX */
+
+/* MC_CMD_FPGA_OP_SELECT_FLASH_OUT msgresponse */
+#define MC_CMD_FPGA_OP_SELECT_FLASH_OUT_LEN 0
+
+/* MC_CMD_FPGA_OP_GET_ACTIVE_FLASH_IN msgrequest: Get active FPGA flash device.
+ */
+#define MC_CMD_FPGA_OP_GET_ACTIVE_FLASH_IN_LEN 4
+/* Sub-command code. Must be OP_GET_ACTIVE_FLASH */
+#define MC_CMD_FPGA_OP_GET_ACTIVE_FLASH_IN_OP_OFST 0
+#define MC_CMD_FPGA_OP_GET_ACTIVE_FLASH_IN_OP_LEN 4
+
+/* MC_CMD_FPGA_OP_GET_ACTIVE_FLASH_OUT msgresponse: Returns flash identifier
+ * for current active flash.
+ */
+#define MC_CMD_FPGA_OP_GET_ACTIVE_FLASH_OUT_LEN 4
+/* Flash device identifier. */
+#define MC_CMD_FPGA_OP_GET_ACTIVE_FLASH_OUT_FLASH_ID_OFST 0
+#define MC_CMD_FPGA_OP_GET_ACTIVE_FLASH_OUT_FLASH_ID_LEN 4
+/* Enum values, see field(s): */
+/* MC_CMD_FPGA_FLASH_INDEX */
+
+/* MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN msgrequest: Configure FPGA internal
+ * port, facing the ASIC
+ */
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_LEN 12
+/* Sub-command code. Must be OP_SET_INTERNAL_LINK */
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_OP_OFST 0
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_OP_LEN 4
+/* Flags */
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_FLAGS_OFST 4
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_FLAGS_LEN 4
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_LINK_STATE_OFST 4
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_LINK_STATE_LBN 0
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_LINK_STATE_WIDTH 2
+/* enum: Unmodified, same as last state set by firmware */
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_AUTO 0x0
+/* enum: Configure link-up */
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_UP 0x1
+/* enum: Configure link-down */
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_DOWN 0x2
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_FLUSH_OFST 4
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_FLUSH_LBN 2
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_FLUSH_WIDTH 1
+/* Link speed to be applied on FPGA internal port MAC. */
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_SPEED_OFST 8
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_SPEED_LEN 4
+
+/* MC_CMD_FPGA_OP_SET_INTERNAL_LINK_OUT msgresponse */
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_OUT_LEN 0
+
+/* MC_CMD_FPGA_OP_GET_INTERNAL_LINK_IN msgrequest: Read FPGA internal port
+ * configuration and status
+ */
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_IN_LEN 4
+/* Sub-command code. Must be OP_GET_INTERNAL_LINK */
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_IN_OP_OFST 0
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_IN_OP_LEN 4
+
+/* MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT msgresponse: Response format for read
+ * FPGA internal port configuration and status
+ */
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT_LEN 8
+/* Flags */
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT_FLAGS_OFST 0
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT_FLAGS_LEN 4
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT_LINK_STATE_OFST 0
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT_LINK_STATE_LBN 0
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT_LINK_STATE_WIDTH 2
+/* Enum values, see field(s): */
+/* MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN/FLAGS */
+/* Link speed set on FPGA internal port MAC. */
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT_SPEED_OFST 4
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT_SPEED_LEN 4
+
+
+/***********************************/
+/* MC_CMD_EXTERNAL_MAE_GET_LINK_MODE
+ * This command is expected to be used on a U25 board with an MAE in the FPGA.
+ * It does not modify the operational state of the NIC. The modes are described
+ * in XN-200039-TC - U25 OVS packet formats.
+ */
+#define MC_CMD_EXTERNAL_MAE_GET_LINK_MODE 0x1c0
+#define MC_CMD_EXTERNAL_MAE_GET_LINK_MODE_MSGSET 0x1c0
+#undef MC_CMD_0x1c0_PRIVILEGE_CTG
+
+#define MC_CMD_0x1c0_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_EXTERNAL_MAE_GET_LINK_MODE_IN msgrequest */
+#define MC_CMD_EXTERNAL_MAE_GET_LINK_MODE_IN_LEN 0
+
+/* MC_CMD_EXTERNAL_MAE_GET_LINK_MODE_OUT msgresponse */
+#define MC_CMD_EXTERNAL_MAE_GET_LINK_MODE_OUT_LEN 4
+/* The current link mode */
+#define MC_CMD_EXTERNAL_MAE_GET_LINK_MODE_OUT_MODE_OFST 0
+#define MC_CMD_EXTERNAL_MAE_GET_LINK_MODE_OUT_MODE_LEN 4
+/* Enum values, see field(s): */
+/* MC_CMD_EXTERNAL_MAE_LINK_MODE */
+
+
+/***********************************/
+/* MC_CMD_EXTERNAL_MAE_SET_LINK_MODE
+ * This command is expected to be used on a U25 board with an MAE in the FPGA.
+ * The modes are described in XN-200039-TC - U25 OVS packet formats. This
+ * command will set the link between the FPGA and the X2 to the specified new
+ * mode. It will first enter bootstrap mode, make sure there are no packets in
+ * flight and then enter the requested mode. In order to make sure there are no
+ * packets in flight, it will flush the X2 TX path, the FPGA RX path from the
+ * X2, the FPGA TX path to the X2 and the X2 RX path. The driver is responsible
+ * for making sure there are no TX or RX descriptors posted on any TXQ or RXQ
+ * associated with the affected port before invoking this command. This command
+ * is run implicitly with MODE set to LEGACY when MC_CMD_DRV_ATTACH is
+ * executed.
+ */
+#define MC_CMD_EXTERNAL_MAE_SET_LINK_MODE 0x1c1
+#define MC_CMD_EXTERNAL_MAE_SET_LINK_MODE_MSGSET 0x1c1
+#undef MC_CMD_0x1c1_PRIVILEGE_CTG
+
+#define MC_CMD_0x1c1_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_EXTERNAL_MAE_SET_LINK_MODE_IN msgrequest */
+#define MC_CMD_EXTERNAL_MAE_SET_LINK_MODE_IN_LEN 4
+/* The new link mode. */
+#define MC_CMD_EXTERNAL_MAE_SET_LINK_MODE_IN_MODE_OFST 0
+#define MC_CMD_EXTERNAL_MAE_SET_LINK_MODE_IN_MODE_LEN 4
+/* Enum values, see field(s): */
+/* MC_CMD_EXTERNAL_MAE_LINK_MODE */
+
+/* MC_CMD_EXTERNAL_MAE_SET_LINK_MODE_OUT msgresponse */
+#define MC_CMD_EXTERNAL_MAE_SET_LINK_MODE_OUT_LEN 0
+
+/* CLIENT_HANDLE structuredef: A client is an abstract entity that can make
+ * requests of the device and that can own resources managed by the device.
+ * Examples of clients include PCIe functions and dynamic clients. A client
+ * handle is a 32b opaque value used to refer to a client. Further details can
+ * be found within XN-200418-TC.
+ */
+#define CLIENT_HANDLE_LEN 4
+#define CLIENT_HANDLE_OPAQUE_OFST 0
+#define CLIENT_HANDLE_OPAQUE_LEN 4
+/* enum: A client handle guaranteed never to refer to a real client. */
+#define CLIENT_HANDLE_NULL 0xffffffff
+/* enum: Used to refer to the calling client. */
+#define CLIENT_HANDLE_SELF 0xfffffffe
+#define CLIENT_HANDLE_OPAQUE_LBN 0
+#define CLIENT_HANDLE_OPAQUE_WIDTH 32
+
/* CLOCK_INFO structuredef: Information about a single hardware clock */
#define CLOCK_INFO_LEN 28
/* Enumeration that uniquely identifies the clock */
@@ -24333,7 +26311,13 @@
#define CLOCK_INFO_FREQUENCY_OFST 4
#define CLOCK_INFO_FREQUENCY_LEN 8
#define CLOCK_INFO_FREQUENCY_LO_OFST 4
+#define CLOCK_INFO_FREQUENCY_LO_LEN 4
+#define CLOCK_INFO_FREQUENCY_LO_LBN 32
+#define CLOCK_INFO_FREQUENCY_LO_WIDTH 32
#define CLOCK_INFO_FREQUENCY_HI_OFST 8
+#define CLOCK_INFO_FREQUENCY_HI_LEN 4
+#define CLOCK_INFO_FREQUENCY_HI_LBN 64
+#define CLOCK_INFO_FREQUENCY_HI_WIDTH 32
#define CLOCK_INFO_FREQUENCY_LBN 32
#define CLOCK_INFO_FREQUENCY_WIDTH 64
/* Human-readable ASCII name for clock, with NUL termination */
@@ -24343,12 +26327,62 @@
#define CLOCK_INFO_NAME_LBN 96
#define CLOCK_INFO_NAME_WIDTH 8
+/* SCHED_CREDIT_CHECK_RESULT structuredef */
+#define SCHED_CREDIT_CHECK_RESULT_LEN 16
+/* The instance of the scheduler. Refer to XN-200389-AW for the location of
+ * these schedulers in the hardware.
+ */
+#define SCHED_CREDIT_CHECK_RESULT_SCHED_INSTANCE_OFST 0
+#define SCHED_CREDIT_CHECK_RESULT_SCHED_INSTANCE_LEN 1
+#define SCHED_CREDIT_CHECK_RESULT_HUB_HOST_A 0x0 /* enum */
+#define SCHED_CREDIT_CHECK_RESULT_HUB_NET_A 0x1 /* enum */
+#define SCHED_CREDIT_CHECK_RESULT_HUB_B 0x2 /* enum */
+#define SCHED_CREDIT_CHECK_RESULT_HUB_HOST_C 0x3 /* enum */
+#define SCHED_CREDIT_CHECK_RESULT_HUB_NET_TX 0x4 /* enum */
+#define SCHED_CREDIT_CHECK_RESULT_HUB_HOST_D 0x5 /* enum */
+#define SCHED_CREDIT_CHECK_RESULT_HUB_REPLAY 0x6 /* enum */
+#define SCHED_CREDIT_CHECK_RESULT_DMAC_H2C 0x7 /* enum */
+#define SCHED_CREDIT_CHECK_RESULT_SCHED_INSTANCE_LBN 0
+#define SCHED_CREDIT_CHECK_RESULT_SCHED_INSTANCE_WIDTH 8
+/* The type of node that this result refers to. */
+#define SCHED_CREDIT_CHECK_RESULT_NODE_TYPE_OFST 1
+#define SCHED_CREDIT_CHECK_RESULT_NODE_TYPE_LEN 1
+/* enum: Destination node */
+#define SCHED_CREDIT_CHECK_RESULT_DEST 0x0
+/* enum: Source node */
+#define SCHED_CREDIT_CHECK_RESULT_SOURCE 0x1
+#define SCHED_CREDIT_CHECK_RESULT_NODE_TYPE_LBN 8
+#define SCHED_CREDIT_CHECK_RESULT_NODE_TYPE_WIDTH 8
+/* Level of node in scheduler hierarchy (level 0 is the bottom of the
+ * hierarchy, increasing towards the root node).
+ */
+#define SCHED_CREDIT_CHECK_RESULT_NODE_LEVEL_OFST 2
+#define SCHED_CREDIT_CHECK_RESULT_NODE_LEVEL_LEN 2
+#define SCHED_CREDIT_CHECK_RESULT_NODE_LEVEL_LBN 16
+#define SCHED_CREDIT_CHECK_RESULT_NODE_LEVEL_WIDTH 16
+/* Node index */
+#define SCHED_CREDIT_CHECK_RESULT_NODE_INDEX_OFST 4
+#define SCHED_CREDIT_CHECK_RESULT_NODE_INDEX_LEN 4
+#define SCHED_CREDIT_CHECK_RESULT_NODE_INDEX_LBN 32
+#define SCHED_CREDIT_CHECK_RESULT_NODE_INDEX_WIDTH 32
+/* The number of credits the node is expected to have. */
+#define SCHED_CREDIT_CHECK_RESULT_EXPECTED_CREDITS_OFST 8
+#define SCHED_CREDIT_CHECK_RESULT_EXPECTED_CREDITS_LEN 4
+#define SCHED_CREDIT_CHECK_RESULT_EXPECTED_CREDITS_LBN 64
+#define SCHED_CREDIT_CHECK_RESULT_EXPECTED_CREDITS_WIDTH 32
+/* The number of credits the node actually had. */
+#define SCHED_CREDIT_CHECK_RESULT_ACTUAL_CREDITS_OFST 12
+#define SCHED_CREDIT_CHECK_RESULT_ACTUAL_CREDITS_LEN 4
+#define SCHED_CREDIT_CHECK_RESULT_ACTUAL_CREDITS_LBN 96
+#define SCHED_CREDIT_CHECK_RESULT_ACTUAL_CREDITS_WIDTH 32
+
/***********************************/
/* MC_CMD_GET_CLOCKS_INFO
* Get information about the device clocks
*/
#define MC_CMD_GET_CLOCKS_INFO 0x166
+#define MC_CMD_GET_CLOCKS_INFO_MSGSET 0x166
#undef MC_CMD_0x166_PRIVILEGE_CTG
#define MC_CMD_0x166_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24387,6 +26421,7 @@
* returns ENOSPC if the caller's table is full.
*/
#define MC_CMD_VNIC_ENCAP_RULE_ADD 0x16d
+#define MC_CMD_VNIC_ENCAP_RULE_ADD_MSGSET 0x16d
#undef MC_CMD_0x16d_PRIVILEGE_CTG
#define MC_CMD_0x16d_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24469,6 +26504,7 @@
* if the input HANDLE doesn't correspond to an existing rule.
*/
#define MC_CMD_VNIC_ENCAP_RULE_REMOVE 0x16e
+#define MC_CMD_VNIC_ENCAP_RULE_REMOVE_MSGSET 0x16e
#undef MC_CMD_0x16e_PRIVILEGE_CTG
#define MC_CMD_0x16e_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24508,303 +26544,568 @@
#define UUID_NODE_LBN 80
#define UUID_NODE_WIDTH 48
-/* MC_CMD_DEVEL_DUMP_VI_ENTRY structuredef */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_LEN 28
-/* Type of entry */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_TYPE_OFST 0
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_TYPE_LEN 4
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QDMA_SW_C2H 0x0 /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QDMA_SW_H2C 0x1 /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QDMA_HW_C2H 0x2 /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QDMA_HW_H2C 0x3 /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QDMA_CR_C2H 0x4 /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QDMA_CR_H2C 0x5 /* enum */
-/* enum: First QDMA writeback/completion queue. Used for ef100, C2H VDPA and
- * plain virtio.
- */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QDMA_WRB 0x6
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QDMA_PFTCH 0x7 /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_DMAC_H2C_QTBL 0x100 /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_DMAC_C2H_QTBL 0x101 /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_DMAC_H2C_VIO 0x10a /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_TYPE_LBN 0
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_TYPE_WIDTH 32
-/* Internal QDMA/dmac queue number for this entry */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QUEUE_NUMBER_OFST 4
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QUEUE_NUMBER_LEN 4
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QUEUE_NUMBER_LBN 32
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QUEUE_NUMBER_WIDTH 32
-/* Size of entry data */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_SIZE_OFST 8
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_SIZE_LEN 4
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_SIZE_LBN 64
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_SIZE_WIDTH 32
-/* Offset of entry data from start of MCDI message response payload */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_OFFSET_OFST 12
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_OFFSET_LEN 4
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_OFFSET_LBN 96
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_OFFSET_WIDTH 32
-/* Absolute VI of the entry, or 0xffffffff if not available/applicable */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_ABS_VI_OFST 16
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_ABS_VI_LEN 4
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_NO_ABS_VI 0xffffffff /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_ABS_VI_LBN 128
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_ABS_VI_WIDTH 32
-/* Reserved */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_RESERVED_OFST 20
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_RESERVED_LEN 8
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_RESERVED_LO_OFST 20
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_RESERVED_HI_OFST 24
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_RESERVED_LBN 160
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_RESERVED_WIDTH 64
-
-
-/***********************************/
-/* MC_CMD_DEVEL_DUMP_VI
- * Dump various parts of the hardware's state for a VI.
- */
-#define MC_CMD_DEVEL_DUMP_VI 0x1b5
-#undef MC_CMD_0x1b5_PRIVILEGE_CTG
-
-#define MC_CMD_0x1b5_PRIVILEGE_CTG SRIOV_CTG_GENERAL
-
-/* MC_CMD_DEVEL_DUMP_VI_IN msgrequest */
-#define MC_CMD_DEVEL_DUMP_VI_IN_LEN 4
-/* Absolute queue id of queue to dump state for */
-#define MC_CMD_DEVEL_DUMP_VI_IN_QID_OFST 0
-#define MC_CMD_DEVEL_DUMP_VI_IN_QID_LEN 4
-
-/* MC_CMD_DEVEL_DUMP_VI_IN_V2 msgrequest */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_LEN 20
-/* Which queue to dump. The meaning of this field dependes on ADDRESS_MODE. */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_ID_OFST 0
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_ID_LEN 4
-/* Method of referring to the queue to dump */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_ADDRESS_MODE_OFST 4
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_ADDRESS_MODE_LEN 4
-/* enum: First field refers to queue number as understood by QDMA/DMAC hardware
- */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_QUEUE_NUMBER 0x0
-/* enum: First field refers to absolute VI number */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_ABS_VI 0x1
-/* enum: First field refers to function-relative VI number on the command's
- * function
+/* PLUGIN_EXTENSION structuredef: Used within MC_CMD_PLUGIN_GET_ALL to describe
+ * an individual extension.
+ */
+#define PLUGIN_EXTENSION_LEN 20
+#define PLUGIN_EXTENSION_UUID_OFST 0
+#define PLUGIN_EXTENSION_UUID_LEN 16
+#define PLUGIN_EXTENSION_UUID_LBN 0
+#define PLUGIN_EXTENSION_UUID_WIDTH 128
+#define PLUGIN_EXTENSION_ADMIN_GROUP_OFST 16
+#define PLUGIN_EXTENSION_ADMIN_GROUP_LEN 1
+#define PLUGIN_EXTENSION_ADMIN_GROUP_LBN 128
+#define PLUGIN_EXTENSION_ADMIN_GROUP_WIDTH 8
+#define PLUGIN_EXTENSION_FLAG_ENABLED_LBN 136
+#define PLUGIN_EXTENSION_FLAG_ENABLED_WIDTH 1
+#define PLUGIN_EXTENSION_RESERVED_LBN 137
+#define PLUGIN_EXTENSION_RESERVED_WIDTH 23
+
+/* DESC_ADDR_REGION structuredef: Describes a contiguous region of DESC_ADDR
+ * space that maps to a contiguous region of TRGT_ADDR space. Addresses
+ * DESC_ADDR in the range [DESC_ADDR_BASE:DESC_ADDR_BASE + 1 <<
+ * WINDOW_SIZE_LOG2) map to TRGT_ADDR = DESC_ADDR - DESC_ADDR_BASE +
+ * TRGT_ADDR_BASE.
+ */
+#define DESC_ADDR_REGION_LEN 32
+/* The start of the region in DESC_ADDR space. */
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_OFST 0
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_LEN 8
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_LO_OFST 0
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_LO_LEN 4
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_LO_LBN 0
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_LO_WIDTH 32
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_HI_OFST 4
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_HI_LEN 4
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_HI_LBN 32
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_HI_WIDTH 32
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_LBN 0
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_WIDTH 64
+/* The start of the region in TRGT_ADDR space. Drivers can set this via
+ * MC_CMD_SET_DESC_ADDR_REGIONS.
+ */
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_OFST 8
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_LEN 8
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_LO_OFST 8
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_LO_LEN 4
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_LO_LBN 64
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_LO_WIDTH 32
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_HI_OFST 12
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_HI_LEN 4
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_HI_LBN 96
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_HI_WIDTH 32
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_LBN 64
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_WIDTH 64
+/* The size of the region. */
+#define DESC_ADDR_REGION_WINDOW_SIZE_LOG2_OFST 16
+#define DESC_ADDR_REGION_WINDOW_SIZE_LOG2_LEN 4
+#define DESC_ADDR_REGION_WINDOW_SIZE_LOG2_LBN 128
+#define DESC_ADDR_REGION_WINDOW_SIZE_LOG2_WIDTH 32
+/* The alignment restriction on TRGT_ADDR. TRGT_ADDR values set by the driver
+ * must be a multiple of 1 << TRGT_ADDR_ALIGN_LOG2.
+ */
+#define DESC_ADDR_REGION_TRGT_ADDR_ALIGN_LOG2_OFST 20
+#define DESC_ADDR_REGION_TRGT_ADDR_ALIGN_LOG2_LEN 4
+#define DESC_ADDR_REGION_TRGT_ADDR_ALIGN_LOG2_LBN 160
+#define DESC_ADDR_REGION_TRGT_ADDR_ALIGN_LOG2_WIDTH 32
+#define DESC_ADDR_REGION_RSVD_OFST 24
+#define DESC_ADDR_REGION_RSVD_LEN 8
+#define DESC_ADDR_REGION_RSVD_LO_OFST 24
+#define DESC_ADDR_REGION_RSVD_LO_LEN 4
+#define DESC_ADDR_REGION_RSVD_LO_LBN 192
+#define DESC_ADDR_REGION_RSVD_LO_WIDTH 32
+#define DESC_ADDR_REGION_RSVD_HI_OFST 28
+#define DESC_ADDR_REGION_RSVD_HI_LEN 4
+#define DESC_ADDR_REGION_RSVD_HI_LBN 224
+#define DESC_ADDR_REGION_RSVD_HI_WIDTH 32
+#define DESC_ADDR_REGION_RSVD_LBN 192
+#define DESC_ADDR_REGION_RSVD_WIDTH 64
+
+
+/***********************************/
+/* MC_CMD_GET_DESC_ADDR_INFO
+ * Returns a description of the mapping from DESC_ADDR to TRGT_ADDR for the calling function's address space.
+ */
+#define MC_CMD_GET_DESC_ADDR_INFO 0x1b7
+#define MC_CMD_GET_DESC_ADDR_INFO_MSGSET 0x1b7
+#undef MC_CMD_0x1b7_PRIVILEGE_CTG
+
+#define MC_CMD_0x1b7_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_GET_DESC_ADDR_INFO_IN msgrequest */
+#define MC_CMD_GET_DESC_ADDR_INFO_IN_LEN 0
+
+/* MC_CMD_GET_DESC_ADDR_INFO_OUT msgresponse */
+#define MC_CMD_GET_DESC_ADDR_INFO_OUT_LEN 4
+/* The type of mapping; see SF-nnnnnn-xx (EF100 driver writer's guide, once
+ * written) for details of each type.
+ */
+#define MC_CMD_GET_DESC_ADDR_INFO_OUT_MAPPING_TYPE_OFST 0
+#define MC_CMD_GET_DESC_ADDR_INFO_OUT_MAPPING_TYPE_LEN 4
+/* enum: TRGT_ADDR = DESC_ADDR */
+#define MC_CMD_GET_DESC_ADDR_INFO_OUT_MAPPING_FLAT 0x0
+/* enum: DESC_ADDR has one or more regions that map into TRGT_ADDR. The base
+ * TRGT_ADDR for each region is programmable via MCDI.
+ */
+#define MC_CMD_GET_DESC_ADDR_INFO_OUT_MAPPING_REGIONED 0x1
+
+
+/***********************************/
+/* MC_CMD_GET_DESC_ADDR_REGIONS
+ * Returns a list of the DESC_ADDR regions for the calling function's address space. Only valid if that function's address space has the REGIONED mapping from DESC_ADDR to TRGT_ADDR.
+ */
+#define MC_CMD_GET_DESC_ADDR_REGIONS 0x1b8
+#define MC_CMD_GET_DESC_ADDR_REGIONS_MSGSET 0x1b8
+#undef MC_CMD_0x1b8_PRIVILEGE_CTG
+
+#define MC_CMD_0x1b8_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_GET_DESC_ADDR_REGIONS_IN msgrequest */
+#define MC_CMD_GET_DESC_ADDR_REGIONS_IN_LEN 0
+
+/* MC_CMD_GET_DESC_ADDR_REGIONS_OUT msgresponse */
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_LENMIN 32
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_LENMAX 224
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_LENMAX_MCDI2 992
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_LEN(num) (0+32*(num))
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_REGIONS_NUM(len) (((len)-0)/32)
+/* An array of DESC_ADDR_REGION strutures. The number of entries in the array
+ * indicates the number of available regions.
+ */
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_REGIONS_OFST 0
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_REGIONS_LEN 32
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_REGIONS_MINNUM 1
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_REGIONS_MAXNUM 7
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_REGIONS_MAXNUM_MCDI2 31
+
+
+/***********************************/
+/* MC_CMD_SET_DESC_ADDR_REGIONS
+ * Set the base TRGT_ADDR for a set of DESC_ADDR regions for the calling function's address space. Only valid if that function's address space had the REGIONED mapping from DESC_ADDR to TRGT_ADDR.
+ */
+#define MC_CMD_SET_DESC_ADDR_REGIONS 0x1b9
+#define MC_CMD_SET_DESC_ADDR_REGIONS_MSGSET 0x1b9
+#undef MC_CMD_0x1b9_PRIVILEGE_CTG
+
+#define MC_CMD_0x1b9_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_SET_DESC_ADDR_REGIONS_IN msgrequest */
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_LENMIN 16
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_LENMAX 248
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_LENMAX_MCDI2 1016
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_LEN(num) (8+8*(num))
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_NUM(len) (((len)-8)/8)
+/* A bitmask indicating which regions should have their base TRGT_ADDR updated.
+ * To update the base TRGR_ADDR for a DESC_ADDR region, the corresponding bit
+ * should be set to 1.
+ */
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_SET_REGION_MASK_OFST 0
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_SET_REGION_MASK_LEN 4
+/* Reserved field; must be set to zero. */
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_RSVD_OFST 4
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_RSVD_LEN 4
+/* An array of values used to updated the base TRGT_ADDR for DESC_ADDR regions.
+ * Array indices corresponding to region numbers (i.e. the array is sparse, and
+ * included entries for regions even if the corresponding SET_REGION_MASK bit
+ * is zero).
*/
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_REL_VI 0x2
-/* enum: First field refers to function-relative VI number on a specified
- * function
- */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_REL_VI_PROXY 0x3
-/* Type of VI. Not needed if ADDRESS_MODE is QUEUE_NUMBER. */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_VI_TYPE_OFST 8
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_VI_TYPE_LEN 4
-/* enum: Return only entries used for ef100 queues (a single hardware queue) */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_EF100 0x0
-/* enum: Return entries used for virtio (Potentially two hardware queues,
- * depending on hardware implementation)
- */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_VIRTIO 0x1
-/* Only if ADDRESS_MODE is REL_VI_PROXY. Interface of function the queue is on.
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_OFST 8
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_LEN 8
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_LO_OFST 8
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_LO_LEN 4
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_LO_LBN 64
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_LO_WIDTH 32
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_HI_OFST 12
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_HI_LEN 4
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_HI_LBN 96
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_HI_WIDTH 32
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_MINNUM 1
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_MAXNUM 30
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_MAXNUM_MCDI2 126
+
+/* MC_CMD_SET_DESC_ADDR_REGIONS_OUT msgresponse */
+#define MC_CMD_SET_DESC_ADDR_REGIONS_OUT_LEN 0
+
+
+/***********************************/
+/* MC_CMD_CLIENT_CMD
+ * Execute an arbitrary MCDI command on behalf of a different client. The
+ * consequences of the command (e.g. ownership of any resources created) apply
+ * to the indicated client rather than the function client which actually sent
+ * this command. All inherent permission checks are also performed on the
+ * indicated client. The given client must be a descendant of the requestor.
+ * The command to be proxied follows immediately afterward in the host buffer
+ * (or on the UART). Chaining multiple MC_CMD_CLIENT_CMD is unnecessary and not
+ * supported. New dynamic clients may be created with MC_CMD_CLIENT_ALLOC.
*/
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_PCIE_INTERFACE_OFST 12
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_PCIE_INTERFACE_LEN 4
-/* Enum values, see field(s): */
-/* DEVEL_PCIE_INTERFACE */
-/* Only if ADDRESS_MODE is REL_VI_PROXY. PF number of the function the queue is
- * on.
- */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_PF_OFST 16
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_PF_LEN 2
-/* Only if ADDRESS_MODE is REL_VI_PROXY. VF number of the function the queue is
- * on.
- */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_VF_OFST 18
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_VF_LEN 2
-/* enum: The function is on a PF, not a VF. */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_VF_NULL 0xffff
-
-/* MC_CMD_DEVEL_DUMP_VI_OUT msgresponse */
-#define MC_CMD_DEVEL_DUMP_VI_OUT_LENMIN 4
-#define MC_CMD_DEVEL_DUMP_VI_OUT_LENMAX 252
-#define MC_CMD_DEVEL_DUMP_VI_OUT_LENMAX_MCDI2 1012
-#define MC_CMD_DEVEL_DUMP_VI_OUT_LEN(num) (0+1*(num))
-#define MC_CMD_DEVEL_DUMP_VI_OUT_DATA_NUM(len) (((len)-0)/1)
-/* Number of dump entries returned */
-#define MC_CMD_DEVEL_DUMP_VI_OUT_NUM_ENTRIES_OFST 0
-#define MC_CMD_DEVEL_DUMP_VI_OUT_NUM_ENTRIES_LEN 4
-#define MC_CMD_DEVEL_DUMP_VI_OUT_DATA_OFST 0
-#define MC_CMD_DEVEL_DUMP_VI_OUT_DATA_LBN 0
-#define MC_CMD_DEVEL_DUMP_VI_OUT_DATA_WIDTH 8
-#define MC_CMD_DEVEL_DUMP_VI_OUT_DATA_MINNUM 0
-#define MC_CMD_DEVEL_DUMP_VI_OUT_DATA_MAXNUM 252
-#define MC_CMD_DEVEL_DUMP_VI_OUT_DATA_MAXNUM_MCDI2 1020
-/* Array of MC_CMD_DEVEL_DUMP_VI_ENTRY structures of length NUM_ENTRIES */
-#define MC_CMD_DEVEL_DUMP_VI_OUT_ENTRIES_OFST 4
-#define MC_CMD_DEVEL_DUMP_VI_OUT_ENTRIES_LEN 28
-#define MC_CMD_DEVEL_DUMP_VI_OUT_ENTRIES_MINNUM 0
-#define MC_CMD_DEVEL_DUMP_VI_OUT_ENTRIES_MAXNUM 8
-#define MC_CMD_DEVEL_DUMP_VI_OUT_ENTRIES_MAXNUM_MCDI2 36
-
-/* MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY structuredef */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_LEN 16
-/* What register this is */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_REG_OFST 0
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_REG_LEN 4
-/* enum: Catchall for registers that aren't in this enum. Nothing should be in
- * this long-term
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_UNKNOWN 0xffffffff
-/* enum: S2IC Converter Debug Packet Counter register. Informs number of
- * packets passed through Converter.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_H2C_S2IC_DBG_PKT_CNT 0x0
-/* enum: IC2S Converter Debug Packet Counter register. Informs number of
- * packets passed through Converter.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_C2H_IC2S_DBG_PKT_CNT 0x1
-/* enum: Event Controller Tx path Debug register. Count of Moderator Tx events,
- * not incl D2C, VirtIO, Dproxy.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TX_DEBUG 0x2
-/* enum: Event Controller Rx path Debug register. Count of Moderator Rx events.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_RX_DEBUG 0x3
-/* enum: Event Controller Debug register. Count of Total EVC events. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TOTAL_DEBUG 0x4
-/* enum: Same info as EVC_RX_DEBUG; collected at different location in design
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_RX_EF100_DEBUG 0x5
-/* enum: Same info as EVC_TX_DEBUG; collected at different location in design
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TX_EF100_DEBUG 0x6
-/* enum: Event Controller Debug register. Count of Tx VirtIO events. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TX_VIRTIO_DEBUG 0x7
-/* enum: Event Controller Debug register. Count of Tx Descriptor Proxy events.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TX_DPRXY_DEBUG 0x8
-/* enum: Event Controller Debug register. Count of Tx VirtQ Descriptor Proxy
- * events.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TX_VIRTQ_DPRXY_DEBUG 0x9
-/* enum: Event Controller Debug register. Count of Tx Descriptor-to-Completion
- * events.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TX_D2C_DEBUG 0xa
-/* enum: Event Controller Debug register. Count of Tx VirtIO Descriptor-to-
- * Completion events.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TX_VIRTQ_D2C_DEBUG 0xb
-/* enum: Event Controller Debug register. Count of Tx Timestamp events. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TX_TSTAMP_DEBUG 0xc
-/* enum: Event Controller Debug register. Count of Rx EvQ Timeout events. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_RX_EVQ_TIMEOUT_DEBUG 0xd
-/* enum: Event Controller Debug register. Count of MC events. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_MC_DEBUG 0xe
-/* enum: Event Controller Debug register. Count of EQDMA VirtIO Control events.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_EQDMA_VIO_CTL_DEBUG 0xf
-/* enum: Counter of QDMA Dropped C2H packets. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_DMAC_C2H_DROP_CTR_REG 0x10
-/* enum: Number of packets received by c host fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_C_H_PACKETS_IN_TBL 0x11
-/* enum: Number of packets sent by c host fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_C_H_PACKETS_OUT_TBL 0x12
-/* enum: Number of packets received by c plugin fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_C_P_PACKETS_IN_TBL 0x13
-/* enum: Number of packets received by b host fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_B_H_PACKETS_IN_TBL 0x14
-/* enum: Number of packets received by b net fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_B_N_PACKETS_IN_TBL 0x15
-/* enum: Number of packets received by b host fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_B_PH_PACKETS_IN_TBL 0x16
-/* enum: Number of packets received by b net fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_B_PN_PACKETS_IN_TBL 0x17
-/* enum: Number of packets sent by b net fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_B_PACKETS_OUT_TBL 0x18
-/* enum: Number of packets received by c net fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_C_N_PACKETS_IN_TBL 0x19
-/* enum: Number of packets sent by c net fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_C_N_PACKETS_OUT_TBL 0x1a
-/* enum: Number of packets received by ha fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_HA_PACKETS_IN_TBL 0x1b
-/* enum: Number of packets received by ha host shadow fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_HA_PH_PACKETS_IN_TBL 0x1c
-/* enum: Number of packets received by ha fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_HA_PACKETS_OUT_TBL 0x1d
-/* enum: Number of packets received by d hub fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_D_PACKETS_IN_TBL 0x1e
-/* enum: Number of packets received by d hub plugin fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_D_P_PACKETS_IN_TBL 0x1f
-/* enum: Number of packets received by d hub plugin fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_D_O_PACKETS_IN_TBL 0x20
-/* enum: Number of packets sent to dmac. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_D_PACKETS_OUT_TBL 0x21
-/* enum: Number of packets received by na fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_NA_PACKETS_IN_TBL 0x22
-/* enum: Number of packets dropped by na fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_NA_PACKETS_DROPPED_TBL 0x23
-/* enum: Number of packets sent by na fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_NA_PACKETS_OUT_TBL 0x24
-/* enum: Number of packets received by rp hub fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_RP_PACKETS_IN_TBL 0x25
-/* enum: Number of packets removed from fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_RP_PACKETS_OUT_TBL 0x26
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_REG_LBN 0
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_REG_WIDTH 32
-/* If REG is a table, the table row. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_ROW_OFST 4
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_ROW_LEN 4
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_ROW_LBN 32
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_ROW_WIDTH 32
-/* Address of the register (as seen by the MC) */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_ADDRESS_OFST 8
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_ADDRESS_LEN 4
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_ADDRESS_LBN 64
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_ADDRESS_WIDTH 32
-/* Value of the register */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_VALUE_OFST 12
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_VALUE_LEN 4
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_VALUE_LBN 96
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_VALUE_WIDTH 32
-
-
-/***********************************/
-/* MC_CMD_DEVEL_DUMP_RHEAD_REGS
- * Dump an assortment of hopefully useful riverhead debug registers
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS 0x1b6
-#undef MC_CMD_0x1b6_PRIVILEGE_CTG
-
-#define MC_CMD_0x1b6_PRIVILEGE_CTG SRIOV_CTG_GENERAL
-
-/* MC_CMD_DEVEL_DUMP_RHEAD_REGS_IN msgrequest */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_IN_LEN 4
-/* Which page of registers to retrieve. Page 0 always exists, later pages may
- * also exist if there are too many registers to fit in a single mcdi response.
- * NUM_PAGES in the response will tell you how many there are.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_IN_PAGE_OFST 0
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_IN_PAGE_LEN 4
-
-/* MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT msgresponse */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_LENMIN 8
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_LENMAX 248
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_LENMAX_MCDI2 1016
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_LEN(num) (8+16*(num))
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_REGS_NUM(len) (((len)-8)/16)
-/* Number of registers dumped in this response */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_NUM_REGS_OFST 0
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_NUM_REGS_LEN 4
-/* How many pages of registers are available to extract */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_NUM_PAGES_OFST 4
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_NUM_PAGES_LEN 4
-/* Array of MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY structs, one for each register
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_REGS_OFST 8
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_REGS_LEN 16
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_REGS_MINNUM 0
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_REGS_MAXNUM 15
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_REGS_MAXNUM_MCDI2 63
+#define MC_CMD_CLIENT_CMD 0x1ba
+#define MC_CMD_CLIENT_CMD_MSGSET 0x1ba
+#undef MC_CMD_0x1ba_PRIVILEGE_CTG
+
+#define MC_CMD_0x1ba_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_CLIENT_CMD_IN msgrequest */
+#define MC_CMD_CLIENT_CMD_IN_LEN 4
+/* The client as which to execute the following command. */
+#define MC_CMD_CLIENT_CMD_IN_CLIENT_ID_OFST 0
+#define MC_CMD_CLIENT_CMD_IN_CLIENT_ID_LEN 4
+
+/* MC_CMD_CLIENT_CMD_OUT msgresponse */
+#define MC_CMD_CLIENT_CMD_OUT_LEN 0
+
+
+/***********************************/
+/* MC_CMD_CLIENT_ALLOC
+ * Create a new client object. Clients are a system for delineating NIC
+ * resource ownership, such that groups of resources may be torn down as a
+ * unit. See also MC_CMD_CLIENT_CMD. See XN-200265-TC for background, concepts
+ * and a glossary. Clients created by this command are known as "dynamic
+ * clients". The newly-created client is a child of the client which sent this
+ * command. The caller must have the GRP_ALLOC_CLIENT privilege. The new client
+ * initially has no permission to do anything; see
+ * MC_CMD_DEVEL_CLIENT_PRIVILEGE_MODIFY.
+ */
+#define MC_CMD_CLIENT_ALLOC 0x1bb
+#define MC_CMD_CLIENT_ALLOC_MSGSET 0x1bb
+#undef MC_CMD_0x1bb_PRIVILEGE_CTG
+
+#define MC_CMD_0x1bb_PRIVILEGE_CTG SRIOV_CTG_ALLOC_CLIENT
+
+/* MC_CMD_CLIENT_ALLOC_IN msgrequest */
+#define MC_CMD_CLIENT_ALLOC_IN_LEN 0
+
+/* MC_CMD_CLIENT_ALLOC_OUT msgresponse */
+#define MC_CMD_CLIENT_ALLOC_OUT_LEN 4
+/* The ID of the new client object which has been created. */
+#define MC_CMD_CLIENT_ALLOC_OUT_CLIENT_ID_OFST 0
+#define MC_CMD_CLIENT_ALLOC_OUT_CLIENT_ID_LEN 4
+
+
+/***********************************/
+/* MC_CMD_CLIENT_FREE
+ * Destroy and release an existing client object. All resources owned by that
+ * client (including its child clients, and thus all resources owned by the
+ * entire family tree) are freed.
+ */
+#define MC_CMD_CLIENT_FREE 0x1bc
+#define MC_CMD_CLIENT_FREE_MSGSET 0x1bc
+#undef MC_CMD_0x1bc_PRIVILEGE_CTG
+
+#define MC_CMD_0x1bc_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_CLIENT_FREE_IN msgrequest */
+#define MC_CMD_CLIENT_FREE_IN_LEN 4
+/* The ID of the client to be freed. This client must be a descendant of the
+ * requestor. A client cannot free itself.
+ */
+#define MC_CMD_CLIENT_FREE_IN_CLIENT_ID_OFST 0
+#define MC_CMD_CLIENT_FREE_IN_CLIENT_ID_LEN 4
+
+/* MC_CMD_CLIENT_FREE_OUT msgresponse */
+#define MC_CMD_CLIENT_FREE_OUT_LEN 0
+
+
+/***********************************/
+/* MC_CMD_SET_VI_USER
+ * Assign partial rights over this VI to another client. VIs have an 'owner'
+ * and a 'user'. The owner is the client which allocated the VI
+ * (MC_CMD_ALLOC_VIS) and cannot be changed. The user is the client which has
+ * permission to create queues and other resources on that VI. Initially
+ * user==owner, but the user can be changed by this command; the resources thus
+ * created are then owned by the user-client. Only the VI owner can call this
+ * command, and the request will fail if there are any outstanding child
+ * resources (e.g. queues) currently allocated from this VI.
+ */
+#define MC_CMD_SET_VI_USER 0x1be
+#define MC_CMD_SET_VI_USER_MSGSET 0x1be
+#undef MC_CMD_0x1be_PRIVILEGE_CTG
+
+#define MC_CMD_0x1be_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_SET_VI_USER_IN msgrequest */
+#define MC_CMD_SET_VI_USER_IN_LEN 8
+/* Function-relative VI number to modify. */
+#define MC_CMD_SET_VI_USER_IN_INSTANCE_OFST 0
+#define MC_CMD_SET_VI_USER_IN_INSTANCE_LEN 4
+/* Client ID to become the new user. This must be a descendant of the owning
+ * client, the owning client itself, or the special value MC_CMD_CLIENT_ID_SELF
+ * which is synonymous with the owning client.
+ */
+#define MC_CMD_SET_VI_USER_IN_CLIENT_ID_OFST 4
+#define MC_CMD_SET_VI_USER_IN_CLIENT_ID_LEN 4
+
+/* MC_CMD_SET_VI_USER_OUT msgresponse */
+#define MC_CMD_SET_VI_USER_OUT_LEN 0
+
+
+/***********************************/
+/* MC_CMD_GET_CLIENT_MAC_ADDRESSES
+ * A device reports a set of MAC addresses for each client to use, known as the
+ * "permanent MAC addresses". Those MAC addresses are provided by the client's
+ * administrator, e.g. via MC_CMD_SET_CLIENT_MAC_ADDRESSES, and are intended as
+ * a hint to that client which MAC address its administrator would like to use
+ * to identity itself. This API exists solely to allow communication of MAC
+ * address from administrator to adminstree, and has no inherent interaction
+ * with switching within the device. There is no guarantee that a client will
+ * be able to send traffic with a source MAC address taken from the list of MAC
+ * address reported, nor is there a guarantee that a client will be able to
+ * resource traffic with a destination MAC taken from the list of MAC
+ * addresses. Likewise, there is no guarantee that a client will not be able to
+ * use a MAC address not present in the list. Restrictions on switching are
+ * controlled either through the EVB API if operating in EVB mode, or via MAE
+ * rules if host software is directly managing the MAE. In order to allow
+ * tenants to use this API whilst a provider is using the EVB API, the MAC
+ * addresses reported by MC_CMD_GET_CLIENT_MAC_ADDRESSES will be augmented with
+ * any MAC addresses associated with the vPort assigned to the caller. In order
+ * to allow tenants to use the EVB API whilst a provider is using this API, if
+ * a client queries the MAC addresses for a vPort using the host_evb_port_id
+ * EVB_PORT_ASSIGNED, that list of MAC addresses will be augmented with the MAC
+ * addresses assigned to the calling client. This query can either be explicit
+ * (i.e. MC_CMD_VPORT_GET_MAC_ADDRESSES) or implicit (e.g. creation of a
+ * vAdaptor with a NULL/automatic MAC address). Changing the MAC address on a
+ * vAdaptor only affects VNIC steering filters; it has no effect on the MAC
+ * addresses assigned to the vAdaptor's owner. VirtIO clients behave as EVB
+ * clients. On VirtIO device reset, a vAdaptor is created with an automatic MAC
+ * address. Querying the VirtIO device's MAC address queries the underlying
+ * vAdaptor's MAC address. Setting the VirtIO device's MAC address sets the
+ * underlying vAdaptor's MAC addresses.
+ */
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES 0x1c4
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_MSGSET 0x1c4
+#undef MC_CMD_0x1c4_PRIVILEGE_CTG
+
+#define MC_CMD_0x1c4_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_GET_CLIENT_MAC_ADDRESSES_IN msgrequest */
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_IN_LEN 4
+/* A handle for the client for whom MAC address should be obtained. Use
+ * CLIENT_HANDLE_SELF to obtain the MAC addresses assigned to the calling
+ * client.
+ */
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_IN_CLIENT_HANDLE_OFST 0
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_IN_CLIENT_HANDLE_LEN 4
+
+/* MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT msgresponse */
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_LENMIN 0
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_LENMAX 252
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_LENMAX_MCDI2 1020
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_LEN(num) (0+6*(num))
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_MAC_ADDRS_NUM(len) (((len)-0)/6)
+/* An array of MAC addresses assigned to the client. */
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_MAC_ADDRS_OFST 0
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_MAC_ADDRS_LEN 6
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_MAC_ADDRS_MINNUM 0
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_MAC_ADDRS_MAXNUM 42
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_MAC_ADDRS_MAXNUM_MCDI2 170
+
+
+/***********************************/
+/* MC_CMD_SET_CLIENT_MAC_ADDRESSES
+ * Set the permanent MAC addresses for a client. The caller must by an
+ * administrator of the target client. See MC_CMD_GET_CLIENT_MAC_ADDRESSES for
+ * additional detail.
+ */
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES 0x1c5
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_MSGSET 0x1c5
+#undef MC_CMD_0x1c5_PRIVILEGE_CTG
+
+#define MC_CMD_0x1c5_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN msgrequest */
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_LENMIN 4
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_LENMAX 250
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_LENMAX_MCDI2 1018
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_LEN(num) (4+6*(num))
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_MAC_ADDRS_NUM(len) (((len)-4)/6)
+/* A handle for the client for whom MAC addresses should be set */
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_CLIENT_HANDLE_OFST 0
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_CLIENT_HANDLE_LEN 4
+/* An array of MAC addresses to assign to the client. */
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_MAC_ADDRS_OFST 4
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_MAC_ADDRS_LEN 6
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_MAC_ADDRS_MINNUM 0
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_MAC_ADDRS_MAXNUM 41
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_MAC_ADDRS_MAXNUM_MCDI2 169
+
+/* MC_CMD_SET_CLIENT_MAC_ADDRESSES_OUT msgresponse */
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_OUT_LEN 0
+
+
+/***********************************/
+/* MC_CMD_GET_BOARD_ATTR
+ * Retrieve physical build-level board attributes as configured at
+ * manufacturing stage. Fields originate from EEPROM and per-platform constants
+ * in firmware. Fields are used in development to identify/ differentiate
+ * boards based on build levels/parameters, and also in manufacturing to cross
+ * check "what was programmed in manufacturing" is same as "what firmware
+ * thinks has been programmed" as there are two layers to translation within
+ * firmware before the attributes reach this MCDI handler. Some parameters are
+ * retrieved as part of other commands and therefore not replicated here. See
+ * GET_VERSION_OUT.
+ */
+#define MC_CMD_GET_BOARD_ATTR 0x1c6
+#define MC_CMD_GET_BOARD_ATTR_MSGSET 0x1c6
+#undef MC_CMD_0x1c6_PRIVILEGE_CTG
+
+#define MC_CMD_0x1c6_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_GET_BOARD_ATTR_IN msgrequest */
+#define MC_CMD_GET_BOARD_ATTR_IN_LEN 0
+
+/* MC_CMD_GET_BOARD_ATTR_OUT msgresponse */
+#define MC_CMD_GET_BOARD_ATTR_OUT_LEN 16
+/* Defines board capabilities and validity of attributes returned in this
+ * response-message.
+ */
+#define MC_CMD_GET_BOARD_ATTR_OUT_FLAGS_OFST 0
+#define MC_CMD_GET_BOARD_ATTR_OUT_FLAGS_LEN 4
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_FAN_OFST 0
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_FAN_LBN 0
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_FAN_WIDTH 1
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_SOC_OFST 0
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_SOC_LBN 1
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_SOC_WIDTH 1
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_AUX_POWER_OFST 0
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_AUX_POWER_LBN 2
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_AUX_POWER_WIDTH 1
+#define MC_CMD_GET_BOARD_ATTR_OUT_ATTRIBUTES_OFST 4
+#define MC_CMD_GET_BOARD_ATTR_OUT_ATTRIBUTES_LEN 4
+#define MC_CMD_GET_BOARD_ATTR_OUT_SOC_EE_OFST 4
+#define MC_CMD_GET_BOARD_ATTR_OUT_SOC_EE_LBN 0
+#define MC_CMD_GET_BOARD_ATTR_OUT_SOC_EE_WIDTH 1
+#define MC_CMD_GET_BOARD_ATTR_OUT_SUC_EE_OFST 4
+#define MC_CMD_GET_BOARD_ATTR_OUT_SUC_EE_LBN 1
+#define MC_CMD_GET_BOARD_ATTR_OUT_SUC_EE_WIDTH 1
+#define MC_CMD_GET_BOARD_ATTR_OUT_FPGA_VOLTAGES_SUPPORTED_OFST 4
+#define MC_CMD_GET_BOARD_ATTR_OUT_FPGA_VOLTAGES_SUPPORTED_LBN 16
+#define MC_CMD_GET_BOARD_ATTR_OUT_FPGA_VOLTAGES_SUPPORTED_WIDTH 8
+/* enum: The FPGA voltage on the adapter can be set to low */
+#define MC_CMD_FPGA_VOLTAGE_LOW 0x0
+/* enum: The FPGA voltage on the adapter can be set to regular */
+#define MC_CMD_FPGA_VOLTAGE_REG 0x1
+/* enum: The FPGA voltage on the adapter can be set to high */
+#define MC_CMD_FPGA_VOLTAGE_HIGH 0x2
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_COUNT_OFST 4
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_COUNT_LBN 24
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_COUNT_WIDTH 8
+/* An array of cage types on the board */
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_OFST 8
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_LEN 1
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_NUM 8
+/* enum: The cages are not known */
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_UNKNOWN 0x0
+/* enum: The cages are SFP/SFP+ */
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_SFP 0x1
+/* enum: The cages are QSFP/QSFP+ */
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_QSFP 0x2
+
+
+/***********************************/
+/* MC_CMD_GET_SOC_STATE
+ * Retrieve current state of the System-on-Chip. This command is valid when
+ * MC_CMD_GET_BOARD_ATTR:HAS_SOC is set.
+ */
+#define MC_CMD_GET_SOC_STATE 0x1c7
+#define MC_CMD_GET_SOC_STATE_MSGSET 0x1c7
+#undef MC_CMD_0x1c7_PRIVILEGE_CTG
+
+#define MC_CMD_0x1c7_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_GET_SOC_STATE_IN msgrequest */
+#define MC_CMD_GET_SOC_STATE_IN_LEN 0
+
+/* MC_CMD_GET_SOC_STATE_OUT msgresponse */
+#define MC_CMD_GET_SOC_STATE_OUT_LEN 12
+/* Status flags for the SoC */
+#define MC_CMD_GET_SOC_STATE_OUT_FLAGS_OFST 0
+#define MC_CMD_GET_SOC_STATE_OUT_FLAGS_LEN 4
+#define MC_CMD_GET_SOC_STATE_OUT_SHOULD_THROTTLE_OFST 0
+#define MC_CMD_GET_SOC_STATE_OUT_SHOULD_THROTTLE_LBN 0
+#define MC_CMD_GET_SOC_STATE_OUT_SHOULD_THROTTLE_WIDTH 1
+#define MC_CMD_GET_SOC_STATE_OUT_OS_RECOVERY_REQUIRED_OFST 0
+#define MC_CMD_GET_SOC_STATE_OUT_OS_RECOVERY_REQUIRED_LBN 1
+#define MC_CMD_GET_SOC_STATE_OUT_OS_RECOVERY_REQUIRED_WIDTH 1
+#define MC_CMD_GET_SOC_STATE_OUT_WDT_FIRED_OFST 0
+#define MC_CMD_GET_SOC_STATE_OUT_WDT_FIRED_LBN 2
+#define MC_CMD_GET_SOC_STATE_OUT_WDT_FIRED_WIDTH 1
+/* Status fields for the SoC */
+#define MC_CMD_GET_SOC_STATE_OUT_ATTRIBUTES_OFST 4
+#define MC_CMD_GET_SOC_STATE_OUT_ATTRIBUTES_LEN 4
+#define MC_CMD_GET_SOC_STATE_OUT_RUN_STATE_OFST 4
+#define MC_CMD_GET_SOC_STATE_OUT_RUN_STATE_LBN 0
+#define MC_CMD_GET_SOC_STATE_OUT_RUN_STATE_WIDTH 8
+/* enum: Power on (set by SUC on power up) */
+#define MC_CMD_GET_SOC_STATE_OUT_SOC_BOOT 0x0
+/* enum: Running bootloader */
+#define MC_CMD_GET_SOC_STATE_OUT_SOC_BOOTLOADER 0x1
+/* enum: Bootloader has started OS. OS is booting */
+#define MC_CMD_GET_SOC_STATE_OUT_SOC_OS_START 0x2
+/* enum: OS is running */
+#define MC_CMD_GET_SOC_STATE_OUT_SOC_OS_RUNNING 0x3
+/* enum: Maintenance OS is running */
+#define MC_CMD_GET_SOC_STATE_OUT_SOC_OS_MAINTENANCE 0x4
+/* Number of SoC resets since power on */
+#define MC_CMD_GET_SOC_STATE_OUT_RESET_COUNT_OFST 8
+#define MC_CMD_GET_SOC_STATE_OUT_RESET_COUNT_LEN 4
+
+
+/***********************************/
+/* MC_CMD_CHECK_SCHEDULER_CREDITS
+ * For debugging purposes. For each source and destination node in the hardware
+ * schedulers, check whether the number of credits is as it should be. This
+ * should only be used when the NIC is idle, because collection is not atomic
+ * and because the expected credit counts are only meaningful when no traffic
+ * is flowing.
+ */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS 0x1c8
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_MSGSET 0x1c8
+#undef MC_CMD_0x1c8_PRIVILEGE_CTG
+
+#define MC_CMD_0x1c8_PRIVILEGE_CTG SRIOV_CTG_ADMIN
+
+/* MC_CMD_CHECK_SCHEDULER_CREDITS_IN msgrequest */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_IN_LEN 8
+/* Flags for the request */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_IN_FLAGS_OFST 0
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_IN_FLAGS_LEN 4
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_IN_REPORT_ALL_OFST 0
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_IN_REPORT_ALL_LBN 0
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_IN_REPORT_ALL_WIDTH 1
+/* If there are too many results to fit into an MCDI response, they're split
+ * into pages. This field specifies which (0-indexed) page to request. A
+ * request with PAGE=0 will snapshot the results, and subsequent requests with
+ * PAGE>0 will return data from the most recent snapshot. The GENERATION field
+ * in the response allows callers to verify that all responses correspond to
+ * the same snapshot.
+ */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_IN_PAGE_OFST 4
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_IN_PAGE_LEN 4
+
+/* MC_CMD_CHECK_SCHEDULER_CREDITS_OUT msgresponse */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_LENMIN 16
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_LENMAX 240
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_LENMAX_MCDI2 1008
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_LEN(num) (16+16*(num))
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_NUM(len) (((len)-16)/16)
+/* The total number of results (across all pages). */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_TOTAL_RESULTS_OFST 0
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_TOTAL_RESULTS_LEN 4
+/* The number of pages that the response is split across. */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_NUM_PAGES_OFST 4
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_NUM_PAGES_LEN 4
+/* The number of results in this response. */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_THIS_PAGE_OFST 8
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_THIS_PAGE_LEN 4
+/* Result generation count. Incremented any time a request is made with PAGE=0.
+ */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_GENERATION_OFST 12
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_GENERATION_LEN 4
+/* The results, as an array of SCHED_CREDIT_CHECK_RESULT structures. */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_OFST 16
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_LEN 16
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_MINNUM 0
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_MAXNUM 14
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_MAXNUM_MCDI2 62
/* FUNCTION_PERSONALITY structuredef: The meanings of the personalities are
* defined in SF-120734-TC with more information in SF-122717-TC.
@@ -24839,6 +27140,7 @@
* Get a list of the virtio features supported by the device.
*/
#define MC_CMD_VIRTIO_GET_FEATURES 0x168
+#define MC_CMD_VIRTIO_GET_FEATURES_MSGSET 0x168
#undef MC_CMD_0x168_PRIVILEGE_CTG
#define MC_CMD_0x168_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24867,7 +27169,13 @@
#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_OFST 0
#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_LEN 8
#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_LO_OFST 0
+#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_LO_LEN 4
+#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_LO_LBN 0
+#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_LO_WIDTH 32
#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_HI_OFST 4
+#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_HI_LEN 4
+#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_HI_LBN 32
+#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_HI_WIDTH 32
/***********************************/
@@ -24877,6 +27185,7 @@
* the driver fails to request a feature which the device requires.
*/
#define MC_CMD_VIRTIO_TEST_FEATURES 0x169
+#define MC_CMD_VIRTIO_TEST_FEATURES_MSGSET 0x169
#undef MC_CMD_0x169_PRIVILEGE_CTG
#define MC_CMD_0x169_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24898,7 +27207,13 @@
#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_OFST 8
#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_LEN 8
#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_LO_OFST 8
+#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_LO_LEN 4
+#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_LO_LBN 64
+#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_LO_WIDTH 32
#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_HI_OFST 12
+#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_HI_LEN 4
+#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_HI_LBN 96
+#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_HI_WIDTH 32
/* MC_CMD_VIRTIO_TEST_FEATURES_OUT msgresponse */
#define MC_CMD_VIRTIO_TEST_FEATURES_OUT_LEN 0
@@ -24912,6 +27227,7 @@
* invalid.
*/
#define MC_CMD_VIRTIO_INIT_QUEUE 0x16a
+#define MC_CMD_VIRTIO_INIT_QUEUE_MSGSET 0x16a
#undef MC_CMD_0x16a_PRIVILEGE_CTG
#define MC_CMD_0x16a_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24956,17 +27272,35 @@
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_OFST 16
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_LEN 8
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_LO_OFST 16
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_LO_LEN 4
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_LO_LBN 128
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_LO_WIDTH 32
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_HI_OFST 20
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_HI_LEN 4
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_HI_LBN 160
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_HI_WIDTH 32
/* Address of the available ring in the virtqueue. */
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_OFST 24
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_LEN 8
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_LO_OFST 24
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_LO_LEN 4
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_LO_LBN 192
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_LO_WIDTH 32
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_HI_OFST 28
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_HI_LEN 4
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_HI_LBN 224
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_HI_WIDTH 32
/* Address of the used ring in the virtqueue. */
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_OFST 32
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_LEN 8
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_LO_OFST 32
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_LO_LEN 4
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_LO_LBN 256
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_LO_WIDTH 32
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_HI_OFST 36
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_HI_LEN 4
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_HI_LBN 288
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_HI_WIDTH 32
/* PASID to use on PCIe transactions involving this queue. Ignored if the
* USE_PASID flag is not set.
*/
@@ -24990,7 +27324,13 @@
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_OFST 48
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_LEN 8
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_LO_OFST 48
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_LO_LEN 4
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_LO_LBN 384
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_LO_WIDTH 32
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_HI_OFST 52
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_HI_LEN 4
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_HI_LBN 416
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_HI_WIDTH 32
/* Enum values, see field(s): */
/* MC_CMD_VIRTIO_GET_FEATURES/MC_CMD_VIRTIO_GET_FEATURES_OUT/FEATURES */
/* The initial producer index for this queue's used ring. If this queue is
@@ -25023,6 +27363,7 @@
* Destroy a virtio virtqueue
*/
#define MC_CMD_VIRTIO_FINI_QUEUE 0x16b
+#define MC_CMD_VIRTIO_FINI_QUEUE_MSGSET 0x16b
#undef MC_CMD_0x16b_PRIVILEGE_CTG
#define MC_CMD_0x16b_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -25063,6 +27404,7 @@
* queue(s) to be allocated.
*/
#define MC_CMD_VIRTIO_GET_DOORBELL_OFFSET 0x16c
+#define MC_CMD_VIRTIO_GET_DOORBELL_OFFSET_MSGSET 0x16c
#undef MC_CMD_0x16c_PRIVILEGE_CTG
#define MC_CMD_0x16c_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -25132,12 +27474,18 @@
#define PCIE_FUNCTION_VF_NULL 0xffff
#define PCIE_FUNCTION_VF_LBN 16
#define PCIE_FUNCTION_VF_WIDTH 16
-/* PCIe interface of the function */
+/* PCIe interface of the function. Values should be taken from the
+ * PCIE_INTERFACE enum
+ */
#define PCIE_FUNCTION_INTF_OFST 4
#define PCIE_FUNCTION_INTF_LEN 4
-/* enum: Host PCIe interface */
+/* enum: Host PCIe interface. (Alias for HOST_PRIMARY, provided for backwards
+ * compatibility)
+ */
#define PCIE_FUNCTION_INTF_HOST 0x0
-/* enum: Application Processor interface */
+/* enum: Application Processor interface (alias for NIC_EMBEDDED, provided for
+ * backwards compatibility)
+ */
#define PCIE_FUNCTION_INTF_AP 0x1
#define PCIE_FUNCTION_INTF_LBN 32
#define PCIE_FUNCTION_INTF_WIDTH 32
@@ -25157,6 +27505,7 @@
* MC_CMD_DESC_PROXY_FUNC_COMMIT_IN.
*/
#define MC_CMD_DESC_PROXY_FUNC_CREATE 0x172
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_MSGSET 0x172
#undef MC_CMD_0x172_PRIVILEGE_CTG
#define MC_CMD_0x172_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25170,7 +27519,19 @@
#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_OFST 0
#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_LEN 8
#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_LO_OFST 0
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_LO_LEN 4
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_LO_LBN 0
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_LO_WIDTH 32
#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_HI_OFST 4
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_HI_LEN 4
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_HI_LBN 32
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_HI_WIDTH 32
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_PF_OFST 0
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_PF_LEN 2
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_VF_OFST 2
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_VF_LEN 2
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_INTF_OFST 4
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_INTF_LEN 4
/* The personality to set. The meanings of the personalities are defined in
* SF-120734-TC with more information in SF-122717-TC. At present, we only
* support proxying for VIRTIO_BLK
@@ -25194,7 +27555,19 @@
#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_OFST 4
#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_LEN 8
#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_LO_OFST 4
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_LO_LEN 4
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_LO_LBN 32
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_LO_WIDTH 32
#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_HI_OFST 8
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_HI_LEN 4
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_HI_LBN 64
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_HI_WIDTH 32
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_PF_OFST 4
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_PF_LEN 2
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_VF_OFST 6
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_VF_LEN 2
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_INTF_OFST 8
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_INTF_LEN 4
/***********************************/
@@ -25205,6 +27578,7 @@
* ownership is released.
*/
#define MC_CMD_DESC_PROXY_FUNC_DESTROY 0x173
+#define MC_CMD_DESC_PROXY_FUNC_DESTROY_MSGSET 0x173
#undef MC_CMD_0x173_PRIVILEGE_CTG
#define MC_CMD_0x173_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25235,7 +27609,13 @@
#define VIRTIO_BLK_CONFIG_FEATURES_OFST 0
#define VIRTIO_BLK_CONFIG_FEATURES_LEN 8
#define VIRTIO_BLK_CONFIG_FEATURES_LO_OFST 0
+#define VIRTIO_BLK_CONFIG_FEATURES_LO_LEN 4
+#define VIRTIO_BLK_CONFIG_FEATURES_LO_LBN 0
+#define VIRTIO_BLK_CONFIG_FEATURES_LO_WIDTH 32
#define VIRTIO_BLK_CONFIG_FEATURES_HI_OFST 4
+#define VIRTIO_BLK_CONFIG_FEATURES_HI_LEN 4
+#define VIRTIO_BLK_CONFIG_FEATURES_HI_LBN 32
+#define VIRTIO_BLK_CONFIG_FEATURES_HI_WIDTH 32
#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_BARRIER_OFST 0
#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_BARRIER_LBN 0
#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_BARRIER_WIDTH 1
@@ -25308,7 +27688,13 @@
#define VIRTIO_BLK_CONFIG_CAPACITY_OFST 8
#define VIRTIO_BLK_CONFIG_CAPACITY_LEN 8
#define VIRTIO_BLK_CONFIG_CAPACITY_LO_OFST 8
+#define VIRTIO_BLK_CONFIG_CAPACITY_LO_LEN 4
+#define VIRTIO_BLK_CONFIG_CAPACITY_LO_LBN 64
+#define VIRTIO_BLK_CONFIG_CAPACITY_LO_WIDTH 32
#define VIRTIO_BLK_CONFIG_CAPACITY_HI_OFST 12
+#define VIRTIO_BLK_CONFIG_CAPACITY_HI_LEN 4
+#define VIRTIO_BLK_CONFIG_CAPACITY_HI_LBN 96
+#define VIRTIO_BLK_CONFIG_CAPACITY_HI_WIDTH 32
#define VIRTIO_BLK_CONFIG_CAPACITY_LBN 64
#define VIRTIO_BLK_CONFIG_CAPACITY_WIDTH 64
/* Maximum size of any single segment. Only valid when VIRTIO_BLK_F_SIZE_MAX is
@@ -25445,6 +27831,7 @@
* not persisted until the caller commits with MC_CMD_DESC_PROXY_FUNC_COMMIT_IN
*/
#define MC_CMD_DESC_PROXY_FUNC_CONFIG_SET 0x174
+#define MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_MSGSET 0x174
#undef MC_CMD_0x174_PRIVILEGE_CTG
#define MC_CMD_0x174_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25485,6 +27872,7 @@
* delivered to callers MCDI event queue.
*/
#define MC_CMD_DESC_PROXY_FUNC_COMMIT 0x175
+#define MC_CMD_DESC_PROXY_FUNC_COMMIT_MSGSET 0x175
#undef MC_CMD_0x175_PRIVILEGE_CTG
#define MC_CMD_0x175_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25518,6 +27906,7 @@
* cycle. Returns ENODEV if no function with given label exists.
*/
#define MC_CMD_DESC_PROXY_FUNC_OPEN 0x176
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_MSGSET 0x176
#undef MC_CMD_0x176_PRIVILEGE_CTG
#define MC_CMD_0x176_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25543,7 +27932,19 @@
#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_OFST 4
#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_LEN 8
#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_LO_OFST 4
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_LO_LEN 4
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_LO_LBN 32
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_LO_WIDTH 32
#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_HI_OFST 8
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_HI_LEN 4
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_HI_LBN 64
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_HI_WIDTH 32
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_PF_OFST 4
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_PF_LEN 2
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_VF_OFST 6
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_VF_LEN 2
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_INTF_OFST 8
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_INTF_LEN 4
/* Function personality */
#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_PERSONALITY_OFST 12
#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_PERSONALITY_LEN 4
@@ -25588,6 +27989,7 @@
* error (for virtio, DEVICE_NEEDS_RESET flag would be set on the host side)
*/
#define MC_CMD_DESC_PROXY_FUNC_CLOSE 0x1a1
+#define MC_CMD_DESC_PROXY_FUNC_CLOSE_MSGSET 0x1a1
#undef MC_CMD_0x1a1_PRIVILEGE_CTG
#define MC_CMD_0x1a1_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25607,9 +28009,27 @@
#define DESC_PROXY_FUNC_MAP_FUNC_OFST 0
#define DESC_PROXY_FUNC_MAP_FUNC_LEN 8
#define DESC_PROXY_FUNC_MAP_FUNC_LO_OFST 0
+#define DESC_PROXY_FUNC_MAP_FUNC_LO_LEN 4
+#define DESC_PROXY_FUNC_MAP_FUNC_LO_LBN 0
+#define DESC_PROXY_FUNC_MAP_FUNC_LO_WIDTH 32
#define DESC_PROXY_FUNC_MAP_FUNC_HI_OFST 4
+#define DESC_PROXY_FUNC_MAP_FUNC_HI_LEN 4
+#define DESC_PROXY_FUNC_MAP_FUNC_HI_LBN 32
+#define DESC_PROXY_FUNC_MAP_FUNC_HI_WIDTH 32
#define DESC_PROXY_FUNC_MAP_FUNC_LBN 0
#define DESC_PROXY_FUNC_MAP_FUNC_WIDTH 64
+#define DESC_PROXY_FUNC_MAP_FUNC_PF_OFST 0
+#define DESC_PROXY_FUNC_MAP_FUNC_PF_LEN 2
+#define DESC_PROXY_FUNC_MAP_FUNC_PF_LBN 0
+#define DESC_PROXY_FUNC_MAP_FUNC_PF_WIDTH 16
+#define DESC_PROXY_FUNC_MAP_FUNC_VF_OFST 2
+#define DESC_PROXY_FUNC_MAP_FUNC_VF_LEN 2
+#define DESC_PROXY_FUNC_MAP_FUNC_VF_LBN 16
+#define DESC_PROXY_FUNC_MAP_FUNC_VF_WIDTH 16
+#define DESC_PROXY_FUNC_MAP_FUNC_INTF_OFST 4
+#define DESC_PROXY_FUNC_MAP_FUNC_INTF_LEN 4
+#define DESC_PROXY_FUNC_MAP_FUNC_INTF_LBN 32
+#define DESC_PROXY_FUNC_MAP_FUNC_INTF_WIDTH 32
/* Function personality */
#define DESC_PROXY_FUNC_MAP_PERSONALITY_OFST 8
#define DESC_PROXY_FUNC_MAP_PERSONALITY_LEN 4
@@ -25631,6 +28051,7 @@
* Enumerate existing descriptor proxy functions
*/
#define MC_CMD_DESC_PROXY_FUNC_ENUM 0x177
+#define MC_CMD_DESC_PROXY_FUNC_ENUM_MSGSET 0x177
#undef MC_CMD_0x177_PRIVILEGE_CTG
#define MC_CMD_0x177_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25670,6 +28091,7 @@
* function.
*/
#define MC_CMD_DESC_PROXY_FUNC_ENABLE 0x178
+#define MC_CMD_DESC_PROXY_FUNC_ENABLE_MSGSET 0x178
#undef MC_CMD_0x178_PRIVILEGE_CTG
#define MC_CMD_0x178_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25702,6 +28124,7 @@
* Disable descriptor proxying for function
*/
#define MC_CMD_DESC_PROXY_FUNC_DISABLE 0x179
+#define MC_CMD_DESC_PROXY_FUNC_DISABLE_MSGSET 0x179
#undef MC_CMD_0x179_PRIVILEGE_CTG
#define MC_CMD_0x179_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25725,6 +28148,7 @@
* descriptors.
*/
#define MC_CMD_GET_ADDR_SPC_ID 0x1a0
+#define MC_CMD_GET_ADDR_SPC_ID_MSGSET 0x1a0
#undef MC_CMD_0x1a0_PRIVILEGE_CTG
#define MC_CMD_0x1a0_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25769,7 +28193,19 @@
#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_OFST 4
#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_LEN 8
#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_LO_OFST 4
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_LO_LEN 4
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_LO_LBN 32
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_LO_WIDTH 32
#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_HI_OFST 8
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_HI_LEN 4
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_HI_LBN 64
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_HI_WIDTH 32
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_PF_OFST 4
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_PF_LEN 2
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_VF_OFST 6
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_VF_LEN 2
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_INTF_OFST 8
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_INTF_LEN 4
/* PASID value. Only valid if TYPE is PCI_FUNC_PASID. */
#define MC_CMD_GET_ADDR_SPC_ID_IN_PASID_OFST 12
#define MC_CMD_GET_ADDR_SPC_ID_IN_PASID_LEN 4
@@ -25789,7 +28225,72 @@
#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_OFST 0
#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_LEN 8
#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_LO_OFST 0
+#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_LO_LEN 4
+#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_LO_LBN 0
+#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_LO_WIDTH 32
#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_HI_OFST 4
+#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_HI_LEN 4
+#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_HI_LBN 32
+#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_HI_WIDTH 32
+
+
+/***********************************/
+/* MC_CMD_GET_CLIENT_HANDLE
+ * Obtain a handle for a client given a description of that client. N.B. this
+ * command is subject to change given the open discussion about how PCIe
+ * functions should be referenced on an iEP (integrated endpoint: functions
+ * span multiple buses) and multihost (multiple PCIe interfaces) system.
+ */
+#define MC_CMD_GET_CLIENT_HANDLE 0x1c3
+#define MC_CMD_GET_CLIENT_HANDLE_MSGSET 0x1c3
+#undef MC_CMD_0x1c3_PRIVILEGE_CTG
+
+#define MC_CMD_0x1c3_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_GET_CLIENT_HANDLE_IN msgrequest */
+#define MC_CMD_GET_CLIENT_HANDLE_IN_LEN 12
+/* Type of client to get a client handle for */
+#define MC_CMD_GET_CLIENT_HANDLE_IN_TYPE_OFST 0
+#define MC_CMD_GET_CLIENT_HANDLE_IN_TYPE_LEN 4
+/* enum: Obtain a client handle for a PCIe function-type client. */
+#define MC_CMD_GET_CLIENT_HANDLE_IN_TYPE_FUNC 0x0
+/* PCIe Function ID (as struct PCIE_FUNCTION). Valid when TYPE==FUNC. Use: -
+ * INTF=CALLER, PF=PF_NULL, VF=VF_NULL to refer to the calling function -
+ * INTF=CALLER, PF=PF_NULL, VF=... to refer to a VF child of the calling PF or
+ * a sibling VF of the calling VF. - INTF=CALLER, PF=..., VF=VF_NULL to refer
+ * to a PF on the calling interface - INTF=CALLER, PF=..., VF=... to refer to a
+ * VF on the calling interface - INTF=..., PF=..., VF=VF_NULL to refer to a PF
+ * on a named interface - INTF=..., PF=..., VF=... to refer to a VF on a named
+ * interface where ... refers to a small integer for the VF/PF fields, and to
+ * values from the PCIE_INTERFACE enum for for the INTF field. It's only
+ * meaningful to use INTF=CALLER within a structure that's an argument to
+ * MC_CMD_DEVEL_GET_CLIENT_HANDLE.
+ */
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_OFST 4
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_LEN 8
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_LO_OFST 4
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_LO_LEN 4
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_LO_LBN 32
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_LO_WIDTH 32
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_HI_OFST 8
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_HI_LEN 4
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_HI_LBN 64
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_HI_WIDTH 32
+/* enum: NULL value for the INTF field of struct PCIE_FUNCTION. Provided for
+ * backwards compatibility only, callers should use PCIE_INTERFACE_CALLER.
+ */
+#define MC_CMD_GET_CLIENT_HANDLE_IN_PCIE_FUNCTION_INTF_NULL 0xffffffff
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_PF_OFST 4
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_PF_LEN 2
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_VF_OFST 6
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_VF_LEN 2
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_INTF_OFST 8
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_INTF_LEN 4
+
+/* MC_CMD_GET_CLIENT_HANDLE_OUT msgresponse */
+#define MC_CMD_GET_CLIENT_HANDLE_OUT_LEN 4
+#define MC_CMD_GET_CLIENT_HANDLE_OUT_HANDLE_OFST 0
+#define MC_CMD_GET_CLIENT_HANDLE_OUT_HANDLE_LEN 4
/* MAE_FIELD_FLAGS structuredef */
#define MAE_FIELD_FLAGS_LEN 4
@@ -25937,6 +28438,40 @@
#define MAE_ENC_FIELD_PAIRS_ENC_IP_TTL_MASK_LEN 1
#define MAE_ENC_FIELD_PAIRS_ENC_IP_TTL_MASK_LBN 1096
#define MAE_ENC_FIELD_PAIRS_ENC_IP_TTL_MASK_WIDTH 8
+#define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_OFST 138
+#define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_LEN 1
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_OVLAN_OFST 138
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_OVLAN_LBN 0
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_OVLAN_WIDTH 1
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_IVLAN_OFST 138
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_IVLAN_LBN 1
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_IVLAN_WIDTH 1
+#define MAE_ENC_FIELD_PAIRS_ENC_IP_FRAG_OFST 138
+#define MAE_ENC_FIELD_PAIRS_ENC_IP_FRAG_LBN 2
+#define MAE_ENC_FIELD_PAIRS_ENC_IP_FRAG_WIDTH 1
+#define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_LBN 1104
+#define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_WIDTH 8
+#define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_OFST 138
+#define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_LEN 1
+#define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_LBN 1104
+#define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_WIDTH 8
+#define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_MASK_OFST 139
+#define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_MASK_LEN 1
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_OVLAN_MASK_OFST 139
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_OVLAN_MASK_LBN 0
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_OVLAN_MASK_WIDTH 1
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_IVLAN_MASK_OFST 139
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_IVLAN_MASK_LBN 1
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_IVLAN_MASK_WIDTH 1
+#define MAE_ENC_FIELD_PAIRS_ENC_IP_FRAG_MASK_OFST 139
+#define MAE_ENC_FIELD_PAIRS_ENC_IP_FRAG_MASK_LBN 2
+#define MAE_ENC_FIELD_PAIRS_ENC_IP_FRAG_MASK_WIDTH 1
+#define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_MASK_LBN 1112
+#define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_MASK_WIDTH 8
+#define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_MASK_OFST 139
+#define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_MASK_LEN 1
+#define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_MASK_LBN 1112
+#define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_MASK_WIDTH 8
#define MAE_ENC_FIELD_PAIRS_ENC_IP_FLAGS_BE_OFST 140
#define MAE_ENC_FIELD_PAIRS_ENC_IP_FLAGS_BE_LEN 4
#define MAE_ENC_FIELD_PAIRS_ENC_IP_FLAGS_BE_LBN 1120
@@ -26623,9 +29158,24 @@
#define MAE_FIELD_MASK_VALUE_PAIRS_V2_IS_FROM_NETWORK_OFST 344
#define MAE_FIELD_MASK_VALUE_PAIRS_V2_IS_FROM_NETWORK_LBN 3
#define MAE_FIELD_MASK_VALUE_PAIRS_V2_IS_FROM_NETWORK_WIDTH 1
-#define MAE_FIELD_MASK_VALUE_PAIRS_V2_RSVD_OFST 344
-#define MAE_FIELD_MASK_VALUE_PAIRS_V2_RSVD_LBN 4
-#define MAE_FIELD_MASK_VALUE_PAIRS_V2_RSVD_WIDTH 28
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_HAS_OVLAN_OFST 344
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_HAS_OVLAN_LBN 4
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_HAS_OVLAN_WIDTH 1
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_HAS_IVLAN_OFST 344
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_HAS_IVLAN_LBN 5
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_HAS_IVLAN_WIDTH 1
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_ENC_HAS_OVLAN_OFST 344
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_ENC_HAS_OVLAN_LBN 6
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_ENC_HAS_OVLAN_WIDTH 1
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_ENC_HAS_IVLAN_OFST 344
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_ENC_HAS_IVLAN_LBN 7
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_ENC_HAS_IVLAN_WIDTH 1
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_TCP_SYN_FIN_RST_OFST 344
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_TCP_SYN_FIN_RST_LBN 8
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_TCP_SYN_FIN_RST_WIDTH 1
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_IP_FIRST_FRAG_OFST 344
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_IP_FIRST_FRAG_LBN 9
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_IP_FIRST_FRAG_WIDTH 1
#define MAE_FIELD_MASK_VALUE_PAIRS_V2_FLAGS_LBN 2752
#define MAE_FIELD_MASK_VALUE_PAIRS_V2_FLAGS_WIDTH 32
#define MAE_FIELD_MASK_VALUE_PAIRS_V2_FLAGS_MASK_OFST 348
@@ -26707,16 +29257,34 @@
#define MAE_MPORT_SELECTOR_TYPE_WIDTH 8
/* enum: The MPORT connected to a given physical port */
#define MAE_MPORT_SELECTOR_TYPE_PPORT 0x2
-/* enum: The MPORT assigned to a given PCIe function */
+/* enum: The MPORT assigned to a given PCIe function. Deprecated in favour of
+ * MH_FUNC.
+ */
#define MAE_MPORT_SELECTOR_TYPE_FUNC 0x3
/* enum: An mport_id */
#define MAE_MPORT_SELECTOR_TYPE_MPORT_ID 0x4
+/* enum: The MPORT assigned to a given PCIe function (see also FWRIVERHD-1108)
+ */
+#define MAE_MPORT_SELECTOR_TYPE_MH_FUNC 0x5
+/* enum: This is guaranteed never to be a valid selector type */
+#define MAE_MPORT_SELECTOR_TYPE_INVALID 0xff
#define MAE_MPORT_SELECTOR_MPORT_ID_OFST 0
#define MAE_MPORT_SELECTOR_MPORT_ID_LBN 0
#define MAE_MPORT_SELECTOR_MPORT_ID_WIDTH 24
#define MAE_MPORT_SELECTOR_PPORT_ID_OFST 0
#define MAE_MPORT_SELECTOR_PPORT_ID_LBN 0
#define MAE_MPORT_SELECTOR_PPORT_ID_WIDTH 4
+#define MAE_MPORT_SELECTOR_FUNC_INTF_ID_OFST 0
+#define MAE_MPORT_SELECTOR_FUNC_INTF_ID_LBN 20
+#define MAE_MPORT_SELECTOR_FUNC_INTF_ID_WIDTH 4
+#define MAE_MPORT_SELECTOR_HOST_PRIMARY 0x1 /* enum */
+#define MAE_MPORT_SELECTOR_NIC_EMBEDDED 0x2 /* enum */
+/* enum: Deprecated, use CALLER_INTF instead. */
+#define MAE_MPORT_SELECTOR_CALLER 0xf
+#define MAE_MPORT_SELECTOR_CALLER_INTF 0xf /* enum */
+#define MAE_MPORT_SELECTOR_FUNC_MH_PF_ID_OFST 0
+#define MAE_MPORT_SELECTOR_FUNC_MH_PF_ID_LBN 16
+#define MAE_MPORT_SELECTOR_FUNC_MH_PF_ID_WIDTH 4
#define MAE_MPORT_SELECTOR_FUNC_PF_ID_OFST 0
#define MAE_MPORT_SELECTOR_FUNC_PF_ID_LBN 16
#define MAE_MPORT_SELECTOR_FUNC_PF_ID_WIDTH 8
@@ -26737,15 +29305,56 @@
* function.
*/
#define MAE_MPORT_SELECTOR_FUNC_PF_ID_CALLER 0xff
+/* enum: Same as PF_ID_CALLER, but for use in the smaller MH_PF_ID field. Only
+ * valid if FUNC_INTF_ID is CALLER.
+ */
+#define MAE_MPORT_SELECTOR_FUNC_MH_PF_ID_CALLER 0xf
#define MAE_MPORT_SELECTOR_FLAT_LBN 0
#define MAE_MPORT_SELECTOR_FLAT_WIDTH 32
+/* MAE_LINK_ENDPOINT_SELECTOR structuredef: Structure that identifies a real or
+ * virtual network port by MAE port and link end
+ */
+#define MAE_LINK_ENDPOINT_SELECTOR_LEN 8
+/* The MAE MPORT of interest */
+#define MAE_LINK_ENDPOINT_SELECTOR_MPORT_SELECTOR_OFST 0
+#define MAE_LINK_ENDPOINT_SELECTOR_MPORT_SELECTOR_LEN 4
+#define MAE_LINK_ENDPOINT_SELECTOR_MPORT_SELECTOR_LBN 0
+#define MAE_LINK_ENDPOINT_SELECTOR_MPORT_SELECTOR_WIDTH 32
+/* Which end of the link identified by MPORT to consider */
+#define MAE_LINK_ENDPOINT_SELECTOR_LINK_END_OFST 4
+#define MAE_LINK_ENDPOINT_SELECTOR_LINK_END_LEN 4
+/* Enum values, see field(s): */
+/* MAE_MPORT_END */
+#define MAE_LINK_ENDPOINT_SELECTOR_LINK_END_LBN 32
+#define MAE_LINK_ENDPOINT_SELECTOR_LINK_END_WIDTH 32
+/* A field for accessing the endpoint selector as a collection of bits */
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_OFST 0
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_LEN 8
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_LO_OFST 0
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_LO_LEN 4
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_LO_LBN 0
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_LO_WIDTH 32
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_HI_OFST 4
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_HI_LEN 4
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_HI_LBN 32
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_HI_WIDTH 32
+/* enum: Set FLAT to this value to obtain backward-compatible behaviour in
+ * commands that have been extended to take a MAE_LINK_ENDPOINT_SELECTOR
+ * argument. New commands that are designed to take such an argument from the
+ * start will not support this.
+ */
+#define MAE_LINK_ENDPOINT_SELECTOR_MAE_LINK_ENDPOINT_COMPAT 0x0
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_LBN 0
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_WIDTH 64
+
/***********************************/
/* MC_CMD_MAE_GET_CAPS
* Describes capabilities of the MAE (Match-Action Engine)
*/
#define MC_CMD_MAE_GET_CAPS 0x140
+#define MC_CMD_MAE_GET_CAPS_MSGSET 0x140
#undef MC_CMD_0x140_PRIVILEGE_CTG
#define MC_CMD_0x140_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -26772,6 +29381,9 @@
#define MC_CMD_MAE_GET_CAPS_OUT_ENCAP_TYPE_GENEVE_OFST 4
#define MC_CMD_MAE_GET_CAPS_OUT_ENCAP_TYPE_GENEVE_LBN 2
#define MC_CMD_MAE_GET_CAPS_OUT_ENCAP_TYPE_GENEVE_WIDTH 1
+#define MC_CMD_MAE_GET_CAPS_OUT_ENCAP_TYPE_L2GRE_OFST 4
+#define MC_CMD_MAE_GET_CAPS_OUT_ENCAP_TYPE_L2GRE_LBN 3
+#define MC_CMD_MAE_GET_CAPS_OUT_ENCAP_TYPE_L2GRE_WIDTH 1
/* The total number of counters available to allocate. */
#define MC_CMD_MAE_GET_CAPS_OUT_COUNTERS_OFST 8
#define MC_CMD_MAE_GET_CAPS_OUT_COUNTERS_LEN 4
@@ -26823,6 +29435,7 @@
* Get a level of support for match fields when used in match-action rules
*/
#define MC_CMD_MAE_GET_AR_CAPS 0x141
+#define MC_CMD_MAE_GET_AR_CAPS_MSGSET 0x141
#undef MC_CMD_0x141_PRIVILEGE_CTG
#define MC_CMD_0x141_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -26855,6 +29468,7 @@
* Get a level of support for fields used in outer rule keys.
*/
#define MC_CMD_MAE_GET_OR_CAPS 0x142
+#define MC_CMD_MAE_GET_OR_CAPS_MSGSET 0x142
#undef MC_CMD_0x142_PRIVILEGE_CTG
#define MC_CMD_0x142_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -26885,6 +29499,7 @@
* Rules.
*/
#define MC_CMD_MAE_COUNTER_ALLOC 0x143
+#define MC_CMD_MAE_COUNTER_ALLOC_MSGSET 0x143
#undef MC_CMD_0x143_PRIVILEGE_CTG
#define MC_CMD_0x143_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -26928,6 +29543,7 @@
* Free match-action-engine counters
*/
#define MC_CMD_MAE_COUNTER_FREE 0x144
+#define MC_CMD_MAE_COUNTER_FREE_MSGSET 0x144
#undef MC_CMD_0x144_PRIVILEGE_CTG
#define MC_CMD_0x144_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -26995,6 +29611,7 @@
* delivering packets to the current queue first.
*/
#define MC_CMD_MAE_COUNTERS_STREAM_START 0x151
+#define MC_CMD_MAE_COUNTERS_STREAM_START_MSGSET 0x151
#undef MC_CMD_0x151_PRIVILEGE_CTG
#define MC_CMD_0x151_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27031,6 +29648,7 @@
* Stop streaming counter values to the specified RxQ.
*/
#define MC_CMD_MAE_COUNTERS_STREAM_STOP 0x152
+#define MC_CMD_MAE_COUNTERS_STREAM_STOP_MSGSET 0x152
#undef MC_CMD_0x152_PRIVILEGE_CTG
#define MC_CMD_0x152_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27060,6 +29678,7 @@
* MAE_COUNTERS_PACKETISER_STREAM_START/PACKET_SIZE and rung the doorbell.
*/
#define MC_CMD_MAE_COUNTERS_STREAM_GIVE_CREDITS 0x153
+#define MC_CMD_MAE_COUNTERS_STREAM_GIVE_CREDITS_MSGSET 0x153
#undef MC_CMD_0x153_PRIVILEGE_CTG
#define MC_CMD_0x153_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27076,9 +29695,15 @@
/***********************************/
/* MC_CMD_MAE_ENCAP_HEADER_ALLOC
- * Allocate encap action metadata
+ * Allocate an encapsulation header to be used in an Action Rule response. The
+ * header must be constructed as a valid packet with 0-length payload.
+ * Specifically, the L3/L4 lengths & checksums will only be incrementally fixed
+ * by the NIC, rather than recomputed entirely. Currently only IPv4, IPv6 and
+ * UDP are supported. If the maximum number of headers have already been
+ * allocated then the command will fail with MC_CMD_ERR_ENOSPC.
*/
#define MC_CMD_MAE_ENCAP_HEADER_ALLOC 0x148
+#define MC_CMD_MAE_ENCAP_HEADER_ALLOC_MSGSET 0x148
#undef MC_CMD_0x148_PRIVILEGE_CTG
#define MC_CMD_0x148_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27109,9 +29734,10 @@
/***********************************/
/* MC_CMD_MAE_ENCAP_HEADER_UPDATE
- * Update encap action metadata
+ * Update encap action metadata. See comments for MAE_ENCAP_HEADER_ALLOC.
*/
#define MC_CMD_MAE_ENCAP_HEADER_UPDATE 0x149
+#define MC_CMD_MAE_ENCAP_HEADER_UPDATE_MSGSET 0x149
#undef MC_CMD_0x149_PRIVILEGE_CTG
#define MC_CMD_0x149_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27141,6 +29767,7 @@
* Free encap action metadata
*/
#define MC_CMD_MAE_ENCAP_HEADER_FREE 0x14a
+#define MC_CMD_MAE_ENCAP_HEADER_FREE_MSGSET 0x14a
#undef MC_CMD_0x14a_PRIVILEGE_CTG
#define MC_CMD_0x14a_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27176,9 +29803,12 @@
/* MC_CMD_MAE_MAC_ADDR_ALLOC
* Allocate MAC address. Hardware implementations have MAC addresses programmed
* into an indirection table, and clients should take care not to allocate the
- * same MAC address twice (but instead reuse its ID).
+ * same MAC address twice (but instead reuse its ID). If the maximum number of
+ * MAC addresses have already been allocated then the command will fail with
+ * MC_CMD_ERR_ENOSPC.
*/
#define MC_CMD_MAE_MAC_ADDR_ALLOC 0x15e
+#define MC_CMD_MAE_MAC_ADDR_ALLOC_MSGSET 0x15e
#undef MC_CMD_0x15e_PRIVILEGE_CTG
#define MC_CMD_0x15e_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27204,6 +29834,7 @@
* Free MAC address.
*/
#define MC_CMD_MAE_MAC_ADDR_FREE 0x15f
+#define MC_CMD_MAE_MAC_ADDR_FREE_MSGSET 0x15f
#undef MC_CMD_0x15f_PRIVILEGE_CTG
#define MC_CMD_0x15f_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27238,9 +29869,12 @@
/***********************************/
/* MC_CMD_MAE_ACTION_SET_ALLOC
* Allocate an action set, which can be referenced either in response to an
- * Action Rule, or as part of an Action Set List.
+ * Action Rule, or as part of an Action Set List. If the maxmimum number of
+ * action sets have already been allocated then the command will fail with
+ * MC_CMD_ERR_ENOSPC.
*/
#define MC_CMD_MAE_ACTION_SET_ALLOC 0x14d
+#define MC_CMD_MAE_ACTION_SET_ALLOC_MSGSET 0x14d
#undef MC_CMD_0x14d_PRIVILEGE_CTG
#define MC_CMD_0x14d_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27267,6 +29901,15 @@
#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_NAT_OFST 0
#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_NAT_LBN 11
#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_NAT_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_DECR_IP_TTL_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_DECR_IP_TTL_LBN 12
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_DECR_IP_TTL_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_SET_SRC_MPORT_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_SET_SRC_MPORT_LBN 13
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_SET_SRC_MPORT_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_SUPPRESS_SELF_DELIVERY_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_SUPPRESS_SELF_DELIVERY_LBN 14
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_SUPPRESS_SELF_DELIVERY_WIDTH 1
/* If VLAN_PUSH >= 1, TCI value to be inserted as outermost VLAN. */
#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_VLAN0_TCI_BE_OFST 4
#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_VLAN0_TCI_BE_LEN 2
@@ -27313,8 +29956,135 @@
#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DST_MAC_ID_OFST 40
#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DST_MAC_ID_LEN 4
+/* MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN msgrequest: Only supported if
+ * MAE_ACTION_SET_ALLOC_V2_SUPPORTED is advertised in
+ * MC_CMD_GET_CAPABILITIES_V7_OUT.
+ */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_LEN 51
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_FLAGS_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_FLAGS_LEN 4
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN_PUSH_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN_PUSH_LBN 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN_PUSH_WIDTH 2
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN_POP_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN_POP_LBN 4
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN_POP_WIDTH 2
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DECAP_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DECAP_LBN 8
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DECAP_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_MARK_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_MARK_LBN 9
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_MARK_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_FLAG_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_FLAG_LBN 10
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_FLAG_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_NAT_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_NAT_LBN 11
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_NAT_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DECR_IP_TTL_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DECR_IP_TTL_LBN 12
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DECR_IP_TTL_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_SET_SRC_MPORT_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_SET_SRC_MPORT_LBN 13
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_SET_SRC_MPORT_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_SUPPRESS_SELF_DELIVERY_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_SUPPRESS_SELF_DELIVERY_LBN 14
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_SUPPRESS_SELF_DELIVERY_WIDTH 1
+/* If VLAN_PUSH >= 1, TCI value to be inserted as outermost VLAN. */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN0_TCI_BE_OFST 4
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN0_TCI_BE_LEN 2
+/* If VLAN_PUSH >= 1, TPID value to be inserted as outermost VLAN. */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN0_PROTO_BE_OFST 6
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN0_PROTO_BE_LEN 2
+/* If VLAN_PUSH == 2, inner TCI value to be inserted. */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN1_TCI_BE_OFST 8
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN1_TCI_BE_LEN 2
+/* If VLAN_PUSH == 2, inner TPID value to be inserted. */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN1_PROTO_BE_OFST 10
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN1_PROTO_BE_LEN 2
+/* Reserved. Ignored by firmware. Should be set to zero or 0xffffffff. */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_RSVD_OFST 12
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_RSVD_LEN 4
+/* Set to ENCAP_HEADER_ID_NULL to request no encap action */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ENCAP_HEADER_ID_OFST 16
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ENCAP_HEADER_ID_LEN 4
+/* An m-port selector identifying the m-port that the modified packet should be
+ * delivered to. Set to MPORT_SELECTOR_NULL to request no delivery of the
+ * packet.
+ */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DELIVER_OFST 20
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DELIVER_LEN 4
+/* Allows an action set to trigger several counter updates. Set to
+ * COUNTER_LIST_ID_NULL to request no counter action.
+ */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_COUNTER_LIST_ID_OFST 24
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_COUNTER_LIST_ID_LEN 4
+/* If a driver only wished to update one counter within this action set, then
+ * it can supply a COUNTER_ID instead of allocating a single-element counter
+ * list. This field should be set to COUNTER_ID_NULL if this behaviour is not
+ * required. It is not valid to supply a non-NULL value for both
+ * COUNTER_LIST_ID and COUNTER_ID.
+ */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_COUNTER_ID_OFST 28
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_COUNTER_ID_LEN 4
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_MARK_VALUE_OFST 32
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_MARK_VALUE_LEN 4
+/* Set to MAC_ID_NULL to request no source MAC replacement. */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_SRC_MAC_ID_OFST 36
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_SRC_MAC_ID_LEN 4
+/* Set to MAC_ID_NULL to request no destination MAC replacement. */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DST_MAC_ID_OFST 40
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DST_MAC_ID_LEN 4
+/* Source m-port ID to be reported for DO_SET_SRC_MPORT action. */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_REPORTED_SRC_MPORT_OFST 44
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_REPORTED_SRC_MPORT_LEN 4
+/* Actions for modifying the Differentiated Services Code-Point (DSCP) bits
+ * within IPv4 and IPv6 headers.
+ */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DSCP_CONTROL_OFST 48
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DSCP_CONTROL_LEN 2
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DSCP_ENCAP_COPY_OFST 48
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DSCP_ENCAP_COPY_LBN 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DSCP_ENCAP_COPY_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DSCP_DECAP_COPY_OFST 48
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DSCP_DECAP_COPY_LBN 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DSCP_DECAP_COPY_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_DSCP_OFST 48
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_DSCP_LBN 2
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_DSCP_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DSCP_VALUE_OFST 48
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DSCP_VALUE_LBN 3
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DSCP_VALUE_WIDTH 6
+/* Actions for modifying the Explicit Congestion Notification (ECN) bits within
+ * IPv4 and IPv6 headers.
+ */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_CONTROL_OFST 50
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_CONTROL_LEN 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_ECN_ENCAP_COPY_OFST 50
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_ECN_ENCAP_COPY_LBN 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_ECN_ENCAP_COPY_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_ECN_DECAP_COPY_OFST 50
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_ECN_DECAP_COPY_LBN 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_ECN_DECAP_COPY_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_ECN_OFST 50
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_ECN_LBN 2
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_ECN_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_VALUE_OFST 50
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_VALUE_LBN 3
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_VALUE_WIDTH 2
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_ECT_0_TO_CE_OFST 50
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_ECT_0_TO_CE_LBN 5
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_ECT_0_TO_CE_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_ECT_1_TO_CE_OFST 50
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_ECT_1_TO_CE_LBN 6
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_ECT_1_TO_CE_WIDTH 1
+
/* MC_CMD_MAE_ACTION_SET_ALLOC_OUT msgresponse */
#define MC_CMD_MAE_ACTION_SET_ALLOC_OUT_LEN 4
+/* The MSB of the AS_ID is guaranteed to be clear if the ID is not
+ * ACTION_SET_ID_NULL. This allows an AS_ID to be distinguished from an ASL_ID
+ * returned from MC_CMD_MAE_ACTION_SET_LIST_ALLOC.
+ */
#define MC_CMD_MAE_ACTION_SET_ALLOC_OUT_AS_ID_OFST 0
#define MC_CMD_MAE_ACTION_SET_ALLOC_OUT_AS_ID_LEN 4
/* enum: An action set ID that is guaranteed never to represent an action set
@@ -27326,6 +30096,7 @@
/* MC_CMD_MAE_ACTION_SET_FREE
*/
#define MC_CMD_MAE_ACTION_SET_FREE 0x14e
+#define MC_CMD_MAE_ACTION_SET_FREE_MSGSET 0x14e
#undef MC_CMD_0x14e_PRIVILEGE_CTG
#define MC_CMD_0x14e_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27361,9 +30132,12 @@
/* MC_CMD_MAE_ACTION_SET_LIST_ALLOC
* Allocate an action set list (ASL) that can be referenced by an ID. The ASL
* ID can be used when inserting an action rule, so that for each packet
- * matching the rule every action set in the list is applied.
+ * matching the rule every action set in the list is applied. If the maximum
+ * number of ASLs have already been allocated then the command will fail with
+ * MC_CMD_ERR_ENOSPC.
*/
#define MC_CMD_MAE_ACTION_SET_LIST_ALLOC 0x14f
+#define MC_CMD_MAE_ACTION_SET_LIST_ALLOC_MSGSET 0x14f
#undef MC_CMD_0x14f_PRIVILEGE_CTG
#define MC_CMD_0x14f_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27394,6 +30168,9 @@
/* MC_CMD_MAE_ACTION_SET_LIST_ALLOC_OUT msgresponse */
#define MC_CMD_MAE_ACTION_SET_LIST_ALLOC_OUT_LEN 4
+/* The MSB of the ASL_ID is guaranteed to be set. This allows an ASL_ID to be
+ * distinguished from an AS_ID returned from MC_CMD_MAE_ACTION_SET_ALLOC.
+ */
#define MC_CMD_MAE_ACTION_SET_LIST_ALLOC_OUT_ASL_ID_OFST 0
#define MC_CMD_MAE_ACTION_SET_LIST_ALLOC_OUT_ASL_ID_LEN 4
/* enum: An action set list ID that is guaranteed never to represent an action
@@ -27407,6 +30184,7 @@
* Free match-action-engine redirect_lists
*/
#define MC_CMD_MAE_ACTION_SET_LIST_FREE 0x150
+#define MC_CMD_MAE_ACTION_SET_LIST_FREE_MSGSET 0x150
#undef MC_CMD_0x150_PRIVILEGE_CTG
#define MC_CMD_0x150_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27441,9 +30219,11 @@
/***********************************/
/* MC_CMD_MAE_OUTER_RULE_INSERT
* Inserts an Outer Rule, which controls encapsulation parsing, and may
- * influence the Lookup Sequence.
+ * influence the Lookup Sequence. If the maximum number of rules have already
+ * been inserted then the command will fail with MC_CMD_ERR_ENOSPC.
*/
#define MC_CMD_MAE_OUTER_RULE_INSERT 0x15a
+#define MC_CMD_MAE_OUTER_RULE_INSERT_MSGSET 0x15a
#undef MC_CMD_0x15a_PRIVILEGE_CTG
#define MC_CMD_0x15a_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27504,6 +30284,7 @@
/* MC_CMD_MAE_OUTER_RULE_REMOVE
*/
#define MC_CMD_MAE_OUTER_RULE_REMOVE 0x15b
+#define MC_CMD_MAE_OUTER_RULE_REMOVE_MSGSET 0x15b
#undef MC_CMD_0x15b_PRIVILEGE_CTG
#define MC_CMD_0x15b_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27583,9 +30364,11 @@
/* MC_CMD_MAE_ACTION_RULE_INSERT
* Insert a rule specify that packets matching a filter be processed according
* to a previous allocated action. Masks can be set as indicated by
- * MC_CMD_MAE_GET_MATCH_FIELD_CAPABILITIES.
+ * MC_CMD_MAE_GET_MATCH_FIELD_CAPABILITIES. If the maximum number of rules have
+ * already been inserted then the command will fail with MC_CMD_ERR_ENOSPC.
*/
#define MC_CMD_MAE_ACTION_RULE_INSERT 0x15c
+#define MC_CMD_MAE_ACTION_RULE_INSERT_MSGSET 0x15c
#undef MC_CMD_0x15c_PRIVILEGE_CTG
#define MC_CMD_0x15c_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27627,6 +30410,7 @@
* ENOTSUP, in which case the driver should DELETE/INSERT.
*/
#define MC_CMD_MAE_ACTION_RULE_UPDATE 0x15d
+#define MC_CMD_MAE_ACTION_RULE_UPDATE_MSGSET 0x15d
#undef MC_CMD_0x15d_PRIVILEGE_CTG
#define MC_CMD_0x15d_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27648,6 +30432,7 @@
/* MC_CMD_MAE_ACTION_RULE_DELETE
*/
#define MC_CMD_MAE_ACTION_RULE_DELETE 0x155
+#define MC_CMD_MAE_ACTION_RULE_DELETE_MSGSET 0x155
#undef MC_CMD_0x155_PRIVILEGE_CTG
#define MC_CMD_0x155_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27684,6 +30469,7 @@
* Return the m-port corresponding to a selector.
*/
#define MC_CMD_MAE_MPORT_LOOKUP 0x160
+#define MC_CMD_MAE_MPORT_LOOKUP_MSGSET 0x160
#undef MC_CMD_0x160_PRIVILEGE_CTG
#define MC_CMD_0x160_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -27705,6 +30491,7 @@
* match or delivery argument.
*/
#define MC_CMD_MAE_MPORT_ALLOC 0x163
+#define MC_CMD_MAE_MPORT_ALLOC_MSGSET 0x163
#undef MC_CMD_0x163_PRIVILEGE_CTG
#define MC_CMD_0x163_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27812,6 +30599,7 @@
* Free a m-port which was previously allocated by the driver.
*/
#define MC_CMD_MAE_MPORT_FREE 0x164
+#define MC_CMD_MAE_MPORT_FREE_MSGSET 0x164
#undef MC_CMD_0x164_PRIVILEGE_CTG
#define MC_CMD_0x164_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27847,6 +30635,9 @@
#define MAE_MPORT_DESC_CAN_DELETE_OFST 8
#define MAE_MPORT_DESC_CAN_DELETE_LBN 2
#define MAE_MPORT_DESC_CAN_DELETE_WIDTH 1
+#define MAE_MPORT_DESC_IS_ZOMBIE_OFST 8
+#define MAE_MPORT_DESC_IS_ZOMBIE_LBN 3
+#define MAE_MPORT_DESC_IS_ZOMBIE_WIDTH 1
#define MAE_MPORT_DESC_CALLER_FLAGS_LBN 64
#define MAE_MPORT_DESC_CALLER_FLAGS_WIDTH 32
/* Not the ideal name; it's really the type of thing connected to the m-port */
@@ -27869,7 +30660,13 @@
#define MAE_MPORT_DESC_RESERVED_OFST 32
#define MAE_MPORT_DESC_RESERVED_LEN 8
#define MAE_MPORT_DESC_RESERVED_LO_OFST 32
+#define MAE_MPORT_DESC_RESERVED_LO_LEN 4
+#define MAE_MPORT_DESC_RESERVED_LO_LBN 256
+#define MAE_MPORT_DESC_RESERVED_LO_WIDTH 32
#define MAE_MPORT_DESC_RESERVED_HI_OFST 36
+#define MAE_MPORT_DESC_RESERVED_HI_LEN 4
+#define MAE_MPORT_DESC_RESERVED_HI_LBN 288
+#define MAE_MPORT_DESC_RESERVED_HI_WIDTH 32
#define MAE_MPORT_DESC_RESERVED_LBN 256
#define MAE_MPORT_DESC_RESERVED_WIDTH 64
/* Logical port index. Only valid when type NET Port. */
@@ -27916,8 +30713,11 @@
/***********************************/
/* MC_CMD_MAE_MPORT_ENUMERATE
+ * Deprecated in favour of MAE_MPORT_READ_JOURNAL. Support for this command
+ * will be removed at some future point.
*/
#define MC_CMD_MAE_MPORT_ENUMERATE 0x17c
+#define MC_CMD_MAE_MPORT_ENUMERATE_MSGSET 0x17c
#undef MC_CMD_0x17c_PRIVILEGE_CTG
#define MC_CMD_0x17c_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -27945,4 +30745,50 @@
#define MC_CMD_MAE_MPORT_ENUMERATE_OUT_MPORT_DESC_DATA_MAXNUM 244
#define MC_CMD_MAE_MPORT_ENUMERATE_OUT_MPORT_DESC_DATA_MAXNUM_MCDI2 1012
+
+/***********************************/
+/* MC_CMD_MAE_MPORT_READ_JOURNAL
+ * Firmware maintains a per-client journal of mport creations and deletions.
+ * This journal is clear-on-read, i.e. repeated calls of this command will
+ * drain the buffer. Whenever the caller resets its function via FLR or
+ * MC_CMD_ENTITY_RESET, the journal is regenerated from a blank start.
+ */
+#define MC_CMD_MAE_MPORT_READ_JOURNAL 0x147
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_MSGSET 0x147
+#undef MC_CMD_0x147_PRIVILEGE_CTG
+
+#define MC_CMD_0x147_PRIVILEGE_CTG SRIOV_CTG_MAE
+
+/* MC_CMD_MAE_MPORT_READ_JOURNAL_IN msgrequest */
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_IN_LEN 4
+/* Any unused flags are reserved and must be set to zero. */
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_IN_FLAGS_OFST 0
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_IN_FLAGS_LEN 4
+
+/* MC_CMD_MAE_MPORT_READ_JOURNAL_OUT msgresponse */
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_LENMIN 12
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_LENMAX 252
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_LENMAX_MCDI2 1020
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_LEN(num) (12+1*(num))
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_DATA_NUM(len) (((len)-12)/1)
+/* Any unused flags are reserved and must be ignored. */
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_FLAGS_OFST 0
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_FLAGS_LEN 4
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MORE_OFST 0
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MORE_LBN 0
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MORE_WIDTH 1
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_COUNT_OFST 4
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_COUNT_LEN 4
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_SIZEOF_MPORT_DESC_OFST 8
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_SIZEOF_MPORT_DESC_LEN 4
+/* Any array of MAE_MPORT_DESC structures. The MAE_MPORT_DESC structure may
+ * grow in future version of this command. Drivers should use a stride of
+ * SIZEOF_MPORT_DESC. Fields beyond SIZEOF_MPORT_DESC are not present.
+ */
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_DATA_OFST 12
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_DATA_LEN 1
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_DATA_MINNUM 0
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_DATA_MAXNUM 240
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_DATA_MAXNUM_MCDI2 1008
+
#endif /* _SIENA_MC_DRIVER_PCOL_H */
diff --git a/drivers/common/sfc_efx/base/efx_regs_mcdi_aoe.h b/drivers/common/sfc_efx/base/efx_regs_mcdi_aoe.h
index f7c89fabc..c45f678c2 100644
--- a/drivers/common/sfc_efx/base/efx_regs_mcdi_aoe.h
+++ b/drivers/common/sfc_efx/base/efx_regs_mcdi_aoe.h
@@ -6,7 +6,7 @@
/*
* This file is automatically generated. DO NOT EDIT IT.
- * To make changes, edit the .yml files in sfregistry under doc/mcdi/ and
+ * To make changes, edit the .yml files in smartnic_registry under doc/mcdi/ and
* rebuild this file with "make mcdi_headers_v5".
*/
@@ -20,6 +20,7 @@
* Perform an FC operation
*/
#define MC_CMD_FC 0x9
+#define MC_CMD_FC_MSGSET 0x9
/* MC_CMD_FC_IN msgrequest */
#define MC_CMD_FC_IN_LEN 4
@@ -212,7 +213,13 @@
#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_OFST 16
#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_LEN 8
#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_LO_OFST 16
+#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_LO_LEN 4
+#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_LO_LBN 128
+#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_LO_WIDTH 32
#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_HI_OFST 20
+#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_HI_LEN 4
+#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_HI_LBN 160
+#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_HI_WIDTH 32
#define MC_CMD_FC_IN_MAC_SET_LINK_REJECT_OFST 24
#define MC_CMD_FC_IN_MAC_SET_LINK_REJECT_LEN 4
#define MC_CMD_FC_IN_MAC_SET_LINK_REJECT_UNICAST_OFST 24
@@ -784,12 +791,24 @@
#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_OFST 12
#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_LEN 8
#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_LO_OFST 12
+#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_LO_LEN 4
+#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_LO_LBN 96
+#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_LO_WIDTH 32
#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_HI_OFST 16
+#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_HI_LEN 4
+#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_HI_LBN 128
+#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_HI_WIDTH 32
/* AOE address from which to transfer data */
#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_OFST 20
#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_LEN 8
#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_LO_OFST 20
+#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_LO_LEN 4
+#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_LO_LBN 160
+#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_LO_WIDTH 32
#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_HI_OFST 24
+#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_HI_LEN 4
+#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_HI_LBN 192
+#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_HI_WIDTH 32
/* Length of AOE transfer (total) */
#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_LENGTH_OFST 28
#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_LENGTH_LEN 4
@@ -916,7 +935,13 @@
#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_OFST 12
#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_LEN 8
#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_LO_OFST 12
+#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_LO_LEN 4
+#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_LO_LBN 96
+#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_LO_WIDTH 32
#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_HI_OFST 16
+#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_HI_LEN 4
+#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_HI_LBN 128
+#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_HI_WIDTH 32
#define MC_CMD_FC_IN_CLOCK_SET_TIME_NANOSECONDS_OFST 20
#define MC_CMD_FC_IN_CLOCK_SET_TIME_NANOSECONDS_LEN 4
@@ -1016,7 +1041,13 @@
#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_OFST 12
#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_LEN 8
#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_LO_OFST 12
+#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_LO_LEN 4
+#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_LO_LBN 96
+#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_LO_WIDTH 32
#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_HI_OFST 16
+#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_HI_LEN 4
+#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_HI_LBN 128
+#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_HI_WIDTH 32
/* Port number of PTP packet for which timestamp required */
#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_PORT_NUM_OFST 20
#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_PORT_NUM_LEN 4
@@ -1320,7 +1351,13 @@
#define MC_CMD_FC_OUT_GET_VERSION_VERSION_OFST 4
#define MC_CMD_FC_OUT_GET_VERSION_VERSION_LEN 8
#define MC_CMD_FC_OUT_GET_VERSION_VERSION_LO_OFST 4
+#define MC_CMD_FC_OUT_GET_VERSION_VERSION_LO_LEN 4
+#define MC_CMD_FC_OUT_GET_VERSION_VERSION_LO_LBN 32
+#define MC_CMD_FC_OUT_GET_VERSION_VERSION_LO_WIDTH 32
#define MC_CMD_FC_OUT_GET_VERSION_VERSION_HI_OFST 8
+#define MC_CMD_FC_OUT_GET_VERSION_VERSION_HI_LEN 4
+#define MC_CMD_FC_OUT_GET_VERSION_VERSION_HI_LBN 64
+#define MC_CMD_FC_OUT_GET_VERSION_VERSION_HI_WIDTH 32
/* MC_CMD_FC_OUT_TRC_RX_READ msgresponse */
#define MC_CMD_FC_OUT_TRC_RX_READ_LEN 8
@@ -1347,7 +1384,13 @@
#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_OFST 0
#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_LEN 8
#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_LO_OFST 0
+#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_LO_LEN 4
+#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_LO_LBN 0
+#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_LO_WIDTH 32
#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_HI_OFST 4
+#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_HI_LEN 4
+#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_HI_LBN 32
+#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_HI_WIDTH 32
#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_NUM MC_CMD_FC_MAC_RX_NSTATS
#define MC_CMD_FC_MAC_RX_STATS_OCTETS 0x0 /* enum */
#define MC_CMD_FC_MAC_RX_OCTETS_OK 0x1 /* enum */
@@ -1382,7 +1425,13 @@
#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_OFST 0
#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_LEN 8
#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_LO_OFST 0
+#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_LO_LEN 4
+#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_LO_LBN 0
+#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_LO_WIDTH 32
#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_HI_OFST 4
+#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_HI_LEN 4
+#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_HI_LBN 32
+#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_HI_WIDTH 32
#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_NUM MC_CMD_FC_MAC_TX_NSTATS
#define MC_CMD_FC_MAC_TX_STATS_OCTETS 0x0 /* enum */
#define MC_CMD_FC_MAC_TX_OCTETS_OK 0x1 /* enum */
@@ -1415,7 +1464,13 @@
#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_OFST 0
#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_LEN 8
#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_LO_OFST 0
+#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_LO_LEN 4
+#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_LO_LBN 0
+#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_LO_WIDTH 32
#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_HI_OFST 4
+#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_HI_LEN 4
+#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_HI_LBN 32
+#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_HI_WIDTH 32
#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_NUM MC_CMD_FC_MAC_NSTATS_PER_BLOCK
/* MC_CMD_FC_OUT_MAC msgresponse */
@@ -1636,7 +1691,13 @@
#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_OFST 16
#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_LEN 8
#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_LO_OFST 16
+#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_LO_LEN 4
+#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_LO_LBN 128
+#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_LO_WIDTH 32
#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_HI_OFST 20
+#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_HI_LEN 4
+#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_HI_LBN 160
+#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_HI_WIDTH 32
#define MC_CMD_FC_OUT_FPGA_BUILD_REVISION_LO_OFST 24
#define MC_CMD_FC_OUT_FPGA_BUILD_REVISION_LO_LEN 4
#define MC_CMD_FC_OUT_FPGA_BUILD_REVISION_HI_OFST 28
@@ -1976,12 +2037,24 @@
#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_OFST 8
#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_LEN 8
#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_LO_OFST 8
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_LO_LEN 4
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_LO_LBN 64
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_LO_WIDTH 32
#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_HI_OFST 12
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_HI_LEN 4
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_HI_LBN 96
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_HI_WIDTH 32
/* Length of address map */
#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_OFST 16
#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_LEN 8
#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_LO_OFST 16
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_LO_LEN 4
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_LO_LBN 128
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_LO_WIDTH 32
#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_HI_OFST 20
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_HI_LEN 4
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_HI_LBN 160
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_HI_WIDTH 32
/* Component information field */
#define MC_CMD_FC_OUT_READ_MAP_INDEX_COMP_INFO_OFST 24
#define MC_CMD_FC_OUT_READ_MAP_INDEX_COMP_INFO_LEN 4
@@ -1989,7 +2062,13 @@
#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_OFST 28
#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_LEN 8
#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_LO_OFST 28
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_LO_LEN 4
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_LO_LBN 224
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_LO_WIDTH 32
#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_HI_OFST 32
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_HI_LEN 4
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_HI_LBN 256
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_HI_WIDTH 32
/* Name of the component */
#define MC_CMD_FC_OUT_READ_MAP_INDEX_NAME_OFST 36
#define MC_CMD_FC_OUT_READ_MAP_INDEX_NAME_LEN 1
@@ -2132,7 +2211,13 @@
#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_OFST 12
#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_LEN 8
#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_LO_OFST 12
+#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_LO_LEN 4
+#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_LO_LBN 96
+#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_LO_WIDTH 32
#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_HI_OFST 16
+#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_HI_LEN 4
+#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_HI_LBN 128
+#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_HI_WIDTH 32
/* MC_CMD_FC_OUT_UHLINK_RX_EYE msgresponse */
#define MC_CMD_FC_OUT_UHLINK_RX_EYE_LEN ((((0-1+(32*MC_CMD_FC_UHLINK_RX_EYE_PER_BLOCK))+1))>>3)
@@ -2153,7 +2238,13 @@
#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_OFST 4
#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_LEN 8
#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_LO_OFST 4
+#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_LO_LEN 4
+#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_LO_LBN 32
+#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_LO_WIDTH 32
#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_HI_OFST 8
+#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_HI_LEN 4
+#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_HI_LBN 64
+#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_HI_WIDTH 32
#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_NUM MC_CMD_FC_UHLINK_RX_EYE_PLOT_ROWS_PER_BLOCK
/* MC_CMD_FC_OUT_UHLINK_RX_TUNE msgresponse */
@@ -2222,12 +2313,24 @@
#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_OFST 4
#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_LEN 8
#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_LO_OFST 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_LO_LEN 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_LO_LBN 32
+#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_LO_WIDTH 32
#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_HI_OFST 8
+#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_HI_LEN 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_HI_LBN 64
+#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_HI_WIDTH 32
/* AOE address from which to transfer data */
#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_OFST 12
#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_LEN 8
#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_LO_OFST 12
+#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_LO_LEN 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_LO_LBN 96
+#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_LO_WIDTH 32
#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_HI_OFST 16
+#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_HI_LEN 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_HI_LBN 128
+#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_HI_WIDTH 32
/* Length of AOE transfer (total) */
#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_LENGTH_OFST 20
#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_LENGTH_LEN 4
@@ -2243,12 +2346,24 @@
#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_OFST 36
#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_LEN 8
#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_LO_OFST 36
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_LO_LEN 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_LO_LBN 288
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_LO_WIDTH 32
#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_HI_OFST 40
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_HI_LEN 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_HI_LBN 320
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_HI_WIDTH 32
/* When active, end read time */
#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_OFST 44
#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_LEN 8
#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_LO_OFST 44
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_LO_LEN 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_LO_LBN 352
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_LO_WIDTH 32
#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_HI_OFST 48
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_HI_LEN 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_HI_LBN 384
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_HI_WIDTH 32
/* MC_CMD_FC_OUT_LOG_ADDR_RANGE msgresponse */
#define MC_CMD_FC_OUT_LOG_ADDR_RANGE_LEN 0
@@ -2263,7 +2378,13 @@
#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_OFST 4
#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_LEN 8
#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_LO_OFST 4
+#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_LO_LEN 4
+#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_LO_LBN 32
+#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_LO_WIDTH 32
#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_HI_OFST 8
+#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_HI_LEN 4
+#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_HI_LBN 64
+#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_HI_WIDTH 32
#define MC_CMD_FC_OUT_CLOCK_GET_TIME_NANOSECONDS_OFST 12
#define MC_CMD_FC_OUT_CLOCK_GET_TIME_NANOSECONDS_LEN 4
#define MC_CMD_FC_OUT_CLOCK_GET_TIME_RANGE_OFST 16
@@ -2311,7 +2432,13 @@
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_OFST 0
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_LEN 8
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_LO_OFST 0
+#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_LO_LEN 4
+#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_LO_LBN 0
+#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_LO_WIDTH 32
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_HI_OFST 4
+#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_HI_LEN 4
+#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_HI_LBN 32
+#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_HI_WIDTH 32
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_MINNUM 0
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_MAXNUM 31
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_MAXNUM_MCDI2 127
@@ -2391,6 +2518,7 @@
* AOE operations on MC
*/
#define MC_CMD_AOE 0xa
+#define MC_CMD_AOE_MSGSET 0xa
/* MC_CMD_AOE_IN msgrequest */
#define MC_CMD_AOE_IN_LEN 4
@@ -2580,7 +2708,13 @@
#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_OFST 8
#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_LEN 8
#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_LO_OFST 8
+#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_LO_LEN 4
+#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_LO_LBN 64
+#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_HI_OFST 12
+#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_HI_LEN 4
+#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_HI_LBN 96
+#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_AOE_IN_MAC_STATS_CMD_OFST 16
#define MC_CMD_AOE_IN_MAC_STATS_CMD_LEN 4
#define MC_CMD_AOE_IN_MAC_STATS_DMA_OFST 16
@@ -3024,7 +3158,13 @@
#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_OFST 0
#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_LEN 8
#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_LO_OFST 0
+#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_LO_LEN 4
+#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_LO_LBN 0
+#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_LO_WIDTH 32
#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_HI_OFST 4
+#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_HI_LEN 4
+#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_HI_LBN 32
+#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_HI_WIDTH 32
#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS
/* MC_CMD_AOE_OUT_GET_PHY_MEDIA_INFO msgresponse */
diff --git a/drivers/common/sfc_efx/base/efx_regs_mcdi_strs.h b/drivers/common/sfc_efx/base/efx_regs_mcdi_strs.h
index be570bc0a..e8fbb6f94 100644
--- a/drivers/common/sfc_efx/base/efx_regs_mcdi_strs.h
+++ b/drivers/common/sfc_efx/base/efx_regs_mcdi_strs.h
@@ -6,7 +6,7 @@
/*
* This file is automatically generated. DO NOT EDIT IT.
- * To make changes, edit the .yml files in sfregistry under doc/mcdi/ and
+ * To make changes, edit the .yml files in smartnic_registry under doc/mcdi/ and
* rebuild this file with "make mcdi_headers_v5".
*
* The version of this file has MCDI strings really used in the libefx.
--
2.20.1
^ permalink raw reply [relevance 1%]
* [dpdk-dev] [RFC PATCH 0/3] Add PIE support for HQoS library
@ 2021-05-24 10:58 3% Liguzinski, WojciechX
2021-05-24 16:19 0% ` Stephen Hemminger
2021-05-25 8:56 0% ` Morten Brørup
0 siblings, 2 replies; 200+ results
From: Liguzinski, WojciechX @ 2021-05-24 10:58 UTC (permalink / raw)
To: dev, jasvinder.singh, cristian.dumitrescu; +Cc: savinay.dharmappa
DPDK sched library is equipped with mechanism that secures it from the bufferbloat problem
which is a situation when excess buffers in the network cause high latency and latency
variation. Currently, it supports RED for queue congestion control (which is designed
to control the queue length but it does not control latency directly and is now being
obsoleted ). However, more advanced queue management is required to address this problem
and provide desirable quality of service to users.
This solution (RFC) proposes usage of new algorithm called "PIE" (Proportional Integral
controller Enhanced) that can effectively and directly control queuing latency to address
the bufferbloat problem.
The implementation of mentioned functionality includes modification of existing and
adding a new set of data structures to the library, adding PIE related APIs.
This affects structures in public API/ABI. That is why deprecation notice is going
to be prepared and sent.
Liguzinski, WojciechX (3):
sched: add pie based congestion management
example/qos_sched: add pie support
example/ip_pipeline: add pie support
config/rte_config.h | 1 -
drivers/net/softnic/rte_eth_softnic_tm.c | 4 +-
examples/ip_pipeline/tmgr.c | 4 +-
examples/qos_sched/app_thread.c | 1 -
examples/qos_sched/cfg_file.c | 82 +++++++--
examples/qos_sched/init.c | 5 +-
examples/qos_sched/profile.cfg | 196 +++++++++++++-------
lib/sched/meson.build | 10 +-
lib/sched/rte_sched.c | 220 +++++++++++++++++------
lib/sched/rte_sched.h | 53 ++++--
10 files changed, 411 insertions(+), 165 deletions(-)
--
2.17.1
--------------------------------------------------------------
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Registered in Ireland
Registered Office: Collinstown Industrial Park, Leixlip, County Kildare
Registered Number: 308263
This e-mail and any attachments may contain confidential material for the sole
use of the intended recipient(s). Any review or distribution by others is
strictly prohibited. If you are not the intended recipient, please contact the
sender and delete all copies.
^ permalink raw reply [relevance 3%]
* [dpdk-dev] [PATCH v2 1/3] common/sfc_efx/base: update MCDI headers
2021-04-28 9:49 1% [dpdk-dev] [PATCH 1/3] common/sfc_efx/base: update MCDI headers Ivan Malov
@ 2021-05-22 19:32 1% ` Ivan Malov
2021-05-24 11:18 1% ` [dpdk-dev] [PATCH v3 " Ivan Malov
2 siblings, 0 replies; 200+ results
From: Ivan Malov @ 2021-05-22 19:32 UTC (permalink / raw)
To: dev; +Cc: Andrew Rybchenko, Ray Kinsella, Ferruh Yigit
From: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
---
drivers/common/sfc_efx/base/efx_regs_mcdi.h | 3532 +++++++++++++++--
.../common/sfc_efx/base/efx_regs_mcdi_aoe.h | 142 +-
.../common/sfc_efx/base/efx_regs_mcdi_strs.h | 2 +-
3 files changed, 3331 insertions(+), 345 deletions(-)
diff --git a/drivers/common/sfc_efx/base/efx_regs_mcdi.h b/drivers/common/sfc_efx/base/efx_regs_mcdi.h
index 976db37d6..a3c9f076e 100644
--- a/drivers/common/sfc_efx/base/efx_regs_mcdi.h
+++ b/drivers/common/sfc_efx/base/efx_regs_mcdi.h
@@ -6,7 +6,7 @@
/*
* This file is automatically generated. DO NOT EDIT IT.
- * To make changes, edit the .yml files in sfregistry under doc/mcdi/ and
+ * To make changes, edit the .yml files in smartnic_registry under doc/mcdi/ and
* rebuild this file with "make mcdi_headers_v5".
*/
@@ -410,6 +410,48 @@
#define MC_CMD_RESOURCE_INSTANCE_ANY 0xffffffff
#define MC_CMD_RESOURCE_INSTANCE_NONE 0xfffffffe /* enum */
+/* MC_CMD_FPGA_FLASH_INDEX enum */
+#define MC_CMD_FPGA_FLASH_PRIMARY 0x0 /* enum */
+#define MC_CMD_FPGA_FLASH_SECONDARY 0x1 /* enum */
+
+/* MC_CMD_EXTERNAL_MAE_LINK_MODE enum */
+/* enum: Legacy mode as described in XN-200039-TC. */
+#define MC_CMD_EXTERNAL_MAE_LINK_MODE_LEGACY 0x0
+/* enum: Switchdev mode as described in XN-200039-TC. */
+#define MC_CMD_EXTERNAL_MAE_LINK_MODE_SWITCHDEV 0x1
+/* enum: Bootstrap mode as described in XN-200039-TC. */
+#define MC_CMD_EXTERNAL_MAE_LINK_MODE_BOOTSTRAP 0x2
+/* enum: Link-mode change is in-progress as described in XN-200039-TC. */
+#define MC_CMD_EXTERNAL_MAE_LINK_MODE_PENDING 0xf
+
+/* PCIE_INTERFACE enum: From EF100 onwards, SFC products can have multiple PCIe
+ * interfaces. There is a need to refer to interfaces explicitly from drivers
+ * (for example, a management driver on one interface administering a function
+ * on another interface). This enumeration provides stable identifiers to all
+ * interfaces present on a product. Product documentation will specify which
+ * interfaces exist and their associated identifier. In general, drivers,
+ * should not assign special meanings to specific values. Instead, behaviour
+ * should be determined by NIC configuration, which will identify interfaces
+ * where appropriate.
+ */
+/* enum: Primary host interfaces. Typically (i.e. for all known SFC products)
+ * the interface exposed on the edge connector (or form factor equivalent).
+ */
+#define PCIE_INTERFACE_HOST_PRIMARY 0x0
+/* enum: Riverhead and keystone products have a second PCIe interface to which
+ * an on-NIC ARM module is expected to be connected.
+ */
+#define PCIE_INTERFACE_NIC_EMBEDDED 0x1
+/* enum: For MCDI commands issued over a PCIe interface, this value is
+ * translated into the interface over which the command was issued. Not
+ * meaningful for other MCDI transports.
+ */
+#define PCIE_INTERFACE_CALLER 0xffffffff
+
+/* MC_CLIENT_ID_SPECIFIER enum */
+/* enum: Equivalent to the caller's client ID */
+#define MC_CMD_CLIENT_ID_SELF 0xffffffff
+
/* MAE_FIELD_SUPPORT_STATUS enum */
/* enum: The NIC does not support this field. The driver must ensure that any
* mask associated with this field in a match rule is zeroed. The NIC may
@@ -470,6 +512,20 @@
#define MAE_FIELD_CT_PRIVATE_FLAGS 0x8
/* enum: 1 if the packet ingressed the NIC from one of the MACs, else 0. */
#define MAE_FIELD_IS_FROM_NETWORK 0x9
+/* enum: 1 if the packet has 1 or more VLAN tags, else 0. */
+#define MAE_FIELD_HAS_OVLAN 0xa
+/* enum: 1 if the packet has 2 or more VLAN tags, else 0. */
+#define MAE_FIELD_HAS_IVLAN 0xb
+/* enum: 1 if the outer packet has 1 or more VLAN tags, else 0; only present
+ * when encap
+ */
+#define MAE_FIELD_ENC_HAS_OVLAN 0xc
+/* enum: 1 if the outer packet has 2 or more VLAN tags, else 0; only present
+ * when encap
+ */
+#define MAE_FIELD_ENC_HAS_IVLAN 0xd
+/* enum: Packet is IP fragment */
+#define MAE_FIELD_ENC_IP_FRAG 0xe
#define MAE_FIELD_ETHER_TYPE 0x21 /* enum */
#define MAE_FIELD_VLAN0_TCI 0x22 /* enum */
#define MAE_FIELD_VLAN0_PROTO 0x23 /* enum */
@@ -508,6 +564,10 @@
#define MAE_FIELD_L4_DPORT 0x33
/* enum: Inner when encap */
#define MAE_FIELD_TCP_FLAGS 0x34
+/* enum: TCP packet with any of SYN, FIN or RST flag set */
+#define MAE_FIELD_TCP_SYN_FIN_RST 0x35
+/* enum: Packet is IP fragment with fragment offset 0 */
+#define MAE_FIELD_IP_FIRST_FRAG 0x36
/* enum: The type of encapsulated used for this packet. Value as per
* ENCAP_TYPE_*.
*/
@@ -550,8 +610,8 @@
#define MAE_FIELD_ENC_L4_SPORT 0x52
/* enum: Outer; only present when encap */
#define MAE_FIELD_ENC_L4_DPORT 0x53
-/* enum: VNI (when VXLAN or GENEVE) VSID (when NVGRE) Outer; only present when
- * encap
+/* enum: VNI (when VXLAN or GENEVE) VSID (when NVGRE) Bottom 24 bits of Key
+ * (when L2GRE) Outer; only present when encap
*/
#define MAE_FIELD_ENC_VNET_ID 0x54
@@ -566,6 +626,14 @@
#define MAE_MCDI_ENCAP_TYPE_GENEVE 0x3 /* enum */
#define MAE_MCDI_ENCAP_TYPE_L2GRE 0x4 /* enum */
+/* MAE_MPORT_END enum: Selects which end of the logical link identified by an
+ * MPORT_SELECTOR is targeted by an operation.
+ */
+/* enum: Selects the port on the MAE virtual switch */
+#define MAE_MPORT_END_MAE 0x1
+/* enum: Selects the virtual NIC plugged into the MAE switch */
+#define MAE_MPORT_END_VNIC 0x2
+
/* MCDI_EVENT structuredef: The structure of an MCDI_EVENT on Siena/EF10/EF100
* platforms
*/
@@ -647,17 +715,21 @@
#define MCDI_EVENT_TX_ERR_TYPE_OFST 0
#define MCDI_EVENT_TX_ERR_TYPE_LBN 12
#define MCDI_EVENT_TX_ERR_TYPE_WIDTH 4
-/* enum: Descriptor loader reported failure */
+/* enum: Descriptor loader reported failure. Specific to EF10-family NICs. */
#define MCDI_EVENT_TX_ERR_DL_FAIL 0x1
-/* enum: Descriptor ring empty and no EOP seen for packet */
+/* enum: Descriptor ring empty and no EOP seen for packet. Specific to
+ * EF10-family NICs
+ */
#define MCDI_EVENT_TX_ERR_NO_EOP 0x2
-/* enum: Overlength packet */
+/* enum: Overlength packet. Specific to EF10-family NICs. */
#define MCDI_EVENT_TX_ERR_2BIG 0x3
-/* enum: Malformed option descriptor */
+/* enum: Malformed option descriptor. Specific to EF10-family NICs. */
#define MCDI_EVENT_TX_BAD_OPTDESC 0x5
-/* enum: Option descriptor part way through a packet */
+/* enum: Option descriptor part way through a packet. Specific to EF10-family
+ * NICs.
+ */
#define MCDI_EVENT_TX_OPT_IN_PKT 0x8
-/* enum: DMA or PIO data access error */
+/* enum: DMA or PIO data access error. Specific to EF10-family NICs */
#define MCDI_EVENT_TX_ERR_BAD_DMA_OR_PIO 0x9
#define MCDI_EVENT_TX_ERR_INFO_OFST 0
#define MCDI_EVENT_TX_ERR_INFO_LBN 16
@@ -1270,7 +1342,13 @@
#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_OFST 8
#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LEN 8
#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LO_OFST 8
+#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LO_LEN 4
+#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LO_LBN 64
+#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LO_WIDTH 32
#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_HI_OFST 12
+#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_HI_LEN 4
+#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_HI_LBN 96
+#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_HI_WIDTH 32
#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_MINNUM 1
#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_MAXNUM 30
#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_MAXNUM_MCDI2 126
@@ -1384,6 +1462,7 @@
* has additional checks to reject insecure calls.
*/
#define MC_CMD_READ32 0x1
+#define MC_CMD_READ32_MSGSET 0x1
#undef MC_CMD_0x1_PRIVILEGE_CTG
#define MC_CMD_0x1_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -1413,6 +1492,7 @@
* Write multiple 32byte words to MC memory.
*/
#define MC_CMD_WRITE32 0x2
+#define MC_CMD_WRITE32_MSGSET 0x2
#undef MC_CMD_0x2_PRIVILEGE_CTG
#define MC_CMD_0x2_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -1442,6 +1522,7 @@
* has additional checks to reject insecure calls.
*/
#define MC_CMD_COPYCODE 0x3
+#define MC_CMD_COPYCODE_MSGSET 0x3
#undef MC_CMD_0x3_PRIVILEGE_CTG
#define MC_CMD_0x3_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -1505,6 +1586,7 @@
* Select function for function-specific commands.
*/
#define MC_CMD_SET_FUNC 0x4
+#define MC_CMD_SET_FUNC_MSGSET 0x4
#undef MC_CMD_0x4_PRIVILEGE_CTG
#define MC_CMD_0x4_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -1524,6 +1606,7 @@
* Get the instruction address from which the MC booted.
*/
#define MC_CMD_GET_BOOT_STATUS 0x5
+#define MC_CMD_GET_BOOT_STATUS_MSGSET 0x5
#undef MC_CMD_0x5_PRIVILEGE_CTG
#define MC_CMD_0x5_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -1558,6 +1641,7 @@
* fields will only be present if OUT.GLOBAL_FLAGS != NO_FAILS
*/
#define MC_CMD_GET_ASSERTS 0x6
+#define MC_CMD_GET_ASSERTS_MSGSET 0x6
#undef MC_CMD_0x6_PRIVILEGE_CTG
#define MC_CMD_0x6_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -1682,12 +1766,24 @@
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_OFST 260
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_LEN 8
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_LO_OFST 260
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_LO_LEN 4
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_LO_LBN 2080
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_LO_WIDTH 32
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_HI_OFST 264
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_HI_LEN 4
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_HI_LBN 2112
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_HI_WIDTH 32
/* MC firmware version number */
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_OFST 268
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_LEN 8
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_LO_OFST 268
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_LO_LEN 4
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_LO_LBN 2144
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_LO_WIDTH 32
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_HI_OFST 272
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_HI_LEN 4
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_HI_LBN 2176
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_HI_WIDTH 32
/* MC firmware security level */
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_SECURITY_LEVEL_OFST 276
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_SECURITY_LEVEL_LEN 4
@@ -1705,6 +1801,7 @@
* sensor notifications and MCDI completions
*/
#define MC_CMD_LOG_CTRL 0x7
+#define MC_CMD_LOG_CTRL_MSGSET 0x7
#undef MC_CMD_0x7_PRIVILEGE_CTG
#define MC_CMD_0x7_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -1731,6 +1828,7 @@
* Get version information about adapter components.
*/
#define MC_CMD_GET_VERSION 0x8
+#define MC_CMD_GET_VERSION_MSGSET 0x8
#undef MC_CMD_0x8_PRIVILEGE_CTG
#define MC_CMD_0x8_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -1771,7 +1869,13 @@
#define MC_CMD_GET_VERSION_OUT_VERSION_OFST 24
#define MC_CMD_GET_VERSION_OUT_VERSION_LEN 8
#define MC_CMD_GET_VERSION_OUT_VERSION_LO_OFST 24
+#define MC_CMD_GET_VERSION_OUT_VERSION_LO_LEN 4
+#define MC_CMD_GET_VERSION_OUT_VERSION_LO_LBN 192
+#define MC_CMD_GET_VERSION_OUT_VERSION_LO_WIDTH 32
#define MC_CMD_GET_VERSION_OUT_VERSION_HI_OFST 28
+#define MC_CMD_GET_VERSION_OUT_VERSION_HI_LEN 4
+#define MC_CMD_GET_VERSION_OUT_VERSION_HI_LBN 224
+#define MC_CMD_GET_VERSION_OUT_VERSION_HI_WIDTH 32
/* MC_CMD_GET_VERSION_EXT_OUT msgresponse */
#define MC_CMD_GET_VERSION_EXT_OUT_LEN 48
@@ -1787,7 +1891,13 @@
#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_OFST 24
#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_LEN 8
#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_LO_OFST 24
+#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_LO_LEN 4
+#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_LO_LBN 192
+#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_LO_WIDTH 32
#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_HI_OFST 28
+#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_HI_LEN 4
+#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_HI_LBN 224
+#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_HI_WIDTH 32
/* extra info */
#define MC_CMD_GET_VERSION_EXT_OUT_EXTRA_OFST 32
#define MC_CMD_GET_VERSION_EXT_OUT_EXTRA_LEN 16
@@ -1811,7 +1921,13 @@
#define MC_CMD_GET_VERSION_V2_OUT_VERSION_OFST 24
#define MC_CMD_GET_VERSION_V2_OUT_VERSION_LEN 8
#define MC_CMD_GET_VERSION_V2_OUT_VERSION_LO_OFST 24
+#define MC_CMD_GET_VERSION_V2_OUT_VERSION_LO_LEN 4
+#define MC_CMD_GET_VERSION_V2_OUT_VERSION_LO_LBN 192
+#define MC_CMD_GET_VERSION_V2_OUT_VERSION_LO_WIDTH 32
#define MC_CMD_GET_VERSION_V2_OUT_VERSION_HI_OFST 28
+#define MC_CMD_GET_VERSION_V2_OUT_VERSION_HI_LEN 4
+#define MC_CMD_GET_VERSION_V2_OUT_VERSION_HI_LBN 224
+#define MC_CMD_GET_VERSION_V2_OUT_VERSION_HI_WIDTH 32
/* extra info */
#define MC_CMD_GET_VERSION_V2_OUT_EXTRA_OFST 32
#define MC_CMD_GET_VERSION_V2_OUT_EXTRA_LEN 16
@@ -1833,6 +1949,33 @@
#define MC_CMD_GET_VERSION_V2_OUT_BOARD_EXT_INFO_PRESENT_OFST 48
#define MC_CMD_GET_VERSION_V2_OUT_BOARD_EXT_INFO_PRESENT_LBN 4
#define MC_CMD_GET_VERSION_V2_OUT_BOARD_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_DATAPATH_HW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_DATAPATH_HW_VERSION_PRESENT_LBN 5
+#define MC_CMD_GET_VERSION_V2_OUT_DATAPATH_HW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_DATAPATH_FW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_DATAPATH_FW_VERSION_PRESENT_LBN 6
+#define MC_CMD_GET_VERSION_V2_OUT_DATAPATH_FW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_BOOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_BOOT_VERSION_PRESENT_LBN 7
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_BOOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_UBOOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_UBOOT_VERSION_PRESENT_LBN 8
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_UBOOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_LBN 9
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_LBN 10
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_VERSION_PRESENT_LBN 11
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_BOARD_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_BOARD_VERSION_PRESENT_LBN 12
+#define MC_CMD_GET_VERSION_V2_OUT_BOARD_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_BUNDLE_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_BUNDLE_VERSION_PRESENT_LBN 13
+#define MC_CMD_GET_VERSION_V2_OUT_BUNDLE_VERSION_PRESENT_WIDTH 1
/* MC firmware unique build ID (as binary SHA-1 value) */
#define MC_CMD_GET_VERSION_V2_OUT_MCFW_BUILD_ID_OFST 52
#define MC_CMD_GET_VERSION_V2_OUT_MCFW_BUILD_ID_LEN 20
@@ -1850,7 +1993,13 @@
#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_OFST 156
#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_LEN 8
#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_LO_OFST 156
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_LO_LEN 4
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_LO_LBN 1248
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_LO_WIDTH 32
#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_HI_OFST 160
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_HI_LEN 4
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_HI_LBN 1280
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_HI_WIDTH 32
/* The ID of the SUC chip. This is specific to the platform but typically
* indicates family, memory sizes etc. See SF-116728-SW for further details.
*/
@@ -1864,7 +2013,13 @@
#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_OFST 184
#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_LEN 8
#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_LO_OFST 184
+#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_LO_LEN 4
+#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_LO_LBN 1472
+#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_LO_WIDTH 32
#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_HI_OFST 188
+#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_HI_LEN 4
+#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_HI_LBN 1504
+#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_HI_WIDTH 32
/* FPGA version as three numbers. On Riverhead based systems this field uses
* the same encoding as hardware version ID registers (MC_FPGA_BUILD_HWRD_REG):
* FPGA_VERSION[0]: x => Image H{x} FPGA_VERSION[1]: Revision letter (0 => A, 1
@@ -1886,12 +2041,496 @@
#define MC_CMD_GET_VERSION_V2_OUT_BOARD_SERIAL_OFST 240
#define MC_CMD_GET_VERSION_V2_OUT_BOARD_SERIAL_LEN 64
+/* MC_CMD_GET_VERSION_V3_OUT msgresponse: Extended response providing version
+ * information for all adapter components. For Riverhead based designs, base MC
+ * firmware version fields refer to NMC firmware, while CMC firmware data is in
+ * dedicated CMC fields. Flags indicate which data is present in the response
+ * (depending on which components exist on a particular adapter)
+ */
+#define MC_CMD_GET_VERSION_V3_OUT_LEN 328
+/* MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */
+/* MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */
+/* Enum values, see field(s): */
+/* MC_CMD_GET_VERSION_V0_OUT/MC_CMD_GET_VERSION_OUT_FIRMWARE */
+#define MC_CMD_GET_VERSION_V3_OUT_PCOL_OFST 4
+#define MC_CMD_GET_VERSION_V3_OUT_PCOL_LEN 4
+/* 128bit mask of functions supported by the current firmware */
+#define MC_CMD_GET_VERSION_V3_OUT_SUPPORTED_FUNCS_OFST 8
+#define MC_CMD_GET_VERSION_V3_OUT_SUPPORTED_FUNCS_LEN 16
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_OFST 24
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_LEN 8
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_LO_OFST 24
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_LO_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_LO_LBN 192
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_HI_OFST 28
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_HI_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_HI_LBN 224
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_HI_WIDTH 32
+/* extra info */
+#define MC_CMD_GET_VERSION_V3_OUT_EXTRA_OFST 32
+#define MC_CMD_GET_VERSION_V3_OUT_EXTRA_LEN 16
+/* Flags indicating which extended fields are valid */
+#define MC_CMD_GET_VERSION_V3_OUT_FLAGS_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_FLAGS_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_EXT_INFO_PRESENT_LBN 0
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_EXT_INFO_PRESENT_LBN 1
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_CMC_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_CMC_EXT_INFO_PRESENT_LBN 2
+#define MC_CMD_GET_VERSION_V3_OUT_CMC_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_FPGA_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_FPGA_EXT_INFO_PRESENT_LBN 3
+#define MC_CMD_GET_VERSION_V3_OUT_FPGA_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_EXT_INFO_PRESENT_LBN 4
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_HW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_HW_VERSION_PRESENT_LBN 5
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_HW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_FW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_FW_VERSION_PRESENT_LBN 6
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_FW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_BOOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_BOOT_VERSION_PRESENT_LBN 7
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_BOOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_UBOOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_UBOOT_VERSION_PRESENT_LBN 8
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_UBOOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_LBN 9
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_LBN 10
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_VERSION_PRESENT_LBN 11
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_VERSION_PRESENT_LBN 12
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_BUNDLE_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_BUNDLE_VERSION_PRESENT_LBN 13
+#define MC_CMD_GET_VERSION_V3_OUT_BUNDLE_VERSION_PRESENT_WIDTH 1
+/* MC firmware unique build ID (as binary SHA-1 value) */
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_BUILD_ID_OFST 52
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_BUILD_ID_LEN 20
+/* MC firmware security level */
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_SECURITY_LEVEL_OFST 72
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_SECURITY_LEVEL_LEN 4
+/* MC firmware build name (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_BUILD_NAME_OFST 76
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_BUILD_NAME_LEN 64
+/* The SUC firmware version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_VERSION_OFST 140
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_VERSION_NUM 4
+/* SUC firmware build date (as 64-bit Unix timestamp) */
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_OFST 156
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_LEN 8
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_LO_OFST 156
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_LO_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_LO_LBN 1248
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_HI_OFST 160
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_HI_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_HI_LBN 1280
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_HI_WIDTH 32
+/* The ID of the SUC chip. This is specific to the platform but typically
+ * indicates family, memory sizes etc. See SF-116728-SW for further details.
+ */
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_CHIP_ID_OFST 164
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_CHIP_ID_LEN 4
+/* The CMC firmware version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_VERSION_OFST 168
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_VERSION_NUM 4
+/* CMC firmware build date (as 64-bit Unix timestamp) */
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_OFST 184
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_LEN 8
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_LO_OFST 184
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_LO_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_LO_LBN 1472
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_HI_OFST 188
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_HI_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_HI_LBN 1504
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_HI_WIDTH 32
+/* FPGA version as three numbers. On Riverhead based systems this field uses
+ * the same encoding as hardware version ID registers (MC_FPGA_BUILD_HWRD_REG):
+ * FPGA_VERSION[0]: x => Image H{x} FPGA_VERSION[1]: Revision letter (0 => A, 1
+ * => B, ...) FPGA_VERSION[2]: Sub-revision number
+ */
+#define MC_CMD_GET_VERSION_V3_OUT_FPGA_VERSION_OFST 192
+#define MC_CMD_GET_VERSION_V3_OUT_FPGA_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_FPGA_VERSION_NUM 3
+/* Extra FPGA revision information (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V3_OUT_FPGA_EXTRA_OFST 204
+#define MC_CMD_GET_VERSION_V3_OUT_FPGA_EXTRA_LEN 16
+/* Board name / adapter model (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_NAME_OFST 220
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_NAME_LEN 16
+/* Board revision number */
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_REVISION_OFST 236
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_REVISION_LEN 4
+/* Board serial number (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_SERIAL_OFST 240
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_SERIAL_LEN 64
+/* The version of the datapath hardware design as three number - a.b.c */
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_HW_VERSION_OFST 304
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_HW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_HW_VERSION_NUM 3
+/* The version of the firmware library used to control the datapath as three
+ * number - a.b.c
+ */
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_FW_VERSION_OFST 316
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_FW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_FW_VERSION_NUM 3
+
+/* MC_CMD_GET_VERSION_V4_OUT msgresponse: Extended response providing SoC
+ * version information
+ */
+#define MC_CMD_GET_VERSION_V4_OUT_LEN 392
+/* MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */
+/* MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */
+/* Enum values, see field(s): */
+/* MC_CMD_GET_VERSION_V0_OUT/MC_CMD_GET_VERSION_OUT_FIRMWARE */
+#define MC_CMD_GET_VERSION_V4_OUT_PCOL_OFST 4
+#define MC_CMD_GET_VERSION_V4_OUT_PCOL_LEN 4
+/* 128bit mask of functions supported by the current firmware */
+#define MC_CMD_GET_VERSION_V4_OUT_SUPPORTED_FUNCS_OFST 8
+#define MC_CMD_GET_VERSION_V4_OUT_SUPPORTED_FUNCS_LEN 16
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_OFST 24
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_LEN 8
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_LO_OFST 24
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_LO_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_LO_LBN 192
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_HI_OFST 28
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_HI_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_HI_LBN 224
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_HI_WIDTH 32
+/* extra info */
+#define MC_CMD_GET_VERSION_V4_OUT_EXTRA_OFST 32
+#define MC_CMD_GET_VERSION_V4_OUT_EXTRA_LEN 16
+/* Flags indicating which extended fields are valid */
+#define MC_CMD_GET_VERSION_V4_OUT_FLAGS_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_FLAGS_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_EXT_INFO_PRESENT_LBN 0
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_EXT_INFO_PRESENT_LBN 1
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_CMC_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_CMC_EXT_INFO_PRESENT_LBN 2
+#define MC_CMD_GET_VERSION_V4_OUT_CMC_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_FPGA_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_FPGA_EXT_INFO_PRESENT_LBN 3
+#define MC_CMD_GET_VERSION_V4_OUT_FPGA_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_EXT_INFO_PRESENT_LBN 4
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_HW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_HW_VERSION_PRESENT_LBN 5
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_HW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_FW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_FW_VERSION_PRESENT_LBN 6
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_FW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_BOOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_BOOT_VERSION_PRESENT_LBN 7
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_BOOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_UBOOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_UBOOT_VERSION_PRESENT_LBN 8
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_UBOOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_LBN 9
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_LBN 10
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_VERSION_PRESENT_LBN 11
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_VERSION_PRESENT_LBN 12
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_BUNDLE_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_BUNDLE_VERSION_PRESENT_LBN 13
+#define MC_CMD_GET_VERSION_V4_OUT_BUNDLE_VERSION_PRESENT_WIDTH 1
+/* MC firmware unique build ID (as binary SHA-1 value) */
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_BUILD_ID_OFST 52
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_BUILD_ID_LEN 20
+/* MC firmware security level */
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_SECURITY_LEVEL_OFST 72
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_SECURITY_LEVEL_LEN 4
+/* MC firmware build name (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_BUILD_NAME_OFST 76
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_BUILD_NAME_LEN 64
+/* The SUC firmware version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_VERSION_OFST 140
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_VERSION_NUM 4
+/* SUC firmware build date (as 64-bit Unix timestamp) */
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_OFST 156
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_LEN 8
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_LO_OFST 156
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_LO_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_LO_LBN 1248
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_HI_OFST 160
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_HI_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_HI_LBN 1280
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_HI_WIDTH 32
+/* The ID of the SUC chip. This is specific to the platform but typically
+ * indicates family, memory sizes etc. See SF-116728-SW for further details.
+ */
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_CHIP_ID_OFST 164
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_CHIP_ID_LEN 4
+/* The CMC firmware version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_VERSION_OFST 168
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_VERSION_NUM 4
+/* CMC firmware build date (as 64-bit Unix timestamp) */
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_OFST 184
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_LEN 8
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_LO_OFST 184
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_LO_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_LO_LBN 1472
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_HI_OFST 188
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_HI_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_HI_LBN 1504
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_HI_WIDTH 32
+/* FPGA version as three numbers. On Riverhead based systems this field uses
+ * the same encoding as hardware version ID registers (MC_FPGA_BUILD_HWRD_REG):
+ * FPGA_VERSION[0]: x => Image H{x} FPGA_VERSION[1]: Revision letter (0 => A, 1
+ * => B, ...) FPGA_VERSION[2]: Sub-revision number
+ */
+#define MC_CMD_GET_VERSION_V4_OUT_FPGA_VERSION_OFST 192
+#define MC_CMD_GET_VERSION_V4_OUT_FPGA_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_FPGA_VERSION_NUM 3
+/* Extra FPGA revision information (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V4_OUT_FPGA_EXTRA_OFST 204
+#define MC_CMD_GET_VERSION_V4_OUT_FPGA_EXTRA_LEN 16
+/* Board name / adapter model (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_NAME_OFST 220
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_NAME_LEN 16
+/* Board revision number */
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_REVISION_OFST 236
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_REVISION_LEN 4
+/* Board serial number (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_SERIAL_OFST 240
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_SERIAL_LEN 64
+/* The version of the datapath hardware design as three number - a.b.c */
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_HW_VERSION_OFST 304
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_HW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_HW_VERSION_NUM 3
+/* The version of the firmware library used to control the datapath as three
+ * number - a.b.c
+ */
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_FW_VERSION_OFST 316
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_FW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_FW_VERSION_NUM 3
+/* The SOC boot version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_BOOT_VERSION_OFST 328
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_BOOT_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_BOOT_VERSION_NUM 4
+/* The SOC uboot version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_UBOOT_VERSION_OFST 344
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_UBOOT_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_UBOOT_VERSION_NUM 4
+/* The SOC main rootfs version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_MAIN_ROOTFS_VERSION_OFST 360
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_MAIN_ROOTFS_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_MAIN_ROOTFS_VERSION_NUM 4
+/* The SOC recovery buildroot version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_RECOVERY_BUILDROOT_VERSION_OFST 376
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_RECOVERY_BUILDROOT_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_RECOVERY_BUILDROOT_VERSION_NUM 4
+
+/* MC_CMD_GET_VERSION_V5_OUT msgresponse: Extended response providing bundle
+ * and board version information
+ */
+#define MC_CMD_GET_VERSION_V5_OUT_LEN 424
+/* MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */
+/* MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */
+/* Enum values, see field(s): */
+/* MC_CMD_GET_VERSION_V0_OUT/MC_CMD_GET_VERSION_OUT_FIRMWARE */
+#define MC_CMD_GET_VERSION_V5_OUT_PCOL_OFST 4
+#define MC_CMD_GET_VERSION_V5_OUT_PCOL_LEN 4
+/* 128bit mask of functions supported by the current firmware */
+#define MC_CMD_GET_VERSION_V5_OUT_SUPPORTED_FUNCS_OFST 8
+#define MC_CMD_GET_VERSION_V5_OUT_SUPPORTED_FUNCS_LEN 16
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_OFST 24
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_LEN 8
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_LO_OFST 24
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_LO_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_LO_LBN 192
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_HI_OFST 28
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_HI_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_HI_LBN 224
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_HI_WIDTH 32
+/* extra info */
+#define MC_CMD_GET_VERSION_V5_OUT_EXTRA_OFST 32
+#define MC_CMD_GET_VERSION_V5_OUT_EXTRA_LEN 16
+/* Flags indicating which extended fields are valid */
+#define MC_CMD_GET_VERSION_V5_OUT_FLAGS_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_FLAGS_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_EXT_INFO_PRESENT_LBN 0
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_EXT_INFO_PRESENT_LBN 1
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_CMC_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_CMC_EXT_INFO_PRESENT_LBN 2
+#define MC_CMD_GET_VERSION_V5_OUT_CMC_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_FPGA_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_FPGA_EXT_INFO_PRESENT_LBN 3
+#define MC_CMD_GET_VERSION_V5_OUT_FPGA_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_EXT_INFO_PRESENT_LBN 4
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_HW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_HW_VERSION_PRESENT_LBN 5
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_HW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_FW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_FW_VERSION_PRESENT_LBN 6
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_FW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_BOOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_BOOT_VERSION_PRESENT_LBN 7
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_BOOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_UBOOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_UBOOT_VERSION_PRESENT_LBN 8
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_UBOOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_LBN 9
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_LBN 10
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_VERSION_PRESENT_LBN 11
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_VERSION_PRESENT_LBN 12
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_BUNDLE_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_BUNDLE_VERSION_PRESENT_LBN 13
+#define MC_CMD_GET_VERSION_V5_OUT_BUNDLE_VERSION_PRESENT_WIDTH 1
+/* MC firmware unique build ID (as binary SHA-1 value) */
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_BUILD_ID_OFST 52
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_BUILD_ID_LEN 20
+/* MC firmware security level */
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_SECURITY_LEVEL_OFST 72
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_SECURITY_LEVEL_LEN 4
+/* MC firmware build name (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_BUILD_NAME_OFST 76
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_BUILD_NAME_LEN 64
+/* The SUC firmware version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_VERSION_OFST 140
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_VERSION_NUM 4
+/* SUC firmware build date (as 64-bit Unix timestamp) */
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_OFST 156
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_LEN 8
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_LO_OFST 156
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_LO_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_LO_LBN 1248
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_HI_OFST 160
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_HI_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_HI_LBN 1280
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_HI_WIDTH 32
+/* The ID of the SUC chip. This is specific to the platform but typically
+ * indicates family, memory sizes etc. See SF-116728-SW for further details.
+ */
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_CHIP_ID_OFST 164
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_CHIP_ID_LEN 4
+/* The CMC firmware version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_VERSION_OFST 168
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_VERSION_NUM 4
+/* CMC firmware build date (as 64-bit Unix timestamp) */
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_OFST 184
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_LEN 8
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_LO_OFST 184
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_LO_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_LO_LBN 1472
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_HI_OFST 188
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_HI_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_HI_LBN 1504
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_HI_WIDTH 32
+/* FPGA version as three numbers. On Riverhead based systems this field uses
+ * the same encoding as hardware version ID registers (MC_FPGA_BUILD_HWRD_REG):
+ * FPGA_VERSION[0]: x => Image H{x} FPGA_VERSION[1]: Revision letter (0 => A, 1
+ * => B, ...) FPGA_VERSION[2]: Sub-revision number
+ */
+#define MC_CMD_GET_VERSION_V5_OUT_FPGA_VERSION_OFST 192
+#define MC_CMD_GET_VERSION_V5_OUT_FPGA_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_FPGA_VERSION_NUM 3
+/* Extra FPGA revision information (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V5_OUT_FPGA_EXTRA_OFST 204
+#define MC_CMD_GET_VERSION_V5_OUT_FPGA_EXTRA_LEN 16
+/* Board name / adapter model (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_NAME_OFST 220
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_NAME_LEN 16
+/* Board revision number */
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_REVISION_OFST 236
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_REVISION_LEN 4
+/* Board serial number (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_SERIAL_OFST 240
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_SERIAL_LEN 64
+/* The version of the datapath hardware design as three number - a.b.c */
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_HW_VERSION_OFST 304
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_HW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_HW_VERSION_NUM 3
+/* The version of the firmware library used to control the datapath as three
+ * number - a.b.c
+ */
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_FW_VERSION_OFST 316
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_FW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_FW_VERSION_NUM 3
+/* The SOC boot version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_BOOT_VERSION_OFST 328
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_BOOT_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_BOOT_VERSION_NUM 4
+/* The SOC uboot version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_UBOOT_VERSION_OFST 344
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_UBOOT_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_UBOOT_VERSION_NUM 4
+/* The SOC main rootfs version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_MAIN_ROOTFS_VERSION_OFST 360
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_MAIN_ROOTFS_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_MAIN_ROOTFS_VERSION_NUM 4
+/* The SOC recovery buildroot version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_RECOVERY_BUILDROOT_VERSION_OFST 376
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_RECOVERY_BUILDROOT_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_RECOVERY_BUILDROOT_VERSION_NUM 4
+/* Board version as four numbers - a.b.c.d. BOARD_VERSION[0] duplicates the
+ * BOARD_REVISION field
+ */
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_VERSION_OFST 392
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_VERSION_NUM 4
+/* Bundle version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V5_OUT_BUNDLE_VERSION_OFST 408
+#define MC_CMD_GET_VERSION_V5_OUT_BUNDLE_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_BUNDLE_VERSION_NUM 4
+
/***********************************/
/* MC_CMD_PTP
* Perform PTP operation
*/
#define MC_CMD_PTP 0xb
+#define MC_CMD_PTP_MSGSET 0xb
#undef MC_CMD_0xb_PRIVILEGE_CTG
#define MC_CMD_0xb_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -2066,7 +2705,13 @@
#define MC_CMD_PTP_IN_ADJUST_FREQ_OFST 8
#define MC_CMD_PTP_IN_ADJUST_FREQ_LEN 8
#define MC_CMD_PTP_IN_ADJUST_FREQ_LO_OFST 8
+#define MC_CMD_PTP_IN_ADJUST_FREQ_LO_LEN 4
+#define MC_CMD_PTP_IN_ADJUST_FREQ_LO_LBN 64
+#define MC_CMD_PTP_IN_ADJUST_FREQ_LO_WIDTH 32
#define MC_CMD_PTP_IN_ADJUST_FREQ_HI_OFST 12
+#define MC_CMD_PTP_IN_ADJUST_FREQ_HI_LEN 4
+#define MC_CMD_PTP_IN_ADJUST_FREQ_HI_LBN 96
+#define MC_CMD_PTP_IN_ADJUST_FREQ_HI_WIDTH 32
/* enum: Number of fractional bits in frequency adjustment */
#define MC_CMD_PTP_IN_ADJUST_BITS 0x28
/* enum: Number of fractional bits in frequency adjustment when FP44_FREQ_ADJ
@@ -2097,7 +2742,13 @@
#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_OFST 8
#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_LEN 8
#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_LO_OFST 8
+#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_LO_LEN 4
+#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_LO_LBN 64
+#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_LO_WIDTH 32
#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_HI_OFST 12
+#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_HI_LEN 4
+#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_HI_LBN 96
+#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_HI_WIDTH 32
/* enum: Number of fractional bits in frequency adjustment */
/* MC_CMD_PTP_IN_ADJUST_BITS 0x28 */
/* enum: Number of fractional bits in frequency adjustment when FP44_FREQ_ADJ
@@ -2136,7 +2787,13 @@
#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_OFST 12
#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_LEN 8
#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_LO_OFST 12
+#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_LO_LEN 4
+#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_LO_LBN 96
+#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_LO_WIDTH 32
#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_HI_OFST 16
+#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_HI_LEN 4
+#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_HI_LBN 128
+#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_HI_WIDTH 32
/* MC_CMD_PTP_IN_MANFTEST_BASIC msgrequest */
#define MC_CMD_PTP_IN_MANFTEST_BASIC_LEN 8
@@ -2252,7 +2909,13 @@
#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_OFST 8
#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_LEN 8
#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_LO_OFST 8
+#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_LO_LEN 4
+#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_LO_LBN 64
+#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_LO_WIDTH 32
#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_HI_OFST 12
+#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_HI_LEN 4
+#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_HI_LBN 96
+#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_HI_WIDTH 32
/* Enum values, see field(s): */
/* MC_CMD_PTP/MC_CMD_PTP_IN_ADJUST/FREQ */
@@ -2283,7 +2946,13 @@
#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_OFST 12
#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_LEN 8
#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_LO_OFST 12
+#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_LO_LEN 4
+#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_LO_LBN 96
+#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_LO_WIDTH 32
#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_HI_OFST 16
+#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_HI_LEN 4
+#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_HI_LBN 128
+#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_HI_WIDTH 32
/* MC_CMD_PTP_IN_RX_SET_DOMAIN_FILTER msgrequest */
#define MC_CMD_PTP_IN_RX_SET_DOMAIN_FILTER_LEN 16
@@ -2745,6 +3414,7 @@
* Read 32bit words from the indirect memory map.
*/
#define MC_CMD_CSR_READ32 0xc
+#define MC_CMD_CSR_READ32_MSGSET 0xc
#undef MC_CMD_0xc_PRIVILEGE_CTG
#define MC_CMD_0xc_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -2778,6 +3448,7 @@
* Write 32bit dwords to the indirect memory map.
*/
#define MC_CMD_CSR_WRITE32 0xd
+#define MC_CMD_CSR_WRITE32_MSGSET 0xd
#undef MC_CMD_0xd_PRIVILEGE_CTG
#define MC_CMD_0xd_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -2811,6 +3482,7 @@
* MCDI command to avoid creating too many MCDI commands.
*/
#define MC_CMD_HP 0x54
+#define MC_CMD_HP_MSGSET 0x54
#undef MC_CMD_0x54_PRIVILEGE_CTG
#define MC_CMD_0x54_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -2834,7 +3506,13 @@
#define MC_CMD_HP_IN_OCSD_ADDR_OFST 4
#define MC_CMD_HP_IN_OCSD_ADDR_LEN 8
#define MC_CMD_HP_IN_OCSD_ADDR_LO_OFST 4
+#define MC_CMD_HP_IN_OCSD_ADDR_LO_LEN 4
+#define MC_CMD_HP_IN_OCSD_ADDR_LO_LBN 32
+#define MC_CMD_HP_IN_OCSD_ADDR_LO_WIDTH 32
#define MC_CMD_HP_IN_OCSD_ADDR_HI_OFST 8
+#define MC_CMD_HP_IN_OCSD_ADDR_HI_LEN 4
+#define MC_CMD_HP_IN_OCSD_ADDR_HI_LBN 64
+#define MC_CMD_HP_IN_OCSD_ADDR_HI_WIDTH 32
/* The requested update interval, in seconds. (Or the sub-command if ADDR is
* NULL.)
*/
@@ -2858,6 +3536,7 @@
* Get stack information.
*/
#define MC_CMD_STACKINFO 0xf
+#define MC_CMD_STACKINFO_MSGSET 0xf
#undef MC_CMD_0xf_PRIVILEGE_CTG
#define MC_CMD_0xf_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -2884,6 +3563,7 @@
* MDIO register read.
*/
#define MC_CMD_MDIO_READ 0x10
+#define MC_CMD_MDIO_READ_MSGSET 0x10
#undef MC_CMD_0x10_PRIVILEGE_CTG
#define MC_CMD_0x10_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -2932,6 +3612,7 @@
* MDIO register write.
*/
#define MC_CMD_MDIO_WRITE 0x11
+#define MC_CMD_MDIO_WRITE_MSGSET 0x11
#undef MC_CMD_0x11_PRIVILEGE_CTG
#define MC_CMD_0x11_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -2980,6 +3661,7 @@
* Write DBI register(s).
*/
#define MC_CMD_DBI_WRITE 0x12
+#define MC_CMD_DBI_WRITE_MSGSET 0x12
#undef MC_CMD_0x12_PRIVILEGE_CTG
#define MC_CMD_0x12_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -3033,6 +3715,7 @@
* access is implied by the Shared memory channel used.
*/
#define MC_CMD_PORT_READ32 0x14
+#define MC_CMD_PORT_READ32_MSGSET 0x14
/* MC_CMD_PORT_READ32_IN msgrequest */
#define MC_CMD_PORT_READ32_IN_LEN 4
@@ -3056,6 +3739,7 @@
* access is implied by the Shared memory channel used.
*/
#define MC_CMD_PORT_WRITE32 0x15
+#define MC_CMD_PORT_WRITE32_MSGSET 0x15
/* MC_CMD_PORT_WRITE32_IN msgrequest */
#define MC_CMD_PORT_WRITE32_IN_LEN 8
@@ -3079,6 +3763,7 @@
* access is implied by the Shared memory channel used.
*/
#define MC_CMD_PORT_READ128 0x16
+#define MC_CMD_PORT_READ128_MSGSET 0x16
/* MC_CMD_PORT_READ128_IN msgrequest */
#define MC_CMD_PORT_READ128_IN_LEN 4
@@ -3102,6 +3787,7 @@
* access is implied by the Shared memory channel used.
*/
#define MC_CMD_PORT_WRITE128 0x17
+#define MC_CMD_PORT_WRITE128_MSGSET 0x17
/* MC_CMD_PORT_WRITE128_IN msgrequest */
#define MC_CMD_PORT_WRITE128_IN_LEN 20
@@ -3150,6 +3836,7 @@
* Returns the MC firmware configuration structure.
*/
#define MC_CMD_GET_BOARD_CFG 0x18
+#define MC_CMD_GET_BOARD_CFG_MSGSET 0x18
#undef MC_CMD_0x18_PRIVILEGE_CTG
#define MC_CMD_0x18_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -3225,6 +3912,7 @@
* Read DBI register(s) -- extended functionality
*/
#define MC_CMD_DBI_READX 0x19
+#define MC_CMD_DBI_READX_MSGSET 0x19
#undef MC_CMD_0x19_PRIVILEGE_CTG
#define MC_CMD_0x19_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -3239,7 +3927,13 @@
#define MC_CMD_DBI_READX_IN_DBIRDOP_OFST 0
#define MC_CMD_DBI_READX_IN_DBIRDOP_LEN 8
#define MC_CMD_DBI_READX_IN_DBIRDOP_LO_OFST 0
+#define MC_CMD_DBI_READX_IN_DBIRDOP_LO_LEN 4
+#define MC_CMD_DBI_READX_IN_DBIRDOP_LO_LBN 0
+#define MC_CMD_DBI_READX_IN_DBIRDOP_LO_WIDTH 32
#define MC_CMD_DBI_READX_IN_DBIRDOP_HI_OFST 4
+#define MC_CMD_DBI_READX_IN_DBIRDOP_HI_LEN 4
+#define MC_CMD_DBI_READX_IN_DBIRDOP_HI_LBN 32
+#define MC_CMD_DBI_READX_IN_DBIRDOP_HI_WIDTH 32
#define MC_CMD_DBI_READX_IN_DBIRDOP_MINNUM 1
#define MC_CMD_DBI_READX_IN_DBIRDOP_MAXNUM 31
#define MC_CMD_DBI_READX_IN_DBIRDOP_MAXNUM_MCDI2 127
@@ -3283,6 +3977,7 @@
* Set the 16byte seed for the MC pseudo-random generator.
*/
#define MC_CMD_SET_RAND_SEED 0x1a
+#define MC_CMD_SET_RAND_SEED_MSGSET 0x1a
#undef MC_CMD_0x1a_PRIVILEGE_CTG
#define MC_CMD_0x1a_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -3302,6 +3997,7 @@
* Retrieve the history of the LTSSM, if the build supports it.
*/
#define MC_CMD_LTSSM_HIST 0x1b
+#define MC_CMD_LTSSM_HIST_MSGSET 0x1b
/* MC_CMD_LTSSM_HIST_IN msgrequest */
#define MC_CMD_LTSSM_HIST_IN_LEN 0
@@ -3330,6 +4026,7 @@
* platforms.
*/
#define MC_CMD_DRV_ATTACH 0x1c
+#define MC_CMD_DRV_ATTACH_MSGSET 0x1c
#undef MC_CMD_0x1c_PRIVILEGE_CTG
#define MC_CMD_0x1c_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -3524,6 +4221,7 @@
* Route UART output to circular buffer in shared memory instead.
*/
#define MC_CMD_SHMUART 0x1f
+#define MC_CMD_SHMUART_MSGSET 0x1f
/* MC_CMD_SHMUART_IN msgrequest */
#define MC_CMD_SHMUART_IN_LEN 4
@@ -3542,6 +4240,7 @@
* use MC_CMD_ENTITY_RESET instead.
*/
#define MC_CMD_PORT_RESET 0x20
+#define MC_CMD_PORT_RESET_MSGSET 0x20
#undef MC_CMD_0x20_PRIVILEGE_CTG
#define MC_CMD_0x20_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -3560,6 +4259,7 @@
* extended version of the deprecated MC_CMD_PORT_RESET with added fields.
*/
#define MC_CMD_ENTITY_RESET 0x20
+#define MC_CMD_ENTITY_RESET_MSGSET 0x20
/* MC_CMD_0x20_PRIVILEGE_CTG SRIOV_CTG_GENERAL */
/* MC_CMD_ENTITY_RESET_IN msgrequest */
@@ -3582,6 +4282,7 @@
* Read instantaneous and minimum flow control thresholds.
*/
#define MC_CMD_PCIE_CREDITS 0x21
+#define MC_CMD_PCIE_CREDITS_MSGSET 0x21
/* MC_CMD_PCIE_CREDITS_IN msgrequest */
#define MC_CMD_PCIE_CREDITS_IN_LEN 8
@@ -3617,6 +4318,7 @@
* Get histogram of RX queue fill level.
*/
#define MC_CMD_RXD_MONITOR 0x22
+#define MC_CMD_RXD_MONITOR_MSGSET 0x22
/* MC_CMD_RXD_MONITOR_IN msgrequest */
#define MC_CMD_RXD_MONITOR_IN_LEN 12
@@ -3676,6 +4378,7 @@
* Copy the given ASCII string out onto UART and/or out of the network port.
*/
#define MC_CMD_PUTS 0x23
+#define MC_CMD_PUTS_MSGSET 0x23
#undef MC_CMD_0x23_PRIVILEGE_CTG
#define MC_CMD_0x23_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -3712,6 +4415,7 @@
* 'zombie' state. Locks required: None
*/
#define MC_CMD_GET_PHY_CFG 0x24
+#define MC_CMD_GET_PHY_CFG_MSGSET 0x24
#undef MC_CMD_0x24_PRIVILEGE_CTG
#define MC_CMD_0x24_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -3868,6 +4572,7 @@
* Return code: 0, EINVAL, EACCES (if PHY_LOCK is not held)
*/
#define MC_CMD_START_BIST 0x25
+#define MC_CMD_START_BIST_MSGSET 0x25
#undef MC_CMD_0x25_PRIVILEGE_CTG
#define MC_CMD_0x25_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -3908,6 +4613,7 @@
* EACCES (if PHY_LOCK is not held).
*/
#define MC_CMD_POLL_BIST 0x26
+#define MC_CMD_POLL_BIST_MSGSET 0x26
#undef MC_CMD_0x26_PRIVILEGE_CTG
#define MC_CMD_0x26_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -4077,6 +4783,7 @@
* returns). The driver must still wait for flush done/failure events as usual.
*/
#define MC_CMD_FLUSH_RX_QUEUES 0x27
+#define MC_CMD_FLUSH_RX_QUEUES_MSGSET 0x27
/* MC_CMD_FLUSH_RX_QUEUES_IN msgrequest */
#define MC_CMD_FLUSH_RX_QUEUES_IN_LENMIN 4
@@ -4099,6 +4806,7 @@
* Returns a bitmask of loopback modes available at each speed.
*/
#define MC_CMD_GET_LOOPBACK_MODES 0x28
+#define MC_CMD_GET_LOOPBACK_MODES_MSGSET 0x28
#undef MC_CMD_0x28_PRIVILEGE_CTG
#define MC_CMD_0x28_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -4112,7 +4820,13 @@
#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_OFST 0
#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_LO_OFST 0
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_LO_LBN 0
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_HI_OFST 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_HI_LBN 32
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_HI_WIDTH 32
/* enum: None. */
#define MC_CMD_LOOPBACK_NONE 0x0
/* enum: Data. */
@@ -4195,28 +4909,52 @@
#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_OFST 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_LO_OFST 8
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_LO_LBN 64
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_HI_OFST 12
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_HI_LBN 96
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_OFST 16
#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_LO_OFST 16
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_LO_LBN 128
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_HI_OFST 20
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_HI_LBN 160
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_OFST 24
#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_LO_OFST 24
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_LO_LBN 192
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_HI_OFST 28
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_HI_LBN 224
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_OFST 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_LO_OFST 32
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_LO_LBN 256
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_HI_OFST 36
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_HI_LBN 288
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
@@ -4228,7 +4966,13 @@
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_OFST 0
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_LO_OFST 0
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_LO_LBN 0
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_HI_OFST 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_HI_LBN 32
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_HI_WIDTH 32
/* enum: None. */
/* MC_CMD_LOOPBACK_NONE 0x0 */
/* enum: Data. */
@@ -4311,49 +5055,91 @@
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_OFST 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_LO_OFST 8
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_LO_LBN 64
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_HI_OFST 12
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_HI_LBN 96
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_OFST 16
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_LO_OFST 16
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_LO_LBN 128
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_HI_OFST 20
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_HI_LBN 160
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_OFST 24
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_LO_OFST 24
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_LO_LBN 192
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_HI_OFST 28
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_HI_LBN 224
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_OFST 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_LO_OFST 32
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_LO_LBN 256
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_HI_OFST 36
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_HI_LBN 288
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported 25G loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_OFST 40
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_LO_OFST 40
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_LO_LBN 320
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_HI_OFST 44
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_HI_LBN 352
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported 50 loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_OFST 48
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_LO_OFST 48
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_LO_LBN 384
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_HI_OFST 52
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_HI_LBN 416
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported 100G loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_OFST 56
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_LO_OFST 56
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_LO_LBN 448
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_HI_OFST 60
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_HI_LBN 480
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
@@ -4395,6 +5181,7 @@
* ETIME.
*/
#define MC_CMD_GET_LINK 0x29
+#define MC_CMD_GET_LINK_MSGSET 0x29
#undef MC_CMD_0x29_PRIVILEGE_CTG
#define MC_CMD_0x29_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -4596,6 +5383,7 @@
* code: 0, EINVAL, ETIME, EAGAIN
*/
#define MC_CMD_SET_LINK 0x2a
+#define MC_CMD_SET_LINK_MSGSET 0x2a
#undef MC_CMD_0x2a_PRIVILEGE_CTG
#define MC_CMD_0x2a_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -4686,6 +5474,7 @@
* Set identification LED state. Locks required: None. Return code: 0, EINVAL
*/
#define MC_CMD_SET_ID_LED 0x2b
+#define MC_CMD_SET_ID_LED_MSGSET 0x2b
#undef MC_CMD_0x2b_PRIVILEGE_CTG
#define MC_CMD_0x2b_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -4708,6 +5497,7 @@
* Set MAC configuration. Locks required: None. Return code: 0, EINVAL
*/
#define MC_CMD_SET_MAC 0x2c
+#define MC_CMD_SET_MAC_MSGSET 0x2c
#undef MC_CMD_0x2c_PRIVILEGE_CTG
#define MC_CMD_0x2c_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -4724,7 +5514,13 @@
#define MC_CMD_SET_MAC_IN_ADDR_OFST 8
#define MC_CMD_SET_MAC_IN_ADDR_LEN 8
#define MC_CMD_SET_MAC_IN_ADDR_LO_OFST 8
+#define MC_CMD_SET_MAC_IN_ADDR_LO_LEN 4
+#define MC_CMD_SET_MAC_IN_ADDR_LO_LBN 64
+#define MC_CMD_SET_MAC_IN_ADDR_LO_WIDTH 32
#define MC_CMD_SET_MAC_IN_ADDR_HI_OFST 12
+#define MC_CMD_SET_MAC_IN_ADDR_HI_LEN 4
+#define MC_CMD_SET_MAC_IN_ADDR_HI_LBN 96
+#define MC_CMD_SET_MAC_IN_ADDR_HI_WIDTH 32
#define MC_CMD_SET_MAC_IN_REJECT_OFST 16
#define MC_CMD_SET_MAC_IN_REJECT_LEN 4
#define MC_CMD_SET_MAC_IN_REJECT_UNCST_OFST 16
@@ -4765,7 +5561,13 @@
#define MC_CMD_SET_MAC_EXT_IN_ADDR_OFST 8
#define MC_CMD_SET_MAC_EXT_IN_ADDR_LEN 8
#define MC_CMD_SET_MAC_EXT_IN_ADDR_LO_OFST 8
+#define MC_CMD_SET_MAC_EXT_IN_ADDR_LO_LEN 4
+#define MC_CMD_SET_MAC_EXT_IN_ADDR_LO_LBN 64
+#define MC_CMD_SET_MAC_EXT_IN_ADDR_LO_WIDTH 32
#define MC_CMD_SET_MAC_EXT_IN_ADDR_HI_OFST 12
+#define MC_CMD_SET_MAC_EXT_IN_ADDR_HI_LEN 4
+#define MC_CMD_SET_MAC_EXT_IN_ADDR_HI_LBN 96
+#define MC_CMD_SET_MAC_EXT_IN_ADDR_HI_WIDTH 32
#define MC_CMD_SET_MAC_EXT_IN_REJECT_OFST 16
#define MC_CMD_SET_MAC_EXT_IN_REJECT_LEN 4
#define MC_CMD_SET_MAC_EXT_IN_REJECT_UNCST_OFST 16
@@ -4816,6 +5618,129 @@
#define MC_CMD_SET_MAC_EXT_IN_CFG_FCS_LBN 4
#define MC_CMD_SET_MAC_EXT_IN_CFG_FCS_WIDTH 1
+/* MC_CMD_SET_MAC_V3_IN msgrequest */
+#define MC_CMD_SET_MAC_V3_IN_LEN 40
+/* The MTU is the MTU programmed directly into the XMAC/GMAC (inclusive of
+ * EtherII, VLAN, bug16011 padding).
+ */
+#define MC_CMD_SET_MAC_V3_IN_MTU_OFST 0
+#define MC_CMD_SET_MAC_V3_IN_MTU_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_DRAIN_OFST 4
+#define MC_CMD_SET_MAC_V3_IN_DRAIN_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_ADDR_OFST 8
+#define MC_CMD_SET_MAC_V3_IN_ADDR_LEN 8
+#define MC_CMD_SET_MAC_V3_IN_ADDR_LO_OFST 8
+#define MC_CMD_SET_MAC_V3_IN_ADDR_LO_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_ADDR_LO_LBN 64
+#define MC_CMD_SET_MAC_V3_IN_ADDR_LO_WIDTH 32
+#define MC_CMD_SET_MAC_V3_IN_ADDR_HI_OFST 12
+#define MC_CMD_SET_MAC_V3_IN_ADDR_HI_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_ADDR_HI_LBN 96
+#define MC_CMD_SET_MAC_V3_IN_ADDR_HI_WIDTH 32
+#define MC_CMD_SET_MAC_V3_IN_REJECT_OFST 16
+#define MC_CMD_SET_MAC_V3_IN_REJECT_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_REJECT_UNCST_OFST 16
+#define MC_CMD_SET_MAC_V3_IN_REJECT_UNCST_LBN 0
+#define MC_CMD_SET_MAC_V3_IN_REJECT_UNCST_WIDTH 1
+#define MC_CMD_SET_MAC_V3_IN_REJECT_BRDCST_OFST 16
+#define MC_CMD_SET_MAC_V3_IN_REJECT_BRDCST_LBN 1
+#define MC_CMD_SET_MAC_V3_IN_REJECT_BRDCST_WIDTH 1
+#define MC_CMD_SET_MAC_V3_IN_FCNTL_OFST 20
+#define MC_CMD_SET_MAC_V3_IN_FCNTL_LEN 4
+/* enum: Flow control is off. */
+/* MC_CMD_FCNTL_OFF 0x0 */
+/* enum: Respond to flow control. */
+/* MC_CMD_FCNTL_RESPOND 0x1 */
+/* enum: Respond to and Issue flow control. */
+/* MC_CMD_FCNTL_BIDIR 0x2 */
+/* enum: Auto neg flow control. */
+/* MC_CMD_FCNTL_AUTO 0x3 */
+/* enum: Priority flow control (eftest builds only). */
+/* MC_CMD_FCNTL_QBB 0x4 */
+/* enum: Issue flow control. */
+/* MC_CMD_FCNTL_GENERATE 0x5 */
+#define MC_CMD_SET_MAC_V3_IN_FLAGS_OFST 24
+#define MC_CMD_SET_MAC_V3_IN_FLAGS_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_FLAG_INCLUDE_FCS_OFST 24
+#define MC_CMD_SET_MAC_V3_IN_FLAG_INCLUDE_FCS_LBN 0
+#define MC_CMD_SET_MAC_V3_IN_FLAG_INCLUDE_FCS_WIDTH 1
+/* Select which parameters to configure. A parameter will only be modified if
+ * the corresponding control flag is set. If SET_MAC_ENHANCED is not set in
+ * capabilities then this field is ignored (and all flags are assumed to be
+ * set).
+ */
+#define MC_CMD_SET_MAC_V3_IN_CONTROL_OFST 28
+#define MC_CMD_SET_MAC_V3_IN_CONTROL_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_CFG_MTU_OFST 28
+#define MC_CMD_SET_MAC_V3_IN_CFG_MTU_LBN 0
+#define MC_CMD_SET_MAC_V3_IN_CFG_MTU_WIDTH 1
+#define MC_CMD_SET_MAC_V3_IN_CFG_DRAIN_OFST 28
+#define MC_CMD_SET_MAC_V3_IN_CFG_DRAIN_LBN 1
+#define MC_CMD_SET_MAC_V3_IN_CFG_DRAIN_WIDTH 1
+#define MC_CMD_SET_MAC_V3_IN_CFG_REJECT_OFST 28
+#define MC_CMD_SET_MAC_V3_IN_CFG_REJECT_LBN 2
+#define MC_CMD_SET_MAC_V3_IN_CFG_REJECT_WIDTH 1
+#define MC_CMD_SET_MAC_V3_IN_CFG_FCNTL_OFST 28
+#define MC_CMD_SET_MAC_V3_IN_CFG_FCNTL_LBN 3
+#define MC_CMD_SET_MAC_V3_IN_CFG_FCNTL_WIDTH 1
+#define MC_CMD_SET_MAC_V3_IN_CFG_FCS_OFST 28
+#define MC_CMD_SET_MAC_V3_IN_CFG_FCS_LBN 4
+#define MC_CMD_SET_MAC_V3_IN_CFG_FCS_WIDTH 1
+/* Identifies the MAC to update by the specifying the end of a logical MAE
+ * link. Setting TARGET to MAE_LINK_ENDPOINT_COMPAT is equivalent to using the
+ * previous version of the command (MC_CMD_SET_MAC_EXT). Not all possible
+ * combinations of MPORT_END and MPORT_SELECTOR in TARGET will work in all
+ * circumstances. 1. Some will always work (e.g. a VF can always address its
+ * logical MAC using MPORT_SELECTOR=ASSIGNED,LINK_END=VNIC), 2. Some are not
+ * meaningful and will always fail with EINVAL (e.g. attempting to address the
+ * VNIC end of a link to a physical port), 3. Some are meaningful but require
+ * the MCDI client to have the required permission and fail with EPERM
+ * otherwise (e.g. trying to set the MAC on a VF the caller cannot administer),
+ * and 4. Some could be implementation-specific and fail with ENOTSUP if not
+ * available (no examples exist right now). See SF-123581-TC section 4.3 for
+ * more details.
+ */
+#define MC_CMD_SET_MAC_V3_IN_TARGET_OFST 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_LEN 8
+#define MC_CMD_SET_MAC_V3_IN_TARGET_LO_OFST 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_LO_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_LO_LBN 256
+#define MC_CMD_SET_MAC_V3_IN_TARGET_LO_WIDTH 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_HI_OFST 36
+#define MC_CMD_SET_MAC_V3_IN_TARGET_HI_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_HI_LBN 288
+#define MC_CMD_SET_MAC_V3_IN_TARGET_HI_WIDTH 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_OFST 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FLAT_OFST 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FLAT_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_TYPE_OFST 35
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_TYPE_LEN 1
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_MPORT_ID_OFST 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_MPORT_ID_LEN 3
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_PPORT_ID_LBN 256
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_PPORT_ID_WIDTH 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_LBN 276
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_WIDTH 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_LBN 272
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_WIDTH 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FUNC_PF_ID_OFST 34
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FUNC_PF_ID_LEN 1
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FUNC_VF_ID_OFST 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FUNC_VF_ID_LEN 2
+#define MC_CMD_SET_MAC_V3_IN_TARGET_LINK_END_OFST 36
+#define MC_CMD_SET_MAC_V3_IN_TARGET_LINK_END_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_OFST 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_LEN 8
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_LO_OFST 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_LO_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_LO_LBN 256
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_LO_WIDTH 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_HI_OFST 36
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_HI_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_HI_LBN 288
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_HI_WIDTH 32
+
/* MC_CMD_SET_MAC_OUT msgresponse */
#define MC_CMD_SET_MAC_OUT_LEN 0
@@ -4839,6 +5764,7 @@
* Returns: 0, ETIME
*/
#define MC_CMD_PHY_STATS 0x2d
+#define MC_CMD_PHY_STATS_MSGSET 0x2d
#undef MC_CMD_0x2d_PRIVILEGE_CTG
#define MC_CMD_0x2d_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -4849,7 +5775,13 @@
#define MC_CMD_PHY_STATS_IN_DMA_ADDR_OFST 0
#define MC_CMD_PHY_STATS_IN_DMA_ADDR_LEN 8
#define MC_CMD_PHY_STATS_IN_DMA_ADDR_LO_OFST 0
+#define MC_CMD_PHY_STATS_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_PHY_STATS_IN_DMA_ADDR_LO_LBN 0
+#define MC_CMD_PHY_STATS_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_PHY_STATS_IN_DMA_ADDR_HI_OFST 4
+#define MC_CMD_PHY_STATS_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_PHY_STATS_IN_DMA_ADDR_HI_LBN 32
+#define MC_CMD_PHY_STATS_IN_DMA_ADDR_HI_WIDTH 32
/* MC_CMD_PHY_STATS_OUT_DMA msgresponse */
#define MC_CMD_PHY_STATS_OUT_DMA_LEN 0
@@ -4921,6 +5853,7 @@
* effect. Returns: 0, ETIME
*/
#define MC_CMD_MAC_STATS 0x2e
+#define MC_CMD_MAC_STATS_MSGSET 0x2e
#undef MC_CMD_0x2e_PRIVILEGE_CTG
#define MC_CMD_0x2e_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -4931,7 +5864,13 @@
#define MC_CMD_MAC_STATS_IN_DMA_ADDR_OFST 0
#define MC_CMD_MAC_STATS_IN_DMA_ADDR_LEN 8
#define MC_CMD_MAC_STATS_IN_DMA_ADDR_LO_OFST 0
+#define MC_CMD_MAC_STATS_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_MAC_STATS_IN_DMA_ADDR_LO_LBN 0
+#define MC_CMD_MAC_STATS_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_MAC_STATS_IN_DMA_ADDR_HI_OFST 4
+#define MC_CMD_MAC_STATS_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_MAC_STATS_IN_DMA_ADDR_HI_LBN 32
+#define MC_CMD_MAC_STATS_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_MAC_STATS_IN_CMD_OFST 8
#define MC_CMD_MAC_STATS_IN_CMD_LEN 4
#define MC_CMD_MAC_STATS_IN_DMA_OFST 8
@@ -4974,7 +5913,13 @@
#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_OFST 0
#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_LEN 8
#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_LO_OFST 0
+#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_LO_LEN 4
+#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_LO_LBN 0
+#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_LO_WIDTH 32
#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_HI_OFST 4
+#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_HI_LEN 4
+#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_HI_LBN 32
+#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_HI_WIDTH 32
#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS
#define MC_CMD_MAC_GENERATION_START 0x0 /* enum */
#define MC_CMD_MAC_DMABUF_START 0x1 /* enum */
@@ -5130,7 +6075,13 @@
#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_OFST 0
#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_LEN 8
#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_LO_OFST 0
+#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_LO_LEN 4
+#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_LO_LBN 0
+#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_LO_WIDTH 32
#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_HI_OFST 4
+#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_HI_LEN 4
+#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_HI_LBN 32
+#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_HI_WIDTH 32
#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS_V2
/* enum: Start of FEC stats buffer space, Medford2 and up */
#define MC_CMD_MAC_FEC_DMABUF_START 0x61
@@ -5163,7 +6114,13 @@
#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_OFST 0
#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_LEN 8
#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_LO_OFST 0
+#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_LO_LEN 4
+#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_LO_LBN 0
+#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_LO_WIDTH 32
#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_HI_OFST 4
+#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_HI_LEN 4
+#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_HI_LBN 32
+#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_HI_WIDTH 32
#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS_V3
/* enum: Start of CTPIO stats buffer space, Medford2 and up */
#define MC_CMD_MAC_CTPIO_DMABUF_START 0x68
@@ -5237,7 +6194,13 @@
#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_OFST 0
#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_LEN 8
#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_LO_OFST 0
+#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_LO_LEN 4
+#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_LO_LBN 0
+#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_LO_WIDTH 32
#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_HI_OFST 4
+#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_HI_LEN 4
+#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_HI_LBN 32
+#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_HI_WIDTH 32
#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS_V4
/* enum: Start of V4 stats buffer space */
#define MC_CMD_MAC_V4_DMABUF_START 0x79
@@ -5266,6 +6229,7 @@
* to be documented
*/
#define MC_CMD_SRIOV 0x30
+#define MC_CMD_SRIOV_MSGSET 0x30
/* MC_CMD_SRIOV_IN msgrequest */
#define MC_CMD_SRIOV_IN_LEN 12
@@ -5297,7 +6261,13 @@
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_OFST 8
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LEN 8
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LO_OFST 8
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LO_LEN 4
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LO_LBN 64
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LO_WIDTH 32
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_HI_OFST 12
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_HI_LEN 4
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_HI_LBN 96
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_HI_WIDTH 32
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LBN 64
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_WIDTH 64
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_RID_OFST 16
@@ -5308,7 +6278,13 @@
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_OFST 20
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LEN 8
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LO_OFST 20
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LO_LEN 4
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LO_LBN 160
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LO_WIDTH 32
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_HI_OFST 24
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_HI_LEN 4
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_HI_LBN 192
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_HI_WIDTH 32
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LBN 160
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_WIDTH 64
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_LENGTH_OFST 28
@@ -5338,6 +6314,7 @@
* Returns: 0, EINVAL (invalid RID)
*/
#define MC_CMD_MEMCPY 0x31
+#define MC_CMD_MEMCPY_MSGSET 0x31
/* MC_CMD_MEMCPY_IN msgrequest */
#define MC_CMD_MEMCPY_IN_LENMIN 32
@@ -5361,6 +6338,7 @@
* Set a WoL filter.
*/
#define MC_CMD_WOL_FILTER_SET 0x32
+#define MC_CMD_WOL_FILTER_SET_MSGSET 0x32
#undef MC_CMD_0x32_PRIVILEGE_CTG
#define MC_CMD_0x32_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -5401,7 +6379,13 @@
#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_OFST 8
#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_LEN 8
#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_LO_OFST 8
+#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_LO_LEN 4
+#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_LO_LBN 64
+#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_LO_WIDTH 32
#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_HI_OFST 12
+#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_HI_LEN 4
+#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_HI_LBN 96
+#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_HI_WIDTH 32
/* MC_CMD_WOL_FILTER_SET_IN_IPV4_SYN msgrequest */
#define MC_CMD_WOL_FILTER_SET_IN_IPV4_SYN_LEN 20
@@ -5476,6 +6460,7 @@
* Remove a WoL filter. Locks required: None. Returns: 0, EINVAL, ENOSYS
*/
#define MC_CMD_WOL_FILTER_REMOVE 0x33
+#define MC_CMD_WOL_FILTER_REMOVE_MSGSET 0x33
#undef MC_CMD_0x33_PRIVILEGE_CTG
#define MC_CMD_0x33_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -5495,6 +6480,7 @@
* ENOSYS
*/
#define MC_CMD_WOL_FILTER_RESET 0x34
+#define MC_CMD_WOL_FILTER_RESET_MSGSET 0x34
#undef MC_CMD_0x34_PRIVILEGE_CTG
#define MC_CMD_0x34_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -5515,6 +6501,7 @@
* Set the MCAST hash value without otherwise reconfiguring the MAC
*/
#define MC_CMD_SET_MCAST_HASH 0x35
+#define MC_CMD_SET_MCAST_HASH_MSGSET 0x35
/* MC_CMD_SET_MCAST_HASH_IN msgrequest */
#define MC_CMD_SET_MCAST_HASH_IN_LEN 32
@@ -5533,6 +6520,7 @@
* Locks required: none. Returns: 0
*/
#define MC_CMD_NVRAM_TYPES 0x36
+#define MC_CMD_NVRAM_TYPES_MSGSET 0x36
#undef MC_CMD_0x36_PRIVILEGE_CTG
#define MC_CMD_0x36_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -5595,6 +6583,7 @@
* EINVAL (bad type).
*/
#define MC_CMD_NVRAM_INFO 0x37
+#define MC_CMD_NVRAM_INFO_MSGSET 0x37
#undef MC_CMD_0x37_PRIVILEGE_CTG
#define MC_CMD_0x37_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -5692,6 +6681,7 @@
* EPERM.
*/
#define MC_CMD_NVRAM_UPDATE_START 0x38
+#define MC_CMD_NVRAM_UPDATE_START_MSGSET 0x38
#undef MC_CMD_0x38_PRIVILEGE_CTG
#define MC_CMD_0x38_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -5732,6 +6722,7 @@
* PHY_LOCK required and not held)
*/
#define MC_CMD_NVRAM_READ 0x39
+#define MC_CMD_NVRAM_READ_MSGSET 0x39
#undef MC_CMD_0x39_PRIVILEGE_CTG
#define MC_CMD_0x39_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -5803,6 +6794,7 @@
* PHY_LOCK required and not held)
*/
#define MC_CMD_NVRAM_WRITE 0x3a
+#define MC_CMD_NVRAM_WRITE_MSGSET 0x3a
#undef MC_CMD_0x3a_PRIVILEGE_CTG
#define MC_CMD_0x3a_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -5838,6 +6830,7 @@
* PHY_LOCK required and not held)
*/
#define MC_CMD_NVRAM_ERASE 0x3b
+#define MC_CMD_NVRAM_ERASE_MSGSET 0x3b
#undef MC_CMD_0x3b_PRIVILEGE_CTG
#define MC_CMD_0x3b_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -5868,6 +6861,7 @@
* the error EPERM.
*/
#define MC_CMD_NVRAM_UPDATE_FINISH 0x3c
+#define MC_CMD_NVRAM_UPDATE_FINISH_MSGSET 0x3c
#undef MC_CMD_0x3c_PRIVILEGE_CTG
#define MC_CMD_0x3c_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -5906,6 +6900,9 @@
#define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_POLL_VERIFY_RESULT_OFST 8
#define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_POLL_VERIFY_RESULT_LBN 2
#define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_POLL_VERIFY_RESULT_WIDTH 1
+#define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_ABORT_OFST 8
+#define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_ABORT_LBN 3
+#define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_ABORT_WIDTH 1
/* MC_CMD_NVRAM_UPDATE_FINISH_OUT msgresponse: Legacy NVRAM_UPDATE_FINISH
* response. Use NVRAM_UPDATE_FINISH_V2_OUT in new code
@@ -6036,6 +7033,7 @@
* DATALEN=0
*/
#define MC_CMD_REBOOT 0x3d
+#define MC_CMD_REBOOT_MSGSET 0x3d
#undef MC_CMD_0x3d_PRIVILEGE_CTG
#define MC_CMD_0x3d_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -6057,6 +7055,7 @@
* thread address.
*/
#define MC_CMD_SCHEDINFO 0x3e
+#define MC_CMD_SCHEDINFO_MSGSET 0x3e
#undef MC_CMD_0x3e_PRIVILEGE_CTG
#define MC_CMD_0x3e_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -6083,6 +7082,7 @@
* mode to the specified value. Returns the old mode.
*/
#define MC_CMD_REBOOT_MODE 0x3f
+#define MC_CMD_REBOOT_MODE_MSGSET 0x3f
#undef MC_CMD_0x3f_PRIVILEGE_CTG
#define MC_CMD_0x3f_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -6141,6 +7141,7 @@
* Locks required: None Returns: 0
*/
#define MC_CMD_SENSOR_INFO 0x41
+#define MC_CMD_SENSOR_INFO_MSGSET 0x41
#undef MC_CMD_0x41_PRIVILEGE_CTG
#define MC_CMD_0x41_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -6380,7 +7381,13 @@
#define MC_CMD_SENSOR_ENTRY_OFST 4
#define MC_CMD_SENSOR_ENTRY_LEN 8
#define MC_CMD_SENSOR_ENTRY_LO_OFST 4
+#define MC_CMD_SENSOR_ENTRY_LO_LEN 4
+#define MC_CMD_SENSOR_ENTRY_LO_LBN 32
+#define MC_CMD_SENSOR_ENTRY_LO_WIDTH 32
#define MC_CMD_SENSOR_ENTRY_HI_OFST 8
+#define MC_CMD_SENSOR_ENTRY_HI_LEN 4
+#define MC_CMD_SENSOR_ENTRY_HI_LBN 64
+#define MC_CMD_SENSOR_ENTRY_HI_WIDTH 32
#define MC_CMD_SENSOR_ENTRY_MINNUM 0
#define MC_CMD_SENSOR_ENTRY_MAXNUM 31
#define MC_CMD_SENSOR_ENTRY_MAXNUM_MCDI2 127
@@ -6402,7 +7409,13 @@
/* MC_CMD_SENSOR_ENTRY_OFST 4 */
/* MC_CMD_SENSOR_ENTRY_LEN 8 */
/* MC_CMD_SENSOR_ENTRY_LO_OFST 4 */
+/* MC_CMD_SENSOR_ENTRY_LO_LEN 4 */
+/* MC_CMD_SENSOR_ENTRY_LO_LBN 32 */
+/* MC_CMD_SENSOR_ENTRY_LO_WIDTH 32 */
/* MC_CMD_SENSOR_ENTRY_HI_OFST 8 */
+/* MC_CMD_SENSOR_ENTRY_HI_LEN 4 */
+/* MC_CMD_SENSOR_ENTRY_HI_LBN 64 */
+/* MC_CMD_SENSOR_ENTRY_HI_WIDTH 32 */
/* MC_CMD_SENSOR_ENTRY_MINNUM 0 */
/* MC_CMD_SENSOR_ENTRY_MAXNUM 31 */
/* MC_CMD_SENSOR_ENTRY_MAXNUM_MCDI2 127 */
@@ -6445,6 +7458,7 @@
* STATE_WARNING. Otherwise the board should not be expected to function.
*/
#define MC_CMD_READ_SENSORS 0x42
+#define MC_CMD_READ_SENSORS_MSGSET 0x42
#undef MC_CMD_0x42_PRIVILEGE_CTG
#define MC_CMD_0x42_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -6459,7 +7473,13 @@
#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_OFST 0
#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_LEN 8
#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_LO_OFST 0
+#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_LO_LBN 0
+#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_HI_OFST 4
+#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_HI_LBN 32
+#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_HI_WIDTH 32
/* MC_CMD_READ_SENSORS_EXT_IN msgrequest */
#define MC_CMD_READ_SENSORS_EXT_IN_LEN 12
@@ -6471,7 +7491,13 @@
#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_OFST 0
#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_LEN 8
#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_LO_OFST 0
+#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_LO_LBN 0
+#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_HI_OFST 4
+#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_HI_LBN 32
+#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_HI_WIDTH 32
/* Size in bytes of host buffer. */
#define MC_CMD_READ_SENSORS_EXT_IN_LENGTH_OFST 8
#define MC_CMD_READ_SENSORS_EXT_IN_LENGTH_LEN 4
@@ -6486,7 +7512,13 @@
#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_OFST 0
#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_LEN 8
#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_LO_OFST 0
+#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_LO_LEN 4
+#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_LO_LBN 0
+#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_HI_OFST 4
+#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_HI_LEN 4
+#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_HI_LBN 32
+#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_HI_WIDTH 32
/* Size in bytes of host buffer. */
#define MC_CMD_READ_SENSORS_EXT_IN_V2_LENGTH_OFST 8
#define MC_CMD_READ_SENSORS_EXT_IN_V2_LENGTH_LEN 4
@@ -6540,6 +7572,7 @@
* code: 0
*/
#define MC_CMD_GET_PHY_STATE 0x43
+#define MC_CMD_GET_PHY_STATE_MSGSET 0x43
#undef MC_CMD_0x43_PRIVILEGE_CTG
#define MC_CMD_0x43_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -6563,6 +7596,7 @@
* disable 802.Qbb for a given priority.
*/
#define MC_CMD_SETUP_8021QBB 0x44
+#define MC_CMD_SETUP_8021QBB_MSGSET 0x44
/* MC_CMD_SETUP_8021QBB_IN msgrequest */
#define MC_CMD_SETUP_8021QBB_IN_LEN 32
@@ -6578,6 +7612,7 @@
* Retrieve ID of any WoL filters. Locks required: None. Returns: 0, ENOSYS
*/
#define MC_CMD_WOL_FILTER_GET 0x45
+#define MC_CMD_WOL_FILTER_GET_MSGSET 0x45
#undef MC_CMD_0x45_PRIVILEGE_CTG
#define MC_CMD_0x45_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -6597,6 +7632,7 @@
* Returns: 0, ENOSYS
*/
#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD 0x46
+#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_MSGSET 0x46
#undef MC_CMD_0x46_PRIVILEGE_CTG
#define MC_CMD_0x46_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -6649,6 +7685,7 @@
* None. Returns: 0, ENOSYS
*/
#define MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD 0x47
+#define MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_MSGSET 0x47
#undef MC_CMD_0x47_PRIVILEGE_CTG
#define MC_CMD_0x47_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -6669,6 +7706,7 @@
* Restore MAC after block reset. Locks required: None. Returns: 0.
*/
#define MC_CMD_MAC_RESET_RESTORE 0x48
+#define MC_CMD_MAC_RESET_RESTORE_MSGSET 0x48
/* MC_CMD_MAC_RESET_RESTORE_IN msgrequest */
#define MC_CMD_MAC_RESET_RESTORE_IN_LEN 0
@@ -6684,6 +7722,7 @@
* required: None Returns: 0
*/
#define MC_CMD_TESTASSERT 0x49
+#define MC_CMD_TESTASSERT_MSGSET 0x49
#undef MC_CMD_0x49_PRIVILEGE_CTG
#define MC_CMD_0x49_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -6727,6 +7766,7 @@
* basis. Locks required: None. Returns: 0, EINVAL .
*/
#define MC_CMD_WORKAROUND 0x4a
+#define MC_CMD_WORKAROUND_MSGSET 0x4a
#undef MC_CMD_0x4a_PRIVILEGE_CTG
#define MC_CMD_0x4a_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -6790,6 +7830,7 @@
* Anything else: currently undefined. Locks required: None. Return code: 0.
*/
#define MC_CMD_GET_PHY_MEDIA_INFO 0x4b
+#define MC_CMD_GET_PHY_MEDIA_INFO_MSGSET 0x4b
#undef MC_CMD_0x4b_PRIVILEGE_CTG
#define MC_CMD_0x4b_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -6821,6 +7862,7 @@
* on the type of partition).
*/
#define MC_CMD_NVRAM_TEST 0x4c
+#define MC_CMD_NVRAM_TEST_MSGSET 0x4c
#undef MC_CMD_0x4c_PRIVILEGE_CTG
#define MC_CMD_0x4c_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -6851,6 +7893,7 @@
* they are configured first. Locks required: None. Return code: 0, EINVAL.
*/
#define MC_CMD_MRSFP_TWEAK 0x4d
+#define MC_CMD_MRSFP_TWEAK_MSGSET 0x4d
/* MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG msgrequest */
#define MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_LEN 16
@@ -6894,6 +7937,7 @@
* of range.
*/
#define MC_CMD_SENSOR_SET_LIMS 0x4e
+#define MC_CMD_SENSOR_SET_LIMS_MSGSET 0x4e
#undef MC_CMD_0x4e_PRIVILEGE_CTG
#define MC_CMD_0x4e_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -6925,6 +7969,7 @@
/* MC_CMD_GET_RESOURCE_LIMITS
*/
#define MC_CMD_GET_RESOURCE_LIMITS 0x4f
+#define MC_CMD_GET_RESOURCE_LIMITS_MSGSET 0x4f
/* MC_CMD_GET_RESOURCE_LIMITS_IN msgrequest */
#define MC_CMD_GET_RESOURCE_LIMITS_IN_LEN 0
@@ -6947,6 +7992,7 @@
* none. Returns: 0, EINVAL (bad type).
*/
#define MC_CMD_NVRAM_PARTITIONS 0x51
+#define MC_CMD_NVRAM_PARTITIONS_MSGSET 0x51
#undef MC_CMD_0x51_PRIVILEGE_CTG
#define MC_CMD_0x51_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -6977,6 +8023,7 @@
* none. Returns: 0, EINVAL (bad type).
*/
#define MC_CMD_NVRAM_METADATA 0x52
+#define MC_CMD_NVRAM_METADATA_MSGSET 0x52
#undef MC_CMD_0x52_PRIVILEGE_CTG
#define MC_CMD_0x52_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -7035,6 +8082,7 @@
* Returns the base MAC, count and stride for the requesting function
*/
#define MC_CMD_GET_MAC_ADDRESSES 0x55
+#define MC_CMD_GET_MAC_ADDRESSES_MSGSET 0x55
#undef MC_CMD_0x55_PRIVILEGE_CTG
#define MC_CMD_0x55_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -7066,6 +8114,7 @@
* SF-120509-TC and SF-117282-PS.
*/
#define MC_CMD_CLP 0x56
+#define MC_CMD_CLP_MSGSET 0x56
#undef MC_CMD_0x56_PRIVILEGE_CTG
#define MC_CMD_0x56_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -7188,6 +8237,7 @@
* Perform a MUM operation
*/
#define MC_CMD_MUM 0x57
+#define MC_CMD_MUM_MSGSET 0x57
#undef MC_CMD_0x57_PRIVILEGE_CTG
#define MC_CMD_0x57_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -7604,7 +8654,13 @@
#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_OFST 4
#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_LEN 8
#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_LO_OFST 4
+#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_LO_LEN 4
+#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_LO_LBN 32
+#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_LO_WIDTH 32
#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_HI_OFST 8
+#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_HI_LEN 4
+#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_HI_LBN 64
+#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_HI_WIDTH 32
/* MC_CMD_MUM_OUT_RAW_CMD msgresponse */
#define MC_CMD_MUM_OUT_RAW_CMD_LENMIN 1
@@ -7789,7 +8845,13 @@
#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_OFST 8
#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_LEN 8
#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_LO_OFST 8
+#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_LO_LEN 4
+#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_LO_LBN 64
+#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_LO_WIDTH 32
#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_HI_OFST 12
+#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_HI_LEN 4
+#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_HI_LBN 96
+#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_HI_WIDTH 32
#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_MINNUM 2
#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_MAXNUM 30
#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_MAXNUM_MCDI2 126
@@ -7986,6 +9048,7 @@
* sensor_query SPHINX service.
*/
#define MC_CMD_DYNAMIC_SENSORS_LIST 0x66
+#define MC_CMD_DYNAMIC_SENSORS_LIST_MSGSET 0x66
#undef MC_CMD_0x66_PRIVILEGE_CTG
#define MC_CMD_0x66_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -8031,6 +9094,7 @@
* `get_descriptions` in the sensor_query SPHINX service.
*/
#define MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS 0x67
+#define MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_MSGSET 0x67
#undef MC_CMD_0x67_PRIVILEGE_CTG
#define MC_CMD_0x67_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -8080,6 +9144,7 @@
* in the sensor_query SPHINX service.
*/
#define MC_CMD_DYNAMIC_SENSORS_GET_READINGS 0x68
+#define MC_CMD_DYNAMIC_SENSORS_GET_READINGS_MSGSET 0x68
#undef MC_CMD_0x68_PRIVILEGE_CTG
#define MC_CMD_0x68_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -8117,6 +9182,7 @@
* receive (Riverhead).
*/
#define MC_CMD_EVENT_CTRL 0x69
+#define MC_CMD_EVENT_CTRL_MSGSET 0x69
#undef MC_CMD_0x69_PRIVILEGE_CTG
#define MC_CMD_0x69_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -8197,7 +9263,13 @@
#define BUFTBL_ENTRY_RAWADDR_OFST 4
#define BUFTBL_ENTRY_RAWADDR_LEN 8
#define BUFTBL_ENTRY_RAWADDR_LO_OFST 4
+#define BUFTBL_ENTRY_RAWADDR_LO_LEN 4
+#define BUFTBL_ENTRY_RAWADDR_LO_LBN 32
+#define BUFTBL_ENTRY_RAWADDR_LO_WIDTH 32
#define BUFTBL_ENTRY_RAWADDR_HI_OFST 8
+#define BUFTBL_ENTRY_RAWADDR_HI_LEN 4
+#define BUFTBL_ENTRY_RAWADDR_HI_LBN 64
+#define BUFTBL_ENTRY_RAWADDR_HI_WIDTH 32
#define BUFTBL_ENTRY_RAWADDR_LBN 32
#define BUFTBL_ENTRY_RAWADDR_WIDTH 64
@@ -8207,14 +9279,25 @@
#define NVRAM_PARTITION_TYPE_ID_LEN 2
/* enum: Primary MC firmware partition */
#define NVRAM_PARTITION_TYPE_MC_FIRMWARE 0x100
+/* enum: NMC firmware partition (this is intentionally an alias of MC_FIRMWARE)
+ */
+#define NVRAM_PARTITION_TYPE_NMC_FIRMWARE 0x100
/* enum: Secondary MC firmware partition */
#define NVRAM_PARTITION_TYPE_MC_FIRMWARE_BACKUP 0x200
/* enum: Expansion ROM partition */
#define NVRAM_PARTITION_TYPE_EXPANSION_ROM 0x300
/* enum: Static configuration TLV partition */
#define NVRAM_PARTITION_TYPE_STATIC_CONFIG 0x400
+/* enum: Factory configuration TLV partition (this is intentionally an alias of
+ * STATIC_CONFIG)
+ */
+#define NVRAM_PARTITION_TYPE_FACTORY_CONFIG 0x400
/* enum: Dynamic configuration TLV partition */
#define NVRAM_PARTITION_TYPE_DYNAMIC_CONFIG 0x500
+/* enum: User configuration TLV partition (this is intentionally an alias of
+ * DYNAMIC_CONFIG)
+ */
+#define NVRAM_PARTITION_TYPE_USER_CONFIG 0x500
/* enum: Expansion ROM configuration data for port 0 */
#define NVRAM_PARTITION_TYPE_EXPROM_CONFIG_PORT0 0x600
/* enum: Synonym for EXPROM_CONFIG_PORT0 as used in pmap files */
@@ -8227,10 +9310,16 @@
#define NVRAM_PARTITION_TYPE_EXPROM_CONFIG_PORT3 0x603
/* enum: Non-volatile log output partition */
#define NVRAM_PARTITION_TYPE_LOG 0x700
+/* enum: Non-volatile log output partition for NMC firmware (this is
+ * intentionally an alias of LOG)
+ */
+#define NVRAM_PARTITION_TYPE_NMC_LOG 0x700
/* enum: Non-volatile log output of second core on dual-core device */
#define NVRAM_PARTITION_TYPE_LOG_SLAVE 0x701
/* enum: Device state dump output partition */
#define NVRAM_PARTITION_TYPE_DUMP 0x800
+/* enum: Crash log partition for NMC firmware */
+#define NVRAM_PARTITION_TYPE_NMC_CRASH_LOG 0x801
/* enum: Application license key storage partition */
#define NVRAM_PARTITION_TYPE_LICENSE 0x900
/* enum: Start of range used for PHY partitions (low 8 bits are the PHY ID) */
@@ -8247,6 +9336,20 @@
#define NVRAM_PARTITION_TYPE_FC_LICENSE 0xb03
/* enum: Non-volatile log output partition for FC */
#define NVRAM_PARTITION_TYPE_FC_LOG 0xb04
+/* enum: FPGA Stage 1 bitstream */
+#define NVRAM_PARTITION_TYPE_FPGA_STAGE1 0xb05
+/* enum: FPGA Stage 2 bitstream */
+#define NVRAM_PARTITION_TYPE_FPGA_STAGE2 0xb06
+/* enum: FPGA User XCLBIN / Programmable Region 0 bitstream */
+#define NVRAM_PARTITION_TYPE_FPGA_REGION0 0xb07
+/* enum: FPGA User XCLBIN (this is intentionally an alias of FPGA_REGION0) */
+#define NVRAM_PARTITION_TYPE_FPGA_XCLBIN_USER 0xb07
+/* enum: FPGA jump instruction (a.k.a. boot) partition to select Stage1
+ * bitstream
+ */
+#define NVRAM_PARTITION_TYPE_FPGA_JUMP 0xb08
+/* enum: FPGA Validate XCLBIN */
+#define NVRAM_PARTITION_TYPE_FPGA_XCLBIN_VALIDATE 0xb09
/* enum: MUM firmware partition */
#define NVRAM_PARTITION_TYPE_MUM_FIRMWARE 0xc00
/* enum: SUC firmware partition (this is intentionally an alias of
@@ -8255,6 +9358,10 @@
#define NVRAM_PARTITION_TYPE_SUC_FIRMWARE 0xc00
/* enum: MUM Non-volatile log output partition. */
#define NVRAM_PARTITION_TYPE_MUM_LOG 0xc01
+/* enum: SUC Non-volatile log output partition (this is intentionally an alias
+ * of MUM_LOG).
+ */
+#define NVRAM_PARTITION_TYPE_SUC_LOG 0xc01
/* enum: MUM Application table partition. */
#define NVRAM_PARTITION_TYPE_MUM_APPTABLE 0xc02
/* enum: MUM boot rom partition. */
@@ -8269,6 +9376,10 @@
#define NVRAM_PARTITION_TYPE_EXPANSION_UEFI 0xd00
/* enum: Used by the expansion ROM for logging */
#define NVRAM_PARTITION_TYPE_PXE_LOG 0x1000
+/* enum: Non-volatile log output partition for Expansion ROM (this is
+ * intentionally an alias of PXE_LOG).
+ */
+#define NVRAM_PARTITION_TYPE_EXPROM_LOG 0x1000
/* enum: Used for XIP code of shmbooted images */
#define NVRAM_PARTITION_TYPE_XIP_SCRATCH 0x1100
/* enum: Spare partition 2 */
@@ -8277,6 +9388,10 @@
* between XJTAG and Manftest.
*/
#define NVRAM_PARTITION_TYPE_MANUFACTURING 0x1300
+/* enum: Deployment configuration TLV partition (this is intentionally an alias
+ * of MANUFACTURING)
+ */
+#define NVRAM_PARTITION_TYPE_DEPLOYMENT_CONFIG 0x1300
/* enum: Spare partition 4 */
#define NVRAM_PARTITION_TYPE_SPARE_4 0x1400
/* enum: Spare partition 5 */
@@ -8312,14 +9427,43 @@
#define NVRAM_PARTITION_TYPE_BUNDLE_LOG 0x1e02
/* enum: Partition for Solarflare gPXE bootrom installed via Bundle update. */
#define NVRAM_PARTITION_TYPE_EXPANSION_ROM_INTERNAL 0x1e03
+/* enum: Test partition on SmartNIC system microcontroller (SUC) */
+#define NVRAM_PARTITION_TYPE_SUC_TEST 0x1f00
+/* enum: System microcontroller access to primary FPGA flash. */
+#define NVRAM_PARTITION_TYPE_SUC_FPGA_PRIMARY 0x1f01
+/* enum: System microcontroller access to secondary FPGA flash (if present) */
+#define NVRAM_PARTITION_TYPE_SUC_FPGA_SECONDARY 0x1f02
+/* enum: System microcontroller access to primary System-on-Chip flash */
+#define NVRAM_PARTITION_TYPE_SUC_SOC_PRIMARY 0x1f03
+/* enum: System microcontroller access to secondary System-on-Chip flash (if
+ * present)
+ */
+#define NVRAM_PARTITION_TYPE_SUC_SOC_SECONDARY 0x1f04
+/* enum: System microcontroller critical failure logs. Contains structured
+ * details of sensors leading up to a critical failure (where the board is shut
+ * down).
+ */
+#define NVRAM_PARTITION_TYPE_SUC_FAILURE_LOG 0x1f05
+/* enum: System-on-Chip configuration information (see XN-200467-PS). */
+#define NVRAM_PARTITION_TYPE_SUC_SOC_CONFIG 0x1f07
+/* enum: System-on-Chip update information. */
+#define NVRAM_PARTITION_TYPE_SOC_UPDATE 0x2003
/* enum: Start of reserved value range (firmware may use for any purpose) */
#define NVRAM_PARTITION_TYPE_RESERVED_VALUES_MIN 0xff00
/* enum: End of reserved value range (firmware may use for any purpose) */
#define NVRAM_PARTITION_TYPE_RESERVED_VALUES_MAX 0xfffd
/* enum: Recovery partition map (provided if real map is missing or corrupt) */
#define NVRAM_PARTITION_TYPE_RECOVERY_MAP 0xfffe
+/* enum: Recovery Flash Partition Table, see SF-122606-TC. (this is
+ * intentionally an alias of RECOVERY_MAP)
+ */
+#define NVRAM_PARTITION_TYPE_RECOVERY_FPT 0xfffe
/* enum: Partition map (real map as stored in flash) */
#define NVRAM_PARTITION_TYPE_PARTITION_MAP 0xffff
+/* enum: Flash Partition Table, see SF-122606-TC. (this is intentionally an
+ * alias of PARTITION_MAP)
+ */
+#define NVRAM_PARTITION_TYPE_FPT 0xffff
#define NVRAM_PARTITION_TYPE_ID_LBN 0
#define NVRAM_PARTITION_TYPE_ID_WIDTH 16
@@ -8368,7 +9512,13 @@
#define LICENSED_FEATURES_MASK_OFST 0
#define LICENSED_FEATURES_MASK_LEN 8
#define LICENSED_FEATURES_MASK_LO_OFST 0
+#define LICENSED_FEATURES_MASK_LO_LEN 4
+#define LICENSED_FEATURES_MASK_LO_LBN 0
+#define LICENSED_FEATURES_MASK_LO_WIDTH 32
#define LICENSED_FEATURES_MASK_HI_OFST 4
+#define LICENSED_FEATURES_MASK_HI_LEN 4
+#define LICENSED_FEATURES_MASK_HI_LBN 32
+#define LICENSED_FEATURES_MASK_HI_WIDTH 32
#define LICENSED_FEATURES_RX_CUT_THROUGH_OFST 0
#define LICENSED_FEATURES_RX_CUT_THROUGH_LBN 0
#define LICENSED_FEATURES_RX_CUT_THROUGH_WIDTH 1
@@ -8408,7 +9558,13 @@
#define LICENSED_V3_APPS_MASK_OFST 0
#define LICENSED_V3_APPS_MASK_LEN 8
#define LICENSED_V3_APPS_MASK_LO_OFST 0
+#define LICENSED_V3_APPS_MASK_LO_LEN 4
+#define LICENSED_V3_APPS_MASK_LO_LBN 0
+#define LICENSED_V3_APPS_MASK_LO_WIDTH 32
#define LICENSED_V3_APPS_MASK_HI_OFST 4
+#define LICENSED_V3_APPS_MASK_HI_LEN 4
+#define LICENSED_V3_APPS_MASK_HI_LBN 32
+#define LICENSED_V3_APPS_MASK_HI_WIDTH 32
#define LICENSED_V3_APPS_ONLOAD_OFST 0
#define LICENSED_V3_APPS_ONLOAD_LBN 0
#define LICENSED_V3_APPS_ONLOAD_WIDTH 1
@@ -8466,7 +9622,13 @@
#define LICENSED_V3_FEATURES_MASK_OFST 0
#define LICENSED_V3_FEATURES_MASK_LEN 8
#define LICENSED_V3_FEATURES_MASK_LO_OFST 0
+#define LICENSED_V3_FEATURES_MASK_LO_LEN 4
+#define LICENSED_V3_FEATURES_MASK_LO_LBN 0
+#define LICENSED_V3_FEATURES_MASK_LO_WIDTH 32
#define LICENSED_V3_FEATURES_MASK_HI_OFST 4
+#define LICENSED_V3_FEATURES_MASK_HI_LEN 4
+#define LICENSED_V3_FEATURES_MASK_HI_LBN 32
+#define LICENSED_V3_FEATURES_MASK_HI_WIDTH 32
#define LICENSED_V3_FEATURES_RX_CUT_THROUGH_OFST 0
#define LICENSED_V3_FEATURES_RX_CUT_THROUGH_LBN 0
#define LICENSED_V3_FEATURES_RX_CUT_THROUGH_WIDTH 1
@@ -8617,6 +9779,7 @@
* Get a dump of the MCPU registers
*/
#define MC_CMD_READ_REGS 0x50
+#define MC_CMD_READ_REGS_MSGSET 0x50
#undef MC_CMD_0x50_PRIVILEGE_CTG
#define MC_CMD_0x50_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -8643,6 +9806,7 @@
* end with an address for each 4k of host memory required to back the EVQ.
*/
#define MC_CMD_INIT_EVQ 0x80
+#define MC_CMD_INIT_EVQ_MSGSET 0x80
#undef MC_CMD_0x80_PRIVILEGE_CTG
#define MC_CMD_0x80_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -8657,7 +9821,8 @@
#define MC_CMD_INIT_EVQ_IN_SIZE_OFST 0
#define MC_CMD_INIT_EVQ_IN_SIZE_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_EVQ_IN_INSTANCE_OFST 4
#define MC_CMD_INIT_EVQ_IN_INSTANCE_LEN 4
@@ -8729,7 +9894,13 @@
#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_OFST 36
#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_LO_OFST 36
+#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_LO_LBN 288
+#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_HI_OFST 40
+#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_HI_LBN 320
+#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_MINNUM 1
#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_MAXNUM 64
#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_MAXNUM_MCDI2 64
@@ -8750,7 +9921,8 @@
#define MC_CMD_INIT_EVQ_V2_IN_SIZE_OFST 0
#define MC_CMD_INIT_EVQ_V2_IN_SIZE_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_EVQ_V2_IN_INSTANCE_OFST 4
#define MC_CMD_INIT_EVQ_V2_IN_INSTANCE_LEN 4
@@ -8847,7 +10019,13 @@
#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_OFST 36
#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_LO_OFST 36
+#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_LO_LBN 288
+#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_HI_OFST 40
+#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_HI_LBN 320
+#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_MINNUM 1
#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_MAXNUM 64
#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_MAXNUM_MCDI2 64
@@ -8900,6 +10078,7 @@
* the RXQ.
*/
#define MC_CMD_INIT_RXQ 0x81
+#define MC_CMD_INIT_RXQ_MSGSET 0x81
#undef MC_CMD_0x81_PRIVILEGE_CTG
#define MC_CMD_0x81_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -8923,7 +10102,8 @@
#define MC_CMD_INIT_RXQ_IN_LABEL_OFST 8
#define MC_CMD_INIT_RXQ_IN_LABEL_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_RXQ_IN_INSTANCE_OFST 12
#define MC_CMD_INIT_RXQ_IN_INSTANCE_LEN 4
@@ -8964,7 +10144,13 @@
#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_OFST 28
#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_LO_OFST 28
+#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_LO_LBN 224
+#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_HI_OFST 32
+#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_HI_LBN 256
+#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_MINNUM 1
#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_MAXNUM 28
#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_MAXNUM_MCDI2 124
@@ -8988,7 +10174,8 @@
#define MC_CMD_INIT_RXQ_EXT_IN_LABEL_OFST 8
#define MC_CMD_INIT_RXQ_EXT_IN_LABEL_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_RXQ_EXT_IN_INSTANCE_OFST 12
#define MC_CMD_INIT_RXQ_EXT_IN_INSTANCE_LEN 4
@@ -9062,7 +10249,13 @@
#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_OFST 28
#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_LO_OFST 28
+#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_LO_LBN 224
+#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_HI_OFST 32
+#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_HI_LBN 256
+#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_NUM 64
/* Maximum length of packet to receive, if SNAPSHOT_MODE flag is set */
#define MC_CMD_INIT_RXQ_EXT_IN_SNAPSHOT_LENGTH_OFST 540
@@ -9085,7 +10278,8 @@
#define MC_CMD_INIT_RXQ_V3_IN_LABEL_OFST 8
#define MC_CMD_INIT_RXQ_V3_IN_LABEL_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_RXQ_V3_IN_INSTANCE_OFST 12
#define MC_CMD_INIT_RXQ_V3_IN_INSTANCE_LEN 4
@@ -9159,7 +10353,13 @@
#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_OFST 28
#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_LO_OFST 28
+#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_LO_LBN 224
+#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_HI_OFST 32
+#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_HI_LBN 256
+#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_NUM 64
/* Maximum length of packet to receive, if SNAPSHOT_MODE flag is set */
#define MC_CMD_INIT_RXQ_V3_IN_SNAPSHOT_LENGTH_OFST 540
@@ -9211,7 +10411,8 @@
#define MC_CMD_INIT_RXQ_V4_IN_LABEL_OFST 8
#define MC_CMD_INIT_RXQ_V4_IN_LABEL_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_RXQ_V4_IN_INSTANCE_OFST 12
#define MC_CMD_INIT_RXQ_V4_IN_INSTANCE_LEN 4
@@ -9285,7 +10486,13 @@
#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_OFST 28
#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_LO_OFST 28
+#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_LO_LBN 224
+#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_HI_OFST 32
+#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_HI_LBN 256
+#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_NUM 64
/* Maximum length of packet to receive, if SNAPSHOT_MODE flag is set */
#define MC_CMD_INIT_RXQ_V4_IN_SNAPSHOT_LENGTH_OFST 540
@@ -9350,7 +10557,8 @@
#define MC_CMD_INIT_RXQ_V5_IN_LABEL_OFST 8
#define MC_CMD_INIT_RXQ_V5_IN_LABEL_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_RXQ_V5_IN_INSTANCE_OFST 12
#define MC_CMD_INIT_RXQ_V5_IN_INSTANCE_LEN 4
@@ -9424,7 +10632,13 @@
#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_OFST 28
#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_LO_OFST 28
+#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_LO_LBN 224
+#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_HI_OFST 32
+#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_HI_LBN 256
+#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_NUM 64
/* Maximum length of packet to receive, if SNAPSHOT_MODE flag is set */
#define MC_CMD_INIT_RXQ_V5_IN_SNAPSHOT_LENGTH_OFST 540
@@ -9497,6 +10711,7 @@
/* MC_CMD_INIT_TXQ
*/
#define MC_CMD_INIT_TXQ 0x82
+#define MC_CMD_INIT_TXQ_MSGSET 0x82
#undef MC_CMD_0x82_PRIVILEGE_CTG
#define MC_CMD_0x82_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -9521,7 +10736,8 @@
#define MC_CMD_INIT_TXQ_IN_LABEL_OFST 8
#define MC_CMD_INIT_TXQ_IN_LABEL_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_TXQ_IN_INSTANCE_OFST 12
#define MC_CMD_INIT_TXQ_IN_INSTANCE_LEN 4
@@ -9565,7 +10781,13 @@
#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_OFST 28
#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_LO_OFST 28
+#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_LO_LBN 224
+#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_HI_OFST 32
+#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_HI_LBN 256
+#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_MINNUM 1
#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_MAXNUM 28
#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_MAXNUM_MCDI2 124
@@ -9586,7 +10808,8 @@
#define MC_CMD_INIT_TXQ_EXT_IN_LABEL_OFST 8
#define MC_CMD_INIT_TXQ_EXT_IN_LABEL_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_TXQ_EXT_IN_INSTANCE_OFST 12
#define MC_CMD_INIT_TXQ_EXT_IN_INSTANCE_LEN 4
@@ -9648,7 +10871,13 @@
#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_OFST 28
#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_LO_OFST 28
+#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_LO_LBN 224
+#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_HI_OFST 32
+#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_HI_LBN 256
+#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_MINNUM 1
#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_MAXNUM 64
#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_MAXNUM_MCDI2 64
@@ -9674,6 +10903,7 @@
* or the operation will fail with EBUSY
*/
#define MC_CMD_FINI_EVQ 0x83
+#define MC_CMD_FINI_EVQ_MSGSET 0x83
#undef MC_CMD_0x83_PRIVILEGE_CTG
#define MC_CMD_0x83_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -9695,6 +10925,7 @@
* Teardown a RXQ.
*/
#define MC_CMD_FINI_RXQ 0x84
+#define MC_CMD_FINI_RXQ_MSGSET 0x84
#undef MC_CMD_0x84_PRIVILEGE_CTG
#define MC_CMD_0x84_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -9714,6 +10945,7 @@
* Teardown a TXQ.
*/
#define MC_CMD_FINI_TXQ 0x85
+#define MC_CMD_FINI_TXQ_MSGSET 0x85
#undef MC_CMD_0x85_PRIVILEGE_CTG
#define MC_CMD_0x85_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -9733,6 +10965,7 @@
* Generate an event on an EVQ belonging to the function issuing the command.
*/
#define MC_CMD_DRIVER_EVENT 0x86
+#define MC_CMD_DRIVER_EVENT_MSGSET 0x86
#undef MC_CMD_0x86_PRIVILEGE_CTG
#define MC_CMD_0x86_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -9746,7 +10979,13 @@
#define MC_CMD_DRIVER_EVENT_IN_DATA_OFST 4
#define MC_CMD_DRIVER_EVENT_IN_DATA_LEN 8
#define MC_CMD_DRIVER_EVENT_IN_DATA_LO_OFST 4
+#define MC_CMD_DRIVER_EVENT_IN_DATA_LO_LEN 4
+#define MC_CMD_DRIVER_EVENT_IN_DATA_LO_LBN 32
+#define MC_CMD_DRIVER_EVENT_IN_DATA_LO_WIDTH 32
#define MC_CMD_DRIVER_EVENT_IN_DATA_HI_OFST 8
+#define MC_CMD_DRIVER_EVENT_IN_DATA_HI_LEN 4
+#define MC_CMD_DRIVER_EVENT_IN_DATA_HI_LBN 64
+#define MC_CMD_DRIVER_EVENT_IN_DATA_HI_WIDTH 32
/* MC_CMD_DRIVER_EVENT_OUT msgresponse */
#define MC_CMD_DRIVER_EVENT_OUT_LEN 0
@@ -9760,6 +10999,7 @@
* MC_CMD_SET_FUNC, which remains available for Siena but now deprecated.
*/
#define MC_CMD_PROXY_CMD 0x5b
+#define MC_CMD_PROXY_CMD_MSGSET 0x5b
#undef MC_CMD_0x5b_PRIVILEGE_CTG
#define MC_CMD_0x5b_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -9828,6 +11068,7 @@
* a designated admin function
*/
#define MC_CMD_PROXY_CONFIGURE 0x58
+#define MC_CMD_PROXY_CONFIGURE_MSGSET 0x58
#undef MC_CMD_0x58_PRIVILEGE_CTG
#define MC_CMD_0x58_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -9845,7 +11086,13 @@
#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_OFST 4
#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_LEN 8
#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_LO_OFST 4
+#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_LO_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_LO_LBN 32
+#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_LO_WIDTH 32
#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_HI_OFST 8
+#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_HI_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_HI_LBN 64
+#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_HI_WIDTH 32
/* Must be a power of 2 */
#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BLOCK_SIZE_OFST 12
#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BLOCK_SIZE_LEN 4
@@ -9855,7 +11102,13 @@
#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_OFST 16
#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_LEN 8
#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_LO_OFST 16
+#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_LO_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_LO_LBN 128
+#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_LO_WIDTH 32
#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_HI_OFST 20
+#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_HI_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_HI_LBN 160
+#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_HI_WIDTH 32
/* Must be a power of 2 */
#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BLOCK_SIZE_OFST 24
#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BLOCK_SIZE_LEN 4
@@ -9866,7 +11119,13 @@
#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_OFST 28
#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_LEN 8
#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_LO_OFST 28
+#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_LO_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_LO_LBN 224
+#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_LO_WIDTH 32
#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_HI_OFST 32
+#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_HI_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_HI_LBN 256
+#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_HI_WIDTH 32
/* Must be a power of 2, or zero if this buffer is not provided */
#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BLOCK_SIZE_OFST 36
#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BLOCK_SIZE_LEN 4
@@ -9890,7 +11149,13 @@
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_OFST 4
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_LEN 8
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_LO_OFST 4
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_LO_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_LO_LBN 32
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_LO_WIDTH 32
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_HI_OFST 8
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_HI_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_HI_LBN 64
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_HI_WIDTH 32
/* Must be a power of 2 */
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BLOCK_SIZE_OFST 12
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BLOCK_SIZE_LEN 4
@@ -9900,7 +11165,13 @@
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_OFST 16
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_LEN 8
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_LO_OFST 16
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_LO_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_LO_LBN 128
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_LO_WIDTH 32
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_HI_OFST 20
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_HI_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_HI_LBN 160
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_HI_WIDTH 32
/* Must be a power of 2 */
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BLOCK_SIZE_OFST 24
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BLOCK_SIZE_LEN 4
@@ -9911,7 +11182,13 @@
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_OFST 28
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_LEN 8
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_LO_OFST 28
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_LO_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_LO_LBN 224
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_LO_WIDTH 32
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_HI_OFST 32
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_HI_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_HI_LBN 256
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_HI_WIDTH 32
/* Must be a power of 2, or zero if this buffer is not provided */
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BLOCK_SIZE_OFST 36
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BLOCK_SIZE_LEN 4
@@ -9936,6 +11213,7 @@
* MC_CMD_PROXY_CONFIGURE).
*/
#define MC_CMD_PROXY_COMPLETE 0x5f
+#define MC_CMD_PROXY_COMPLETE_MSGSET 0x5f
#undef MC_CMD_0x5f_PRIVILEGE_CTG
#define MC_CMD_0x5f_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -9974,6 +11252,7 @@
* cannot do so). The buffer table entries will initially be zeroed.
*/
#define MC_CMD_ALLOC_BUFTBL_CHUNK 0x87
+#define MC_CMD_ALLOC_BUFTBL_CHUNK_MSGSET 0x87
#undef MC_CMD_0x87_PRIVILEGE_CTG
#define MC_CMD_0x87_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -10005,6 +11284,7 @@
* Reprogram a set of buffer table entries in the specified chunk.
*/
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES 0x88
+#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_MSGSET 0x88
#undef MC_CMD_0x88_PRIVILEGE_CTG
#define MC_CMD_0x88_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -10027,7 +11307,13 @@
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_OFST 12
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LEN 8
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LO_OFST 12
+#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LO_LEN 4
+#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LO_LBN 96
+#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LO_WIDTH 32
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_HI_OFST 16
+#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_HI_LEN 4
+#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_HI_LBN 128
+#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_HI_WIDTH 32
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_MINNUM 1
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_MAXNUM 32
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_MAXNUM_MCDI2 32
@@ -10040,6 +11326,7 @@
/* MC_CMD_FREE_BUFTBL_CHUNK
*/
#define MC_CMD_FREE_BUFTBL_CHUNK 0x89
+#define MC_CMD_FREE_BUFTBL_CHUNK_MSGSET 0x89
#undef MC_CMD_0x89_PRIVILEGE_CTG
#define MC_CMD_0x89_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -10058,6 +11345,7 @@
* Multiplexed MCDI call for filter operations
*/
#define MC_CMD_FILTER_OP 0x8a
+#define MC_CMD_FILTER_OP_MSGSET 0x8a
#undef MC_CMD_0x8a_PRIVILEGE_CTG
#define MC_CMD_0x8a_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -10083,7 +11371,13 @@
#define MC_CMD_FILTER_OP_IN_HANDLE_OFST 4
#define MC_CMD_FILTER_OP_IN_HANDLE_LEN 8
#define MC_CMD_FILTER_OP_IN_HANDLE_LO_OFST 4
+#define MC_CMD_FILTER_OP_IN_HANDLE_LO_LEN 4
+#define MC_CMD_FILTER_OP_IN_HANDLE_LO_LBN 32
+#define MC_CMD_FILTER_OP_IN_HANDLE_LO_WIDTH 32
#define MC_CMD_FILTER_OP_IN_HANDLE_HI_OFST 8
+#define MC_CMD_FILTER_OP_IN_HANDLE_HI_LEN 4
+#define MC_CMD_FILTER_OP_IN_HANDLE_HI_LBN 64
+#define MC_CMD_FILTER_OP_IN_HANDLE_HI_WIDTH 32
/* The port ID associated with the v-adaptor which should contain this filter.
*/
#define MC_CMD_FILTER_OP_IN_PORT_ID_OFST 12
@@ -10239,7 +11533,13 @@
#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_OFST 4
#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_LEN 8
#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_LO_OFST 4
+#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_LO_LEN 4
+#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_LO_LBN 32
+#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_LO_WIDTH 32
#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_HI_OFST 8
+#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_HI_LEN 4
+#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_HI_LBN 64
+#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_HI_WIDTH 32
/* The port ID associated with the v-adaptor which should contain this filter.
*/
#define MC_CMD_FILTER_OP_EXT_IN_PORT_ID_OFST 12
@@ -10518,7 +11818,13 @@
#define MC_CMD_FILTER_OP_V3_IN_HANDLE_OFST 4
#define MC_CMD_FILTER_OP_V3_IN_HANDLE_LEN 8
#define MC_CMD_FILTER_OP_V3_IN_HANDLE_LO_OFST 4
+#define MC_CMD_FILTER_OP_V3_IN_HANDLE_LO_LEN 4
+#define MC_CMD_FILTER_OP_V3_IN_HANDLE_LO_LBN 32
+#define MC_CMD_FILTER_OP_V3_IN_HANDLE_LO_WIDTH 32
#define MC_CMD_FILTER_OP_V3_IN_HANDLE_HI_OFST 8
+#define MC_CMD_FILTER_OP_V3_IN_HANDLE_HI_LEN 4
+#define MC_CMD_FILTER_OP_V3_IN_HANDLE_HI_LBN 64
+#define MC_CMD_FILTER_OP_V3_IN_HANDLE_HI_WIDTH 32
/* The port ID associated with the v-adaptor which should contain this filter.
*/
#define MC_CMD_FILTER_OP_V3_IN_PORT_ID_OFST 12
@@ -10779,15 +12085,15 @@
*/
#define MC_CMD_FILTER_OP_V3_IN_IFRM_DST_IP_OFST 156
#define MC_CMD_FILTER_OP_V3_IN_IFRM_DST_IP_LEN 16
-/* Flags controlling mutations of the user_mark and user_flag fields of
- * matching packets, with logic as follows: if (req.MATCH_BITOR_FLAG == 1)
- * user_flag = req.MATCH_SET_FLAG bit_or user_flag; else user_flag =
- * req.MATCH_SET_FLAG; if (req.MATCH_SET_MARK == 0) user_mark = 0; else if
- * (req.MATCH_BITOR_MARK == 1) user_mark = req.MATCH_SET_MARK bit_or user_mark;
- * else user_mark = req.MATCH_SET_MARK; N.B. These flags overlap with the
- * MATCH_ACTION field, which is deprecated in favour of this field. For the
- * cases where these flags induce a valid encoding of the MATCH_ACTION field,
- * the semantics agree.
+/* Flags controlling mutations of the packet and/or metadata when the filter is
+ * matched. The user_mark and user_flag fields' logic is as follows: if
+ * (req.MATCH_BITOR_FLAG == 1) user_flag = req.MATCH_SET_FLAG bit_or user_flag;
+ * else user_flag = req.MATCH_SET_FLAG; if (req.MATCH_SET_MARK == 0) user_mark
+ * = 0; else if (req.MATCH_BITOR_MARK == 1) user_mark = req.MATCH_SET_MARK
+ * bit_or user_mark; else user_mark = req.MATCH_SET_MARK; N.B. These flags
+ * overlap with the MATCH_ACTION field, which is deprecated in favour of this
+ * field. For the cases where these flags induce a valid encoding of the
+ * MATCH_ACTION field, the semantics agree.
*/
#define MC_CMD_FILTER_OP_V3_IN_MATCH_ACTION_FLAGS_OFST 172
#define MC_CMD_FILTER_OP_V3_IN_MATCH_ACTION_FLAGS_LEN 4
@@ -10803,6 +12109,9 @@
#define MC_CMD_FILTER_OP_V3_IN_MATCH_BITOR_MARK_OFST 172
#define MC_CMD_FILTER_OP_V3_IN_MATCH_BITOR_MARK_LBN 3
#define MC_CMD_FILTER_OP_V3_IN_MATCH_BITOR_MARK_WIDTH 1
+#define MC_CMD_FILTER_OP_V3_IN_MATCH_STRIP_VLAN_OFST 172
+#define MC_CMD_FILTER_OP_V3_IN_MATCH_STRIP_VLAN_LBN 4
+#define MC_CMD_FILTER_OP_V3_IN_MATCH_STRIP_VLAN_WIDTH 1
/* Deprecated: the overlapping MATCH_ACTION_FLAGS field exposes all of the
* functionality of this field in an ABI-backwards-compatible manner, and
* should be used instead. Any future extensions should be made to the
@@ -10848,7 +12157,13 @@
#define MC_CMD_FILTER_OP_OUT_HANDLE_OFST 4
#define MC_CMD_FILTER_OP_OUT_HANDLE_LEN 8
#define MC_CMD_FILTER_OP_OUT_HANDLE_LO_OFST 4
+#define MC_CMD_FILTER_OP_OUT_HANDLE_LO_LEN 4
+#define MC_CMD_FILTER_OP_OUT_HANDLE_LO_LBN 32
+#define MC_CMD_FILTER_OP_OUT_HANDLE_LO_WIDTH 32
#define MC_CMD_FILTER_OP_OUT_HANDLE_HI_OFST 8
+#define MC_CMD_FILTER_OP_OUT_HANDLE_HI_LEN 4
+#define MC_CMD_FILTER_OP_OUT_HANDLE_HI_LBN 64
+#define MC_CMD_FILTER_OP_OUT_HANDLE_HI_WIDTH 32
/* enum: guaranteed invalid filter handle (low 32 bits) */
#define MC_CMD_FILTER_OP_OUT_HANDLE_LO_INVALID 0xffffffff
/* enum: guaranteed invalid filter handle (high 32 bits) */
@@ -10868,7 +12183,13 @@
#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_OFST 4
#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_LEN 8
#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_LO_OFST 4
+#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_LO_LEN 4
+#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_LO_LBN 32
+#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_LO_WIDTH 32
#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_HI_OFST 8
+#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_HI_LEN 4
+#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_HI_LBN 64
+#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_HI_WIDTH 32
/* Enum values, see field(s): */
/* MC_CMD_FILTER_OP_OUT/HANDLE */
@@ -10878,6 +12199,7 @@
* Get information related to the parser-dispatcher subsystem
*/
#define MC_CMD_GET_PARSER_DISP_INFO 0xe4
+#define MC_CMD_GET_PARSER_DISP_INFO_MSGSET 0xe4
#undef MC_CMD_0xe4_PRIVILEGE_CTG
#define MC_CMD_0xe4_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11025,6 +12347,7 @@
* permitted.
*/
#define MC_CMD_PARSER_DISP_RW 0xe5
+#define MC_CMD_PARSER_DISP_RW_MSGSET 0xe5
#undef MC_CMD_0xe5_PRIVILEGE_CTG
#define MC_CMD_0xe5_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -11115,6 +12438,7 @@
* Get number of PFs on the device.
*/
#define MC_CMD_GET_PF_COUNT 0xb6
+#define MC_CMD_GET_PF_COUNT_MSGSET 0xb6
#undef MC_CMD_0xb6_PRIVILEGE_CTG
#define MC_CMD_0xb6_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11134,6 +12458,7 @@
* Set number of PFs on the device.
*/
#define MC_CMD_SET_PF_COUNT 0xb7
+#define MC_CMD_SET_PF_COUNT_MSGSET 0xb7
/* MC_CMD_SET_PF_COUNT_IN msgrequest */
#define MC_CMD_SET_PF_COUNT_IN_LEN 4
@@ -11150,6 +12475,7 @@
* Get port assignment for current PCI function.
*/
#define MC_CMD_GET_PORT_ASSIGNMENT 0xb8
+#define MC_CMD_GET_PORT_ASSIGNMENT_MSGSET 0xb8
#undef MC_CMD_0xb8_PRIVILEGE_CTG
#define MC_CMD_0xb8_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11175,6 +12501,7 @@
* Set port assignment for current PCI function.
*/
#define MC_CMD_SET_PORT_ASSIGNMENT 0xb9
+#define MC_CMD_SET_PORT_ASSIGNMENT_MSGSET 0xb9
#undef MC_CMD_0xb9_PRIVILEGE_CTG
#define MC_CMD_0xb9_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -11194,6 +12521,7 @@
* Allocate VIs for current PCI function.
*/
#define MC_CMD_ALLOC_VIS 0x8b
+#define MC_CMD_ALLOC_VIS_MSGSET 0x8b
#undef MC_CMD_0x8b_PRIVILEGE_CTG
#define MC_CMD_0x8b_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11241,6 +12569,7 @@
* but not freed.
*/
#define MC_CMD_FREE_VIS 0x8c
+#define MC_CMD_FREE_VIS_MSGSET 0x8c
#undef MC_CMD_0x8c_PRIVILEGE_CTG
#define MC_CMD_0x8c_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11257,6 +12586,7 @@
* Get SRIOV config for this PF.
*/
#define MC_CMD_GET_SRIOV_CFG 0xba
+#define MC_CMD_GET_SRIOV_CFG_MSGSET 0xba
#undef MC_CMD_0xba_PRIVILEGE_CTG
#define MC_CMD_0xba_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11290,6 +12620,7 @@
* Set SRIOV config for this PF.
*/
#define MC_CMD_SET_SRIOV_CFG 0xbb
+#define MC_CMD_SET_SRIOV_CFG_MSGSET 0xbb
#undef MC_CMD_0xbb_PRIVILEGE_CTG
#define MC_CMD_0xbb_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -11325,9 +12656,11 @@
/***********************************/
/* MC_CMD_GET_VI_ALLOC_INFO
* Get information about number of VI's and base VI number allocated to this
- * function.
+ * function. This message is not available to dynamic clients created by
+ * MC_CMD_CLIENT_ALLOC.
*/
#define MC_CMD_GET_VI_ALLOC_INFO 0x8d
+#define MC_CMD_GET_VI_ALLOC_INFO_MSGSET 0x8d
#undef MC_CMD_0x8d_PRIVILEGE_CTG
#define MC_CMD_0x8d_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11352,9 +12685,12 @@
/***********************************/
/* MC_CMD_DUMP_VI_STATE
- * For CmdClient use. Dump pertinent information on a specific absolute VI.
+ * For CmdClient use. Dump pertinent information on a specific absolute VI. The
+ * VI must be owned by the calling client or one of its ancestors; usership of
+ * the VI (as set by MC_CMD_SET_VI_USER) is not sufficient.
*/
#define MC_CMD_DUMP_VI_STATE 0x8e
+#define MC_CMD_DUMP_VI_STATE_MSGSET 0x8e
#undef MC_CMD_0x8e_PRIVILEGE_CTG
#define MC_CMD_0x8e_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11366,7 +12702,7 @@
#define MC_CMD_DUMP_VI_STATE_IN_VI_NUMBER_LEN 4
/* MC_CMD_DUMP_VI_STATE_OUT msgresponse */
-#define MC_CMD_DUMP_VI_STATE_OUT_LEN 96
+#define MC_CMD_DUMP_VI_STATE_OUT_LEN 100
/* The PF part of the function owning this VI. */
#define MC_CMD_DUMP_VI_STATE_OUT_OWNER_PF_OFST 0
#define MC_CMD_DUMP_VI_STATE_OUT_OWNER_PF_LEN 2
@@ -11389,12 +12725,24 @@
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_OFST 12
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_LO_OFST 12
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_LO_LBN 96
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_HI_OFST 16
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_HI_LBN 128
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_HI_WIDTH 32
/* Raw evq timer table data. */
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_OFST 20
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_LO_OFST 20
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_LO_LBN 160
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_HI_OFST 24
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_HI_LBN 192
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_HI_WIDTH 32
/* Combined metadata field. */
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_OFST 28
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_LEN 4
@@ -11411,22 +12759,46 @@
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_OFST 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_LO_OFST 32
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_LO_LBN 256
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_HI_OFST 36
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_HI_LBN 288
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_HI_WIDTH 32
/* TXDPCPU raw table data for queue. */
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_OFST 40
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_LO_OFST 40
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_LO_LBN 320
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_HI_OFST 44
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_HI_LBN 352
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_HI_WIDTH 32
/* TXDPCPU raw table data for queue. */
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_OFST 48
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_LO_OFST 48
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_LO_LBN 384
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_HI_OFST 52
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_HI_LBN 416
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_HI_WIDTH 32
/* Combined metadata field. */
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_OFST 56
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_LO_OFST 56
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_LO_LBN 448
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_HI_OFST 60
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_HI_LBN 480
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_HI_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_BUFS_BASE_OFST 56
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_BUFS_BASE_LBN 0
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_BUFS_BASE_WIDTH 16
@@ -11446,22 +12818,46 @@
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_OFST 64
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_LO_OFST 64
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_LO_LBN 512
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_HI_OFST 68
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_HI_LBN 544
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_HI_WIDTH 32
/* RXDPCPU raw table data for queue. */
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_OFST 72
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_LO_OFST 72
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_LO_LBN 576
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_HI_OFST 76
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_HI_LBN 608
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_HI_WIDTH 32
/* Reserved, currently 0. */
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_OFST 80
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_LO_OFST 80
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_LO_LBN 640
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_HI_OFST 84
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_HI_LBN 672
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_HI_WIDTH 32
/* Combined metadata field. */
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_OFST 88
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_LO_OFST 88
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_LO_LBN 704
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_HI_OFST 92
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_HI_LBN 736
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_HI_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_BUFS_BASE_OFST 88
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_BUFS_BASE_LBN 0
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_BUFS_BASE_WIDTH 16
@@ -11474,6 +12870,9 @@
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_WAITCOUNT_OFST 88
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_WAITCOUNT_LBN 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_WAITCOUNT_WIDTH 8
+/* Current user, as assigned by MC_CMD_SET_VI_USER. */
+#define MC_CMD_DUMP_VI_STATE_OUT_USER_CLIENT_ID_OFST 96
+#define MC_CMD_DUMP_VI_STATE_OUT_USER_CLIENT_ID_LEN 4
/***********************************/
@@ -11481,6 +12880,7 @@
* Allocate a push I/O buffer for later use with a tx queue.
*/
#define MC_CMD_ALLOC_PIOBUF 0x8f
+#define MC_CMD_ALLOC_PIOBUF_MSGSET 0x8f
#undef MC_CMD_0x8f_PRIVILEGE_CTG
#define MC_CMD_0x8f_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -11500,6 +12900,7 @@
* Free a push I/O buffer.
*/
#define MC_CMD_FREE_PIOBUF 0x90
+#define MC_CMD_FREE_PIOBUF_MSGSET 0x90
#undef MC_CMD_0x90_PRIVILEGE_CTG
#define MC_CMD_0x90_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -11516,9 +12917,12 @@
/***********************************/
/* MC_CMD_GET_VI_TLP_PROCESSING
- * Get TLP steering and ordering information for a VI.
+ * Get TLP steering and ordering information for a VI. The caller must have the
+ * GRP_FUNC_DMA privilege and must be the currently-assigned user of this VI or
+ * an ancestor of the current user (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_GET_VI_TLP_PROCESSING 0xb0
+#define MC_CMD_GET_VI_TLP_PROCESSING_MSGSET 0xb0
#undef MC_CMD_0xb0_PRIVILEGE_CTG
#define MC_CMD_0xb0_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11555,9 +12959,12 @@
/***********************************/
/* MC_CMD_SET_VI_TLP_PROCESSING
- * Set TLP steering and ordering information for a VI.
+ * Set TLP steering and ordering information for a VI. The caller must have the
+ * GRP_FUNC_DMA privilege and must be the currently-assigned user of this VI or
+ * an ancestor of the current user (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_SET_VI_TLP_PROCESSING 0xb1
+#define MC_CMD_SET_VI_TLP_PROCESSING_MSGSET 0xb1
#undef MC_CMD_0xb1_PRIVILEGE_CTG
#define MC_CMD_0xb1_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11597,6 +13004,7 @@
* Get global PCIe steering and transaction processing configuration.
*/
#define MC_CMD_GET_TLP_PROCESSING_GLOBALS 0xbc
+#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_MSGSET 0xbc
#undef MC_CMD_0xbc_PRIVILEGE_CTG
#define MC_CMD_0xbc_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -11681,6 +13089,7 @@
* Set global PCIe steering and transaction processing configuration.
*/
#define MC_CMD_SET_TLP_PROCESSING_GLOBALS 0xbd
+#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_MSGSET 0xbd
#undef MC_CMD_0xbd_PRIVILEGE_CTG
#define MC_CMD_0xbd_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -11746,6 +13155,7 @@
* Download a new set of images to the satellite CPUs from the host.
*/
#define MC_CMD_SATELLITE_DOWNLOAD 0x91
+#define MC_CMD_SATELLITE_DOWNLOAD_MSGSET 0x91
#undef MC_CMD_0x91_PRIVILEGE_CTG
#define MC_CMD_0x91_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -11873,6 +13283,7 @@
* reference inherent device capabilities as opposed to current NVRAM config.
*/
#define MC_CMD_GET_CAPABILITIES 0xbe
+#define MC_CMD_GET_CAPABILITIES_MSGSET 0xbe
#undef MC_CMD_0xbe_PRIVILEGE_CTG
#define MC_CMD_0xbe_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -14813,6 +16224,18 @@
#define MC_CMD_GET_CAPABILITIES_V7_OUT_UNSOL_EV_CREDIT_SUPPORTED_OFST 148
#define MC_CMD_GET_CAPABILITIES_V7_OUT_UNSOL_EV_CREDIT_SUPPORTED_LBN 7
#define MC_CMD_GET_CAPABILITIES_V7_OUT_UNSOL_EV_CREDIT_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_ENCAPSULATED_MCDI_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_ENCAPSULATED_MCDI_SUPPORTED_LBN 8
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_ENCAPSULATED_MCDI_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_EXTERNAL_MAE_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_EXTERNAL_MAE_SUPPORTED_LBN 9
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_EXTERNAL_MAE_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_LBN 10
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_LBN 11
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_WIDTH 1
/* MC_CMD_GET_CAPABILITIES_V8_OUT msgresponse */
#define MC_CMD_GET_CAPABILITIES_V8_OUT_LEN 160
@@ -15299,6 +16722,18 @@
#define MC_CMD_GET_CAPABILITIES_V8_OUT_UNSOL_EV_CREDIT_SUPPORTED_OFST 148
#define MC_CMD_GET_CAPABILITIES_V8_OUT_UNSOL_EV_CREDIT_SUPPORTED_LBN 7
#define MC_CMD_GET_CAPABILITIES_V8_OUT_UNSOL_EV_CREDIT_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_ENCAPSULATED_MCDI_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_ENCAPSULATED_MCDI_SUPPORTED_LBN 8
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_ENCAPSULATED_MCDI_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_EXTERNAL_MAE_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_EXTERNAL_MAE_SUPPORTED_LBN 9
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_EXTERNAL_MAE_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_LBN 10
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_LBN 11
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_WIDTH 1
/* These bits are reserved for communicating test-specific capabilities to
* host-side test software. All production drivers should treat this field as
* opaque.
@@ -15306,7 +16741,13 @@
#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_OFST 152
#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_LEN 8
#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_LO_OFST 152
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_LO_LEN 4
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_LO_LBN 1216
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_LO_WIDTH 32
#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_HI_OFST 156
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_HI_LEN 4
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_HI_LBN 1248
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_HI_WIDTH 32
/* MC_CMD_GET_CAPABILITIES_V9_OUT msgresponse */
#define MC_CMD_GET_CAPABILITIES_V9_OUT_LEN 184
@@ -15793,6 +17234,18 @@
#define MC_CMD_GET_CAPABILITIES_V9_OUT_UNSOL_EV_CREDIT_SUPPORTED_OFST 148
#define MC_CMD_GET_CAPABILITIES_V9_OUT_UNSOL_EV_CREDIT_SUPPORTED_LBN 7
#define MC_CMD_GET_CAPABILITIES_V9_OUT_UNSOL_EV_CREDIT_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_ENCAPSULATED_MCDI_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_ENCAPSULATED_MCDI_SUPPORTED_LBN 8
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_ENCAPSULATED_MCDI_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_EXTERNAL_MAE_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_EXTERNAL_MAE_SUPPORTED_LBN 9
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_EXTERNAL_MAE_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_LBN 10
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_LBN 11
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_WIDTH 1
/* These bits are reserved for communicating test-specific capabilities to
* host-side test software. All production drivers should treat this field as
* opaque.
@@ -15800,7 +17253,13 @@
#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_OFST 152
#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_LEN 8
#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_LO_OFST 152
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_LO_LEN 4
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_LO_LBN 1216
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_LO_WIDTH 32
#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_HI_OFST 156
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_HI_LEN 4
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_HI_LBN 1248
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_HI_WIDTH 32
/* The minimum size (in table entries) of indirection table to be allocated
* from the pool for an RSS context. Note that the table size used must be a
* power of 2.
@@ -16322,6 +17781,18 @@
#define MC_CMD_GET_CAPABILITIES_V10_OUT_UNSOL_EV_CREDIT_SUPPORTED_OFST 148
#define MC_CMD_GET_CAPABILITIES_V10_OUT_UNSOL_EV_CREDIT_SUPPORTED_LBN 7
#define MC_CMD_GET_CAPABILITIES_V10_OUT_UNSOL_EV_CREDIT_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_ENCAPSULATED_MCDI_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_ENCAPSULATED_MCDI_SUPPORTED_LBN 8
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_ENCAPSULATED_MCDI_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_EXTERNAL_MAE_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_EXTERNAL_MAE_SUPPORTED_LBN 9
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_EXTERNAL_MAE_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_LBN 10
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_LBN 11
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_WIDTH 1
/* These bits are reserved for communicating test-specific capabilities to
* host-side test software. All production drivers should treat this field as
* opaque.
@@ -16329,7 +17800,13 @@
#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_OFST 152
#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_LEN 8
#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_LO_OFST 152
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_LO_LEN 4
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_LO_LBN 1216
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_LO_WIDTH 32
#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_HI_OFST 156
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_HI_LEN 4
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_HI_LBN 1248
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_HI_WIDTH 32
/* The minimum size (in table entries) of indirection table to be allocated
* from the pool for an RSS context. Note that the table size used must be a
* power of 2.
@@ -16386,6 +17863,7 @@
* Encapsulation for a v2 extended command
*/
#define MC_CMD_V2_EXTN 0x7f
+#define MC_CMD_V2_EXTN_MSGSET 0x7f
/* MC_CMD_V2_EXTN_IN msgrequest */
#define MC_CMD_V2_EXTN_IN_LEN 4
@@ -16417,6 +17895,7 @@
* Allocate a pacer bucket (for qau rp or a snapper test)
*/
#define MC_CMD_TCM_BUCKET_ALLOC 0xb2
+#define MC_CMD_TCM_BUCKET_ALLOC_MSGSET 0xb2
#undef MC_CMD_0xb2_PRIVILEGE_CTG
#define MC_CMD_0xb2_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16436,6 +17915,7 @@
* Free a pacer bucket
*/
#define MC_CMD_TCM_BUCKET_FREE 0xb3
+#define MC_CMD_TCM_BUCKET_FREE_MSGSET 0xb3
#undef MC_CMD_0xb3_PRIVILEGE_CTG
#define MC_CMD_0xb3_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16455,6 +17935,7 @@
* Initialise pacer bucket with a given rate
*/
#define MC_CMD_TCM_BUCKET_INIT 0xb4
+#define MC_CMD_TCM_BUCKET_INIT_MSGSET 0xb4
#undef MC_CMD_0xb4_PRIVILEGE_CTG
#define MC_CMD_0xb4_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16489,6 +17970,7 @@
* Initialise txq in pacer with given options or set options
*/
#define MC_CMD_TCM_TXQ_INIT 0xb5
+#define MC_CMD_TCM_TXQ_INIT_MSGSET 0xb5
#undef MC_CMD_0xb5_PRIVILEGE_CTG
#define MC_CMD_0xb5_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16579,6 +18061,7 @@
* Link a push I/O buffer to a TxQ
*/
#define MC_CMD_LINK_PIOBUF 0x92
+#define MC_CMD_LINK_PIOBUF_MSGSET 0x92
#undef MC_CMD_0x92_PRIVILEGE_CTG
#define MC_CMD_0x92_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -16588,7 +18071,7 @@
/* Handle for allocated push I/O buffer. */
#define MC_CMD_LINK_PIOBUF_IN_PIOBUF_HANDLE_OFST 0
#define MC_CMD_LINK_PIOBUF_IN_PIOBUF_HANDLE_LEN 4
-/* Function Local Instance (VI) number. */
+/* Function Local Instance (VI) number which has a TxQ allocated to it. */
#define MC_CMD_LINK_PIOBUF_IN_TXQ_INSTANCE_OFST 4
#define MC_CMD_LINK_PIOBUF_IN_TXQ_INSTANCE_LEN 4
@@ -16601,6 +18084,7 @@
* Unlink a push I/O buffer from a TxQ
*/
#define MC_CMD_UNLINK_PIOBUF 0x93
+#define MC_CMD_UNLINK_PIOBUF_MSGSET 0x93
#undef MC_CMD_0x93_PRIVILEGE_CTG
#define MC_CMD_0x93_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -16620,6 +18104,7 @@
* allocate and initialise a v-switch.
*/
#define MC_CMD_VSWITCH_ALLOC 0x94
+#define MC_CMD_VSWITCH_ALLOC_MSGSET 0x94
#undef MC_CMD_0x94_PRIVILEGE_CTG
#define MC_CMD_0x94_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16667,6 +18152,7 @@
* de-allocate a v-switch.
*/
#define MC_CMD_VSWITCH_FREE 0x95
+#define MC_CMD_VSWITCH_FREE_MSGSET 0x95
#undef MC_CMD_0x95_PRIVILEGE_CTG
#define MC_CMD_0x95_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16688,6 +18174,7 @@
* not, then the command returns ENOENT).
*/
#define MC_CMD_VSWITCH_QUERY 0x63
+#define MC_CMD_VSWITCH_QUERY_MSGSET 0x63
#undef MC_CMD_0x63_PRIVILEGE_CTG
#define MC_CMD_0x63_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16707,6 +18194,7 @@
* allocate a v-port.
*/
#define MC_CMD_VPORT_ALLOC 0x96
+#define MC_CMD_VPORT_ALLOC_MSGSET 0x96
#undef MC_CMD_0x96_PRIVILEGE_CTG
#define MC_CMD_0x96_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16774,6 +18262,7 @@
* de-allocate a v-port.
*/
#define MC_CMD_VPORT_FREE 0x97
+#define MC_CMD_VPORT_FREE_MSGSET 0x97
#undef MC_CMD_0x97_PRIVILEGE_CTG
#define MC_CMD_0x97_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16793,6 +18282,7 @@
* allocate a v-adaptor.
*/
#define MC_CMD_VADAPTOR_ALLOC 0x98
+#define MC_CMD_VADAPTOR_ALLOC_MSGSET 0x98
#undef MC_CMD_0x98_PRIVILEGE_CTG
#define MC_CMD_0x98_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16841,6 +18331,7 @@
* de-allocate a v-adaptor.
*/
#define MC_CMD_VADAPTOR_FREE 0x99
+#define MC_CMD_VADAPTOR_FREE_MSGSET 0x99
#undef MC_CMD_0x99_PRIVILEGE_CTG
#define MC_CMD_0x99_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16860,6 +18351,7 @@
* assign a new MAC address to a v-adaptor.
*/
#define MC_CMD_VADAPTOR_SET_MAC 0x5d
+#define MC_CMD_VADAPTOR_SET_MAC_MSGSET 0x5d
#undef MC_CMD_0x5d_PRIVILEGE_CTG
#define MC_CMD_0x5d_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16882,6 +18374,7 @@
* read the MAC address assigned to a v-adaptor.
*/
#define MC_CMD_VADAPTOR_GET_MAC 0x5e
+#define MC_CMD_VADAPTOR_GET_MAC_MSGSET 0x5e
#undef MC_CMD_0x5e_PRIVILEGE_CTG
#define MC_CMD_0x5e_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16904,6 +18397,7 @@
* read some config of v-adaptor.
*/
#define MC_CMD_VADAPTOR_QUERY 0x61
+#define MC_CMD_VADAPTOR_QUERY_MSGSET 0x61
#undef MC_CMD_0x61_PRIVILEGE_CTG
#define MC_CMD_0x61_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16932,6 +18426,7 @@
* assign a port to a PCI function.
*/
#define MC_CMD_EVB_PORT_ASSIGN 0x9a
+#define MC_CMD_EVB_PORT_ASSIGN_MSGSET 0x9a
#undef MC_CMD_0x9a_PRIVILEGE_CTG
#define MC_CMD_0x9a_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16960,6 +18455,7 @@
* Assign the 64 bit region addresses.
*/
#define MC_CMD_RDWR_A64_REGIONS 0x9b
+#define MC_CMD_RDWR_A64_REGIONS_MSGSET 0x9b
#undef MC_CMD_0x9b_PRIVILEGE_CTG
#define MC_CMD_0x9b_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -16999,6 +18495,7 @@
* Allocate an Onload stack ID.
*/
#define MC_CMD_ONLOAD_STACK_ALLOC 0x9c
+#define MC_CMD_ONLOAD_STACK_ALLOC_MSGSET 0x9c
#undef MC_CMD_0x9c_PRIVILEGE_CTG
#define MC_CMD_0x9c_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -17021,6 +18518,7 @@
* Free an Onload stack ID.
*/
#define MC_CMD_ONLOAD_STACK_FREE 0x9d
+#define MC_CMD_ONLOAD_STACK_FREE_MSGSET 0x9d
#undef MC_CMD_0x9d_PRIVILEGE_CTG
#define MC_CMD_0x9d_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -17040,6 +18538,7 @@
* Allocate an RSS context.
*/
#define MC_CMD_RSS_CONTEXT_ALLOC 0x9e
+#define MC_CMD_RSS_CONTEXT_ALLOC_MSGSET 0x9e
#undef MC_CMD_0x9e_PRIVILEGE_CTG
#define MC_CMD_0x9e_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17140,6 +18639,7 @@
* Free an RSS context.
*/
#define MC_CMD_RSS_CONTEXT_FREE 0x9f
+#define MC_CMD_RSS_CONTEXT_FREE_MSGSET 0x9f
#undef MC_CMD_0x9f_PRIVILEGE_CTG
#define MC_CMD_0x9f_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17159,6 +18659,7 @@
* Set the Toeplitz hash key for an RSS context.
*/
#define MC_CMD_RSS_CONTEXT_SET_KEY 0xa0
+#define MC_CMD_RSS_CONTEXT_SET_KEY_MSGSET 0xa0
#undef MC_CMD_0xa0_PRIVILEGE_CTG
#define MC_CMD_0xa0_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17181,6 +18682,7 @@
* Get the Toeplitz hash key for an RSS context.
*/
#define MC_CMD_RSS_CONTEXT_GET_KEY 0xa1
+#define MC_CMD_RSS_CONTEXT_GET_KEY_MSGSET 0xa1
#undef MC_CMD_0xa1_PRIVILEGE_CTG
#define MC_CMD_0xa1_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17205,6 +18707,7 @@
* when the RSS context is allocated without specifying a table size.
*/
#define MC_CMD_RSS_CONTEXT_SET_TABLE 0xa2
+#define MC_CMD_RSS_CONTEXT_SET_TABLE_MSGSET 0xa2
#undef MC_CMD_0xa2_PRIVILEGE_CTG
#define MC_CMD_0xa2_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17229,6 +18732,7 @@
* when the RSS context is allocated without specifying a table size.
*/
#define MC_CMD_RSS_CONTEXT_GET_TABLE 0xa3
+#define MC_CMD_RSS_CONTEXT_GET_TABLE_MSGSET 0xa3
#undef MC_CMD_0xa3_PRIVILEGE_CTG
#define MC_CMD_0xa3_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17253,6 +18757,7 @@
* RSS_SELECTABLE_TABLE_SIZE bit is set in MC_CMD_GET_CAPABILITIES.
*/
#define MC_CMD_RSS_CONTEXT_WRITE_TABLE 0x13e
+#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_MSGSET 0x13e
#undef MC_CMD_0x13e_PRIVILEGE_CTG
#define MC_CMD_0x13e_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17299,6 +18804,7 @@
* RSS_SELECTABLE_TABLE_SIZE bit is set in MC_CMD_GET_CAPABILITIES.
*/
#define MC_CMD_RSS_CONTEXT_READ_TABLE 0x13f
+#define MC_CMD_RSS_CONTEXT_READ_TABLE_MSGSET 0x13f
#undef MC_CMD_0x13f_PRIVILEGE_CTG
#define MC_CMD_0x13f_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17338,6 +18844,7 @@
* Set various control flags for an RSS context.
*/
#define MC_CMD_RSS_CONTEXT_SET_FLAGS 0xe1
+#define MC_CMD_RSS_CONTEXT_SET_FLAGS_MSGSET 0xe1
#undef MC_CMD_0xe1_PRIVILEGE_CTG
#define MC_CMD_0xe1_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17404,6 +18911,7 @@
* Get various control flags for an RSS context.
*/
#define MC_CMD_RSS_CONTEXT_GET_FLAGS 0xe2
+#define MC_CMD_RSS_CONTEXT_GET_FLAGS_MSGSET 0xe2
#undef MC_CMD_0xe2_PRIVILEGE_CTG
#define MC_CMD_0xe2_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17471,6 +18979,7 @@
* Allocate a .1p mapping.
*/
#define MC_CMD_DOT1P_MAPPING_ALLOC 0xa4
+#define MC_CMD_DOT1P_MAPPING_ALLOC_MSGSET 0xa4
#undef MC_CMD_0xa4_PRIVILEGE_CTG
#define MC_CMD_0xa4_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -17504,6 +19013,7 @@
* Free a .1p mapping.
*/
#define MC_CMD_DOT1P_MAPPING_FREE 0xa5
+#define MC_CMD_DOT1P_MAPPING_FREE_MSGSET 0xa5
#undef MC_CMD_0xa5_PRIVILEGE_CTG
#define MC_CMD_0xa5_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -17523,6 +19033,7 @@
* Set the mapping table for a .1p mapping.
*/
#define MC_CMD_DOT1P_MAPPING_SET_TABLE 0xa6
+#define MC_CMD_DOT1P_MAPPING_SET_TABLE_MSGSET 0xa6
#undef MC_CMD_0xa6_PRIVILEGE_CTG
#define MC_CMD_0xa6_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -17547,6 +19058,7 @@
* Get the mapping table for a .1p mapping.
*/
#define MC_CMD_DOT1P_MAPPING_GET_TABLE 0xa7
+#define MC_CMD_DOT1P_MAPPING_GET_TABLE_MSGSET 0xa7
#undef MC_CMD_0xa7_PRIVILEGE_CTG
#define MC_CMD_0xa7_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -17571,6 +19083,7 @@
* Get Interrupt Vector config for this PF.
*/
#define MC_CMD_GET_VECTOR_CFG 0xbf
+#define MC_CMD_GET_VECTOR_CFG_MSGSET 0xbf
#undef MC_CMD_0xbf_PRIVILEGE_CTG
#define MC_CMD_0xbf_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17596,6 +19109,7 @@
* Set Interrupt Vector config for this PF.
*/
#define MC_CMD_SET_VECTOR_CFG 0xc0
+#define MC_CMD_SET_VECTOR_CFG_MSGSET 0xc0
#undef MC_CMD_0xc0_PRIVILEGE_CTG
#define MC_CMD_0xc0_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17623,6 +19137,7 @@
* Add a MAC address to a v-port
*/
#define MC_CMD_VPORT_ADD_MAC_ADDRESS 0xa8
+#define MC_CMD_VPORT_ADD_MAC_ADDRESS_MSGSET 0xa8
#undef MC_CMD_0xa8_PRIVILEGE_CTG
#define MC_CMD_0xa8_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17645,6 +19160,7 @@
* Delete a MAC address from a v-port
*/
#define MC_CMD_VPORT_DEL_MAC_ADDRESS 0xa9
+#define MC_CMD_VPORT_DEL_MAC_ADDRESS_MSGSET 0xa9
#undef MC_CMD_0xa9_PRIVILEGE_CTG
#define MC_CMD_0xa9_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17667,6 +19183,7 @@
* Delete a MAC address from a v-port
*/
#define MC_CMD_VPORT_GET_MAC_ADDRESSES 0xaa
+#define MC_CMD_VPORT_GET_MAC_ADDRESSES_MSGSET 0xaa
#undef MC_CMD_0xaa_PRIVILEGE_CTG
#define MC_CMD_0xaa_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17701,6 +19218,7 @@
* function will be reset before applying the changes.
*/
#define MC_CMD_VPORT_RECONFIGURE 0xeb
+#define MC_CMD_VPORT_RECONFIGURE_MSGSET 0xeb
#undef MC_CMD_0xeb_PRIVILEGE_CTG
#define MC_CMD_0xeb_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17756,6 +19274,7 @@
* read some config of v-port.
*/
#define MC_CMD_EVB_PORT_QUERY 0x62
+#define MC_CMD_EVB_PORT_QUERY_MSGSET 0x62
#undef MC_CMD_0x62_PRIVILEGE_CTG
#define MC_CMD_0x62_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17786,6 +19305,7 @@
* lifted in future.
*/
#define MC_CMD_DUMP_BUFTBL_ENTRIES 0xab
+#define MC_CMD_DUMP_BUFTBL_ENTRIES_MSGSET 0xab
#undef MC_CMD_0xab_PRIVILEGE_CTG
#define MC_CMD_0xab_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -17818,6 +19338,7 @@
* Set global RXDP configuration settings
*/
#define MC_CMD_SET_RXDP_CONFIG 0xc1
+#define MC_CMD_SET_RXDP_CONFIG_MSGSET 0xc1
#undef MC_CMD_0xc1_PRIVILEGE_CTG
#define MC_CMD_0xc1_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -17848,6 +19369,7 @@
* Get global RXDP configuration settings
*/
#define MC_CMD_GET_RXDP_CONFIG 0xc2
+#define MC_CMD_GET_RXDP_CONFIG_MSGSET 0xc2
#undef MC_CMD_0xc2_PRIVILEGE_CTG
#define MC_CMD_0xc2_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17874,6 +19396,7 @@
* Return the system and PDCPU clock frequencies.
*/
#define MC_CMD_GET_CLOCK 0xac
+#define MC_CMD_GET_CLOCK_MSGSET 0xac
#undef MC_CMD_0xac_PRIVILEGE_CTG
#define MC_CMD_0xac_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17896,6 +19419,7 @@
* Control the system and DPCPU clock frequencies. Changes are lost reboot.
*/
#define MC_CMD_SET_CLOCK 0xad
+#define MC_CMD_SET_CLOCK_MSGSET 0xad
#undef MC_CMD_0xad_PRIVILEGE_CTG
#define MC_CMD_0xad_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -17982,6 +19506,7 @@
* Send an arbitrary DPCPU message.
*/
#define MC_CMD_DPCPU_RPC 0xae
+#define MC_CMD_DPCPU_RPC_MSGSET 0xae
#undef MC_CMD_0xae_PRIVILEGE_CTG
#define MC_CMD_0xae_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -18100,6 +19625,7 @@
* Trigger an interrupt by prodding the BIU.
*/
#define MC_CMD_TRIGGER_INTERRUPT 0xe3
+#define MC_CMD_TRIGGER_INTERRUPT_MSGSET 0xe3
#undef MC_CMD_0xe3_PRIVILEGE_CTG
#define MC_CMD_0xe3_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -18119,6 +19645,7 @@
* Special operations to support (for now) shmboot.
*/
#define MC_CMD_SHMBOOT_OP 0xe6
+#define MC_CMD_SHMBOOT_OP_MSGSET 0xe6
#undef MC_CMD_0xe6_PRIVILEGE_CTG
#define MC_CMD_0xe6_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -18140,6 +19667,7 @@
* Read multiple 64bit words from capture block memory
*/
#define MC_CMD_CAP_BLK_READ 0xe7
+#define MC_CMD_CAP_BLK_READ_MSGSET 0xe7
#undef MC_CMD_0xe7_PRIVILEGE_CTG
#define MC_CMD_0xe7_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -18162,7 +19690,13 @@
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_OFST 0
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_LEN 8
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_LO_OFST 0
+#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_LO_LEN 4
+#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_LO_LBN 0
+#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_LO_WIDTH 32
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_HI_OFST 4
+#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_HI_LEN 4
+#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_HI_LBN 32
+#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_HI_WIDTH 32
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_MINNUM 1
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_MAXNUM 31
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_MAXNUM_MCDI2 127
@@ -18173,6 +19707,7 @@
* Take a dump of the DUT state
*/
#define MC_CMD_DUMP_DO 0xe8
+#define MC_CMD_DUMP_DO_MSGSET 0xe8
#undef MC_CMD_0xe8_PRIVILEGE_CTG
#define MC_CMD_0xe8_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -18253,6 +19788,7 @@
* Configure unsolicited dumps
*/
#define MC_CMD_DUMP_CONFIGURE_UNSOLICITED 0xe9
+#define MC_CMD_DUMP_CONFIGURE_UNSOLICITED_MSGSET 0xe9
#undef MC_CMD_0xe9_PRIVILEGE_CTG
#define MC_CMD_0xe9_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -18322,6 +19858,7 @@
* the parameter is out of range.
*/
#define MC_CMD_SET_PSU 0xea
+#define MC_CMD_SET_PSU_MSGSET 0xea
#undef MC_CMD_0xea_PRIVILEGE_CTG
#define MC_CMD_0xea_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -18348,6 +19885,7 @@
* Get function information. PF and VF number.
*/
#define MC_CMD_GET_FUNCTION_INFO 0xec
+#define MC_CMD_GET_FUNCTION_INFO_MSGSET 0xec
#undef MC_CMD_0xec_PRIVILEGE_CTG
#define MC_CMD_0xec_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -18370,6 +19908,7 @@
* reboot.
*/
#define MC_CMD_ENABLE_OFFLINE_BIST 0xed
+#define MC_CMD_ENABLE_OFFLINE_BIST_MSGSET 0xed
#undef MC_CMD_0xed_PRIVILEGE_CTG
#define MC_CMD_0xed_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -18388,6 +19927,7 @@
* forget.
*/
#define MC_CMD_UART_SEND_DATA 0xee
+#define MC_CMD_UART_SEND_DATA_MSGSET 0xee
#undef MC_CMD_0xee_PRIVILEGE_CTG
#define MC_CMD_0xee_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -18426,6 +19966,7 @@
* subject to change and not currently implemented.
*/
#define MC_CMD_UART_RECV_DATA 0xef
+#define MC_CMD_UART_RECV_DATA_MSGSET 0xef
#undef MC_CMD_0xef_PRIVILEGE_CTG
#define MC_CMD_0xef_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -18475,6 +20016,7 @@
* Read data programmed into the device One-Time-Programmable (OTP) Fuses
*/
#define MC_CMD_READ_FUSES 0xf0
+#define MC_CMD_READ_FUSES_MSGSET 0xf0
#undef MC_CMD_0xf0_PRIVILEGE_CTG
#define MC_CMD_0xf0_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -18510,6 +20052,7 @@
* Get or set KR Serdes RXEQ and TX Driver settings
*/
#define MC_CMD_KR_TUNE 0xf1
+#define MC_CMD_KR_TUNE_MSGSET 0xf1
#undef MC_CMD_0xf1_PRIVILEGE_CTG
#define MC_CMD_0xf1_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -19066,6 +20609,7 @@
* Get or set PCIE Serdes RXEQ and TX Driver settings
*/
#define MC_CMD_PCIE_TUNE 0xf2
+#define MC_CMD_PCIE_TUNE_MSGSET 0xf2
#undef MC_CMD_0xf2_PRIVILEGE_CTG
#define MC_CMD_0xf2_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -19323,6 +20867,7 @@
* - not used for V3 licensing
*/
#define MC_CMD_LICENSING 0xf3
+#define MC_CMD_LICENSING_MSGSET 0xf3
#undef MC_CMD_0xf3_PRIVILEGE_CTG
#define MC_CMD_0xf3_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19379,6 +20924,7 @@
* - V3 licensing (Medford)
*/
#define MC_CMD_LICENSING_V3 0xd0
+#define MC_CMD_LICENSING_V3_MSGSET 0xd0
#undef MC_CMD_0xd0_PRIVILEGE_CTG
#define MC_CMD_0xd0_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19429,7 +20975,13 @@
#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_OFST 24
#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_LEN 8
#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_LO_OFST 24
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_LO_LEN 4
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_LO_LBN 192
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_LO_WIDTH 32
#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_HI_OFST 28
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_HI_LEN 4
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_HI_LBN 224
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_HI_WIDTH 32
/* reserved for future use */
#define MC_CMD_LICENSING_V3_OUT_RESERVED_0_OFST 32
#define MC_CMD_LICENSING_V3_OUT_RESERVED_0_LEN 24
@@ -19437,7 +20989,13 @@
#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_OFST 56
#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_LEN 8
#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_LO_OFST 56
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_LO_LEN 4
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_LO_LBN 448
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_LO_WIDTH 32
#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_HI_OFST 60
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_HI_LEN 4
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_HI_LBN 480
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_HI_WIDTH 32
/* reserved for future use */
#define MC_CMD_LICENSING_V3_OUT_RESERVED_1_OFST 64
#define MC_CMD_LICENSING_V3_OUT_RESERVED_1_LEN 24
@@ -19449,6 +21007,7 @@
* partition - V3 licensing (Medford)
*/
#define MC_CMD_LICENSING_GET_ID_V3 0xd1
+#define MC_CMD_LICENSING_GET_ID_V3_MSGSET 0xd1
#undef MC_CMD_0xd1_PRIVILEGE_CTG
#define MC_CMD_0xd1_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19482,6 +21041,7 @@
* This will fail on a single-core system.
*/
#define MC_CMD_MC2MC_PROXY 0xf4
+#define MC_CMD_MC2MC_PROXY_MSGSET 0xf4
#undef MC_CMD_0xf4_PRIVILEGE_CTG
#define MC_CMD_0xf4_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19500,6 +21060,7 @@
* or a reboot of the MC.) Not used for V3 licensing
*/
#define MC_CMD_GET_LICENSED_APP_STATE 0xf5
+#define MC_CMD_GET_LICENSED_APP_STATE_MSGSET 0xf5
#undef MC_CMD_0xf5_PRIVILEGE_CTG
#define MC_CMD_0xf5_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19528,6 +21089,7 @@
* operation or a reboot of the MC.) Used for V3 licensing (Medford)
*/
#define MC_CMD_GET_LICENSED_V3_APP_STATE 0xd2
+#define MC_CMD_GET_LICENSED_V3_APP_STATE_MSGSET 0xd2
#undef MC_CMD_0xd2_PRIVILEGE_CTG
#define MC_CMD_0xd2_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19540,7 +21102,13 @@
#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_OFST 0
#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_LEN 8
#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_LO_OFST 0
+#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_LO_LEN 4
+#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_LO_LBN 0
+#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_LO_WIDTH 32
#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_HI_OFST 4
+#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_HI_LEN 4
+#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_HI_LBN 32
+#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_HI_WIDTH 32
/* MC_CMD_GET_LICENSED_V3_APP_STATE_OUT msgresponse */
#define MC_CMD_GET_LICENSED_V3_APP_STATE_OUT_LEN 4
@@ -19560,6 +21128,7 @@
* operation or a reboot of the MC.) Used for V3 licensing (Medford)
*/
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES 0xd3
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_MSGSET 0xd3
#undef MC_CMD_0xd3_PRIVILEGE_CTG
#define MC_CMD_0xd3_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19572,7 +21141,13 @@
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_OFST 0
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_LEN 8
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_LO_OFST 0
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_LO_LEN 4
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_LO_LBN 0
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_LO_WIDTH 32
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_HI_OFST 4
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_HI_LEN 4
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_HI_LBN 32
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_HI_WIDTH 32
/* MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT msgresponse */
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_LEN 8
@@ -19580,7 +21155,13 @@
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_OFST 0
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_LEN 8
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_LO_OFST 0
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_LO_LEN 4
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_LO_LBN 0
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_LO_WIDTH 32
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_HI_OFST 4
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_HI_LEN 4
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_HI_LBN 32
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_HI_WIDTH 32
/***********************************/
@@ -19589,6 +21170,7 @@
* licensing.
*/
#define MC_CMD_LICENSED_APP_OP 0xf6
+#define MC_CMD_LICENSED_APP_OP_MSGSET 0xf6
#undef MC_CMD_0xf6_PRIVILEGE_CTG
#define MC_CMD_0xf6_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19672,6 +21254,7 @@
* (Medford)
*/
#define MC_CMD_LICENSED_V3_VALIDATE_APP 0xd4
+#define MC_CMD_LICENSED_V3_VALIDATE_APP_MSGSET 0xd4
#undef MC_CMD_0xd4_PRIVILEGE_CTG
#define MC_CMD_0xd4_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19685,7 +21268,13 @@
#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_OFST 48
#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_LEN 8
#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_LO_OFST 48
+#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_LO_LEN 4
+#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_LO_LBN 384
+#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_LO_WIDTH 32
#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_HI_OFST 52
+#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_HI_LEN 4
+#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_HI_LBN 416
+#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_HI_WIDTH 32
/* MC_CMD_LICENSED_V3_VALIDATE_APP_OUT msgresponse */
#define MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_LEN 116
@@ -19725,6 +21314,7 @@
* Mask features - V3 licensing (Medford)
*/
#define MC_CMD_LICENSED_V3_MASK_FEATURES 0xd5
+#define MC_CMD_LICENSED_V3_MASK_FEATURES_MSGSET 0xd5
#undef MC_CMD_0xd5_PRIVILEGE_CTG
#define MC_CMD_0xd5_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -19735,7 +21325,13 @@
#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_OFST 0
#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_LEN 8
#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_LO_OFST 0
+#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_LO_LEN 4
+#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_LO_LBN 0
+#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_LO_WIDTH 32
#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_HI_OFST 4
+#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_HI_LEN 4
+#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_HI_LBN 32
+#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_HI_WIDTH 32
/* whether to turn on or turn off the masked features */
#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_FLAG_OFST 8
#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_FLAG_LEN 4
@@ -19757,6 +21353,7 @@
* erased when the adapter is power cycled
*/
#define MC_CMD_LICENSING_V3_TEMPORARY 0xd6
+#define MC_CMD_LICENSING_V3_TEMPORARY_MSGSET 0xd6
#undef MC_CMD_0xd6_PRIVILEGE_CTG
#define MC_CMD_0xd6_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -19815,7 +21412,13 @@
#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_OFST 4
#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_LEN 8
#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_LO_OFST 4
+#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_LO_LEN 4
+#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_LO_LBN 32
+#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_LO_WIDTH 32
#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_HI_OFST 8
+#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_HI_LEN 4
+#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_HI_LBN 64
+#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_HI_WIDTH 32
/***********************************/
@@ -19827,6 +21430,7 @@
* delivered to a specific queue, or a set of queues with RSS.
*/
#define MC_CMD_SET_PORT_SNIFF_CONFIG 0xf7
+#define MC_CMD_SET_PORT_SNIFF_CONFIG_MSGSET 0xf7
#undef MC_CMD_0xf7_PRIVILEGE_CTG
#define MC_CMD_0xf7_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -19870,6 +21474,7 @@
* the configuration.
*/
#define MC_CMD_GET_PORT_SNIFF_CONFIG 0xf8
+#define MC_CMD_GET_PORT_SNIFF_CONFIG_MSGSET 0xf8
#undef MC_CMD_0xf8_PRIVILEGE_CTG
#define MC_CMD_0xf8_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19908,6 +21513,7 @@
* Change configuration related to the parser-dispatcher subsystem.
*/
#define MC_CMD_SET_PARSER_DISP_CONFIG 0xf9
+#define MC_CMD_SET_PARSER_DISP_CONFIG_MSGSET 0xf9
#undef MC_CMD_0xf9_PRIVILEGE_CTG
#define MC_CMD_0xf9_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19953,6 +21559,7 @@
* Read configuration related to the parser-dispatcher subsystem.
*/
#define MC_CMD_GET_PARSER_DISP_CONFIG 0xfa
+#define MC_CMD_GET_PARSER_DISP_CONFIG_MSGSET 0xfa
#undef MC_CMD_0xfa_PRIVILEGE_CTG
#define MC_CMD_0xfa_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19997,6 +21604,7 @@
* dedicated as TX sniff receivers.
*/
#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG 0xfb
+#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG_MSGSET 0xfb
#undef MC_CMD_0xfb_PRIVILEGE_CTG
#define MC_CMD_0xfb_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -20037,6 +21645,7 @@
* the configuration.
*/
#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG 0xfc
+#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG_MSGSET 0xfc
#undef MC_CMD_0xfc_PRIVILEGE_CTG
#define MC_CMD_0xfc_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -20072,6 +21681,7 @@
* Per queue rx error stats.
*/
#define MC_CMD_RMON_STATS_RX_ERRORS 0xfe
+#define MC_CMD_RMON_STATS_RX_ERRORS_MSGSET 0xfe
#undef MC_CMD_0xfe_PRIVILEGE_CTG
#define MC_CMD_0xfe_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -20104,6 +21714,7 @@
* Find out about available PCIE resources
*/
#define MC_CMD_GET_PCIE_RESOURCE_INFO 0xfd
+#define MC_CMD_GET_PCIE_RESOURCE_INFO_MSGSET 0xfd
#undef MC_CMD_0xfd_PRIVILEGE_CTG
#define MC_CMD_0xfd_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -20143,6 +21754,7 @@
* Find out about available port modes
*/
#define MC_CMD_GET_PORT_MODES 0xff
+#define MC_CMD_GET_PORT_MODES_MSGSET 0xff
#undef MC_CMD_0xff_PRIVILEGE_CTG
#define MC_CMD_0xff_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -20199,6 +21811,7 @@
* the new port mode, as the override does not affect PF configuration.
*/
#define MC_CMD_OVERRIDE_PORT_MODE 0x137
+#define MC_CMD_OVERRIDE_PORT_MODE_MSGSET 0x137
#undef MC_CMD_0x137_PRIVILEGE_CTG
#define MC_CMD_0x137_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -20223,6 +21836,7 @@
* Sample voltages on the ATB
*/
#define MC_CMD_READ_ATB 0x100
+#define MC_CMD_READ_ATB_MSGSET 0x100
#undef MC_CMD_0x100_PRIVILEGE_CTG
#define MC_CMD_0x100_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20253,6 +21867,7 @@
* enums here must correspond with those in MC_CMD_WORKAROUND.
*/
#define MC_CMD_GET_WORKAROUNDS 0x59
+#define MC_CMD_GET_WORKAROUNDS_MSGSET 0x59
#undef MC_CMD_0x59_PRIVILEGE_CTG
#define MC_CMD_0x59_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -20290,6 +21905,7 @@
* Read/set privileges of an arbitrary PCIe function
*/
#define MC_CMD_PRIVILEGE_MASK 0x5a
+#define MC_CMD_PRIVILEGE_MASK_MSGSET 0x5a
#undef MC_CMD_0x5a_PRIVILEGE_CTG
#define MC_CMD_0x5a_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -20351,6 +21967,20 @@
#define MC_CMD_PRIVILEGE_MASK_IN_GRP_ADMIN_TSA_UNBOUND 0x8000
/* enum: Control the Match-Action Engine if present. See mcdi_mae.yml. */
#define MC_CMD_PRIVILEGE_MASK_IN_GRP_MAE 0x10000
+/* enum: This Function/client may call MC_CMD_CLIENT_ALLOC to create new
+ * dynamic client children of itself.
+ */
+#define MC_CMD_PRIVILEGE_MASK_IN_GRP_ALLOC_CLIENT 0x20000
+/* enum: A dynamic client with this privilege may perform all the same DMA
+ * operations as the function client from which it is descended.
+ */
+#define MC_CMD_PRIVILEGE_MASK_IN_GRP_FUNC_DMA 0x40000
+/* enum: A client with this privilege may perform DMA as any PCIe function on
+ * the device and to on-device DDR. It allows clients to use TX-DESC2CMPT-DESC
+ * descriptors, and to use TX-SEG-DESC and TX-MEM2MEM-DESC with an address
+ * space override (i.e. with the ADDR_SPC_EN bit set).
+ */
+#define MC_CMD_PRIVILEGE_MASK_IN_GRP_ARBITRARY_DMA 0x80000
/* enum: Set this bit to indicate that a new privilege mask is to be set,
* otherwise the command will only read the existing mask.
*/
@@ -20368,6 +21998,7 @@
* Read/set link state mode of a VF
*/
#define MC_CMD_LINK_STATE_MODE 0x5c
+#define MC_CMD_LINK_STATE_MODE_MSGSET 0x5c
#undef MC_CMD_0x5c_PRIVILEGE_CTG
#define MC_CMD_0x5c_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -20407,6 +22038,7 @@
* parameter to MC_CMD_INIT_RXQ.
*/
#define MC_CMD_GET_SNAPSHOT_LENGTH 0x101
+#define MC_CMD_GET_SNAPSHOT_LENGTH_MSGSET 0x101
#undef MC_CMD_0x101_PRIVILEGE_CTG
#define MC_CMD_0x101_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -20429,6 +22061,7 @@
* Additional fuse diagnostics
*/
#define MC_CMD_FUSE_DIAGS 0x102
+#define MC_CMD_FUSE_DIAGS_MSGSET 0x102
#undef MC_CMD_0x102_PRIVILEGE_CTG
#define MC_CMD_0x102_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20483,6 +22116,7 @@
* included in one of the masks provided.
*/
#define MC_CMD_PRIVILEGE_MODIFY 0x60
+#define MC_CMD_PRIVILEGE_MODIFY_MSGSET 0x60
#undef MC_CMD_0x60_PRIVILEGE_CTG
#define MC_CMD_0x60_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -20527,6 +22161,7 @@
* Read XPM memory
*/
#define MC_CMD_XPM_READ_BYTES 0x103
+#define MC_CMD_XPM_READ_BYTES_MSGSET 0x103
#undef MC_CMD_0x103_PRIVILEGE_CTG
#define MC_CMD_0x103_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -20559,6 +22194,7 @@
* Write XPM memory
*/
#define MC_CMD_XPM_WRITE_BYTES 0x104
+#define MC_CMD_XPM_WRITE_BYTES_MSGSET 0x104
#undef MC_CMD_0x104_PRIVILEGE_CTG
#define MC_CMD_0x104_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20591,6 +22227,7 @@
* Read XPM sector
*/
#define MC_CMD_XPM_READ_SECTOR 0x105
+#define MC_CMD_XPM_READ_SECTOR_MSGSET 0x105
#undef MC_CMD_0x105_PRIVILEGE_CTG
#define MC_CMD_0x105_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20631,6 +22268,7 @@
* Write XPM sector
*/
#define MC_CMD_XPM_WRITE_SECTOR 0x106
+#define MC_CMD_XPM_WRITE_SECTOR_MSGSET 0x106
#undef MC_CMD_0x106_PRIVILEGE_CTG
#define MC_CMD_0x106_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20677,6 +22315,7 @@
* Invalidate XPM sector
*/
#define MC_CMD_XPM_INVALIDATE_SECTOR 0x107
+#define MC_CMD_XPM_INVALIDATE_SECTOR_MSGSET 0x107
#undef MC_CMD_0x107_PRIVILEGE_CTG
#define MC_CMD_0x107_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20696,6 +22335,7 @@
* Blank-check XPM memory and report bad locations
*/
#define MC_CMD_XPM_BLANK_CHECK 0x108
+#define MC_CMD_XPM_BLANK_CHECK_MSGSET 0x108
#undef MC_CMD_0x108_PRIVILEGE_CTG
#define MC_CMD_0x108_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20733,6 +22373,7 @@
* Blank-check and repair XPM memory
*/
#define MC_CMD_XPM_REPAIR 0x109
+#define MC_CMD_XPM_REPAIR_MSGSET 0x109
#undef MC_CMD_0x109_PRIVILEGE_CTG
#define MC_CMD_0x109_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20756,6 +22397,7 @@
* be performed on an unprogrammed part.
*/
#define MC_CMD_XPM_DECODER_TEST 0x10a
+#define MC_CMD_XPM_DECODER_TEST_MSGSET 0x10a
#undef MC_CMD_0x10a_PRIVILEGE_CTG
#define MC_CMD_0x10a_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20776,6 +22418,7 @@
* first available location to use, or fail with ENOSPC if none left.
*/
#define MC_CMD_XPM_WRITE_TEST 0x10b
+#define MC_CMD_XPM_WRITE_TEST_MSGSET 0x10b
#undef MC_CMD_0x10b_PRIVILEGE_CTG
#define MC_CMD_0x10b_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20797,6 +22440,7 @@
* does match, otherwise it will respond with success before it jumps to IMEM.
*/
#define MC_CMD_EXEC_SIGNED 0x10c
+#define MC_CMD_EXEC_SIGNED_MSGSET 0x10c
#undef MC_CMD_0x10c_PRIVILEGE_CTG
#define MC_CMD_0x10c_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -20827,6 +22471,7 @@
* MC_CMD_EXEC_SIGNED.
*/
#define MC_CMD_PREPARE_SIGNED 0x10d
+#define MC_CMD_PREPARE_SIGNED_MSGSET 0x10d
#undef MC_CMD_0x10d_PRIVILEGE_CTG
#define MC_CMD_0x10d_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -20850,6 +22495,7 @@
* will be removed once it is regarded as stable.
*/
#define MC_CMD_SET_SECURITY_RULE 0x10f
+#define MC_CMD_SET_SECURITY_RULE_MSGSET 0x10f
#undef MC_CMD_0x10f_PRIVILEGE_CTG
#define MC_CMD_0x10f_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -21040,6 +22686,7 @@
* development. This note will be removed once it is regarded as stable.
*/
#define MC_CMD_RESET_SECURITY_RULES 0x110
+#define MC_CMD_RESET_SECURITY_RULES_MSGSET 0x110
#undef MC_CMD_0x110_PRIVILEGE_CTG
#define MC_CMD_0x110_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -21066,6 +22713,7 @@
* will be removed once it is regarded as stable.
*/
#define MC_CMD_GET_SECURITY_RULESET_VERSION 0x111
+#define MC_CMD_GET_SECURITY_RULESET_VERSION_MSGSET 0x111
#undef MC_CMD_0x111_PRIVILEGE_CTG
#define MC_CMD_0x111_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -21096,6 +22744,7 @@
* removed once it is regarded as stable.
*/
#define MC_CMD_SECURITY_RULE_COUNTER_ALLOC 0x112
+#define MC_CMD_SECURITY_RULE_COUNTER_ALLOC_MSGSET 0x112
#undef MC_CMD_0x112_PRIVILEGE_CTG
#define MC_CMD_0x112_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -21134,6 +22783,7 @@
* removed once it is regarded as stable.
*/
#define MC_CMD_SECURITY_RULE_COUNTER_FREE 0x113
+#define MC_CMD_SECURITY_RULE_COUNTER_FREE_MSGSET 0x113
#undef MC_CMD_0x113_PRIVILEGE_CTG
#define MC_CMD_0x113_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -21169,6 +22819,7 @@
* will be removed once it is regarded as stable.
*/
#define MC_CMD_SUBNET_MAP_SET_NODE 0x114
+#define MC_CMD_SUBNET_MAP_SET_NODE_MSGSET 0x114
#undef MC_CMD_0x114_PRIVILEGE_CTG
#define MC_CMD_0x114_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -21224,6 +22875,7 @@
* will be removed once it is regarded as stable.
*/
#define MC_CMD_REMOTE_PORTRANGE_MAP_SET_TREE 0x115
+#define MC_CMD_REMOTE_PORTRANGE_MAP_SET_TREE_MSGSET 0x115
#undef MC_CMD_0x115_PRIVILEGE_CTG
#define MC_CMD_0x115_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -21258,6 +22910,7 @@
* will be removed once it is regarded as stable.
*/
#define MC_CMD_LOCAL_PORTRANGE_MAP_SET_TREE 0x116
+#define MC_CMD_LOCAL_PORTRANGE_MAP_SET_TREE_MSGSET 0x116
#undef MC_CMD_0x116_PRIVILEGE_CTG
#define MC_CMD_0x116_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -21311,6 +22964,7 @@
* cause all functions to see a reset. (Available on Medford only.)
*/
#define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS 0x117
+#define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_MSGSET 0x117
#undef MC_CMD_0x117_PRIVILEGE_CTG
#define MC_CMD_0x117_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -21357,6 +23011,7 @@
* priority.
*/
#define MC_CMD_RX_BALANCING 0x118
+#define MC_CMD_RX_BALANCING_MSGSET 0x118
#undef MC_CMD_0x118_PRIVILEGE_CTG
#define MC_CMD_0x118_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -21386,6 +23041,7 @@
* info in respect to the binding protocol.
*/
#define MC_CMD_TSA_BIND 0x119
+#define MC_CMD_TSA_BIND_MSGSET 0x119
#undef MC_CMD_0x119_PRIVILEGE_CTG
#define MC_CMD_0x119_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -21951,6 +23607,7 @@
* OP_GET_CACHED_VERSION. All other sub-operations are prohibited.
*/
#define MC_CMD_MANAGE_SECURITY_RULESET_CACHE 0x11a
+#define MC_CMD_MANAGE_SECURITY_RULESET_CACHE_MSGSET 0x11a
#undef MC_CMD_0x11a_PRIVILEGE_CTG
#define MC_CMD_0x11a_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -22007,6 +23664,7 @@
* if the tag is already present.
*/
#define MC_CMD_NVRAM_PRIVATE_APPEND 0x11c
+#define MC_CMD_NVRAM_PRIVATE_APPEND_MSGSET 0x11c
#undef MC_CMD_0x11c_PRIVILEGE_CTG
#define MC_CMD_0x11c_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -22041,6 +23699,7 @@
* correctly at ATE.
*/
#define MC_CMD_XPM_VERIFY_CONTENTS 0x11b
+#define MC_CMD_XPM_VERIFY_CONTENTS_MSGSET 0x11b
#undef MC_CMD_0x11b_PRIVILEGE_CTG
#define MC_CMD_0x11b_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -22084,6 +23743,7 @@
* and TMR_RELOAD_ACT_NS).
*/
#define MC_CMD_SET_EVQ_TMR 0x120
+#define MC_CMD_SET_EVQ_TMR_MSGSET 0x120
#undef MC_CMD_0x120_PRIVILEGE_CTG
#define MC_CMD_0x120_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -22122,6 +23782,7 @@
* Query properties about the event queue timers.
*/
#define MC_CMD_GET_EVQ_TMR_PROPERTIES 0x122
+#define MC_CMD_GET_EVQ_TMR_PROPERTIES_MSGSET 0x122
#undef MC_CMD_0x122_PRIVILEGE_CTG
#define MC_CMD_0x122_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -22191,6 +23852,7 @@
* non used switch buffers.
*/
#define MC_CMD_ALLOCATE_TX_VFIFO_CP 0x11d
+#define MC_CMD_ALLOCATE_TX_VFIFO_CP_MSGSET 0x11d
#undef MC_CMD_0x11d_PRIVILEGE_CTG
#define MC_CMD_0x11d_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -22198,7 +23860,8 @@
/* MC_CMD_ALLOCATE_TX_VFIFO_CP_IN msgrequest */
#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_LEN 20
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_INSTANCE_OFST 0
#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_INSTANCE_LEN 4
@@ -22243,6 +23906,7 @@
* previously allocated common pools.
*/
#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO 0x11e
+#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_MSGSET 0x11e
#undef MC_CMD_0x11e_PRIVILEGE_CTG
#define MC_CMD_0x11e_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -22296,6 +23960,7 @@
* ready to be re-used.
*/
#define MC_CMD_TEARDOWN_TX_VFIFO_VF 0x11f
+#define MC_CMD_TEARDOWN_TX_VFIFO_VF_MSGSET 0x11f
#undef MC_CMD_0x11f_PRIVILEGE_CTG
#define MC_CMD_0x11f_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -22316,6 +23981,7 @@
* it ready to be re-used.
*/
#define MC_CMD_DEALLOCATE_TX_VFIFO_CP 0x121
+#define MC_CMD_DEALLOCATE_TX_VFIFO_CP_MSGSET 0x121
#undef MC_CMD_0x121_PRIVILEGE_CTG
#define MC_CMD_0x121_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -22344,6 +24010,7 @@
* or 0 if there has not been a previous rekey.
*/
#define MC_CMD_REKEY 0x123
+#define MC_CMD_REKEY_MSGSET 0x123
#undef MC_CMD_0x123_PRIVILEGE_CTG
#define MC_CMD_0x123_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -22368,6 +24035,7 @@
* not yet assigned.
*/
#define MC_CMD_SWITCH_GET_UNASSIGNED_BUFFERS 0x124
+#define MC_CMD_SWITCH_GET_UNASSIGNED_BUFFERS_MSGSET 0x124
#undef MC_CMD_0x124_PRIVILEGE_CTG
#define MC_CMD_0x124_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -22396,6 +24064,7 @@
* the required bits were not set.
*/
#define MC_CMD_SET_SECURITY_FUSES 0x126
+#define MC_CMD_SET_SECURITY_FUSES_MSGSET 0x126
#undef MC_CMD_0x126_PRIVILEGE_CTG
#define MC_CMD_0x126_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -22438,6 +24107,7 @@
* SF-117371-SW
*/
#define MC_CMD_TSA_INFO 0x127
+#define MC_CMD_TSA_INFO_MSGSET 0x127
#undef MC_CMD_0x127_PRIVILEGE_CTG
#define MC_CMD_0x127_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -22614,6 +24284,7 @@
* Doxbox reference SF-117371-SW
*/
#define MC_CMD_HOST_INFO 0x128
+#define MC_CMD_HOST_INFO_MSGSET 0x128
#undef MC_CMD_0x128_PRIVILEGE_CTG
#define MC_CMD_0x128_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -22681,6 +24352,7 @@
* section 'Adapter Information'
*/
#define MC_CMD_TSAN_INFO 0x129
+#define MC_CMD_TSAN_INFO_MSGSET 0x129
#undef MC_CMD_0x129_PRIVILEGE_CTG
#define MC_CMD_0x129_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -22780,6 +24452,7 @@
* TSA adapter statistics operations.
*/
#define MC_CMD_TSA_STATISTICS 0x130
+#define MC_CMD_TSA_STATISTICS_MSGSET 0x130
#undef MC_CMD_0x130_PRIVILEGE_CTG
#define MC_CMD_0x130_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -22884,14 +24557,26 @@
#define MC_TSA_STATISTICS_ENTRY_TX_STAT_OFST 0
#define MC_TSA_STATISTICS_ENTRY_TX_STAT_LEN 8
#define MC_TSA_STATISTICS_ENTRY_TX_STAT_LO_OFST 0
+#define MC_TSA_STATISTICS_ENTRY_TX_STAT_LO_LEN 4
+#define MC_TSA_STATISTICS_ENTRY_TX_STAT_LO_LBN 0
+#define MC_TSA_STATISTICS_ENTRY_TX_STAT_LO_WIDTH 32
#define MC_TSA_STATISTICS_ENTRY_TX_STAT_HI_OFST 4
+#define MC_TSA_STATISTICS_ENTRY_TX_STAT_HI_LEN 4
+#define MC_TSA_STATISTICS_ENTRY_TX_STAT_HI_LBN 32
+#define MC_TSA_STATISTICS_ENTRY_TX_STAT_HI_WIDTH 32
#define MC_TSA_STATISTICS_ENTRY_TX_STAT_LBN 0
#define MC_TSA_STATISTICS_ENTRY_TX_STAT_WIDTH 64
/* Rx statistics counter */
#define MC_TSA_STATISTICS_ENTRY_RX_STAT_OFST 8
#define MC_TSA_STATISTICS_ENTRY_RX_STAT_LEN 8
#define MC_TSA_STATISTICS_ENTRY_RX_STAT_LO_OFST 8
+#define MC_TSA_STATISTICS_ENTRY_RX_STAT_LO_LEN 4
+#define MC_TSA_STATISTICS_ENTRY_RX_STAT_LO_LBN 64
+#define MC_TSA_STATISTICS_ENTRY_RX_STAT_LO_WIDTH 32
#define MC_TSA_STATISTICS_ENTRY_RX_STAT_HI_OFST 12
+#define MC_TSA_STATISTICS_ENTRY_RX_STAT_HI_LEN 4
+#define MC_TSA_STATISTICS_ENTRY_RX_STAT_HI_LBN 96
+#define MC_TSA_STATISTICS_ENTRY_RX_STAT_HI_WIDTH 32
#define MC_TSA_STATISTICS_ENTRY_RX_STAT_LBN 64
#define MC_TSA_STATISTICS_ENTRY_RX_STAT_WIDTH 64
@@ -22904,6 +24589,7 @@
* installing TSA binding certificates. See SF-117631-TC.
*/
#define MC_CMD_ERASE_INITIAL_NIC_SECRET 0x131
+#define MC_CMD_ERASE_INITIAL_NIC_SECRET_MSGSET 0x131
#undef MC_CMD_0x131_PRIVILEGE_CTG
#define MC_CMD_0x131_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -22921,6 +24607,7 @@
* NIC for TSA binding.
*/
#define MC_CMD_TSA_CONFIG 0x64
+#define MC_CMD_TSA_CONFIG_MSGSET 0x64
#undef MC_CMD_0x64_PRIVILEGE_CTG
#define MC_CMD_0x64_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -23038,6 +24725,7 @@
* to a TSA adapter.
*/
#define MC_CMD_TSA_IPADDR 0x65
+#define MC_CMD_TSA_IPADDR_MSGSET 0x65
#undef MC_CMD_0x65_PRIVILEGE_CTG
#define MC_CMD_0x65_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -23089,7 +24777,13 @@
#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_OFST 8
#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_LEN 8
#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_LO_OFST 8
+#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_LO_LEN 4
+#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_LO_LBN 64
+#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_LO_WIDTH 32
#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_HI_OFST 12
+#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_HI_LEN 4
+#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_HI_LBN 96
+#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_HI_WIDTH 32
#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_MINNUM 1
#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_MAXNUM 30
#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_MAXNUM_MCDI2 126
@@ -23119,7 +24813,13 @@
#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_OFST 8
#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_LEN 8
#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_LO_OFST 8
+#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_LO_LEN 4
+#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_LO_LBN 64
+#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_LO_WIDTH 32
#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_HI_OFST 12
+#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_HI_LEN 4
+#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_HI_LBN 96
+#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_HI_WIDTH 32
#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_MINNUM 1
#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_MAXNUM 30
#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_MAXNUM_MCDI2 126
@@ -23135,6 +24835,7 @@
* disabled.
*/
#define MC_CMD_SECURE_NIC_INFO 0x132
+#define MC_CMD_SECURE_NIC_INFO_MSGSET 0x132
#undef MC_CMD_0x132_PRIVILEGE_CTG
#define MC_CMD_0x132_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -23228,6 +24929,7 @@
* parameters in request or response.
*/
#define MC_CMD_TSA_TEST 0x125
+#define MC_CMD_TSA_TEST_MSGSET 0x125
#undef MC_CMD_0x125_PRIVILEGE_CTG
#define MC_CMD_0x125_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -23249,6 +24951,7 @@
* rule-set transitions.
*/
#define MC_CMD_TSA_RULESET_OVERRIDE 0x12a
+#define MC_CMD_TSA_RULESET_OVERRIDE_MSGSET 0x12a
#undef MC_CMD_0x12a_PRIVILEGE_CTG
#define MC_CMD_0x12a_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -23281,6 +24984,7 @@
* Specific usage is determined by the TYPE field.
*/
#define MC_CMD_TSAC_REQUEST 0x12b
+#define MC_CMD_TSAC_REQUEST_MSGSET 0x12b
#undef MC_CMD_0x12b_PRIVILEGE_CTG
#define MC_CMD_0x12b_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -23305,6 +25009,7 @@
* Get the version of the SUC
*/
#define MC_CMD_SUC_VERSION 0x134
+#define MC_CMD_SUC_VERSION_MSGSET 0x134
#undef MC_CMD_0x134_PRIVILEGE_CTG
#define MC_CMD_0x134_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -23350,6 +25055,7 @@
* Operations to support manftest on SUC based systems.
*/
#define MC_CMD_SUC_MANFTEST 0x135
+#define MC_CMD_SUC_MANFTEST_MSGSET 0x135
#undef MC_CMD_0x135_PRIVILEGE_CTG
#define MC_CMD_0x135_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -23546,6 +25252,7 @@
* Request a certificate.
*/
#define MC_CMD_GET_CERTIFICATE 0x12c
+#define MC_CMD_GET_CERTIFICATE_MSGSET 0x12c
#undef MC_CMD_0x12c_PRIVILEGE_CTG
#define MC_CMD_0x12c_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -23620,6 +25327,7 @@
* Get a global value which applies to all PCI functions
*/
#define MC_CMD_GET_NIC_GLOBAL 0x12d
+#define MC_CMD_GET_NIC_GLOBAL_MSGSET 0x12d
#undef MC_CMD_0x12d_PRIVILEGE_CTG
#define MC_CMD_0x12d_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -23647,6 +25355,7 @@
* appropriate error otherwise (see key descriptions).
*/
#define MC_CMD_SET_NIC_GLOBAL 0x12e
+#define MC_CMD_SET_NIC_GLOBAL_MSGSET 0x12e
#undef MC_CMD_0x12e_PRIVILEGE_CTG
#define MC_CMD_0x12e_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -23694,6 +25403,7 @@
* firmware buffer for later extraction.
*/
#define MC_CMD_LTSSM_TRACE_POLL 0x12f
+#define MC_CMD_LTSSM_TRACE_POLL_MSGSET 0x12f
#undef MC_CMD_0x12f_PRIVILEGE_CTG
#define MC_CMD_0x12f_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -23731,7 +25441,13 @@
#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_OFST 8
#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_LEN 8
#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_LO_OFST 8
+#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_LO_LEN 4
+#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_LO_LBN 64
+#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_LO_WIDTH 32
#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_HI_OFST 12
+#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_HI_LEN 4
+#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_HI_LBN 96
+#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_HI_WIDTH 32
#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_MINNUM 0
#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_MAXNUM 30
#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_MAXNUM_MCDI2 126
@@ -23765,6 +25481,7 @@
* firmware variant.
*/
#define MC_CMD_TELEMETRY_ENABLE 0x138
+#define MC_CMD_TELEMETRY_ENABLE_MSGSET 0x138
#undef MC_CMD_0x138_PRIVILEGE_CTG
#define MC_CMD_0x138_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -23856,6 +25573,7 @@
* Reference - SF-120569-SW Telemetry Firmware Design.
*/
#define MC_CMD_TELEMETRY_CONFIG 0x139
+#define MC_CMD_TELEMETRY_CONFIG_MSGSET 0x139
#undef MC_CMD_0x139_PRIVILEGE_CTG
#define MC_CMD_0x139_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -23925,6 +25643,7 @@
* due to resource constraints, returns ENOSPC.
*/
#define MC_CMD_GET_RX_PREFIX_ID 0x13b
+#define MC_CMD_GET_RX_PREFIX_ID_MSGSET 0x13b
#undef MC_CMD_0x13b_PRIVILEGE_CTG
#define MC_CMD_0x13b_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -23935,7 +25654,13 @@
#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_OFST 0
#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_LEN 8
#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_LO_OFST 0
+#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_LO_LEN 4
+#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_LO_LBN 0
+#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_LO_WIDTH 32
#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_HI_OFST 4
+#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_HI_LEN 4
+#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_HI_LBN 32
+#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_HI_WIDTH 32
#define MC_CMD_GET_RX_PREFIX_ID_IN_LENGTH_OFST 0
#define MC_CMD_GET_RX_PREFIX_ID_IN_LENGTH_LBN 0
#define MC_CMD_GET_RX_PREFIX_ID_IN_LENGTH_WIDTH 1
@@ -24056,6 +25781,7 @@
* created with that prefix id
*/
#define MC_CMD_QUERY_RX_PREFIX_ID 0x13c
+#define MC_CMD_QUERY_RX_PREFIX_ID_MSGSET 0x13c
#undef MC_CMD_0x13c_PRIVILEGE_CTG
#define MC_CMD_0x13c_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24092,6 +25818,7 @@
* A command to perform various bundle-related operations on insecure cards.
*/
#define MC_CMD_BUNDLE 0x13d
+#define MC_CMD_BUNDLE_MSGSET 0x13d
#undef MC_CMD_0x13d_PRIVILEGE_CTG
#define MC_CMD_0x13d_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -24154,6 +25881,7 @@
* Read all VPD starting from a given address
*/
#define MC_CMD_GET_VPD 0x165
+#define MC_CMD_GET_VPD_MSGSET 0x165
#undef MC_CMD_0x165_PRIVILEGE_CTG
#define MC_CMD_0x165_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24185,6 +25913,7 @@
* Provide information about the NC-SI stack
*/
#define MC_CMD_GET_NCSI_INFO 0x167
+#define MC_CMD_GET_NCSI_INFO_MSGSET 0x167
#undef MC_CMD_0x167_PRIVILEGE_CTG
#define MC_CMD_0x167_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24256,6 +25985,7 @@
* System lockdown, when enabled firmware updates are blocked.
*/
#define MC_CMD_FIRMWARE_SET_LOCKDOWN 0x16f
+#define MC_CMD_FIRMWARE_SET_LOCKDOWN_MSGSET 0x16f
#undef MC_CMD_0x16f_PRIVILEGE_CTG
#define MC_CMD_0x16f_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -24278,6 +26008,7 @@
* documentation.
*/
#define MC_CMD_GET_TEST_FEATURES 0x1ac
+#define MC_CMD_GET_TEST_FEATURES_MSGSET 0x1ac
#undef MC_CMD_0x1ac_PRIVILEGE_CTG
#define MC_CMD_0x1ac_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24300,6 +26031,253 @@
#define MC_CMD_GET_TEST_FEATURE_OUT_TEST_FEATURES_MAXNUM 63
#define MC_CMD_GET_TEST_FEATURE_OUT_TEST_FEATURES_MAXNUM_MCDI2 255
+
+/***********************************/
+/* MC_CMD_FPGA
+ * A command to perform various fpga-related operations on platforms that
+ * include FPGAs. Note that some platforms may only support a subset of these
+ * operations.
+ */
+#define MC_CMD_FPGA 0x1bf
+#define MC_CMD_FPGA_MSGSET 0x1bf
+#undef MC_CMD_0x1bf_PRIVILEGE_CTG
+
+#define MC_CMD_0x1bf_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_FPGA_IN msgrequest */
+#define MC_CMD_FPGA_IN_LEN 4
+/* Sub-command code */
+#define MC_CMD_FPGA_IN_OP_OFST 0
+#define MC_CMD_FPGA_IN_OP_LEN 4
+/* enum: Get the FPGA version string. */
+#define MC_CMD_FPGA_IN_OP_GET_VERSION 0x0
+/* enum: Read bitmask of features supported in the FPGA image. */
+#define MC_CMD_FPGA_IN_OP_GET_CAPABILITIES 0x1
+/* enum: Perform a FPGA reset. */
+#define MC_CMD_FPGA_IN_OP_RESET 0x2
+/* enum: Set active flash device. */
+#define MC_CMD_FPGA_IN_OP_SELECT_FLASH 0x3
+/* enum: Get active flash device. */
+#define MC_CMD_FPGA_IN_OP_GET_ACTIVE_FLASH 0x4
+/* enum: Configure internal link i.e. the FPGA port facing the ASIC. */
+#define MC_CMD_FPGA_IN_OP_SET_INTERNAL_LINK 0x5
+/* enum: Read internal link configuration. */
+#define MC_CMD_FPGA_IN_OP_GET_INTERNAL_LINK 0x6
+
+/* MC_CMD_FPGA_OP_GET_VERSION_IN msgrequest: Get the FPGA version string. A
+ * free-format string is returned in response to this command. Any checks on
+ * supported FPGA operations are based on the response to
+ * MC_CMD_FPGA_OP_GET_CAPABILITIES.
+ */
+#define MC_CMD_FPGA_OP_GET_VERSION_IN_LEN 4
+/* Sub-command code. Must be OP_GET_VERSION */
+#define MC_CMD_FPGA_OP_GET_VERSION_IN_OP_OFST 0
+#define MC_CMD_FPGA_OP_GET_VERSION_IN_OP_LEN 4
+
+/* MC_CMD_FPGA_OP_GET_VERSION_OUT msgresponse: Returns the version string. */
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_LENMIN 0
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_LENMAX 252
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_LENMAX_MCDI2 1020
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_LEN(num) (0+1*(num))
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_VERSION_NUM(len) (((len)-0)/1)
+/* Null-terminated string containing version information. */
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_VERSION_OFST 0
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_VERSION_LEN 1
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_VERSION_MINNUM 0
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_VERSION_MAXNUM 252
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_VERSION_MAXNUM_MCDI2 1020
+
+/* MC_CMD_FPGA_OP_GET_CAPABILITIES_IN msgrequest: Read bitmask of features
+ * supported in the FPGA image.
+ */
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_IN_LEN 4
+/* Sub-command code. Must be OP_GET_CAPABILITIES */
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_IN_OP_OFST 0
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_IN_OP_LEN 4
+
+/* MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT msgresponse: Returns the version string.
+ */
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_LEN 4
+/* Bit-mask of supported features. */
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_CAPABILITIES_OFST 0
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_CAPABILITIES_LEN 4
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_MAC_OFST 0
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_MAC_LBN 0
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_MAC_WIDTH 1
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_MAE_OFST 0
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_MAE_LBN 1
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_MAE_WIDTH 1
+
+/* MC_CMD_FPGA_OP_RESET_IN msgrequest: Perform a FPGA reset operation where
+ * supported.
+ */
+#define MC_CMD_FPGA_OP_RESET_IN_LEN 4
+/* Sub-command code. Must be OP_RESET */
+#define MC_CMD_FPGA_OP_RESET_IN_OP_OFST 0
+#define MC_CMD_FPGA_OP_RESET_IN_OP_LEN 4
+
+/* MC_CMD_FPGA_OP_RESET_OUT msgresponse */
+#define MC_CMD_FPGA_OP_RESET_OUT_LEN 0
+
+/* MC_CMD_FPGA_OP_SELECT_FLASH_IN msgrequest: Set active FPGA flash device.
+ * Returns EINVAL if selected flash index does not exist on the platform under
+ * test.
+ */
+#define MC_CMD_FPGA_OP_SELECT_FLASH_IN_LEN 8
+/* Sub-command code. Must be OP_SELECT_FLASH */
+#define MC_CMD_FPGA_OP_SELECT_FLASH_IN_OP_OFST 0
+#define MC_CMD_FPGA_OP_SELECT_FLASH_IN_OP_LEN 4
+/* Flash device identifier. */
+#define MC_CMD_FPGA_OP_SELECT_FLASH_IN_FLASH_ID_OFST 4
+#define MC_CMD_FPGA_OP_SELECT_FLASH_IN_FLASH_ID_LEN 4
+/* Enum values, see field(s): */
+/* MC_CMD_FPGA_FLASH_INDEX */
+
+/* MC_CMD_FPGA_OP_SELECT_FLASH_OUT msgresponse */
+#define MC_CMD_FPGA_OP_SELECT_FLASH_OUT_LEN 0
+
+/* MC_CMD_FPGA_OP_GET_ACTIVE_FLASH_IN msgrequest: Get active FPGA flash device.
+ */
+#define MC_CMD_FPGA_OP_GET_ACTIVE_FLASH_IN_LEN 4
+/* Sub-command code. Must be OP_GET_ACTIVE_FLASH */
+#define MC_CMD_FPGA_OP_GET_ACTIVE_FLASH_IN_OP_OFST 0
+#define MC_CMD_FPGA_OP_GET_ACTIVE_FLASH_IN_OP_LEN 4
+
+/* MC_CMD_FPGA_OP_GET_ACTIVE_FLASH_OUT msgresponse: Returns flash identifier
+ * for current active flash.
+ */
+#define MC_CMD_FPGA_OP_GET_ACTIVE_FLASH_OUT_LEN 4
+/* Flash device identifier. */
+#define MC_CMD_FPGA_OP_GET_ACTIVE_FLASH_OUT_FLASH_ID_OFST 0
+#define MC_CMD_FPGA_OP_GET_ACTIVE_FLASH_OUT_FLASH_ID_LEN 4
+/* Enum values, see field(s): */
+/* MC_CMD_FPGA_FLASH_INDEX */
+
+/* MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN msgrequest: Configure FPGA internal
+ * port, facing the ASIC
+ */
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_LEN 12
+/* Sub-command code. Must be OP_SET_INTERNAL_LINK */
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_OP_OFST 0
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_OP_LEN 4
+/* Flags */
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_FLAGS_OFST 4
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_FLAGS_LEN 4
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_LINK_STATE_OFST 4
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_LINK_STATE_LBN 0
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_LINK_STATE_WIDTH 2
+/* enum: Unmodified, same as last state set by firmware */
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_AUTO 0x0
+/* enum: Configure link-up */
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_UP 0x1
+/* enum: Configure link-down */
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_DOWN 0x2
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_FLUSH_OFST 4
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_FLUSH_LBN 2
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_FLUSH_WIDTH 1
+/* Link speed to be applied on FPGA internal port MAC. */
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_SPEED_OFST 8
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_SPEED_LEN 4
+
+/* MC_CMD_FPGA_OP_SET_INTERNAL_LINK_OUT msgresponse */
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_OUT_LEN 0
+
+/* MC_CMD_FPGA_OP_GET_INTERNAL_LINK_IN msgrequest: Read FPGA internal port
+ * configuration and status
+ */
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_IN_LEN 4
+/* Sub-command code. Must be OP_GET_INTERNAL_LINK */
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_IN_OP_OFST 0
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_IN_OP_LEN 4
+
+/* MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT msgresponse: Response format for read
+ * FPGA internal port configuration and status
+ */
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT_LEN 8
+/* Flags */
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT_FLAGS_OFST 0
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT_FLAGS_LEN 4
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT_LINK_STATE_OFST 0
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT_LINK_STATE_LBN 0
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT_LINK_STATE_WIDTH 2
+/* Enum values, see field(s): */
+/* MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN/FLAGS */
+/* Link speed set on FPGA internal port MAC. */
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT_SPEED_OFST 4
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT_SPEED_LEN 4
+
+
+/***********************************/
+/* MC_CMD_EXTERNAL_MAE_GET_LINK_MODE
+ * This command is expected to be used on a U25 board with an MAE in the FPGA.
+ * It does not modify the operational state of the NIC. The modes are described
+ * in XN-200039-TC - U25 OVS packet formats.
+ */
+#define MC_CMD_EXTERNAL_MAE_GET_LINK_MODE 0x1c0
+#define MC_CMD_EXTERNAL_MAE_GET_LINK_MODE_MSGSET 0x1c0
+#undef MC_CMD_0x1c0_PRIVILEGE_CTG
+
+#define MC_CMD_0x1c0_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_EXTERNAL_MAE_GET_LINK_MODE_IN msgrequest */
+#define MC_CMD_EXTERNAL_MAE_GET_LINK_MODE_IN_LEN 0
+
+/* MC_CMD_EXTERNAL_MAE_GET_LINK_MODE_OUT msgresponse */
+#define MC_CMD_EXTERNAL_MAE_GET_LINK_MODE_OUT_LEN 4
+/* The current link mode */
+#define MC_CMD_EXTERNAL_MAE_GET_LINK_MODE_OUT_MODE_OFST 0
+#define MC_CMD_EXTERNAL_MAE_GET_LINK_MODE_OUT_MODE_LEN 4
+/* Enum values, see field(s): */
+/* MC_CMD_EXTERNAL_MAE_LINK_MODE */
+
+
+/***********************************/
+/* MC_CMD_EXTERNAL_MAE_SET_LINK_MODE
+ * This command is expected to be used on a U25 board with an MAE in the FPGA.
+ * The modes are described in XN-200039-TC - U25 OVS packet formats. This
+ * command will set the link between the FPGA and the X2 to the specified new
+ * mode. It will first enter bootstrap mode, make sure there are no packets in
+ * flight and then enter the requested mode. In order to make sure there are no
+ * packets in flight, it will flush the X2 TX path, the FPGA RX path from the
+ * X2, the FPGA TX path to the X2 and the X2 RX path. The driver is responsible
+ * for making sure there are no TX or RX descriptors posted on any TXQ or RXQ
+ * associated with the affected port before invoking this command. This command
+ * is run implicitly with MODE set to LEGACY when MC_CMD_DRV_ATTACH is
+ * executed.
+ */
+#define MC_CMD_EXTERNAL_MAE_SET_LINK_MODE 0x1c1
+#define MC_CMD_EXTERNAL_MAE_SET_LINK_MODE_MSGSET 0x1c1
+#undef MC_CMD_0x1c1_PRIVILEGE_CTG
+
+#define MC_CMD_0x1c1_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_EXTERNAL_MAE_SET_LINK_MODE_IN msgrequest */
+#define MC_CMD_EXTERNAL_MAE_SET_LINK_MODE_IN_LEN 4
+/* The new link mode. */
+#define MC_CMD_EXTERNAL_MAE_SET_LINK_MODE_IN_MODE_OFST 0
+#define MC_CMD_EXTERNAL_MAE_SET_LINK_MODE_IN_MODE_LEN 4
+/* Enum values, see field(s): */
+/* MC_CMD_EXTERNAL_MAE_LINK_MODE */
+
+/* MC_CMD_EXTERNAL_MAE_SET_LINK_MODE_OUT msgresponse */
+#define MC_CMD_EXTERNAL_MAE_SET_LINK_MODE_OUT_LEN 0
+
+/* CLIENT_HANDLE structuredef: A client is an abstract entity that can make
+ * requests of the device and that can own resources managed by the device.
+ * Examples of clients include PCIe functions and dynamic clients. A client
+ * handle is a 32b opaque value used to refer to a client. Further details can
+ * be found within XN-200418-TC.
+ */
+#define CLIENT_HANDLE_LEN 4
+#define CLIENT_HANDLE_OPAQUE_OFST 0
+#define CLIENT_HANDLE_OPAQUE_LEN 4
+/* enum: A client handle guaranteed never to refer to a real client. */
+#define CLIENT_HANDLE_NULL 0xffffffff
+/* enum: Used to refer to the calling client. */
+#define CLIENT_HANDLE_SELF 0xfffffffe
+#define CLIENT_HANDLE_OPAQUE_LBN 0
+#define CLIENT_HANDLE_OPAQUE_WIDTH 32
+
/* CLOCK_INFO structuredef: Information about a single hardware clock */
#define CLOCK_INFO_LEN 28
/* Enumeration that uniquely identifies the clock */
@@ -24333,7 +26311,13 @@
#define CLOCK_INFO_FREQUENCY_OFST 4
#define CLOCK_INFO_FREQUENCY_LEN 8
#define CLOCK_INFO_FREQUENCY_LO_OFST 4
+#define CLOCK_INFO_FREQUENCY_LO_LEN 4
+#define CLOCK_INFO_FREQUENCY_LO_LBN 32
+#define CLOCK_INFO_FREQUENCY_LO_WIDTH 32
#define CLOCK_INFO_FREQUENCY_HI_OFST 8
+#define CLOCK_INFO_FREQUENCY_HI_LEN 4
+#define CLOCK_INFO_FREQUENCY_HI_LBN 64
+#define CLOCK_INFO_FREQUENCY_HI_WIDTH 32
#define CLOCK_INFO_FREQUENCY_LBN 32
#define CLOCK_INFO_FREQUENCY_WIDTH 64
/* Human-readable ASCII name for clock, with NUL termination */
@@ -24343,12 +26327,62 @@
#define CLOCK_INFO_NAME_LBN 96
#define CLOCK_INFO_NAME_WIDTH 8
+/* SCHED_CREDIT_CHECK_RESULT structuredef */
+#define SCHED_CREDIT_CHECK_RESULT_LEN 16
+/* The instance of the scheduler. Refer to XN-200389-AW for the location of
+ * these schedulers in the hardware.
+ */
+#define SCHED_CREDIT_CHECK_RESULT_SCHED_INSTANCE_OFST 0
+#define SCHED_CREDIT_CHECK_RESULT_SCHED_INSTANCE_LEN 1
+#define SCHED_CREDIT_CHECK_RESULT_HUB_HOST_A 0x0 /* enum */
+#define SCHED_CREDIT_CHECK_RESULT_HUB_NET_A 0x1 /* enum */
+#define SCHED_CREDIT_CHECK_RESULT_HUB_B 0x2 /* enum */
+#define SCHED_CREDIT_CHECK_RESULT_HUB_HOST_C 0x3 /* enum */
+#define SCHED_CREDIT_CHECK_RESULT_HUB_NET_TX 0x4 /* enum */
+#define SCHED_CREDIT_CHECK_RESULT_HUB_HOST_D 0x5 /* enum */
+#define SCHED_CREDIT_CHECK_RESULT_HUB_REPLAY 0x6 /* enum */
+#define SCHED_CREDIT_CHECK_RESULT_DMAC_H2C 0x7 /* enum */
+#define SCHED_CREDIT_CHECK_RESULT_SCHED_INSTANCE_LBN 0
+#define SCHED_CREDIT_CHECK_RESULT_SCHED_INSTANCE_WIDTH 8
+/* The type of node that this result refers to. */
+#define SCHED_CREDIT_CHECK_RESULT_NODE_TYPE_OFST 1
+#define SCHED_CREDIT_CHECK_RESULT_NODE_TYPE_LEN 1
+/* enum: Destination node */
+#define SCHED_CREDIT_CHECK_RESULT_DEST 0x0
+/* enum: Source node */
+#define SCHED_CREDIT_CHECK_RESULT_SOURCE 0x1
+#define SCHED_CREDIT_CHECK_RESULT_NODE_TYPE_LBN 8
+#define SCHED_CREDIT_CHECK_RESULT_NODE_TYPE_WIDTH 8
+/* Level of node in scheduler hierarchy (level 0 is the bottom of the
+ * hierarchy, increasing towards the root node).
+ */
+#define SCHED_CREDIT_CHECK_RESULT_NODE_LEVEL_OFST 2
+#define SCHED_CREDIT_CHECK_RESULT_NODE_LEVEL_LEN 2
+#define SCHED_CREDIT_CHECK_RESULT_NODE_LEVEL_LBN 16
+#define SCHED_CREDIT_CHECK_RESULT_NODE_LEVEL_WIDTH 16
+/* Node index */
+#define SCHED_CREDIT_CHECK_RESULT_NODE_INDEX_OFST 4
+#define SCHED_CREDIT_CHECK_RESULT_NODE_INDEX_LEN 4
+#define SCHED_CREDIT_CHECK_RESULT_NODE_INDEX_LBN 32
+#define SCHED_CREDIT_CHECK_RESULT_NODE_INDEX_WIDTH 32
+/* The number of credits the node is expected to have. */
+#define SCHED_CREDIT_CHECK_RESULT_EXPECTED_CREDITS_OFST 8
+#define SCHED_CREDIT_CHECK_RESULT_EXPECTED_CREDITS_LEN 4
+#define SCHED_CREDIT_CHECK_RESULT_EXPECTED_CREDITS_LBN 64
+#define SCHED_CREDIT_CHECK_RESULT_EXPECTED_CREDITS_WIDTH 32
+/* The number of credits the node actually had. */
+#define SCHED_CREDIT_CHECK_RESULT_ACTUAL_CREDITS_OFST 12
+#define SCHED_CREDIT_CHECK_RESULT_ACTUAL_CREDITS_LEN 4
+#define SCHED_CREDIT_CHECK_RESULT_ACTUAL_CREDITS_LBN 96
+#define SCHED_CREDIT_CHECK_RESULT_ACTUAL_CREDITS_WIDTH 32
+
/***********************************/
/* MC_CMD_GET_CLOCKS_INFO
* Get information about the device clocks
*/
#define MC_CMD_GET_CLOCKS_INFO 0x166
+#define MC_CMD_GET_CLOCKS_INFO_MSGSET 0x166
#undef MC_CMD_0x166_PRIVILEGE_CTG
#define MC_CMD_0x166_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24387,6 +26421,7 @@
* returns ENOSPC if the caller's table is full.
*/
#define MC_CMD_VNIC_ENCAP_RULE_ADD 0x16d
+#define MC_CMD_VNIC_ENCAP_RULE_ADD_MSGSET 0x16d
#undef MC_CMD_0x16d_PRIVILEGE_CTG
#define MC_CMD_0x16d_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24469,6 +26504,7 @@
* if the input HANDLE doesn't correspond to an existing rule.
*/
#define MC_CMD_VNIC_ENCAP_RULE_REMOVE 0x16e
+#define MC_CMD_VNIC_ENCAP_RULE_REMOVE_MSGSET 0x16e
#undef MC_CMD_0x16e_PRIVILEGE_CTG
#define MC_CMD_0x16e_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24508,303 +26544,568 @@
#define UUID_NODE_LBN 80
#define UUID_NODE_WIDTH 48
-/* MC_CMD_DEVEL_DUMP_VI_ENTRY structuredef */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_LEN 28
-/* Type of entry */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_TYPE_OFST 0
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_TYPE_LEN 4
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QDMA_SW_C2H 0x0 /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QDMA_SW_H2C 0x1 /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QDMA_HW_C2H 0x2 /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QDMA_HW_H2C 0x3 /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QDMA_CR_C2H 0x4 /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QDMA_CR_H2C 0x5 /* enum */
-/* enum: First QDMA writeback/completion queue. Used for ef100, C2H VDPA and
- * plain virtio.
- */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QDMA_WRB 0x6
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QDMA_PFTCH 0x7 /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_DMAC_H2C_QTBL 0x100 /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_DMAC_C2H_QTBL 0x101 /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_DMAC_H2C_VIO 0x10a /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_TYPE_LBN 0
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_TYPE_WIDTH 32
-/* Internal QDMA/dmac queue number for this entry */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QUEUE_NUMBER_OFST 4
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QUEUE_NUMBER_LEN 4
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QUEUE_NUMBER_LBN 32
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QUEUE_NUMBER_WIDTH 32
-/* Size of entry data */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_SIZE_OFST 8
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_SIZE_LEN 4
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_SIZE_LBN 64
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_SIZE_WIDTH 32
-/* Offset of entry data from start of MCDI message response payload */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_OFFSET_OFST 12
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_OFFSET_LEN 4
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_OFFSET_LBN 96
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_OFFSET_WIDTH 32
-/* Absolute VI of the entry, or 0xffffffff if not available/applicable */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_ABS_VI_OFST 16
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_ABS_VI_LEN 4
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_NO_ABS_VI 0xffffffff /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_ABS_VI_LBN 128
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_ABS_VI_WIDTH 32
-/* Reserved */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_RESERVED_OFST 20
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_RESERVED_LEN 8
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_RESERVED_LO_OFST 20
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_RESERVED_HI_OFST 24
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_RESERVED_LBN 160
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_RESERVED_WIDTH 64
-
-
-/***********************************/
-/* MC_CMD_DEVEL_DUMP_VI
- * Dump various parts of the hardware's state for a VI.
- */
-#define MC_CMD_DEVEL_DUMP_VI 0x1b5
-#undef MC_CMD_0x1b5_PRIVILEGE_CTG
-
-#define MC_CMD_0x1b5_PRIVILEGE_CTG SRIOV_CTG_GENERAL
-
-/* MC_CMD_DEVEL_DUMP_VI_IN msgrequest */
-#define MC_CMD_DEVEL_DUMP_VI_IN_LEN 4
-/* Absolute queue id of queue to dump state for */
-#define MC_CMD_DEVEL_DUMP_VI_IN_QID_OFST 0
-#define MC_CMD_DEVEL_DUMP_VI_IN_QID_LEN 4
-
-/* MC_CMD_DEVEL_DUMP_VI_IN_V2 msgrequest */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_LEN 20
-/* Which queue to dump. The meaning of this field dependes on ADDRESS_MODE. */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_ID_OFST 0
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_ID_LEN 4
-/* Method of referring to the queue to dump */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_ADDRESS_MODE_OFST 4
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_ADDRESS_MODE_LEN 4
-/* enum: First field refers to queue number as understood by QDMA/DMAC hardware
- */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_QUEUE_NUMBER 0x0
-/* enum: First field refers to absolute VI number */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_ABS_VI 0x1
-/* enum: First field refers to function-relative VI number on the command's
- * function
+/* PLUGIN_EXTENSION structuredef: Used within MC_CMD_PLUGIN_GET_ALL to describe
+ * an individual extension.
+ */
+#define PLUGIN_EXTENSION_LEN 20
+#define PLUGIN_EXTENSION_UUID_OFST 0
+#define PLUGIN_EXTENSION_UUID_LEN 16
+#define PLUGIN_EXTENSION_UUID_LBN 0
+#define PLUGIN_EXTENSION_UUID_WIDTH 128
+#define PLUGIN_EXTENSION_ADMIN_GROUP_OFST 16
+#define PLUGIN_EXTENSION_ADMIN_GROUP_LEN 1
+#define PLUGIN_EXTENSION_ADMIN_GROUP_LBN 128
+#define PLUGIN_EXTENSION_ADMIN_GROUP_WIDTH 8
+#define PLUGIN_EXTENSION_FLAG_ENABLED_LBN 136
+#define PLUGIN_EXTENSION_FLAG_ENABLED_WIDTH 1
+#define PLUGIN_EXTENSION_RESERVED_LBN 137
+#define PLUGIN_EXTENSION_RESERVED_WIDTH 23
+
+/* DESC_ADDR_REGION structuredef: Describes a contiguous region of DESC_ADDR
+ * space that maps to a contiguous region of TRGT_ADDR space. Addresses
+ * DESC_ADDR in the range [DESC_ADDR_BASE:DESC_ADDR_BASE + 1 <<
+ * WINDOW_SIZE_LOG2) map to TRGT_ADDR = DESC_ADDR - DESC_ADDR_BASE +
+ * TRGT_ADDR_BASE.
+ */
+#define DESC_ADDR_REGION_LEN 32
+/* The start of the region in DESC_ADDR space. */
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_OFST 0
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_LEN 8
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_LO_OFST 0
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_LO_LEN 4
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_LO_LBN 0
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_LO_WIDTH 32
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_HI_OFST 4
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_HI_LEN 4
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_HI_LBN 32
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_HI_WIDTH 32
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_LBN 0
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_WIDTH 64
+/* The start of the region in TRGT_ADDR space. Drivers can set this via
+ * MC_CMD_SET_DESC_ADDR_REGIONS.
+ */
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_OFST 8
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_LEN 8
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_LO_OFST 8
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_LO_LEN 4
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_LO_LBN 64
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_LO_WIDTH 32
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_HI_OFST 12
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_HI_LEN 4
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_HI_LBN 96
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_HI_WIDTH 32
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_LBN 64
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_WIDTH 64
+/* The size of the region. */
+#define DESC_ADDR_REGION_WINDOW_SIZE_LOG2_OFST 16
+#define DESC_ADDR_REGION_WINDOW_SIZE_LOG2_LEN 4
+#define DESC_ADDR_REGION_WINDOW_SIZE_LOG2_LBN 128
+#define DESC_ADDR_REGION_WINDOW_SIZE_LOG2_WIDTH 32
+/* The alignment restriction on TRGT_ADDR. TRGT_ADDR values set by the driver
+ * must be a multiple of 1 << TRGT_ADDR_ALIGN_LOG2.
+ */
+#define DESC_ADDR_REGION_TRGT_ADDR_ALIGN_LOG2_OFST 20
+#define DESC_ADDR_REGION_TRGT_ADDR_ALIGN_LOG2_LEN 4
+#define DESC_ADDR_REGION_TRGT_ADDR_ALIGN_LOG2_LBN 160
+#define DESC_ADDR_REGION_TRGT_ADDR_ALIGN_LOG2_WIDTH 32
+#define DESC_ADDR_REGION_RSVD_OFST 24
+#define DESC_ADDR_REGION_RSVD_LEN 8
+#define DESC_ADDR_REGION_RSVD_LO_OFST 24
+#define DESC_ADDR_REGION_RSVD_LO_LEN 4
+#define DESC_ADDR_REGION_RSVD_LO_LBN 192
+#define DESC_ADDR_REGION_RSVD_LO_WIDTH 32
+#define DESC_ADDR_REGION_RSVD_HI_OFST 28
+#define DESC_ADDR_REGION_RSVD_HI_LEN 4
+#define DESC_ADDR_REGION_RSVD_HI_LBN 224
+#define DESC_ADDR_REGION_RSVD_HI_WIDTH 32
+#define DESC_ADDR_REGION_RSVD_LBN 192
+#define DESC_ADDR_REGION_RSVD_WIDTH 64
+
+
+/***********************************/
+/* MC_CMD_GET_DESC_ADDR_INFO
+ * Returns a description of the mapping from DESC_ADDR to TRGT_ADDR for the calling function's address space.
+ */
+#define MC_CMD_GET_DESC_ADDR_INFO 0x1b7
+#define MC_CMD_GET_DESC_ADDR_INFO_MSGSET 0x1b7
+#undef MC_CMD_0x1b7_PRIVILEGE_CTG
+
+#define MC_CMD_0x1b7_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_GET_DESC_ADDR_INFO_IN msgrequest */
+#define MC_CMD_GET_DESC_ADDR_INFO_IN_LEN 0
+
+/* MC_CMD_GET_DESC_ADDR_INFO_OUT msgresponse */
+#define MC_CMD_GET_DESC_ADDR_INFO_OUT_LEN 4
+/* The type of mapping; see SF-nnnnnn-xx (EF100 driver writer's guide, once
+ * written) for details of each type.
+ */
+#define MC_CMD_GET_DESC_ADDR_INFO_OUT_MAPPING_TYPE_OFST 0
+#define MC_CMD_GET_DESC_ADDR_INFO_OUT_MAPPING_TYPE_LEN 4
+/* enum: TRGT_ADDR = DESC_ADDR */
+#define MC_CMD_GET_DESC_ADDR_INFO_OUT_MAPPING_FLAT 0x0
+/* enum: DESC_ADDR has one or more regions that map into TRGT_ADDR. The base
+ * TRGT_ADDR for each region is programmable via MCDI.
+ */
+#define MC_CMD_GET_DESC_ADDR_INFO_OUT_MAPPING_REGIONED 0x1
+
+
+/***********************************/
+/* MC_CMD_GET_DESC_ADDR_REGIONS
+ * Returns a list of the DESC_ADDR regions for the calling function's address space. Only valid if that function's address space has the REGIONED mapping from DESC_ADDR to TRGT_ADDR.
+ */
+#define MC_CMD_GET_DESC_ADDR_REGIONS 0x1b8
+#define MC_CMD_GET_DESC_ADDR_REGIONS_MSGSET 0x1b8
+#undef MC_CMD_0x1b8_PRIVILEGE_CTG
+
+#define MC_CMD_0x1b8_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_GET_DESC_ADDR_REGIONS_IN msgrequest */
+#define MC_CMD_GET_DESC_ADDR_REGIONS_IN_LEN 0
+
+/* MC_CMD_GET_DESC_ADDR_REGIONS_OUT msgresponse */
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_LENMIN 32
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_LENMAX 224
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_LENMAX_MCDI2 992
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_LEN(num) (0+32*(num))
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_REGIONS_NUM(len) (((len)-0)/32)
+/* An array of DESC_ADDR_REGION strutures. The number of entries in the array
+ * indicates the number of available regions.
+ */
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_REGIONS_OFST 0
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_REGIONS_LEN 32
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_REGIONS_MINNUM 1
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_REGIONS_MAXNUM 7
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_REGIONS_MAXNUM_MCDI2 31
+
+
+/***********************************/
+/* MC_CMD_SET_DESC_ADDR_REGIONS
+ * Set the base TRGT_ADDR for a set of DESC_ADDR regions for the calling function's address space. Only valid if that function's address space had the REGIONED mapping from DESC_ADDR to TRGT_ADDR.
+ */
+#define MC_CMD_SET_DESC_ADDR_REGIONS 0x1b9
+#define MC_CMD_SET_DESC_ADDR_REGIONS_MSGSET 0x1b9
+#undef MC_CMD_0x1b9_PRIVILEGE_CTG
+
+#define MC_CMD_0x1b9_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_SET_DESC_ADDR_REGIONS_IN msgrequest */
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_LENMIN 16
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_LENMAX 248
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_LENMAX_MCDI2 1016
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_LEN(num) (8+8*(num))
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_NUM(len) (((len)-8)/8)
+/* A bitmask indicating which regions should have their base TRGT_ADDR updated.
+ * To update the base TRGR_ADDR for a DESC_ADDR region, the corresponding bit
+ * should be set to 1.
+ */
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_SET_REGION_MASK_OFST 0
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_SET_REGION_MASK_LEN 4
+/* Reserved field; must be set to zero. */
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_RSVD_OFST 4
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_RSVD_LEN 4
+/* An array of values used to updated the base TRGT_ADDR for DESC_ADDR regions.
+ * Array indices corresponding to region numbers (i.e. the array is sparse, and
+ * included entries for regions even if the corresponding SET_REGION_MASK bit
+ * is zero).
*/
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_REL_VI 0x2
-/* enum: First field refers to function-relative VI number on a specified
- * function
- */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_REL_VI_PROXY 0x3
-/* Type of VI. Not needed if ADDRESS_MODE is QUEUE_NUMBER. */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_VI_TYPE_OFST 8
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_VI_TYPE_LEN 4
-/* enum: Return only entries used for ef100 queues (a single hardware queue) */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_EF100 0x0
-/* enum: Return entries used for virtio (Potentially two hardware queues,
- * depending on hardware implementation)
- */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_VIRTIO 0x1
-/* Only if ADDRESS_MODE is REL_VI_PROXY. Interface of function the queue is on.
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_OFST 8
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_LEN 8
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_LO_OFST 8
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_LO_LEN 4
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_LO_LBN 64
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_LO_WIDTH 32
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_HI_OFST 12
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_HI_LEN 4
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_HI_LBN 96
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_HI_WIDTH 32
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_MINNUM 1
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_MAXNUM 30
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_MAXNUM_MCDI2 126
+
+/* MC_CMD_SET_DESC_ADDR_REGIONS_OUT msgresponse */
+#define MC_CMD_SET_DESC_ADDR_REGIONS_OUT_LEN 0
+
+
+/***********************************/
+/* MC_CMD_CLIENT_CMD
+ * Execute an arbitrary MCDI command on behalf of a different client. The
+ * consequences of the command (e.g. ownership of any resources created) apply
+ * to the indicated client rather than the function client which actually sent
+ * this command. All inherent permission checks are also performed on the
+ * indicated client. The given client must be a descendant of the requestor.
+ * The command to be proxied follows immediately afterward in the host buffer
+ * (or on the UART). Chaining multiple MC_CMD_CLIENT_CMD is unnecessary and not
+ * supported. New dynamic clients may be created with MC_CMD_CLIENT_ALLOC.
*/
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_PCIE_INTERFACE_OFST 12
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_PCIE_INTERFACE_LEN 4
-/* Enum values, see field(s): */
-/* DEVEL_PCIE_INTERFACE */
-/* Only if ADDRESS_MODE is REL_VI_PROXY. PF number of the function the queue is
- * on.
- */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_PF_OFST 16
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_PF_LEN 2
-/* Only if ADDRESS_MODE is REL_VI_PROXY. VF number of the function the queue is
- * on.
- */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_VF_OFST 18
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_VF_LEN 2
-/* enum: The function is on a PF, not a VF. */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_VF_NULL 0xffff
-
-/* MC_CMD_DEVEL_DUMP_VI_OUT msgresponse */
-#define MC_CMD_DEVEL_DUMP_VI_OUT_LENMIN 4
-#define MC_CMD_DEVEL_DUMP_VI_OUT_LENMAX 252
-#define MC_CMD_DEVEL_DUMP_VI_OUT_LENMAX_MCDI2 1012
-#define MC_CMD_DEVEL_DUMP_VI_OUT_LEN(num) (0+1*(num))
-#define MC_CMD_DEVEL_DUMP_VI_OUT_DATA_NUM(len) (((len)-0)/1)
-/* Number of dump entries returned */
-#define MC_CMD_DEVEL_DUMP_VI_OUT_NUM_ENTRIES_OFST 0
-#define MC_CMD_DEVEL_DUMP_VI_OUT_NUM_ENTRIES_LEN 4
-#define MC_CMD_DEVEL_DUMP_VI_OUT_DATA_OFST 0
-#define MC_CMD_DEVEL_DUMP_VI_OUT_DATA_LBN 0
-#define MC_CMD_DEVEL_DUMP_VI_OUT_DATA_WIDTH 8
-#define MC_CMD_DEVEL_DUMP_VI_OUT_DATA_MINNUM 0
-#define MC_CMD_DEVEL_DUMP_VI_OUT_DATA_MAXNUM 252
-#define MC_CMD_DEVEL_DUMP_VI_OUT_DATA_MAXNUM_MCDI2 1020
-/* Array of MC_CMD_DEVEL_DUMP_VI_ENTRY structures of length NUM_ENTRIES */
-#define MC_CMD_DEVEL_DUMP_VI_OUT_ENTRIES_OFST 4
-#define MC_CMD_DEVEL_DUMP_VI_OUT_ENTRIES_LEN 28
-#define MC_CMD_DEVEL_DUMP_VI_OUT_ENTRIES_MINNUM 0
-#define MC_CMD_DEVEL_DUMP_VI_OUT_ENTRIES_MAXNUM 8
-#define MC_CMD_DEVEL_DUMP_VI_OUT_ENTRIES_MAXNUM_MCDI2 36
-
-/* MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY structuredef */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_LEN 16
-/* What register this is */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_REG_OFST 0
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_REG_LEN 4
-/* enum: Catchall for registers that aren't in this enum. Nothing should be in
- * this long-term
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_UNKNOWN 0xffffffff
-/* enum: S2IC Converter Debug Packet Counter register. Informs number of
- * packets passed through Converter.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_H2C_S2IC_DBG_PKT_CNT 0x0
-/* enum: IC2S Converter Debug Packet Counter register. Informs number of
- * packets passed through Converter.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_C2H_IC2S_DBG_PKT_CNT 0x1
-/* enum: Event Controller Tx path Debug register. Count of Moderator Tx events,
- * not incl D2C, VirtIO, Dproxy.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TX_DEBUG 0x2
-/* enum: Event Controller Rx path Debug register. Count of Moderator Rx events.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_RX_DEBUG 0x3
-/* enum: Event Controller Debug register. Count of Total EVC events. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TOTAL_DEBUG 0x4
-/* enum: Same info as EVC_RX_DEBUG; collected at different location in design
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_RX_EF100_DEBUG 0x5
-/* enum: Same info as EVC_TX_DEBUG; collected at different location in design
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TX_EF100_DEBUG 0x6
-/* enum: Event Controller Debug register. Count of Tx VirtIO events. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TX_VIRTIO_DEBUG 0x7
-/* enum: Event Controller Debug register. Count of Tx Descriptor Proxy events.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TX_DPRXY_DEBUG 0x8
-/* enum: Event Controller Debug register. Count of Tx VirtQ Descriptor Proxy
- * events.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TX_VIRTQ_DPRXY_DEBUG 0x9
-/* enum: Event Controller Debug register. Count of Tx Descriptor-to-Completion
- * events.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TX_D2C_DEBUG 0xa
-/* enum: Event Controller Debug register. Count of Tx VirtIO Descriptor-to-
- * Completion events.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TX_VIRTQ_D2C_DEBUG 0xb
-/* enum: Event Controller Debug register. Count of Tx Timestamp events. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TX_TSTAMP_DEBUG 0xc
-/* enum: Event Controller Debug register. Count of Rx EvQ Timeout events. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_RX_EVQ_TIMEOUT_DEBUG 0xd
-/* enum: Event Controller Debug register. Count of MC events. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_MC_DEBUG 0xe
-/* enum: Event Controller Debug register. Count of EQDMA VirtIO Control events.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_EQDMA_VIO_CTL_DEBUG 0xf
-/* enum: Counter of QDMA Dropped C2H packets. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_DMAC_C2H_DROP_CTR_REG 0x10
-/* enum: Number of packets received by c host fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_C_H_PACKETS_IN_TBL 0x11
-/* enum: Number of packets sent by c host fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_C_H_PACKETS_OUT_TBL 0x12
-/* enum: Number of packets received by c plugin fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_C_P_PACKETS_IN_TBL 0x13
-/* enum: Number of packets received by b host fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_B_H_PACKETS_IN_TBL 0x14
-/* enum: Number of packets received by b net fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_B_N_PACKETS_IN_TBL 0x15
-/* enum: Number of packets received by b host fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_B_PH_PACKETS_IN_TBL 0x16
-/* enum: Number of packets received by b net fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_B_PN_PACKETS_IN_TBL 0x17
-/* enum: Number of packets sent by b net fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_B_PACKETS_OUT_TBL 0x18
-/* enum: Number of packets received by c net fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_C_N_PACKETS_IN_TBL 0x19
-/* enum: Number of packets sent by c net fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_C_N_PACKETS_OUT_TBL 0x1a
-/* enum: Number of packets received by ha fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_HA_PACKETS_IN_TBL 0x1b
-/* enum: Number of packets received by ha host shadow fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_HA_PH_PACKETS_IN_TBL 0x1c
-/* enum: Number of packets received by ha fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_HA_PACKETS_OUT_TBL 0x1d
-/* enum: Number of packets received by d hub fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_D_PACKETS_IN_TBL 0x1e
-/* enum: Number of packets received by d hub plugin fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_D_P_PACKETS_IN_TBL 0x1f
-/* enum: Number of packets received by d hub plugin fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_D_O_PACKETS_IN_TBL 0x20
-/* enum: Number of packets sent to dmac. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_D_PACKETS_OUT_TBL 0x21
-/* enum: Number of packets received by na fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_NA_PACKETS_IN_TBL 0x22
-/* enum: Number of packets dropped by na fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_NA_PACKETS_DROPPED_TBL 0x23
-/* enum: Number of packets sent by na fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_NA_PACKETS_OUT_TBL 0x24
-/* enum: Number of packets received by rp hub fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_RP_PACKETS_IN_TBL 0x25
-/* enum: Number of packets removed from fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_RP_PACKETS_OUT_TBL 0x26
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_REG_LBN 0
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_REG_WIDTH 32
-/* If REG is a table, the table row. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_ROW_OFST 4
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_ROW_LEN 4
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_ROW_LBN 32
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_ROW_WIDTH 32
-/* Address of the register (as seen by the MC) */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_ADDRESS_OFST 8
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_ADDRESS_LEN 4
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_ADDRESS_LBN 64
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_ADDRESS_WIDTH 32
-/* Value of the register */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_VALUE_OFST 12
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_VALUE_LEN 4
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_VALUE_LBN 96
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_VALUE_WIDTH 32
-
-
-/***********************************/
-/* MC_CMD_DEVEL_DUMP_RHEAD_REGS
- * Dump an assortment of hopefully useful riverhead debug registers
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS 0x1b6
-#undef MC_CMD_0x1b6_PRIVILEGE_CTG
-
-#define MC_CMD_0x1b6_PRIVILEGE_CTG SRIOV_CTG_GENERAL
-
-/* MC_CMD_DEVEL_DUMP_RHEAD_REGS_IN msgrequest */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_IN_LEN 4
-/* Which page of registers to retrieve. Page 0 always exists, later pages may
- * also exist if there are too many registers to fit in a single mcdi response.
- * NUM_PAGES in the response will tell you how many there are.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_IN_PAGE_OFST 0
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_IN_PAGE_LEN 4
-
-/* MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT msgresponse */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_LENMIN 8
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_LENMAX 248
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_LENMAX_MCDI2 1016
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_LEN(num) (8+16*(num))
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_REGS_NUM(len) (((len)-8)/16)
-/* Number of registers dumped in this response */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_NUM_REGS_OFST 0
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_NUM_REGS_LEN 4
-/* How many pages of registers are available to extract */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_NUM_PAGES_OFST 4
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_NUM_PAGES_LEN 4
-/* Array of MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY structs, one for each register
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_REGS_OFST 8
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_REGS_LEN 16
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_REGS_MINNUM 0
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_REGS_MAXNUM 15
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_REGS_MAXNUM_MCDI2 63
+#define MC_CMD_CLIENT_CMD 0x1ba
+#define MC_CMD_CLIENT_CMD_MSGSET 0x1ba
+#undef MC_CMD_0x1ba_PRIVILEGE_CTG
+
+#define MC_CMD_0x1ba_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_CLIENT_CMD_IN msgrequest */
+#define MC_CMD_CLIENT_CMD_IN_LEN 4
+/* The client as which to execute the following command. */
+#define MC_CMD_CLIENT_CMD_IN_CLIENT_ID_OFST 0
+#define MC_CMD_CLIENT_CMD_IN_CLIENT_ID_LEN 4
+
+/* MC_CMD_CLIENT_CMD_OUT msgresponse */
+#define MC_CMD_CLIENT_CMD_OUT_LEN 0
+
+
+/***********************************/
+/* MC_CMD_CLIENT_ALLOC
+ * Create a new client object. Clients are a system for delineating NIC
+ * resource ownership, such that groups of resources may be torn down as a
+ * unit. See also MC_CMD_CLIENT_CMD. See XN-200265-TC for background, concepts
+ * and a glossary. Clients created by this command are known as "dynamic
+ * clients". The newly-created client is a child of the client which sent this
+ * command. The caller must have the GRP_ALLOC_CLIENT privilege. The new client
+ * initially has no permission to do anything; see
+ * MC_CMD_DEVEL_CLIENT_PRIVILEGE_MODIFY.
+ */
+#define MC_CMD_CLIENT_ALLOC 0x1bb
+#define MC_CMD_CLIENT_ALLOC_MSGSET 0x1bb
+#undef MC_CMD_0x1bb_PRIVILEGE_CTG
+
+#define MC_CMD_0x1bb_PRIVILEGE_CTG SRIOV_CTG_ALLOC_CLIENT
+
+/* MC_CMD_CLIENT_ALLOC_IN msgrequest */
+#define MC_CMD_CLIENT_ALLOC_IN_LEN 0
+
+/* MC_CMD_CLIENT_ALLOC_OUT msgresponse */
+#define MC_CMD_CLIENT_ALLOC_OUT_LEN 4
+/* The ID of the new client object which has been created. */
+#define MC_CMD_CLIENT_ALLOC_OUT_CLIENT_ID_OFST 0
+#define MC_CMD_CLIENT_ALLOC_OUT_CLIENT_ID_LEN 4
+
+
+/***********************************/
+/* MC_CMD_CLIENT_FREE
+ * Destroy and release an existing client object. All resources owned by that
+ * client (including its child clients, and thus all resources owned by the
+ * entire family tree) are freed.
+ */
+#define MC_CMD_CLIENT_FREE 0x1bc
+#define MC_CMD_CLIENT_FREE_MSGSET 0x1bc
+#undef MC_CMD_0x1bc_PRIVILEGE_CTG
+
+#define MC_CMD_0x1bc_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_CLIENT_FREE_IN msgrequest */
+#define MC_CMD_CLIENT_FREE_IN_LEN 4
+/* The ID of the client to be freed. This client must be a descendant of the
+ * requestor. A client cannot free itself.
+ */
+#define MC_CMD_CLIENT_FREE_IN_CLIENT_ID_OFST 0
+#define MC_CMD_CLIENT_FREE_IN_CLIENT_ID_LEN 4
+
+/* MC_CMD_CLIENT_FREE_OUT msgresponse */
+#define MC_CMD_CLIENT_FREE_OUT_LEN 0
+
+
+/***********************************/
+/* MC_CMD_SET_VI_USER
+ * Assign partial rights over this VI to another client. VIs have an 'owner'
+ * and a 'user'. The owner is the client which allocated the VI
+ * (MC_CMD_ALLOC_VIS) and cannot be changed. The user is the client which has
+ * permission to create queues and other resources on that VI. Initially
+ * user==owner, but the user can be changed by this command; the resources thus
+ * created are then owned by the user-client. Only the VI owner can call this
+ * command, and the request will fail if there are any outstanding child
+ * resources (e.g. queues) currently allocated from this VI.
+ */
+#define MC_CMD_SET_VI_USER 0x1be
+#define MC_CMD_SET_VI_USER_MSGSET 0x1be
+#undef MC_CMD_0x1be_PRIVILEGE_CTG
+
+#define MC_CMD_0x1be_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_SET_VI_USER_IN msgrequest */
+#define MC_CMD_SET_VI_USER_IN_LEN 8
+/* Function-relative VI number to modify. */
+#define MC_CMD_SET_VI_USER_IN_INSTANCE_OFST 0
+#define MC_CMD_SET_VI_USER_IN_INSTANCE_LEN 4
+/* Client ID to become the new user. This must be a descendant of the owning
+ * client, the owning client itself, or the special value MC_CMD_CLIENT_ID_SELF
+ * which is synonymous with the owning client.
+ */
+#define MC_CMD_SET_VI_USER_IN_CLIENT_ID_OFST 4
+#define MC_CMD_SET_VI_USER_IN_CLIENT_ID_LEN 4
+
+/* MC_CMD_SET_VI_USER_OUT msgresponse */
+#define MC_CMD_SET_VI_USER_OUT_LEN 0
+
+
+/***********************************/
+/* MC_CMD_GET_CLIENT_MAC_ADDRESSES
+ * A device reports a set of MAC addresses for each client to use, known as the
+ * "permanent MAC addresses". Those MAC addresses are provided by the client's
+ * administrator, e.g. via MC_CMD_SET_CLIENT_MAC_ADDRESSES, and are intended as
+ * a hint to that client which MAC address its administrator would like to use
+ * to identity itself. This API exists solely to allow communication of MAC
+ * address from administrator to adminstree, and has no inherent interaction
+ * with switching within the device. There is no guarantee that a client will
+ * be able to send traffic with a source MAC address taken from the list of MAC
+ * address reported, nor is there a guarantee that a client will be able to
+ * resource traffic with a destination MAC taken from the list of MAC
+ * addresses. Likewise, there is no guarantee that a client will not be able to
+ * use a MAC address not present in the list. Restrictions on switching are
+ * controlled either through the EVB API if operating in EVB mode, or via MAE
+ * rules if host software is directly managing the MAE. In order to allow
+ * tenants to use this API whilst a provider is using the EVB API, the MAC
+ * addresses reported by MC_CMD_GET_CLIENT_MAC_ADDRESSES will be augmented with
+ * any MAC addresses associated with the vPort assigned to the caller. In order
+ * to allow tenants to use the EVB API whilst a provider is using this API, if
+ * a client queries the MAC addresses for a vPort using the host_evb_port_id
+ * EVB_PORT_ASSIGNED, that list of MAC addresses will be augmented with the MAC
+ * addresses assigned to the calling client. This query can either be explicit
+ * (i.e. MC_CMD_VPORT_GET_MAC_ADDRESSES) or implicit (e.g. creation of a
+ * vAdaptor with a NULL/automatic MAC address). Changing the MAC address on a
+ * vAdaptor only affects VNIC steering filters; it has no effect on the MAC
+ * addresses assigned to the vAdaptor's owner. VirtIO clients behave as EVB
+ * clients. On VirtIO device reset, a vAdaptor is created with an automatic MAC
+ * address. Querying the VirtIO device's MAC address queries the underlying
+ * vAdaptor's MAC address. Setting the VirtIO device's MAC address sets the
+ * underlying vAdaptor's MAC addresses.
+ */
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES 0x1c4
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_MSGSET 0x1c4
+#undef MC_CMD_0x1c4_PRIVILEGE_CTG
+
+#define MC_CMD_0x1c4_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_GET_CLIENT_MAC_ADDRESSES_IN msgrequest */
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_IN_LEN 4
+/* A handle for the client for whom MAC address should be obtained. Use
+ * CLIENT_HANDLE_SELF to obtain the MAC addresses assigned to the calling
+ * client.
+ */
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_IN_CLIENT_HANDLE_OFST 0
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_IN_CLIENT_HANDLE_LEN 4
+
+/* MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT msgresponse */
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_LENMIN 0
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_LENMAX 252
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_LENMAX_MCDI2 1020
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_LEN(num) (0+6*(num))
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_MAC_ADDRS_NUM(len) (((len)-0)/6)
+/* An array of MAC addresses assigned to the client. */
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_MAC_ADDRS_OFST 0
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_MAC_ADDRS_LEN 6
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_MAC_ADDRS_MINNUM 0
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_MAC_ADDRS_MAXNUM 42
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_MAC_ADDRS_MAXNUM_MCDI2 170
+
+
+/***********************************/
+/* MC_CMD_SET_CLIENT_MAC_ADDRESSES
+ * Set the permanent MAC addresses for a client. The caller must by an
+ * administrator of the target client. See MC_CMD_GET_CLIENT_MAC_ADDRESSES for
+ * additional detail.
+ */
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES 0x1c5
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_MSGSET 0x1c5
+#undef MC_CMD_0x1c5_PRIVILEGE_CTG
+
+#define MC_CMD_0x1c5_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN msgrequest */
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_LENMIN 4
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_LENMAX 250
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_LENMAX_MCDI2 1018
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_LEN(num) (4+6*(num))
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_MAC_ADDRS_NUM(len) (((len)-4)/6)
+/* A handle for the client for whom MAC addresses should be set */
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_CLIENT_HANDLE_OFST 0
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_CLIENT_HANDLE_LEN 4
+/* An array of MAC addresses to assign to the client. */
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_MAC_ADDRS_OFST 4
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_MAC_ADDRS_LEN 6
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_MAC_ADDRS_MINNUM 0
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_MAC_ADDRS_MAXNUM 41
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_MAC_ADDRS_MAXNUM_MCDI2 169
+
+/* MC_CMD_SET_CLIENT_MAC_ADDRESSES_OUT msgresponse */
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_OUT_LEN 0
+
+
+/***********************************/
+/* MC_CMD_GET_BOARD_ATTR
+ * Retrieve physical build-level board attributes as configured at
+ * manufacturing stage. Fields originate from EEPROM and per-platform constants
+ * in firmware. Fields are used in development to identify/ differentiate
+ * boards based on build levels/parameters, and also in manufacturing to cross
+ * check "what was programmed in manufacturing" is same as "what firmware
+ * thinks has been programmed" as there are two layers to translation within
+ * firmware before the attributes reach this MCDI handler. Some parameters are
+ * retrieved as part of other commands and therefore not replicated here. See
+ * GET_VERSION_OUT.
+ */
+#define MC_CMD_GET_BOARD_ATTR 0x1c6
+#define MC_CMD_GET_BOARD_ATTR_MSGSET 0x1c6
+#undef MC_CMD_0x1c6_PRIVILEGE_CTG
+
+#define MC_CMD_0x1c6_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_GET_BOARD_ATTR_IN msgrequest */
+#define MC_CMD_GET_BOARD_ATTR_IN_LEN 0
+
+/* MC_CMD_GET_BOARD_ATTR_OUT msgresponse */
+#define MC_CMD_GET_BOARD_ATTR_OUT_LEN 16
+/* Defines board capabilities and validity of attributes returned in this
+ * response-message.
+ */
+#define MC_CMD_GET_BOARD_ATTR_OUT_FLAGS_OFST 0
+#define MC_CMD_GET_BOARD_ATTR_OUT_FLAGS_LEN 4
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_FAN_OFST 0
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_FAN_LBN 0
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_FAN_WIDTH 1
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_SOC_OFST 0
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_SOC_LBN 1
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_SOC_WIDTH 1
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_AUX_POWER_OFST 0
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_AUX_POWER_LBN 2
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_AUX_POWER_WIDTH 1
+#define MC_CMD_GET_BOARD_ATTR_OUT_ATTRIBUTES_OFST 4
+#define MC_CMD_GET_BOARD_ATTR_OUT_ATTRIBUTES_LEN 4
+#define MC_CMD_GET_BOARD_ATTR_OUT_SOC_EE_OFST 4
+#define MC_CMD_GET_BOARD_ATTR_OUT_SOC_EE_LBN 0
+#define MC_CMD_GET_BOARD_ATTR_OUT_SOC_EE_WIDTH 1
+#define MC_CMD_GET_BOARD_ATTR_OUT_SUC_EE_OFST 4
+#define MC_CMD_GET_BOARD_ATTR_OUT_SUC_EE_LBN 1
+#define MC_CMD_GET_BOARD_ATTR_OUT_SUC_EE_WIDTH 1
+#define MC_CMD_GET_BOARD_ATTR_OUT_FPGA_VOLTAGES_SUPPORTED_OFST 4
+#define MC_CMD_GET_BOARD_ATTR_OUT_FPGA_VOLTAGES_SUPPORTED_LBN 16
+#define MC_CMD_GET_BOARD_ATTR_OUT_FPGA_VOLTAGES_SUPPORTED_WIDTH 8
+/* enum: The FPGA voltage on the adapter can be set to low */
+#define MC_CMD_FPGA_VOLTAGE_LOW 0x0
+/* enum: The FPGA voltage on the adapter can be set to regular */
+#define MC_CMD_FPGA_VOLTAGE_REG 0x1
+/* enum: The FPGA voltage on the adapter can be set to high */
+#define MC_CMD_FPGA_VOLTAGE_HIGH 0x2
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_COUNT_OFST 4
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_COUNT_LBN 24
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_COUNT_WIDTH 8
+/* An array of cage types on the board */
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_OFST 8
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_LEN 1
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_NUM 8
+/* enum: The cages are not known */
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_UNKNOWN 0x0
+/* enum: The cages are SFP/SFP+ */
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_SFP 0x1
+/* enum: The cages are QSFP/QSFP+ */
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_QSFP 0x2
+
+
+/***********************************/
+/* MC_CMD_GET_SOC_STATE
+ * Retrieve current state of the System-on-Chip. This command is valid when
+ * MC_CMD_GET_BOARD_ATTR:HAS_SOC is set.
+ */
+#define MC_CMD_GET_SOC_STATE 0x1c7
+#define MC_CMD_GET_SOC_STATE_MSGSET 0x1c7
+#undef MC_CMD_0x1c7_PRIVILEGE_CTG
+
+#define MC_CMD_0x1c7_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_GET_SOC_STATE_IN msgrequest */
+#define MC_CMD_GET_SOC_STATE_IN_LEN 0
+
+/* MC_CMD_GET_SOC_STATE_OUT msgresponse */
+#define MC_CMD_GET_SOC_STATE_OUT_LEN 12
+/* Status flags for the SoC */
+#define MC_CMD_GET_SOC_STATE_OUT_FLAGS_OFST 0
+#define MC_CMD_GET_SOC_STATE_OUT_FLAGS_LEN 4
+#define MC_CMD_GET_SOC_STATE_OUT_SHOULD_THROTTLE_OFST 0
+#define MC_CMD_GET_SOC_STATE_OUT_SHOULD_THROTTLE_LBN 0
+#define MC_CMD_GET_SOC_STATE_OUT_SHOULD_THROTTLE_WIDTH 1
+#define MC_CMD_GET_SOC_STATE_OUT_OS_RECOVERY_REQUIRED_OFST 0
+#define MC_CMD_GET_SOC_STATE_OUT_OS_RECOVERY_REQUIRED_LBN 1
+#define MC_CMD_GET_SOC_STATE_OUT_OS_RECOVERY_REQUIRED_WIDTH 1
+#define MC_CMD_GET_SOC_STATE_OUT_WDT_FIRED_OFST 0
+#define MC_CMD_GET_SOC_STATE_OUT_WDT_FIRED_LBN 2
+#define MC_CMD_GET_SOC_STATE_OUT_WDT_FIRED_WIDTH 1
+/* Status fields for the SoC */
+#define MC_CMD_GET_SOC_STATE_OUT_ATTRIBUTES_OFST 4
+#define MC_CMD_GET_SOC_STATE_OUT_ATTRIBUTES_LEN 4
+#define MC_CMD_GET_SOC_STATE_OUT_RUN_STATE_OFST 4
+#define MC_CMD_GET_SOC_STATE_OUT_RUN_STATE_LBN 0
+#define MC_CMD_GET_SOC_STATE_OUT_RUN_STATE_WIDTH 8
+/* enum: Power on (set by SUC on power up) */
+#define MC_CMD_GET_SOC_STATE_OUT_SOC_BOOT 0x0
+/* enum: Running bootloader */
+#define MC_CMD_GET_SOC_STATE_OUT_SOC_BOOTLOADER 0x1
+/* enum: Bootloader has started OS. OS is booting */
+#define MC_CMD_GET_SOC_STATE_OUT_SOC_OS_START 0x2
+/* enum: OS is running */
+#define MC_CMD_GET_SOC_STATE_OUT_SOC_OS_RUNNING 0x3
+/* enum: Maintenance OS is running */
+#define MC_CMD_GET_SOC_STATE_OUT_SOC_OS_MAINTENANCE 0x4
+/* Number of SoC resets since power on */
+#define MC_CMD_GET_SOC_STATE_OUT_RESET_COUNT_OFST 8
+#define MC_CMD_GET_SOC_STATE_OUT_RESET_COUNT_LEN 4
+
+
+/***********************************/
+/* MC_CMD_CHECK_SCHEDULER_CREDITS
+ * For debugging purposes. For each source and destination node in the hardware
+ * schedulers, check whether the number of credits is as it should be. This
+ * should only be used when the NIC is idle, because collection is not atomic
+ * and because the expected credit counts are only meaningful when no traffic
+ * is flowing.
+ */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS 0x1c8
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_MSGSET 0x1c8
+#undef MC_CMD_0x1c8_PRIVILEGE_CTG
+
+#define MC_CMD_0x1c8_PRIVILEGE_CTG SRIOV_CTG_ADMIN
+
+/* MC_CMD_CHECK_SCHEDULER_CREDITS_IN msgrequest */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_IN_LEN 8
+/* Flags for the request */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_IN_FLAGS_OFST 0
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_IN_FLAGS_LEN 4
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_IN_REPORT_ALL_OFST 0
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_IN_REPORT_ALL_LBN 0
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_IN_REPORT_ALL_WIDTH 1
+/* If there are too many results to fit into an MCDI response, they're split
+ * into pages. This field specifies which (0-indexed) page to request. A
+ * request with PAGE=0 will snapshot the results, and subsequent requests with
+ * PAGE>0 will return data from the most recent snapshot. The GENERATION field
+ * in the response allows callers to verify that all responses correspond to
+ * the same snapshot.
+ */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_IN_PAGE_OFST 4
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_IN_PAGE_LEN 4
+
+/* MC_CMD_CHECK_SCHEDULER_CREDITS_OUT msgresponse */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_LENMIN 16
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_LENMAX 240
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_LENMAX_MCDI2 1008
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_LEN(num) (16+16*(num))
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_NUM(len) (((len)-16)/16)
+/* The total number of results (across all pages). */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_TOTAL_RESULTS_OFST 0
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_TOTAL_RESULTS_LEN 4
+/* The number of pages that the response is split across. */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_NUM_PAGES_OFST 4
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_NUM_PAGES_LEN 4
+/* The number of results in this response. */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_THIS_PAGE_OFST 8
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_THIS_PAGE_LEN 4
+/* Result generation count. Incremented any time a request is made with PAGE=0.
+ */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_GENERATION_OFST 12
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_GENERATION_LEN 4
+/* The results, as an array of SCHED_CREDIT_CHECK_RESULT structures. */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_OFST 16
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_LEN 16
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_MINNUM 0
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_MAXNUM 14
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_MAXNUM_MCDI2 62
/* FUNCTION_PERSONALITY structuredef: The meanings of the personalities are
* defined in SF-120734-TC with more information in SF-122717-TC.
@@ -24839,6 +27140,7 @@
* Get a list of the virtio features supported by the device.
*/
#define MC_CMD_VIRTIO_GET_FEATURES 0x168
+#define MC_CMD_VIRTIO_GET_FEATURES_MSGSET 0x168
#undef MC_CMD_0x168_PRIVILEGE_CTG
#define MC_CMD_0x168_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24867,7 +27169,13 @@
#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_OFST 0
#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_LEN 8
#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_LO_OFST 0
+#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_LO_LEN 4
+#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_LO_LBN 0
+#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_LO_WIDTH 32
#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_HI_OFST 4
+#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_HI_LEN 4
+#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_HI_LBN 32
+#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_HI_WIDTH 32
/***********************************/
@@ -24877,6 +27185,7 @@
* the driver fails to request a feature which the device requires.
*/
#define MC_CMD_VIRTIO_TEST_FEATURES 0x169
+#define MC_CMD_VIRTIO_TEST_FEATURES_MSGSET 0x169
#undef MC_CMD_0x169_PRIVILEGE_CTG
#define MC_CMD_0x169_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24898,7 +27207,13 @@
#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_OFST 8
#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_LEN 8
#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_LO_OFST 8
+#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_LO_LEN 4
+#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_LO_LBN 64
+#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_LO_WIDTH 32
#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_HI_OFST 12
+#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_HI_LEN 4
+#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_HI_LBN 96
+#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_HI_WIDTH 32
/* MC_CMD_VIRTIO_TEST_FEATURES_OUT msgresponse */
#define MC_CMD_VIRTIO_TEST_FEATURES_OUT_LEN 0
@@ -24912,6 +27227,7 @@
* invalid.
*/
#define MC_CMD_VIRTIO_INIT_QUEUE 0x16a
+#define MC_CMD_VIRTIO_INIT_QUEUE_MSGSET 0x16a
#undef MC_CMD_0x16a_PRIVILEGE_CTG
#define MC_CMD_0x16a_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24956,17 +27272,35 @@
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_OFST 16
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_LEN 8
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_LO_OFST 16
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_LO_LEN 4
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_LO_LBN 128
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_LO_WIDTH 32
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_HI_OFST 20
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_HI_LEN 4
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_HI_LBN 160
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_HI_WIDTH 32
/* Address of the available ring in the virtqueue. */
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_OFST 24
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_LEN 8
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_LO_OFST 24
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_LO_LEN 4
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_LO_LBN 192
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_LO_WIDTH 32
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_HI_OFST 28
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_HI_LEN 4
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_HI_LBN 224
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_HI_WIDTH 32
/* Address of the used ring in the virtqueue. */
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_OFST 32
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_LEN 8
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_LO_OFST 32
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_LO_LEN 4
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_LO_LBN 256
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_LO_WIDTH 32
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_HI_OFST 36
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_HI_LEN 4
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_HI_LBN 288
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_HI_WIDTH 32
/* PASID to use on PCIe transactions involving this queue. Ignored if the
* USE_PASID flag is not set.
*/
@@ -24990,7 +27324,13 @@
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_OFST 48
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_LEN 8
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_LO_OFST 48
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_LO_LEN 4
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_LO_LBN 384
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_LO_WIDTH 32
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_HI_OFST 52
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_HI_LEN 4
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_HI_LBN 416
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_HI_WIDTH 32
/* Enum values, see field(s): */
/* MC_CMD_VIRTIO_GET_FEATURES/MC_CMD_VIRTIO_GET_FEATURES_OUT/FEATURES */
/* The initial producer index for this queue's used ring. If this queue is
@@ -25023,6 +27363,7 @@
* Destroy a virtio virtqueue
*/
#define MC_CMD_VIRTIO_FINI_QUEUE 0x16b
+#define MC_CMD_VIRTIO_FINI_QUEUE_MSGSET 0x16b
#undef MC_CMD_0x16b_PRIVILEGE_CTG
#define MC_CMD_0x16b_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -25063,6 +27404,7 @@
* queue(s) to be allocated.
*/
#define MC_CMD_VIRTIO_GET_DOORBELL_OFFSET 0x16c
+#define MC_CMD_VIRTIO_GET_DOORBELL_OFFSET_MSGSET 0x16c
#undef MC_CMD_0x16c_PRIVILEGE_CTG
#define MC_CMD_0x16c_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -25132,12 +27474,18 @@
#define PCIE_FUNCTION_VF_NULL 0xffff
#define PCIE_FUNCTION_VF_LBN 16
#define PCIE_FUNCTION_VF_WIDTH 16
-/* PCIe interface of the function */
+/* PCIe interface of the function. Values should be taken from the
+ * PCIE_INTERFACE enum
+ */
#define PCIE_FUNCTION_INTF_OFST 4
#define PCIE_FUNCTION_INTF_LEN 4
-/* enum: Host PCIe interface */
+/* enum: Host PCIe interface. (Alias for HOST_PRIMARY, provided for backwards
+ * compatibility)
+ */
#define PCIE_FUNCTION_INTF_HOST 0x0
-/* enum: Application Processor interface */
+/* enum: Application Processor interface (alias for NIC_EMBEDDED, provided for
+ * backwards compatibility)
+ */
#define PCIE_FUNCTION_INTF_AP 0x1
#define PCIE_FUNCTION_INTF_LBN 32
#define PCIE_FUNCTION_INTF_WIDTH 32
@@ -25157,6 +27505,7 @@
* MC_CMD_DESC_PROXY_FUNC_COMMIT_IN.
*/
#define MC_CMD_DESC_PROXY_FUNC_CREATE 0x172
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_MSGSET 0x172
#undef MC_CMD_0x172_PRIVILEGE_CTG
#define MC_CMD_0x172_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25170,7 +27519,19 @@
#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_OFST 0
#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_LEN 8
#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_LO_OFST 0
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_LO_LEN 4
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_LO_LBN 0
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_LO_WIDTH 32
#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_HI_OFST 4
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_HI_LEN 4
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_HI_LBN 32
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_HI_WIDTH 32
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_PF_OFST 0
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_PF_LEN 2
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_VF_OFST 2
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_VF_LEN 2
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_INTF_OFST 4
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_INTF_LEN 4
/* The personality to set. The meanings of the personalities are defined in
* SF-120734-TC with more information in SF-122717-TC. At present, we only
* support proxying for VIRTIO_BLK
@@ -25194,7 +27555,19 @@
#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_OFST 4
#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_LEN 8
#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_LO_OFST 4
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_LO_LEN 4
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_LO_LBN 32
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_LO_WIDTH 32
#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_HI_OFST 8
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_HI_LEN 4
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_HI_LBN 64
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_HI_WIDTH 32
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_PF_OFST 4
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_PF_LEN 2
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_VF_OFST 6
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_VF_LEN 2
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_INTF_OFST 8
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_INTF_LEN 4
/***********************************/
@@ -25205,6 +27578,7 @@
* ownership is released.
*/
#define MC_CMD_DESC_PROXY_FUNC_DESTROY 0x173
+#define MC_CMD_DESC_PROXY_FUNC_DESTROY_MSGSET 0x173
#undef MC_CMD_0x173_PRIVILEGE_CTG
#define MC_CMD_0x173_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25235,7 +27609,13 @@
#define VIRTIO_BLK_CONFIG_FEATURES_OFST 0
#define VIRTIO_BLK_CONFIG_FEATURES_LEN 8
#define VIRTIO_BLK_CONFIG_FEATURES_LO_OFST 0
+#define VIRTIO_BLK_CONFIG_FEATURES_LO_LEN 4
+#define VIRTIO_BLK_CONFIG_FEATURES_LO_LBN 0
+#define VIRTIO_BLK_CONFIG_FEATURES_LO_WIDTH 32
#define VIRTIO_BLK_CONFIG_FEATURES_HI_OFST 4
+#define VIRTIO_BLK_CONFIG_FEATURES_HI_LEN 4
+#define VIRTIO_BLK_CONFIG_FEATURES_HI_LBN 32
+#define VIRTIO_BLK_CONFIG_FEATURES_HI_WIDTH 32
#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_BARRIER_OFST 0
#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_BARRIER_LBN 0
#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_BARRIER_WIDTH 1
@@ -25308,7 +27688,13 @@
#define VIRTIO_BLK_CONFIG_CAPACITY_OFST 8
#define VIRTIO_BLK_CONFIG_CAPACITY_LEN 8
#define VIRTIO_BLK_CONFIG_CAPACITY_LO_OFST 8
+#define VIRTIO_BLK_CONFIG_CAPACITY_LO_LEN 4
+#define VIRTIO_BLK_CONFIG_CAPACITY_LO_LBN 64
+#define VIRTIO_BLK_CONFIG_CAPACITY_LO_WIDTH 32
#define VIRTIO_BLK_CONFIG_CAPACITY_HI_OFST 12
+#define VIRTIO_BLK_CONFIG_CAPACITY_HI_LEN 4
+#define VIRTIO_BLK_CONFIG_CAPACITY_HI_LBN 96
+#define VIRTIO_BLK_CONFIG_CAPACITY_HI_WIDTH 32
#define VIRTIO_BLK_CONFIG_CAPACITY_LBN 64
#define VIRTIO_BLK_CONFIG_CAPACITY_WIDTH 64
/* Maximum size of any single segment. Only valid when VIRTIO_BLK_F_SIZE_MAX is
@@ -25445,6 +27831,7 @@
* not persisted until the caller commits with MC_CMD_DESC_PROXY_FUNC_COMMIT_IN
*/
#define MC_CMD_DESC_PROXY_FUNC_CONFIG_SET 0x174
+#define MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_MSGSET 0x174
#undef MC_CMD_0x174_PRIVILEGE_CTG
#define MC_CMD_0x174_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25485,6 +27872,7 @@
* delivered to callers MCDI event queue.
*/
#define MC_CMD_DESC_PROXY_FUNC_COMMIT 0x175
+#define MC_CMD_DESC_PROXY_FUNC_COMMIT_MSGSET 0x175
#undef MC_CMD_0x175_PRIVILEGE_CTG
#define MC_CMD_0x175_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25518,6 +27906,7 @@
* cycle. Returns ENODEV if no function with given label exists.
*/
#define MC_CMD_DESC_PROXY_FUNC_OPEN 0x176
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_MSGSET 0x176
#undef MC_CMD_0x176_PRIVILEGE_CTG
#define MC_CMD_0x176_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25543,7 +27932,19 @@
#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_OFST 4
#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_LEN 8
#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_LO_OFST 4
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_LO_LEN 4
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_LO_LBN 32
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_LO_WIDTH 32
#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_HI_OFST 8
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_HI_LEN 4
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_HI_LBN 64
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_HI_WIDTH 32
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_PF_OFST 4
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_PF_LEN 2
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_VF_OFST 6
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_VF_LEN 2
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_INTF_OFST 8
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_INTF_LEN 4
/* Function personality */
#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_PERSONALITY_OFST 12
#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_PERSONALITY_LEN 4
@@ -25588,6 +27989,7 @@
* error (for virtio, DEVICE_NEEDS_RESET flag would be set on the host side)
*/
#define MC_CMD_DESC_PROXY_FUNC_CLOSE 0x1a1
+#define MC_CMD_DESC_PROXY_FUNC_CLOSE_MSGSET 0x1a1
#undef MC_CMD_0x1a1_PRIVILEGE_CTG
#define MC_CMD_0x1a1_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25607,9 +28009,27 @@
#define DESC_PROXY_FUNC_MAP_FUNC_OFST 0
#define DESC_PROXY_FUNC_MAP_FUNC_LEN 8
#define DESC_PROXY_FUNC_MAP_FUNC_LO_OFST 0
+#define DESC_PROXY_FUNC_MAP_FUNC_LO_LEN 4
+#define DESC_PROXY_FUNC_MAP_FUNC_LO_LBN 0
+#define DESC_PROXY_FUNC_MAP_FUNC_LO_WIDTH 32
#define DESC_PROXY_FUNC_MAP_FUNC_HI_OFST 4
+#define DESC_PROXY_FUNC_MAP_FUNC_HI_LEN 4
+#define DESC_PROXY_FUNC_MAP_FUNC_HI_LBN 32
+#define DESC_PROXY_FUNC_MAP_FUNC_HI_WIDTH 32
#define DESC_PROXY_FUNC_MAP_FUNC_LBN 0
#define DESC_PROXY_FUNC_MAP_FUNC_WIDTH 64
+#define DESC_PROXY_FUNC_MAP_FUNC_PF_OFST 0
+#define DESC_PROXY_FUNC_MAP_FUNC_PF_LEN 2
+#define DESC_PROXY_FUNC_MAP_FUNC_PF_LBN 0
+#define DESC_PROXY_FUNC_MAP_FUNC_PF_WIDTH 16
+#define DESC_PROXY_FUNC_MAP_FUNC_VF_OFST 2
+#define DESC_PROXY_FUNC_MAP_FUNC_VF_LEN 2
+#define DESC_PROXY_FUNC_MAP_FUNC_VF_LBN 16
+#define DESC_PROXY_FUNC_MAP_FUNC_VF_WIDTH 16
+#define DESC_PROXY_FUNC_MAP_FUNC_INTF_OFST 4
+#define DESC_PROXY_FUNC_MAP_FUNC_INTF_LEN 4
+#define DESC_PROXY_FUNC_MAP_FUNC_INTF_LBN 32
+#define DESC_PROXY_FUNC_MAP_FUNC_INTF_WIDTH 32
/* Function personality */
#define DESC_PROXY_FUNC_MAP_PERSONALITY_OFST 8
#define DESC_PROXY_FUNC_MAP_PERSONALITY_LEN 4
@@ -25631,6 +28051,7 @@
* Enumerate existing descriptor proxy functions
*/
#define MC_CMD_DESC_PROXY_FUNC_ENUM 0x177
+#define MC_CMD_DESC_PROXY_FUNC_ENUM_MSGSET 0x177
#undef MC_CMD_0x177_PRIVILEGE_CTG
#define MC_CMD_0x177_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25670,6 +28091,7 @@
* function.
*/
#define MC_CMD_DESC_PROXY_FUNC_ENABLE 0x178
+#define MC_CMD_DESC_PROXY_FUNC_ENABLE_MSGSET 0x178
#undef MC_CMD_0x178_PRIVILEGE_CTG
#define MC_CMD_0x178_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25702,6 +28124,7 @@
* Disable descriptor proxying for function
*/
#define MC_CMD_DESC_PROXY_FUNC_DISABLE 0x179
+#define MC_CMD_DESC_PROXY_FUNC_DISABLE_MSGSET 0x179
#undef MC_CMD_0x179_PRIVILEGE_CTG
#define MC_CMD_0x179_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25725,6 +28148,7 @@
* descriptors.
*/
#define MC_CMD_GET_ADDR_SPC_ID 0x1a0
+#define MC_CMD_GET_ADDR_SPC_ID_MSGSET 0x1a0
#undef MC_CMD_0x1a0_PRIVILEGE_CTG
#define MC_CMD_0x1a0_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25769,7 +28193,19 @@
#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_OFST 4
#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_LEN 8
#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_LO_OFST 4
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_LO_LEN 4
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_LO_LBN 32
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_LO_WIDTH 32
#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_HI_OFST 8
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_HI_LEN 4
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_HI_LBN 64
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_HI_WIDTH 32
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_PF_OFST 4
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_PF_LEN 2
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_VF_OFST 6
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_VF_LEN 2
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_INTF_OFST 8
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_INTF_LEN 4
/* PASID value. Only valid if TYPE is PCI_FUNC_PASID. */
#define MC_CMD_GET_ADDR_SPC_ID_IN_PASID_OFST 12
#define MC_CMD_GET_ADDR_SPC_ID_IN_PASID_LEN 4
@@ -25789,7 +28225,72 @@
#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_OFST 0
#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_LEN 8
#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_LO_OFST 0
+#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_LO_LEN 4
+#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_LO_LBN 0
+#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_LO_WIDTH 32
#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_HI_OFST 4
+#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_HI_LEN 4
+#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_HI_LBN 32
+#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_HI_WIDTH 32
+
+
+/***********************************/
+/* MC_CMD_GET_CLIENT_HANDLE
+ * Obtain a handle for a client given a description of that client. N.B. this
+ * command is subject to change given the open discussion about how PCIe
+ * functions should be referenced on an iEP (integrated endpoint: functions
+ * span multiple buses) and multihost (multiple PCIe interfaces) system.
+ */
+#define MC_CMD_GET_CLIENT_HANDLE 0x1c3
+#define MC_CMD_GET_CLIENT_HANDLE_MSGSET 0x1c3
+#undef MC_CMD_0x1c3_PRIVILEGE_CTG
+
+#define MC_CMD_0x1c3_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_GET_CLIENT_HANDLE_IN msgrequest */
+#define MC_CMD_GET_CLIENT_HANDLE_IN_LEN 12
+/* Type of client to get a client handle for */
+#define MC_CMD_GET_CLIENT_HANDLE_IN_TYPE_OFST 0
+#define MC_CMD_GET_CLIENT_HANDLE_IN_TYPE_LEN 4
+/* enum: Obtain a client handle for a PCIe function-type client. */
+#define MC_CMD_GET_CLIENT_HANDLE_IN_TYPE_FUNC 0x0
+/* PCIe Function ID (as struct PCIE_FUNCTION). Valid when TYPE==FUNC. Use: -
+ * INTF=CALLER, PF=PF_NULL, VF=VF_NULL to refer to the calling function -
+ * INTF=CALLER, PF=PF_NULL, VF=... to refer to a VF child of the calling PF or
+ * a sibling VF of the calling VF. - INTF=CALLER, PF=..., VF=VF_NULL to refer
+ * to a PF on the calling interface - INTF=CALLER, PF=..., VF=... to refer to a
+ * VF on the calling interface - INTF=..., PF=..., VF=VF_NULL to refer to a PF
+ * on a named interface - INTF=..., PF=..., VF=... to refer to a VF on a named
+ * interface where ... refers to a small integer for the VF/PF fields, and to
+ * values from the PCIE_INTERFACE enum for for the INTF field. It's only
+ * meaningful to use INTF=CALLER within a structure that's an argument to
+ * MC_CMD_DEVEL_GET_CLIENT_HANDLE.
+ */
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_OFST 4
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_LEN 8
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_LO_OFST 4
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_LO_LEN 4
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_LO_LBN 32
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_LO_WIDTH 32
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_HI_OFST 8
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_HI_LEN 4
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_HI_LBN 64
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_HI_WIDTH 32
+/* enum: NULL value for the INTF field of struct PCIE_FUNCTION. Provided for
+ * backwards compatibility only, callers should use PCIE_INTERFACE_CALLER.
+ */
+#define MC_CMD_GET_CLIENT_HANDLE_IN_PCIE_FUNCTION_INTF_NULL 0xffffffff
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_PF_OFST 4
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_PF_LEN 2
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_VF_OFST 6
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_VF_LEN 2
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_INTF_OFST 8
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_INTF_LEN 4
+
+/* MC_CMD_GET_CLIENT_HANDLE_OUT msgresponse */
+#define MC_CMD_GET_CLIENT_HANDLE_OUT_LEN 4
+#define MC_CMD_GET_CLIENT_HANDLE_OUT_HANDLE_OFST 0
+#define MC_CMD_GET_CLIENT_HANDLE_OUT_HANDLE_LEN 4
/* MAE_FIELD_FLAGS structuredef */
#define MAE_FIELD_FLAGS_LEN 4
@@ -25937,6 +28438,40 @@
#define MAE_ENC_FIELD_PAIRS_ENC_IP_TTL_MASK_LEN 1
#define MAE_ENC_FIELD_PAIRS_ENC_IP_TTL_MASK_LBN 1096
#define MAE_ENC_FIELD_PAIRS_ENC_IP_TTL_MASK_WIDTH 8
+#define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_OFST 138
+#define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_LEN 1
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_OVLAN_OFST 138
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_OVLAN_LBN 0
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_OVLAN_WIDTH 1
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_IVLAN_OFST 138
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_IVLAN_LBN 1
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_IVLAN_WIDTH 1
+#define MAE_ENC_FIELD_PAIRS_ENC_IP_FRAG_OFST 138
+#define MAE_ENC_FIELD_PAIRS_ENC_IP_FRAG_LBN 2
+#define MAE_ENC_FIELD_PAIRS_ENC_IP_FRAG_WIDTH 1
+#define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_LBN 1104
+#define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_WIDTH 8
+#define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_OFST 138
+#define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_LEN 1
+#define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_LBN 1104
+#define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_WIDTH 8
+#define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_MASK_OFST 139
+#define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_MASK_LEN 1
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_OVLAN_MASK_OFST 139
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_OVLAN_MASK_LBN 0
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_OVLAN_MASK_WIDTH 1
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_IVLAN_MASK_OFST 139
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_IVLAN_MASK_LBN 1
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_IVLAN_MASK_WIDTH 1
+#define MAE_ENC_FIELD_PAIRS_ENC_IP_FRAG_MASK_OFST 139
+#define MAE_ENC_FIELD_PAIRS_ENC_IP_FRAG_MASK_LBN 2
+#define MAE_ENC_FIELD_PAIRS_ENC_IP_FRAG_MASK_WIDTH 1
+#define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_MASK_LBN 1112
+#define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_MASK_WIDTH 8
+#define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_MASK_OFST 139
+#define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_MASK_LEN 1
+#define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_MASK_LBN 1112
+#define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_MASK_WIDTH 8
#define MAE_ENC_FIELD_PAIRS_ENC_IP_FLAGS_BE_OFST 140
#define MAE_ENC_FIELD_PAIRS_ENC_IP_FLAGS_BE_LEN 4
#define MAE_ENC_FIELD_PAIRS_ENC_IP_FLAGS_BE_LBN 1120
@@ -26623,9 +29158,24 @@
#define MAE_FIELD_MASK_VALUE_PAIRS_V2_IS_FROM_NETWORK_OFST 344
#define MAE_FIELD_MASK_VALUE_PAIRS_V2_IS_FROM_NETWORK_LBN 3
#define MAE_FIELD_MASK_VALUE_PAIRS_V2_IS_FROM_NETWORK_WIDTH 1
-#define MAE_FIELD_MASK_VALUE_PAIRS_V2_RSVD_OFST 344
-#define MAE_FIELD_MASK_VALUE_PAIRS_V2_RSVD_LBN 4
-#define MAE_FIELD_MASK_VALUE_PAIRS_V2_RSVD_WIDTH 28
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_HAS_OVLAN_OFST 344
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_HAS_OVLAN_LBN 4
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_HAS_OVLAN_WIDTH 1
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_HAS_IVLAN_OFST 344
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_HAS_IVLAN_LBN 5
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_HAS_IVLAN_WIDTH 1
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_ENC_HAS_OVLAN_OFST 344
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_ENC_HAS_OVLAN_LBN 6
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_ENC_HAS_OVLAN_WIDTH 1
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_ENC_HAS_IVLAN_OFST 344
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_ENC_HAS_IVLAN_LBN 7
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_ENC_HAS_IVLAN_WIDTH 1
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_TCP_SYN_FIN_RST_OFST 344
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_TCP_SYN_FIN_RST_LBN 8
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_TCP_SYN_FIN_RST_WIDTH 1
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_IP_FIRST_FRAG_OFST 344
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_IP_FIRST_FRAG_LBN 9
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_IP_FIRST_FRAG_WIDTH 1
#define MAE_FIELD_MASK_VALUE_PAIRS_V2_FLAGS_LBN 2752
#define MAE_FIELD_MASK_VALUE_PAIRS_V2_FLAGS_WIDTH 32
#define MAE_FIELD_MASK_VALUE_PAIRS_V2_FLAGS_MASK_OFST 348
@@ -26707,16 +29257,34 @@
#define MAE_MPORT_SELECTOR_TYPE_WIDTH 8
/* enum: The MPORT connected to a given physical port */
#define MAE_MPORT_SELECTOR_TYPE_PPORT 0x2
-/* enum: The MPORT assigned to a given PCIe function */
+/* enum: The MPORT assigned to a given PCIe function. Deprecated in favour of
+ * MH_FUNC.
+ */
#define MAE_MPORT_SELECTOR_TYPE_FUNC 0x3
/* enum: An mport_id */
#define MAE_MPORT_SELECTOR_TYPE_MPORT_ID 0x4
+/* enum: The MPORT assigned to a given PCIe function (see also FWRIVERHD-1108)
+ */
+#define MAE_MPORT_SELECTOR_TYPE_MH_FUNC 0x5
+/* enum: This is guaranteed never to be a valid selector type */
+#define MAE_MPORT_SELECTOR_TYPE_INVALID 0xff
#define MAE_MPORT_SELECTOR_MPORT_ID_OFST 0
#define MAE_MPORT_SELECTOR_MPORT_ID_LBN 0
#define MAE_MPORT_SELECTOR_MPORT_ID_WIDTH 24
#define MAE_MPORT_SELECTOR_PPORT_ID_OFST 0
#define MAE_MPORT_SELECTOR_PPORT_ID_LBN 0
#define MAE_MPORT_SELECTOR_PPORT_ID_WIDTH 4
+#define MAE_MPORT_SELECTOR_FUNC_INTF_ID_OFST 0
+#define MAE_MPORT_SELECTOR_FUNC_INTF_ID_LBN 20
+#define MAE_MPORT_SELECTOR_FUNC_INTF_ID_WIDTH 4
+#define MAE_MPORT_SELECTOR_HOST_PRIMARY 0x1 /* enum */
+#define MAE_MPORT_SELECTOR_NIC_EMBEDDED 0x2 /* enum */
+/* enum: Deprecated, use CALLER_INTF instead. */
+#define MAE_MPORT_SELECTOR_CALLER 0xf
+#define MAE_MPORT_SELECTOR_CALLER_INTF 0xf /* enum */
+#define MAE_MPORT_SELECTOR_FUNC_MH_PF_ID_OFST 0
+#define MAE_MPORT_SELECTOR_FUNC_MH_PF_ID_LBN 16
+#define MAE_MPORT_SELECTOR_FUNC_MH_PF_ID_WIDTH 4
#define MAE_MPORT_SELECTOR_FUNC_PF_ID_OFST 0
#define MAE_MPORT_SELECTOR_FUNC_PF_ID_LBN 16
#define MAE_MPORT_SELECTOR_FUNC_PF_ID_WIDTH 8
@@ -26737,15 +29305,56 @@
* function.
*/
#define MAE_MPORT_SELECTOR_FUNC_PF_ID_CALLER 0xff
+/* enum: Same as PF_ID_CALLER, but for use in the smaller MH_PF_ID field. Only
+ * valid if FUNC_INTF_ID is CALLER.
+ */
+#define MAE_MPORT_SELECTOR_FUNC_MH_PF_ID_CALLER 0xf
#define MAE_MPORT_SELECTOR_FLAT_LBN 0
#define MAE_MPORT_SELECTOR_FLAT_WIDTH 32
+/* MAE_LINK_ENDPOINT_SELECTOR structuredef: Structure that identifies a real or
+ * virtual network port by MAE port and link end
+ */
+#define MAE_LINK_ENDPOINT_SELECTOR_LEN 8
+/* The MAE MPORT of interest */
+#define MAE_LINK_ENDPOINT_SELECTOR_MPORT_SELECTOR_OFST 0
+#define MAE_LINK_ENDPOINT_SELECTOR_MPORT_SELECTOR_LEN 4
+#define MAE_LINK_ENDPOINT_SELECTOR_MPORT_SELECTOR_LBN 0
+#define MAE_LINK_ENDPOINT_SELECTOR_MPORT_SELECTOR_WIDTH 32
+/* Which end of the link identified by MPORT to consider */
+#define MAE_LINK_ENDPOINT_SELECTOR_LINK_END_OFST 4
+#define MAE_LINK_ENDPOINT_SELECTOR_LINK_END_LEN 4
+/* Enum values, see field(s): */
+/* MAE_MPORT_END */
+#define MAE_LINK_ENDPOINT_SELECTOR_LINK_END_LBN 32
+#define MAE_LINK_ENDPOINT_SELECTOR_LINK_END_WIDTH 32
+/* A field for accessing the endpoint selector as a collection of bits */
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_OFST 0
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_LEN 8
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_LO_OFST 0
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_LO_LEN 4
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_LO_LBN 0
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_LO_WIDTH 32
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_HI_OFST 4
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_HI_LEN 4
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_HI_LBN 32
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_HI_WIDTH 32
+/* enum: Set FLAT to this value to obtain backward-compatible behaviour in
+ * commands that have been extended to take a MAE_LINK_ENDPOINT_SELECTOR
+ * argument. New commands that are designed to take such an argument from the
+ * start will not support this.
+ */
+#define MAE_LINK_ENDPOINT_SELECTOR_MAE_LINK_ENDPOINT_COMPAT 0x0
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_LBN 0
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_WIDTH 64
+
/***********************************/
/* MC_CMD_MAE_GET_CAPS
* Describes capabilities of the MAE (Match-Action Engine)
*/
#define MC_CMD_MAE_GET_CAPS 0x140
+#define MC_CMD_MAE_GET_CAPS_MSGSET 0x140
#undef MC_CMD_0x140_PRIVILEGE_CTG
#define MC_CMD_0x140_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -26772,6 +29381,9 @@
#define MC_CMD_MAE_GET_CAPS_OUT_ENCAP_TYPE_GENEVE_OFST 4
#define MC_CMD_MAE_GET_CAPS_OUT_ENCAP_TYPE_GENEVE_LBN 2
#define MC_CMD_MAE_GET_CAPS_OUT_ENCAP_TYPE_GENEVE_WIDTH 1
+#define MC_CMD_MAE_GET_CAPS_OUT_ENCAP_TYPE_L2GRE_OFST 4
+#define MC_CMD_MAE_GET_CAPS_OUT_ENCAP_TYPE_L2GRE_LBN 3
+#define MC_CMD_MAE_GET_CAPS_OUT_ENCAP_TYPE_L2GRE_WIDTH 1
/* The total number of counters available to allocate. */
#define MC_CMD_MAE_GET_CAPS_OUT_COUNTERS_OFST 8
#define MC_CMD_MAE_GET_CAPS_OUT_COUNTERS_LEN 4
@@ -26823,6 +29435,7 @@
* Get a level of support for match fields when used in match-action rules
*/
#define MC_CMD_MAE_GET_AR_CAPS 0x141
+#define MC_CMD_MAE_GET_AR_CAPS_MSGSET 0x141
#undef MC_CMD_0x141_PRIVILEGE_CTG
#define MC_CMD_0x141_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -26855,6 +29468,7 @@
* Get a level of support for fields used in outer rule keys.
*/
#define MC_CMD_MAE_GET_OR_CAPS 0x142
+#define MC_CMD_MAE_GET_OR_CAPS_MSGSET 0x142
#undef MC_CMD_0x142_PRIVILEGE_CTG
#define MC_CMD_0x142_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -26885,6 +29499,7 @@
* Rules.
*/
#define MC_CMD_MAE_COUNTER_ALLOC 0x143
+#define MC_CMD_MAE_COUNTER_ALLOC_MSGSET 0x143
#undef MC_CMD_0x143_PRIVILEGE_CTG
#define MC_CMD_0x143_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -26928,6 +29543,7 @@
* Free match-action-engine counters
*/
#define MC_CMD_MAE_COUNTER_FREE 0x144
+#define MC_CMD_MAE_COUNTER_FREE_MSGSET 0x144
#undef MC_CMD_0x144_PRIVILEGE_CTG
#define MC_CMD_0x144_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -26995,6 +29611,7 @@
* delivering packets to the current queue first.
*/
#define MC_CMD_MAE_COUNTERS_STREAM_START 0x151
+#define MC_CMD_MAE_COUNTERS_STREAM_START_MSGSET 0x151
#undef MC_CMD_0x151_PRIVILEGE_CTG
#define MC_CMD_0x151_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27031,6 +29648,7 @@
* Stop streaming counter values to the specified RxQ.
*/
#define MC_CMD_MAE_COUNTERS_STREAM_STOP 0x152
+#define MC_CMD_MAE_COUNTERS_STREAM_STOP_MSGSET 0x152
#undef MC_CMD_0x152_PRIVILEGE_CTG
#define MC_CMD_0x152_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27060,6 +29678,7 @@
* MAE_COUNTERS_PACKETISER_STREAM_START/PACKET_SIZE and rung the doorbell.
*/
#define MC_CMD_MAE_COUNTERS_STREAM_GIVE_CREDITS 0x153
+#define MC_CMD_MAE_COUNTERS_STREAM_GIVE_CREDITS_MSGSET 0x153
#undef MC_CMD_0x153_PRIVILEGE_CTG
#define MC_CMD_0x153_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27076,9 +29695,15 @@
/***********************************/
/* MC_CMD_MAE_ENCAP_HEADER_ALLOC
- * Allocate encap action metadata
+ * Allocate an encapsulation header to be used in an Action Rule response. The
+ * header must be constructed as a valid packet with 0-length payload.
+ * Specifically, the L3/L4 lengths & checksums will only be incrementally fixed
+ * by the NIC, rather than recomputed entirely. Currently only IPv4, IPv6 and
+ * UDP are supported. If the maximum number of headers have already been
+ * allocated then the command will fail with MC_CMD_ERR_ENOSPC.
*/
#define MC_CMD_MAE_ENCAP_HEADER_ALLOC 0x148
+#define MC_CMD_MAE_ENCAP_HEADER_ALLOC_MSGSET 0x148
#undef MC_CMD_0x148_PRIVILEGE_CTG
#define MC_CMD_0x148_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27109,9 +29734,10 @@
/***********************************/
/* MC_CMD_MAE_ENCAP_HEADER_UPDATE
- * Update encap action metadata
+ * Update encap action metadata. See comments for MAE_ENCAP_HEADER_ALLOC.
*/
#define MC_CMD_MAE_ENCAP_HEADER_UPDATE 0x149
+#define MC_CMD_MAE_ENCAP_HEADER_UPDATE_MSGSET 0x149
#undef MC_CMD_0x149_PRIVILEGE_CTG
#define MC_CMD_0x149_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27141,6 +29767,7 @@
* Free encap action metadata
*/
#define MC_CMD_MAE_ENCAP_HEADER_FREE 0x14a
+#define MC_CMD_MAE_ENCAP_HEADER_FREE_MSGSET 0x14a
#undef MC_CMD_0x14a_PRIVILEGE_CTG
#define MC_CMD_0x14a_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27176,9 +29803,12 @@
/* MC_CMD_MAE_MAC_ADDR_ALLOC
* Allocate MAC address. Hardware implementations have MAC addresses programmed
* into an indirection table, and clients should take care not to allocate the
- * same MAC address twice (but instead reuse its ID).
+ * same MAC address twice (but instead reuse its ID). If the maximum number of
+ * MAC addresses have already been allocated then the command will fail with
+ * MC_CMD_ERR_ENOSPC.
*/
#define MC_CMD_MAE_MAC_ADDR_ALLOC 0x15e
+#define MC_CMD_MAE_MAC_ADDR_ALLOC_MSGSET 0x15e
#undef MC_CMD_0x15e_PRIVILEGE_CTG
#define MC_CMD_0x15e_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27204,6 +29834,7 @@
* Free MAC address.
*/
#define MC_CMD_MAE_MAC_ADDR_FREE 0x15f
+#define MC_CMD_MAE_MAC_ADDR_FREE_MSGSET 0x15f
#undef MC_CMD_0x15f_PRIVILEGE_CTG
#define MC_CMD_0x15f_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27238,9 +29869,12 @@
/***********************************/
/* MC_CMD_MAE_ACTION_SET_ALLOC
* Allocate an action set, which can be referenced either in response to an
- * Action Rule, or as part of an Action Set List.
+ * Action Rule, or as part of an Action Set List. If the maxmimum number of
+ * action sets have already been allocated then the command will fail with
+ * MC_CMD_ERR_ENOSPC.
*/
#define MC_CMD_MAE_ACTION_SET_ALLOC 0x14d
+#define MC_CMD_MAE_ACTION_SET_ALLOC_MSGSET 0x14d
#undef MC_CMD_0x14d_PRIVILEGE_CTG
#define MC_CMD_0x14d_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27267,6 +29901,15 @@
#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_NAT_OFST 0
#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_NAT_LBN 11
#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_NAT_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_DECR_IP_TTL_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_DECR_IP_TTL_LBN 12
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_DECR_IP_TTL_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_SET_SRC_MPORT_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_SET_SRC_MPORT_LBN 13
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_SET_SRC_MPORT_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_SUPPRESS_SELF_DELIVERY_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_SUPPRESS_SELF_DELIVERY_LBN 14
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_SUPPRESS_SELF_DELIVERY_WIDTH 1
/* If VLAN_PUSH >= 1, TCI value to be inserted as outermost VLAN. */
#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_VLAN0_TCI_BE_OFST 4
#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_VLAN0_TCI_BE_LEN 2
@@ -27313,8 +29956,135 @@
#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DST_MAC_ID_OFST 40
#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DST_MAC_ID_LEN 4
+/* MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN msgrequest: Only supported if
+ * MAE_ACTION_SET_ALLOC_V2_SUPPORTED is advertised in
+ * MC_CMD_GET_CAPABILITIES_V7_OUT.
+ */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_LEN 51
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_FLAGS_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_FLAGS_LEN 4
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN_PUSH_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN_PUSH_LBN 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN_PUSH_WIDTH 2
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN_POP_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN_POP_LBN 4
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN_POP_WIDTH 2
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DECAP_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DECAP_LBN 8
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DECAP_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_MARK_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_MARK_LBN 9
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_MARK_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_FLAG_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_FLAG_LBN 10
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_FLAG_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_NAT_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_NAT_LBN 11
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_NAT_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DECR_IP_TTL_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DECR_IP_TTL_LBN 12
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DECR_IP_TTL_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_SET_SRC_MPORT_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_SET_SRC_MPORT_LBN 13
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_SET_SRC_MPORT_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_SUPPRESS_SELF_DELIVERY_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_SUPPRESS_SELF_DELIVERY_LBN 14
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_SUPPRESS_SELF_DELIVERY_WIDTH 1
+/* If VLAN_PUSH >= 1, TCI value to be inserted as outermost VLAN. */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN0_TCI_BE_OFST 4
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN0_TCI_BE_LEN 2
+/* If VLAN_PUSH >= 1, TPID value to be inserted as outermost VLAN. */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN0_PROTO_BE_OFST 6
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN0_PROTO_BE_LEN 2
+/* If VLAN_PUSH == 2, inner TCI value to be inserted. */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN1_TCI_BE_OFST 8
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN1_TCI_BE_LEN 2
+/* If VLAN_PUSH == 2, inner TPID value to be inserted. */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN1_PROTO_BE_OFST 10
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN1_PROTO_BE_LEN 2
+/* Reserved. Ignored by firmware. Should be set to zero or 0xffffffff. */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_RSVD_OFST 12
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_RSVD_LEN 4
+/* Set to ENCAP_HEADER_ID_NULL to request no encap action */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ENCAP_HEADER_ID_OFST 16
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ENCAP_HEADER_ID_LEN 4
+/* An m-port selector identifying the m-port that the modified packet should be
+ * delivered to. Set to MPORT_SELECTOR_NULL to request no delivery of the
+ * packet.
+ */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DELIVER_OFST 20
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DELIVER_LEN 4
+/* Allows an action set to trigger several counter updates. Set to
+ * COUNTER_LIST_ID_NULL to request no counter action.
+ */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_COUNTER_LIST_ID_OFST 24
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_COUNTER_LIST_ID_LEN 4
+/* If a driver only wished to update one counter within this action set, then
+ * it can supply a COUNTER_ID instead of allocating a single-element counter
+ * list. This field should be set to COUNTER_ID_NULL if this behaviour is not
+ * required. It is not valid to supply a non-NULL value for both
+ * COUNTER_LIST_ID and COUNTER_ID.
+ */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_COUNTER_ID_OFST 28
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_COUNTER_ID_LEN 4
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_MARK_VALUE_OFST 32
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_MARK_VALUE_LEN 4
+/* Set to MAC_ID_NULL to request no source MAC replacement. */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_SRC_MAC_ID_OFST 36
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_SRC_MAC_ID_LEN 4
+/* Set to MAC_ID_NULL to request no destination MAC replacement. */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DST_MAC_ID_OFST 40
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DST_MAC_ID_LEN 4
+/* Source m-port ID to be reported for DO_SET_SRC_MPORT action. */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_REPORTED_SRC_MPORT_OFST 44
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_REPORTED_SRC_MPORT_LEN 4
+/* Actions for modifying the Differentiated Services Code-Point (DSCP) bits
+ * within IPv4 and IPv6 headers.
+ */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DSCP_CONTROL_OFST 48
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DSCP_CONTROL_LEN 2
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DSCP_ENCAP_COPY_OFST 48
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DSCP_ENCAP_COPY_LBN 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DSCP_ENCAP_COPY_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DSCP_DECAP_COPY_OFST 48
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DSCP_DECAP_COPY_LBN 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DSCP_DECAP_COPY_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_DSCP_OFST 48
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_DSCP_LBN 2
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_DSCP_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DSCP_VALUE_OFST 48
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DSCP_VALUE_LBN 3
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DSCP_VALUE_WIDTH 6
+/* Actions for modifying the Explicit Congestion Notification (ECN) bits within
+ * IPv4 and IPv6 headers.
+ */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_CONTROL_OFST 50
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_CONTROL_LEN 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_ECN_ENCAP_COPY_OFST 50
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_ECN_ENCAP_COPY_LBN 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_ECN_ENCAP_COPY_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_ECN_DECAP_COPY_OFST 50
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_ECN_DECAP_COPY_LBN 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_ECN_DECAP_COPY_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_ECN_OFST 50
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_ECN_LBN 2
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_ECN_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_VALUE_OFST 50
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_VALUE_LBN 3
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_VALUE_WIDTH 2
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_ECT_0_TO_CE_OFST 50
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_ECT_0_TO_CE_LBN 5
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_ECT_0_TO_CE_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_ECT_1_TO_CE_OFST 50
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_ECT_1_TO_CE_LBN 6
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_ECT_1_TO_CE_WIDTH 1
+
/* MC_CMD_MAE_ACTION_SET_ALLOC_OUT msgresponse */
#define MC_CMD_MAE_ACTION_SET_ALLOC_OUT_LEN 4
+/* The MSB of the AS_ID is guaranteed to be clear if the ID is not
+ * ACTION_SET_ID_NULL. This allows an AS_ID to be distinguished from an ASL_ID
+ * returned from MC_CMD_MAE_ACTION_SET_LIST_ALLOC.
+ */
#define MC_CMD_MAE_ACTION_SET_ALLOC_OUT_AS_ID_OFST 0
#define MC_CMD_MAE_ACTION_SET_ALLOC_OUT_AS_ID_LEN 4
/* enum: An action set ID that is guaranteed never to represent an action set
@@ -27326,6 +30096,7 @@
/* MC_CMD_MAE_ACTION_SET_FREE
*/
#define MC_CMD_MAE_ACTION_SET_FREE 0x14e
+#define MC_CMD_MAE_ACTION_SET_FREE_MSGSET 0x14e
#undef MC_CMD_0x14e_PRIVILEGE_CTG
#define MC_CMD_0x14e_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27361,9 +30132,12 @@
/* MC_CMD_MAE_ACTION_SET_LIST_ALLOC
* Allocate an action set list (ASL) that can be referenced by an ID. The ASL
* ID can be used when inserting an action rule, so that for each packet
- * matching the rule every action set in the list is applied.
+ * matching the rule every action set in the list is applied. If the maximum
+ * number of ASLs have already been allocated then the command will fail with
+ * MC_CMD_ERR_ENOSPC.
*/
#define MC_CMD_MAE_ACTION_SET_LIST_ALLOC 0x14f
+#define MC_CMD_MAE_ACTION_SET_LIST_ALLOC_MSGSET 0x14f
#undef MC_CMD_0x14f_PRIVILEGE_CTG
#define MC_CMD_0x14f_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27394,6 +30168,9 @@
/* MC_CMD_MAE_ACTION_SET_LIST_ALLOC_OUT msgresponse */
#define MC_CMD_MAE_ACTION_SET_LIST_ALLOC_OUT_LEN 4
+/* The MSB of the ASL_ID is guaranteed to be set. This allows an ASL_ID to be
+ * distinguished from an AS_ID returned from MC_CMD_MAE_ACTION_SET_ALLOC.
+ */
#define MC_CMD_MAE_ACTION_SET_LIST_ALLOC_OUT_ASL_ID_OFST 0
#define MC_CMD_MAE_ACTION_SET_LIST_ALLOC_OUT_ASL_ID_LEN 4
/* enum: An action set list ID that is guaranteed never to represent an action
@@ -27407,6 +30184,7 @@
* Free match-action-engine redirect_lists
*/
#define MC_CMD_MAE_ACTION_SET_LIST_FREE 0x150
+#define MC_CMD_MAE_ACTION_SET_LIST_FREE_MSGSET 0x150
#undef MC_CMD_0x150_PRIVILEGE_CTG
#define MC_CMD_0x150_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27441,9 +30219,11 @@
/***********************************/
/* MC_CMD_MAE_OUTER_RULE_INSERT
* Inserts an Outer Rule, which controls encapsulation parsing, and may
- * influence the Lookup Sequence.
+ * influence the Lookup Sequence. If the maximum number of rules have already
+ * been inserted then the command will fail with MC_CMD_ERR_ENOSPC.
*/
#define MC_CMD_MAE_OUTER_RULE_INSERT 0x15a
+#define MC_CMD_MAE_OUTER_RULE_INSERT_MSGSET 0x15a
#undef MC_CMD_0x15a_PRIVILEGE_CTG
#define MC_CMD_0x15a_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27504,6 +30284,7 @@
/* MC_CMD_MAE_OUTER_RULE_REMOVE
*/
#define MC_CMD_MAE_OUTER_RULE_REMOVE 0x15b
+#define MC_CMD_MAE_OUTER_RULE_REMOVE_MSGSET 0x15b
#undef MC_CMD_0x15b_PRIVILEGE_CTG
#define MC_CMD_0x15b_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27583,9 +30364,11 @@
/* MC_CMD_MAE_ACTION_RULE_INSERT
* Insert a rule specify that packets matching a filter be processed according
* to a previous allocated action. Masks can be set as indicated by
- * MC_CMD_MAE_GET_MATCH_FIELD_CAPABILITIES.
+ * MC_CMD_MAE_GET_MATCH_FIELD_CAPABILITIES. If the maximum number of rules have
+ * already been inserted then the command will fail with MC_CMD_ERR_ENOSPC.
*/
#define MC_CMD_MAE_ACTION_RULE_INSERT 0x15c
+#define MC_CMD_MAE_ACTION_RULE_INSERT_MSGSET 0x15c
#undef MC_CMD_0x15c_PRIVILEGE_CTG
#define MC_CMD_0x15c_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27627,6 +30410,7 @@
* ENOTSUP, in which case the driver should DELETE/INSERT.
*/
#define MC_CMD_MAE_ACTION_RULE_UPDATE 0x15d
+#define MC_CMD_MAE_ACTION_RULE_UPDATE_MSGSET 0x15d
#undef MC_CMD_0x15d_PRIVILEGE_CTG
#define MC_CMD_0x15d_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27648,6 +30432,7 @@
/* MC_CMD_MAE_ACTION_RULE_DELETE
*/
#define MC_CMD_MAE_ACTION_RULE_DELETE 0x155
+#define MC_CMD_MAE_ACTION_RULE_DELETE_MSGSET 0x155
#undef MC_CMD_0x155_PRIVILEGE_CTG
#define MC_CMD_0x155_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27684,6 +30469,7 @@
* Return the m-port corresponding to a selector.
*/
#define MC_CMD_MAE_MPORT_LOOKUP 0x160
+#define MC_CMD_MAE_MPORT_LOOKUP_MSGSET 0x160
#undef MC_CMD_0x160_PRIVILEGE_CTG
#define MC_CMD_0x160_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -27705,6 +30491,7 @@
* match or delivery argument.
*/
#define MC_CMD_MAE_MPORT_ALLOC 0x163
+#define MC_CMD_MAE_MPORT_ALLOC_MSGSET 0x163
#undef MC_CMD_0x163_PRIVILEGE_CTG
#define MC_CMD_0x163_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27812,6 +30599,7 @@
* Free a m-port which was previously allocated by the driver.
*/
#define MC_CMD_MAE_MPORT_FREE 0x164
+#define MC_CMD_MAE_MPORT_FREE_MSGSET 0x164
#undef MC_CMD_0x164_PRIVILEGE_CTG
#define MC_CMD_0x164_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27847,6 +30635,9 @@
#define MAE_MPORT_DESC_CAN_DELETE_OFST 8
#define MAE_MPORT_DESC_CAN_DELETE_LBN 2
#define MAE_MPORT_DESC_CAN_DELETE_WIDTH 1
+#define MAE_MPORT_DESC_IS_ZOMBIE_OFST 8
+#define MAE_MPORT_DESC_IS_ZOMBIE_LBN 3
+#define MAE_MPORT_DESC_IS_ZOMBIE_WIDTH 1
#define MAE_MPORT_DESC_CALLER_FLAGS_LBN 64
#define MAE_MPORT_DESC_CALLER_FLAGS_WIDTH 32
/* Not the ideal name; it's really the type of thing connected to the m-port */
@@ -27869,7 +30660,13 @@
#define MAE_MPORT_DESC_RESERVED_OFST 32
#define MAE_MPORT_DESC_RESERVED_LEN 8
#define MAE_MPORT_DESC_RESERVED_LO_OFST 32
+#define MAE_MPORT_DESC_RESERVED_LO_LEN 4
+#define MAE_MPORT_DESC_RESERVED_LO_LBN 256
+#define MAE_MPORT_DESC_RESERVED_LO_WIDTH 32
#define MAE_MPORT_DESC_RESERVED_HI_OFST 36
+#define MAE_MPORT_DESC_RESERVED_HI_LEN 4
+#define MAE_MPORT_DESC_RESERVED_HI_LBN 288
+#define MAE_MPORT_DESC_RESERVED_HI_WIDTH 32
#define MAE_MPORT_DESC_RESERVED_LBN 256
#define MAE_MPORT_DESC_RESERVED_WIDTH 64
/* Logical port index. Only valid when type NET Port. */
@@ -27916,8 +30713,11 @@
/***********************************/
/* MC_CMD_MAE_MPORT_ENUMERATE
+ * Deprecated in favour of MAE_MPORT_READ_JOURNAL. Support for this command
+ * will be removed at some future point.
*/
#define MC_CMD_MAE_MPORT_ENUMERATE 0x17c
+#define MC_CMD_MAE_MPORT_ENUMERATE_MSGSET 0x17c
#undef MC_CMD_0x17c_PRIVILEGE_CTG
#define MC_CMD_0x17c_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -27945,4 +30745,50 @@
#define MC_CMD_MAE_MPORT_ENUMERATE_OUT_MPORT_DESC_DATA_MAXNUM 244
#define MC_CMD_MAE_MPORT_ENUMERATE_OUT_MPORT_DESC_DATA_MAXNUM_MCDI2 1012
+
+/***********************************/
+/* MC_CMD_MAE_MPORT_READ_JOURNAL
+ * Firmware maintains a per-client journal of mport creations and deletions.
+ * This journal is clear-on-read, i.e. repeated calls of this command will
+ * drain the buffer. Whenever the caller resets its function via FLR or
+ * MC_CMD_ENTITY_RESET, the journal is regenerated from a blank start.
+ */
+#define MC_CMD_MAE_MPORT_READ_JOURNAL 0x147
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_MSGSET 0x147
+#undef MC_CMD_0x147_PRIVILEGE_CTG
+
+#define MC_CMD_0x147_PRIVILEGE_CTG SRIOV_CTG_MAE
+
+/* MC_CMD_MAE_MPORT_READ_JOURNAL_IN msgrequest */
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_IN_LEN 4
+/* Any unused flags are reserved and must be set to zero. */
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_IN_FLAGS_OFST 0
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_IN_FLAGS_LEN 4
+
+/* MC_CMD_MAE_MPORT_READ_JOURNAL_OUT msgresponse */
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_LENMIN 12
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_LENMAX 252
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_LENMAX_MCDI2 1020
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_LEN(num) (12+1*(num))
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_DATA_NUM(len) (((len)-12)/1)
+/* Any unused flags are reserved and must be ignored. */
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_FLAGS_OFST 0
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_FLAGS_LEN 4
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MORE_OFST 0
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MORE_LBN 0
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MORE_WIDTH 1
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_COUNT_OFST 4
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_COUNT_LEN 4
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_SIZEOF_MPORT_DESC_OFST 8
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_SIZEOF_MPORT_DESC_LEN 4
+/* Any array of MAE_MPORT_DESC structures. The MAE_MPORT_DESC structure may
+ * grow in future version of this command. Drivers should use a stride of
+ * SIZEOF_MPORT_DESC. Fields beyond SIZEOF_MPORT_DESC are not present.
+ */
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_DATA_OFST 12
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_DATA_LEN 1
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_DATA_MINNUM 0
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_DATA_MAXNUM 240
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_DATA_MAXNUM_MCDI2 1008
+
#endif /* _SIENA_MC_DRIVER_PCOL_H */
diff --git a/drivers/common/sfc_efx/base/efx_regs_mcdi_aoe.h b/drivers/common/sfc_efx/base/efx_regs_mcdi_aoe.h
index f7c89fabc..c45f678c2 100644
--- a/drivers/common/sfc_efx/base/efx_regs_mcdi_aoe.h
+++ b/drivers/common/sfc_efx/base/efx_regs_mcdi_aoe.h
@@ -6,7 +6,7 @@
/*
* This file is automatically generated. DO NOT EDIT IT.
- * To make changes, edit the .yml files in sfregistry under doc/mcdi/ and
+ * To make changes, edit the .yml files in smartnic_registry under doc/mcdi/ and
* rebuild this file with "make mcdi_headers_v5".
*/
@@ -20,6 +20,7 @@
* Perform an FC operation
*/
#define MC_CMD_FC 0x9
+#define MC_CMD_FC_MSGSET 0x9
/* MC_CMD_FC_IN msgrequest */
#define MC_CMD_FC_IN_LEN 4
@@ -212,7 +213,13 @@
#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_OFST 16
#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_LEN 8
#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_LO_OFST 16
+#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_LO_LEN 4
+#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_LO_LBN 128
+#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_LO_WIDTH 32
#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_HI_OFST 20
+#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_HI_LEN 4
+#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_HI_LBN 160
+#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_HI_WIDTH 32
#define MC_CMD_FC_IN_MAC_SET_LINK_REJECT_OFST 24
#define MC_CMD_FC_IN_MAC_SET_LINK_REJECT_LEN 4
#define MC_CMD_FC_IN_MAC_SET_LINK_REJECT_UNICAST_OFST 24
@@ -784,12 +791,24 @@
#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_OFST 12
#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_LEN 8
#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_LO_OFST 12
+#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_LO_LEN 4
+#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_LO_LBN 96
+#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_LO_WIDTH 32
#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_HI_OFST 16
+#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_HI_LEN 4
+#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_HI_LBN 128
+#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_HI_WIDTH 32
/* AOE address from which to transfer data */
#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_OFST 20
#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_LEN 8
#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_LO_OFST 20
+#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_LO_LEN 4
+#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_LO_LBN 160
+#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_LO_WIDTH 32
#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_HI_OFST 24
+#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_HI_LEN 4
+#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_HI_LBN 192
+#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_HI_WIDTH 32
/* Length of AOE transfer (total) */
#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_LENGTH_OFST 28
#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_LENGTH_LEN 4
@@ -916,7 +935,13 @@
#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_OFST 12
#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_LEN 8
#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_LO_OFST 12
+#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_LO_LEN 4
+#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_LO_LBN 96
+#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_LO_WIDTH 32
#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_HI_OFST 16
+#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_HI_LEN 4
+#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_HI_LBN 128
+#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_HI_WIDTH 32
#define MC_CMD_FC_IN_CLOCK_SET_TIME_NANOSECONDS_OFST 20
#define MC_CMD_FC_IN_CLOCK_SET_TIME_NANOSECONDS_LEN 4
@@ -1016,7 +1041,13 @@
#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_OFST 12
#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_LEN 8
#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_LO_OFST 12
+#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_LO_LEN 4
+#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_LO_LBN 96
+#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_LO_WIDTH 32
#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_HI_OFST 16
+#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_HI_LEN 4
+#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_HI_LBN 128
+#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_HI_WIDTH 32
/* Port number of PTP packet for which timestamp required */
#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_PORT_NUM_OFST 20
#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_PORT_NUM_LEN 4
@@ -1320,7 +1351,13 @@
#define MC_CMD_FC_OUT_GET_VERSION_VERSION_OFST 4
#define MC_CMD_FC_OUT_GET_VERSION_VERSION_LEN 8
#define MC_CMD_FC_OUT_GET_VERSION_VERSION_LO_OFST 4
+#define MC_CMD_FC_OUT_GET_VERSION_VERSION_LO_LEN 4
+#define MC_CMD_FC_OUT_GET_VERSION_VERSION_LO_LBN 32
+#define MC_CMD_FC_OUT_GET_VERSION_VERSION_LO_WIDTH 32
#define MC_CMD_FC_OUT_GET_VERSION_VERSION_HI_OFST 8
+#define MC_CMD_FC_OUT_GET_VERSION_VERSION_HI_LEN 4
+#define MC_CMD_FC_OUT_GET_VERSION_VERSION_HI_LBN 64
+#define MC_CMD_FC_OUT_GET_VERSION_VERSION_HI_WIDTH 32
/* MC_CMD_FC_OUT_TRC_RX_READ msgresponse */
#define MC_CMD_FC_OUT_TRC_RX_READ_LEN 8
@@ -1347,7 +1384,13 @@
#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_OFST 0
#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_LEN 8
#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_LO_OFST 0
+#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_LO_LEN 4
+#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_LO_LBN 0
+#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_LO_WIDTH 32
#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_HI_OFST 4
+#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_HI_LEN 4
+#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_HI_LBN 32
+#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_HI_WIDTH 32
#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_NUM MC_CMD_FC_MAC_RX_NSTATS
#define MC_CMD_FC_MAC_RX_STATS_OCTETS 0x0 /* enum */
#define MC_CMD_FC_MAC_RX_OCTETS_OK 0x1 /* enum */
@@ -1382,7 +1425,13 @@
#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_OFST 0
#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_LEN 8
#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_LO_OFST 0
+#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_LO_LEN 4
+#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_LO_LBN 0
+#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_LO_WIDTH 32
#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_HI_OFST 4
+#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_HI_LEN 4
+#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_HI_LBN 32
+#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_HI_WIDTH 32
#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_NUM MC_CMD_FC_MAC_TX_NSTATS
#define MC_CMD_FC_MAC_TX_STATS_OCTETS 0x0 /* enum */
#define MC_CMD_FC_MAC_TX_OCTETS_OK 0x1 /* enum */
@@ -1415,7 +1464,13 @@
#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_OFST 0
#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_LEN 8
#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_LO_OFST 0
+#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_LO_LEN 4
+#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_LO_LBN 0
+#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_LO_WIDTH 32
#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_HI_OFST 4
+#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_HI_LEN 4
+#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_HI_LBN 32
+#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_HI_WIDTH 32
#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_NUM MC_CMD_FC_MAC_NSTATS_PER_BLOCK
/* MC_CMD_FC_OUT_MAC msgresponse */
@@ -1636,7 +1691,13 @@
#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_OFST 16
#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_LEN 8
#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_LO_OFST 16
+#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_LO_LEN 4
+#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_LO_LBN 128
+#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_LO_WIDTH 32
#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_HI_OFST 20
+#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_HI_LEN 4
+#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_HI_LBN 160
+#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_HI_WIDTH 32
#define MC_CMD_FC_OUT_FPGA_BUILD_REVISION_LO_OFST 24
#define MC_CMD_FC_OUT_FPGA_BUILD_REVISION_LO_LEN 4
#define MC_CMD_FC_OUT_FPGA_BUILD_REVISION_HI_OFST 28
@@ -1976,12 +2037,24 @@
#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_OFST 8
#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_LEN 8
#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_LO_OFST 8
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_LO_LEN 4
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_LO_LBN 64
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_LO_WIDTH 32
#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_HI_OFST 12
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_HI_LEN 4
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_HI_LBN 96
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_HI_WIDTH 32
/* Length of address map */
#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_OFST 16
#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_LEN 8
#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_LO_OFST 16
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_LO_LEN 4
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_LO_LBN 128
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_LO_WIDTH 32
#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_HI_OFST 20
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_HI_LEN 4
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_HI_LBN 160
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_HI_WIDTH 32
/* Component information field */
#define MC_CMD_FC_OUT_READ_MAP_INDEX_COMP_INFO_OFST 24
#define MC_CMD_FC_OUT_READ_MAP_INDEX_COMP_INFO_LEN 4
@@ -1989,7 +2062,13 @@
#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_OFST 28
#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_LEN 8
#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_LO_OFST 28
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_LO_LEN 4
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_LO_LBN 224
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_LO_WIDTH 32
#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_HI_OFST 32
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_HI_LEN 4
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_HI_LBN 256
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_HI_WIDTH 32
/* Name of the component */
#define MC_CMD_FC_OUT_READ_MAP_INDEX_NAME_OFST 36
#define MC_CMD_FC_OUT_READ_MAP_INDEX_NAME_LEN 1
@@ -2132,7 +2211,13 @@
#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_OFST 12
#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_LEN 8
#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_LO_OFST 12
+#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_LO_LEN 4
+#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_LO_LBN 96
+#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_LO_WIDTH 32
#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_HI_OFST 16
+#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_HI_LEN 4
+#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_HI_LBN 128
+#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_HI_WIDTH 32
/* MC_CMD_FC_OUT_UHLINK_RX_EYE msgresponse */
#define MC_CMD_FC_OUT_UHLINK_RX_EYE_LEN ((((0-1+(32*MC_CMD_FC_UHLINK_RX_EYE_PER_BLOCK))+1))>>3)
@@ -2153,7 +2238,13 @@
#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_OFST 4
#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_LEN 8
#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_LO_OFST 4
+#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_LO_LEN 4
+#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_LO_LBN 32
+#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_LO_WIDTH 32
#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_HI_OFST 8
+#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_HI_LEN 4
+#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_HI_LBN 64
+#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_HI_WIDTH 32
#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_NUM MC_CMD_FC_UHLINK_RX_EYE_PLOT_ROWS_PER_BLOCK
/* MC_CMD_FC_OUT_UHLINK_RX_TUNE msgresponse */
@@ -2222,12 +2313,24 @@
#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_OFST 4
#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_LEN 8
#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_LO_OFST 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_LO_LEN 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_LO_LBN 32
+#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_LO_WIDTH 32
#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_HI_OFST 8
+#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_HI_LEN 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_HI_LBN 64
+#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_HI_WIDTH 32
/* AOE address from which to transfer data */
#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_OFST 12
#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_LEN 8
#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_LO_OFST 12
+#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_LO_LEN 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_LO_LBN 96
+#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_LO_WIDTH 32
#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_HI_OFST 16
+#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_HI_LEN 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_HI_LBN 128
+#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_HI_WIDTH 32
/* Length of AOE transfer (total) */
#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_LENGTH_OFST 20
#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_LENGTH_LEN 4
@@ -2243,12 +2346,24 @@
#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_OFST 36
#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_LEN 8
#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_LO_OFST 36
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_LO_LEN 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_LO_LBN 288
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_LO_WIDTH 32
#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_HI_OFST 40
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_HI_LEN 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_HI_LBN 320
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_HI_WIDTH 32
/* When active, end read time */
#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_OFST 44
#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_LEN 8
#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_LO_OFST 44
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_LO_LEN 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_LO_LBN 352
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_LO_WIDTH 32
#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_HI_OFST 48
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_HI_LEN 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_HI_LBN 384
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_HI_WIDTH 32
/* MC_CMD_FC_OUT_LOG_ADDR_RANGE msgresponse */
#define MC_CMD_FC_OUT_LOG_ADDR_RANGE_LEN 0
@@ -2263,7 +2378,13 @@
#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_OFST 4
#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_LEN 8
#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_LO_OFST 4
+#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_LO_LEN 4
+#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_LO_LBN 32
+#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_LO_WIDTH 32
#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_HI_OFST 8
+#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_HI_LEN 4
+#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_HI_LBN 64
+#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_HI_WIDTH 32
#define MC_CMD_FC_OUT_CLOCK_GET_TIME_NANOSECONDS_OFST 12
#define MC_CMD_FC_OUT_CLOCK_GET_TIME_NANOSECONDS_LEN 4
#define MC_CMD_FC_OUT_CLOCK_GET_TIME_RANGE_OFST 16
@@ -2311,7 +2432,13 @@
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_OFST 0
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_LEN 8
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_LO_OFST 0
+#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_LO_LEN 4
+#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_LO_LBN 0
+#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_LO_WIDTH 32
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_HI_OFST 4
+#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_HI_LEN 4
+#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_HI_LBN 32
+#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_HI_WIDTH 32
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_MINNUM 0
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_MAXNUM 31
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_MAXNUM_MCDI2 127
@@ -2391,6 +2518,7 @@
* AOE operations on MC
*/
#define MC_CMD_AOE 0xa
+#define MC_CMD_AOE_MSGSET 0xa
/* MC_CMD_AOE_IN msgrequest */
#define MC_CMD_AOE_IN_LEN 4
@@ -2580,7 +2708,13 @@
#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_OFST 8
#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_LEN 8
#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_LO_OFST 8
+#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_LO_LEN 4
+#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_LO_LBN 64
+#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_HI_OFST 12
+#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_HI_LEN 4
+#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_HI_LBN 96
+#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_AOE_IN_MAC_STATS_CMD_OFST 16
#define MC_CMD_AOE_IN_MAC_STATS_CMD_LEN 4
#define MC_CMD_AOE_IN_MAC_STATS_DMA_OFST 16
@@ -3024,7 +3158,13 @@
#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_OFST 0
#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_LEN 8
#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_LO_OFST 0
+#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_LO_LEN 4
+#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_LO_LBN 0
+#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_LO_WIDTH 32
#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_HI_OFST 4
+#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_HI_LEN 4
+#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_HI_LBN 32
+#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_HI_WIDTH 32
#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS
/* MC_CMD_AOE_OUT_GET_PHY_MEDIA_INFO msgresponse */
diff --git a/drivers/common/sfc_efx/base/efx_regs_mcdi_strs.h b/drivers/common/sfc_efx/base/efx_regs_mcdi_strs.h
index be570bc0a..e8fbb6f94 100644
--- a/drivers/common/sfc_efx/base/efx_regs_mcdi_strs.h
+++ b/drivers/common/sfc_efx/base/efx_regs_mcdi_strs.h
@@ -6,7 +6,7 @@
/*
* This file is automatically generated. DO NOT EDIT IT.
- * To make changes, edit the .yml files in sfregistry under doc/mcdi/ and
+ * To make changes, edit the .yml files in smartnic_registry under doc/mcdi/ and
* rebuild this file with "make mcdi_headers_v5".
*
* The version of this file has MCDI strings really used in the libefx.
--
2.20.1
^ permalink raw reply [relevance 1%]
* [dpdk-dev] [dpdk-announce] DPDK 21.05 released
@ 2021-05-21 18:05 3% Thomas Monjalon
0 siblings, 0 replies; 200+ results
From: Thomas Monjalon @ 2021-05-21 18:05 UTC (permalink / raw)
To: announce
A new release is available:
https://fast.dpdk.org/rel/dpdk-21.05.tar.xz
It was a quite big cycle as usual with May releases:
1352 commits from 176 authors
2396 files changed, 134413 insertions(+), 63913 deletions(-)
It is not planned to start a maintenance branch for 21.05.
This version is ABI-compatible with 20.11 and 21.02.
Below are some new features:
* General
- compilation support for GCC 11, clang 12 and Alpine Linux
- mass renaming of lib directories
- allow disabling some libraries
- log names alignment and help command
- phase-fair lock
- Marvell CN10K driver
* Networking
- predictable RSS
- port representor syntax for sub-function and multi-host
- metering extended to flow rule matching
- packet integrity in flow rule matching
- TCP connection tracking offload with flow rule
- Windows support of ice, pcap and vmxnet3 drivers
More details in the release notes:
https://doc.dpdk.org/guides/rel_notes/release_21_05.html
There are 41 new contributors (including authors, reviewers and testers).
Welcome to Alexandre Ferrieux, Amir Shay, Ashish Paul, Ashwin Sekhar T K,
Chaoyong He, David Bouyeure, Dheemanth Mallikarjun, Elad Nachman,
Gabriel Ganne, Haifei Luo, Hengjian Zhang, Jie Wang, John Hurley,
Joshua Hay, Junjie Wan, Kai Ji, Kamil Vojanec, Kathleen Capella,
Keiichi Watanabe, Luc Pelletier, Maciej Machnikowski, Piotr Kubaj,
Pu Xu, Richael Zhuang, Robert Malz, Roy Shterman, Salem Sol,
Shay Agroskin, Shun Hao, Siwar Zitouni, Smadar Fuks, Sridhar Samudrala,
Srikanth Yalavarthi, Stanislaw Kardach, Stefan Wegrzyn, Tengfei Zhang,
Tianyu Li, Vidya Sagar Velumuri, Vishwas Danivas, Wenwu Ma and Yan Xia.
Below is the number of commits per employer (with authors count):
352 Intel (54)
262 Nvidia (24)
220 Huawei (9)
148 Marvell (18)
61 Broadcom (5)
60 Red Hat (5)
34 NXP (7)
31 Trustnet (1)
26 OKTET Labs (4)
21 Semihalf (2)
19 Microsoft (4)
16 Pensando (1)
14 BIFIT (1)
10 Xilinx (3)
9 Arm (6)
8 Emumba (1)
7 PANTHEON.tech (1)
7 Atomic Rules (1)
7 6WIND (4)
6 Alpine Linux (1)
4 Cisco (2)
3 IBM (2)
3 Amazon (2)
Based on Reviewed-by and Acked-by tags, the top non-PMD reviewers are:
46 Ferruh Yigit <ferruh.yigit@intel.com>
39 David Marchand <david.marchand@redhat.com>
34 Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
30 Bruce Richardson <bruce.richardson@intel.com>
27 Maxime Coquelin <maxime.coquelin@redhat.com>
26 Viacheslav Ovsiienko <viacheslavo@nvidia.com>
25 Akhil Goyal <gakhil@marvell.com>
23 Thomas Monjalon <thomas@monjalon.net>
22 Jerin Jacob <jerinj@marvell.com>
20 Ajit Khaparde <ajit.khaparde@broadcom.com>
18 Xiaoyun Li <xiaoyun.li@intel.com>
18 Anatoly Burakov <anatoly.burakov@intel.com>
16 Ori Kam <orika@nvidia.com>
12 Matan Azrad <matan@nvidia.com>
12 Konstantin Ananyev <konstantin.ananyev@intel.com>
12 Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
11 Olivier Matz <olivier.matz@6wind.com>
11 Hemant Agrawal <hemant.agrawal@nxp.com>
10 Ruifeng Wang <ruifeng.wang@arm.com>
The new features for 21.08 may be submitted during the next 12 days.
DPDK 21.08 should be released on early August, in a tight schedule:
http://core.dpdk.org/roadmap#dates
Please share your features roadmap.
Thanks everyone for allowing to close a great 21.05 on 21/05
^ permalink raw reply [relevance 3%]
* [dpdk-dev] [PATCH] version: 21.08-rc0
@ 2021-05-21 16:45 7% David Marchand
0 siblings, 0 replies; 200+ results
From: David Marchand @ 2021-05-21 16:45 UTC (permalink / raw)
To: dev; +Cc: thomas
Start a new release cycle with empty release notes.
Signed-off-by: David Marchand <david.marchand@redhat.com>
---
.github/workflows/build.yml | 2 +-
.travis.yml | 2 +-
ABI_VERSION | 2 +-
VERSION | 2 +-
doc/guides/rel_notes/index.rst | 1 +
doc/guides/rel_notes/release_21_08.rst | 138 +++++++++++++++++++++++++
6 files changed, 143 insertions(+), 4 deletions(-)
create mode 100644 doc/guides/rel_notes/release_21_08.rst
diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml
index d38feace69..7c4d6dcdbf 100644
--- a/.github/workflows/build.yml
+++ b/.github/workflows/build.yml
@@ -21,7 +21,7 @@ jobs:
CC: ccache ${{ matrix.config.compiler }}
DEF_LIB: ${{ matrix.config.library }}
LIBABIGAIL_VERSION: libabigail-1.8
- REF_GIT_TAG: v21.02
+ REF_GIT_TAG: v21.05
RUN_TESTS: ${{ contains(matrix.config.checks, 'tests') }}
strategy:
diff --git a/.travis.yml b/.travis.yml
index 898cffd998..5b702cc9bb 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -41,7 +41,7 @@ script: ./.ci/${TRAVIS_OS_NAME}-build.sh
env:
global:
- LIBABIGAIL_VERSION=libabigail-1.8
- - REF_GIT_TAG=v21.02
+ - REF_GIT_TAG=v21.05
jobs:
include:
diff --git a/ABI_VERSION b/ABI_VERSION
index c598172d8d..8e5954eb6f 100644
--- a/ABI_VERSION
+++ b/ABI_VERSION
@@ -1 +1 @@
-21.2
+21.3
diff --git a/VERSION b/VERSION
index 2b2dbfd3c8..1b43c9e062 100644
--- a/VERSION
+++ b/VERSION
@@ -1 +1 @@
-21.05.0
+21.08.0-rc0
diff --git a/doc/guides/rel_notes/index.rst b/doc/guides/rel_notes/index.rst
index 4c423c8d9a..9648ba60e1 100644
--- a/doc/guides/rel_notes/index.rst
+++ b/doc/guides/rel_notes/index.rst
@@ -8,6 +8,7 @@ Release Notes
:maxdepth: 1
:numbered:
+ release_21_08
release_21_05
release_21_02
release_20_11
diff --git a/doc/guides/rel_notes/release_21_08.rst b/doc/guides/rel_notes/release_21_08.rst
new file mode 100644
index 0000000000..a6ecfdf3ce
--- /dev/null
+++ b/doc/guides/rel_notes/release_21_08.rst
@@ -0,0 +1,138 @@
+.. SPDX-License-Identifier: BSD-3-Clause
+ Copyright 2021 The DPDK contributors
+
+.. include:: <isonum.txt>
+
+DPDK Release 21.08
+==================
+
+.. **Read this first.**
+
+ The text in the sections below explains how to update the release notes.
+
+ Use proper spelling, capitalization and punctuation in all sections.
+
+ Variable and config names should be quoted as fixed width text:
+ ``LIKE_THIS``.
+
+ Build the docs and view the output file to ensure the changes are correct::
+
+ make doc-guides-html
+ xdg-open build/doc/html/guides/rel_notes/release_21_08.html
+
+
+New Features
+------------
+
+.. This section should contain new features added in this release.
+ Sample format:
+
+ * **Add a title in the past tense with a full stop.**
+
+ Add a short 1-2 sentence description in the past tense.
+ The description should be enough to allow someone scanning
+ the release notes to understand the new feature.
+
+ If the feature adds a lot of sub-features you can use a bullet list
+ like this:
+
+ * Added feature foo to do something.
+ * Enhanced feature bar to do something else.
+
+ Refer to the previous release notes for examples.
+
+ Suggested order in release notes items:
+ * Core libs (EAL, mempool, ring, mbuf, buses)
+ * Device abstraction libs and PMDs (ordered alphabetically by vendor name)
+ - ethdev (lib, PMDs)
+ - cryptodev (lib, PMDs)
+ - eventdev (lib, PMDs)
+ - etc
+ * Other libs
+ * Apps, Examples, Tools (if significant)
+
+ This section is a comment. Do not overwrite or remove it.
+ Also, make sure to start the actual text at the margin.
+ =======================================================
+
+
+Removed Items
+-------------
+
+.. This section should contain removed items in this release. Sample format:
+
+ * Add a short 1-2 sentence description of the removed item
+ in the past tense.
+
+ This section is a comment. Do not overwrite or remove it.
+ Also, make sure to start the actual text at the margin.
+ =======================================================
+
+
+API Changes
+-----------
+
+.. This section should contain API changes. Sample format:
+
+ * sample: Add a short 1-2 sentence description of the API change
+ which was announced in the previous releases and made in this release.
+ Start with a scope label like "ethdev:".
+ Use fixed width quotes for ``function_names`` or ``struct_names``.
+ Use the past tense.
+
+ This section is a comment. Do not overwrite or remove it.
+ Also, make sure to start the actual text at the margin.
+ =======================================================
+
+
+ABI Changes
+-----------
+
+.. This section should contain ABI changes. Sample format:
+
+ * sample: Add a short 1-2 sentence description of the ABI change
+ which was announced in the previous releases and made in this release.
+ Start with a scope label like "ethdev:".
+ Use fixed width quotes for ``function_names`` or ``struct_names``.
+ Use the past tense.
+
+ This section is a comment. Do not overwrite or remove it.
+ Also, make sure to start the actual text at the margin.
+ =======================================================
+
+* No ABI change that would break compatibility with 20.11.
+
+
+Known Issues
+------------
+
+.. This section should contain new known issues in this release. Sample format:
+
+ * **Add title in present tense with full stop.**
+
+ Add a short 1-2 sentence description of the known issue
+ in the present tense. Add information on any known workarounds.
+
+ This section is a comment. Do not overwrite or remove it.
+ Also, make sure to start the actual text at the margin.
+ =======================================================
+
+
+Tested Platforms
+----------------
+
+.. This section should contain a list of platforms that were tested
+ with this release.
+
+ The format is:
+
+ * <vendor> platform with <vendor> <type of devices> combinations
+
+ * List of CPU
+ * List of OS
+ * List of devices
+ * Other relevant details...
+
+ This section is a comment. Do not overwrite or remove it.
+ Also, make sure to start the actual text at the margin.
+ =======================================================
--
2.23.0
^ permalink raw reply [relevance 7%]
* Re: [dpdk-dev] [PATCH] devtools: test different build types
2021-04-12 21:53 23% [dpdk-dev] [PATCH] devtools: test different build types Thomas Monjalon
@ 2021-05-21 15:03 0% ` David Marchand
0 siblings, 0 replies; 200+ results
From: David Marchand @ 2021-05-21 15:03 UTC (permalink / raw)
To: Thomas Monjalon; +Cc: dev, Bruce Richardson
On Mon, Apr 12, 2021 at 11:54 PM Thomas Monjalon <thomas@monjalon.net> wrote:
> @@ -213,9 +218,10 @@ for c in gcc clang ; do
> abicheck=ABI
init of buildtype var is missing here.
Rest lgtm.
> else
> abicheck=skipABI # save time and disk space
> + buildtype='--buildtype=minsize'
> fi
> export CC="$CCACHE $c"
> - build build-$c-$s $c $abicheck --default-library=$s
> + build build-$c-$s $c $abicheck $buildtype --default-library=$s
> unset CC
> done
> done
--
David Marchand
^ permalink raw reply [relevance 0%]
* [dpdk-dev] [PATCH v2] doc: update release notes for 21.05
2021-05-20 23:17 3% [dpdk-dev] [PATCH v1] doc: update release notes for 21.05 John McNamara
@ 2021-05-20 23:24 3% ` John McNamara
0 siblings, 0 replies; 200+ results
From: John McNamara @ 2021-05-20 23:24 UTC (permalink / raw)
To: dev; +Cc: thomas, John McNamara
Fix grammar, spelling and formatting of DPDK 21.05 release notes.
Signed-off-by: John McNamara <john.mcnamara@intel.com>
---
v2: rebased to main.
doc/guides/rel_notes/release_21_05.rst | 111 +++++++++++--------------
1 file changed, 49 insertions(+), 62 deletions(-)
diff --git a/doc/guides/rel_notes/release_21_05.rst b/doc/guides/rel_notes/release_21_05.rst
index 5ab7427918..9bd9f416c9 100644
--- a/doc/guides/rel_notes/release_21_05.rst
+++ b/doc/guides/rel_notes/release_21_05.rst
@@ -59,33 +59,33 @@ New Features
Added support for building with GCC 11.1.1 and clang 12.0.0.
-* **Added Alpine Linux with musl libc support**
+* **Added support for Alpine Linux with musl libc.**
- The distribution Alpine Linux, using musl libc and busybox,
- got initial support starting with building DPDK without modification.
+ Added initial support for building DPDK, without modification, on Alpine
+ Linux using musl libc and busybox.
* **Added phase-fair lock.**
- Phase-fair lock provides fairness guarantees.
+ Added support for a Phase-fair lock. This provides fairness guarantees.
It has two ticket pools, one for readers and one for writers.
* **Added support for Marvell CN10K SoC drivers.**
- Added Marvell CN10K SoC support. Marvell CN10K SoC are based on Octeon 10
- family of ARM64 processors with ARM Neoverse N2 core with accelerators for
+ Added Marvell CN10K SoC support. Marvell CN10K SoCs are based on the Octeon 10
+ family of ARM64 processors with the ARM Neoverse N2 core with accelerators for
packet processing, timers, cryptography, etc.
- * Added common/cnxk driver consisting of common API to be used by
- net, crypto and event PMD's.
+ * Added common/cnxk driver consisting of a common API to be used by
+ net, crypto and event PMDs.
* Added mempool/cnxk driver which provides the support for the integrated
mempool device.
- * Added event/cnxk driver which provides the support for integrated event
+ * Added event/cnxk driver which provides the support for the integrated event
device.
-* **Enhanced ethdev representor syntax.**
+* **Added enhanced ethdev representor syntax.**
* Introduced representor type of VF, SF and PF.
- * Supported sub-function and multi-host in representor syntax::
+ * Added support for sub-function and multi-host in representor syntax::
representor=# [0,2-4] /* Legacy VF compatible. */
representor=[[c#]pf#]vf# c1pf2vf3 /* VF 3 on PF 2 of controller 1. */
@@ -94,17 +94,17 @@ New Features
* **Added queue state in queried Rx/Tx queue info.**
- * Added new field ``queue_state`` to ``rte_eth_rxq_info`` structure to
- provide indicated Rx queue state.
- * Added new field ``queue_state`` to ``rte_eth_txq_info`` structure to
- provide indicated Tx queue state.
+ * Added new field ``queue_state`` to the ``rte_eth_rxq_info`` structure to
+ provide the indicated Rx queue state.
+ * Added new field ``queue_state`` to the ``rte_eth_txq_info`` structure to
+ provide the indicated Tx queue state.
* **Updated meter API.**
* Added packet mode in the meter profile parameters data structures
to support metering traffic by packet per second (PPS),
in addition to the initial bytes per second (BPS) mode (value 0).
- * Added support of pre-defined meter policy via flow action list per color.
+ * Added support for pre-defined meter policy via flow action list per color.
* **Added packet integrity match to flow rules.**
@@ -120,7 +120,7 @@ New Features
The new driver version (v2.3.0) introduced bug fixes and improvements,
including:
- * Changed memcpy mapping to the dpdk-optimized version.
+ * Changed memcpy() mapping to the dpdk-optimized version.
* Updated ena_com (HAL) to the latest version.
* Added indication of the RSS hash presence in the mbuf.
@@ -155,10 +155,10 @@ New Features
Updated the Intel iavf driver with new features and improvements, including:
- * Added flow filter to support GTPU inner L3/L4 fields matching.
+ * Added flow filter to support GTPU inner L3/L4 field matching.
* In AVX512 code, added the new RX and TX paths to use the HW offload
features. When the HW offload features are configured to be used, the
- offload paths are chosen automatically. In parallel the support of HW
+ offload paths are chosen automatically. In parallel the support for HW
offload features was removed from the legacy AVX512 paths.
* **Updated Intel ice driver.**
@@ -207,7 +207,8 @@ New Features
* **Enabled libpcap-based PMD on Windows.**
- A libpcap distribution, such as Npcap or WinPcap, is required to run the PMD.
+ Enabled libpcap-based PMD support on Windows.
+ A libpcap distribution, such as Npcap or WinPcap, is required to run the PMD.
* **Updated the AF_XDP driver.**
@@ -217,24 +218,24 @@ New Features
Added packed ring support for async vhost.
-* **Added support of multiple data-units in cryptodev API.**
+* **Added support of multiple data-units in the cryptodev API.**
The cryptodev library has been enhanced to allow operations on multiple
- data-units for AES-XTS algorithm, the data-unit length should be set in the
+ data-units for the AES-XTS algorithm. The data-unit length should be set in the
transformation. A capability for it was added too.
* **Added a cryptodev feature flag to support cipher wrapped keys.**
- A new feature flag has been added to allow application to provide
+ A new feature flag has been added to allow applications to provide
cipher wrapped keys in session xforms.
* **Updated the OCTEON TX crypto PMD.**
- * Added support for DIGEST_ENCRYPTED mode in OCTEON TX crypto PMD.
+ * Added support for ``DIGEST_ENCRYPTED`` mode in the OCTEON TX crypto PMD.
* **Updated the OCTEON TX2 crypto PMD.**
- * Added support for DIGEST_ENCRYPTED mode in OCTEON TX2 crypto PMD.
+ * Added support for ``DIGEST_ENCRYPTED`` mode in OCTEON TX2 crypto PMD.
* Added support in lookaside protocol offload mode for IPsec with
UDP encapsulation support for NAT Traversal.
* Added support in lookaside protocol offload mode for IPsec with
@@ -256,7 +257,7 @@ New Features
* **Added event device vector capability.**
- * Added ``rte_event_vector`` data structure which is capable of holding
+ * Added the ``rte_event_vector`` data structure which is capable of holding
multiple ``uintptr_t`` of the same flow thereby allowing applications
to vectorize their pipelines and also reduce the complexity of pipelining
the events across multiple stages.
@@ -264,7 +265,7 @@ New Features
* **Updated Intel DLB2 driver.**
- * Added support for v2.5 device.
+ * Added support for the DLB v2.5 device.
* **Added Predictable RSS functionality to the Toeplitz hash library.**
@@ -274,39 +275,40 @@ New Features
* **Updated testpmd.**
- * Added a command line option to configure forced speed for Ethernet port.
- ``dpdk-testpmd -- --eth-link-speed N``
- * Added command to show link flow control info.
- ``show port (port_id) flow_ctrl``
- * Added command to display Rx queue used descriptor count.
- ``show port (port_id) rxq (queue_id) desc used count``
- * Added command to cleanup a Tx queue's mbuf on a port.
- ``port cleanup (port_id) txq (queue_id) (free_cnt)``
- * Added command to dump internal representation information of single flow.
- ``flow dump (port_id) rule (rule_id)``
- * Added commands to create and delete meter policy.
- ``add port meter policy (port_id) (policy_id) ...``
+ * Added a command line option to configure forced speed for an Ethernet port:
+ ``dpdk-testpmd -- --eth-link-speed N``.
+ * Added command to show link flow control info:
+ ``show port (port_id) flow_ctrl``.
+ * Added command to display Rx queue used descriptor count:
+ ``show port (port_id) rxq (queue_id) desc used count``.
+ * Added command to cleanup a Tx queue's mbuf on a port:
+ ``port cleanup (port_id) txq (queue_id) (free_cnt)``.
+ * Added command to dump internal representation information of a single flow:
+ ``flow dump (port_id) rule (rule_id)``.
+ * Added commands to create and delete meter policy:
+ ``add port meter policy (port_id) (policy_id) ...``.
* Added commands to construct conntrack context and relevant indirect
action handle creation, update for conntrack action as well as conntrack
item matching.
* Added commands for action meter color to color the packet to reflect
- the meter color result.
- ``color type (green|yellow|red)``
+ the meter color result:
+ ``color type (green|yellow|red)``.
* **Added support for the FIB lookup method in the l3fwd example app.**
- Previously the l3fwd sample app only supported LPM and EM lookup methods,
- the app now supports the Forwarding Information Base (FIB) lookup method.
+ Added support to the l3fwd application to support the Forwarding Information
+ Base (FIB) lookup method. Previously l3fwd only supported the LPM and Exact
+ Match lookup methods.
-* **Updated ipsec-secgw sample application.**
+* **Updated the ipsec-secgw sample application.**
* Updated the ``ipsec-secgw`` sample application with UDP encapsulation
support for NAT Traversal.
* **Enhanced crypto adapter forward mode.**
- * Added ``rte_event_crypto_adapter_enqueue()`` API to enqueue events to crypto
- adapter if forward mode is supported by driver.
+ * Added ``rte_event_crypto_adapter_enqueue()`` API to enqueue events to the
+ crypto adapter if forward mode is supported by the driver.
* Added support for crypto adapter forward mode in octeontx2 event and crypto
device driver.
@@ -355,7 +357,7 @@ API Changes
and can be replaced with ``RTE_PCI_ANY_ID``.
* ethdev: Added a ``rte_flow`` pointer parameter to the function
- ``rte_flow_dev_dump()`` allowing dump for single flow.
+ ``rte_flow_dev_dump()`` allowing dumping of a single flow.
* cryptodev: The experimental raw data path API for dequeue
``rte_cryptodev_raw_dequeue_burst`` got a new parameter
@@ -412,21 +414,6 @@ ABI Changes
and was not for use by external applications.
-Known Issues
-------------
-
-.. This section should contain new known issues in this release. Sample format:
-
- * **Add title in present tense with full stop.**
-
- Add a short 1-2 sentence description of the known issue
- in the present tense. Add information on any known workarounds.
-
- This section is a comment. Do not overwrite or remove it.
- Also, make sure to start the actual text at the margin.
- =======================================================
-
-
Tested Platforms
----------------
--
2.25.1
^ permalink raw reply [relevance 3%]
* [dpdk-dev] [PATCH v1] doc: update release notes for 21.05
@ 2021-05-20 23:17 3% John McNamara
2021-05-20 23:24 3% ` [dpdk-dev] [PATCH v2] " John McNamara
0 siblings, 1 reply; 200+ results
From: John McNamara @ 2021-05-20 23:17 UTC (permalink / raw)
To: dev; +Cc: thomas, John McNamara
Fix grammar, spelling and formatting of DPDK 21.05 release notes.
Signed-off-by: John McNamara <john.mcnamara@intel.com>
---
doc/guides/rel_notes/release_21_05.rst | 111 +++++++++++--------------
1 file changed, 49 insertions(+), 62 deletions(-)
diff --git a/doc/guides/rel_notes/release_21_05.rst b/doc/guides/rel_notes/release_21_05.rst
index c66ab1d6a0..c425845734 100644
--- a/doc/guides/rel_notes/release_21_05.rst
+++ b/doc/guides/rel_notes/release_21_05.rst
@@ -55,33 +55,33 @@ New Features
Also, make sure to start the actual text at the margin.
=======================================================
-* **Added Alpine Linux with musl libc support**
+* **Added support for Alpine Linux with musl libc.**
- The distribution Alpine Linux, using musl libc and busybox,
- got initial support starting with building DPDK without modification.
+ Added initial support for building DPDK, without modification, on Alpine
+ Linux using musl libc and busybox.
* **Added phase-fair lock.**
- Phase-fair lock provides fairness guarantees.
+ Added support for a Phase-fair lock. This provides fairness guarantees.
It has two ticket pools, one for readers and one for writers.
* **Added support for Marvell CN10K SoC drivers.**
- Added Marvell CN10K SoC support. Marvell CN10K SoC are based on Octeon 10
- family of ARM64 processors with ARM Neoverse N2 core with accelerators for
+ Added Marvell CN10K SoC support. Marvell CN10K SoCs are based on the Octeon 10
+ family of ARM64 processors with the ARM Neoverse N2 core with accelerators for
packet processing, timers, cryptography, etc.
- * Added common/cnxk driver consisting of common API to be used by
- net, crypto and event PMD's.
+ * Added common/cnxk driver consisting of a common API to be used by
+ net, crypto and event PMDs.
* Added mempool/cnxk driver which provides the support for the integrated
mempool device.
- * Added event/cnxk driver which provides the support for integrated event
+ * Added event/cnxk driver which provides the support for the integrated event
device.
-* **Enhanced ethdev representor syntax.**
+* **Added enhanced ethdev representor syntax.**
* Introduced representor type of VF, SF and PF.
- * Supported sub-function and multi-host in representor syntax::
+ * Added support for sub-function and multi-host in representor syntax::
representor=# [0,2-4] /* Legacy VF compatible. */
representor=[[c#]pf#]vf# c1pf2vf3 /* VF 3 on PF 2 of controller 1. */
@@ -90,17 +90,17 @@ New Features
* **Added queue state in queried Rx/Tx queue info.**
- * Added new field ``queue_state`` to ``rte_eth_rxq_info`` structure to
- provide indicated Rx queue state.
- * Added new field ``queue_state`` to ``rte_eth_txq_info`` structure to
- provide indicated Tx queue state.
+ * Added new field ``queue_state`` to the ``rte_eth_rxq_info`` structure to
+ provide the indicated Rx queue state.
+ * Added new field ``queue_state`` to the ``rte_eth_txq_info`` structure to
+ provide the indicated Tx queue state.
* **Updated meter API.**
* Added packet mode in the meter profile parameters data structures
to support metering traffic by packet per second (PPS),
in addition to the initial bytes per second (BPS) mode (value 0).
- * Added support of pre-defined meter policy via flow action list per color.
+ * Added support for pre-defined meter policy via flow action list per color.
* **Added packet integrity match to flow rules.**
@@ -116,7 +116,7 @@ New Features
The new driver version (v2.3.0) introduced bug fixes and improvements,
including:
- * Changed memcpy mapping to the dpdk-optimized version.
+ * Changed memcpy() mapping to the dpdk-optimized version.
* Updated ena_com (HAL) to the latest version.
* Added indication of the RSS hash presence in the mbuf.
@@ -151,10 +151,10 @@ New Features
Updated the Intel iavf driver with new features and improvements, including:
- * Added flow filter to support GTPU inner L3/L4 fields matching.
+ * Added flow filter to support GTPU inner L3/L4 field matching.
* In AVX512 code, added the new RX and TX paths to use the HW offload
features. When the HW offload features are configured to be used, the
- offload paths are chosen automatically. In parallel the support of HW
+ offload paths are chosen automatically. In parallel the support for HW
offload features was removed from the legacy AVX512 paths.
* **Updated Intel ice driver.**
@@ -203,7 +203,8 @@ New Features
* **Enabled libpcap-based PMD on Windows.**
- A libpcap distribution, such as Npcap or WinPcap, is required to run the PMD.
+ Enabled libpcap-based PMD support on Windows.
+ A libpcap distribution, such as Npcap or WinPcap, is required to run the PMD.
* **Updated the AF_XDP driver.**
@@ -213,24 +214,24 @@ New Features
Added packed ring support for async vhost.
-* **Added support of multiple data-units in cryptodev API.**
+* **Added support of multiple data-units in the cryptodev API.**
The cryptodev library has been enhanced to allow operations on multiple
- data-units for AES-XTS algorithm, the data-unit length should be set in the
+ data-units for the AES-XTS algorithm. The data-unit length should be set in the
transformation. A capability for it was added too.
* **Added a cryptodev feature flag to support cipher wrapped keys.**
- A new feature flag has been added to allow application to provide
+ A new feature flag has been added to allow applications to provide
cipher wrapped keys in session xforms.
* **Updated the OCTEON TX crypto PMD.**
- * Added support for DIGEST_ENCRYPTED mode in OCTEON TX crypto PMD.
+ * Added support for ``DIGEST_ENCRYPTED`` mode in the OCTEON TX crypto PMD.
* **Updated the OCTEON TX2 crypto PMD.**
- * Added support for DIGEST_ENCRYPTED mode in OCTEON TX2 crypto PMD.
+ * Added support for ``DIGEST_ENCRYPTED`` mode in OCTEON TX2 crypto PMD.
* Added support in lookaside protocol offload mode for IPsec with
UDP encapsulation support for NAT Traversal.
* Added support in lookaside protocol offload mode for IPsec with
@@ -252,7 +253,7 @@ New Features
* **Added event device vector capability.**
- * Added ``rte_event_vector`` data structure which is capable of holding
+ * Added the ``rte_event_vector`` data structure which is capable of holding
multiple ``uintptr_t`` of the same flow thereby allowing applications
to vectorize their pipelines and also reduce the complexity of pipelining
the events across multiple stages.
@@ -260,7 +261,7 @@ New Features
* **Updated Intel DLB2 driver.**
- * Added support for v2.5 device.
+ * Added support for the DLB v2.5 device.
* **Added Predictable RSS functionality to the Toeplitz hash library.**
@@ -270,39 +271,40 @@ New Features
* **Updated testpmd.**
- * Added a command line option to configure forced speed for Ethernet port.
- ``dpdk-testpmd -- --eth-link-speed N``
- * Added command to show link flow control info.
- ``show port (port_id) flow_ctrl``
- * Added command to display Rx queue used descriptor count.
- ``show port (port_id) rxq (queue_id) desc used count``
- * Added command to cleanup a Tx queue's mbuf on a port.
- ``port cleanup (port_id) txq (queue_id) (free_cnt)``
- * Added command to dump internal representation information of single flow.
- ``flow dump (port_id) rule (rule_id)``
- * Added commands to create and delete meter policy.
- ``add port meter policy (port_id) (policy_id) ...``
+ * Added a command line option to configure forced speed for an Ethernet port:
+ ``dpdk-testpmd -- --eth-link-speed N``.
+ * Added command to show link flow control info:
+ ``show port (port_id) flow_ctrl``.
+ * Added command to display Rx queue used descriptor count:
+ ``show port (port_id) rxq (queue_id) desc used count``.
+ * Added command to cleanup a Tx queue's mbuf on a port:
+ ``port cleanup (port_id) txq (queue_id) (free_cnt)``.
+ * Added command to dump internal representation information of a single flow:
+ ``flow dump (port_id) rule (rule_id)``.
+ * Added commands to create and delete meter policy:
+ ``add port meter policy (port_id) (policy_id) ...``.
* Added commands to construct conntrack context and relevant indirect
action handle creation, update for conntrack action as well as conntrack
item matching.
* Added commands for action meter color to color the packet to reflect
- the meter color result.
- ``color type (green|yellow|red)``
+ the meter color result:
+ ``color type (green|yellow|red)``.
* **Added support for the FIB lookup method in the l3fwd example app.**
- Previously the l3fwd sample app only supported LPM and EM lookup methods,
- the app now supports the Forwarding Information Base (FIB) lookup method.
+ Added support to the l3fwd application to support the Forwarding Information
+ Base (FIB) lookup method. Previously l3fwd only supported the LPM and Exact
+ Match lookup methods.
-* **Updated ipsec-secgw sample application.**
+* **Updated the ipsec-secgw sample application.**
* Updated the ``ipsec-secgw`` sample application with UDP encapsulation
support for NAT Traversal.
* **Enhanced crypto adapter forward mode.**
- * Added ``rte_event_crypto_adapter_enqueue()`` API to enqueue events to crypto
- adapter if forward mode is supported by driver.
+ * Added ``rte_event_crypto_adapter_enqueue()`` API to enqueue events to the
+ crypto adapter if forward mode is supported by the driver.
* Added support for crypto adapter forward mode in octeontx2 event and crypto
device driver.
@@ -351,7 +353,7 @@ API Changes
and can be replaced with ``RTE_PCI_ANY_ID``.
* ethdev: Added a ``rte_flow`` pointer parameter to the function
- ``rte_flow_dev_dump()`` allowing dump for single flow.
+ ``rte_flow_dev_dump()`` allowing dumping of a single flow.
* cryptodev: The experimental raw data path API for dequeue
``rte_cryptodev_raw_dequeue_burst`` got a new parameter
@@ -408,21 +410,6 @@ ABI Changes
and was not for use by external applications.
-Known Issues
-------------
-
-.. This section should contain new known issues in this release. Sample format:
-
- * **Add title in present tense with full stop.**
-
- Add a short 1-2 sentence description of the known issue
- in the present tense. Add information on any known workarounds.
-
- This section is a comment. Do not overwrite or remove it.
- Also, make sure to start the actual text at the margin.
- =======================================================
-
-
Tested Platforms
----------------
--
2.25.1
^ permalink raw reply [relevance 3%]
* [dpdk-dev] DTS Workgroup: MoM 05/12/2021
@ 2021-05-19 5:02 3% Honnappa Nagarahalli
0 siblings, 0 replies; 200+ results
From: Honnappa Nagarahalli @ 2021-05-19 5:02 UTC (permalink / raw)
To: dev, juraj.linkes, Lijuan Tu; +Cc: nd
Attendees:
Aaron Conole
Daniel Martin Buckley
Honnappa Nagarahalli
Thomas Monjalon
Lijuan Tu
Juraj Linkes
Lincoln Lavoie
Owen Hilyard
The meeting announcements are sent to dev@dpdk.org.
Minutes:
1) Action items from the meeting held on 4/28
a) Juraj Linkes - Understand and discuss the patches that DTS applies on DPDK in the next call.
app/test-pmd/macfwd.c - a printf statement, can be provided by test-pmd 'show fdwstats' command.
fm10K - Might not be used anymore
ABI patch is not used in DTS - Documentation needs to be updated.
Many of the test cases use sed scripts to modify the code. These need to be explored further.
2) Agreed to create two lists of test cases - i) reviewed by DTS working group ii) non-reviewed test cases. This will help in introducing the test cases in stages without having to review the entire list.
3) Agreed to set up the meeting for the next 4 weeks.
4) Action Items
Honnappa - Validate test-pmd to make sure the mac-fwd printf statement output is available in 'show fwd stats'
Lijuan Tu - Check if the fm10K test case is still valid
Juraj Linkes - Explore the code modified using sed commands in various test cases.
5) The work item related discussions are captured in [1]
[1] https://docs.google.com/document/d/1c5S0_mZzFvzZfYkqyORLT2-qNvUb-fBdjA6DGusy4yM/edit?usp=sharing
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [PATCH v2] eal/rwlock: add note about writer starvation
@ 2021-05-12 19:10 0% ` Thomas Monjalon
0 siblings, 0 replies; 200+ results
From: Thomas Monjalon @ 2021-05-12 19:10 UTC (permalink / raw)
To: Stephen Hemminger
Cc: dev, Joyce Kong, konstantin.ananyev, Honnappa Nagarahalli
Ping for v3
12/02/2021 01:21, Honnappa Nagarahalli:
> <snip>
>
> >
> > 14/01/2021 17:55, Stephen Hemminger:
> > > The implementation of reader/writer locks in DPDK (from first release)
> > > is simple and fast. But it can lead to writer starvation issues.
> > >
> > > It is not easy to fix this without changing ABI and potentially
> > > breaking customer applications that are expect the unfair behavior.
> >
> > typo: "are expect"
> >
> > > The wikipedia page on reader-writer problem has a similar example
> > > which summarizes the problem pretty well.
> >
> > Maybe add the URL in the commit message?
> >
> > >
> > > Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
> > > ---
> > > --- a/lib/librte_eal/include/generic/rte_rwlock.h
> > > +++ b/lib/librte_eal/include/generic/rte_rwlock.h
> > > + * Note: This version of reader/writer locks is not fair because
> ^^^^^^ may be "implementation" would be better?
>
> > > + * readers do not block for pending writers. A stream of readers can
> > > + * subsequently lock out all potential writers and starve them.
> > > + * This is because after the first reader locks the resource,
> > > + * no writer can lock it. The writer will only be able to get the
> > > + lock
> > > + * when it will only be released by the last reader.
> This looks good. Though the writer starvation is prominent, the reader starvation is possible if there is a stream of writers when a writer holds the lock. Should we call this out too?
>
> >
> > You did not get review, probably because nobody was Cc'ed.
> > +Cc Honnappa, Joyce and Konstantin
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] dev Digest, Vol 348, Issue 163
[not found] <mailman.11957.1619175668.25471.dev@dpdk.org>
@ 2021-05-12 15:32 2% ` Dharmappa, Savinay
0 siblings, 0 replies; 200+ results
From: Dharmappa, Savinay @ 2021-05-12 15:32 UTC (permalink / raw)
To: dev
-----Original Message-----
From: dev <dev-bounces@dpdk.org> On Behalf Of dev-request@dpdk.org
Sent: Friday, April 23, 2021 4:31 PM
To: dev@dpdk.org
Subject: dev Digest, Vol 348, Issue 163
Send dev mailing list submissions to
dev@dpdk.org
To subscribe or unsubscribe via the World Wide Web, visit
https://mails.dpdk.org/listinfo/dev
or, via email, send a message with subject or body 'help' to
dev-request@dpdk.org
You can reach the person managing the list at
dev-owner@dpdk.org
When replying, please edit your Subject line so it is more specific than "Re: Contents of dev digest..."
Today's Topics:
1. Re: [PATCH] net/kni: check rte kni init result (Ferruh Yigit)
2. Re: [PATCH v3 2/2] lib/mempool: distinguish debug counters
from cache and pool (Kinsella, Ray)
3. Re: [PATCH v2 1/3] bus/pci: enable PCI master in command
register (Kinsella, Ray)
4. Re: [PATCH] doc: announce modification in eventdev structure
(Kinsella, Ray)
5. [PATCH 0/2] bugfix for sched (Min Hu (Connor))
6. [PATCH 1/2] lib/sched: fix return value judgment (Min Hu (Connor))
7. [PATCH 2/2] lib/sched: optimize exception handling code
(Min Hu (Connor))
----------------------------------------------------------------------
Message: 1
Date: Fri, 23 Apr 2021 11:17:07 +0100
From: Ferruh Yigit <ferruh.yigit@intel.com>
To: "Min Hu (Connor)" <humin29@huawei.com>, dev@dpdk.org
Subject: Re: [dpdk-dev] [PATCH] net/kni: check rte kni init result
Message-ID: <287cdaba-f3b8-141d-7b55-22ac09fa1f13@intel.com>
Content-Type: text/plain; charset=utf-8; format=flowed
On 4/21/2021 3:14 AM, Min Hu (Connor) wrote:
> From: Chengwen Feng <fengchengwen@huawei.com>
>
> This patch adds checking for rte_kni_init() result.
>
> Fixes: 75e2bc54c018 ("net/kni: add KNI PMD")
> Cc: stable@dpdk.org
>
> Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
> Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
------------------------------
Message: 2
Date: Fri, 23 Apr 2021 11:41:39 +0100
From: "Kinsella, Ray" <mdr@ashroe.eu>
To: Olivier Matz <olivier.matz@6wind.com>, Dharmik Thakkar
<dharmik.thakkar@arm.com>
Cc: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>, dev@dpdk.org,
nd@arm.com, joyce.kong@arm.com
Subject: Re: [dpdk-dev] [PATCH v3 2/2] lib/mempool: distinguish debug
counters from cache and pool
Message-ID: <d1e81798-e8b0-c8fb-eb8e-4c54e32f0d23@ashroe.eu>
Content-Type: text/plain; charset=utf-8
On 21/04/2021 17:29, Olivier Matz wrote:
> Hi Dharmik,
>
> Please see some comments below.
>
> On Mon, Apr 19, 2021 at 07:08:00PM -0500, Dharmik Thakkar wrote:
>> From: Joyce Kong <joyce.kong@arm.com>
>>
>> If cache is enabled, objects will be retrieved/put from/to cache,
>> subsequently from/to the common pool. Now the debug stats calculate
>> the objects retrieved/put from/to cache and pool together, it is
>> better to distinguish them.
>>
>> Signed-off-by: Joyce Kong <joyce.kong@arm.com>
>> Signed-off-by: Dharmik Thakkar <dharmik.thakkar@arm.com>
>> Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
>> Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
>> ---
>> lib/librte_mempool/rte_mempool.c | 24 ++++++++++++++++
>> lib/librte_mempool/rte_mempool.h | 47
>> ++++++++++++++++++++++----------
>> 2 files changed, 57 insertions(+), 14 deletions(-)
>>
>> diff --git a/lib/librte_mempool/rte_mempool.c
>> b/lib/librte_mempool/rte_mempool.c
>> index afb1239c8d48..339f14455624 100644
>> --- a/lib/librte_mempool/rte_mempool.c
>> +++ b/lib/librte_mempool/rte_mempool.c
>> @@ -1244,6 +1244,18 @@ rte_mempool_dump(FILE *f, struct rte_mempool *mp)
>> for (lcore_id = 0; lcore_id < RTE_MAX_LCORE; lcore_id++) {
>> sum.put_bulk += mp->stats[lcore_id].put_bulk;
>> sum.put_objs += mp->stats[lcore_id].put_objs;
>> + sum.put_common_pool_bulk +=
>> + mp->stats[lcore_id].put_common_pool_bulk;
>> + sum.put_common_pool_objs +=
>> + mp->stats[lcore_id].put_common_pool_objs;
>> + sum.put_cache_bulk += mp->stats[lcore_id].put_cache_bulk;
>> + sum.put_cache_objs += mp->stats[lcore_id].put_cache_objs;
>> + sum.get_common_pool_bulk +=
>> + mp->stats[lcore_id].get_common_pool_bulk;
>> + sum.get_common_pool_objs +=
>> + mp->stats[lcore_id].get_common_pool_objs;
>> + sum.get_cache_bulk += mp->stats[lcore_id].get_cache_bulk;
>> + sum.get_cache_objs += mp->stats[lcore_id].get_cache_objs;
>> sum.get_success_bulk += mp->stats[lcore_id].get_success_bulk;
>> sum.get_success_objs += mp->stats[lcore_id].get_success_objs;
>> sum.get_fail_bulk += mp->stats[lcore_id].get_fail_bulk;
>> @@ -1254,6 +1266,18 @@ rte_mempool_dump(FILE *f, struct rte_mempool *mp)
>> fprintf(f, " stats:\n");
>> fprintf(f, " put_bulk=%"PRIu64"\n", sum.put_bulk);
>> fprintf(f, " put_objs=%"PRIu64"\n", sum.put_objs);
>> + fprintf(f, " put_common_pool_bulk=%"PRIu64"\n",
>> + sum.put_common_pool_bulk);
>> + fprintf(f, " put_common_pool_objs=%"PRIu64"\n",
>> + sum.put_common_pool_objs);
>> + fprintf(f, " put_cache_bulk=%"PRIu64"\n", sum.put_cache_bulk);
>> + fprintf(f, " put_cache_objs=%"PRIu64"\n", sum.put_cache_objs);
>> + fprintf(f, " get_common_pool_bulk=%"PRIu64"\n",
>> + sum.get_common_pool_bulk);
>> + fprintf(f, " get_common_pool_objs=%"PRIu64"\n",
>> + sum.get_common_pool_objs);
>> + fprintf(f, " get_cache_bulk=%"PRIu64"\n", sum.get_cache_bulk);
>> + fprintf(f, " get_cache_objs=%"PRIu64"\n", sum.get_cache_objs);
>> fprintf(f, " get_success_bulk=%"PRIu64"\n", sum.get_success_bulk);
>> fprintf(f, " get_success_objs=%"PRIu64"\n", sum.get_success_objs);
>> fprintf(f, " get_fail_bulk=%"PRIu64"\n", sum.get_fail_bulk);
>> diff --git a/lib/librte_mempool/rte_mempool.h
>> b/lib/librte_mempool/rte_mempool.h
>> index 848a19226149..0959f8a3f367 100644
>> --- a/lib/librte_mempool/rte_mempool.h
>> +++ b/lib/librte_mempool/rte_mempool.h
>> @@ -66,12 +66,20 @@ extern "C" {
>> * A structure that stores the mempool statistics (per-lcore).
>> */
>> struct rte_mempool_debug_stats {
>> - uint64_t put_bulk; /**< Number of puts. */
>> - uint64_t put_objs; /**< Number of objects successfully put. */
>> - uint64_t get_success_bulk; /**< Successful allocation number. */
>> - uint64_t get_success_objs; /**< Objects successfully allocated. */
>> - uint64_t get_fail_bulk; /**< Failed allocation number. */
>> - uint64_t get_fail_objs; /**< Objects that failed to be allocated. */
>> + uint64_t put_bulk; /**< Number of puts. */
>> + uint64_t put_objs; /**< Number of objects successfully put. */
>> + uint64_t put_common_pool_bulk; /**< Number of bulks enqueued in common pool. */
>> + uint64_t put_common_pool_objs; /**< Number of objects enqueued in common pool. */
>> + uint64_t put_cache_bulk; /**< Number of bulks enqueued in cache. */
>> + uint64_t put_cache_objs; /**< Number of objects enqueued in cache. */
>> + uint64_t get_common_pool_bulk; /**< Number of bulks dequeued from common pool. */
>> + uint64_t get_common_pool_objs; /**< Number of objects dequeued from common pool. */
>> + uint64_t get_cache_bulk; /**< Number of bulks dequeued from cache. */
>> + uint64_t get_cache_objs; /**< Number of objects dequeued from cache. */
>> + uint64_t get_success_bulk; /**< Successful allocation number. */
>> + uint64_t get_success_objs; /**< Objects successfully allocated. */
>> + uint64_t get_fail_bulk; /**< Failed allocation number. */
>> + uint64_t get_fail_objs; /**< Objects that failed to be allocated. */
>
> I missed it the first time, but this changes the size of the
> rte_mempool_debug_stats structure. I think we don't care about this
> ABI breakage because this structure is only defined if
> RTE_LIBRTE_MEMPOOL_DEBUG is set. But just in case, adding Ray as Cc.
Agreed, if it is just a debugging non-default feature.
> About the field themselves, I'm not certain that there is an added
> value to have stats for cache gets and puts. My feeling is that the
> important stat to monitor is the access to common pool, because it is
> the one that highlights a possible performance impact (contention).
> The cache stats are more or less equal to "success + fail - common".
> Moreover, it will simplify the patch and avoid risks of mistakes.
>
> What do you think?
>
>> /** Successful allocation number of contiguous blocks. */
>> uint64_t get_success_blks;
>> /** Failed allocation number of contiguous blocks. */ @@ -699,10
>> +707,18 @@ rte_mempool_ops_dequeue_bulk(struct rte_mempool *mp,
>> void **obj_table, unsigned n)
>> {
>> struct rte_mempool_ops *ops;
>> + int ret;
>>
>> rte_mempool_trace_ops_dequeue_bulk(mp, obj_table, n);
>> ops = rte_mempool_get_ops(mp->ops_index);
>> - return ops->dequeue(mp, obj_table, n);
>> + ret = ops->dequeue(mp, obj_table, n);
>> + if (ret == 0) {
>> + __MEMPOOL_STAT_ADD(mp, get_common_pool_bulk, 1);
>> + __MEMPOOL_STAT_ADD(mp, get_common_pool_objs, n);
>> + __MEMPOOL_STAT_ADD(mp, get_success_bulk, 1);
>> + __MEMPOOL_STAT_ADD(mp, get_success_objs, n);
>> + }
>> + return ret;
>> }
>>
>> /**
>> @@ -749,6 +765,8 @@ rte_mempool_ops_enqueue_bulk(struct rte_mempool
>> *mp, void * const *obj_table, {
>> struct rte_mempool_ops *ops;
>>
>> + __MEMPOOL_STAT_ADD(mp, put_common_pool_bulk, 1);
>> + __MEMPOOL_STAT_ADD(mp, put_common_pool_objs, n);
>> rte_mempool_trace_ops_enqueue_bulk(mp, obj_table, n);
>> ops = rte_mempool_get_ops(mp->ops_index);
>> return ops->enqueue(mp, obj_table, n); @@ -1297,14 +1315,18 @@
>> __mempool_generic_put(struct rte_mempool *mp, void * const
>> *obj_table,
>>
>> /* Add elements back into the cache */
>> rte_memcpy(&cache_objs[0], obj_table, sizeof(void *) * n);
>> -
>> cache->len += n;
>>
>> + __MEMPOOL_STAT_ADD(mp, put_cache_bulk, 1);
>> +
>> if (cache->len >= cache->flushthresh) {
>> + __MEMPOOL_STAT_ADD(mp, put_cache_objs,
>> + n - (cache->len - cache->size));
>> rte_mempool_ops_enqueue_bulk(mp, &cache->objs[cache->size],
>> cache->len - cache->size);
>> cache->len = cache->size;
>> - }
>> + } else
>> + __MEMPOOL_STAT_ADD(mp, put_cache_objs, n);
>>
>
> In case we keep cache stats, I'd add {} after the else to be
> consistent with the if().
>
>> return;
>>
>> @@ -1438,8 +1460,8 @@ __mempool_generic_get(struct rte_mempool *mp,
>> void **obj_table,
>>
>> cache->len -= n;
>>
>> - __MEMPOOL_STAT_ADD(mp, get_success_bulk, 1);
>> - __MEMPOOL_STAT_ADD(mp, get_success_objs, n);
>> + __MEMPOOL_STAT_ADD(mp, get_cache_bulk, 1);
>> + __MEMPOOL_STAT_ADD(mp, get_cache_objs, n);
>
> In case we keep cache stats, I don't think we should remove
> get_success stats increment. Else, the success stats will never be
> incremented when retrieving objects from the cache.
>
>
>>
>> return 0;
>>
>> @@ -1451,9 +1473,6 @@ __mempool_generic_get(struct rte_mempool *mp, void **obj_table,
>> if (ret < 0) {
>> __MEMPOOL_STAT_ADD(mp, get_fail_bulk, 1);
>> __MEMPOOL_STAT_ADD(mp, get_fail_objs, n);
>> - } else {
>> - __MEMPOOL_STAT_ADD(mp, get_success_bulk, 1);
>> - __MEMPOOL_STAT_ADD(mp, get_success_objs, n);
>> }
>>
>> return ret;
>> --
>> 2.17.1
>>
------------------------------
Message: 3
Date: Fri, 23 Apr 2021 11:43:58 +0100
From: "Kinsella, Ray" <mdr@ashroe.eu>
To: Haiyue Wang <haiyue.wang@intel.com>, dev@dpdk.org
Cc: qi.z.zhang@intel.com, liang-min.wang@intel.com, Neil Horman
<nhorman@tuxdriver.com>, Gaetan Rivet <grive@u256.net>
Subject: Re: [dpdk-dev] [PATCH v2 1/3] bus/pci: enable PCI master in
command register
Message-ID: <1c9d285c-81c6-a977-682a-473e691abda0@ashroe.eu>
Content-Type: text/plain; charset=utf-8
On 22/04/2021 02:18, Haiyue Wang wrote:
> This adds the support to set 'Bus Master Enable' bit in the PCI command
> register.
>
> Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
> Tested-by: Qi Zhang <qi.z.zhang@intel.com>
> ---
> drivers/bus/pci/pci_common.c | 20 ++++++++++++++++++++
> drivers/bus/pci/rte_bus_pci.h | 12 ++++++++++++
> drivers/bus/pci/version.map | 1 +
> lib/pci/rte_pci.h | 4 ++++
> 4 files changed, 37 insertions(+)
>
> diff --git a/drivers/bus/pci/pci_common.c b/drivers/bus/pci/pci_common.c
> index ee7f96635..b631cb9c7 100644
> --- a/drivers/bus/pci/pci_common.c
> +++ b/drivers/bus/pci/pci_common.c
> @@ -746,6 +746,26 @@ rte_pci_find_ext_capability(struct rte_pci_device *dev, uint32_t cap)
> return 0;
> }
>
> +int
> +rte_pci_enable_bus_master(struct rte_pci_device *dev)
> +{
> + uint16_t cmd;
> +
> + if (rte_pci_read_config(dev, &cmd, sizeof(cmd), RTE_PCI_COMMAND) < 0) {
> + RTE_LOG(ERR, EAL, "error in reading PCI command register\n");
> + return -1;
> + }
> +
> + cmd |= RTE_PCI_COMMAND_MASTER;
> +
> + if (rte_pci_write_config(dev, &cmd, sizeof(cmd), RTE_PCI_COMMAND) < 0) {
> + RTE_LOG(ERR, EAL, "error in writing PCI command register\n");
> + return -1;
> + }
> +
> + return 0;
> +}
> +
> struct rte_pci_bus rte_pci_bus = {
> .bus = {
> .scan = rte_pci_scan,
> diff --git a/drivers/bus/pci/rte_bus_pci.h b/drivers/bus/pci/rte_bus_pci.h
> index 64886b473..83caf477b 100644
> --- a/drivers/bus/pci/rte_bus_pci.h
> +++ b/drivers/bus/pci/rte_bus_pci.h
> @@ -249,6 +249,18 @@ void rte_pci_dump(FILE *f);
> __rte_experimental
> off_t rte_pci_find_ext_capability(struct rte_pci_device *dev, uint32_t cap);
>
> +/**
> + * Enables Bus Master for device's PCI command register.
> + *
> + * @param dev
> + * A pointer to rte_pci_device structure.
> + *
> + * @return
> + * 0 on success, -1 on error in PCI config space read/write.
> + */
> +__rte_experimental
> +int rte_pci_enable_bus_master(struct rte_pci_device *dev);
> +
> /**
> * Register a PCI driver.
> *
> diff --git a/drivers/bus/pci/version.map b/drivers/bus/pci/version.map
> index f33ed0abd..b271e48a8 100644
> --- a/drivers/bus/pci/version.map
> +++ b/drivers/bus/pci/version.map
> @@ -20,5 +20,6 @@ DPDK_21 {
> EXPERIMENTAL {
> global:
>
Please annotate when the symbol was added.
> + rte_pci_enable_bus_master;
> rte_pci_find_ext_capability;
> };
> diff --git a/lib/pci/rte_pci.h b/lib/pci/rte_pci.h
> index a8f8e404a..1f33d687f 100644
> --- a/lib/pci/rte_pci.h
> +++ b/lib/pci/rte_pci.h
> @@ -32,6 +32,10 @@ extern "C" {
>
> #define RTE_PCI_VENDOR_ID 0x00 /* 16 bits */
> #define RTE_PCI_DEVICE_ID 0x02 /* 16 bits */
> +#define RTE_PCI_COMMAND 0x04 /* 16 bits */
> +
> +/* PCI Command Register */
> +#define RTE_PCI_COMMAND_MASTER 0x4 /* Bus Master Enable */
>
> /* PCI Express capability registers */
> #define RTE_PCI_EXP_DEVCTL 8 /* Device Control */
>
------------------------------
Message: 4
Date: Fri, 23 Apr 2021 11:53:19 +0100
From: "Kinsella, Ray" <mdr@ashroe.eu>
To: gakhil@marvell.com, jerinj@marvell.com, thomas@monjalon.net,
dev@dpdk.org, david.marchand@redhat.com
Cc: abhinandan.gujjar@intel.com, hemant.agrawal@nxp.com,
nipun.gupta@nxp.com, sachin.saxena@oss.nxp.com, anoobj@marvell.com,
matan@nvidia.com, roy.fan.zhang@intel.com, g.singh@nxp.com,
erik.g.carrillo@intel.com, jay.jayatheerthan@intel.com,
pbhagavatula@marvell.com, harry.van.haaren@intel.com,
sthotton@marvell.com
Subject: Re: [dpdk-dev] [PATCH] doc: announce modification in eventdev
structure
Message-ID: <347ace77-7704-5ac4-7dd9-0cabe88dfce0@ashroe.eu>
Content-Type: text/plain; charset=utf-8
On 15/04/2021 10:08, gakhil@marvell.com wrote:
> From: Akhil Goyal <gakhil@marvell.com>
>
> A new field ``ca_enqueue`` is added in ``rte_eventdev``
> in the end to maintain ABI. It needs to be moved above
> in the structure to align with other enqueue callbacks.
>
> Signed-off-by: Akhil Goyal <gakhil@marvell.com>
> ---
> doc/guides/rel_notes/deprecation.rst | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/doc/guides/rel_notes/deprecation.rst b/doc/guides/rel_notes/deprecation.rst
> index 2afc84c39..a973de4a9 100644
> --- a/doc/guides/rel_notes/deprecation.rst
> +++ b/doc/guides/rel_notes/deprecation.rst
> @@ -127,6 +127,10 @@ Deprecation Notices
> values to the function ``rte_event_eth_rx_adapter_queue_add`` using
> the structure ``rte_event_eth_rx_adapter_queue_add``.
>
> +* eventdev: The function pointer ``ca_enqueue`` in structure ``rte_eventdev``
> + will be moved after ``txa_enqueue`` so that all enqueue/dequeue
> + function pointers are adjacent to each other.
> +
> * sched: To allow more traffic classes, flexible mapping of pipe queues to
> traffic classes, and subport level configuration of pipes and queues
> changes will be made to macros, data structures and API functions defined
>
I admire the disipline - but since you are not actually removing ca_enqueue,
just moving it in memory when the new ABI is declared in anycase, this is not required.
Thanks,
Ray K
------------------------------
Message: 5
Date: Fri, 23 Apr 2021 19:01:10 +0800
From: "Min Hu (Connor)" <humin29@huawei.com>
To: <dev@dpdk.org>
Cc: <ferruh.yigit@intel.com>, <cristian.dumitrescu@intel.com>,
<jasvinder.singh@intel.com>
Subject: [dpdk-dev] [PATCH 0/2] bugfix for sched
Message-ID: <1619175672-20016-1-git-send-email-humin29@huawei.com>
Content-Type: text/plain
This patch set contains two bugfixes for sched.
Huisong Li (2):
lib/sched: fix return value judgment
lib/sched: optimize exception handling code
lib/sched/rte_sched.c | 60 +++++++++++++++++++++++++++------------------------
1 file changed, 32 insertions(+), 28 deletions(-)
--
2.7.4
------------------------------
Message: 6
Date: Fri, 23 Apr 2021 19:01:11 +0800
From: "Min Hu (Connor)" <humin29@huawei.com>
To: <dev@dpdk.org>
Cc: <ferruh.yigit@intel.com>, <cristian.dumitrescu@intel.com>,
<jasvinder.singh@intel.com>
Subject: [dpdk-dev] [PATCH 1/2] lib/sched: fix return value judgment
Message-ID: <1619175672-20016-2-git-send-email-humin29@huawei.com>
Content-Type: text/plain
From: Huisong Li <lihuisong@huawei.com>
This patch fixes return value judgment when allocate memory to store the
subport profile, and releases memory of 'rte_sched_port' if code fails to
apply for this memory.
Fixes: 0ea4c6afcaf1 ("sched: add subport profile table")
Cc: stable@dpdk.org
Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
---
lib/sched/rte_sched.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/lib/sched/rte_sched.c b/lib/sched/rte_sched.c
index cd87e68..df0ab5c 100644
--- a/lib/sched/rte_sched.c
+++ b/lib/sched/rte_sched.c
@@ -961,9 +961,9 @@ rte_sched_port_config(struct rte_sched_port_params *params)
/* Allocate memory to store the subport profile */
port->subport_profiles = rte_zmalloc_socket("subport_profile", size2,
RTE_CACHE_LINE_SIZE, params->socket);
- if (port == NULL) {
+ if (port->subport_profiles == NULL) {
RTE_LOG(ERR, SCHED, "%s: Memory allocation fails\n", __func__);
-
+ rte_free(port);
return NULL;
}
--
2.7.4
Ack <savinay.dharmappa@intel.com>
------------------------------
Message: 7
Date: Fri, 23 Apr 2021 19:01:12 +0800
From: "Min Hu (Connor)" <humin29@huawei.com>
To: <dev@dpdk.org>
Cc: <ferruh.yigit@intel.com>, <cristian.dumitrescu@intel.com>,
<jasvinder.singh@intel.com>
Subject: [dpdk-dev] [PATCH 2/2] lib/sched: optimize exception handling
code
Message-ID: <1619175672-20016-3-git-send-email-humin29@huawei.com>
Content-Type: text/plain
From: Huisong Li <lihuisong@huawei.com>
Currently, rte_sched_free_memory() is called multiple times by the
exception handling code in rte_sched_subport_config() and
rte_sched_pipe_config().
This patch optimizes them into a unified outlet to free memory.
Fixes: ac6fcb841b0f ("sched: update subport rate dynamically")
Fixes: 34a90f86657c ("sched: modify pipe functions for config flexibility")
Fixes: ce7c4fd7c2ac ("sched: add pipe config to subport level")
Cc: stable@dpdk.org
Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
---
lib/sched/rte_sched.c | 56 +++++++++++++++++++++++++++------------------------
1 file changed, 30 insertions(+), 26 deletions(-)
diff --git a/lib/sched/rte_sched.c b/lib/sched/rte_sched.c
index df0ab5c..a858f61 100644
--- a/lib/sched/rte_sched.c
+++ b/lib/sched/rte_sched.c
@@ -1090,6 +1090,7 @@ rte_sched_subport_config(struct rte_sched_port *port,
uint32_t n_subport_pipe_queues, i;
uint32_t size0, size1, bmp_mem_size;
int status;
+ int ret;
/* Check user parameters */
if (port == NULL) {
@@ -1101,17 +1102,16 @@ rte_sched_subport_config(struct rte_sched_port *port,
if (subport_id >= port->n_subports_per_port) {
RTE_LOG(ERR, SCHED,
"%s: Incorrect value for subport id\n", __func__);
-
- rte_sched_free_memory(port, n_subports);
- return -EINVAL;
+ ret = -EINVAL;
+ goto out;
}
if (subport_profile_id >= port->n_max_subport_profiles) {
RTE_LOG(ERR, SCHED, "%s: "
"Number of subport profile exceeds the max limit\n",
__func__);
- rte_sched_free_memory(port, n_subports);
- return -EINVAL;
+ ret = -EINVAL;
+ goto out;
}
/** Memory is allocated only on first invocation of the api for a
@@ -1127,9 +1127,8 @@ rte_sched_subport_config(struct rte_sched_port *port,
RTE_LOG(NOTICE, SCHED,
"%s: Port scheduler params check failed (%d)\n",
__func__, status);
-
- rte_sched_free_memory(port, n_subports);
- return -EINVAL;
+ ret = -EINVAL;
+ goto out;
}
/* Determine the amount of memory to allocate */
@@ -1143,9 +1142,8 @@ rte_sched_subport_config(struct rte_sched_port *port,
if (s == NULL) {
RTE_LOG(ERR, SCHED,
"%s: Memory allocation fails\n", __func__);
-
- rte_sched_free_memory(port, n_subports);
- return -ENOMEM;
+ ret = -ENOMEM;
+ goto out;
}
n_subports++;
@@ -1185,12 +1183,11 @@ rte_sched_subport_config(struct rte_sched_port *port,
params->red_params[i][j].min_th,
params->red_params[i][j].max_th,
params->red_params[i][j].maxp_inv) != 0) {
- rte_sched_free_memory(port, n_subports);
-
RTE_LOG(NOTICE, SCHED,
"%s: RED configuration init fails\n",
__func__);
- return -EINVAL;
+ ret = -EINVAL;
+ goto out;
}
}
}
@@ -1238,9 +1235,8 @@ rte_sched_subport_config(struct rte_sched_port *port,
if (s->bmp == NULL) {
RTE_LOG(ERR, SCHED,
"%s: Subport bitmap init error\n", __func__);
-
- rte_sched_free_memory(port, n_subports);
- return -EINVAL;
+ ret = -EINVAL;
+ goto out;
}
for (i = 0; i < RTE_SCHED_PORT_N_GRINDERS; i++)
@@ -1285,6 +1281,11 @@ rte_sched_subport_config(struct rte_sched_port *port,
rte_sched_port_log_subport_profile(port, subport_profile_id);
return 0;
+
+out:
+ rte_sched_free_memory(port, n_subports);
+
+ return ret;
}
int
@@ -1299,6 +1300,7 @@ rte_sched_pipe_config(struct rte_sched_port *port,
struct rte_sched_pipe_profile *params;
uint32_t n_subports = subport_id + 1;
uint32_t deactivate, profile, i;
+ int ret;
/* Check user parameters */
profile = (uint32_t) pipe_profile;
@@ -1313,26 +1315,23 @@ rte_sched_pipe_config(struct rte_sched_port *port,
if (subport_id >= port->n_subports_per_port) {
RTE_LOG(ERR, SCHED,
"%s: Incorrect value for parameter subport id\n", __func__);
-
- rte_sched_free_memory(port, n_subports);
- return -EINVAL;
+ ret = -EINVAL;
+ goto out;
}
s = port->subports[subport_id];
if (pipe_id >= s->n_pipes_per_subport_enabled) {
RTE_LOG(ERR, SCHED,
"%s: Incorrect value for parameter pipe id\n", __func__);
-
- rte_sched_free_memory(port, n_subports);
- return -EINVAL;
+ ret = -EINVAL;
+ goto out;
}
if (!deactivate && profile >= s->n_pipe_profiles) {
RTE_LOG(ERR, SCHED,
"%s: Incorrect value for parameter pipe profile\n", __func__);
-
- rte_sched_free_memory(port, n_subports);
- return -EINVAL;
+ ret = -EINVAL;
+ goto out;
}
sp = port->subport_profiles + s->profile;
@@ -1406,6 +1405,11 @@ rte_sched_pipe_config(struct rte_sched_port *port,
}
return 0;
+
+out:
+ rte_sched_free_memory(port, n_subports);
+
+ return ret;
}
int
--
2.7.4
End of dev Digest, Vol 348, Issue 163
*************************************
^ permalink raw reply [relevance 2%]
* Re: [dpdk-dev] [PATCH v4 3/3] vhost: fix offload flags in Rx path
2021-05-08 6:24 0% ` Wang, Yinan
@ 2021-05-12 3:29 0% ` Wang, Yinan
0 siblings, 0 replies; 200+ results
From: Wang, Yinan @ 2021-05-12 3:29 UTC (permalink / raw)
To: Wang, Yinan, David Marchand, dev
Cc: maxime.coquelin, olivier.matz, fbl, i.maximets, Xia, Chenbo,
Stokes, Ian, stable, Jijiang Liu, Yuanhan Liu
Hi David,
Since vhost tx offload can’t work now, we report a Bugzilla as below, could you help to take a look?
https://bugs.dpdk.org/show_bug.cgi?id=702
We also tried vhost example with VM2VM iperf test, large pkts also can't forwarding.
BR,
Yinan
> -----Original Message-----
> From: dev <dev-bounces@dpdk.org> On Behalf Of Wang, Yinan
> Sent: 2021?5?8? 14:24
> To: David Marchand <david.marchand@redhat.com>; dev@dpdk.org
> Cc: maxime.coquelin@redhat.com; olivier.matz@6wind.com;
> fbl@sysclose.org; i.maximets@ovn.org; Xia, Chenbo
> <chenbo.xia@intel.com>; Stokes, Ian <ian.stokes@intel.com>;
> stable@dpdk.org; Jijiang Liu <jijiang.liu@intel.com>; Yuanhan Liu
> <yuanhan.liu@linux.intel.com>
> Subject: Re: [dpdk-dev] [PATCH v4 3/3] vhost: fix offload flags in Rx path
>
> Hi David,
>
> May I know how to configures Tx offloading by testpmd, could you help to
> provide an example case?
> I add a case which need vhost tx offload (TSO/cksum) function, this case
> can't work with the patch, could you use this case as the example if possible?
>
> For example: VM2VM split ring vhost-user/virtio-net test with tcp traffic
> ==========================================================
> ===============
>
> 1. Launch the Vhost sample on socket 0 by below commands::
>
> rm -rf vhost-net*
> ./dpdk-testpmd -l 2-4 -n 4 --no-pci --file-prefix=vhost --vdev
> 'net_vhost0,iface=vhost-net0,queues=1' \
> --vdev 'net_vhost1,iface=vhost-net1,queues=1' -- -i --nb-cores=2 --
> txd=1024 --rxd=1024
> testpmd>start
>
> 2. Launch VM1 and VM2 on socket 1::
>
> taskset -c 32 qemu-system-x86_64 -name vm1 -enable-kvm -cpu host -
> smp 1 -m 4096 \
> -object memory-backend-file,id=mem,size=4096M,mem-
> path=/mnt/huge,share=on \
> -numa node,memdev=mem -mem-prealloc -drive
> file=/home/osimg/ubuntu20-04.img \
> -chardev socket,path=/tmp/vm2_qga0.sock,server,nowait,id=vm2_qga0
> -device virtio-serial \
> -device virtserialport,chardev=vm2_qga0,name=org.qemu.guest_agent.2
> -daemonize \
> -monitor unix:/tmp/vm2_monitor.sock,server,nowait -device
> e1000,netdev=nttsip1 \
> -netdev user,id=nttsip1,hostfwd=tcp:127.0.0.1:6002-:22 \
> -chardev socket,id=char0,path=./vhost-net0 \
> -netdev type=vhost-user,id=netdev0,chardev=char0,vhostforce \
> -device virtio-net-pci,netdev=netdev0,mac=52:54:00:00:00:01,disable-
> modern=false,mrg_rxbuf=on,csum=on,guest_csum=on,host_tso4=on,guest
> _tso4=on,guest_ecn=on -vnc :10
>
> taskset -c 33 qemu-system-x86_64 -name vm2 -enable-kvm -cpu host -
> smp 1 -m 4096 \
> -object memory-backend-file,id=mem,size=4096M,mem-
> path=/mnt/huge,share=on \
> -numa node,memdev=mem -mem-prealloc -drive
> file=/home/osimg/ubuntu20-04-2.img \
> -chardev socket,path=/tmp/vm2_qga0.sock,server,nowait,id=vm2_qga0
> -device virtio-serial \
> -device virtserialport,chardev=vm2_qga0,name=org.qemu.guest_agent.2
> -daemonize \
> -monitor unix:/tmp/vm2_monitor.sock,server,nowait -device
> e1000,netdev=nttsip1 \
> -netdev user,id=nttsip1,hostfwd=tcp:127.0.0.1:6003-:22 \
> -chardev socket,id=char0,path=./vhost-net1 \
> -netdev type=vhost-user,id=netdev0,chardev=char0,vhostforce \
> -device virtio-net-pci,netdev=netdev0,mac=52:54:00:00:00:02,disable-
> modern=false,mrg_rxbuf=on,csum=on,guest_csum=on,host_tso4=on,guest
> _tso4=on,guest_ecn=on -vnc :12
>
> 3. On VM1, set virtio device IP and run arp protocal::
>
> ifconfig ens5 1.1.1.2
> arp -s 1.1.1.8 52:54:00:00:00:02
>
> 4. On VM2, set virtio device IP and run arp protocal::
>
> ifconfig ens5 1.1.1.8
> arp -s 1.1.1.2 52:54:00:00:00:01
>
> 5. Check the iperf performance with different packet size between two VMs
> by below commands::
>
> Under VM1, run: `iperf -s -i 1`
> Under VM2, run: `iperf -c 1.1.1.2 -i 1 -t 60`
>
> BR,
> Yinan
>
> > -----Original Message-----
> > From: dev <dev-bounces@dpdk.org> On Behalf Of David Marchand
> > Sent: 2021?5?4? 0:44
> > To: dev@dpdk.org
> > Cc: maxime.coquelin@redhat.com; olivier.matz@6wind.com;
> > fbl@sysclose.org; i.maximets@ovn.org; Xia, Chenbo
> > <chenbo.xia@intel.com>; Stokes, Ian <ian.stokes@intel.com>;
> > stable@dpdk.org; Jijiang Liu <jijiang.liu@intel.com>; Yuanhan Liu
> > <yuanhan.liu@linux.intel.com>
> > Subject: [dpdk-dev] [PATCH v4 3/3] vhost: fix offload flags in Rx path
> >
> > The vhost library currently configures Tx offloading (PKT_TX_*) on any
> > packet received from a guest virtio device which asks for some offloading.
> >
> > This is problematic, as Tx offloading is something that the application
> > must ask for: the application needs to configure devices
> > to support every used offloads (ip, tcp checksumming, tso..), and the
> > various l2/l3/l4 lengths must be set following any processing that
> > happened in the application itself.
> >
> > On the other hand, the received packets are not marked wrt current
> > packet l3/l4 checksumming info.
> >
> > Copy virtio rx processing to fix those offload flags with some
> > differences:
> > - accept VIRTIO_NET_HDR_GSO_ECN and VIRTIO_NET_HDR_GSO_UDP,
> > - ignore anything but the VIRTIO_NET_HDR_F_NEEDS_CSUM flag (to
> comply
> > with
> > the virtio spec),
> >
> > Some applications might rely on the current behavior, so it is left
> > untouched by default.
> > A new RTE_VHOST_USER_NET_COMPLIANT_OL_FLAGS flag is added to
> > enable the
> > new behavior.
> >
> > The vhost example has been updated for the new behavior: TSO is applied
> > to
> > any packet marked LRO.
> >
> > Fixes: 859b480d5afd ("vhost: add guest offload setting")
> > Cc: stable@dpdk.org
> >
> > Signed-off-by: David Marchand <david.marchand@redhat.com>
> > Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
> > ---
> > Changes since v3:
> > - rebased on next-virtio,
> >
> > Changes since v2:
> > - introduced a new flag to keep existing behavior as the default,
> > - packets with unrecognised offload are passed to the application with no
> > offload metadata rather than dropped,
> > - ignored VIRTIO_NET_HDR_F_DATA_VALID since the virtio spec states
> that
> > the virtio driver is not allowed to use this flag when transmitting
> > packets,
> >
> > Changes since v1:
> > - updated vhost example,
> > - restored VIRTIO_NET_HDR_GSO_ECN and VIRTIO_NET_HDR_GSO_UDP
> > support,
> > - restored log on buggy offload request,
> >
> > ---
> > doc/guides/prog_guide/vhost_lib.rst | 12 ++
> > doc/guides/rel_notes/release_21_05.rst | 6 +
> > drivers/net/vhost/rte_eth_vhost.c | 2 +-
> > examples/vhost/main.c | 44 +++---
> > lib/vhost/rte_vhost.h | 1 +
> > lib/vhost/socket.c | 5 +-
> > lib/vhost/vhost.c | 6 +-
> > lib/vhost/vhost.h | 14 +-
> > lib/vhost/virtio_net.c | 185 ++++++++++++++++++++++---
> > 9 files changed, 222 insertions(+), 53 deletions(-)
> >
> > diff --git a/doc/guides/prog_guide/vhost_lib.rst
> > b/doc/guides/prog_guide/vhost_lib.rst
> > index 7afa351675..d18fb98910 100644
> > --- a/doc/guides/prog_guide/vhost_lib.rst
> > +++ b/doc/guides/prog_guide/vhost_lib.rst
> > @@ -118,6 +118,18 @@ The following is an overview of some key Vhost
> > API functions:
> >
> > It is disabled by default.
> >
> > + - ``RTE_VHOST_USER_NET_COMPLIANT_OL_FLAGS``
> > +
> > + Since v16.04, the vhost library forwards checksum and gso requests
> for
> > + packets received from a virtio driver by filling Tx offload metadata in
> > + the mbuf. This behavior is inconsistent with other drivers but it is left
> > + untouched for existing applications that might rely on it.
> > +
> > + This flag disables the legacy behavior and instead ask vhost to simply
> > + populate Rx offload metadata in the mbuf.
> > +
> > + It is disabled by default.
> > +
> > * ``rte_vhost_driver_set_features(path, features)``
> >
> > This function sets the feature bits the vhost-user driver supports. The
> > diff --git a/doc/guides/rel_notes/release_21_05.rst
> > b/doc/guides/rel_notes/release_21_05.rst
> > index a5f21f8425..6b7b0810a5 100644
> > --- a/doc/guides/rel_notes/release_21_05.rst
> > +++ b/doc/guides/rel_notes/release_21_05.rst
> > @@ -337,6 +337,12 @@ API Changes
> > ``policer_action_recolor_supported`` and
> > ``policer_action_drop_supported``
> > have been removed.
> >
> > +* vhost: The vhost library currently populates received mbufs from a
> virtio
> > + driver with Tx offload flags while not filling Rx offload flags.
> > + While this behavior is arguable, it is kept untouched.
> > + A new flag ``RTE_VHOST_USER_NET_COMPLIANT_OL_FLAGS`` has been
> > added to ask
> > + for a behavior compliant with to the mbuf offload API.
> > +
> >
> > ABI Changes
> > -----------
> > diff --git a/drivers/net/vhost/rte_eth_vhost.c
> > b/drivers/net/vhost/rte_eth_vhost.c
> > index d198fc8a8e..281379d6a3 100644
> > --- a/drivers/net/vhost/rte_eth_vhost.c
> > +++ b/drivers/net/vhost/rte_eth_vhost.c
> > @@ -1505,7 +1505,7 @@ rte_pmd_vhost_probe(struct rte_vdev_device
> > *dev)
> > int ret = 0;
> > char *iface_name;
> > uint16_t queues;
> > - uint64_t flags = 0;
> > + uint64_t flags = RTE_VHOST_USER_NET_COMPLIANT_OL_FLAGS;
> > uint64_t disable_flags = 0;
> > int client_mode = 0;
> > int iommu_support = 0;
> > diff --git a/examples/vhost/main.c b/examples/vhost/main.c
> > index 0bee1f3321..d2179eadb9 100644
> > --- a/examples/vhost/main.c
> > +++ b/examples/vhost/main.c
> > @@ -19,6 +19,7 @@
> > #include <rte_log.h>
> > #include <rte_string_fns.h>
> > #include <rte_malloc.h>
> > +#include <rte_net.h>
> > #include <rte_vhost.h>
> > #include <rte_ip.h>
> > #include <rte_tcp.h>
> > @@ -1029,33 +1030,34 @@ find_local_dest(struct vhost_dev *vdev,
> > struct rte_mbuf *m,
> > return 0;
> > }
> >
> > -static uint16_t
> > -get_psd_sum(void *l3_hdr, uint64_t ol_flags)
> > -{
> > - if (ol_flags & PKT_TX_IPV4)
> > - return rte_ipv4_phdr_cksum(l3_hdr, ol_flags);
> > - else /* assume ethertype == RTE_ETHER_TYPE_IPV6 */
> > - return rte_ipv6_phdr_cksum(l3_hdr, ol_flags);
> > -}
> > -
> > static void virtio_tx_offload(struct rte_mbuf *m)
> > {
> > + struct rte_net_hdr_lens hdr_lens;
> > + struct rte_ipv4_hdr *ipv4_hdr;
> > + struct rte_tcp_hdr *tcp_hdr;
> > + uint32_t ptype;
> > void *l3_hdr;
> > - struct rte_ipv4_hdr *ipv4_hdr = NULL;
> > - struct rte_tcp_hdr *tcp_hdr = NULL;
> > - struct rte_ether_hdr *eth_hdr =
> > - rte_pktmbuf_mtod(m, struct rte_ether_hdr *);
> >
> > - l3_hdr = (char *)eth_hdr + m->l2_len;
> > + ptype = rte_net_get_ptype(m, &hdr_lens, RTE_PTYPE_ALL_MASK);
> > + m->l2_len = hdr_lens.l2_len;
> > + m->l3_len = hdr_lens.l3_len;
> > + m->l4_len = hdr_lens.l4_len;
> >
> > - if (m->ol_flags & PKT_TX_IPV4) {
> > + l3_hdr = rte_pktmbuf_mtod_offset(m, void *, m->l2_len);
> > + tcp_hdr = rte_pktmbuf_mtod_offset(m, struct rte_tcp_hdr *,
> > + m->l2_len + m->l3_len);
> > +
> > + m->ol_flags |= PKT_TX_TCP_SEG;
> > + if ((ptype & RTE_PTYPE_L3_MASK) == RTE_PTYPE_L3_IPV4) {
> > + m->ol_flags |= PKT_TX_IPV4;
> > + m->ol_flags |= PKT_TX_IP_CKSUM;
> > ipv4_hdr = l3_hdr;
> > ipv4_hdr->hdr_checksum = 0;
> > - m->ol_flags |= PKT_TX_IP_CKSUM;
> > + tcp_hdr->cksum = rte_ipv4_phdr_cksum(l3_hdr, m-
> > >ol_flags);
> > + } else { /* assume ethertype == RTE_ETHER_TYPE_IPV6 */
> > + m->ol_flags |= PKT_TX_IPV6;
> > + tcp_hdr->cksum = rte_ipv6_phdr_cksum(l3_hdr, m-
> > >ol_flags);
> > }
> > -
> > - tcp_hdr = (struct rte_tcp_hdr *)((char *)l3_hdr + m->l3_len);
> > - tcp_hdr->cksum = get_psd_sum(l3_hdr, m->ol_flags);
> > }
> >
> > static __rte_always_inline void
> > @@ -1148,7 +1150,7 @@ virtio_tx_route(struct vhost_dev *vdev, struct
> > rte_mbuf *m, uint16_t vlan_tag)
> > m->vlan_tci = vlan_tag;
> > }
> >
> > - if (m->ol_flags & PKT_TX_TCP_SEG)
> > + if (m->ol_flags & PKT_RX_LRO)
> > virtio_tx_offload(m);
> >
> > tx_q->m_table[tx_q->len++] = m;
> > @@ -1633,7 +1635,7 @@ main(int argc, char *argv[])
> > int ret, i;
> > uint16_t portid;
> > static pthread_t tid;
> > - uint64_t flags = 0;
> > + uint64_t flags = RTE_VHOST_USER_NET_COMPLIANT_OL_FLAGS;
> >
> > signal(SIGINT, sigint_handler);
> >
> > diff --git a/lib/vhost/rte_vhost.h b/lib/vhost/rte_vhost.h
> > index d0a8ae31f2..8d875e9322 100644
> > --- a/lib/vhost/rte_vhost.h
> > +++ b/lib/vhost/rte_vhost.h
> > @@ -36,6 +36,7 @@ extern "C" {
> > /* support only linear buffers (no chained mbufs) */
> > #define RTE_VHOST_USER_LINEARBUF_SUPPORT (1ULL << 6)
> > #define RTE_VHOST_USER_ASYNC_COPY (1ULL << 7)
> > +#define RTE_VHOST_USER_NET_COMPLIANT_OL_FLAGS (1ULL << 8)
> >
> > /* Features. */
> > #ifndef VIRTIO_NET_F_GUEST_ANNOUNCE
> > diff --git a/lib/vhost/socket.c b/lib/vhost/socket.c
> > index 0169d36481..5d0d728d52 100644
> > --- a/lib/vhost/socket.c
> > +++ b/lib/vhost/socket.c
> > @@ -42,6 +42,7 @@ struct vhost_user_socket {
> > bool extbuf;
> > bool linearbuf;
> > bool async_copy;
> > + bool net_compliant_ol_flags;
> >
> > /*
> > * The "supported_features" indicates the feature bits the
> > @@ -224,7 +225,8 @@ vhost_user_add_connection(int fd, struct
> > vhost_user_socket *vsocket)
> > size = strnlen(vsocket->path, PATH_MAX);
> > vhost_set_ifname(vid, vsocket->path, size);
> >
> > - vhost_set_builtin_virtio_net(vid, vsocket->use_builtin_virtio_net);
> > + vhost_setup_virtio_net(vid, vsocket->use_builtin_virtio_net,
> > + vsocket->net_compliant_ol_flags);
> >
> > vhost_attach_vdpa_device(vid, vsocket->vdpa_dev);
> >
> > @@ -877,6 +879,7 @@ rte_vhost_driver_register(const char *path,
> > uint64_t flags)
> > vsocket->extbuf = flags & RTE_VHOST_USER_EXTBUF_SUPPORT;
> > vsocket->linearbuf = flags &
> > RTE_VHOST_USER_LINEARBUF_SUPPORT;
> > vsocket->async_copy = flags & RTE_VHOST_USER_ASYNC_COPY;
> > + vsocket->net_compliant_ol_flags = flags &
> > RTE_VHOST_USER_NET_COMPLIANT_OL_FLAGS;
> >
> > if (vsocket->async_copy &&
> > (flags & (RTE_VHOST_USER_IOMMU_SUPPORT |
> > diff --git a/lib/vhost/vhost.c b/lib/vhost/vhost.c
> > index c9b6379f73..9abfc0bfe7 100644
> > --- a/lib/vhost/vhost.c
> > +++ b/lib/vhost/vhost.c
> > @@ -752,7 +752,7 @@ vhost_set_ifname(int vid, const char *if_name,
> > unsigned int if_len)
> > }
> >
> > void
> > -vhost_set_builtin_virtio_net(int vid, bool enable)
> > +vhost_setup_virtio_net(int vid, bool enable, bool compliant_ol_flags)
> > {
> > struct virtio_net *dev = get_device(vid);
> >
> > @@ -763,6 +763,10 @@ vhost_set_builtin_virtio_net(int vid, bool
> enable)
> > dev->flags |= VIRTIO_DEV_BUILTIN_VIRTIO_NET;
> > else
> > dev->flags &= ~VIRTIO_DEV_BUILTIN_VIRTIO_NET;
> > + if (!compliant_ol_flags)
> > + dev->flags |= VIRTIO_DEV_LEGACY_OL_FLAGS;
> > + else
> > + dev->flags &= ~VIRTIO_DEV_LEGACY_OL_FLAGS;
> > }
> >
> > void
> > diff --git a/lib/vhost/vhost.h b/lib/vhost/vhost.h
> > index b303635645..8078ddff79 100644
> > --- a/lib/vhost/vhost.h
> > +++ b/lib/vhost/vhost.h
> > @@ -27,15 +27,17 @@
> > #include "rte_vhost_async.h"
> >
> > /* Used to indicate that the device is running on a data core */
> > -#define VIRTIO_DEV_RUNNING 1
> > +#define VIRTIO_DEV_RUNNING ((uint32_t)1 << 0)
> > /* Used to indicate that the device is ready to operate */
> > -#define VIRTIO_DEV_READY 2
> > +#define VIRTIO_DEV_READY ((uint32_t)1 << 1)
> > /* Used to indicate that the built-in vhost net device backend is enabled
> */
> > -#define VIRTIO_DEV_BUILTIN_VIRTIO_NET 4
> > +#define VIRTIO_DEV_BUILTIN_VIRTIO_NET ((uint32_t)1 << 2)
> > /* Used to indicate that the device has its own data path and configured
> */
> > -#define VIRTIO_DEV_VDPA_CONFIGURED 8
> > +#define VIRTIO_DEV_VDPA_CONFIGURED ((uint32_t)1 << 3)
> > /* Used to indicate that the feature negotiation failed */
> > -#define VIRTIO_DEV_FEATURES_FAILED 16
> > +#define VIRTIO_DEV_FEATURES_FAILED ((uint32_t)1 << 4)
> > +/* Used to indicate that the virtio_net tx code should fill TX ol_flags */
> > +#define VIRTIO_DEV_LEGACY_OL_FLAGS ((uint32_t)1 << 5)
> >
> > /* Backend value set by guest. */
> > #define VIRTIO_DEV_STOPPED -1
> > @@ -683,7 +685,7 @@ int alloc_vring_queue(struct virtio_net *dev,
> > uint32_t vring_idx);
> > void vhost_attach_vdpa_device(int vid, struct rte_vdpa_device *dev);
> >
> > void vhost_set_ifname(int, const char *if_name, unsigned int if_len);
> > -void vhost_set_builtin_virtio_net(int vid, bool enable);
> > +void vhost_setup_virtio_net(int vid, bool enable, bool legacy_ol_flags);
> > void vhost_enable_extbuf(int vid);
> > void vhost_enable_linearbuf(int vid);
> > int vhost_enable_guest_notification(struct virtio_net *dev,
> > diff --git a/lib/vhost/virtio_net.c b/lib/vhost/virtio_net.c
> > index 1a34867f3c..8e36f4c340 100644
> > --- a/lib/vhost/virtio_net.c
> > +++ b/lib/vhost/virtio_net.c
> > @@ -8,6 +8,7 @@
> >
> > #include <rte_mbuf.h>
> > #include <rte_memcpy.h>
> > +#include <rte_net.h>
> > #include <rte_ether.h>
> > #include <rte_ip.h>
> > #include <rte_vhost.h>
> > @@ -2303,15 +2304,12 @@ parse_ethernet(struct rte_mbuf *m,
> uint16_t
> > *l4_proto, void **l4_hdr)
> > }
> >
> > static __rte_always_inline void
> > -vhost_dequeue_offload(struct virtio_net_hdr *hdr, struct rte_mbuf *m)
> > +vhost_dequeue_offload_legacy(struct virtio_net_hdr *hdr, struct
> > rte_mbuf *m)
> > {
> > uint16_t l4_proto = 0;
> > void *l4_hdr = NULL;
> > struct rte_tcp_hdr *tcp_hdr = NULL;
> >
> > - if (hdr->flags == 0 && hdr->gso_type ==
> > VIRTIO_NET_HDR_GSO_NONE)
> > - return;
> > -
> > parse_ethernet(m, &l4_proto, &l4_hdr);
> > if (hdr->flags == VIRTIO_NET_HDR_F_NEEDS_CSUM) {
> > if (hdr->csum_start == (m->l2_len + m->l3_len)) {
> > @@ -2356,6 +2354,94 @@ vhost_dequeue_offload(struct virtio_net_hdr
> > *hdr, struct rte_mbuf *m)
> > }
> > }
> >
> > +static __rte_always_inline void
> > +vhost_dequeue_offload(struct virtio_net_hdr *hdr, struct rte_mbuf *m,
> > + bool legacy_ol_flags)
> > +{
> > + struct rte_net_hdr_lens hdr_lens;
> > + int l4_supported = 0;
> > + uint32_t ptype;
> > +
> > + if (hdr->flags == 0 && hdr->gso_type ==
> > VIRTIO_NET_HDR_GSO_NONE)
> > + return;
> > +
> > + if (legacy_ol_flags) {
> > + vhost_dequeue_offload_legacy(hdr, m);
> > + return;
> > + }
> > +
> > + m->ol_flags |= PKT_RX_IP_CKSUM_UNKNOWN;
> > +
> > + ptype = rte_net_get_ptype(m, &hdr_lens, RTE_PTYPE_ALL_MASK);
> > + m->packet_type = ptype;
> > + if ((ptype & RTE_PTYPE_L4_MASK) == RTE_PTYPE_L4_TCP ||
> > + (ptype & RTE_PTYPE_L4_MASK) == RTE_PTYPE_L4_UDP ||
> > + (ptype & RTE_PTYPE_L4_MASK) == RTE_PTYPE_L4_SCTP)
> > + l4_supported = 1;
> > +
> > + /* According to Virtio 1.1 spec, the device only needs to look at
> > + * VIRTIO_NET_HDR_F_NEEDS_CSUM in the packet transmission
> > path.
> > + * This differs from the processing incoming packets path where the
> > + * driver could rely on VIRTIO_NET_HDR_F_DATA_VALID flag set by
> > the
> > + * device.
> > + *
> > + * 5.1.6.2.1 Driver Requirements: Packet Transmission
> > + * The driver MUST NOT set the VIRTIO_NET_HDR_F_DATA_VALID
> > and
> > + * VIRTIO_NET_HDR_F_RSC_INFO bits in flags.
> > + *
> > + * 5.1.6.2.2 Device Requirements: Packet Transmission
> > + * The device MUST ignore flag bits that it does not recognize.
> > + */
> > + if (hdr->flags & VIRTIO_NET_HDR_F_NEEDS_CSUM) {
> > + uint32_t hdrlen;
> > +
> > + hdrlen = hdr_lens.l2_len + hdr_lens.l3_len + hdr_lens.l4_len;
> > + if (hdr->csum_start <= hdrlen && l4_supported != 0) {
> > + m->ol_flags |= PKT_RX_L4_CKSUM_NONE;
> > + } else {
> > + /* Unknown proto or tunnel, do sw cksum. We can
> > assume
> > + * the cksum field is in the first segment since the
> > + * buffers we provided to the host are large enough.
> > + * In case of SCTP, this will be wrong since it's a CRC
> > + * but there's nothing we can do.
> > + */
> > + uint16_t csum = 0, off;
> > +
> > + if (rte_raw_cksum_mbuf(m, hdr->csum_start,
> > + rte_pktmbuf_pkt_len(m) - hdr-
> > >csum_start, &csum) < 0)
> > + return;
> > + if (likely(csum != 0xffff))
> > + csum = ~csum;
> > + off = hdr->csum_offset + hdr->csum_start;
> > + if (rte_pktmbuf_data_len(m) >= off + 1)
> > + *rte_pktmbuf_mtod_offset(m, uint16_t *,
> > off) = csum;
> > + }
> > + }
> > +
> > + if (hdr->gso_type != VIRTIO_NET_HDR_GSO_NONE) {
> > + if (hdr->gso_size == 0)
> > + return;
> > +
> > + switch (hdr->gso_type & ~VIRTIO_NET_HDR_GSO_ECN) {
> > + case VIRTIO_NET_HDR_GSO_TCPV4:
> > + case VIRTIO_NET_HDR_GSO_TCPV6:
> > + if ((ptype & RTE_PTYPE_L4_MASK) !=
> > RTE_PTYPE_L4_TCP)
> > + break;
> > + m->ol_flags |= PKT_RX_LRO |
> > PKT_RX_L4_CKSUM_NONE;
> > + m->tso_segsz = hdr->gso_size;
> > + break;
> > + case VIRTIO_NET_HDR_GSO_UDP:
> > + if ((ptype & RTE_PTYPE_L4_MASK) !=
> > RTE_PTYPE_L4_UDP)
> > + break;
> > + m->ol_flags |= PKT_RX_LRO |
> > PKT_RX_L4_CKSUM_NONE;
> > + m->tso_segsz = hdr->gso_size;
> > + break;
> > + default:
> > + break;
> > + }
> > + }
> > +}
> > +
> > static __rte_noinline void
> > copy_vnet_hdr_from_desc(struct virtio_net_hdr *hdr,
> > struct buf_vector *buf_vec)
> > @@ -2380,7 +2466,8 @@ copy_vnet_hdr_from_desc(struct
> virtio_net_hdr
> > *hdr,
> > static __rte_always_inline int
> > copy_desc_to_mbuf(struct virtio_net *dev, struct vhost_virtqueue *vq,
> > struct buf_vector *buf_vec, uint16_t nr_vec,
> > - struct rte_mbuf *m, struct rte_mempool *mbuf_pool)
> > + struct rte_mbuf *m, struct rte_mempool *mbuf_pool,
> > + bool legacy_ol_flags)
> > {
> > uint32_t buf_avail, buf_offset;
> > uint64_t buf_addr, buf_len;
> > @@ -2513,7 +2600,7 @@ copy_desc_to_mbuf(struct virtio_net *dev,
> > struct vhost_virtqueue *vq,
> > m->pkt_len += mbuf_offset;
> >
> > if (hdr)
> > - vhost_dequeue_offload(hdr, m);
> > + vhost_dequeue_offload(hdr, m, legacy_ol_flags);
> >
> > out:
> >
> > @@ -2606,9 +2693,11 @@ virtio_dev_pktmbuf_alloc(struct virtio_net
> > *dev, struct rte_mempool *mp,
> > return pkt;
> > }
> >
> > -static __rte_noinline uint16_t
> > +__rte_always_inline
> > +static uint16_t
> > virtio_dev_tx_split(struct virtio_net *dev, struct vhost_virtqueue *vq,
> > - struct rte_mempool *mbuf_pool, struct rte_mbuf **pkts, uint16_t
> > count)
> > + struct rte_mempool *mbuf_pool, struct rte_mbuf **pkts, uint16_t
> > count,
> > + bool legacy_ol_flags)
> > {
> > uint16_t i;
> > uint16_t free_entries;
> > @@ -2668,7 +2757,7 @@ virtio_dev_tx_split(struct virtio_net *dev,
> struct
> > vhost_virtqueue *vq,
> > }
> >
> > err = copy_desc_to_mbuf(dev, vq, buf_vec, nr_vec, pkts[i],
> > - mbuf_pool);
> > + mbuf_pool, legacy_ol_flags);
> > if (unlikely(err)) {
> > rte_pktmbuf_free(pkts[i]);
> > if (!allocerr_warned) {
> > @@ -2696,6 +2785,24 @@ virtio_dev_tx_split(struct virtio_net *dev,
> > struct vhost_virtqueue *vq,
> > return (i - dropped);
> > }
> >
> > +__rte_noinline
> > +static uint16_t
> > +virtio_dev_tx_split_legacy(struct virtio_net *dev,
> > + struct vhost_virtqueue *vq, struct rte_mempool *mbuf_pool,
> > + struct rte_mbuf **pkts, uint16_t count)
> > +{
> > + return virtio_dev_tx_split(dev, vq, mbuf_pool, pkts, count, true);
> > +}
> > +
> > +__rte_noinline
> > +static uint16_t
> > +virtio_dev_tx_split_compliant(struct virtio_net *dev,
> > + struct vhost_virtqueue *vq, struct rte_mempool *mbuf_pool,
> > + struct rte_mbuf **pkts, uint16_t count)
> > +{
> > + return virtio_dev_tx_split(dev, vq, mbuf_pool, pkts, count, false);
> > +}
> > +
> > static __rte_always_inline int
> > vhost_reserve_avail_batch_packed(struct virtio_net *dev,
> > struct vhost_virtqueue *vq,
> > @@ -2770,7 +2877,8 @@ vhost_reserve_avail_batch_packed(struct
> > virtio_net *dev,
> > static __rte_always_inline int
> > virtio_dev_tx_batch_packed(struct virtio_net *dev,
> > struct vhost_virtqueue *vq,
> > - struct rte_mbuf **pkts)
> > + struct rte_mbuf **pkts,
> > + bool legacy_ol_flags)
> > {
> > uint16_t avail_idx = vq->last_avail_idx;
> > uint32_t buf_offset = sizeof(struct virtio_net_hdr_mrg_rxbuf);
> > @@ -2794,7 +2902,7 @@ virtio_dev_tx_batch_packed(struct virtio_net
> > *dev,
> > if (virtio_net_with_host_offload(dev)) {
> > vhost_for_each_try_unroll(i, 0, PACKED_BATCH_SIZE) {
> > hdr = (struct virtio_net_hdr *)(desc_addrs[i]);
> > - vhost_dequeue_offload(hdr, pkts[i]);
> > + vhost_dequeue_offload(hdr, pkts[i], legacy_ol_flags);
> > }
> > }
> >
> > @@ -2815,7 +2923,8 @@ vhost_dequeue_single_packed(struct
> virtio_net
> > *dev,
> > struct rte_mempool *mbuf_pool,
> > struct rte_mbuf *pkts,
> > uint16_t *buf_id,
> > - uint16_t *desc_count)
> > + uint16_t *desc_count,
> > + bool legacy_ol_flags)
> > {
> > struct buf_vector buf_vec[BUF_VECTOR_MAX];
> > uint32_t buf_len;
> > @@ -2841,7 +2950,7 @@ vhost_dequeue_single_packed(struct
> virtio_net
> > *dev,
> > }
> >
> > err = copy_desc_to_mbuf(dev, vq, buf_vec, nr_vec, pkts,
> > - mbuf_pool);
> > + mbuf_pool, legacy_ol_flags);
> > if (unlikely(err)) {
> > if (!allocerr_warned) {
> > VHOST_LOG_DATA(ERR,
> > @@ -2859,14 +2968,15 @@ static __rte_always_inline int
> > virtio_dev_tx_single_packed(struct virtio_net *dev,
> > struct vhost_virtqueue *vq,
> > struct rte_mempool *mbuf_pool,
> > - struct rte_mbuf *pkts)
> > + struct rte_mbuf *pkts,
> > + bool legacy_ol_flags)
> > {
> >
> > uint16_t buf_id, desc_count = 0;
> > int ret;
> >
> > ret = vhost_dequeue_single_packed(dev, vq, mbuf_pool, pkts,
> > &buf_id,
> > - &desc_count);
> > + &desc_count, legacy_ol_flags);
> >
> > if (likely(desc_count > 0)) {
> > if (virtio_net_is_inorder(dev))
> > @@ -2882,12 +2992,14 @@ virtio_dev_tx_single_packed(struct
> virtio_net
> > *dev,
> > return ret;
> > }
> >
> > -static __rte_noinline uint16_t
> > +__rte_always_inline
> > +static uint16_t
> > virtio_dev_tx_packed(struct virtio_net *dev,
> > struct vhost_virtqueue *__rte_restrict vq,
> > struct rte_mempool *mbuf_pool,
> > struct rte_mbuf **__rte_restrict pkts,
> > - uint32_t count)
> > + uint32_t count,
> > + bool legacy_ol_flags)
> > {
> > uint32_t pkt_idx = 0;
> >
> > @@ -2899,14 +3011,16 @@ virtio_dev_tx_packed(struct virtio_net *dev,
> >
> > if (count - pkt_idx >= PACKED_BATCH_SIZE) {
> > if (!virtio_dev_tx_batch_packed(dev, vq,
> > - &pkts[pkt_idx])) {
> > + &pkts[pkt_idx],
> > + legacy_ol_flags)) {
> > pkt_idx += PACKED_BATCH_SIZE;
> > continue;
> > }
> > }
> >
> > if (virtio_dev_tx_single_packed(dev, vq, mbuf_pool,
> > - pkts[pkt_idx]))
> > + pkts[pkt_idx],
> > + legacy_ol_flags))
> > break;
> > pkt_idx++;
> > } while (pkt_idx < count);
> > @@ -2924,6 +3038,24 @@ virtio_dev_tx_packed(struct virtio_net *dev,
> > return pkt_idx;
> > }
> >
> > +__rte_noinline
> > +static uint16_t
> > +virtio_dev_tx_packed_legacy(struct virtio_net *dev,
> > + struct vhost_virtqueue *__rte_restrict vq, struct rte_mempool
> > *mbuf_pool,
> > + struct rte_mbuf **__rte_restrict pkts, uint32_t count)
> > +{
> > + return virtio_dev_tx_packed(dev, vq, mbuf_pool, pkts, count, true);
> > +}
> > +
> > +__rte_noinline
> > +static uint16_t
> > +virtio_dev_tx_packed_compliant(struct virtio_net *dev,
> > + struct vhost_virtqueue *__rte_restrict vq, struct rte_mempool
> > *mbuf_pool,
> > + struct rte_mbuf **__rte_restrict pkts, uint32_t count)
> > +{
> > + return virtio_dev_tx_packed(dev, vq, mbuf_pool, pkts, count, false);
> > +}
> > +
> > uint16_t
> > rte_vhost_dequeue_burst(int vid, uint16_t queue_id,
> > struct rte_mempool *mbuf_pool, struct rte_mbuf **pkts, uint16_t
> > count)
> > @@ -2999,10 +3131,17 @@ rte_vhost_dequeue_burst(int vid, uint16_t
> > queue_id,
> > count -= 1;
> > }
> >
> > - if (vq_is_packed(dev))
> > - count = virtio_dev_tx_packed(dev, vq, mbuf_pool, pkts,
> > count);
> > - else
> > - count = virtio_dev_tx_split(dev, vq, mbuf_pool, pkts, count);
> > + if (vq_is_packed(dev)) {
> > + if (dev->flags & VIRTIO_DEV_LEGACY_OL_FLAGS)
> > + count = virtio_dev_tx_packed_legacy(dev, vq,
> > mbuf_pool, pkts, count);
> > + else
> > + count = virtio_dev_tx_packed_compliant(dev, vq,
> > mbuf_pool, pkts, count);
> > + } else {
> > + if (dev->flags & VIRTIO_DEV_LEGACY_OL_FLAGS)
> > + count = virtio_dev_tx_split_legacy(dev, vq,
> > mbuf_pool, pkts, count);
> > + else
> > + count = virtio_dev_tx_split_compliant(dev, vq,
> > mbuf_pool, pkts, count);
> > + }
> >
> > out:
> > if (dev->features & (1ULL << VIRTIO_F_IOMMU_PLATFORM))
> > --
> > 2.23.0
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH v4 3/3] vhost: fix offload flags in Rx path
2021-05-03 16:43 2% ` [dpdk-dev] [PATCH v4 3/3] vhost: fix offload flags in Rx path David Marchand
2021-05-04 11:07 0% ` Flavio Leitner
@ 2021-05-08 6:24 0% ` Wang, Yinan
2021-05-12 3:29 0% ` Wang, Yinan
1 sibling, 1 reply; 200+ results
From: Wang, Yinan @ 2021-05-08 6:24 UTC (permalink / raw)
To: David Marchand, dev
Cc: maxime.coquelin, olivier.matz, fbl, i.maximets, Xia, Chenbo,
Stokes, Ian, stable, Jijiang Liu, Yuanhan Liu
Hi David,
May I know how to configures Tx offloading by testpmd, could you help to provide an example case?
I add a case which need vhost tx offload (TSO/cksum) function, this case can't work with the patch, could you use this case as the example if possible?
For example: VM2VM split ring vhost-user/virtio-net test with tcp traffic
=========================================================================
1. Launch the Vhost sample on socket 0 by below commands::
rm -rf vhost-net*
./dpdk-testpmd -l 2-4 -n 4 --no-pci --file-prefix=vhost --vdev 'net_vhost0,iface=vhost-net0,queues=1' \
--vdev 'net_vhost1,iface=vhost-net1,queues=1' -- -i --nb-cores=2 --txd=1024 --rxd=1024
testpmd>start
2. Launch VM1 and VM2 on socket 1::
taskset -c 32 qemu-system-x86_64 -name vm1 -enable-kvm -cpu host -smp 1 -m 4096 \
-object memory-backend-file,id=mem,size=4096M,mem-path=/mnt/huge,share=on \
-numa node,memdev=mem -mem-prealloc -drive file=/home/osimg/ubuntu20-04.img \
-chardev socket,path=/tmp/vm2_qga0.sock,server,nowait,id=vm2_qga0 -device virtio-serial \
-device virtserialport,chardev=vm2_qga0,name=org.qemu.guest_agent.2 -daemonize \
-monitor unix:/tmp/vm2_monitor.sock,server,nowait -device e1000,netdev=nttsip1 \
-netdev user,id=nttsip1,hostfwd=tcp:127.0.0.1:6002-:22 \
-chardev socket,id=char0,path=./vhost-net0 \
-netdev type=vhost-user,id=netdev0,chardev=char0,vhostforce \
-device virtio-net-pci,netdev=netdev0,mac=52:54:00:00:00:01,disable-modern=false,mrg_rxbuf=on,csum=on,guest_csum=on,host_tso4=on,guest_tso4=on,guest_ecn=on -vnc :10
taskset -c 33 qemu-system-x86_64 -name vm2 -enable-kvm -cpu host -smp 1 -m 4096 \
-object memory-backend-file,id=mem,size=4096M,mem-path=/mnt/huge,share=on \
-numa node,memdev=mem -mem-prealloc -drive file=/home/osimg/ubuntu20-04-2.img \
-chardev socket,path=/tmp/vm2_qga0.sock,server,nowait,id=vm2_qga0 -device virtio-serial \
-device virtserialport,chardev=vm2_qga0,name=org.qemu.guest_agent.2 -daemonize \
-monitor unix:/tmp/vm2_monitor.sock,server,nowait -device e1000,netdev=nttsip1 \
-netdev user,id=nttsip1,hostfwd=tcp:127.0.0.1:6003-:22 \
-chardev socket,id=char0,path=./vhost-net1 \
-netdev type=vhost-user,id=netdev0,chardev=char0,vhostforce \
-device virtio-net-pci,netdev=netdev0,mac=52:54:00:00:00:02,disable-modern=false,mrg_rxbuf=on,csum=on,guest_csum=on,host_tso4=on,guest_tso4=on,guest_ecn=on -vnc :12
3. On VM1, set virtio device IP and run arp protocal::
ifconfig ens5 1.1.1.2
arp -s 1.1.1.8 52:54:00:00:00:02
4. On VM2, set virtio device IP and run arp protocal::
ifconfig ens5 1.1.1.8
arp -s 1.1.1.2 52:54:00:00:00:01
5. Check the iperf performance with different packet size between two VMs by below commands::
Under VM1, run: `iperf -s -i 1`
Under VM2, run: `iperf -c 1.1.1.2 -i 1 -t 60`
BR,
Yinan
> -----Original Message-----
> From: dev <dev-bounces@dpdk.org> On Behalf Of David Marchand
> Sent: 2021?5?4? 0:44
> To: dev@dpdk.org
> Cc: maxime.coquelin@redhat.com; olivier.matz@6wind.com;
> fbl@sysclose.org; i.maximets@ovn.org; Xia, Chenbo
> <chenbo.xia@intel.com>; Stokes, Ian <ian.stokes@intel.com>;
> stable@dpdk.org; Jijiang Liu <jijiang.liu@intel.com>; Yuanhan Liu
> <yuanhan.liu@linux.intel.com>
> Subject: [dpdk-dev] [PATCH v4 3/3] vhost: fix offload flags in Rx path
>
> The vhost library currently configures Tx offloading (PKT_TX_*) on any
> packet received from a guest virtio device which asks for some offloading.
>
> This is problematic, as Tx offloading is something that the application
> must ask for: the application needs to configure devices
> to support every used offloads (ip, tcp checksumming, tso..), and the
> various l2/l3/l4 lengths must be set following any processing that
> happened in the application itself.
>
> On the other hand, the received packets are not marked wrt current
> packet l3/l4 checksumming info.
>
> Copy virtio rx processing to fix those offload flags with some
> differences:
> - accept VIRTIO_NET_HDR_GSO_ECN and VIRTIO_NET_HDR_GSO_UDP,
> - ignore anything but the VIRTIO_NET_HDR_F_NEEDS_CSUM flag (to comply
> with
> the virtio spec),
>
> Some applications might rely on the current behavior, so it is left
> untouched by default.
> A new RTE_VHOST_USER_NET_COMPLIANT_OL_FLAGS flag is added to
> enable the
> new behavior.
>
> The vhost example has been updated for the new behavior: TSO is applied
> to
> any packet marked LRO.
>
> Fixes: 859b480d5afd ("vhost: add guest offload setting")
> Cc: stable@dpdk.org
>
> Signed-off-by: David Marchand <david.marchand@redhat.com>
> Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
> ---
> Changes since v3:
> - rebased on next-virtio,
>
> Changes since v2:
> - introduced a new flag to keep existing behavior as the default,
> - packets with unrecognised offload are passed to the application with no
> offload metadata rather than dropped,
> - ignored VIRTIO_NET_HDR_F_DATA_VALID since the virtio spec states that
> the virtio driver is not allowed to use this flag when transmitting
> packets,
>
> Changes since v1:
> - updated vhost example,
> - restored VIRTIO_NET_HDR_GSO_ECN and VIRTIO_NET_HDR_GSO_UDP
> support,
> - restored log on buggy offload request,
>
> ---
> doc/guides/prog_guide/vhost_lib.rst | 12 ++
> doc/guides/rel_notes/release_21_05.rst | 6 +
> drivers/net/vhost/rte_eth_vhost.c | 2 +-
> examples/vhost/main.c | 44 +++---
> lib/vhost/rte_vhost.h | 1 +
> lib/vhost/socket.c | 5 +-
> lib/vhost/vhost.c | 6 +-
> lib/vhost/vhost.h | 14 +-
> lib/vhost/virtio_net.c | 185 ++++++++++++++++++++++---
> 9 files changed, 222 insertions(+), 53 deletions(-)
>
> diff --git a/doc/guides/prog_guide/vhost_lib.rst
> b/doc/guides/prog_guide/vhost_lib.rst
> index 7afa351675..d18fb98910 100644
> --- a/doc/guides/prog_guide/vhost_lib.rst
> +++ b/doc/guides/prog_guide/vhost_lib.rst
> @@ -118,6 +118,18 @@ The following is an overview of some key Vhost
> API functions:
>
> It is disabled by default.
>
> + - ``RTE_VHOST_USER_NET_COMPLIANT_OL_FLAGS``
> +
> + Since v16.04, the vhost library forwards checksum and gso requests for
> + packets received from a virtio driver by filling Tx offload metadata in
> + the mbuf. This behavior is inconsistent with other drivers but it is left
> + untouched for existing applications that might rely on it.
> +
> + This flag disables the legacy behavior and instead ask vhost to simply
> + populate Rx offload metadata in the mbuf.
> +
> + It is disabled by default.
> +
> * ``rte_vhost_driver_set_features(path, features)``
>
> This function sets the feature bits the vhost-user driver supports. The
> diff --git a/doc/guides/rel_notes/release_21_05.rst
> b/doc/guides/rel_notes/release_21_05.rst
> index a5f21f8425..6b7b0810a5 100644
> --- a/doc/guides/rel_notes/release_21_05.rst
> +++ b/doc/guides/rel_notes/release_21_05.rst
> @@ -337,6 +337,12 @@ API Changes
> ``policer_action_recolor_supported`` and
> ``policer_action_drop_supported``
> have been removed.
>
> +* vhost: The vhost library currently populates received mbufs from a virtio
> + driver with Tx offload flags while not filling Rx offload flags.
> + While this behavior is arguable, it is kept untouched.
> + A new flag ``RTE_VHOST_USER_NET_COMPLIANT_OL_FLAGS`` has been
> added to ask
> + for a behavior compliant with to the mbuf offload API.
> +
>
> ABI Changes
> -----------
> diff --git a/drivers/net/vhost/rte_eth_vhost.c
> b/drivers/net/vhost/rte_eth_vhost.c
> index d198fc8a8e..281379d6a3 100644
> --- a/drivers/net/vhost/rte_eth_vhost.c
> +++ b/drivers/net/vhost/rte_eth_vhost.c
> @@ -1505,7 +1505,7 @@ rte_pmd_vhost_probe(struct rte_vdev_device
> *dev)
> int ret = 0;
> char *iface_name;
> uint16_t queues;
> - uint64_t flags = 0;
> + uint64_t flags = RTE_VHOST_USER_NET_COMPLIANT_OL_FLAGS;
> uint64_t disable_flags = 0;
> int client_mode = 0;
> int iommu_support = 0;
> diff --git a/examples/vhost/main.c b/examples/vhost/main.c
> index 0bee1f3321..d2179eadb9 100644
> --- a/examples/vhost/main.c
> +++ b/examples/vhost/main.c
> @@ -19,6 +19,7 @@
> #include <rte_log.h>
> #include <rte_string_fns.h>
> #include <rte_malloc.h>
> +#include <rte_net.h>
> #include <rte_vhost.h>
> #include <rte_ip.h>
> #include <rte_tcp.h>
> @@ -1029,33 +1030,34 @@ find_local_dest(struct vhost_dev *vdev,
> struct rte_mbuf *m,
> return 0;
> }
>
> -static uint16_t
> -get_psd_sum(void *l3_hdr, uint64_t ol_flags)
> -{
> - if (ol_flags & PKT_TX_IPV4)
> - return rte_ipv4_phdr_cksum(l3_hdr, ol_flags);
> - else /* assume ethertype == RTE_ETHER_TYPE_IPV6 */
> - return rte_ipv6_phdr_cksum(l3_hdr, ol_flags);
> -}
> -
> static void virtio_tx_offload(struct rte_mbuf *m)
> {
> + struct rte_net_hdr_lens hdr_lens;
> + struct rte_ipv4_hdr *ipv4_hdr;
> + struct rte_tcp_hdr *tcp_hdr;
> + uint32_t ptype;
> void *l3_hdr;
> - struct rte_ipv4_hdr *ipv4_hdr = NULL;
> - struct rte_tcp_hdr *tcp_hdr = NULL;
> - struct rte_ether_hdr *eth_hdr =
> - rte_pktmbuf_mtod(m, struct rte_ether_hdr *);
>
> - l3_hdr = (char *)eth_hdr + m->l2_len;
> + ptype = rte_net_get_ptype(m, &hdr_lens, RTE_PTYPE_ALL_MASK);
> + m->l2_len = hdr_lens.l2_len;
> + m->l3_len = hdr_lens.l3_len;
> + m->l4_len = hdr_lens.l4_len;
>
> - if (m->ol_flags & PKT_TX_IPV4) {
> + l3_hdr = rte_pktmbuf_mtod_offset(m, void *, m->l2_len);
> + tcp_hdr = rte_pktmbuf_mtod_offset(m, struct rte_tcp_hdr *,
> + m->l2_len + m->l3_len);
> +
> + m->ol_flags |= PKT_TX_TCP_SEG;
> + if ((ptype & RTE_PTYPE_L3_MASK) == RTE_PTYPE_L3_IPV4) {
> + m->ol_flags |= PKT_TX_IPV4;
> + m->ol_flags |= PKT_TX_IP_CKSUM;
> ipv4_hdr = l3_hdr;
> ipv4_hdr->hdr_checksum = 0;
> - m->ol_flags |= PKT_TX_IP_CKSUM;
> + tcp_hdr->cksum = rte_ipv4_phdr_cksum(l3_hdr, m-
> >ol_flags);
> + } else { /* assume ethertype == RTE_ETHER_TYPE_IPV6 */
> + m->ol_flags |= PKT_TX_IPV6;
> + tcp_hdr->cksum = rte_ipv6_phdr_cksum(l3_hdr, m-
> >ol_flags);
> }
> -
> - tcp_hdr = (struct rte_tcp_hdr *)((char *)l3_hdr + m->l3_len);
> - tcp_hdr->cksum = get_psd_sum(l3_hdr, m->ol_flags);
> }
>
> static __rte_always_inline void
> @@ -1148,7 +1150,7 @@ virtio_tx_route(struct vhost_dev *vdev, struct
> rte_mbuf *m, uint16_t vlan_tag)
> m->vlan_tci = vlan_tag;
> }
>
> - if (m->ol_flags & PKT_TX_TCP_SEG)
> + if (m->ol_flags & PKT_RX_LRO)
> virtio_tx_offload(m);
>
> tx_q->m_table[tx_q->len++] = m;
> @@ -1633,7 +1635,7 @@ main(int argc, char *argv[])
> int ret, i;
> uint16_t portid;
> static pthread_t tid;
> - uint64_t flags = 0;
> + uint64_t flags = RTE_VHOST_USER_NET_COMPLIANT_OL_FLAGS;
>
> signal(SIGINT, sigint_handler);
>
> diff --git a/lib/vhost/rte_vhost.h b/lib/vhost/rte_vhost.h
> index d0a8ae31f2..8d875e9322 100644
> --- a/lib/vhost/rte_vhost.h
> +++ b/lib/vhost/rte_vhost.h
> @@ -36,6 +36,7 @@ extern "C" {
> /* support only linear buffers (no chained mbufs) */
> #define RTE_VHOST_USER_LINEARBUF_SUPPORT (1ULL << 6)
> #define RTE_VHOST_USER_ASYNC_COPY (1ULL << 7)
> +#define RTE_VHOST_USER_NET_COMPLIANT_OL_FLAGS (1ULL << 8)
>
> /* Features. */
> #ifndef VIRTIO_NET_F_GUEST_ANNOUNCE
> diff --git a/lib/vhost/socket.c b/lib/vhost/socket.c
> index 0169d36481..5d0d728d52 100644
> --- a/lib/vhost/socket.c
> +++ b/lib/vhost/socket.c
> @@ -42,6 +42,7 @@ struct vhost_user_socket {
> bool extbuf;
> bool linearbuf;
> bool async_copy;
> + bool net_compliant_ol_flags;
>
> /*
> * The "supported_features" indicates the feature bits the
> @@ -224,7 +225,8 @@ vhost_user_add_connection(int fd, struct
> vhost_user_socket *vsocket)
> size = strnlen(vsocket->path, PATH_MAX);
> vhost_set_ifname(vid, vsocket->path, size);
>
> - vhost_set_builtin_virtio_net(vid, vsocket->use_builtin_virtio_net);
> + vhost_setup_virtio_net(vid, vsocket->use_builtin_virtio_net,
> + vsocket->net_compliant_ol_flags);
>
> vhost_attach_vdpa_device(vid, vsocket->vdpa_dev);
>
> @@ -877,6 +879,7 @@ rte_vhost_driver_register(const char *path,
> uint64_t flags)
> vsocket->extbuf = flags & RTE_VHOST_USER_EXTBUF_SUPPORT;
> vsocket->linearbuf = flags &
> RTE_VHOST_USER_LINEARBUF_SUPPORT;
> vsocket->async_copy = flags & RTE_VHOST_USER_ASYNC_COPY;
> + vsocket->net_compliant_ol_flags = flags &
> RTE_VHOST_USER_NET_COMPLIANT_OL_FLAGS;
>
> if (vsocket->async_copy &&
> (flags & (RTE_VHOST_USER_IOMMU_SUPPORT |
> diff --git a/lib/vhost/vhost.c b/lib/vhost/vhost.c
> index c9b6379f73..9abfc0bfe7 100644
> --- a/lib/vhost/vhost.c
> +++ b/lib/vhost/vhost.c
> @@ -752,7 +752,7 @@ vhost_set_ifname(int vid, const char *if_name,
> unsigned int if_len)
> }
>
> void
> -vhost_set_builtin_virtio_net(int vid, bool enable)
> +vhost_setup_virtio_net(int vid, bool enable, bool compliant_ol_flags)
> {
> struct virtio_net *dev = get_device(vid);
>
> @@ -763,6 +763,10 @@ vhost_set_builtin_virtio_net(int vid, bool enable)
> dev->flags |= VIRTIO_DEV_BUILTIN_VIRTIO_NET;
> else
> dev->flags &= ~VIRTIO_DEV_BUILTIN_VIRTIO_NET;
> + if (!compliant_ol_flags)
> + dev->flags |= VIRTIO_DEV_LEGACY_OL_FLAGS;
> + else
> + dev->flags &= ~VIRTIO_DEV_LEGACY_OL_FLAGS;
> }
>
> void
> diff --git a/lib/vhost/vhost.h b/lib/vhost/vhost.h
> index b303635645..8078ddff79 100644
> --- a/lib/vhost/vhost.h
> +++ b/lib/vhost/vhost.h
> @@ -27,15 +27,17 @@
> #include "rte_vhost_async.h"
>
> /* Used to indicate that the device is running on a data core */
> -#define VIRTIO_DEV_RUNNING 1
> +#define VIRTIO_DEV_RUNNING ((uint32_t)1 << 0)
> /* Used to indicate that the device is ready to operate */
> -#define VIRTIO_DEV_READY 2
> +#define VIRTIO_DEV_READY ((uint32_t)1 << 1)
> /* Used to indicate that the built-in vhost net device backend is enabled */
> -#define VIRTIO_DEV_BUILTIN_VIRTIO_NET 4
> +#define VIRTIO_DEV_BUILTIN_VIRTIO_NET ((uint32_t)1 << 2)
> /* Used to indicate that the device has its own data path and configured */
> -#define VIRTIO_DEV_VDPA_CONFIGURED 8
> +#define VIRTIO_DEV_VDPA_CONFIGURED ((uint32_t)1 << 3)
> /* Used to indicate that the feature negotiation failed */
> -#define VIRTIO_DEV_FEATURES_FAILED 16
> +#define VIRTIO_DEV_FEATURES_FAILED ((uint32_t)1 << 4)
> +/* Used to indicate that the virtio_net tx code should fill TX ol_flags */
> +#define VIRTIO_DEV_LEGACY_OL_FLAGS ((uint32_t)1 << 5)
>
> /* Backend value set by guest. */
> #define VIRTIO_DEV_STOPPED -1
> @@ -683,7 +685,7 @@ int alloc_vring_queue(struct virtio_net *dev,
> uint32_t vring_idx);
> void vhost_attach_vdpa_device(int vid, struct rte_vdpa_device *dev);
>
> void vhost_set_ifname(int, const char *if_name, unsigned int if_len);
> -void vhost_set_builtin_virtio_net(int vid, bool enable);
> +void vhost_setup_virtio_net(int vid, bool enable, bool legacy_ol_flags);
> void vhost_enable_extbuf(int vid);
> void vhost_enable_linearbuf(int vid);
> int vhost_enable_guest_notification(struct virtio_net *dev,
> diff --git a/lib/vhost/virtio_net.c b/lib/vhost/virtio_net.c
> index 1a34867f3c..8e36f4c340 100644
> --- a/lib/vhost/virtio_net.c
> +++ b/lib/vhost/virtio_net.c
> @@ -8,6 +8,7 @@
>
> #include <rte_mbuf.h>
> #include <rte_memcpy.h>
> +#include <rte_net.h>
> #include <rte_ether.h>
> #include <rte_ip.h>
> #include <rte_vhost.h>
> @@ -2303,15 +2304,12 @@ parse_ethernet(struct rte_mbuf *m, uint16_t
> *l4_proto, void **l4_hdr)
> }
>
> static __rte_always_inline void
> -vhost_dequeue_offload(struct virtio_net_hdr *hdr, struct rte_mbuf *m)
> +vhost_dequeue_offload_legacy(struct virtio_net_hdr *hdr, struct
> rte_mbuf *m)
> {
> uint16_t l4_proto = 0;
> void *l4_hdr = NULL;
> struct rte_tcp_hdr *tcp_hdr = NULL;
>
> - if (hdr->flags == 0 && hdr->gso_type ==
> VIRTIO_NET_HDR_GSO_NONE)
> - return;
> -
> parse_ethernet(m, &l4_proto, &l4_hdr);
> if (hdr->flags == VIRTIO_NET_HDR_F_NEEDS_CSUM) {
> if (hdr->csum_start == (m->l2_len + m->l3_len)) {
> @@ -2356,6 +2354,94 @@ vhost_dequeue_offload(struct virtio_net_hdr
> *hdr, struct rte_mbuf *m)
> }
> }
>
> +static __rte_always_inline void
> +vhost_dequeue_offload(struct virtio_net_hdr *hdr, struct rte_mbuf *m,
> + bool legacy_ol_flags)
> +{
> + struct rte_net_hdr_lens hdr_lens;
> + int l4_supported = 0;
> + uint32_t ptype;
> +
> + if (hdr->flags == 0 && hdr->gso_type ==
> VIRTIO_NET_HDR_GSO_NONE)
> + return;
> +
> + if (legacy_ol_flags) {
> + vhost_dequeue_offload_legacy(hdr, m);
> + return;
> + }
> +
> + m->ol_flags |= PKT_RX_IP_CKSUM_UNKNOWN;
> +
> + ptype = rte_net_get_ptype(m, &hdr_lens, RTE_PTYPE_ALL_MASK);
> + m->packet_type = ptype;
> + if ((ptype & RTE_PTYPE_L4_MASK) == RTE_PTYPE_L4_TCP ||
> + (ptype & RTE_PTYPE_L4_MASK) == RTE_PTYPE_L4_UDP ||
> + (ptype & RTE_PTYPE_L4_MASK) == RTE_PTYPE_L4_SCTP)
> + l4_supported = 1;
> +
> + /* According to Virtio 1.1 spec, the device only needs to look at
> + * VIRTIO_NET_HDR_F_NEEDS_CSUM in the packet transmission
> path.
> + * This differs from the processing incoming packets path where the
> + * driver could rely on VIRTIO_NET_HDR_F_DATA_VALID flag set by
> the
> + * device.
> + *
> + * 5.1.6.2.1 Driver Requirements: Packet Transmission
> + * The driver MUST NOT set the VIRTIO_NET_HDR_F_DATA_VALID
> and
> + * VIRTIO_NET_HDR_F_RSC_INFO bits in flags.
> + *
> + * 5.1.6.2.2 Device Requirements: Packet Transmission
> + * The device MUST ignore flag bits that it does not recognize.
> + */
> + if (hdr->flags & VIRTIO_NET_HDR_F_NEEDS_CSUM) {
> + uint32_t hdrlen;
> +
> + hdrlen = hdr_lens.l2_len + hdr_lens.l3_len + hdr_lens.l4_len;
> + if (hdr->csum_start <= hdrlen && l4_supported != 0) {
> + m->ol_flags |= PKT_RX_L4_CKSUM_NONE;
> + } else {
> + /* Unknown proto or tunnel, do sw cksum. We can
> assume
> + * the cksum field is in the first segment since the
> + * buffers we provided to the host are large enough.
> + * In case of SCTP, this will be wrong since it's a CRC
> + * but there's nothing we can do.
> + */
> + uint16_t csum = 0, off;
> +
> + if (rte_raw_cksum_mbuf(m, hdr->csum_start,
> + rte_pktmbuf_pkt_len(m) - hdr-
> >csum_start, &csum) < 0)
> + return;
> + if (likely(csum != 0xffff))
> + csum = ~csum;
> + off = hdr->csum_offset + hdr->csum_start;
> + if (rte_pktmbuf_data_len(m) >= off + 1)
> + *rte_pktmbuf_mtod_offset(m, uint16_t *,
> off) = csum;
> + }
> + }
> +
> + if (hdr->gso_type != VIRTIO_NET_HDR_GSO_NONE) {
> + if (hdr->gso_size == 0)
> + return;
> +
> + switch (hdr->gso_type & ~VIRTIO_NET_HDR_GSO_ECN) {
> + case VIRTIO_NET_HDR_GSO_TCPV4:
> + case VIRTIO_NET_HDR_GSO_TCPV6:
> + if ((ptype & RTE_PTYPE_L4_MASK) !=
> RTE_PTYPE_L4_TCP)
> + break;
> + m->ol_flags |= PKT_RX_LRO |
> PKT_RX_L4_CKSUM_NONE;
> + m->tso_segsz = hdr->gso_size;
> + break;
> + case VIRTIO_NET_HDR_GSO_UDP:
> + if ((ptype & RTE_PTYPE_L4_MASK) !=
> RTE_PTYPE_L4_UDP)
> + break;
> + m->ol_flags |= PKT_RX_LRO |
> PKT_RX_L4_CKSUM_NONE;
> + m->tso_segsz = hdr->gso_size;
> + break;
> + default:
> + break;
> + }
> + }
> +}
> +
> static __rte_noinline void
> copy_vnet_hdr_from_desc(struct virtio_net_hdr *hdr,
> struct buf_vector *buf_vec)
> @@ -2380,7 +2466,8 @@ copy_vnet_hdr_from_desc(struct virtio_net_hdr
> *hdr,
> static __rte_always_inline int
> copy_desc_to_mbuf(struct virtio_net *dev, struct vhost_virtqueue *vq,
> struct buf_vector *buf_vec, uint16_t nr_vec,
> - struct rte_mbuf *m, struct rte_mempool *mbuf_pool)
> + struct rte_mbuf *m, struct rte_mempool *mbuf_pool,
> + bool legacy_ol_flags)
> {
> uint32_t buf_avail, buf_offset;
> uint64_t buf_addr, buf_len;
> @@ -2513,7 +2600,7 @@ copy_desc_to_mbuf(struct virtio_net *dev,
> struct vhost_virtqueue *vq,
> m->pkt_len += mbuf_offset;
>
> if (hdr)
> - vhost_dequeue_offload(hdr, m);
> + vhost_dequeue_offload(hdr, m, legacy_ol_flags);
>
> out:
>
> @@ -2606,9 +2693,11 @@ virtio_dev_pktmbuf_alloc(struct virtio_net
> *dev, struct rte_mempool *mp,
> return pkt;
> }
>
> -static __rte_noinline uint16_t
> +__rte_always_inline
> +static uint16_t
> virtio_dev_tx_split(struct virtio_net *dev, struct vhost_virtqueue *vq,
> - struct rte_mempool *mbuf_pool, struct rte_mbuf **pkts, uint16_t
> count)
> + struct rte_mempool *mbuf_pool, struct rte_mbuf **pkts, uint16_t
> count,
> + bool legacy_ol_flags)
> {
> uint16_t i;
> uint16_t free_entries;
> @@ -2668,7 +2757,7 @@ virtio_dev_tx_split(struct virtio_net *dev, struct
> vhost_virtqueue *vq,
> }
>
> err = copy_desc_to_mbuf(dev, vq, buf_vec, nr_vec, pkts[i],
> - mbuf_pool);
> + mbuf_pool, legacy_ol_flags);
> if (unlikely(err)) {
> rte_pktmbuf_free(pkts[i]);
> if (!allocerr_warned) {
> @@ -2696,6 +2785,24 @@ virtio_dev_tx_split(struct virtio_net *dev,
> struct vhost_virtqueue *vq,
> return (i - dropped);
> }
>
> +__rte_noinline
> +static uint16_t
> +virtio_dev_tx_split_legacy(struct virtio_net *dev,
> + struct vhost_virtqueue *vq, struct rte_mempool *mbuf_pool,
> + struct rte_mbuf **pkts, uint16_t count)
> +{
> + return virtio_dev_tx_split(dev, vq, mbuf_pool, pkts, count, true);
> +}
> +
> +__rte_noinline
> +static uint16_t
> +virtio_dev_tx_split_compliant(struct virtio_net *dev,
> + struct vhost_virtqueue *vq, struct rte_mempool *mbuf_pool,
> + struct rte_mbuf **pkts, uint16_t count)
> +{
> + return virtio_dev_tx_split(dev, vq, mbuf_pool, pkts, count, false);
> +}
> +
> static __rte_always_inline int
> vhost_reserve_avail_batch_packed(struct virtio_net *dev,
> struct vhost_virtqueue *vq,
> @@ -2770,7 +2877,8 @@ vhost_reserve_avail_batch_packed(struct
> virtio_net *dev,
> static __rte_always_inline int
> virtio_dev_tx_batch_packed(struct virtio_net *dev,
> struct vhost_virtqueue *vq,
> - struct rte_mbuf **pkts)
> + struct rte_mbuf **pkts,
> + bool legacy_ol_flags)
> {
> uint16_t avail_idx = vq->last_avail_idx;
> uint32_t buf_offset = sizeof(struct virtio_net_hdr_mrg_rxbuf);
> @@ -2794,7 +2902,7 @@ virtio_dev_tx_batch_packed(struct virtio_net
> *dev,
> if (virtio_net_with_host_offload(dev)) {
> vhost_for_each_try_unroll(i, 0, PACKED_BATCH_SIZE) {
> hdr = (struct virtio_net_hdr *)(desc_addrs[i]);
> - vhost_dequeue_offload(hdr, pkts[i]);
> + vhost_dequeue_offload(hdr, pkts[i], legacy_ol_flags);
> }
> }
>
> @@ -2815,7 +2923,8 @@ vhost_dequeue_single_packed(struct virtio_net
> *dev,
> struct rte_mempool *mbuf_pool,
> struct rte_mbuf *pkts,
> uint16_t *buf_id,
> - uint16_t *desc_count)
> + uint16_t *desc_count,
> + bool legacy_ol_flags)
> {
> struct buf_vector buf_vec[BUF_VECTOR_MAX];
> uint32_t buf_len;
> @@ -2841,7 +2950,7 @@ vhost_dequeue_single_packed(struct virtio_net
> *dev,
> }
>
> err = copy_desc_to_mbuf(dev, vq, buf_vec, nr_vec, pkts,
> - mbuf_pool);
> + mbuf_pool, legacy_ol_flags);
> if (unlikely(err)) {
> if (!allocerr_warned) {
> VHOST_LOG_DATA(ERR,
> @@ -2859,14 +2968,15 @@ static __rte_always_inline int
> virtio_dev_tx_single_packed(struct virtio_net *dev,
> struct vhost_virtqueue *vq,
> struct rte_mempool *mbuf_pool,
> - struct rte_mbuf *pkts)
> + struct rte_mbuf *pkts,
> + bool legacy_ol_flags)
> {
>
> uint16_t buf_id, desc_count = 0;
> int ret;
>
> ret = vhost_dequeue_single_packed(dev, vq, mbuf_pool, pkts,
> &buf_id,
> - &desc_count);
> + &desc_count, legacy_ol_flags);
>
> if (likely(desc_count > 0)) {
> if (virtio_net_is_inorder(dev))
> @@ -2882,12 +2992,14 @@ virtio_dev_tx_single_packed(struct virtio_net
> *dev,
> return ret;
> }
>
> -static __rte_noinline uint16_t
> +__rte_always_inline
> +static uint16_t
> virtio_dev_tx_packed(struct virtio_net *dev,
> struct vhost_virtqueue *__rte_restrict vq,
> struct rte_mempool *mbuf_pool,
> struct rte_mbuf **__rte_restrict pkts,
> - uint32_t count)
> + uint32_t count,
> + bool legacy_ol_flags)
> {
> uint32_t pkt_idx = 0;
>
> @@ -2899,14 +3011,16 @@ virtio_dev_tx_packed(struct virtio_net *dev,
>
> if (count - pkt_idx >= PACKED_BATCH_SIZE) {
> if (!virtio_dev_tx_batch_packed(dev, vq,
> - &pkts[pkt_idx])) {
> + &pkts[pkt_idx],
> + legacy_ol_flags)) {
> pkt_idx += PACKED_BATCH_SIZE;
> continue;
> }
> }
>
> if (virtio_dev_tx_single_packed(dev, vq, mbuf_pool,
> - pkts[pkt_idx]))
> + pkts[pkt_idx],
> + legacy_ol_flags))
> break;
> pkt_idx++;
> } while (pkt_idx < count);
> @@ -2924,6 +3038,24 @@ virtio_dev_tx_packed(struct virtio_net *dev,
> return pkt_idx;
> }
>
> +__rte_noinline
> +static uint16_t
> +virtio_dev_tx_packed_legacy(struct virtio_net *dev,
> + struct vhost_virtqueue *__rte_restrict vq, struct rte_mempool
> *mbuf_pool,
> + struct rte_mbuf **__rte_restrict pkts, uint32_t count)
> +{
> + return virtio_dev_tx_packed(dev, vq, mbuf_pool, pkts, count, true);
> +}
> +
> +__rte_noinline
> +static uint16_t
> +virtio_dev_tx_packed_compliant(struct virtio_net *dev,
> + struct vhost_virtqueue *__rte_restrict vq, struct rte_mempool
> *mbuf_pool,
> + struct rte_mbuf **__rte_restrict pkts, uint32_t count)
> +{
> + return virtio_dev_tx_packed(dev, vq, mbuf_pool, pkts, count, false);
> +}
> +
> uint16_t
> rte_vhost_dequeue_burst(int vid, uint16_t queue_id,
> struct rte_mempool *mbuf_pool, struct rte_mbuf **pkts, uint16_t
> count)
> @@ -2999,10 +3131,17 @@ rte_vhost_dequeue_burst(int vid, uint16_t
> queue_id,
> count -= 1;
> }
>
> - if (vq_is_packed(dev))
> - count = virtio_dev_tx_packed(dev, vq, mbuf_pool, pkts,
> count);
> - else
> - count = virtio_dev_tx_split(dev, vq, mbuf_pool, pkts, count);
> + if (vq_is_packed(dev)) {
> + if (dev->flags & VIRTIO_DEV_LEGACY_OL_FLAGS)
> + count = virtio_dev_tx_packed_legacy(dev, vq,
> mbuf_pool, pkts, count);
> + else
> + count = virtio_dev_tx_packed_compliant(dev, vq,
> mbuf_pool, pkts, count);
> + } else {
> + if (dev->flags & VIRTIO_DEV_LEGACY_OL_FLAGS)
> + count = virtio_dev_tx_split_legacy(dev, vq,
> mbuf_pool, pkts, count);
> + else
> + count = virtio_dev_tx_split_compliant(dev, vq,
> mbuf_pool, pkts, count);
> + }
>
> out:
> if (dev->features & (1ULL << VIRTIO_F_IOMMU_PLATFORM))
> --
> 2.23.0
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] Use WFE for spinlock and ring
2021-05-07 10:18 0% ` Ruifeng Wang
@ 2021-05-07 10:24 0% ` Bruce Richardson
0 siblings, 0 replies; 200+ results
From: Bruce Richardson @ 2021-05-07 10:24 UTC (permalink / raw)
To: Ruifeng Wang
Cc: Honnappa Nagarahalli, thomas, David Marchand, dev, jerinj, nd
On Fri, May 07, 2021 at 10:18:52AM +0000, Ruifeng Wang wrote:
> > -----Original Message-----
> > From: Bruce Richardson <bruce.richardson@intel.com>
> > Sent: Friday, April 30, 2021 10:19 PM
> > To: Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com>
> > Cc: thomas@monjalon.net; Ruifeng Wang <Ruifeng.Wang@arm.com>; David
> > Marchand <david.marchand@redhat.com>; dev <dev@dpdk.org>;
> > jerinj@marvell.com; nd <nd@arm.com>
> > Subject: Re: Use WFE for spinlock and ring
> >
> > On Fri, Apr 30, 2021 at 01:41:22PM +0000, Honnappa Nagarahalli wrote:
> > > <snip>
> > >
> > > > > > > > > >
> > > > > > > > > > The rte_wait_until_equal_xxx APIs abstract the
> > > > > > > > > > functionality of 'polling for a memory location to
> > > > > > > > > > become equal to a given
> > > > value'[1].
> > > > > > > > > >
> > > > > > > > > > Use the API for the rte spinlock and ring implementations.
> > > > > > > > > > With the wait until equal APIs being stable, changes
> > > > > > > > > > will not impact
> > > > ABI.
> > > > > > > > >
> > > > > > > > > Afaics, there is no ARM target with WFE enabled and we
> > > > > > > > > lost ability to enable WFE support with removal of the
> > > > > > > > > make build
> > > > system.
> > > > > > > >
> > > > > > > > WFE can be enabled with direct meson file change.
> > > > > > > > WFE is not intended to be enabled by default. It can be
> > > > > > > > enabled based on benchmarking result on hardware.
> > > > > > > > >
> > > > > > > > > $ git grep RTE_ARM_USE_WFE
> > > > > > > > > config/arm/meson.build: ['RTE_ARM_USE_WFE', false],
> > > > > > > > > lib/eal/arm/include/rte_pause_64.h:#ifdef RTE_ARM_USE_WFE
> > > > > > > > >
> > > > > > > > > How did you enable WFE to test this series?
> > > > > > > >
> > > > > > > > I modified meson file to test.
> > > > > > > > Tests were also done with WFE disabled to make sure no
> > > > > > > > degradation with
> > > > > > > generic implementation.
> > > > > > >
> > > > > > > I don't understand the usage.
> > > > > > > Which platform should use it?
> > > > > >
> > > > > > Platforms that implement WFE semantic (e.g. N1) can use.
> > > > > > The user can enable this feature for power efficiency purpose.
> > > > > > But there is something to note as described in commit message
> > > > > > 1be7855d77
> > > > when the API was introduced.
> > > > > >
> > > > > > > Should it be a compile-time option?
> > > > > >
> > > > > > Yes, it should be a compile-time option.
> > > > > > It can be configured via c_args meson option?
> > > > >
> > > > > +Cc Bruce for discussing how to enable such feature.
> > > > >
> > > > > The problem with c_args is that the application has no way to know.
> > > > >
> > > > Agree about c_args not being a great choice. Why does this need to
> > > > be a compile-time option? Can runtime support not be detected in
> > > > some manner?
> > > The problem is inconsistency in performance on different Arm platforms.
> > We had decided that each platform needs to enable it after some testing.
> >
> > Then it sounds like it does indeed need to be a build option. Does it need to
> > be added to the meson_options.txt, or can it just be specified in cross-files
> > and optionally via c_args?
>
> Add it to the meson_options.txt is good as the option will be clearly exposed.
> My concern is more options (e.g. RTE_ARCH_ARM64_MEMCPY) need to be added in.
> Will the options bloat meson_options.txt?
That bloat would indeed become a concern. We may need to look at more use
of auto-detection and cross files for such options.
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] Use WFE for spinlock and ring
2021-04-30 14:19 0% ` Bruce Richardson
@ 2021-05-07 10:18 0% ` Ruifeng Wang
2021-05-07 10:24 0% ` Bruce Richardson
0 siblings, 1 reply; 200+ results
From: Ruifeng Wang @ 2021-05-07 10:18 UTC (permalink / raw)
To: Bruce Richardson, Honnappa Nagarahalli
Cc: thomas, David Marchand, dev, jerinj, nd, nd
> -----Original Message-----
> From: Bruce Richardson <bruce.richardson@intel.com>
> Sent: Friday, April 30, 2021 10:19 PM
> To: Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com>
> Cc: thomas@monjalon.net; Ruifeng Wang <Ruifeng.Wang@arm.com>; David
> Marchand <david.marchand@redhat.com>; dev <dev@dpdk.org>;
> jerinj@marvell.com; nd <nd@arm.com>
> Subject: Re: Use WFE for spinlock and ring
>
> On Fri, Apr 30, 2021 at 01:41:22PM +0000, Honnappa Nagarahalli wrote:
> > <snip>
> >
> > > > > > > > >
> > > > > > > > > The rte_wait_until_equal_xxx APIs abstract the
> > > > > > > > > functionality of 'polling for a memory location to
> > > > > > > > > become equal to a given
> > > value'[1].
> > > > > > > > >
> > > > > > > > > Use the API for the rte spinlock and ring implementations.
> > > > > > > > > With the wait until equal APIs being stable, changes
> > > > > > > > > will not impact
> > > ABI.
> > > > > > > >
> > > > > > > > Afaics, there is no ARM target with WFE enabled and we
> > > > > > > > lost ability to enable WFE support with removal of the
> > > > > > > > make build
> > > system.
> > > > > > >
> > > > > > > WFE can be enabled with direct meson file change.
> > > > > > > WFE is not intended to be enabled by default. It can be
> > > > > > > enabled based on benchmarking result on hardware.
> > > > > > > >
> > > > > > > > $ git grep RTE_ARM_USE_WFE
> > > > > > > > config/arm/meson.build: ['RTE_ARM_USE_WFE', false],
> > > > > > > > lib/eal/arm/include/rte_pause_64.h:#ifdef RTE_ARM_USE_WFE
> > > > > > > >
> > > > > > > > How did you enable WFE to test this series?
> > > > > > >
> > > > > > > I modified meson file to test.
> > > > > > > Tests were also done with WFE disabled to make sure no
> > > > > > > degradation with
> > > > > > generic implementation.
> > > > > >
> > > > > > I don't understand the usage.
> > > > > > Which platform should use it?
> > > > >
> > > > > Platforms that implement WFE semantic (e.g. N1) can use.
> > > > > The user can enable this feature for power efficiency purpose.
> > > > > But there is something to note as described in commit message
> > > > > 1be7855d77
> > > when the API was introduced.
> > > > >
> > > > > > Should it be a compile-time option?
> > > > >
> > > > > Yes, it should be a compile-time option.
> > > > > It can be configured via c_args meson option?
> > > >
> > > > +Cc Bruce for discussing how to enable such feature.
> > > >
> > > > The problem with c_args is that the application has no way to know.
> > > >
> > > Agree about c_args not being a great choice. Why does this need to
> > > be a compile-time option? Can runtime support not be detected in
> > > some manner?
> > The problem is inconsistency in performance on different Arm platforms.
> We had decided that each platform needs to enable it after some testing.
>
> Then it sounds like it does indeed need to be a build option. Does it need to
> be added to the meson_options.txt, or can it just be specified in cross-files
> and optionally via c_args?
Add it to the meson_options.txt is good as the option will be clearly exposed.
My concern is more options (e.g. RTE_ARCH_ARM64_MEMCPY) need to be added in.
Will the options bloat meson_options.txt?
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [EXT] Re: [PATCH] doc: announce modification in eventdev structure
2021-05-04 9:36 3% ` Kinsella, Ray
@ 2021-05-07 9:17 0% ` Jerin Jacob
0 siblings, 0 replies; 200+ results
From: Jerin Jacob @ 2021-05-07 9:17 UTC (permalink / raw)
To: Kinsella, Ray
Cc: Akhil Goyal, Jerin Jacob Kollanukkaran, thomas, dev,
david.marchand, abhinandan.gujjar, hemant.agrawal, nipun.gupta,
sachin.saxena, Anoob Joseph, matan, roy.fan.zhang, g.singh,
erik.g.carrillo, jay.jayatheerthan, Pavan Nikhilesh Bhagavatula,
harry.van.haaren, Shijith Thotton
On Tue, May 4, 2021 at 3:06 PM Kinsella, Ray <mdr@ashroe.eu> wrote:
>
>
>
> On 03/05/2021 12:18, Akhil Goyal wrote:
> > Hi Ray,
> >>> @@ -127,6 +127,10 @@ Deprecation Notices
> >>> values to the function ``rte_event_eth_rx_adapter_queue_add`` using
> >>> the structure ``rte_event_eth_rx_adapter_queue_add``.
> >>>
> >>> +* eventdev: The function pointer ``ca_enqueue`` in structure
> >> ``rte_eventdev``
> >>> + will be moved after ``txa_enqueue`` so that all enqueue/dequeue
> >>> + function pointers are adjacent to each other.
> >>> +
> >>> * sched: To allow more traffic classes, flexible mapping of pipe queues to
> >>> traffic classes, and subport level configuration of pipes and queues
> >>> changes will be made to macros, data structures and API functions
> >> defined
> >>>
> >>
> >> I admire the disipline - but since you are not actually removing ca_enqueue,
> >> just moving it in memory when the new ABI is declared in anycase, this is not
> >> required.
> >>
> >
> > Does it mean we can move elements in a structure without giving deprecation notice?
> >
>
> well if memory serves - you aren't depreciating the field, just moving it, right?
> And you are aligning the change with an ABI break in anycase - so I think it is all good.
OK. Change the status of the patch in patchwork as "Not applicable"
>
> Ray K
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] Questions about API with no parameter check
@ 2021-05-05 15:58 3% ` Tyler Retzlaff
0 siblings, 0 replies; 200+ results
From: Tyler Retzlaff @ 2021-05-05 15:58 UTC (permalink / raw)
To: Ananyev, Konstantin
Cc: Dmitry Kozlyuk, Yigit, Ferruh, hemant.agrawal, Ajit Khaparde,
Jerin Jacob, Thomas Monjalon, Andrew Rybchenko, Min Hu (Connor),
dev, olivier.matz, david.marchand, jerinj, Richardson, Bruce
On Tue, May 04, 2021 at 09:36:24AM +0000, Ananyev, Konstantin wrote:
>
>
> >
> > 2021-04-29 09:16 (UTC-0700), Tyler Retzlaff:
> > > On Wed, Apr 07, 2021 at 05:10:00PM +0100, Ferruh Yigit wrote:
> > > > On 4/7/2021 4:25 PM, Hemant Agrawal wrote:
> > > > >>+1
> > > > >>But are we going to check all parameters?
> > > > >
> > > > >+1
> > > > >
> > > > >It may be better to limit the number of checks.
> > > > >
> > > >
> > > > +1 to verify input for APIs.
> > > >
> > > > Why not do all, what is the downside of checking all input for control path APIs?
> > >
> > > why not assert them then, what is the purpose of returning an error to a
> > > caller for a api contract violation like a `parameter shall not be NULL`
> > >
> > > * assert.h/cassert can be compiled away for those pundits who don't want
> > > to see extra branches in their code
> > >
> > > * when not compiled away it gives you an immediate stack trace or dump to operate
> > > on immediately identifying the problem instead of having to troll
> > > through hoaky inconsistently formatted logging.
> > >
> > > * it catches callers who don't bother to check for error from return of
> > > the function (debug builds) instead of some arbitrary failure at some
> > > unrelated part of the code where the corrupted program state is relied
> > > upon.
> > >
> > > we aren't running in kernel, we can crash.
> >
> > As library developers we can't assume stability requirements at call site.
> > There may be temporary files to clean up, for example,
> > or other threads in the middle of their work.
> >
> > As an application developer I'd hate to get a crash inside a library and
> > having to debug it. Usually installed are release versions with assertions
> > compiled away.
>
> I agree with Dmitry summary above.
> Asserting inside the library calls is bad programming practice,
> please keep it away from the project.
i'm not advocating for asserts i'm advocating for users to have a
choice instead of being opted in to this change unconditionally.
asserts are an option that may be policy controlled as previously mentioned
either in this thread or another. so if you don't like them you can disable
them as a function of the policy. for a basic assert that means building
release instead of debug but a more sophisticated policy mechanism could be
employed if desired.
what you can't turn off is introduction of superfluous errors being
returned due to programming mistakes in the application which should be
handled yet have no sensible way to be handled. it just clutters the
calling code with unnecessary error handling, makes the errors returned
ambiguious and often indistinguishable from real errors.
by this logic we should modify rte_free to be
int rte_free(void * p) { if (p == NULL) return EINVAL; mem_free(p, true); }
which is about as useful as one can imagine.
this proposal has been pushed through too quickly without proper debate,
and the patch that introduces the superfluous errors breaks abi. tech
board should get involved before it goes further.
i'm not asking for asserts, i'm asking not to be opted in to an equally
harmful error handling pattern that makes application logic more error
prone and more complex negatively impacting quality.
thanks
^ permalink raw reply [relevance 3%]
* [dpdk-dev] [PATCH v5 12/12] raw/ioat: report status of completed jobs
@ 2021-05-04 13:14 2% ` Bruce Richardson
0 siblings, 0 replies; 200+ results
From: Bruce Richardson @ 2021-05-04 13:14 UTC (permalink / raw)
To: dev; +Cc: kevin.laatz, sunil.pai.g, jiayu.hu, Bruce Richardson
Add improved error handling to rte_ioat_completed_ops(). This patch adds
new parameters to the function to enable the user to track the completion
status of each individual operation in a batch. With this addition, the
function can help the user to determine firstly, how many operations may
have failed or been skipped and then secondly, which specific operations
did not complete successfully.
Signed-off-by: Kevin Laatz <kevin.laatz@intel.com>
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
---
doc/guides/rel_notes/release_21_05.rst | 5 +
drivers/raw/ioat/ioat_common.c | 9 +
drivers/raw/ioat/ioat_rawdev_test.c | 274 ++++++++++++++++++++++++-
drivers/raw/ioat/rte_idxd_rawdev_fns.h | 151 ++++++++++----
drivers/raw/ioat/rte_ioat_rawdev.h | 53 ++++-
drivers/raw/ioat/rte_ioat_rawdev_fns.h | 15 +-
examples/ioat/ioatfwd.c | 14 +-
examples/vhost/ioat.c | 2 +-
8 files changed, 455 insertions(+), 68 deletions(-)
diff --git a/doc/guides/rel_notes/release_21_05.rst b/doc/guides/rel_notes/release_21_05.rst
index cd33898c55..064810a8f9 100644
--- a/doc/guides/rel_notes/release_21_05.rst
+++ b/doc/guides/rel_notes/release_21_05.rst
@@ -333,6 +333,11 @@ API Changes
it's not supported on the current platform. Instead ``rte_stack_create()``
fails and ``rte_errno`` is set to ``ENOTSUP``.
+* raw/ioat: The experimental function ``rte_ioat_completed_ops()`` now
+ supports two additional parameters, ``status`` and ``num_unsuccessful``,
+ to allow the reporting of errors from hardware when performing copy
+ operations.
+
ABI Changes
-----------
diff --git a/drivers/raw/ioat/ioat_common.c b/drivers/raw/ioat/ioat_common.c
index fcb30572e6..d01c1ee367 100644
--- a/drivers/raw/ioat/ioat_common.c
+++ b/drivers/raw/ioat/ioat_common.c
@@ -162,6 +162,15 @@ idxd_dev_configure(const struct rte_rawdev *dev,
rte_idxd->desc_ring = NULL;
return -ENOMEM;
}
+ rte_idxd->hdl_ring_flags = rte_zmalloc(NULL,
+ sizeof(*rte_idxd->hdl_ring_flags) * max_desc, 0);
+ if (rte_idxd->hdl_ring_flags == NULL) {
+ rte_free(rte_idxd->desc_ring);
+ rte_free(rte_idxd->hdl_ring);
+ rte_idxd->desc_ring = NULL;
+ rte_idxd->hdl_ring = NULL;
+ return -ENOMEM;
+ }
rte_idxd->hdls_read = rte_idxd->batch_start = 0;
rte_idxd->batch_size = 0;
diff --git a/drivers/raw/ioat/ioat_rawdev_test.c b/drivers/raw/ioat/ioat_rawdev_test.c
index 839a716a21..5e33669699 100644
--- a/drivers/raw/ioat/ioat_rawdev_test.c
+++ b/drivers/raw/ioat/ioat_rawdev_test.c
@@ -73,13 +73,15 @@ do_multi_copies(int dev_id, int split_batches, int split_completions)
if (split_completions) {
/* gather completions in two halves */
uint16_t half_len = RTE_DIM(srcs) / 2;
- if (rte_ioat_completed_ops(dev_id, half_len, (void *)completed_src,
+ if (rte_ioat_completed_ops(dev_id, half_len, NULL, NULL,
+ (void *)completed_src,
(void *)completed_dst) != half_len) {
PRINT_ERR("Error with rte_ioat_completed_ops - first half request\n");
rte_rawdev_dump(dev_id, stdout);
return -1;
}
- if (rte_ioat_completed_ops(dev_id, half_len, (void *)&completed_src[half_len],
+ if (rte_ioat_completed_ops(dev_id, half_len, NULL, NULL,
+ (void *)&completed_src[half_len],
(void *)&completed_dst[half_len]) != half_len) {
PRINT_ERR("Error with rte_ioat_completed_ops - second half request\n");
rte_rawdev_dump(dev_id, stdout);
@@ -87,7 +89,8 @@ do_multi_copies(int dev_id, int split_batches, int split_completions)
}
} else {
/* gather all completions in one go */
- if (rte_ioat_completed_ops(dev_id, 64, (void *)completed_src,
+ if (rte_ioat_completed_ops(dev_id, RTE_DIM(completed_src), NULL, NULL,
+ (void *)completed_src,
(void *)completed_dst) != RTE_DIM(srcs)) {
PRINT_ERR("Error with rte_ioat_completed_ops\n");
rte_rawdev_dump(dev_id, stdout);
@@ -151,7 +154,7 @@ test_enqueue_copies(int dev_id)
rte_ioat_perform_ops(dev_id);
usleep(10);
- if (rte_ioat_completed_ops(dev_id, 1, (void *)&completed[0],
+ if (rte_ioat_completed_ops(dev_id, 1, NULL, NULL, (void *)&completed[0],
(void *)&completed[1]) != 1) {
PRINT_ERR("Error with rte_ioat_completed_ops\n");
return -1;
@@ -170,6 +173,13 @@ test_enqueue_copies(int dev_id)
}
rte_pktmbuf_free(src);
rte_pktmbuf_free(dst);
+
+ /* check ring is now empty */
+ if (rte_ioat_completed_ops(dev_id, 1, NULL, NULL, (void *)&completed[0],
+ (void *)&completed[1]) != 0) {
+ PRINT_ERR("Error: got unexpected returned handles from rte_ioat_completed_ops\n");
+ return -1;
+ }
} while (0);
/* test doing a multiple single copies */
@@ -203,7 +213,8 @@ test_enqueue_copies(int dev_id)
}
usleep(10);
- if (rte_ioat_completed_ops(dev_id, max_completions, (void *)&completed[0],
+ if (rte_ioat_completed_ops(dev_id, max_completions, NULL, NULL,
+ (void *)&completed[0],
(void *)&completed[max_completions]) != max_ops) {
PRINT_ERR("Error with rte_ioat_completed_ops\n");
rte_rawdev_dump(dev_id, stdout);
@@ -256,7 +267,7 @@ test_enqueue_fill(int dev_id)
rte_ioat_perform_ops(dev_id);
usleep(100);
- if (rte_ioat_completed_ops(dev_id, 1, (void *)&completed[0],
+ if (rte_ioat_completed_ops(dev_id, 1, NULL, NULL, (void *)&completed[0],
(void *)&completed[1]) != 1) {
PRINT_ERR("Error with completed ops\n");
return -1;
@@ -266,8 +277,7 @@ test_enqueue_fill(int dev_id)
char pat_byte = ((char *)&pattern)[j % 8];
if (dst_data[j] != pat_byte) {
PRINT_ERR("Error with fill operation (lengths = %u): got (%x), not (%x)\n",
- lengths[i], dst_data[j],
- pat_byte);
+ lengths[i], dst_data[j], pat_byte);
return -1;
}
}
@@ -323,6 +333,7 @@ test_burst_capacity(int dev_id)
usleep(100);
for (i = 0; i < ring_space / (2 * BURST_SIZE); i++) {
if (rte_ioat_completed_ops(dev_id, BURST_SIZE,
+ NULL, NULL,
completions, completions) != BURST_SIZE) {
PRINT_ERR("Error with completions\n");
return -1;
@@ -341,10 +352,248 @@ test_burst_capacity(int dev_id)
return 0;
}
+static int
+test_completion_status(int dev_id)
+{
+#define COMP_BURST_SZ 16
+ const unsigned int fail_copy[] = {0, 7, 15};
+ struct rte_mbuf *srcs[COMP_BURST_SZ], *dsts[COMP_BURST_SZ];
+ struct rte_mbuf *completed_src[COMP_BURST_SZ * 2];
+ struct rte_mbuf *completed_dst[COMP_BURST_SZ * 2];
+ unsigned int length = 1024;
+ unsigned int i;
+ uint8_t not_ok = 0;
+
+ /* Test single full batch statuses */
+ for (i = 0; i < RTE_DIM(fail_copy); i++) {
+ uint32_t status[COMP_BURST_SZ] = {0};
+ unsigned int j;
+
+ for (j = 0; j < COMP_BURST_SZ; j++) {
+ srcs[j] = rte_pktmbuf_alloc(pool);
+ dsts[j] = rte_pktmbuf_alloc(pool);
+
+ if (rte_ioat_enqueue_copy(dev_id,
+ (j == fail_copy[i] ? (phys_addr_t)NULL :
+ (srcs[j]->buf_iova + srcs[j]->data_off)),
+ dsts[j]->buf_iova + dsts[j]->data_off,
+ length,
+ (uintptr_t)srcs[j],
+ (uintptr_t)dsts[j]) != 1) {
+ PRINT_ERR("Error with rte_ioat_enqueue_copy for buffer %u\n", j);
+ return -1;
+ }
+ }
+ rte_ioat_perform_ops(dev_id);
+ usleep(100);
+
+ if (rte_ioat_completed_ops(dev_id, COMP_BURST_SZ, status, ¬_ok,
+ (void *)completed_src, (void *)completed_dst) != COMP_BURST_SZ) {
+ PRINT_ERR("Error with rte_ioat_completed_ops\n");
+ rte_rawdev_dump(dev_id, stdout);
+ return -1;
+ }
+ if (not_ok != 1 || status[fail_copy[i]] == RTE_IOAT_OP_SUCCESS) {
+ unsigned int j;
+ PRINT_ERR("Error, missing expected failed copy, %u\n", fail_copy[i]);
+ for (j = 0; j < COMP_BURST_SZ; j++)
+ printf("%u ", status[j]);
+ printf("<-- Statuses\n");
+ return -1;
+ }
+ for (j = 0; j < COMP_BURST_SZ; j++) {
+ rte_pktmbuf_free(completed_src[j]);
+ rte_pktmbuf_free(completed_dst[j]);
+ }
+ }
+
+ /* Test gathering status for two batches at once */
+ for (i = 0; i < RTE_DIM(fail_copy); i++) {
+ uint32_t status[COMP_BURST_SZ] = {0};
+ unsigned int batch, j;
+ unsigned int expected_failures = 0;
+
+ for (batch = 0; batch < 2; batch++) {
+ for (j = 0; j < COMP_BURST_SZ/2; j++) {
+ srcs[j] = rte_pktmbuf_alloc(pool);
+ dsts[j] = rte_pktmbuf_alloc(pool);
+
+ if (j == fail_copy[i])
+ expected_failures++;
+ if (rte_ioat_enqueue_copy(dev_id,
+ (j == fail_copy[i] ? (phys_addr_t)NULL :
+ (srcs[j]->buf_iova + srcs[j]->data_off)),
+ dsts[j]->buf_iova + dsts[j]->data_off,
+ length,
+ (uintptr_t)srcs[j],
+ (uintptr_t)dsts[j]) != 1) {
+ PRINT_ERR("Error with rte_ioat_enqueue_copy for buffer %u\n",
+ j);
+ return -1;
+ }
+ }
+ rte_ioat_perform_ops(dev_id);
+ }
+ usleep(100);
+
+ if (rte_ioat_completed_ops(dev_id, COMP_BURST_SZ, status, ¬_ok,
+ (void *)completed_src, (void *)completed_dst) != COMP_BURST_SZ) {
+ PRINT_ERR("Error with rte_ioat_completed_ops\n");
+ rte_rawdev_dump(dev_id, stdout);
+ return -1;
+ }
+ if (not_ok != expected_failures) {
+ unsigned int j;
+ PRINT_ERR("Error, missing expected failed copy, got %u, not %u\n",
+ not_ok, expected_failures);
+ for (j = 0; j < COMP_BURST_SZ; j++)
+ printf("%u ", status[j]);
+ printf("<-- Statuses\n");
+ return -1;
+ }
+ for (j = 0; j < COMP_BURST_SZ; j++) {
+ rte_pktmbuf_free(completed_src[j]);
+ rte_pktmbuf_free(completed_dst[j]);
+ }
+ }
+
+ /* Test gathering status for half batch at a time */
+ for (i = 0; i < RTE_DIM(fail_copy); i++) {
+ uint32_t status[COMP_BURST_SZ] = {0};
+ unsigned int j;
+
+ for (j = 0; j < COMP_BURST_SZ; j++) {
+ srcs[j] = rte_pktmbuf_alloc(pool);
+ dsts[j] = rte_pktmbuf_alloc(pool);
+
+ if (rte_ioat_enqueue_copy(dev_id,
+ (j == fail_copy[i] ? (phys_addr_t)NULL :
+ (srcs[j]->buf_iova + srcs[j]->data_off)),
+ dsts[j]->buf_iova + dsts[j]->data_off,
+ length,
+ (uintptr_t)srcs[j],
+ (uintptr_t)dsts[j]) != 1) {
+ PRINT_ERR("Error with rte_ioat_enqueue_copy for buffer %u\n", j);
+ return -1;
+ }
+ }
+ rte_ioat_perform_ops(dev_id);
+ usleep(100);
+
+ if (rte_ioat_completed_ops(dev_id, COMP_BURST_SZ / 2, status, ¬_ok,
+ (void *)completed_src,
+ (void *)completed_dst) != (COMP_BURST_SZ / 2)) {
+ PRINT_ERR("Error with rte_ioat_completed_ops\n");
+ rte_rawdev_dump(dev_id, stdout);
+ return -1;
+ }
+ if (fail_copy[i] < COMP_BURST_SZ / 2 &&
+ (not_ok != 1 || status[fail_copy[i]] == RTE_IOAT_OP_SUCCESS)) {
+ PRINT_ERR("Missing expected failure in first half-batch\n");
+ rte_rawdev_dump(dev_id, stdout);
+ return -1;
+ }
+ if (rte_ioat_completed_ops(dev_id, COMP_BURST_SZ / 2, status, ¬_ok,
+ (void *)&completed_src[COMP_BURST_SZ / 2],
+ (void *)&completed_dst[COMP_BURST_SZ / 2]) != (COMP_BURST_SZ / 2)) {
+ PRINT_ERR("Error with rte_ioat_completed_ops\n");
+ rte_rawdev_dump(dev_id, stdout);
+ return -1;
+ }
+ if (fail_copy[i] >= COMP_BURST_SZ / 2 && (not_ok != 1 ||
+ status[fail_copy[i] - (COMP_BURST_SZ / 2)]
+ == RTE_IOAT_OP_SUCCESS)) {
+ PRINT_ERR("Missing expected failure in second half-batch\n");
+ rte_rawdev_dump(dev_id, stdout);
+ return -1;
+ }
+
+ for (j = 0; j < COMP_BURST_SZ; j++) {
+ rte_pktmbuf_free(completed_src[j]);
+ rte_pktmbuf_free(completed_dst[j]);
+ }
+ }
+
+ /* Test gathering statuses with fence */
+ for (i = 1; i < RTE_DIM(fail_copy); i++) {
+ uint32_t status[COMP_BURST_SZ * 2] = {0};
+ unsigned int j;
+ uint16_t count;
+
+ for (j = 0; j < COMP_BURST_SZ; j++) {
+ srcs[j] = rte_pktmbuf_alloc(pool);
+ dsts[j] = rte_pktmbuf_alloc(pool);
+
+ /* always fail the first copy */
+ if (rte_ioat_enqueue_copy(dev_id,
+ (j == 0 ? (phys_addr_t)NULL :
+ (srcs[j]->buf_iova + srcs[j]->data_off)),
+ dsts[j]->buf_iova + dsts[j]->data_off,
+ length,
+ (uintptr_t)srcs[j],
+ (uintptr_t)dsts[j]) != 1) {
+ PRINT_ERR("Error with rte_ioat_enqueue_copy for buffer %u\n", j);
+ return -1;
+ }
+ /* put in a fence which will stop any further transactions
+ * because we had a previous failure.
+ */
+ if (j == fail_copy[i])
+ rte_ioat_fence(dev_id);
+ }
+ rte_ioat_perform_ops(dev_id);
+ usleep(100);
+
+ count = rte_ioat_completed_ops(dev_id, COMP_BURST_SZ * 2, status, ¬_ok,
+ (void *)completed_src, (void *)completed_dst);
+ if (count != COMP_BURST_SZ) {
+ PRINT_ERR("Error with rte_ioat_completed_ops, got %u not %u\n",
+ count, COMP_BURST_SZ);
+ for (j = 0; j < count; j++)
+ printf("%u ", status[j]);
+ printf("<-- Statuses\n");
+ return -1;
+ }
+ if (not_ok != COMP_BURST_SZ - fail_copy[i]) {
+ PRINT_ERR("Unexpected failed copy count, got %u, expected %u\n",
+ not_ok, COMP_BURST_SZ - fail_copy[i]);
+ for (j = 0; j < COMP_BURST_SZ; j++)
+ printf("%u ", status[j]);
+ printf("<-- Statuses\n");
+ return -1;
+ }
+ if (status[0] == RTE_IOAT_OP_SUCCESS || status[0] == RTE_IOAT_OP_SKIPPED) {
+ PRINT_ERR("Error, op 0 unexpectedly did not fail.\n");
+ return -1;
+ }
+ for (j = 1; j <= fail_copy[i]; j++) {
+ if (status[j] != RTE_IOAT_OP_SUCCESS) {
+ PRINT_ERR("Error, op %u unexpectedly failed\n", j);
+ return -1;
+ }
+ }
+ for (j = fail_copy[i] + 1; j < COMP_BURST_SZ; j++) {
+ if (status[j] != RTE_IOAT_OP_SKIPPED) {
+ PRINT_ERR("Error, all descriptors after fence should be invalid\n");
+ return -1;
+ }
+ }
+ for (j = 0; j < COMP_BURST_SZ; j++) {
+ rte_pktmbuf_free(completed_src[j]);
+ rte_pktmbuf_free(completed_dst[j]);
+ }
+ }
+
+ return 0;
+}
+
int
ioat_rawdev_test(uint16_t dev_id)
{
#define IOAT_TEST_RINGSIZE 512
+ const struct rte_idxd_rawdev *idxd =
+ (struct rte_idxd_rawdev *)rte_rawdevs[dev_id].dev_private;
+ const enum rte_ioat_dev_type ioat_type = idxd->type;
struct rte_ioat_rawdev_config p = { .ring_size = -1 };
struct rte_rawdev_info info = { .dev_private = &p };
struct rte_rawdev_xstats_name *snames = NULL;
@@ -453,6 +702,15 @@ ioat_rawdev_test(uint16_t dev_id)
if (test_burst_capacity(dev_id) != 0)
goto err;
+ /* only DSA devices report address errors, and we can only use null pointers
+ * to generate those errors when DPDK is in VA mode.
+ */
+ if (rte_eal_iova_mode() == RTE_IOVA_VA && ioat_type == RTE_IDXD_DEV) {
+ printf("Running Completions Status Test\n");
+ if (test_completion_status(dev_id) != 0)
+ goto err;
+ }
+
rte_rawdev_stop(dev_id);
if (rte_rawdev_xstats_reset(dev_id, NULL, 0) != 0) {
PRINT_ERR("Error resetting xstat values\n");
diff --git a/drivers/raw/ioat/rte_idxd_rawdev_fns.h b/drivers/raw/ioat/rte_idxd_rawdev_fns.h
index 0bd9cfbd0d..862e0eb41d 100644
--- a/drivers/raw/ioat/rte_idxd_rawdev_fns.h
+++ b/drivers/raw/ioat/rte_idxd_rawdev_fns.h
@@ -115,8 +115,17 @@ struct rte_idxd_rawdev {
struct rte_idxd_hw_desc *desc_ring;
struct rte_idxd_user_hdl *hdl_ring;
+ /* flags to indicate handle validity. Kept separate from ring, to avoid
+ * using 8 bytes per flag. Upper 8 bits holds error code if any.
+ */
+ uint16_t *hdl_ring_flags;
};
+#define RTE_IDXD_HDL_NORMAL 0
+#define RTE_IDXD_HDL_INVALID (1 << 0) /* no handle stored for this element */
+#define RTE_IDXD_HDL_OP_FAILED (1 << 1) /* return failure for this one */
+#define RTE_IDXD_HDL_OP_SKIPPED (1 << 2) /* this op was skipped */
+
static __rte_always_inline uint16_t
__idxd_burst_capacity(int dev_id)
{
@@ -135,8 +144,10 @@ __idxd_burst_capacity(int dev_id)
write_idx += idxd->desc_ring_mask + 1;
used_space = write_idx - idxd->hdls_read;
- /* Return amount of free space in the descriptor ring */
- return idxd->desc_ring_mask - used_space;
+ /* Return amount of free space in the descriptor ring
+ * subtract 1 for space for batch descriptor and 1 for possible null desc
+ */
+ return idxd->desc_ring_mask - used_space - 2;
}
static __rte_always_inline rte_iova_t
@@ -156,23 +167,28 @@ __idxd_write_desc(int dev_id,
struct rte_idxd_rawdev *idxd =
(struct rte_idxd_rawdev *)rte_rawdevs[dev_id].dev_private;
uint16_t write_idx = idxd->batch_start + idxd->batch_size;
+ uint16_t mask = idxd->desc_ring_mask;
/* first check batch ring space then desc ring space */
if ((idxd->batch_idx_read == 0 && idxd->batch_idx_write == idxd->max_batches) ||
idxd->batch_idx_write + 1 == idxd->batch_idx_read)
goto failed;
- if (((write_idx + 1) & idxd->desc_ring_mask) == idxd->hdls_read)
+ /* for descriptor ring, we always need a slot for batch completion */
+ if (((write_idx + 2) & mask) == idxd->hdls_read)
goto failed;
/* write desc and handle. Note, descriptors don't wrap */
idxd->desc_ring[write_idx].pasid = 0;
idxd->desc_ring[write_idx].op_flags = op_flags | IDXD_FLAG_COMPLETION_ADDR_VALID;
- idxd->desc_ring[write_idx].completion = __desc_idx_to_iova(idxd, write_idx);
+ idxd->desc_ring[write_idx].completion = __desc_idx_to_iova(idxd, write_idx & mask);
idxd->desc_ring[write_idx].src = src;
idxd->desc_ring[write_idx].dst = dst;
idxd->desc_ring[write_idx].size = size;
- idxd->hdl_ring[write_idx & idxd->desc_ring_mask] = *hdl;
+ if (hdl == NULL)
+ idxd->hdl_ring_flags[write_idx & mask] = RTE_IDXD_HDL_INVALID;
+ else
+ idxd->hdl_ring[write_idx & mask] = *hdl;
idxd->batch_size++;
idxd->xstats.enqueued++;
@@ -214,9 +230,8 @@ __idxd_enqueue_copy(int dev_id, rte_iova_t src, rte_iova_t dst,
static __rte_always_inline int
__idxd_fence(int dev_id)
{
- static const struct rte_idxd_user_hdl null_hdl;
/* only op field needs filling - zero src, dst and length */
- return __idxd_write_desc(dev_id, IDXD_FLAG_FENCE, 0, 0, 0, &null_hdl);
+ return __idxd_write_desc(dev_id, IDXD_FLAG_FENCE, 0, 0, 0, NULL);
}
static __rte_always_inline void
@@ -233,42 +248,37 @@ __idxd_perform_ops(int dev_id)
{
struct rte_idxd_rawdev *idxd =
(struct rte_idxd_rawdev *)rte_rawdevs[dev_id].dev_private;
- /* write completion to last desc in the batch */
- uint16_t comp_idx = idxd->batch_start + idxd->batch_size - 1;
- if (comp_idx > idxd->desc_ring_mask) {
- comp_idx &= idxd->desc_ring_mask;
- *((uint64_t *)&idxd->desc_ring[comp_idx]) = 0; /* zero start of desc */
- }
+
+ if (!idxd->cfg.no_prefetch_completions)
+ rte_prefetch1(&idxd->desc_ring[idxd->batch_idx_ring[idxd->batch_idx_read]]);
if (idxd->batch_size == 0)
return 0;
- _mm_sfence(); /* fence before writing desc to device */
- if (idxd->batch_size > 1) {
- struct rte_idxd_hw_desc batch_desc = {
- .op_flags = (idxd_op_batch << IDXD_CMD_OP_SHIFT) |
- IDXD_FLAG_COMPLETION_ADDR_VALID |
- IDXD_FLAG_REQUEST_COMPLETION,
- .desc_addr = __desc_idx_to_iova(idxd, idxd->batch_start),
- .completion = __desc_idx_to_iova(idxd, comp_idx),
- .size = idxd->batch_size,
- };
-
- __idxd_movdir64b(idxd->portal, &batch_desc);
- } else {
- /* special case batch size of 1, as not allowed by HW */
- /* comp_idx == batch_start */
- struct rte_idxd_hw_desc *desc = &idxd->desc_ring[comp_idx];
- desc->op_flags |= IDXD_FLAG_COMPLETION_ADDR_VALID |
- IDXD_FLAG_REQUEST_COMPLETION;
- desc->completion = __desc_idx_to_iova(idxd, comp_idx);
-
- __idxd_movdir64b(idxd->portal, desc);
- }
+ if (idxd->batch_size == 1)
+ /* use a fence as a null descriptor, so batch_size >= 2 */
+ if (__idxd_fence(dev_id) != 1)
+ return -1;
+
+ /* write completion beyond last desc in the batch */
+ uint16_t comp_idx = (idxd->batch_start + idxd->batch_size) & idxd->desc_ring_mask;
+ *((uint64_t *)&idxd->desc_ring[comp_idx]) = 0; /* zero start of desc */
+ idxd->hdl_ring_flags[comp_idx] = RTE_IDXD_HDL_INVALID;
+
+ const struct rte_idxd_hw_desc batch_desc = {
+ .op_flags = (idxd_op_batch << IDXD_CMD_OP_SHIFT) |
+ IDXD_FLAG_COMPLETION_ADDR_VALID |
+ IDXD_FLAG_REQUEST_COMPLETION,
+ .desc_addr = __desc_idx_to_iova(idxd, idxd->batch_start),
+ .completion = __desc_idx_to_iova(idxd, comp_idx),
+ .size = idxd->batch_size,
+ };
+ _mm_sfence(); /* fence before writing desc to device */
+ __idxd_movdir64b(idxd->portal, &batch_desc);
idxd->xstats.started += idxd->batch_size;
- idxd->batch_start += idxd->batch_size;
+ idxd->batch_start += idxd->batch_size + 1;
idxd->batch_start &= idxd->desc_ring_mask;
idxd->batch_size = 0;
@@ -280,7 +290,7 @@ __idxd_perform_ops(int dev_id)
}
static __rte_always_inline int
-__idxd_completed_ops(int dev_id, uint8_t max_ops,
+__idxd_completed_ops(int dev_id, uint8_t max_ops, uint32_t *status, uint8_t *num_unsuccessful,
uintptr_t *src_hdls, uintptr_t *dst_hdls)
{
struct rte_idxd_rawdev *idxd =
@@ -291,8 +301,37 @@ __idxd_completed_ops(int dev_id, uint8_t max_ops,
uint16_t idx_to_chk = idxd->batch_idx_ring[idxd->batch_idx_read];
volatile struct rte_idxd_completion *comp_to_chk =
(struct rte_idxd_completion *)&idxd->desc_ring[idx_to_chk];
- if (comp_to_chk->status == 0)
+ uint8_t status = comp_to_chk->status;
+ if (status == 0)
break;
+ comp_to_chk->status = 0;
+ if (unlikely(status > 1)) {
+ /* error occurred somewhere in batch, start where last checked */
+ uint16_t desc_count = comp_to_chk->completed_size;
+ uint16_t batch_start = idxd->hdls_avail;
+ uint16_t batch_end = idx_to_chk;
+
+ if (batch_start > batch_end)
+ batch_end += idxd->desc_ring_mask + 1;
+ /* go through each batch entry and see status */
+ for (n = 0; n < desc_count; n++) {
+ uint16_t idx = (batch_start + n) & idxd->desc_ring_mask;
+ volatile struct rte_idxd_completion *comp =
+ (struct rte_idxd_completion *)&idxd->desc_ring[idx];
+ if (comp->status != 0 &&
+ idxd->hdl_ring_flags[idx] == RTE_IDXD_HDL_NORMAL) {
+ idxd->hdl_ring_flags[idx] = RTE_IDXD_HDL_OP_FAILED;
+ idxd->hdl_ring_flags[idx] |= (comp->status << 8);
+ comp->status = 0; /* clear error for next time */
+ }
+ }
+ /* if batch is incomplete, mark rest as skipped */
+ for ( ; n < batch_end - batch_start; n++) {
+ uint16_t idx = (batch_start + n) & idxd->desc_ring_mask;
+ if (idxd->hdl_ring_flags[idx] == RTE_IDXD_HDL_NORMAL)
+ idxd->hdl_ring_flags[idx] = RTE_IDXD_HDL_OP_SKIPPED;
+ }
+ }
/* avail points to one after the last one written */
idxd->hdls_avail = (idx_to_chk + 1) & idxd->desc_ring_mask;
idxd->batch_idx_read++;
@@ -300,7 +339,7 @@ __idxd_completed_ops(int dev_id, uint8_t max_ops,
idxd->batch_idx_read = 0;
}
- if (idxd->cfg.hdls_disable) {
+ if (idxd->cfg.hdls_disable && status == NULL) {
n = (idxd->hdls_avail < idxd->hdls_read) ?
(idxd->hdls_avail + idxd->desc_ring_mask + 1 - idxd->hdls_read) :
(idxd->hdls_avail - idxd->hdls_read);
@@ -308,10 +347,36 @@ __idxd_completed_ops(int dev_id, uint8_t max_ops,
goto out;
}
- for (n = 0, h_idx = idxd->hdls_read;
- n < max_ops && h_idx != idxd->hdls_avail; n++) {
- src_hdls[n] = idxd->hdl_ring[h_idx].src;
- dst_hdls[n] = idxd->hdl_ring[h_idx].dst;
+ n = 0;
+ h_idx = idxd->hdls_read;
+ while (h_idx != idxd->hdls_avail) {
+ uint16_t flag = idxd->hdl_ring_flags[h_idx];
+ if (flag != RTE_IDXD_HDL_INVALID) {
+ if (!idxd->cfg.hdls_disable) {
+ src_hdls[n] = idxd->hdl_ring[h_idx].src;
+ dst_hdls[n] = idxd->hdl_ring[h_idx].dst;
+ }
+ if (unlikely(flag != RTE_IDXD_HDL_NORMAL)) {
+ if (status != NULL)
+ status[n] = flag == RTE_IDXD_HDL_OP_SKIPPED ?
+ RTE_IOAT_OP_SKIPPED :
+ /* failure case, return err code */
+ idxd->hdl_ring_flags[h_idx] >> 8;
+ if (num_unsuccessful != NULL)
+ *num_unsuccessful += 1;
+ }
+ n++;
+ }
+ idxd->hdl_ring_flags[h_idx] = RTE_IDXD_HDL_NORMAL;
+ if (++h_idx > idxd->desc_ring_mask)
+ h_idx = 0;
+ if (n >= max_ops)
+ break;
+ }
+
+ /* skip over any remaining blank elements, e.g. batch completion */
+ while (idxd->hdl_ring_flags[h_idx] == RTE_IDXD_HDL_INVALID && h_idx != idxd->hdls_avail) {
+ idxd->hdl_ring_flags[h_idx] = RTE_IDXD_HDL_NORMAL;
if (++h_idx > idxd->desc_ring_mask)
h_idx = 0;
}
diff --git a/drivers/raw/ioat/rte_ioat_rawdev.h b/drivers/raw/ioat/rte_ioat_rawdev.h
index e5a22a0799..6cc1560a64 100644
--- a/drivers/raw/ioat/rte_ioat_rawdev.h
+++ b/drivers/raw/ioat/rte_ioat_rawdev.h
@@ -35,6 +35,10 @@ extern "C" {
struct rte_ioat_rawdev_config {
unsigned short ring_size; /**< size of job submission descriptor ring */
bool hdls_disable; /**< if set, ignore user-supplied handle params */
+ /** set "no_prefetch_completions", if polling completions on separate core
+ * from the core submitting the jobs
+ */
+ bool no_prefetch_completions;
};
/**
@@ -131,40 +135,73 @@ static inline int
__rte_experimental
rte_ioat_perform_ops(int dev_id);
+/*
+ * Status codes for operations.
+ */
+#define RTE_IOAT_OP_SUCCESS 0 /**< Operation completed successfully */
+#define RTE_IOAT_OP_SKIPPED 1 /**< Operation was not attempted (Earlier fenced op failed) */
+/* Values >1 indicate a failure condition */
+/* Error codes taken from Intel(R) Data Streaming Accelerator Architecture
+ * Specification, section 5.7
+ */
+#define RTE_IOAT_OP_ADDRESS_ERR 0x03 /**< Page fault or invalid address */
+#define RTE_IOAT_OP_INVALID_LEN 0x13 /**< Invalid/too big length field passed */
+#define RTE_IOAT_OP_OVERLAPPING_BUFS 0x16 /**< Overlapping buffers error */
+
+
/**
* Returns details of operations that have been completed
*
+ * The status of each operation is returned in the status array parameter.
* If the hdls_disable option was not set when the device was configured,
* the function will return to the caller the user-provided "handles" for
* the copy operations which have been completed by the hardware, and not
* already returned by a previous call to this API.
* If the hdls_disable option for the device was set on configure, the
- * max_copies, src_hdls and dst_hdls parameters will be ignored, and the
+ * src_hdls and dst_hdls parameters will be ignored, and the
* function returns the number of newly-completed operations.
+ * If status is also NULL, then max_copies parameter is also ignored and the
+ * function returns a count of the number of newly-completed operations.
*
* @param dev_id
* The rawdev device id of the ioat instance
* @param max_copies
- * The number of entries which can fit in the src_hdls and dst_hdls
+ * The number of entries which can fit in the status, src_hdls and dst_hdls
* arrays, i.e. max number of completed operations to report.
* NOTE: If hdls_disable configuration option for the device is set, this
- * parameter is ignored.
+ * parameter applies only to the "status" array if specified
+ * @param status
+ * Array to hold the status of each completed operation. Array should be
+ * set to zeros on input, as the driver will only write error status values.
+ * A value of 1 implies an operation was not attempted, and any other non-zero
+ * value indicates operation failure.
+ * Parameter may be NULL if no status value checking is required.
+ * @param num_unsuccessful
+ * Returns the number of elements in status where the value is non-zero,
+ * i.e. the operation either failed or was not attempted due to an earlier
+ * failure. If this value is returned as zero (the expected case), the
+ * status array will not have been modified by the function and need not be
+ * checked by software
* @param src_hdls
* Array to hold the source handle parameters of the completed ops.
* NOTE: If hdls_disable configuration option for the device is set, this
- * parameter is ignored.
+ * parameter is ignored, and may be NULL
* @param dst_hdls
* Array to hold the destination handle parameters of the completed ops.
* NOTE: If hdls_disable configuration option for the device is set, this
- * parameter is ignored.
+ * parameter is ignored, and may be NULL
* @return
- * -1 on error, with rte_errno set appropriately.
- * Otherwise number of completed operations i.e. number of entries written
- * to the src_hdls and dst_hdls array parameters.
+ * -1 on device error, with rte_errno set appropriately and parameters
+ * unmodified.
+ * Otherwise number of returned operations i.e. number of valid entries
+ * in the status, src_hdls and dst_hdls array parameters. If status is NULL,
+ * and the hdls_disable config option is set, this value may be greater than
+ * max_copies parameter.
*/
static inline int
__rte_experimental
rte_ioat_completed_ops(int dev_id, uint8_t max_copies,
+ uint32_t *status, uint8_t *num_unsuccessful,
uintptr_t *src_hdls, uintptr_t *dst_hdls);
/* include the implementation details from a separate file */
diff --git a/drivers/raw/ioat/rte_ioat_rawdev_fns.h b/drivers/raw/ioat/rte_ioat_rawdev_fns.h
index 1eff75ec0a..6049e3bd8b 100644
--- a/drivers/raw/ioat/rte_ioat_rawdev_fns.h
+++ b/drivers/raw/ioat/rte_ioat_rawdev_fns.h
@@ -345,16 +345,22 @@ rte_ioat_perform_ops(int dev_id)
static inline int
rte_ioat_completed_ops(int dev_id, uint8_t max_copies,
+ uint32_t *status, uint8_t *num_unsuccessful,
uintptr_t *src_hdls, uintptr_t *dst_hdls)
{
enum rte_ioat_dev_type *type =
(enum rte_ioat_dev_type *)rte_rawdevs[dev_id].dev_private;
+ uint8_t tmp; /* used so functions don't need to check for null parameter */
+
+ if (num_unsuccessful == NULL)
+ num_unsuccessful = &tmp;
+
+ *num_unsuccessful = 0;
if (*type == RTE_IDXD_DEV)
- return __idxd_completed_ops(dev_id, max_copies,
+ return __idxd_completed_ops(dev_id, max_copies, status, num_unsuccessful,
src_hdls, dst_hdls);
else
- return __ioat_completed_ops(dev_id, max_copies,
- src_hdls, dst_hdls);
+ return __ioat_completed_ops(dev_id, max_copies, src_hdls, dst_hdls);
}
static inline void
@@ -366,7 +372,8 @@ __rte_deprecated_msg("use rte_ioat_completed_ops() instead")
rte_ioat_completed_copies(int dev_id, uint8_t max_copies,
uintptr_t *src_hdls, uintptr_t *dst_hdls)
{
- return rte_ioat_completed_ops(dev_id, max_copies, src_hdls, dst_hdls);
+ return rte_ioat_completed_ops(dev_id, max_copies, NULL, NULL,
+ src_hdls, dst_hdls);
}
#endif /* _RTE_IOAT_RAWDEV_FNS_H_ */
diff --git a/examples/ioat/ioatfwd.c b/examples/ioat/ioatfwd.c
index 845301a6db..2e377e2d4b 100644
--- a/examples/ioat/ioatfwd.c
+++ b/examples/ioat/ioatfwd.c
@@ -447,12 +447,15 @@ ioat_tx_port(struct rxtx_port_config *tx_config)
for (i = 0; i < tx_config->nb_queues; i++) {
if (copy_mode == COPY_MODE_IOAT_NUM) {
- /* Deque the mbufs from IOAT device. */
+ /* Dequeue the mbufs from IOAT device. Since all memory
+ * is DPDK pinned memory and therefore all addresses should
+ * be valid, we don't check for copy errors
+ */
nb_dq = rte_ioat_completed_ops(
- tx_config->ioat_ids[i], MAX_PKT_BURST,
+ tx_config->ioat_ids[i], MAX_PKT_BURST, NULL, NULL,
(void *)mbufs_src, (void *)mbufs_dst);
} else {
- /* Deque the mbufs from rx_to_tx_ring. */
+ /* Dequeue the mbufs from rx_to_tx_ring. */
nb_dq = rte_ring_dequeue_burst(
tx_config->rx_to_tx_ring, (void *)mbufs_dst,
MAX_PKT_BURST, NULL);
@@ -725,7 +728,10 @@ check_link_status(uint32_t port_mask)
static void
configure_rawdev_queue(uint32_t dev_id)
{
- struct rte_ioat_rawdev_config dev_config = { .ring_size = ring_size };
+ struct rte_ioat_rawdev_config dev_config = {
+ .ring_size = ring_size,
+ .no_prefetch_completions = (cfg.nb_lcores > 1),
+ };
struct rte_rawdev_info info = { .dev_private = &dev_config };
if (rte_rawdev_configure(dev_id, &info, sizeof(dev_config)) != 0) {
diff --git a/examples/vhost/ioat.c b/examples/vhost/ioat.c
index 60b73be936..efdd3f6f76 100644
--- a/examples/vhost/ioat.c
+++ b/examples/vhost/ioat.c
@@ -183,7 +183,7 @@ ioat_check_completed_copies_cb(int vid, uint16_t queue_id,
uint16_t dev_id = dma_bind[vid].dmas[queue_id * 2
+ VIRTIO_RXQ].dev_id;
- n_seg = rte_ioat_completed_ops(dev_id, 255, dump, dump);
+ n_seg = rte_ioat_completed_ops(dev_id, 255, NULL, NULL, dump, dump);
if (n_seg < 0) {
RTE_LOG(ERR,
VHOST_DATA,
--
2.30.2
^ permalink raw reply [relevance 2%]
* Re: [dpdk-dev] [PATCH v4 3/3] vhost: fix offload flags in Rx path
2021-05-03 16:43 2% ` [dpdk-dev] [PATCH v4 3/3] vhost: fix offload flags in Rx path David Marchand
@ 2021-05-04 11:07 0% ` Flavio Leitner
2021-05-08 6:24 0% ` Wang, Yinan
1 sibling, 0 replies; 200+ results
From: Flavio Leitner @ 2021-05-04 11:07 UTC (permalink / raw)
To: David Marchand
Cc: dev, maxime.coquelin, olivier.matz, i.maximets, chenbo.xia,
ian.stokes, stable, Jijiang Liu, Yuanhan Liu
On Mon, May 03, 2021 at 06:43:44PM +0200, David Marchand wrote:
> The vhost library currently configures Tx offloading (PKT_TX_*) on any
> packet received from a guest virtio device which asks for some offloading.
>
> This is problematic, as Tx offloading is something that the application
> must ask for: the application needs to configure devices
> to support every used offloads (ip, tcp checksumming, tso..), and the
> various l2/l3/l4 lengths must be set following any processing that
> happened in the application itself.
>
> On the other hand, the received packets are not marked wrt current
> packet l3/l4 checksumming info.
>
> Copy virtio rx processing to fix those offload flags with some
> differences:
> - accept VIRTIO_NET_HDR_GSO_ECN and VIRTIO_NET_HDR_GSO_UDP,
> - ignore anything but the VIRTIO_NET_HDR_F_NEEDS_CSUM flag (to comply with
> the virtio spec),
>
> Some applications might rely on the current behavior, so it is left
> untouched by default.
> A new RTE_VHOST_USER_NET_COMPLIANT_OL_FLAGS flag is added to enable the
> new behavior.
>
> The vhost example has been updated for the new behavior: TSO is applied to
> any packet marked LRO.
>
> Fixes: 859b480d5afd ("vhost: add guest offload setting")
> Cc: stable@dpdk.org
>
> Signed-off-by: David Marchand <david.marchand@redhat.com>
> Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
> ---
> Changes since v3:
> - rebased on next-virtio,
>
> Changes since v2:
> - introduced a new flag to keep existing behavior as the default,
> - packets with unrecognised offload are passed to the application with no
> offload metadata rather than dropped,
> - ignored VIRTIO_NET_HDR_F_DATA_VALID since the virtio spec states that
> the virtio driver is not allowed to use this flag when transmitting
> packets,
>
> Changes since v1:
> - updated vhost example,
> - restored VIRTIO_NET_HDR_GSO_ECN and VIRTIO_NET_HDR_GSO_UDP support,
> - restored log on buggy offload request,
>
> ---
> doc/guides/prog_guide/vhost_lib.rst | 12 ++
> doc/guides/rel_notes/release_21_05.rst | 6 +
> drivers/net/vhost/rte_eth_vhost.c | 2 +-
> examples/vhost/main.c | 44 +++---
> lib/vhost/rte_vhost.h | 1 +
> lib/vhost/socket.c | 5 +-
> lib/vhost/vhost.c | 6 +-
> lib/vhost/vhost.h | 14 +-
> lib/vhost/virtio_net.c | 185 ++++++++++++++++++++++---
> 9 files changed, 222 insertions(+), 53 deletions(-)
>
> diff --git a/doc/guides/prog_guide/vhost_lib.rst b/doc/guides/prog_guide/vhost_lib.rst
> index 7afa351675..d18fb98910 100644
> --- a/doc/guides/prog_guide/vhost_lib.rst
> +++ b/doc/guides/prog_guide/vhost_lib.rst
> @@ -118,6 +118,18 @@ The following is an overview of some key Vhost API functions:
>
> It is disabled by default.
>
> + - ``RTE_VHOST_USER_NET_COMPLIANT_OL_FLAGS``
> +
> + Since v16.04, the vhost library forwards checksum and gso requests for
> + packets received from a virtio driver by filling Tx offload metadata in
> + the mbuf. This behavior is inconsistent with other drivers but it is left
> + untouched for existing applications that might rely on it.
> +
> + This flag disables the legacy behavior and instead ask vhost to simply
> + populate Rx offload metadata in the mbuf.
> +
> + It is disabled by default.
> +
> * ``rte_vhost_driver_set_features(path, features)``
>
> This function sets the feature bits the vhost-user driver supports. The
> diff --git a/doc/guides/rel_notes/release_21_05.rst b/doc/guides/rel_notes/release_21_05.rst
> index a5f21f8425..6b7b0810a5 100644
> --- a/doc/guides/rel_notes/release_21_05.rst
> +++ b/doc/guides/rel_notes/release_21_05.rst
> @@ -337,6 +337,12 @@ API Changes
> ``policer_action_recolor_supported`` and ``policer_action_drop_supported``
> have been removed.
>
> +* vhost: The vhost library currently populates received mbufs from a virtio
> + driver with Tx offload flags while not filling Rx offload flags.
> + While this behavior is arguable, it is kept untouched.
> + A new flag ``RTE_VHOST_USER_NET_COMPLIANT_OL_FLAGS`` has been added to ask
> + for a behavior compliant with to the mbuf offload API.
> +
>
> ABI Changes
> -----------
> diff --git a/drivers/net/vhost/rte_eth_vhost.c b/drivers/net/vhost/rte_eth_vhost.c
> index d198fc8a8e..281379d6a3 100644
> --- a/drivers/net/vhost/rte_eth_vhost.c
> +++ b/drivers/net/vhost/rte_eth_vhost.c
> @@ -1505,7 +1505,7 @@ rte_pmd_vhost_probe(struct rte_vdev_device *dev)
> int ret = 0;
> char *iface_name;
> uint16_t queues;
> - uint64_t flags = 0;
> + uint64_t flags = RTE_VHOST_USER_NET_COMPLIANT_OL_FLAGS;
> uint64_t disable_flags = 0;
> int client_mode = 0;
> int iommu_support = 0;
> diff --git a/examples/vhost/main.c b/examples/vhost/main.c
> index 0bee1f3321..d2179eadb9 100644
> --- a/examples/vhost/main.c
> +++ b/examples/vhost/main.c
> @@ -19,6 +19,7 @@
> #include <rte_log.h>
> #include <rte_string_fns.h>
> #include <rte_malloc.h>
> +#include <rte_net.h>
> #include <rte_vhost.h>
> #include <rte_ip.h>
> #include <rte_tcp.h>
> @@ -1029,33 +1030,34 @@ find_local_dest(struct vhost_dev *vdev, struct rte_mbuf *m,
> return 0;
> }
>
> -static uint16_t
> -get_psd_sum(void *l3_hdr, uint64_t ol_flags)
> -{
> - if (ol_flags & PKT_TX_IPV4)
> - return rte_ipv4_phdr_cksum(l3_hdr, ol_flags);
> - else /* assume ethertype == RTE_ETHER_TYPE_IPV6 */
> - return rte_ipv6_phdr_cksum(l3_hdr, ol_flags);
> -}
> -
> static void virtio_tx_offload(struct rte_mbuf *m)
> {
> + struct rte_net_hdr_lens hdr_lens;
> + struct rte_ipv4_hdr *ipv4_hdr;
> + struct rte_tcp_hdr *tcp_hdr;
> + uint32_t ptype;
> void *l3_hdr;
> - struct rte_ipv4_hdr *ipv4_hdr = NULL;
> - struct rte_tcp_hdr *tcp_hdr = NULL;
> - struct rte_ether_hdr *eth_hdr =
> - rte_pktmbuf_mtod(m, struct rte_ether_hdr *);
>
> - l3_hdr = (char *)eth_hdr + m->l2_len;
> + ptype = rte_net_get_ptype(m, &hdr_lens, RTE_PTYPE_ALL_MASK);
> + m->l2_len = hdr_lens.l2_len;
> + m->l3_len = hdr_lens.l3_len;
> + m->l4_len = hdr_lens.l4_len;
>
> - if (m->ol_flags & PKT_TX_IPV4) {
> + l3_hdr = rte_pktmbuf_mtod_offset(m, void *, m->l2_len);
> + tcp_hdr = rte_pktmbuf_mtod_offset(m, struct rte_tcp_hdr *,
> + m->l2_len + m->l3_len);
> +
> + m->ol_flags |= PKT_TX_TCP_SEG;
> + if ((ptype & RTE_PTYPE_L3_MASK) == RTE_PTYPE_L3_IPV4) {
> + m->ol_flags |= PKT_TX_IPV4;
> + m->ol_flags |= PKT_TX_IP_CKSUM;
> ipv4_hdr = l3_hdr;
> ipv4_hdr->hdr_checksum = 0;
> - m->ol_flags |= PKT_TX_IP_CKSUM;
> + tcp_hdr->cksum = rte_ipv4_phdr_cksum(l3_hdr, m->ol_flags);
> + } else { /* assume ethertype == RTE_ETHER_TYPE_IPV6 */
> + m->ol_flags |= PKT_TX_IPV6;
> + tcp_hdr->cksum = rte_ipv6_phdr_cksum(l3_hdr, m->ol_flags);
> }
> -
> - tcp_hdr = (struct rte_tcp_hdr *)((char *)l3_hdr + m->l3_len);
> - tcp_hdr->cksum = get_psd_sum(l3_hdr, m->ol_flags);
> }
>
> static __rte_always_inline void
> @@ -1148,7 +1150,7 @@ virtio_tx_route(struct vhost_dev *vdev, struct rte_mbuf *m, uint16_t vlan_tag)
> m->vlan_tci = vlan_tag;
> }
>
> - if (m->ol_flags & PKT_TX_TCP_SEG)
> + if (m->ol_flags & PKT_RX_LRO)
> virtio_tx_offload(m);
>
> tx_q->m_table[tx_q->len++] = m;
> @@ -1633,7 +1635,7 @@ main(int argc, char *argv[])
> int ret, i;
> uint16_t portid;
> static pthread_t tid;
> - uint64_t flags = 0;
> + uint64_t flags = RTE_VHOST_USER_NET_COMPLIANT_OL_FLAGS;
>
> signal(SIGINT, sigint_handler);
>
> diff --git a/lib/vhost/rte_vhost.h b/lib/vhost/rte_vhost.h
> index d0a8ae31f2..8d875e9322 100644
> --- a/lib/vhost/rte_vhost.h
> +++ b/lib/vhost/rte_vhost.h
> @@ -36,6 +36,7 @@ extern "C" {
> /* support only linear buffers (no chained mbufs) */
> #define RTE_VHOST_USER_LINEARBUF_SUPPORT (1ULL << 6)
> #define RTE_VHOST_USER_ASYNC_COPY (1ULL << 7)
> +#define RTE_VHOST_USER_NET_COMPLIANT_OL_FLAGS (1ULL << 8)
>
> /* Features. */
> #ifndef VIRTIO_NET_F_GUEST_ANNOUNCE
> diff --git a/lib/vhost/socket.c b/lib/vhost/socket.c
> index 0169d36481..5d0d728d52 100644
> --- a/lib/vhost/socket.c
> +++ b/lib/vhost/socket.c
> @@ -42,6 +42,7 @@ struct vhost_user_socket {
> bool extbuf;
> bool linearbuf;
> bool async_copy;
> + bool net_compliant_ol_flags;
>
> /*
> * The "supported_features" indicates the feature bits the
> @@ -224,7 +225,8 @@ vhost_user_add_connection(int fd, struct vhost_user_socket *vsocket)
> size = strnlen(vsocket->path, PATH_MAX);
> vhost_set_ifname(vid, vsocket->path, size);
>
> - vhost_set_builtin_virtio_net(vid, vsocket->use_builtin_virtio_net);
> + vhost_setup_virtio_net(vid, vsocket->use_builtin_virtio_net,
> + vsocket->net_compliant_ol_flags);
>
> vhost_attach_vdpa_device(vid, vsocket->vdpa_dev);
>
> @@ -877,6 +879,7 @@ rte_vhost_driver_register(const char *path, uint64_t flags)
> vsocket->extbuf = flags & RTE_VHOST_USER_EXTBUF_SUPPORT;
> vsocket->linearbuf = flags & RTE_VHOST_USER_LINEARBUF_SUPPORT;
> vsocket->async_copy = flags & RTE_VHOST_USER_ASYNC_COPY;
> + vsocket->net_compliant_ol_flags = flags & RTE_VHOST_USER_NET_COMPLIANT_OL_FLAGS;
>
> if (vsocket->async_copy &&
> (flags & (RTE_VHOST_USER_IOMMU_SUPPORT |
> diff --git a/lib/vhost/vhost.c b/lib/vhost/vhost.c
> index c9b6379f73..9abfc0bfe7 100644
> --- a/lib/vhost/vhost.c
> +++ b/lib/vhost/vhost.c
> @@ -752,7 +752,7 @@ vhost_set_ifname(int vid, const char *if_name, unsigned int if_len)
> }
>
> void
> -vhost_set_builtin_virtio_net(int vid, bool enable)
> +vhost_setup_virtio_net(int vid, bool enable, bool compliant_ol_flags)
> {
> struct virtio_net *dev = get_device(vid);
>
> @@ -763,6 +763,10 @@ vhost_set_builtin_virtio_net(int vid, bool enable)
> dev->flags |= VIRTIO_DEV_BUILTIN_VIRTIO_NET;
> else
> dev->flags &= ~VIRTIO_DEV_BUILTIN_VIRTIO_NET;
> + if (!compliant_ol_flags)
> + dev->flags |= VIRTIO_DEV_LEGACY_OL_FLAGS;
> + else
> + dev->flags &= ~VIRTIO_DEV_LEGACY_OL_FLAGS;
> }
>
> void
> diff --git a/lib/vhost/vhost.h b/lib/vhost/vhost.h
> index b303635645..8078ddff79 100644
> --- a/lib/vhost/vhost.h
> +++ b/lib/vhost/vhost.h
> @@ -27,15 +27,17 @@
> #include "rte_vhost_async.h"
>
> /* Used to indicate that the device is running on a data core */
> -#define VIRTIO_DEV_RUNNING 1
> +#define VIRTIO_DEV_RUNNING ((uint32_t)1 << 0)
> /* Used to indicate that the device is ready to operate */
> -#define VIRTIO_DEV_READY 2
> +#define VIRTIO_DEV_READY ((uint32_t)1 << 1)
> /* Used to indicate that the built-in vhost net device backend is enabled */
> -#define VIRTIO_DEV_BUILTIN_VIRTIO_NET 4
> +#define VIRTIO_DEV_BUILTIN_VIRTIO_NET ((uint32_t)1 << 2)
> /* Used to indicate that the device has its own data path and configured */
> -#define VIRTIO_DEV_VDPA_CONFIGURED 8
> +#define VIRTIO_DEV_VDPA_CONFIGURED ((uint32_t)1 << 3)
> /* Used to indicate that the feature negotiation failed */
> -#define VIRTIO_DEV_FEATURES_FAILED 16
> +#define VIRTIO_DEV_FEATURES_FAILED ((uint32_t)1 << 4)
> +/* Used to indicate that the virtio_net tx code should fill TX ol_flags */
> +#define VIRTIO_DEV_LEGACY_OL_FLAGS ((uint32_t)1 << 5)
>
> /* Backend value set by guest. */
> #define VIRTIO_DEV_STOPPED -1
> @@ -683,7 +685,7 @@ int alloc_vring_queue(struct virtio_net *dev, uint32_t vring_idx);
> void vhost_attach_vdpa_device(int vid, struct rte_vdpa_device *dev);
>
> void vhost_set_ifname(int, const char *if_name, unsigned int if_len);
> -void vhost_set_builtin_virtio_net(int vid, bool enable);
> +void vhost_setup_virtio_net(int vid, bool enable, bool legacy_ol_flags);
> void vhost_enable_extbuf(int vid);
> void vhost_enable_linearbuf(int vid);
> int vhost_enable_guest_notification(struct virtio_net *dev,
> diff --git a/lib/vhost/virtio_net.c b/lib/vhost/virtio_net.c
> index 1a34867f3c..8e36f4c340 100644
> --- a/lib/vhost/virtio_net.c
> +++ b/lib/vhost/virtio_net.c
> @@ -8,6 +8,7 @@
>
> #include <rte_mbuf.h>
> #include <rte_memcpy.h>
> +#include <rte_net.h>
> #include <rte_ether.h>
> #include <rte_ip.h>
> #include <rte_vhost.h>
> @@ -2303,15 +2304,12 @@ parse_ethernet(struct rte_mbuf *m, uint16_t *l4_proto, void **l4_hdr)
> }
>
> static __rte_always_inline void
> -vhost_dequeue_offload(struct virtio_net_hdr *hdr, struct rte_mbuf *m)
> +vhost_dequeue_offload_legacy(struct virtio_net_hdr *hdr, struct rte_mbuf *m)
> {
> uint16_t l4_proto = 0;
> void *l4_hdr = NULL;
> struct rte_tcp_hdr *tcp_hdr = NULL;
>
> - if (hdr->flags == 0 && hdr->gso_type == VIRTIO_NET_HDR_GSO_NONE)
> - return;
> -
> parse_ethernet(m, &l4_proto, &l4_hdr);
> if (hdr->flags == VIRTIO_NET_HDR_F_NEEDS_CSUM) {
> if (hdr->csum_start == (m->l2_len + m->l3_len)) {
> @@ -2356,6 +2354,94 @@ vhost_dequeue_offload(struct virtio_net_hdr *hdr, struct rte_mbuf *m)
> }
> }
>
> +static __rte_always_inline void
> +vhost_dequeue_offload(struct virtio_net_hdr *hdr, struct rte_mbuf *m,
> + bool legacy_ol_flags)
> +{
> + struct rte_net_hdr_lens hdr_lens;
> + int l4_supported = 0;
> + uint32_t ptype;
> +
> + if (hdr->flags == 0 && hdr->gso_type == VIRTIO_NET_HDR_GSO_NONE)
> + return;
> +
> + if (legacy_ol_flags) {
> + vhost_dequeue_offload_legacy(hdr, m);
> + return;
> + }
> +
> + m->ol_flags |= PKT_RX_IP_CKSUM_UNKNOWN;
> +
> + ptype = rte_net_get_ptype(m, &hdr_lens, RTE_PTYPE_ALL_MASK);
> + m->packet_type = ptype;
My _impression_ is that calling rte_net_get_ptype() makes the
receiving process a bit more expensive than without the patch
and it is not optional. However, the original parsing code was
limited and could be considered a bug.
Anyways, calling that has the nice side effect of providing the
packet_type which it didn't provide before the patch.
Acked-by: Flavio Leitner <fbl@sysclose.org>
(though this just got merged)
Thanks David, great work!
fbl
> + if ((ptype & RTE_PTYPE_L4_MASK) == RTE_PTYPE_L4_TCP ||
> + (ptype & RTE_PTYPE_L4_MASK) == RTE_PTYPE_L4_UDP ||
> + (ptype & RTE_PTYPE_L4_MASK) == RTE_PTYPE_L4_SCTP)
> + l4_supported = 1;
> +
> + /* According to Virtio 1.1 spec, the device only needs to look at
> + * VIRTIO_NET_HDR_F_NEEDS_CSUM in the packet transmission path.
> + * This differs from the processing incoming packets path where the
> + * driver could rely on VIRTIO_NET_HDR_F_DATA_VALID flag set by the
> + * device.
> + *
> + * 5.1.6.2.1 Driver Requirements: Packet Transmission
> + * The driver MUST NOT set the VIRTIO_NET_HDR_F_DATA_VALID and
> + * VIRTIO_NET_HDR_F_RSC_INFO bits in flags.
> + *
> + * 5.1.6.2.2 Device Requirements: Packet Transmission
> + * The device MUST ignore flag bits that it does not recognize.
> + */
> + if (hdr->flags & VIRTIO_NET_HDR_F_NEEDS_CSUM) {
> + uint32_t hdrlen;
> +
> + hdrlen = hdr_lens.l2_len + hdr_lens.l3_len + hdr_lens.l4_len;
> + if (hdr->csum_start <= hdrlen && l4_supported != 0) {
> + m->ol_flags |= PKT_RX_L4_CKSUM_NONE;
> + } else {
> + /* Unknown proto or tunnel, do sw cksum. We can assume
> + * the cksum field is in the first segment since the
> + * buffers we provided to the host are large enough.
> + * In case of SCTP, this will be wrong since it's a CRC
> + * but there's nothing we can do.
> + */
> + uint16_t csum = 0, off;
> +
> + if (rte_raw_cksum_mbuf(m, hdr->csum_start,
> + rte_pktmbuf_pkt_len(m) - hdr->csum_start, &csum) < 0)
> + return;
> + if (likely(csum != 0xffff))
> + csum = ~csum;
> + off = hdr->csum_offset + hdr->csum_start;
> + if (rte_pktmbuf_data_len(m) >= off + 1)
> + *rte_pktmbuf_mtod_offset(m, uint16_t *, off) = csum;
> + }
> + }
> +
> + if (hdr->gso_type != VIRTIO_NET_HDR_GSO_NONE) {
> + if (hdr->gso_size == 0)
> + return;
> +
> + switch (hdr->gso_type & ~VIRTIO_NET_HDR_GSO_ECN) {
> + case VIRTIO_NET_HDR_GSO_TCPV4:
> + case VIRTIO_NET_HDR_GSO_TCPV6:
> + if ((ptype & RTE_PTYPE_L4_MASK) != RTE_PTYPE_L4_TCP)
> + break;
> + m->ol_flags |= PKT_RX_LRO | PKT_RX_L4_CKSUM_NONE;
> + m->tso_segsz = hdr->gso_size;
> + break;
> + case VIRTIO_NET_HDR_GSO_UDP:
> + if ((ptype & RTE_PTYPE_L4_MASK) != RTE_PTYPE_L4_UDP)
> + break;
> + m->ol_flags |= PKT_RX_LRO | PKT_RX_L4_CKSUM_NONE;
> + m->tso_segsz = hdr->gso_size;
> + break;
> + default:
> + break;
> + }
> + }
> +}
> +
> static __rte_noinline void
> copy_vnet_hdr_from_desc(struct virtio_net_hdr *hdr,
> struct buf_vector *buf_vec)
> @@ -2380,7 +2466,8 @@ copy_vnet_hdr_from_desc(struct virtio_net_hdr *hdr,
> static __rte_always_inline int
> copy_desc_to_mbuf(struct virtio_net *dev, struct vhost_virtqueue *vq,
> struct buf_vector *buf_vec, uint16_t nr_vec,
> - struct rte_mbuf *m, struct rte_mempool *mbuf_pool)
> + struct rte_mbuf *m, struct rte_mempool *mbuf_pool,
> + bool legacy_ol_flags)
> {
> uint32_t buf_avail, buf_offset;
> uint64_t buf_addr, buf_len;
> @@ -2513,7 +2600,7 @@ copy_desc_to_mbuf(struct virtio_net *dev, struct vhost_virtqueue *vq,
> m->pkt_len += mbuf_offset;
>
> if (hdr)
> - vhost_dequeue_offload(hdr, m);
> + vhost_dequeue_offload(hdr, m, legacy_ol_flags);
>
> out:
>
> @@ -2606,9 +2693,11 @@ virtio_dev_pktmbuf_alloc(struct virtio_net *dev, struct rte_mempool *mp,
> return pkt;
> }
>
> -static __rte_noinline uint16_t
> +__rte_always_inline
> +static uint16_t
> virtio_dev_tx_split(struct virtio_net *dev, struct vhost_virtqueue *vq,
> - struct rte_mempool *mbuf_pool, struct rte_mbuf **pkts, uint16_t count)
> + struct rte_mempool *mbuf_pool, struct rte_mbuf **pkts, uint16_t count,
> + bool legacy_ol_flags)
> {
> uint16_t i;
> uint16_t free_entries;
> @@ -2668,7 +2757,7 @@ virtio_dev_tx_split(struct virtio_net *dev, struct vhost_virtqueue *vq,
> }
>
> err = copy_desc_to_mbuf(dev, vq, buf_vec, nr_vec, pkts[i],
> - mbuf_pool);
> + mbuf_pool, legacy_ol_flags);
> if (unlikely(err)) {
> rte_pktmbuf_free(pkts[i]);
> if (!allocerr_warned) {
> @@ -2696,6 +2785,24 @@ virtio_dev_tx_split(struct virtio_net *dev, struct vhost_virtqueue *vq,
> return (i - dropped);
> }
>
> +__rte_noinline
> +static uint16_t
> +virtio_dev_tx_split_legacy(struct virtio_net *dev,
> + struct vhost_virtqueue *vq, struct rte_mempool *mbuf_pool,
> + struct rte_mbuf **pkts, uint16_t count)
> +{
> + return virtio_dev_tx_split(dev, vq, mbuf_pool, pkts, count, true);
> +}
> +
> +__rte_noinline
> +static uint16_t
> +virtio_dev_tx_split_compliant(struct virtio_net *dev,
> + struct vhost_virtqueue *vq, struct rte_mempool *mbuf_pool,
> + struct rte_mbuf **pkts, uint16_t count)
> +{
> + return virtio_dev_tx_split(dev, vq, mbuf_pool, pkts, count, false);
> +}
> +
> static __rte_always_inline int
> vhost_reserve_avail_batch_packed(struct virtio_net *dev,
> struct vhost_virtqueue *vq,
> @@ -2770,7 +2877,8 @@ vhost_reserve_avail_batch_packed(struct virtio_net *dev,
> static __rte_always_inline int
> virtio_dev_tx_batch_packed(struct virtio_net *dev,
> struct vhost_virtqueue *vq,
> - struct rte_mbuf **pkts)
> + struct rte_mbuf **pkts,
> + bool legacy_ol_flags)
> {
> uint16_t avail_idx = vq->last_avail_idx;
> uint32_t buf_offset = sizeof(struct virtio_net_hdr_mrg_rxbuf);
> @@ -2794,7 +2902,7 @@ virtio_dev_tx_batch_packed(struct virtio_net *dev,
> if (virtio_net_with_host_offload(dev)) {
> vhost_for_each_try_unroll(i, 0, PACKED_BATCH_SIZE) {
> hdr = (struct virtio_net_hdr *)(desc_addrs[i]);
> - vhost_dequeue_offload(hdr, pkts[i]);
> + vhost_dequeue_offload(hdr, pkts[i], legacy_ol_flags);
> }
> }
>
> @@ -2815,7 +2923,8 @@ vhost_dequeue_single_packed(struct virtio_net *dev,
> struct rte_mempool *mbuf_pool,
> struct rte_mbuf *pkts,
> uint16_t *buf_id,
> - uint16_t *desc_count)
> + uint16_t *desc_count,
> + bool legacy_ol_flags)
> {
> struct buf_vector buf_vec[BUF_VECTOR_MAX];
> uint32_t buf_len;
> @@ -2841,7 +2950,7 @@ vhost_dequeue_single_packed(struct virtio_net *dev,
> }
>
> err = copy_desc_to_mbuf(dev, vq, buf_vec, nr_vec, pkts,
> - mbuf_pool);
> + mbuf_pool, legacy_ol_flags);
> if (unlikely(err)) {
> if (!allocerr_warned) {
> VHOST_LOG_DATA(ERR,
> @@ -2859,14 +2968,15 @@ static __rte_always_inline int
> virtio_dev_tx_single_packed(struct virtio_net *dev,
> struct vhost_virtqueue *vq,
> struct rte_mempool *mbuf_pool,
> - struct rte_mbuf *pkts)
> + struct rte_mbuf *pkts,
> + bool legacy_ol_flags)
> {
>
> uint16_t buf_id, desc_count = 0;
> int ret;
>
> ret = vhost_dequeue_single_packed(dev, vq, mbuf_pool, pkts, &buf_id,
> - &desc_count);
> + &desc_count, legacy_ol_flags);
>
> if (likely(desc_count > 0)) {
> if (virtio_net_is_inorder(dev))
> @@ -2882,12 +2992,14 @@ virtio_dev_tx_single_packed(struct virtio_net *dev,
> return ret;
> }
>
> -static __rte_noinline uint16_t
> +__rte_always_inline
> +static uint16_t
> virtio_dev_tx_packed(struct virtio_net *dev,
> struct vhost_virtqueue *__rte_restrict vq,
> struct rte_mempool *mbuf_pool,
> struct rte_mbuf **__rte_restrict pkts,
> - uint32_t count)
> + uint32_t count,
> + bool legacy_ol_flags)
> {
> uint32_t pkt_idx = 0;
>
> @@ -2899,14 +3011,16 @@ virtio_dev_tx_packed(struct virtio_net *dev,
>
> if (count - pkt_idx >= PACKED_BATCH_SIZE) {
> if (!virtio_dev_tx_batch_packed(dev, vq,
> - &pkts[pkt_idx])) {
> + &pkts[pkt_idx],
> + legacy_ol_flags)) {
> pkt_idx += PACKED_BATCH_SIZE;
> continue;
> }
> }
>
> if (virtio_dev_tx_single_packed(dev, vq, mbuf_pool,
> - pkts[pkt_idx]))
> + pkts[pkt_idx],
> + legacy_ol_flags))
> break;
> pkt_idx++;
> } while (pkt_idx < count);
> @@ -2924,6 +3038,24 @@ virtio_dev_tx_packed(struct virtio_net *dev,
> return pkt_idx;
> }
>
> +__rte_noinline
> +static uint16_t
> +virtio_dev_tx_packed_legacy(struct virtio_net *dev,
> + struct vhost_virtqueue *__rte_restrict vq, struct rte_mempool *mbuf_pool,
> + struct rte_mbuf **__rte_restrict pkts, uint32_t count)
> +{
> + return virtio_dev_tx_packed(dev, vq, mbuf_pool, pkts, count, true);
> +}
> +
> +__rte_noinline
> +static uint16_t
> +virtio_dev_tx_packed_compliant(struct virtio_net *dev,
> + struct vhost_virtqueue *__rte_restrict vq, struct rte_mempool *mbuf_pool,
> + struct rte_mbuf **__rte_restrict pkts, uint32_t count)
> +{
> + return virtio_dev_tx_packed(dev, vq, mbuf_pool, pkts, count, false);
> +}
> +
> uint16_t
> rte_vhost_dequeue_burst(int vid, uint16_t queue_id,
> struct rte_mempool *mbuf_pool, struct rte_mbuf **pkts, uint16_t count)
> @@ -2999,10 +3131,17 @@ rte_vhost_dequeue_burst(int vid, uint16_t queue_id,
> count -= 1;
> }
>
> - if (vq_is_packed(dev))
> - count = virtio_dev_tx_packed(dev, vq, mbuf_pool, pkts, count);
> - else
> - count = virtio_dev_tx_split(dev, vq, mbuf_pool, pkts, count);
> + if (vq_is_packed(dev)) {
> + if (dev->flags & VIRTIO_DEV_LEGACY_OL_FLAGS)
> + count = virtio_dev_tx_packed_legacy(dev, vq, mbuf_pool, pkts, count);
> + else
> + count = virtio_dev_tx_packed_compliant(dev, vq, mbuf_pool, pkts, count);
> + } else {
> + if (dev->flags & VIRTIO_DEV_LEGACY_OL_FLAGS)
> + count = virtio_dev_tx_split_legacy(dev, vq, mbuf_pool, pkts, count);
> + else
> + count = virtio_dev_tx_split_compliant(dev, vq, mbuf_pool, pkts, count);
> + }
>
> out:
> if (dev->features & (1ULL << VIRTIO_F_IOMMU_PLATFORM))
> --
> 2.23.0
>
--
fbl
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [EXT] Re: [PATCH] doc: announce modification in eventdev structure
2021-05-03 11:18 0% ` [dpdk-dev] [EXT] " Akhil Goyal
@ 2021-05-04 9:36 3% ` Kinsella, Ray
2021-05-07 9:17 0% ` Jerin Jacob
0 siblings, 1 reply; 200+ results
From: Kinsella, Ray @ 2021-05-04 9:36 UTC (permalink / raw)
To: Akhil Goyal, Jerin Jacob Kollanukkaran, thomas, dev, david.marchand
Cc: abhinandan.gujjar, hemant.agrawal, nipun.gupta, sachin.saxena,
Anoob Joseph, matan, roy.fan.zhang, g.singh, erik.g.carrillo,
jay.jayatheerthan, Pavan Nikhilesh Bhagavatula, harry.van.haaren,
Shijith Thotton
On 03/05/2021 12:18, Akhil Goyal wrote:
> Hi Ray,
>>> @@ -127,6 +127,10 @@ Deprecation Notices
>>> values to the function ``rte_event_eth_rx_adapter_queue_add`` using
>>> the structure ``rte_event_eth_rx_adapter_queue_add``.
>>>
>>> +* eventdev: The function pointer ``ca_enqueue`` in structure
>> ``rte_eventdev``
>>> + will be moved after ``txa_enqueue`` so that all enqueue/dequeue
>>> + function pointers are adjacent to each other.
>>> +
>>> * sched: To allow more traffic classes, flexible mapping of pipe queues to
>>> traffic classes, and subport level configuration of pipes and queues
>>> changes will be made to macros, data structures and API functions
>> defined
>>>
>>
>> I admire the disipline - but since you are not actually removing ca_enqueue,
>> just moving it in memory when the new ABI is declared in anycase, this is not
>> required.
>>
>
> Does it mean we can move elements in a structure without giving deprecation notice?
>
well if memory serves - you aren't depreciating the field, just moving it, right?
And you are aligning the change with an ABI break in anycase - so I think it is all good.
Ray K
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [PATCH v4 0/3] Offload flags fixes
2021-05-03 16:43 3% ` [dpdk-dev] [PATCH v4 0/3] " David Marchand
2021-05-03 16:43 2% ` [dpdk-dev] [PATCH v4 3/3] vhost: fix offload flags in Rx path David Marchand
@ 2021-05-04 8:29 0% ` Maxime Coquelin
1 sibling, 0 replies; 200+ results
From: Maxime Coquelin @ 2021-05-04 8:29 UTC (permalink / raw)
To: David Marchand, dev; +Cc: olivier.matz, fbl, i.maximets, chenbo.xia, ian.stokes
On 5/3/21 6:43 PM, David Marchand wrote:
> The important part is the last patch on vhost handling of offloading
> requests coming from a virtio guest interface.
>
> The rest are small fixes that I accumulated while reviewing the mbuf
> offload flags.
>
> On this last patch, it has the potential of breaking existing
> applications using the vhost library (OVS being impacted).
> I did not mark it for backport.
>
> Changes since v3:
> - patch 1 went through the main repo,
> - rebased on next-virtio,
>
> Changes since v2:
> - kept behavior untouched (to avoid breaking ABI) and introduced a new
> flag to select the new behavior,
>
> Changes since v1:
> - dropped patch on net/tap,
> - added missing bits in example/vhost,
> - relaxed checks on VIRTIO_NET_HDR_GSO_ECN and VIRTIO_NET_HDR_GSO_UDP,
>
Applied to dpdk-next-virtio/main.
Thanks,
Maxime
^ permalink raw reply [relevance 0%]
* [dpdk-dev] [PATCH v4 3/3] vhost: fix offload flags in Rx path
2021-05-03 16:43 3% ` [dpdk-dev] [PATCH v4 0/3] " David Marchand
@ 2021-05-03 16:43 2% ` David Marchand
2021-05-04 11:07 0% ` Flavio Leitner
2021-05-08 6:24 0% ` Wang, Yinan
2021-05-04 8:29 0% ` [dpdk-dev] [PATCH v4 0/3] Offload flags fixes Maxime Coquelin
1 sibling, 2 replies; 200+ results
From: David Marchand @ 2021-05-03 16:43 UTC (permalink / raw)
To: dev
Cc: maxime.coquelin, olivier.matz, fbl, i.maximets, chenbo.xia,
ian.stokes, stable, Jijiang Liu, Yuanhan Liu
The vhost library currently configures Tx offloading (PKT_TX_*) on any
packet received from a guest virtio device which asks for some offloading.
This is problematic, as Tx offloading is something that the application
must ask for: the application needs to configure devices
to support every used offloads (ip, tcp checksumming, tso..), and the
various l2/l3/l4 lengths must be set following any processing that
happened in the application itself.
On the other hand, the received packets are not marked wrt current
packet l3/l4 checksumming info.
Copy virtio rx processing to fix those offload flags with some
differences:
- accept VIRTIO_NET_HDR_GSO_ECN and VIRTIO_NET_HDR_GSO_UDP,
- ignore anything but the VIRTIO_NET_HDR_F_NEEDS_CSUM flag (to comply with
the virtio spec),
Some applications might rely on the current behavior, so it is left
untouched by default.
A new RTE_VHOST_USER_NET_COMPLIANT_OL_FLAGS flag is added to enable the
new behavior.
The vhost example has been updated for the new behavior: TSO is applied to
any packet marked LRO.
Fixes: 859b480d5afd ("vhost: add guest offload setting")
Cc: stable@dpdk.org
Signed-off-by: David Marchand <david.marchand@redhat.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
---
Changes since v3:
- rebased on next-virtio,
Changes since v2:
- introduced a new flag to keep existing behavior as the default,
- packets with unrecognised offload are passed to the application with no
offload metadata rather than dropped,
- ignored VIRTIO_NET_HDR_F_DATA_VALID since the virtio spec states that
the virtio driver is not allowed to use this flag when transmitting
packets,
Changes since v1:
- updated vhost example,
- restored VIRTIO_NET_HDR_GSO_ECN and VIRTIO_NET_HDR_GSO_UDP support,
- restored log on buggy offload request,
---
doc/guides/prog_guide/vhost_lib.rst | 12 ++
doc/guides/rel_notes/release_21_05.rst | 6 +
drivers/net/vhost/rte_eth_vhost.c | 2 +-
examples/vhost/main.c | 44 +++---
lib/vhost/rte_vhost.h | 1 +
lib/vhost/socket.c | 5 +-
lib/vhost/vhost.c | 6 +-
lib/vhost/vhost.h | 14 +-
lib/vhost/virtio_net.c | 185 ++++++++++++++++++++++---
9 files changed, 222 insertions(+), 53 deletions(-)
diff --git a/doc/guides/prog_guide/vhost_lib.rst b/doc/guides/prog_guide/vhost_lib.rst
index 7afa351675..d18fb98910 100644
--- a/doc/guides/prog_guide/vhost_lib.rst
+++ b/doc/guides/prog_guide/vhost_lib.rst
@@ -118,6 +118,18 @@ The following is an overview of some key Vhost API functions:
It is disabled by default.
+ - ``RTE_VHOST_USER_NET_COMPLIANT_OL_FLAGS``
+
+ Since v16.04, the vhost library forwards checksum and gso requests for
+ packets received from a virtio driver by filling Tx offload metadata in
+ the mbuf. This behavior is inconsistent with other drivers but it is left
+ untouched for existing applications that might rely on it.
+
+ This flag disables the legacy behavior and instead ask vhost to simply
+ populate Rx offload metadata in the mbuf.
+
+ It is disabled by default.
+
* ``rte_vhost_driver_set_features(path, features)``
This function sets the feature bits the vhost-user driver supports. The
diff --git a/doc/guides/rel_notes/release_21_05.rst b/doc/guides/rel_notes/release_21_05.rst
index a5f21f8425..6b7b0810a5 100644
--- a/doc/guides/rel_notes/release_21_05.rst
+++ b/doc/guides/rel_notes/release_21_05.rst
@@ -337,6 +337,12 @@ API Changes
``policer_action_recolor_supported`` and ``policer_action_drop_supported``
have been removed.
+* vhost: The vhost library currently populates received mbufs from a virtio
+ driver with Tx offload flags while not filling Rx offload flags.
+ While this behavior is arguable, it is kept untouched.
+ A new flag ``RTE_VHOST_USER_NET_COMPLIANT_OL_FLAGS`` has been added to ask
+ for a behavior compliant with to the mbuf offload API.
+
ABI Changes
-----------
diff --git a/drivers/net/vhost/rte_eth_vhost.c b/drivers/net/vhost/rte_eth_vhost.c
index d198fc8a8e..281379d6a3 100644
--- a/drivers/net/vhost/rte_eth_vhost.c
+++ b/drivers/net/vhost/rte_eth_vhost.c
@@ -1505,7 +1505,7 @@ rte_pmd_vhost_probe(struct rte_vdev_device *dev)
int ret = 0;
char *iface_name;
uint16_t queues;
- uint64_t flags = 0;
+ uint64_t flags = RTE_VHOST_USER_NET_COMPLIANT_OL_FLAGS;
uint64_t disable_flags = 0;
int client_mode = 0;
int iommu_support = 0;
diff --git a/examples/vhost/main.c b/examples/vhost/main.c
index 0bee1f3321..d2179eadb9 100644
--- a/examples/vhost/main.c
+++ b/examples/vhost/main.c
@@ -19,6 +19,7 @@
#include <rte_log.h>
#include <rte_string_fns.h>
#include <rte_malloc.h>
+#include <rte_net.h>
#include <rte_vhost.h>
#include <rte_ip.h>
#include <rte_tcp.h>
@@ -1029,33 +1030,34 @@ find_local_dest(struct vhost_dev *vdev, struct rte_mbuf *m,
return 0;
}
-static uint16_t
-get_psd_sum(void *l3_hdr, uint64_t ol_flags)
-{
- if (ol_flags & PKT_TX_IPV4)
- return rte_ipv4_phdr_cksum(l3_hdr, ol_flags);
- else /* assume ethertype == RTE_ETHER_TYPE_IPV6 */
- return rte_ipv6_phdr_cksum(l3_hdr, ol_flags);
-}
-
static void virtio_tx_offload(struct rte_mbuf *m)
{
+ struct rte_net_hdr_lens hdr_lens;
+ struct rte_ipv4_hdr *ipv4_hdr;
+ struct rte_tcp_hdr *tcp_hdr;
+ uint32_t ptype;
void *l3_hdr;
- struct rte_ipv4_hdr *ipv4_hdr = NULL;
- struct rte_tcp_hdr *tcp_hdr = NULL;
- struct rte_ether_hdr *eth_hdr =
- rte_pktmbuf_mtod(m, struct rte_ether_hdr *);
- l3_hdr = (char *)eth_hdr + m->l2_len;
+ ptype = rte_net_get_ptype(m, &hdr_lens, RTE_PTYPE_ALL_MASK);
+ m->l2_len = hdr_lens.l2_len;
+ m->l3_len = hdr_lens.l3_len;
+ m->l4_len = hdr_lens.l4_len;
- if (m->ol_flags & PKT_TX_IPV4) {
+ l3_hdr = rte_pktmbuf_mtod_offset(m, void *, m->l2_len);
+ tcp_hdr = rte_pktmbuf_mtod_offset(m, struct rte_tcp_hdr *,
+ m->l2_len + m->l3_len);
+
+ m->ol_flags |= PKT_TX_TCP_SEG;
+ if ((ptype & RTE_PTYPE_L3_MASK) == RTE_PTYPE_L3_IPV4) {
+ m->ol_flags |= PKT_TX_IPV4;
+ m->ol_flags |= PKT_TX_IP_CKSUM;
ipv4_hdr = l3_hdr;
ipv4_hdr->hdr_checksum = 0;
- m->ol_flags |= PKT_TX_IP_CKSUM;
+ tcp_hdr->cksum = rte_ipv4_phdr_cksum(l3_hdr, m->ol_flags);
+ } else { /* assume ethertype == RTE_ETHER_TYPE_IPV6 */
+ m->ol_flags |= PKT_TX_IPV6;
+ tcp_hdr->cksum = rte_ipv6_phdr_cksum(l3_hdr, m->ol_flags);
}
-
- tcp_hdr = (struct rte_tcp_hdr *)((char *)l3_hdr + m->l3_len);
- tcp_hdr->cksum = get_psd_sum(l3_hdr, m->ol_flags);
}
static __rte_always_inline void
@@ -1148,7 +1150,7 @@ virtio_tx_route(struct vhost_dev *vdev, struct rte_mbuf *m, uint16_t vlan_tag)
m->vlan_tci = vlan_tag;
}
- if (m->ol_flags & PKT_TX_TCP_SEG)
+ if (m->ol_flags & PKT_RX_LRO)
virtio_tx_offload(m);
tx_q->m_table[tx_q->len++] = m;
@@ -1633,7 +1635,7 @@ main(int argc, char *argv[])
int ret, i;
uint16_t portid;
static pthread_t tid;
- uint64_t flags = 0;
+ uint64_t flags = RTE_VHOST_USER_NET_COMPLIANT_OL_FLAGS;
signal(SIGINT, sigint_handler);
diff --git a/lib/vhost/rte_vhost.h b/lib/vhost/rte_vhost.h
index d0a8ae31f2..8d875e9322 100644
--- a/lib/vhost/rte_vhost.h
+++ b/lib/vhost/rte_vhost.h
@@ -36,6 +36,7 @@ extern "C" {
/* support only linear buffers (no chained mbufs) */
#define RTE_VHOST_USER_LINEARBUF_SUPPORT (1ULL << 6)
#define RTE_VHOST_USER_ASYNC_COPY (1ULL << 7)
+#define RTE_VHOST_USER_NET_COMPLIANT_OL_FLAGS (1ULL << 8)
/* Features. */
#ifndef VIRTIO_NET_F_GUEST_ANNOUNCE
diff --git a/lib/vhost/socket.c b/lib/vhost/socket.c
index 0169d36481..5d0d728d52 100644
--- a/lib/vhost/socket.c
+++ b/lib/vhost/socket.c
@@ -42,6 +42,7 @@ struct vhost_user_socket {
bool extbuf;
bool linearbuf;
bool async_copy;
+ bool net_compliant_ol_flags;
/*
* The "supported_features" indicates the feature bits the
@@ -224,7 +225,8 @@ vhost_user_add_connection(int fd, struct vhost_user_socket *vsocket)
size = strnlen(vsocket->path, PATH_MAX);
vhost_set_ifname(vid, vsocket->path, size);
- vhost_set_builtin_virtio_net(vid, vsocket->use_builtin_virtio_net);
+ vhost_setup_virtio_net(vid, vsocket->use_builtin_virtio_net,
+ vsocket->net_compliant_ol_flags);
vhost_attach_vdpa_device(vid, vsocket->vdpa_dev);
@@ -877,6 +879,7 @@ rte_vhost_driver_register(const char *path, uint64_t flags)
vsocket->extbuf = flags & RTE_VHOST_USER_EXTBUF_SUPPORT;
vsocket->linearbuf = flags & RTE_VHOST_USER_LINEARBUF_SUPPORT;
vsocket->async_copy = flags & RTE_VHOST_USER_ASYNC_COPY;
+ vsocket->net_compliant_ol_flags = flags & RTE_VHOST_USER_NET_COMPLIANT_OL_FLAGS;
if (vsocket->async_copy &&
(flags & (RTE_VHOST_USER_IOMMU_SUPPORT |
diff --git a/lib/vhost/vhost.c b/lib/vhost/vhost.c
index c9b6379f73..9abfc0bfe7 100644
--- a/lib/vhost/vhost.c
+++ b/lib/vhost/vhost.c
@@ -752,7 +752,7 @@ vhost_set_ifname(int vid, const char *if_name, unsigned int if_len)
}
void
-vhost_set_builtin_virtio_net(int vid, bool enable)
+vhost_setup_virtio_net(int vid, bool enable, bool compliant_ol_flags)
{
struct virtio_net *dev = get_device(vid);
@@ -763,6 +763,10 @@ vhost_set_builtin_virtio_net(int vid, bool enable)
dev->flags |= VIRTIO_DEV_BUILTIN_VIRTIO_NET;
else
dev->flags &= ~VIRTIO_DEV_BUILTIN_VIRTIO_NET;
+ if (!compliant_ol_flags)
+ dev->flags |= VIRTIO_DEV_LEGACY_OL_FLAGS;
+ else
+ dev->flags &= ~VIRTIO_DEV_LEGACY_OL_FLAGS;
}
void
diff --git a/lib/vhost/vhost.h b/lib/vhost/vhost.h
index b303635645..8078ddff79 100644
--- a/lib/vhost/vhost.h
+++ b/lib/vhost/vhost.h
@@ -27,15 +27,17 @@
#include "rte_vhost_async.h"
/* Used to indicate that the device is running on a data core */
-#define VIRTIO_DEV_RUNNING 1
+#define VIRTIO_DEV_RUNNING ((uint32_t)1 << 0)
/* Used to indicate that the device is ready to operate */
-#define VIRTIO_DEV_READY 2
+#define VIRTIO_DEV_READY ((uint32_t)1 << 1)
/* Used to indicate that the built-in vhost net device backend is enabled */
-#define VIRTIO_DEV_BUILTIN_VIRTIO_NET 4
+#define VIRTIO_DEV_BUILTIN_VIRTIO_NET ((uint32_t)1 << 2)
/* Used to indicate that the device has its own data path and configured */
-#define VIRTIO_DEV_VDPA_CONFIGURED 8
+#define VIRTIO_DEV_VDPA_CONFIGURED ((uint32_t)1 << 3)
/* Used to indicate that the feature negotiation failed */
-#define VIRTIO_DEV_FEATURES_FAILED 16
+#define VIRTIO_DEV_FEATURES_FAILED ((uint32_t)1 << 4)
+/* Used to indicate that the virtio_net tx code should fill TX ol_flags */
+#define VIRTIO_DEV_LEGACY_OL_FLAGS ((uint32_t)1 << 5)
/* Backend value set by guest. */
#define VIRTIO_DEV_STOPPED -1
@@ -683,7 +685,7 @@ int alloc_vring_queue(struct virtio_net *dev, uint32_t vring_idx);
void vhost_attach_vdpa_device(int vid, struct rte_vdpa_device *dev);
void vhost_set_ifname(int, const char *if_name, unsigned int if_len);
-void vhost_set_builtin_virtio_net(int vid, bool enable);
+void vhost_setup_virtio_net(int vid, bool enable, bool legacy_ol_flags);
void vhost_enable_extbuf(int vid);
void vhost_enable_linearbuf(int vid);
int vhost_enable_guest_notification(struct virtio_net *dev,
diff --git a/lib/vhost/virtio_net.c b/lib/vhost/virtio_net.c
index 1a34867f3c..8e36f4c340 100644
--- a/lib/vhost/virtio_net.c
+++ b/lib/vhost/virtio_net.c
@@ -8,6 +8,7 @@
#include <rte_mbuf.h>
#include <rte_memcpy.h>
+#include <rte_net.h>
#include <rte_ether.h>
#include <rte_ip.h>
#include <rte_vhost.h>
@@ -2303,15 +2304,12 @@ parse_ethernet(struct rte_mbuf *m, uint16_t *l4_proto, void **l4_hdr)
}
static __rte_always_inline void
-vhost_dequeue_offload(struct virtio_net_hdr *hdr, struct rte_mbuf *m)
+vhost_dequeue_offload_legacy(struct virtio_net_hdr *hdr, struct rte_mbuf *m)
{
uint16_t l4_proto = 0;
void *l4_hdr = NULL;
struct rte_tcp_hdr *tcp_hdr = NULL;
- if (hdr->flags == 0 && hdr->gso_type == VIRTIO_NET_HDR_GSO_NONE)
- return;
-
parse_ethernet(m, &l4_proto, &l4_hdr);
if (hdr->flags == VIRTIO_NET_HDR_F_NEEDS_CSUM) {
if (hdr->csum_start == (m->l2_len + m->l3_len)) {
@@ -2356,6 +2354,94 @@ vhost_dequeue_offload(struct virtio_net_hdr *hdr, struct rte_mbuf *m)
}
}
+static __rte_always_inline void
+vhost_dequeue_offload(struct virtio_net_hdr *hdr, struct rte_mbuf *m,
+ bool legacy_ol_flags)
+{
+ struct rte_net_hdr_lens hdr_lens;
+ int l4_supported = 0;
+ uint32_t ptype;
+
+ if (hdr->flags == 0 && hdr->gso_type == VIRTIO_NET_HDR_GSO_NONE)
+ return;
+
+ if (legacy_ol_flags) {
+ vhost_dequeue_offload_legacy(hdr, m);
+ return;
+ }
+
+ m->ol_flags |= PKT_RX_IP_CKSUM_UNKNOWN;
+
+ ptype = rte_net_get_ptype(m, &hdr_lens, RTE_PTYPE_ALL_MASK);
+ m->packet_type = ptype;
+ if ((ptype & RTE_PTYPE_L4_MASK) == RTE_PTYPE_L4_TCP ||
+ (ptype & RTE_PTYPE_L4_MASK) == RTE_PTYPE_L4_UDP ||
+ (ptype & RTE_PTYPE_L4_MASK) == RTE_PTYPE_L4_SCTP)
+ l4_supported = 1;
+
+ /* According to Virtio 1.1 spec, the device only needs to look at
+ * VIRTIO_NET_HDR_F_NEEDS_CSUM in the packet transmission path.
+ * This differs from the processing incoming packets path where the
+ * driver could rely on VIRTIO_NET_HDR_F_DATA_VALID flag set by the
+ * device.
+ *
+ * 5.1.6.2.1 Driver Requirements: Packet Transmission
+ * The driver MUST NOT set the VIRTIO_NET_HDR_F_DATA_VALID and
+ * VIRTIO_NET_HDR_F_RSC_INFO bits in flags.
+ *
+ * 5.1.6.2.2 Device Requirements: Packet Transmission
+ * The device MUST ignore flag bits that it does not recognize.
+ */
+ if (hdr->flags & VIRTIO_NET_HDR_F_NEEDS_CSUM) {
+ uint32_t hdrlen;
+
+ hdrlen = hdr_lens.l2_len + hdr_lens.l3_len + hdr_lens.l4_len;
+ if (hdr->csum_start <= hdrlen && l4_supported != 0) {
+ m->ol_flags |= PKT_RX_L4_CKSUM_NONE;
+ } else {
+ /* Unknown proto or tunnel, do sw cksum. We can assume
+ * the cksum field is in the first segment since the
+ * buffers we provided to the host are large enough.
+ * In case of SCTP, this will be wrong since it's a CRC
+ * but there's nothing we can do.
+ */
+ uint16_t csum = 0, off;
+
+ if (rte_raw_cksum_mbuf(m, hdr->csum_start,
+ rte_pktmbuf_pkt_len(m) - hdr->csum_start, &csum) < 0)
+ return;
+ if (likely(csum != 0xffff))
+ csum = ~csum;
+ off = hdr->csum_offset + hdr->csum_start;
+ if (rte_pktmbuf_data_len(m) >= off + 1)
+ *rte_pktmbuf_mtod_offset(m, uint16_t *, off) = csum;
+ }
+ }
+
+ if (hdr->gso_type != VIRTIO_NET_HDR_GSO_NONE) {
+ if (hdr->gso_size == 0)
+ return;
+
+ switch (hdr->gso_type & ~VIRTIO_NET_HDR_GSO_ECN) {
+ case VIRTIO_NET_HDR_GSO_TCPV4:
+ case VIRTIO_NET_HDR_GSO_TCPV6:
+ if ((ptype & RTE_PTYPE_L4_MASK) != RTE_PTYPE_L4_TCP)
+ break;
+ m->ol_flags |= PKT_RX_LRO | PKT_RX_L4_CKSUM_NONE;
+ m->tso_segsz = hdr->gso_size;
+ break;
+ case VIRTIO_NET_HDR_GSO_UDP:
+ if ((ptype & RTE_PTYPE_L4_MASK) != RTE_PTYPE_L4_UDP)
+ break;
+ m->ol_flags |= PKT_RX_LRO | PKT_RX_L4_CKSUM_NONE;
+ m->tso_segsz = hdr->gso_size;
+ break;
+ default:
+ break;
+ }
+ }
+}
+
static __rte_noinline void
copy_vnet_hdr_from_desc(struct virtio_net_hdr *hdr,
struct buf_vector *buf_vec)
@@ -2380,7 +2466,8 @@ copy_vnet_hdr_from_desc(struct virtio_net_hdr *hdr,
static __rte_always_inline int
copy_desc_to_mbuf(struct virtio_net *dev, struct vhost_virtqueue *vq,
struct buf_vector *buf_vec, uint16_t nr_vec,
- struct rte_mbuf *m, struct rte_mempool *mbuf_pool)
+ struct rte_mbuf *m, struct rte_mempool *mbuf_pool,
+ bool legacy_ol_flags)
{
uint32_t buf_avail, buf_offset;
uint64_t buf_addr, buf_len;
@@ -2513,7 +2600,7 @@ copy_desc_to_mbuf(struct virtio_net *dev, struct vhost_virtqueue *vq,
m->pkt_len += mbuf_offset;
if (hdr)
- vhost_dequeue_offload(hdr, m);
+ vhost_dequeue_offload(hdr, m, legacy_ol_flags);
out:
@@ -2606,9 +2693,11 @@ virtio_dev_pktmbuf_alloc(struct virtio_net *dev, struct rte_mempool *mp,
return pkt;
}
-static __rte_noinline uint16_t
+__rte_always_inline
+static uint16_t
virtio_dev_tx_split(struct virtio_net *dev, struct vhost_virtqueue *vq,
- struct rte_mempool *mbuf_pool, struct rte_mbuf **pkts, uint16_t count)
+ struct rte_mempool *mbuf_pool, struct rte_mbuf **pkts, uint16_t count,
+ bool legacy_ol_flags)
{
uint16_t i;
uint16_t free_entries;
@@ -2668,7 +2757,7 @@ virtio_dev_tx_split(struct virtio_net *dev, struct vhost_virtqueue *vq,
}
err = copy_desc_to_mbuf(dev, vq, buf_vec, nr_vec, pkts[i],
- mbuf_pool);
+ mbuf_pool, legacy_ol_flags);
if (unlikely(err)) {
rte_pktmbuf_free(pkts[i]);
if (!allocerr_warned) {
@@ -2696,6 +2785,24 @@ virtio_dev_tx_split(struct virtio_net *dev, struct vhost_virtqueue *vq,
return (i - dropped);
}
+__rte_noinline
+static uint16_t
+virtio_dev_tx_split_legacy(struct virtio_net *dev,
+ struct vhost_virtqueue *vq, struct rte_mempool *mbuf_pool,
+ struct rte_mbuf **pkts, uint16_t count)
+{
+ return virtio_dev_tx_split(dev, vq, mbuf_pool, pkts, count, true);
+}
+
+__rte_noinline
+static uint16_t
+virtio_dev_tx_split_compliant(struct virtio_net *dev,
+ struct vhost_virtqueue *vq, struct rte_mempool *mbuf_pool,
+ struct rte_mbuf **pkts, uint16_t count)
+{
+ return virtio_dev_tx_split(dev, vq, mbuf_pool, pkts, count, false);
+}
+
static __rte_always_inline int
vhost_reserve_avail_batch_packed(struct virtio_net *dev,
struct vhost_virtqueue *vq,
@@ -2770,7 +2877,8 @@ vhost_reserve_avail_batch_packed(struct virtio_net *dev,
static __rte_always_inline int
virtio_dev_tx_batch_packed(struct virtio_net *dev,
struct vhost_virtqueue *vq,
- struct rte_mbuf **pkts)
+ struct rte_mbuf **pkts,
+ bool legacy_ol_flags)
{
uint16_t avail_idx = vq->last_avail_idx;
uint32_t buf_offset = sizeof(struct virtio_net_hdr_mrg_rxbuf);
@@ -2794,7 +2902,7 @@ virtio_dev_tx_batch_packed(struct virtio_net *dev,
if (virtio_net_with_host_offload(dev)) {
vhost_for_each_try_unroll(i, 0, PACKED_BATCH_SIZE) {
hdr = (struct virtio_net_hdr *)(desc_addrs[i]);
- vhost_dequeue_offload(hdr, pkts[i]);
+ vhost_dequeue_offload(hdr, pkts[i], legacy_ol_flags);
}
}
@@ -2815,7 +2923,8 @@ vhost_dequeue_single_packed(struct virtio_net *dev,
struct rte_mempool *mbuf_pool,
struct rte_mbuf *pkts,
uint16_t *buf_id,
- uint16_t *desc_count)
+ uint16_t *desc_count,
+ bool legacy_ol_flags)
{
struct buf_vector buf_vec[BUF_VECTOR_MAX];
uint32_t buf_len;
@@ -2841,7 +2950,7 @@ vhost_dequeue_single_packed(struct virtio_net *dev,
}
err = copy_desc_to_mbuf(dev, vq, buf_vec, nr_vec, pkts,
- mbuf_pool);
+ mbuf_pool, legacy_ol_flags);
if (unlikely(err)) {
if (!allocerr_warned) {
VHOST_LOG_DATA(ERR,
@@ -2859,14 +2968,15 @@ static __rte_always_inline int
virtio_dev_tx_single_packed(struct virtio_net *dev,
struct vhost_virtqueue *vq,
struct rte_mempool *mbuf_pool,
- struct rte_mbuf *pkts)
+ struct rte_mbuf *pkts,
+ bool legacy_ol_flags)
{
uint16_t buf_id, desc_count = 0;
int ret;
ret = vhost_dequeue_single_packed(dev, vq, mbuf_pool, pkts, &buf_id,
- &desc_count);
+ &desc_count, legacy_ol_flags);
if (likely(desc_count > 0)) {
if (virtio_net_is_inorder(dev))
@@ -2882,12 +2992,14 @@ virtio_dev_tx_single_packed(struct virtio_net *dev,
return ret;
}
-static __rte_noinline uint16_t
+__rte_always_inline
+static uint16_t
virtio_dev_tx_packed(struct virtio_net *dev,
struct vhost_virtqueue *__rte_restrict vq,
struct rte_mempool *mbuf_pool,
struct rte_mbuf **__rte_restrict pkts,
- uint32_t count)
+ uint32_t count,
+ bool legacy_ol_flags)
{
uint32_t pkt_idx = 0;
@@ -2899,14 +3011,16 @@ virtio_dev_tx_packed(struct virtio_net *dev,
if (count - pkt_idx >= PACKED_BATCH_SIZE) {
if (!virtio_dev_tx_batch_packed(dev, vq,
- &pkts[pkt_idx])) {
+ &pkts[pkt_idx],
+ legacy_ol_flags)) {
pkt_idx += PACKED_BATCH_SIZE;
continue;
}
}
if (virtio_dev_tx_single_packed(dev, vq, mbuf_pool,
- pkts[pkt_idx]))
+ pkts[pkt_idx],
+ legacy_ol_flags))
break;
pkt_idx++;
} while (pkt_idx < count);
@@ -2924,6 +3038,24 @@ virtio_dev_tx_packed(struct virtio_net *dev,
return pkt_idx;
}
+__rte_noinline
+static uint16_t
+virtio_dev_tx_packed_legacy(struct virtio_net *dev,
+ struct vhost_virtqueue *__rte_restrict vq, struct rte_mempool *mbuf_pool,
+ struct rte_mbuf **__rte_restrict pkts, uint32_t count)
+{
+ return virtio_dev_tx_packed(dev, vq, mbuf_pool, pkts, count, true);
+}
+
+__rte_noinline
+static uint16_t
+virtio_dev_tx_packed_compliant(struct virtio_net *dev,
+ struct vhost_virtqueue *__rte_restrict vq, struct rte_mempool *mbuf_pool,
+ struct rte_mbuf **__rte_restrict pkts, uint32_t count)
+{
+ return virtio_dev_tx_packed(dev, vq, mbuf_pool, pkts, count, false);
+}
+
uint16_t
rte_vhost_dequeue_burst(int vid, uint16_t queue_id,
struct rte_mempool *mbuf_pool, struct rte_mbuf **pkts, uint16_t count)
@@ -2999,10 +3131,17 @@ rte_vhost_dequeue_burst(int vid, uint16_t queue_id,
count -= 1;
}
- if (vq_is_packed(dev))
- count = virtio_dev_tx_packed(dev, vq, mbuf_pool, pkts, count);
- else
- count = virtio_dev_tx_split(dev, vq, mbuf_pool, pkts, count);
+ if (vq_is_packed(dev)) {
+ if (dev->flags & VIRTIO_DEV_LEGACY_OL_FLAGS)
+ count = virtio_dev_tx_packed_legacy(dev, vq, mbuf_pool, pkts, count);
+ else
+ count = virtio_dev_tx_packed_compliant(dev, vq, mbuf_pool, pkts, count);
+ } else {
+ if (dev->flags & VIRTIO_DEV_LEGACY_OL_FLAGS)
+ count = virtio_dev_tx_split_legacy(dev, vq, mbuf_pool, pkts, count);
+ else
+ count = virtio_dev_tx_split_compliant(dev, vq, mbuf_pool, pkts, count);
+ }
out:
if (dev->features & (1ULL << VIRTIO_F_IOMMU_PLATFORM))
--
2.23.0
^ permalink raw reply [relevance 2%]
* [dpdk-dev] [PATCH v4 0/3] Offload flags fixes
2021-05-03 13:26 3% ` [dpdk-dev] [PATCH v3 0/4] Offload flags fixes David Marchand
@ 2021-05-03 16:43 3% ` David Marchand
2021-05-03 16:43 2% ` [dpdk-dev] [PATCH v4 3/3] vhost: fix offload flags in Rx path David Marchand
2021-05-04 8:29 0% ` [dpdk-dev] [PATCH v4 0/3] Offload flags fixes Maxime Coquelin
2 siblings, 2 replies; 200+ results
From: David Marchand @ 2021-05-03 16:43 UTC (permalink / raw)
To: dev
Cc: maxime.coquelin, olivier.matz, fbl, i.maximets, chenbo.xia, ian.stokes
The important part is the last patch on vhost handling of offloading
requests coming from a virtio guest interface.
The rest are small fixes that I accumulated while reviewing the mbuf
offload flags.
On this last patch, it has the potential of breaking existing
applications using the vhost library (OVS being impacted).
I did not mark it for backport.
Changes since v3:
- patch 1 went through the main repo,
- rebased on next-virtio,
Changes since v2:
- kept behavior untouched (to avoid breaking ABI) and introduced a new
flag to select the new behavior,
Changes since v1:
- dropped patch on net/tap,
- added missing bits in example/vhost,
- relaxed checks on VIRTIO_NET_HDR_GSO_ECN and VIRTIO_NET_HDR_GSO_UDP,
--
David Marchand
David Marchand (3):
net/virtio: do not touch Tx offload flags
net/virtio: refactor Tx offload helper
vhost: fix offload flags in Rx path
doc/guides/prog_guide/vhost_lib.rst | 12 ++
doc/guides/rel_notes/release_21_05.rst | 6 +
drivers/net/vhost/rte_eth_vhost.c | 2 +-
drivers/net/virtio/virtio_rxtx.c | 7 +-
drivers/net/virtio/virtio_rxtx_packed_avx.h | 2 +-
drivers/net/virtio/virtio_rxtx_packed_neon.h | 2 +-
drivers/net/virtio/virtqueue.h | 81 ++++----
examples/vhost/main.c | 44 ++---
lib/vhost/rte_vhost.h | 1 +
lib/vhost/socket.c | 5 +-
lib/vhost/vhost.c | 6 +-
lib/vhost/vhost.h | 14 +-
lib/vhost/virtio_net.c | 185 ++++++++++++++++---
13 files changed, 266 insertions(+), 101 deletions(-)
--
2.23.0
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [PATCH v3 0/4] Offload flags fixes
2021-05-03 15:24 0% ` [dpdk-dev] [PATCH v3 0/4] Offload flags fixes Maxime Coquelin
@ 2021-05-03 16:21 0% ` David Marchand
0 siblings, 0 replies; 200+ results
From: David Marchand @ 2021-05-03 16:21 UTC (permalink / raw)
To: Maxime Coquelin
Cc: dev, Olivier Matz, Flavio Leitner, Ilya Maximets, Xia, Chenbo,
Ian Stokes
On Mon, May 3, 2021 at 5:24 PM Maxime Coquelin
<maxime.coquelin@redhat.com> wrote:
> On 5/3/21 3:26 PM, David Marchand wrote:
> > The important part is the last patch on vhost handling of offloading
> > requests coming from a virtio guest interface.
> >
> > The rest are small fixes that I accumulated while reviewing the mbuf
> > offload flags.
> >
> > On this last patch, it has the potential of breaking existing
> > applications using the vhost library (OVS being impacted).
> > I did not mark it for backport.
> >
> > Changes since v2:
> > - kept behavior untouched (to avoid breaking ABI) and introduced a new
> > flag to select the new behavior,
> >
> > Changes since v1:
> > - dropped patch on net/tap,
> > - added missing bits in example/vhost,
> > - relaxed checks on VIRTIO_NET_HDR_GSO_ECN and VIRTIO_NET_HDR_GSO_UDP,
> >
>
> Patch 4 does not apply on top of next-virtio/main branch.
> Could you please send a rebased version?
The conflict is with Balazs rework.
Ok, preparing v4.
--
David Marchand
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH v3 0/4] Offload flags fixes
2021-05-03 13:26 3% ` [dpdk-dev] [PATCH v3 0/4] Offload flags fixes David Marchand
2021-05-03 13:26 2% ` [dpdk-dev] [PATCH v3 4/4] vhost: fix offload flags in Rx path David Marchand
@ 2021-05-03 15:24 0% ` Maxime Coquelin
2021-05-03 16:21 0% ` David Marchand
1 sibling, 1 reply; 200+ results
From: Maxime Coquelin @ 2021-05-03 15:24 UTC (permalink / raw)
To: David Marchand, dev; +Cc: olivier.matz, fbl, i.maximets, chenbo.xia, ian.stokes
Hi David,
On 5/3/21 3:26 PM, David Marchand wrote:
> The important part is the last patch on vhost handling of offloading
> requests coming from a virtio guest interface.
>
> The rest are small fixes that I accumulated while reviewing the mbuf
> offload flags.
>
> On this last patch, it has the potential of breaking existing
> applications using the vhost library (OVS being impacted).
> I did not mark it for backport.
>
> Changes since v2:
> - kept behavior untouched (to avoid breaking ABI) and introduced a new
> flag to select the new behavior,
>
> Changes since v1:
> - dropped patch on net/tap,
> - added missing bits in example/vhost,
> - relaxed checks on VIRTIO_NET_HDR_GSO_ECN and VIRTIO_NET_HDR_GSO_UDP,
>
Patch 4 does not apply on top of next-virtio/main branch.
Could you please send a rebased version?
Thanks,
Maxime
^ permalink raw reply [relevance 0%]
* [dpdk-dev] [PATCH v3 4/4] vhost: fix offload flags in Rx path
2021-05-03 13:26 3% ` [dpdk-dev] [PATCH v3 0/4] Offload flags fixes David Marchand
@ 2021-05-03 13:26 2% ` David Marchand
2021-05-03 15:24 0% ` [dpdk-dev] [PATCH v3 0/4] Offload flags fixes Maxime Coquelin
1 sibling, 0 replies; 200+ results
From: David Marchand @ 2021-05-03 13:26 UTC (permalink / raw)
To: dev
Cc: maxime.coquelin, olivier.matz, fbl, i.maximets, chenbo.xia,
ian.stokes, stable, Jijiang Liu, Yuanhan Liu
The vhost library currently configures Tx offloading (PKT_TX_*) on any
packet received from a guest virtio device which asks for some offloading.
This is problematic, as Tx offloading is something that the application
must ask for: the application needs to configure devices
to support every used offloads (ip, tcp checksumming, tso..), and the
various l2/l3/l4 lengths must be set following any processing that
happened in the application itself.
On the other hand, the received packets are not marked wrt current
packet l3/l4 checksumming info.
Copy virtio rx processing to fix those offload flags with some
differences:
- accept VIRTIO_NET_HDR_GSO_ECN and VIRTIO_NET_HDR_GSO_UDP,
- ignore anything but the VIRTIO_NET_HDR_F_NEEDS_CSUM flag (to comply with
the virtio spec),
Some applications might rely on the current behavior, so it is left
untouched by default.
A new RTE_VHOST_USER_NET_COMPLIANT_OL_FLAGS flag is added to enable the
new behavior.
The vhost example has been updated for the new behavior: TSO is applied to
any packet marked LRO.
Fixes: 859b480d5afd ("vhost: add guest offload setting")
Cc: stable@dpdk.org
Signed-off-by: David Marchand <david.marchand@redhat.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
---
Changes since v2:
- introduced a new flag to keep existing behavior as the default,
- packets with unrecognised offload are passed to the application with no
offload metadata rather than dropped,
- ignored VIRTIO_NET_HDR_F_DATA_VALID since the virtio spec states that
the virtio driver is not allowed to use this flag when transmitting
packets,
Changes since v1:
- updated vhost example,
- restored VIRTIO_NET_HDR_GSO_ECN and VIRTIO_NET_HDR_GSO_UDP support,
- restored log on buggy offload request,
---
doc/guides/prog_guide/vhost_lib.rst | 12 ++
doc/guides/rel_notes/release_21_05.rst | 6 +
drivers/net/vhost/rte_eth_vhost.c | 2 +-
examples/vhost/main.c | 44 +++---
lib/vhost/rte_vhost.h | 1 +
lib/vhost/socket.c | 5 +-
lib/vhost/vhost.c | 6 +-
lib/vhost/vhost.h | 14 +-
lib/vhost/virtio_net.c | 185 ++++++++++++++++++++++---
9 files changed, 222 insertions(+), 53 deletions(-)
diff --git a/doc/guides/prog_guide/vhost_lib.rst b/doc/guides/prog_guide/vhost_lib.rst
index dc29229167..042875a9ca 100644
--- a/doc/guides/prog_guide/vhost_lib.rst
+++ b/doc/guides/prog_guide/vhost_lib.rst
@@ -118,6 +118,18 @@ The following is an overview of some key Vhost API functions:
It is disabled by default.
+ - ``RTE_VHOST_USER_NET_COMPLIANT_OL_FLAGS``
+
+ Since v16.04, the vhost library forwards checksum and gso requests for
+ packets received from a virtio driver by filling Tx offload metadata in
+ the mbuf. This behavior is inconsistent with other drivers but it is left
+ untouched for existing applications that might rely on it.
+
+ This flag disables the legacy behavior and instead ask vhost to simply
+ populate Rx offload metadata in the mbuf.
+
+ It is disabled by default.
+
* ``rte_vhost_driver_set_features(path, features)``
This function sets the feature bits the vhost-user driver supports. The
diff --git a/doc/guides/rel_notes/release_21_05.rst b/doc/guides/rel_notes/release_21_05.rst
index b3224dc332..1cb06ce487 100644
--- a/doc/guides/rel_notes/release_21_05.rst
+++ b/doc/guides/rel_notes/release_21_05.rst
@@ -329,6 +329,12 @@ API Changes
``policer_action_recolor_supported`` and ``policer_action_drop_supported``
have been removed.
+* vhost: The vhost library currently populates received mbufs from a virtio
+ driver with Tx offload flags while not filling Rx offload flags.
+ While this behavior is arguable, it is kept untouched.
+ A new flag ``RTE_VHOST_USER_NET_COMPLIANT_OL_FLAGS`` has been added to ask
+ for a behavior compliant with to the mbuf offload API.
+
ABI Changes
-----------
diff --git a/drivers/net/vhost/rte_eth_vhost.c b/drivers/net/vhost/rte_eth_vhost.c
index d198fc8a8e..281379d6a3 100644
--- a/drivers/net/vhost/rte_eth_vhost.c
+++ b/drivers/net/vhost/rte_eth_vhost.c
@@ -1505,7 +1505,7 @@ rte_pmd_vhost_probe(struct rte_vdev_device *dev)
int ret = 0;
char *iface_name;
uint16_t queues;
- uint64_t flags = 0;
+ uint64_t flags = RTE_VHOST_USER_NET_COMPLIANT_OL_FLAGS;
uint64_t disable_flags = 0;
int client_mode = 0;
int iommu_support = 0;
diff --git a/examples/vhost/main.c b/examples/vhost/main.c
index ff48ba270d..64295aaf7e 100644
--- a/examples/vhost/main.c
+++ b/examples/vhost/main.c
@@ -19,6 +19,7 @@
#include <rte_log.h>
#include <rte_string_fns.h>
#include <rte_malloc.h>
+#include <rte_net.h>
#include <rte_vhost.h>
#include <rte_ip.h>
#include <rte_tcp.h>
@@ -1032,33 +1033,34 @@ find_local_dest(struct vhost_dev *vdev, struct rte_mbuf *m,
return 0;
}
-static uint16_t
-get_psd_sum(void *l3_hdr, uint64_t ol_flags)
-{
- if (ol_flags & PKT_TX_IPV4)
- return rte_ipv4_phdr_cksum(l3_hdr, ol_flags);
- else /* assume ethertype == RTE_ETHER_TYPE_IPV6 */
- return rte_ipv6_phdr_cksum(l3_hdr, ol_flags);
-}
-
static void virtio_tx_offload(struct rte_mbuf *m)
{
+ struct rte_net_hdr_lens hdr_lens;
+ struct rte_ipv4_hdr *ipv4_hdr;
+ struct rte_tcp_hdr *tcp_hdr;
+ uint32_t ptype;
void *l3_hdr;
- struct rte_ipv4_hdr *ipv4_hdr = NULL;
- struct rte_tcp_hdr *tcp_hdr = NULL;
- struct rte_ether_hdr *eth_hdr =
- rte_pktmbuf_mtod(m, struct rte_ether_hdr *);
- l3_hdr = (char *)eth_hdr + m->l2_len;
+ ptype = rte_net_get_ptype(m, &hdr_lens, RTE_PTYPE_ALL_MASK);
+ m->l2_len = hdr_lens.l2_len;
+ m->l3_len = hdr_lens.l3_len;
+ m->l4_len = hdr_lens.l4_len;
- if (m->ol_flags & PKT_TX_IPV4) {
+ l3_hdr = rte_pktmbuf_mtod_offset(m, void *, m->l2_len);
+ tcp_hdr = rte_pktmbuf_mtod_offset(m, struct rte_tcp_hdr *,
+ m->l2_len + m->l3_len);
+
+ m->ol_flags |= PKT_TX_TCP_SEG;
+ if ((ptype & RTE_PTYPE_L3_MASK) == RTE_PTYPE_L3_IPV4) {
+ m->ol_flags |= PKT_TX_IPV4;
+ m->ol_flags |= PKT_TX_IP_CKSUM;
ipv4_hdr = l3_hdr;
ipv4_hdr->hdr_checksum = 0;
- m->ol_flags |= PKT_TX_IP_CKSUM;
+ tcp_hdr->cksum = rte_ipv4_phdr_cksum(l3_hdr, m->ol_flags);
+ } else { /* assume ethertype == RTE_ETHER_TYPE_IPV6 */
+ m->ol_flags |= PKT_TX_IPV6;
+ tcp_hdr->cksum = rte_ipv6_phdr_cksum(l3_hdr, m->ol_flags);
}
-
- tcp_hdr = (struct rte_tcp_hdr *)((char *)l3_hdr + m->l3_len);
- tcp_hdr->cksum = get_psd_sum(l3_hdr, m->ol_flags);
}
static __rte_always_inline void
@@ -1151,7 +1153,7 @@ virtio_tx_route(struct vhost_dev *vdev, struct rte_mbuf *m, uint16_t vlan_tag)
m->vlan_tci = vlan_tag;
}
- if (m->ol_flags & PKT_TX_TCP_SEG)
+ if (m->ol_flags & PKT_RX_LRO)
virtio_tx_offload(m);
tx_q->m_table[tx_q->len++] = m;
@@ -1636,7 +1638,7 @@ main(int argc, char *argv[])
int ret, i;
uint16_t portid;
static pthread_t tid;
- uint64_t flags = 0;
+ uint64_t flags = RTE_VHOST_USER_NET_COMPLIANT_OL_FLAGS;
signal(SIGINT, sigint_handler);
diff --git a/lib/vhost/rte_vhost.h b/lib/vhost/rte_vhost.h
index d0a8ae31f2..8d875e9322 100644
--- a/lib/vhost/rte_vhost.h
+++ b/lib/vhost/rte_vhost.h
@@ -36,6 +36,7 @@ extern "C" {
/* support only linear buffers (no chained mbufs) */
#define RTE_VHOST_USER_LINEARBUF_SUPPORT (1ULL << 6)
#define RTE_VHOST_USER_ASYNC_COPY (1ULL << 7)
+#define RTE_VHOST_USER_NET_COMPLIANT_OL_FLAGS (1ULL << 8)
/* Features. */
#ifndef VIRTIO_NET_F_GUEST_ANNOUNCE
diff --git a/lib/vhost/socket.c b/lib/vhost/socket.c
index 0169d36481..5d0d728d52 100644
--- a/lib/vhost/socket.c
+++ b/lib/vhost/socket.c
@@ -42,6 +42,7 @@ struct vhost_user_socket {
bool extbuf;
bool linearbuf;
bool async_copy;
+ bool net_compliant_ol_flags;
/*
* The "supported_features" indicates the feature bits the
@@ -224,7 +225,8 @@ vhost_user_add_connection(int fd, struct vhost_user_socket *vsocket)
size = strnlen(vsocket->path, PATH_MAX);
vhost_set_ifname(vid, vsocket->path, size);
- vhost_set_builtin_virtio_net(vid, vsocket->use_builtin_virtio_net);
+ vhost_setup_virtio_net(vid, vsocket->use_builtin_virtio_net,
+ vsocket->net_compliant_ol_flags);
vhost_attach_vdpa_device(vid, vsocket->vdpa_dev);
@@ -877,6 +879,7 @@ rte_vhost_driver_register(const char *path, uint64_t flags)
vsocket->extbuf = flags & RTE_VHOST_USER_EXTBUF_SUPPORT;
vsocket->linearbuf = flags & RTE_VHOST_USER_LINEARBUF_SUPPORT;
vsocket->async_copy = flags & RTE_VHOST_USER_ASYNC_COPY;
+ vsocket->net_compliant_ol_flags = flags & RTE_VHOST_USER_NET_COMPLIANT_OL_FLAGS;
if (vsocket->async_copy &&
(flags & (RTE_VHOST_USER_IOMMU_SUPPORT |
diff --git a/lib/vhost/vhost.c b/lib/vhost/vhost.c
index a70fe01d8f..846113d46f 100644
--- a/lib/vhost/vhost.c
+++ b/lib/vhost/vhost.c
@@ -752,7 +752,7 @@ vhost_set_ifname(int vid, const char *if_name, unsigned int if_len)
}
void
-vhost_set_builtin_virtio_net(int vid, bool enable)
+vhost_setup_virtio_net(int vid, bool enable, bool compliant_ol_flags)
{
struct virtio_net *dev = get_device(vid);
@@ -763,6 +763,10 @@ vhost_set_builtin_virtio_net(int vid, bool enable)
dev->flags |= VIRTIO_DEV_BUILTIN_VIRTIO_NET;
else
dev->flags &= ~VIRTIO_DEV_BUILTIN_VIRTIO_NET;
+ if (!compliant_ol_flags)
+ dev->flags |= VIRTIO_DEV_LEGACY_OL_FLAGS;
+ else
+ dev->flags &= ~VIRTIO_DEV_LEGACY_OL_FLAGS;
}
void
diff --git a/lib/vhost/vhost.h b/lib/vhost/vhost.h
index f628714c24..65bcdc5301 100644
--- a/lib/vhost/vhost.h
+++ b/lib/vhost/vhost.h
@@ -27,15 +27,17 @@
#include "rte_vhost_async.h"
/* Used to indicate that the device is running on a data core */
-#define VIRTIO_DEV_RUNNING 1
+#define VIRTIO_DEV_RUNNING ((uint32_t)1 << 0)
/* Used to indicate that the device is ready to operate */
-#define VIRTIO_DEV_READY 2
+#define VIRTIO_DEV_READY ((uint32_t)1 << 1)
/* Used to indicate that the built-in vhost net device backend is enabled */
-#define VIRTIO_DEV_BUILTIN_VIRTIO_NET 4
+#define VIRTIO_DEV_BUILTIN_VIRTIO_NET ((uint32_t)1 << 2)
/* Used to indicate that the device has its own data path and configured */
-#define VIRTIO_DEV_VDPA_CONFIGURED 8
+#define VIRTIO_DEV_VDPA_CONFIGURED ((uint32_t)1 << 3)
/* Used to indicate that the feature negotiation failed */
-#define VIRTIO_DEV_FEATURES_FAILED 16
+#define VIRTIO_DEV_FEATURES_FAILED ((uint32_t)1 << 4)
+/* Used to indicate that the virtio_net tx code should fill TX ol_flags */
+#define VIRTIO_DEV_LEGACY_OL_FLAGS ((uint32_t)1 << 5)
/* Backend value set by guest. */
#define VIRTIO_DEV_STOPPED -1
@@ -674,7 +676,7 @@ int alloc_vring_queue(struct virtio_net *dev, uint32_t vring_idx);
void vhost_attach_vdpa_device(int vid, struct rte_vdpa_device *dev);
void vhost_set_ifname(int, const char *if_name, unsigned int if_len);
-void vhost_set_builtin_virtio_net(int vid, bool enable);
+void vhost_setup_virtio_net(int vid, bool enable, bool legacy_ol_flags);
void vhost_enable_extbuf(int vid);
void vhost_enable_linearbuf(int vid);
int vhost_enable_guest_notification(struct virtio_net *dev,
diff --git a/lib/vhost/virtio_net.c b/lib/vhost/virtio_net.c
index ff39878609..aef30ad4fe 100644
--- a/lib/vhost/virtio_net.c
+++ b/lib/vhost/virtio_net.c
@@ -8,6 +8,7 @@
#include <rte_mbuf.h>
#include <rte_memcpy.h>
+#include <rte_net.h>
#include <rte_ether.h>
#include <rte_ip.h>
#include <rte_vhost.h>
@@ -1875,15 +1876,12 @@ parse_ethernet(struct rte_mbuf *m, uint16_t *l4_proto, void **l4_hdr)
}
static __rte_always_inline void
-vhost_dequeue_offload(struct virtio_net_hdr *hdr, struct rte_mbuf *m)
+vhost_dequeue_offload_legacy(struct virtio_net_hdr *hdr, struct rte_mbuf *m)
{
uint16_t l4_proto = 0;
void *l4_hdr = NULL;
struct rte_tcp_hdr *tcp_hdr = NULL;
- if (hdr->flags == 0 && hdr->gso_type == VIRTIO_NET_HDR_GSO_NONE)
- return;
-
parse_ethernet(m, &l4_proto, &l4_hdr);
if (hdr->flags == VIRTIO_NET_HDR_F_NEEDS_CSUM) {
if (hdr->csum_start == (m->l2_len + m->l3_len)) {
@@ -1928,6 +1926,94 @@ vhost_dequeue_offload(struct virtio_net_hdr *hdr, struct rte_mbuf *m)
}
}
+static __rte_always_inline void
+vhost_dequeue_offload(struct virtio_net_hdr *hdr, struct rte_mbuf *m,
+ bool legacy_ol_flags)
+{
+ struct rte_net_hdr_lens hdr_lens;
+ int l4_supported = 0;
+ uint32_t ptype;
+
+ if (hdr->flags == 0 && hdr->gso_type == VIRTIO_NET_HDR_GSO_NONE)
+ return;
+
+ if (legacy_ol_flags) {
+ vhost_dequeue_offload_legacy(hdr, m);
+ return;
+ }
+
+ m->ol_flags |= PKT_RX_IP_CKSUM_UNKNOWN;
+
+ ptype = rte_net_get_ptype(m, &hdr_lens, RTE_PTYPE_ALL_MASK);
+ m->packet_type = ptype;
+ if ((ptype & RTE_PTYPE_L4_MASK) == RTE_PTYPE_L4_TCP ||
+ (ptype & RTE_PTYPE_L4_MASK) == RTE_PTYPE_L4_UDP ||
+ (ptype & RTE_PTYPE_L4_MASK) == RTE_PTYPE_L4_SCTP)
+ l4_supported = 1;
+
+ /* According to Virtio 1.1 spec, the device only needs to look at
+ * VIRTIO_NET_HDR_F_NEEDS_CSUM in the packet transmission path.
+ * This differs from the processing incoming packets path where the
+ * driver could rely on VIRTIO_NET_HDR_F_DATA_VALID flag set by the
+ * device.
+ *
+ * 5.1.6.2.1 Driver Requirements: Packet Transmission
+ * The driver MUST NOT set the VIRTIO_NET_HDR_F_DATA_VALID and
+ * VIRTIO_NET_HDR_F_RSC_INFO bits in flags.
+ *
+ * 5.1.6.2.2 Device Requirements: Packet Transmission
+ * The device MUST ignore flag bits that it does not recognize.
+ */
+ if (hdr->flags & VIRTIO_NET_HDR_F_NEEDS_CSUM) {
+ uint32_t hdrlen;
+
+ hdrlen = hdr_lens.l2_len + hdr_lens.l3_len + hdr_lens.l4_len;
+ if (hdr->csum_start <= hdrlen && l4_supported != 0) {
+ m->ol_flags |= PKT_RX_L4_CKSUM_NONE;
+ } else {
+ /* Unknown proto or tunnel, do sw cksum. We can assume
+ * the cksum field is in the first segment since the
+ * buffers we provided to the host are large enough.
+ * In case of SCTP, this will be wrong since it's a CRC
+ * but there's nothing we can do.
+ */
+ uint16_t csum = 0, off;
+
+ if (rte_raw_cksum_mbuf(m, hdr->csum_start,
+ rte_pktmbuf_pkt_len(m) - hdr->csum_start, &csum) < 0)
+ return;
+ if (likely(csum != 0xffff))
+ csum = ~csum;
+ off = hdr->csum_offset + hdr->csum_start;
+ if (rte_pktmbuf_data_len(m) >= off + 1)
+ *rte_pktmbuf_mtod_offset(m, uint16_t *, off) = csum;
+ }
+ }
+
+ if (hdr->gso_type != VIRTIO_NET_HDR_GSO_NONE) {
+ if (hdr->gso_size == 0)
+ return;
+
+ switch (hdr->gso_type & ~VIRTIO_NET_HDR_GSO_ECN) {
+ case VIRTIO_NET_HDR_GSO_TCPV4:
+ case VIRTIO_NET_HDR_GSO_TCPV6:
+ if ((ptype & RTE_PTYPE_L4_MASK) != RTE_PTYPE_L4_TCP)
+ break;
+ m->ol_flags |= PKT_RX_LRO | PKT_RX_L4_CKSUM_NONE;
+ m->tso_segsz = hdr->gso_size;
+ break;
+ case VIRTIO_NET_HDR_GSO_UDP:
+ if ((ptype & RTE_PTYPE_L4_MASK) != RTE_PTYPE_L4_UDP)
+ break;
+ m->ol_flags |= PKT_RX_LRO | PKT_RX_L4_CKSUM_NONE;
+ m->tso_segsz = hdr->gso_size;
+ break;
+ default:
+ break;
+ }
+ }
+}
+
static __rte_noinline void
copy_vnet_hdr_from_desc(struct virtio_net_hdr *hdr,
struct buf_vector *buf_vec)
@@ -1952,7 +2038,8 @@ copy_vnet_hdr_from_desc(struct virtio_net_hdr *hdr,
static __rte_always_inline int
copy_desc_to_mbuf(struct virtio_net *dev, struct vhost_virtqueue *vq,
struct buf_vector *buf_vec, uint16_t nr_vec,
- struct rte_mbuf *m, struct rte_mempool *mbuf_pool)
+ struct rte_mbuf *m, struct rte_mempool *mbuf_pool,
+ bool legacy_ol_flags)
{
uint32_t buf_avail, buf_offset;
uint64_t buf_addr, buf_len;
@@ -2085,7 +2172,7 @@ copy_desc_to_mbuf(struct virtio_net *dev, struct vhost_virtqueue *vq,
m->pkt_len += mbuf_offset;
if (hdr)
- vhost_dequeue_offload(hdr, m);
+ vhost_dequeue_offload(hdr, m, legacy_ol_flags);
out:
@@ -2168,9 +2255,11 @@ virtio_dev_pktmbuf_alloc(struct virtio_net *dev, struct rte_mempool *mp,
return NULL;
}
-static __rte_noinline uint16_t
+__rte_always_inline
+static uint16_t
virtio_dev_tx_split(struct virtio_net *dev, struct vhost_virtqueue *vq,
- struct rte_mempool *mbuf_pool, struct rte_mbuf **pkts, uint16_t count)
+ struct rte_mempool *mbuf_pool, struct rte_mbuf **pkts, uint16_t count,
+ bool legacy_ol_flags)
{
uint16_t i;
uint16_t free_entries;
@@ -2230,7 +2319,7 @@ virtio_dev_tx_split(struct virtio_net *dev, struct vhost_virtqueue *vq,
}
err = copy_desc_to_mbuf(dev, vq, buf_vec, nr_vec, pkts[i],
- mbuf_pool);
+ mbuf_pool, legacy_ol_flags);
if (unlikely(err)) {
rte_pktmbuf_free(pkts[i]);
if (!allocerr_warned) {
@@ -2258,6 +2347,24 @@ virtio_dev_tx_split(struct virtio_net *dev, struct vhost_virtqueue *vq,
return (i - dropped);
}
+__rte_noinline
+static uint16_t
+virtio_dev_tx_split_legacy(struct virtio_net *dev,
+ struct vhost_virtqueue *vq, struct rte_mempool *mbuf_pool,
+ struct rte_mbuf **pkts, uint16_t count)
+{
+ return virtio_dev_tx_split(dev, vq, mbuf_pool, pkts, count, true);
+}
+
+__rte_noinline
+static uint16_t
+virtio_dev_tx_split_compliant(struct virtio_net *dev,
+ struct vhost_virtqueue *vq, struct rte_mempool *mbuf_pool,
+ struct rte_mbuf **pkts, uint16_t count)
+{
+ return virtio_dev_tx_split(dev, vq, mbuf_pool, pkts, count, false);
+}
+
static __rte_always_inline int
vhost_reserve_avail_batch_packed(struct virtio_net *dev,
struct vhost_virtqueue *vq,
@@ -2338,7 +2445,8 @@ static __rte_always_inline int
virtio_dev_tx_batch_packed(struct virtio_net *dev,
struct vhost_virtqueue *vq,
struct rte_mempool *mbuf_pool,
- struct rte_mbuf **pkts)
+ struct rte_mbuf **pkts,
+ bool legacy_ol_flags)
{
uint16_t avail_idx = vq->last_avail_idx;
uint32_t buf_offset = sizeof(struct virtio_net_hdr_mrg_rxbuf);
@@ -2362,7 +2470,7 @@ virtio_dev_tx_batch_packed(struct virtio_net *dev,
if (virtio_net_with_host_offload(dev)) {
vhost_for_each_try_unroll(i, 0, PACKED_BATCH_SIZE) {
hdr = (struct virtio_net_hdr *)(desc_addrs[i]);
- vhost_dequeue_offload(hdr, pkts[i]);
+ vhost_dequeue_offload(hdr, pkts[i], legacy_ol_flags);
}
}
@@ -2383,7 +2491,8 @@ vhost_dequeue_single_packed(struct virtio_net *dev,
struct rte_mempool *mbuf_pool,
struct rte_mbuf **pkts,
uint16_t *buf_id,
- uint16_t *desc_count)
+ uint16_t *desc_count,
+ bool legacy_ol_flags)
{
struct buf_vector buf_vec[BUF_VECTOR_MAX];
uint32_t buf_len;
@@ -2410,7 +2519,7 @@ vhost_dequeue_single_packed(struct virtio_net *dev,
}
err = copy_desc_to_mbuf(dev, vq, buf_vec, nr_vec, *pkts,
- mbuf_pool);
+ mbuf_pool, legacy_ol_flags);
if (unlikely(err)) {
if (!allocerr_warned) {
VHOST_LOG_DATA(ERR,
@@ -2429,14 +2538,15 @@ static __rte_always_inline int
virtio_dev_tx_single_packed(struct virtio_net *dev,
struct vhost_virtqueue *vq,
struct rte_mempool *mbuf_pool,
- struct rte_mbuf **pkts)
+ struct rte_mbuf **pkts,
+ bool legacy_ol_flags)
{
uint16_t buf_id, desc_count = 0;
int ret;
ret = vhost_dequeue_single_packed(dev, vq, mbuf_pool, pkts, &buf_id,
- &desc_count);
+ &desc_count, legacy_ol_flags);
if (likely(desc_count > 0)) {
if (virtio_net_is_inorder(dev))
@@ -2452,12 +2562,14 @@ virtio_dev_tx_single_packed(struct virtio_net *dev,
return ret;
}
-static __rte_noinline uint16_t
+__rte_always_inline
+static uint16_t
virtio_dev_tx_packed(struct virtio_net *dev,
struct vhost_virtqueue *__rte_restrict vq,
struct rte_mempool *mbuf_pool,
struct rte_mbuf **__rte_restrict pkts,
- uint32_t count)
+ uint32_t count,
+ bool legacy_ol_flags)
{
uint32_t pkt_idx = 0;
uint32_t remained = count;
@@ -2467,7 +2579,8 @@ virtio_dev_tx_packed(struct virtio_net *dev,
if (remained >= PACKED_BATCH_SIZE) {
if (!virtio_dev_tx_batch_packed(dev, vq, mbuf_pool,
- &pkts[pkt_idx])) {
+ &pkts[pkt_idx],
+ legacy_ol_flags)) {
pkt_idx += PACKED_BATCH_SIZE;
remained -= PACKED_BATCH_SIZE;
continue;
@@ -2475,7 +2588,8 @@ virtio_dev_tx_packed(struct virtio_net *dev,
}
if (virtio_dev_tx_single_packed(dev, vq, mbuf_pool,
- &pkts[pkt_idx]))
+ &pkts[pkt_idx],
+ legacy_ol_flags))
break;
pkt_idx++;
remained--;
@@ -2492,6 +2606,24 @@ virtio_dev_tx_packed(struct virtio_net *dev,
return pkt_idx;
}
+__rte_noinline
+static uint16_t
+virtio_dev_tx_packed_legacy(struct virtio_net *dev,
+ struct vhost_virtqueue *__rte_restrict vq, struct rte_mempool *mbuf_pool,
+ struct rte_mbuf **__rte_restrict pkts, uint32_t count)
+{
+ return virtio_dev_tx_packed(dev, vq, mbuf_pool, pkts, count, true);
+}
+
+__rte_noinline
+static uint16_t
+virtio_dev_tx_packed_compliant(struct virtio_net *dev,
+ struct vhost_virtqueue *__rte_restrict vq, struct rte_mempool *mbuf_pool,
+ struct rte_mbuf **__rte_restrict pkts, uint32_t count)
+{
+ return virtio_dev_tx_packed(dev, vq, mbuf_pool, pkts, count, false);
+}
+
uint16_t
rte_vhost_dequeue_burst(int vid, uint16_t queue_id,
struct rte_mempool *mbuf_pool, struct rte_mbuf **pkts, uint16_t count)
@@ -2567,10 +2699,17 @@ rte_vhost_dequeue_burst(int vid, uint16_t queue_id,
count -= 1;
}
- if (vq_is_packed(dev))
- count = virtio_dev_tx_packed(dev, vq, mbuf_pool, pkts, count);
- else
- count = virtio_dev_tx_split(dev, vq, mbuf_pool, pkts, count);
+ if (vq_is_packed(dev)) {
+ if (dev->flags & VIRTIO_DEV_LEGACY_OL_FLAGS)
+ count = virtio_dev_tx_packed_legacy(dev, vq, mbuf_pool, pkts, count);
+ else
+ count = virtio_dev_tx_packed_compliant(dev, vq, mbuf_pool, pkts, count);
+ } else {
+ if (dev->flags & VIRTIO_DEV_LEGACY_OL_FLAGS)
+ count = virtio_dev_tx_split_legacy(dev, vq, mbuf_pool, pkts, count);
+ else
+ count = virtio_dev_tx_split_compliant(dev, vq, mbuf_pool, pkts, count);
+ }
out:
if (dev->features & (1ULL << VIRTIO_F_IOMMU_PLATFORM))
--
2.23.0
^ permalink raw reply [relevance 2%]
* [dpdk-dev] [PATCH v3 0/4] Offload flags fixes
@ 2021-05-03 13:26 3% ` David Marchand
2021-05-03 13:26 2% ` [dpdk-dev] [PATCH v3 4/4] vhost: fix offload flags in Rx path David Marchand
2021-05-03 15:24 0% ` [dpdk-dev] [PATCH v3 0/4] Offload flags fixes Maxime Coquelin
2021-05-03 16:43 3% ` [dpdk-dev] [PATCH v4 0/3] " David Marchand
2 siblings, 2 replies; 200+ results
From: David Marchand @ 2021-05-03 13:26 UTC (permalink / raw)
To: dev
Cc: maxime.coquelin, olivier.matz, fbl, i.maximets, chenbo.xia, ian.stokes
The important part is the last patch on vhost handling of offloading
requests coming from a virtio guest interface.
The rest are small fixes that I accumulated while reviewing the mbuf
offload flags.
On this last patch, it has the potential of breaking existing
applications using the vhost library (OVS being impacted).
I did not mark it for backport.
Changes since v2:
- kept behavior untouched (to avoid breaking ABI) and introduced a new
flag to select the new behavior,
Changes since v1:
- dropped patch on net/tap,
- added missing bits in example/vhost,
- relaxed checks on VIRTIO_NET_HDR_GSO_ECN and VIRTIO_NET_HDR_GSO_UDP,
--
David Marchand
David Marchand (4):
mbuf: mark old offload flag as deprecated
net/virtio: do not touch Tx offload flags
net/virtio: refactor Tx offload helper
vhost: fix offload flags in Rx path
doc/guides/prog_guide/vhost_lib.rst | 12 ++
doc/guides/rel_notes/release_21_05.rst | 6 +
drivers/net/vhost/rte_eth_vhost.c | 2 +-
drivers/net/virtio/virtio_rxtx.c | 7 +-
drivers/net/virtio/virtio_rxtx_packed_avx.h | 2 +-
drivers/net/virtio/virtio_rxtx_packed_neon.h | 2 +-
drivers/net/virtio/virtqueue.h | 81 ++++----
examples/vhost/main.c | 44 ++---
lib/mbuf/rte_mbuf_core.h | 3 +-
lib/vhost/rte_vhost.h | 1 +
lib/vhost/socket.c | 5 +-
lib/vhost/vhost.c | 6 +-
lib/vhost/vhost.h | 14 +-
lib/vhost/virtio_net.c | 185 ++++++++++++++++---
14 files changed, 268 insertions(+), 102 deletions(-)
--
2.23.0
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [EXT] Re: [PATCH] doc: announce modification in eventdev structure
2021-04-23 10:53 3% ` Kinsella, Ray
@ 2021-05-03 11:18 0% ` Akhil Goyal
2021-05-04 9:36 3% ` Kinsella, Ray
0 siblings, 1 reply; 200+ results
From: Akhil Goyal @ 2021-05-03 11:18 UTC (permalink / raw)
To: Kinsella, Ray, Jerin Jacob Kollanukkaran, thomas, dev, david.marchand
Cc: abhinandan.gujjar, hemant.agrawal, nipun.gupta, sachin.saxena,
Anoob Joseph, matan, roy.fan.zhang, g.singh, erik.g.carrillo,
jay.jayatheerthan, Pavan Nikhilesh Bhagavatula, harry.van.haaren,
Shijith Thotton
Hi Ray,
> > @@ -127,6 +127,10 @@ Deprecation Notices
> > values to the function ``rte_event_eth_rx_adapter_queue_add`` using
> > the structure ``rte_event_eth_rx_adapter_queue_add``.
> >
> > +* eventdev: The function pointer ``ca_enqueue`` in structure
> ``rte_eventdev``
> > + will be moved after ``txa_enqueue`` so that all enqueue/dequeue
> > + function pointers are adjacent to each other.
> > +
> > * sched: To allow more traffic classes, flexible mapping of pipe queues to
> > traffic classes, and subport level configuration of pipes and queues
> > changes will be made to macros, data structures and API functions
> defined
> >
>
> I admire the disipline - but since you are not actually removing ca_enqueue,
> just moving it in memory when the new ABI is declared in anycase, this is not
> required.
>
Does it mean we can move elements in a structure without giving deprecation notice?
-akhil
^ permalink raw reply [relevance 0%]
* [dpdk-dev] [PATCH v4 12/12] raw/ioat: report status of completed jobs
@ 2021-04-30 15:06 2% ` Bruce Richardson
0 siblings, 0 replies; 200+ results
From: Bruce Richardson @ 2021-04-30 15:06 UTC (permalink / raw)
To: dev; +Cc: kevin.laatz, sunil.pai.g, jiayu.hu, Bruce Richardson
Add improved error handling to rte_ioat_completed_ops(). This patch adds
new parameters to the function to enable the user to track the completion
status of each individual operation in a batch. With this addition, the
function can help the user to determine firstly, how many operations may
have failed or been skipped and then secondly, which specific operations
did not complete successfully.
Signed-off-by: Kevin Laatz <kevin.laatz@intel.com>
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
---
doc/guides/rel_notes/release_21_05.rst | 5 +
drivers/raw/ioat/ioat_common.c | 9 +
drivers/raw/ioat/ioat_rawdev_test.c | 274 ++++++++++++++++++++++++-
drivers/raw/ioat/rte_idxd_rawdev_fns.h | 151 ++++++++++----
drivers/raw/ioat/rte_ioat_rawdev.h | 53 ++++-
drivers/raw/ioat/rte_ioat_rawdev_fns.h | 15 +-
examples/ioat/ioatfwd.c | 14 +-
examples/vhost/ioat.c | 2 +-
8 files changed, 455 insertions(+), 68 deletions(-)
diff --git a/doc/guides/rel_notes/release_21_05.rst b/doc/guides/rel_notes/release_21_05.rst
index b3224dc332..7f29f5789f 100644
--- a/doc/guides/rel_notes/release_21_05.rst
+++ b/doc/guides/rel_notes/release_21_05.rst
@@ -329,6 +329,11 @@ API Changes
``policer_action_recolor_supported`` and ``policer_action_drop_supported``
have been removed.
+* raw/ioat: The experimental function ``rte_ioat_completed_ops()`` now
+ supports two additional parameters, ``status`` and ``num_unsuccessful``,
+ to allow the reporting of errors from hardware when performing copy
+ operations.
+
ABI Changes
-----------
diff --git a/drivers/raw/ioat/ioat_common.c b/drivers/raw/ioat/ioat_common.c
index fcb30572e6..d01c1ee367 100644
--- a/drivers/raw/ioat/ioat_common.c
+++ b/drivers/raw/ioat/ioat_common.c
@@ -162,6 +162,15 @@ idxd_dev_configure(const struct rte_rawdev *dev,
rte_idxd->desc_ring = NULL;
return -ENOMEM;
}
+ rte_idxd->hdl_ring_flags = rte_zmalloc(NULL,
+ sizeof(*rte_idxd->hdl_ring_flags) * max_desc, 0);
+ if (rte_idxd->hdl_ring_flags == NULL) {
+ rte_free(rte_idxd->desc_ring);
+ rte_free(rte_idxd->hdl_ring);
+ rte_idxd->desc_ring = NULL;
+ rte_idxd->hdl_ring = NULL;
+ return -ENOMEM;
+ }
rte_idxd->hdls_read = rte_idxd->batch_start = 0;
rte_idxd->batch_size = 0;
diff --git a/drivers/raw/ioat/ioat_rawdev_test.c b/drivers/raw/ioat/ioat_rawdev_test.c
index 839a716a21..5e33669699 100644
--- a/drivers/raw/ioat/ioat_rawdev_test.c
+++ b/drivers/raw/ioat/ioat_rawdev_test.c
@@ -73,13 +73,15 @@ do_multi_copies(int dev_id, int split_batches, int split_completions)
if (split_completions) {
/* gather completions in two halves */
uint16_t half_len = RTE_DIM(srcs) / 2;
- if (rte_ioat_completed_ops(dev_id, half_len, (void *)completed_src,
+ if (rte_ioat_completed_ops(dev_id, half_len, NULL, NULL,
+ (void *)completed_src,
(void *)completed_dst) != half_len) {
PRINT_ERR("Error with rte_ioat_completed_ops - first half request\n");
rte_rawdev_dump(dev_id, stdout);
return -1;
}
- if (rte_ioat_completed_ops(dev_id, half_len, (void *)&completed_src[half_len],
+ if (rte_ioat_completed_ops(dev_id, half_len, NULL, NULL,
+ (void *)&completed_src[half_len],
(void *)&completed_dst[half_len]) != half_len) {
PRINT_ERR("Error with rte_ioat_completed_ops - second half request\n");
rte_rawdev_dump(dev_id, stdout);
@@ -87,7 +89,8 @@ do_multi_copies(int dev_id, int split_batches, int split_completions)
}
} else {
/* gather all completions in one go */
- if (rte_ioat_completed_ops(dev_id, 64, (void *)completed_src,
+ if (rte_ioat_completed_ops(dev_id, RTE_DIM(completed_src), NULL, NULL,
+ (void *)completed_src,
(void *)completed_dst) != RTE_DIM(srcs)) {
PRINT_ERR("Error with rte_ioat_completed_ops\n");
rte_rawdev_dump(dev_id, stdout);
@@ -151,7 +154,7 @@ test_enqueue_copies(int dev_id)
rte_ioat_perform_ops(dev_id);
usleep(10);
- if (rte_ioat_completed_ops(dev_id, 1, (void *)&completed[0],
+ if (rte_ioat_completed_ops(dev_id, 1, NULL, NULL, (void *)&completed[0],
(void *)&completed[1]) != 1) {
PRINT_ERR("Error with rte_ioat_completed_ops\n");
return -1;
@@ -170,6 +173,13 @@ test_enqueue_copies(int dev_id)
}
rte_pktmbuf_free(src);
rte_pktmbuf_free(dst);
+
+ /* check ring is now empty */
+ if (rte_ioat_completed_ops(dev_id, 1, NULL, NULL, (void *)&completed[0],
+ (void *)&completed[1]) != 0) {
+ PRINT_ERR("Error: got unexpected returned handles from rte_ioat_completed_ops\n");
+ return -1;
+ }
} while (0);
/* test doing a multiple single copies */
@@ -203,7 +213,8 @@ test_enqueue_copies(int dev_id)
}
usleep(10);
- if (rte_ioat_completed_ops(dev_id, max_completions, (void *)&completed[0],
+ if (rte_ioat_completed_ops(dev_id, max_completions, NULL, NULL,
+ (void *)&completed[0],
(void *)&completed[max_completions]) != max_ops) {
PRINT_ERR("Error with rte_ioat_completed_ops\n");
rte_rawdev_dump(dev_id, stdout);
@@ -256,7 +267,7 @@ test_enqueue_fill(int dev_id)
rte_ioat_perform_ops(dev_id);
usleep(100);
- if (rte_ioat_completed_ops(dev_id, 1, (void *)&completed[0],
+ if (rte_ioat_completed_ops(dev_id, 1, NULL, NULL, (void *)&completed[0],
(void *)&completed[1]) != 1) {
PRINT_ERR("Error with completed ops\n");
return -1;
@@ -266,8 +277,7 @@ test_enqueue_fill(int dev_id)
char pat_byte = ((char *)&pattern)[j % 8];
if (dst_data[j] != pat_byte) {
PRINT_ERR("Error with fill operation (lengths = %u): got (%x), not (%x)\n",
- lengths[i], dst_data[j],
- pat_byte);
+ lengths[i], dst_data[j], pat_byte);
return -1;
}
}
@@ -323,6 +333,7 @@ test_burst_capacity(int dev_id)
usleep(100);
for (i = 0; i < ring_space / (2 * BURST_SIZE); i++) {
if (rte_ioat_completed_ops(dev_id, BURST_SIZE,
+ NULL, NULL,
completions, completions) != BURST_SIZE) {
PRINT_ERR("Error with completions\n");
return -1;
@@ -341,10 +352,248 @@ test_burst_capacity(int dev_id)
return 0;
}
+static int
+test_completion_status(int dev_id)
+{
+#define COMP_BURST_SZ 16
+ const unsigned int fail_copy[] = {0, 7, 15};
+ struct rte_mbuf *srcs[COMP_BURST_SZ], *dsts[COMP_BURST_SZ];
+ struct rte_mbuf *completed_src[COMP_BURST_SZ * 2];
+ struct rte_mbuf *completed_dst[COMP_BURST_SZ * 2];
+ unsigned int length = 1024;
+ unsigned int i;
+ uint8_t not_ok = 0;
+
+ /* Test single full batch statuses */
+ for (i = 0; i < RTE_DIM(fail_copy); i++) {
+ uint32_t status[COMP_BURST_SZ] = {0};
+ unsigned int j;
+
+ for (j = 0; j < COMP_BURST_SZ; j++) {
+ srcs[j] = rte_pktmbuf_alloc(pool);
+ dsts[j] = rte_pktmbuf_alloc(pool);
+
+ if (rte_ioat_enqueue_copy(dev_id,
+ (j == fail_copy[i] ? (phys_addr_t)NULL :
+ (srcs[j]->buf_iova + srcs[j]->data_off)),
+ dsts[j]->buf_iova + dsts[j]->data_off,
+ length,
+ (uintptr_t)srcs[j],
+ (uintptr_t)dsts[j]) != 1) {
+ PRINT_ERR("Error with rte_ioat_enqueue_copy for buffer %u\n", j);
+ return -1;
+ }
+ }
+ rte_ioat_perform_ops(dev_id);
+ usleep(100);
+
+ if (rte_ioat_completed_ops(dev_id, COMP_BURST_SZ, status, ¬_ok,
+ (void *)completed_src, (void *)completed_dst) != COMP_BURST_SZ) {
+ PRINT_ERR("Error with rte_ioat_completed_ops\n");
+ rte_rawdev_dump(dev_id, stdout);
+ return -1;
+ }
+ if (not_ok != 1 || status[fail_copy[i]] == RTE_IOAT_OP_SUCCESS) {
+ unsigned int j;
+ PRINT_ERR("Error, missing expected failed copy, %u\n", fail_copy[i]);
+ for (j = 0; j < COMP_BURST_SZ; j++)
+ printf("%u ", status[j]);
+ printf("<-- Statuses\n");
+ return -1;
+ }
+ for (j = 0; j < COMP_BURST_SZ; j++) {
+ rte_pktmbuf_free(completed_src[j]);
+ rte_pktmbuf_free(completed_dst[j]);
+ }
+ }
+
+ /* Test gathering status for two batches at once */
+ for (i = 0; i < RTE_DIM(fail_copy); i++) {
+ uint32_t status[COMP_BURST_SZ] = {0};
+ unsigned int batch, j;
+ unsigned int expected_failures = 0;
+
+ for (batch = 0; batch < 2; batch++) {
+ for (j = 0; j < COMP_BURST_SZ/2; j++) {
+ srcs[j] = rte_pktmbuf_alloc(pool);
+ dsts[j] = rte_pktmbuf_alloc(pool);
+
+ if (j == fail_copy[i])
+ expected_failures++;
+ if (rte_ioat_enqueue_copy(dev_id,
+ (j == fail_copy[i] ? (phys_addr_t)NULL :
+ (srcs[j]->buf_iova + srcs[j]->data_off)),
+ dsts[j]->buf_iova + dsts[j]->data_off,
+ length,
+ (uintptr_t)srcs[j],
+ (uintptr_t)dsts[j]) != 1) {
+ PRINT_ERR("Error with rte_ioat_enqueue_copy for buffer %u\n",
+ j);
+ return -1;
+ }
+ }
+ rte_ioat_perform_ops(dev_id);
+ }
+ usleep(100);
+
+ if (rte_ioat_completed_ops(dev_id, COMP_BURST_SZ, status, ¬_ok,
+ (void *)completed_src, (void *)completed_dst) != COMP_BURST_SZ) {
+ PRINT_ERR("Error with rte_ioat_completed_ops\n");
+ rte_rawdev_dump(dev_id, stdout);
+ return -1;
+ }
+ if (not_ok != expected_failures) {
+ unsigned int j;
+ PRINT_ERR("Error, missing expected failed copy, got %u, not %u\n",
+ not_ok, expected_failures);
+ for (j = 0; j < COMP_BURST_SZ; j++)
+ printf("%u ", status[j]);
+ printf("<-- Statuses\n");
+ return -1;
+ }
+ for (j = 0; j < COMP_BURST_SZ; j++) {
+ rte_pktmbuf_free(completed_src[j]);
+ rte_pktmbuf_free(completed_dst[j]);
+ }
+ }
+
+ /* Test gathering status for half batch at a time */
+ for (i = 0; i < RTE_DIM(fail_copy); i++) {
+ uint32_t status[COMP_BURST_SZ] = {0};
+ unsigned int j;
+
+ for (j = 0; j < COMP_BURST_SZ; j++) {
+ srcs[j] = rte_pktmbuf_alloc(pool);
+ dsts[j] = rte_pktmbuf_alloc(pool);
+
+ if (rte_ioat_enqueue_copy(dev_id,
+ (j == fail_copy[i] ? (phys_addr_t)NULL :
+ (srcs[j]->buf_iova + srcs[j]->data_off)),
+ dsts[j]->buf_iova + dsts[j]->data_off,
+ length,
+ (uintptr_t)srcs[j],
+ (uintptr_t)dsts[j]) != 1) {
+ PRINT_ERR("Error with rte_ioat_enqueue_copy for buffer %u\n", j);
+ return -1;
+ }
+ }
+ rte_ioat_perform_ops(dev_id);
+ usleep(100);
+
+ if (rte_ioat_completed_ops(dev_id, COMP_BURST_SZ / 2, status, ¬_ok,
+ (void *)completed_src,
+ (void *)completed_dst) != (COMP_BURST_SZ / 2)) {
+ PRINT_ERR("Error with rte_ioat_completed_ops\n");
+ rte_rawdev_dump(dev_id, stdout);
+ return -1;
+ }
+ if (fail_copy[i] < COMP_BURST_SZ / 2 &&
+ (not_ok != 1 || status[fail_copy[i]] == RTE_IOAT_OP_SUCCESS)) {
+ PRINT_ERR("Missing expected failure in first half-batch\n");
+ rte_rawdev_dump(dev_id, stdout);
+ return -1;
+ }
+ if (rte_ioat_completed_ops(dev_id, COMP_BURST_SZ / 2, status, ¬_ok,
+ (void *)&completed_src[COMP_BURST_SZ / 2],
+ (void *)&completed_dst[COMP_BURST_SZ / 2]) != (COMP_BURST_SZ / 2)) {
+ PRINT_ERR("Error with rte_ioat_completed_ops\n");
+ rte_rawdev_dump(dev_id, stdout);
+ return -1;
+ }
+ if (fail_copy[i] >= COMP_BURST_SZ / 2 && (not_ok != 1 ||
+ status[fail_copy[i] - (COMP_BURST_SZ / 2)]
+ == RTE_IOAT_OP_SUCCESS)) {
+ PRINT_ERR("Missing expected failure in second half-batch\n");
+ rte_rawdev_dump(dev_id, stdout);
+ return -1;
+ }
+
+ for (j = 0; j < COMP_BURST_SZ; j++) {
+ rte_pktmbuf_free(completed_src[j]);
+ rte_pktmbuf_free(completed_dst[j]);
+ }
+ }
+
+ /* Test gathering statuses with fence */
+ for (i = 1; i < RTE_DIM(fail_copy); i++) {
+ uint32_t status[COMP_BURST_SZ * 2] = {0};
+ unsigned int j;
+ uint16_t count;
+
+ for (j = 0; j < COMP_BURST_SZ; j++) {
+ srcs[j] = rte_pktmbuf_alloc(pool);
+ dsts[j] = rte_pktmbuf_alloc(pool);
+
+ /* always fail the first copy */
+ if (rte_ioat_enqueue_copy(dev_id,
+ (j == 0 ? (phys_addr_t)NULL :
+ (srcs[j]->buf_iova + srcs[j]->data_off)),
+ dsts[j]->buf_iova + dsts[j]->data_off,
+ length,
+ (uintptr_t)srcs[j],
+ (uintptr_t)dsts[j]) != 1) {
+ PRINT_ERR("Error with rte_ioat_enqueue_copy for buffer %u\n", j);
+ return -1;
+ }
+ /* put in a fence which will stop any further transactions
+ * because we had a previous failure.
+ */
+ if (j == fail_copy[i])
+ rte_ioat_fence(dev_id);
+ }
+ rte_ioat_perform_ops(dev_id);
+ usleep(100);
+
+ count = rte_ioat_completed_ops(dev_id, COMP_BURST_SZ * 2, status, ¬_ok,
+ (void *)completed_src, (void *)completed_dst);
+ if (count != COMP_BURST_SZ) {
+ PRINT_ERR("Error with rte_ioat_completed_ops, got %u not %u\n",
+ count, COMP_BURST_SZ);
+ for (j = 0; j < count; j++)
+ printf("%u ", status[j]);
+ printf("<-- Statuses\n");
+ return -1;
+ }
+ if (not_ok != COMP_BURST_SZ - fail_copy[i]) {
+ PRINT_ERR("Unexpected failed copy count, got %u, expected %u\n",
+ not_ok, COMP_BURST_SZ - fail_copy[i]);
+ for (j = 0; j < COMP_BURST_SZ; j++)
+ printf("%u ", status[j]);
+ printf("<-- Statuses\n");
+ return -1;
+ }
+ if (status[0] == RTE_IOAT_OP_SUCCESS || status[0] == RTE_IOAT_OP_SKIPPED) {
+ PRINT_ERR("Error, op 0 unexpectedly did not fail.\n");
+ return -1;
+ }
+ for (j = 1; j <= fail_copy[i]; j++) {
+ if (status[j] != RTE_IOAT_OP_SUCCESS) {
+ PRINT_ERR("Error, op %u unexpectedly failed\n", j);
+ return -1;
+ }
+ }
+ for (j = fail_copy[i] + 1; j < COMP_BURST_SZ; j++) {
+ if (status[j] != RTE_IOAT_OP_SKIPPED) {
+ PRINT_ERR("Error, all descriptors after fence should be invalid\n");
+ return -1;
+ }
+ }
+ for (j = 0; j < COMP_BURST_SZ; j++) {
+ rte_pktmbuf_free(completed_src[j]);
+ rte_pktmbuf_free(completed_dst[j]);
+ }
+ }
+
+ return 0;
+}
+
int
ioat_rawdev_test(uint16_t dev_id)
{
#define IOAT_TEST_RINGSIZE 512
+ const struct rte_idxd_rawdev *idxd =
+ (struct rte_idxd_rawdev *)rte_rawdevs[dev_id].dev_private;
+ const enum rte_ioat_dev_type ioat_type = idxd->type;
struct rte_ioat_rawdev_config p = { .ring_size = -1 };
struct rte_rawdev_info info = { .dev_private = &p };
struct rte_rawdev_xstats_name *snames = NULL;
@@ -453,6 +702,15 @@ ioat_rawdev_test(uint16_t dev_id)
if (test_burst_capacity(dev_id) != 0)
goto err;
+ /* only DSA devices report address errors, and we can only use null pointers
+ * to generate those errors when DPDK is in VA mode.
+ */
+ if (rte_eal_iova_mode() == RTE_IOVA_VA && ioat_type == RTE_IDXD_DEV) {
+ printf("Running Completions Status Test\n");
+ if (test_completion_status(dev_id) != 0)
+ goto err;
+ }
+
rte_rawdev_stop(dev_id);
if (rte_rawdev_xstats_reset(dev_id, NULL, 0) != 0) {
PRINT_ERR("Error resetting xstat values\n");
diff --git a/drivers/raw/ioat/rte_idxd_rawdev_fns.h b/drivers/raw/ioat/rte_idxd_rawdev_fns.h
index 41f0ad6e99..ee011e5992 100644
--- a/drivers/raw/ioat/rte_idxd_rawdev_fns.h
+++ b/drivers/raw/ioat/rte_idxd_rawdev_fns.h
@@ -104,8 +104,17 @@ struct rte_idxd_rawdev {
struct rte_idxd_hw_desc *desc_ring;
struct rte_idxd_user_hdl *hdl_ring;
+ /* flags to indicate handle validity. Kept separate from ring, to avoid
+ * using 8 bytes per flag. Upper 8 bits holds error code if any.
+ */
+ uint16_t *hdl_ring_flags;
};
+#define RTE_IDXD_HDL_NORMAL 0
+#define RTE_IDXD_HDL_INVALID (1 << 0) /* no handle stored for this element */
+#define RTE_IDXD_HDL_OP_FAILED (1 << 1) /* return failure for this one */
+#define RTE_IDXD_HDL_OP_SKIPPED (1 << 2) /* this op was skipped */
+
static __rte_always_inline uint16_t
__idxd_burst_capacity(int dev_id)
{
@@ -124,8 +133,10 @@ __idxd_burst_capacity(int dev_id)
write_idx += idxd->desc_ring_mask + 1;
used_space = write_idx - idxd->hdls_read;
- /* Return amount of free space in the descriptor ring */
- return idxd->desc_ring_mask - used_space;
+ /* Return amount of free space in the descriptor ring
+ * subtract 1 for space for batch descriptor and 1 for possible null desc
+ */
+ return idxd->desc_ring_mask - used_space - 2;
}
static __rte_always_inline rte_iova_t
@@ -145,23 +156,28 @@ __idxd_write_desc(int dev_id,
struct rte_idxd_rawdev *idxd =
(struct rte_idxd_rawdev *)rte_rawdevs[dev_id].dev_private;
uint16_t write_idx = idxd->batch_start + idxd->batch_size;
+ uint16_t mask = idxd->desc_ring_mask;
/* first check batch ring space then desc ring space */
if ((idxd->batch_idx_read == 0 && idxd->batch_idx_write == idxd->max_batches) ||
idxd->batch_idx_write + 1 == idxd->batch_idx_read)
goto failed;
- if (((write_idx + 1) & idxd->desc_ring_mask) == idxd->hdls_read)
+ /* for descriptor ring, we always need a slot for batch completion */
+ if (((write_idx + 2) & mask) == idxd->hdls_read)
goto failed;
/* write desc and handle. Note, descriptors don't wrap */
idxd->desc_ring[write_idx].pasid = 0;
idxd->desc_ring[write_idx].op_flags = op_flags | IDXD_FLAG_COMPLETION_ADDR_VALID;
- idxd->desc_ring[write_idx].completion = __desc_idx_to_iova(idxd, write_idx);
+ idxd->desc_ring[write_idx].completion = __desc_idx_to_iova(idxd, write_idx & mask);
idxd->desc_ring[write_idx].src = src;
idxd->desc_ring[write_idx].dst = dst;
idxd->desc_ring[write_idx].size = size;
- idxd->hdl_ring[write_idx & idxd->desc_ring_mask] = *hdl;
+ if (hdl == NULL)
+ idxd->hdl_ring_flags[write_idx & mask] = RTE_IDXD_HDL_INVALID;
+ else
+ idxd->hdl_ring[write_idx & mask] = *hdl;
idxd->batch_size++;
idxd->xstats.enqueued++;
@@ -203,9 +219,8 @@ __idxd_enqueue_copy(int dev_id, rte_iova_t src, rte_iova_t dst,
static __rte_always_inline int
__idxd_fence(int dev_id)
{
- static const struct rte_idxd_user_hdl null_hdl;
/* only op field needs filling - zero src, dst and length */
- return __idxd_write_desc(dev_id, IDXD_FLAG_FENCE, 0, 0, 0, &null_hdl);
+ return __idxd_write_desc(dev_id, IDXD_FLAG_FENCE, 0, 0, 0, NULL);
}
static __rte_always_inline void
@@ -222,42 +237,37 @@ __idxd_perform_ops(int dev_id)
{
struct rte_idxd_rawdev *idxd =
(struct rte_idxd_rawdev *)rte_rawdevs[dev_id].dev_private;
- /* write completion to last desc in the batch */
- uint16_t comp_idx = idxd->batch_start + idxd->batch_size - 1;
- if (comp_idx > idxd->desc_ring_mask) {
- comp_idx &= idxd->desc_ring_mask;
- *((uint64_t *)&idxd->desc_ring[comp_idx]) = 0; /* zero start of desc */
- }
+
+ if (!idxd->cfg.no_prefetch_completions)
+ rte_prefetch1(&idxd->desc_ring[idxd->batch_idx_ring[idxd->batch_idx_read]]);
if (idxd->batch_size == 0)
return 0;
- _mm_sfence(); /* fence before writing desc to device */
- if (idxd->batch_size > 1) {
- struct rte_idxd_hw_desc batch_desc = {
- .op_flags = (idxd_op_batch << IDXD_CMD_OP_SHIFT) |
- IDXD_FLAG_COMPLETION_ADDR_VALID |
- IDXD_FLAG_REQUEST_COMPLETION,
- .desc_addr = __desc_idx_to_iova(idxd, idxd->batch_start),
- .completion = __desc_idx_to_iova(idxd, comp_idx),
- .size = idxd->batch_size,
- };
-
- __idxd_movdir64b(idxd->portal, &batch_desc);
- } else {
- /* special case batch size of 1, as not allowed by HW */
- /* comp_idx == batch_start */
- struct rte_idxd_hw_desc *desc = &idxd->desc_ring[comp_idx];
- desc->op_flags |= IDXD_FLAG_COMPLETION_ADDR_VALID |
- IDXD_FLAG_REQUEST_COMPLETION;
- desc->completion = __desc_idx_to_iova(idxd, comp_idx);
-
- __idxd_movdir64b(idxd->portal, desc);
- }
+ if (idxd->batch_size == 1)
+ /* use a fence as a null descriptor, so batch_size >= 2 */
+ if (__idxd_fence(dev_id) != 1)
+ return -1;
+
+ /* write completion beyond last desc in the batch */
+ uint16_t comp_idx = (idxd->batch_start + idxd->batch_size) & idxd->desc_ring_mask;
+ *((uint64_t *)&idxd->desc_ring[comp_idx]) = 0; /* zero start of desc */
+ idxd->hdl_ring_flags[comp_idx] = RTE_IDXD_HDL_INVALID;
+
+ const struct rte_idxd_hw_desc batch_desc = {
+ .op_flags = (idxd_op_batch << IDXD_CMD_OP_SHIFT) |
+ IDXD_FLAG_COMPLETION_ADDR_VALID |
+ IDXD_FLAG_REQUEST_COMPLETION,
+ .desc_addr = __desc_idx_to_iova(idxd, idxd->batch_start),
+ .completion = __desc_idx_to_iova(idxd, comp_idx),
+ .size = idxd->batch_size,
+ };
+ _mm_sfence(); /* fence before writing desc to device */
+ __idxd_movdir64b(idxd->portal, &batch_desc);
idxd->xstats.started += idxd->batch_size;
- idxd->batch_start += idxd->batch_size;
+ idxd->batch_start += idxd->batch_size + 1;
idxd->batch_start &= idxd->desc_ring_mask;
idxd->batch_size = 0;
@@ -269,7 +279,7 @@ __idxd_perform_ops(int dev_id)
}
static __rte_always_inline int
-__idxd_completed_ops(int dev_id, uint8_t max_ops,
+__idxd_completed_ops(int dev_id, uint8_t max_ops, uint32_t *status, uint8_t *num_unsuccessful,
uintptr_t *src_hdls, uintptr_t *dst_hdls)
{
struct rte_idxd_rawdev *idxd =
@@ -280,8 +290,37 @@ __idxd_completed_ops(int dev_id, uint8_t max_ops,
uint16_t idx_to_chk = idxd->batch_idx_ring[idxd->batch_idx_read];
volatile struct rte_idxd_completion *comp_to_chk =
(struct rte_idxd_completion *)&idxd->desc_ring[idx_to_chk];
- if (comp_to_chk->status == 0)
+ uint8_t status = comp_to_chk->status;
+ if (status == 0)
break;
+ comp_to_chk->status = 0;
+ if (unlikely(status > 1)) {
+ /* error occurred somewhere in batch, start where last checked */
+ uint16_t desc_count = comp_to_chk->completed_size;
+ uint16_t batch_start = idxd->hdls_avail;
+ uint16_t batch_end = idx_to_chk;
+
+ if (batch_start > batch_end)
+ batch_end += idxd->desc_ring_mask + 1;
+ /* go through each batch entry and see status */
+ for (n = 0; n < desc_count; n++) {
+ uint16_t idx = (batch_start + n) & idxd->desc_ring_mask;
+ volatile struct rte_idxd_completion *comp =
+ (struct rte_idxd_completion *)&idxd->desc_ring[idx];
+ if (comp->status != 0 &&
+ idxd->hdl_ring_flags[idx] == RTE_IDXD_HDL_NORMAL) {
+ idxd->hdl_ring_flags[idx] = RTE_IDXD_HDL_OP_FAILED;
+ idxd->hdl_ring_flags[idx] |= (comp->status << 8);
+ comp->status = 0; /* clear error for next time */
+ }
+ }
+ /* if batch is incomplete, mark rest as skipped */
+ for ( ; n < batch_end - batch_start; n++) {
+ uint16_t idx = (batch_start + n) & idxd->desc_ring_mask;
+ if (idxd->hdl_ring_flags[idx] == RTE_IDXD_HDL_NORMAL)
+ idxd->hdl_ring_flags[idx] = RTE_IDXD_HDL_OP_SKIPPED;
+ }
+ }
/* avail points to one after the last one written */
idxd->hdls_avail = (idx_to_chk + 1) & idxd->desc_ring_mask;
idxd->batch_idx_read++;
@@ -289,7 +328,7 @@ __idxd_completed_ops(int dev_id, uint8_t max_ops,
idxd->batch_idx_read = 0;
}
- if (idxd->cfg.hdls_disable) {
+ if (idxd->cfg.hdls_disable && status == NULL) {
n = (idxd->hdls_avail < idxd->hdls_read) ?
(idxd->hdls_avail + idxd->desc_ring_mask + 1 - idxd->hdls_read) :
(idxd->hdls_avail - idxd->hdls_read);
@@ -297,10 +336,36 @@ __idxd_completed_ops(int dev_id, uint8_t max_ops,
goto out;
}
- for (n = 0, h_idx = idxd->hdls_read;
- n < max_ops && h_idx != idxd->hdls_avail; n++) {
- src_hdls[n] = idxd->hdl_ring[h_idx].src;
- dst_hdls[n] = idxd->hdl_ring[h_idx].dst;
+ n = 0;
+ h_idx = idxd->hdls_read;
+ while (h_idx != idxd->hdls_avail) {
+ uint16_t flag = idxd->hdl_ring_flags[h_idx];
+ if (flag != RTE_IDXD_HDL_INVALID) {
+ if (!idxd->cfg.hdls_disable) {
+ src_hdls[n] = idxd->hdl_ring[h_idx].src;
+ dst_hdls[n] = idxd->hdl_ring[h_idx].dst;
+ }
+ if (unlikely(flag != RTE_IDXD_HDL_NORMAL)) {
+ if (status != NULL)
+ status[n] = flag == RTE_IDXD_HDL_OP_SKIPPED ?
+ RTE_IOAT_OP_SKIPPED :
+ /* failure case, return err code */
+ idxd->hdl_ring_flags[h_idx] >> 8;
+ if (num_unsuccessful != NULL)
+ *num_unsuccessful += 1;
+ }
+ n++;
+ }
+ idxd->hdl_ring_flags[h_idx] = RTE_IDXD_HDL_NORMAL;
+ if (++h_idx > idxd->desc_ring_mask)
+ h_idx = 0;
+ if (n >= max_ops)
+ break;
+ }
+
+ /* skip over any remaining blank elements, e.g. batch completion */
+ while (idxd->hdl_ring_flags[h_idx] == RTE_IDXD_HDL_INVALID && h_idx != idxd->hdls_avail) {
+ idxd->hdl_ring_flags[h_idx] = RTE_IDXD_HDL_NORMAL;
if (++h_idx > idxd->desc_ring_mask)
h_idx = 0;
}
diff --git a/drivers/raw/ioat/rte_ioat_rawdev.h b/drivers/raw/ioat/rte_ioat_rawdev.h
index e5a22a0799..6cc1560a64 100644
--- a/drivers/raw/ioat/rte_ioat_rawdev.h
+++ b/drivers/raw/ioat/rte_ioat_rawdev.h
@@ -35,6 +35,10 @@ extern "C" {
struct rte_ioat_rawdev_config {
unsigned short ring_size; /**< size of job submission descriptor ring */
bool hdls_disable; /**< if set, ignore user-supplied handle params */
+ /** set "no_prefetch_completions", if polling completions on separate core
+ * from the core submitting the jobs
+ */
+ bool no_prefetch_completions;
};
/**
@@ -131,40 +135,73 @@ static inline int
__rte_experimental
rte_ioat_perform_ops(int dev_id);
+/*
+ * Status codes for operations.
+ */
+#define RTE_IOAT_OP_SUCCESS 0 /**< Operation completed successfully */
+#define RTE_IOAT_OP_SKIPPED 1 /**< Operation was not attempted (Earlier fenced op failed) */
+/* Values >1 indicate a failure condition */
+/* Error codes taken from Intel(R) Data Streaming Accelerator Architecture
+ * Specification, section 5.7
+ */
+#define RTE_IOAT_OP_ADDRESS_ERR 0x03 /**< Page fault or invalid address */
+#define RTE_IOAT_OP_INVALID_LEN 0x13 /**< Invalid/too big length field passed */
+#define RTE_IOAT_OP_OVERLAPPING_BUFS 0x16 /**< Overlapping buffers error */
+
+
/**
* Returns details of operations that have been completed
*
+ * The status of each operation is returned in the status array parameter.
* If the hdls_disable option was not set when the device was configured,
* the function will return to the caller the user-provided "handles" for
* the copy operations which have been completed by the hardware, and not
* already returned by a previous call to this API.
* If the hdls_disable option for the device was set on configure, the
- * max_copies, src_hdls and dst_hdls parameters will be ignored, and the
+ * src_hdls and dst_hdls parameters will be ignored, and the
* function returns the number of newly-completed operations.
+ * If status is also NULL, then max_copies parameter is also ignored and the
+ * function returns a count of the number of newly-completed operations.
*
* @param dev_id
* The rawdev device id of the ioat instance
* @param max_copies
- * The number of entries which can fit in the src_hdls and dst_hdls
+ * The number of entries which can fit in the status, src_hdls and dst_hdls
* arrays, i.e. max number of completed operations to report.
* NOTE: If hdls_disable configuration option for the device is set, this
- * parameter is ignored.
+ * parameter applies only to the "status" array if specified
+ * @param status
+ * Array to hold the status of each completed operation. Array should be
+ * set to zeros on input, as the driver will only write error status values.
+ * A value of 1 implies an operation was not attempted, and any other non-zero
+ * value indicates operation failure.
+ * Parameter may be NULL if no status value checking is required.
+ * @param num_unsuccessful
+ * Returns the number of elements in status where the value is non-zero,
+ * i.e. the operation either failed or was not attempted due to an earlier
+ * failure. If this value is returned as zero (the expected case), the
+ * status array will not have been modified by the function and need not be
+ * checked by software
* @param src_hdls
* Array to hold the source handle parameters of the completed ops.
* NOTE: If hdls_disable configuration option for the device is set, this
- * parameter is ignored.
+ * parameter is ignored, and may be NULL
* @param dst_hdls
* Array to hold the destination handle parameters of the completed ops.
* NOTE: If hdls_disable configuration option for the device is set, this
- * parameter is ignored.
+ * parameter is ignored, and may be NULL
* @return
- * -1 on error, with rte_errno set appropriately.
- * Otherwise number of completed operations i.e. number of entries written
- * to the src_hdls and dst_hdls array parameters.
+ * -1 on device error, with rte_errno set appropriately and parameters
+ * unmodified.
+ * Otherwise number of returned operations i.e. number of valid entries
+ * in the status, src_hdls and dst_hdls array parameters. If status is NULL,
+ * and the hdls_disable config option is set, this value may be greater than
+ * max_copies parameter.
*/
static inline int
__rte_experimental
rte_ioat_completed_ops(int dev_id, uint8_t max_copies,
+ uint32_t *status, uint8_t *num_unsuccessful,
uintptr_t *src_hdls, uintptr_t *dst_hdls);
/* include the implementation details from a separate file */
diff --git a/drivers/raw/ioat/rte_ioat_rawdev_fns.h b/drivers/raw/ioat/rte_ioat_rawdev_fns.h
index 92ccdd03b9..9b8a9fa88e 100644
--- a/drivers/raw/ioat/rte_ioat_rawdev_fns.h
+++ b/drivers/raw/ioat/rte_ioat_rawdev_fns.h
@@ -334,16 +334,22 @@ rte_ioat_perform_ops(int dev_id)
static inline int
rte_ioat_completed_ops(int dev_id, uint8_t max_copies,
+ uint32_t *status, uint8_t *num_unsuccessful,
uintptr_t *src_hdls, uintptr_t *dst_hdls)
{
enum rte_ioat_dev_type *type =
(enum rte_ioat_dev_type *)rte_rawdevs[dev_id].dev_private;
+ uint8_t tmp; /* used so functions don't need to check for null parameter */
+
+ if (num_unsuccessful == NULL)
+ num_unsuccessful = &tmp;
+
+ *num_unsuccessful = 0;
if (*type == RTE_IDXD_DEV)
- return __idxd_completed_ops(dev_id, max_copies,
+ return __idxd_completed_ops(dev_id, max_copies, status, num_unsuccessful,
src_hdls, dst_hdls);
else
- return __ioat_completed_ops(dev_id, max_copies,
- src_hdls, dst_hdls);
+ return __ioat_completed_ops(dev_id, max_copies, src_hdls, dst_hdls);
}
static inline void
@@ -355,7 +361,8 @@ __rte_deprecated_msg("use rte_ioat_completed_ops() instead")
rte_ioat_completed_copies(int dev_id, uint8_t max_copies,
uintptr_t *src_hdls, uintptr_t *dst_hdls)
{
- return rte_ioat_completed_ops(dev_id, max_copies, src_hdls, dst_hdls);
+ return rte_ioat_completed_ops(dev_id, max_copies, NULL, NULL,
+ src_hdls, dst_hdls);
}
#endif /* _RTE_IOAT_RAWDEV_FNS_H_ */
diff --git a/examples/ioat/ioatfwd.c b/examples/ioat/ioatfwd.c
index 845301a6db..2e377e2d4b 100644
--- a/examples/ioat/ioatfwd.c
+++ b/examples/ioat/ioatfwd.c
@@ -447,12 +447,15 @@ ioat_tx_port(struct rxtx_port_config *tx_config)
for (i = 0; i < tx_config->nb_queues; i++) {
if (copy_mode == COPY_MODE_IOAT_NUM) {
- /* Deque the mbufs from IOAT device. */
+ /* Dequeue the mbufs from IOAT device. Since all memory
+ * is DPDK pinned memory and therefore all addresses should
+ * be valid, we don't check for copy errors
+ */
nb_dq = rte_ioat_completed_ops(
- tx_config->ioat_ids[i], MAX_PKT_BURST,
+ tx_config->ioat_ids[i], MAX_PKT_BURST, NULL, NULL,
(void *)mbufs_src, (void *)mbufs_dst);
} else {
- /* Deque the mbufs from rx_to_tx_ring. */
+ /* Dequeue the mbufs from rx_to_tx_ring. */
nb_dq = rte_ring_dequeue_burst(
tx_config->rx_to_tx_ring, (void *)mbufs_dst,
MAX_PKT_BURST, NULL);
@@ -725,7 +728,10 @@ check_link_status(uint32_t port_mask)
static void
configure_rawdev_queue(uint32_t dev_id)
{
- struct rte_ioat_rawdev_config dev_config = { .ring_size = ring_size };
+ struct rte_ioat_rawdev_config dev_config = {
+ .ring_size = ring_size,
+ .no_prefetch_completions = (cfg.nb_lcores > 1),
+ };
struct rte_rawdev_info info = { .dev_private = &dev_config };
if (rte_rawdev_configure(dev_id, &info, sizeof(dev_config)) != 0) {
diff --git a/examples/vhost/ioat.c b/examples/vhost/ioat.c
index 60b73be936..efdd3f6f76 100644
--- a/examples/vhost/ioat.c
+++ b/examples/vhost/ioat.c
@@ -183,7 +183,7 @@ ioat_check_completed_copies_cb(int vid, uint16_t queue_id,
uint16_t dev_id = dma_bind[vid].dmas[queue_id * 2
+ VIRTIO_RXQ].dev_id;
- n_seg = rte_ioat_completed_ops(dev_id, 255, dump, dump);
+ n_seg = rte_ioat_completed_ops(dev_id, 255, NULL, NULL, dump, dump);
if (n_seg < 0) {
RTE_LOG(ERR,
VHOST_DATA,
--
2.30.2
^ permalink raw reply [relevance 2%]
* Re: [dpdk-dev] Use WFE for spinlock and ring
2021-04-30 13:41 0% ` Honnappa Nagarahalli
@ 2021-04-30 14:19 0% ` Bruce Richardson
2021-05-07 10:18 0% ` Ruifeng Wang
0 siblings, 1 reply; 200+ results
From: Bruce Richardson @ 2021-04-30 14:19 UTC (permalink / raw)
To: Honnappa Nagarahalli
Cc: thomas, Ruifeng Wang, David Marchand, dev, jerinj, nd
On Fri, Apr 30, 2021 at 01:41:22PM +0000, Honnappa Nagarahalli wrote:
> <snip>
>
> > > > > > > >
> > > > > > > > The rte_wait_until_equal_xxx APIs abstract the functionality
> > > > > > > > of 'polling for a memory location to become equal to a given
> > value'[1].
> > > > > > > >
> > > > > > > > Use the API for the rte spinlock and ring implementations.
> > > > > > > > With the wait until equal APIs being stable, changes will not impact
> > ABI.
> > > > > > >
> > > > > > > Afaics, there is no ARM target with WFE enabled and we lost
> > > > > > > ability to enable WFE support with removal of the make build
> > system.
> > > > > >
> > > > > > WFE can be enabled with direct meson file change.
> > > > > > WFE is not intended to be enabled by default. It can be enabled
> > > > > > based on benchmarking result on hardware.
> > > > > > >
> > > > > > > $ git grep RTE_ARM_USE_WFE
> > > > > > > config/arm/meson.build: ['RTE_ARM_USE_WFE', false],
> > > > > > > lib/eal/arm/include/rte_pause_64.h:#ifdef RTE_ARM_USE_WFE
> > > > > > >
> > > > > > > How did you enable WFE to test this series?
> > > > > >
> > > > > > I modified meson file to test.
> > > > > > Tests were also done with WFE disabled to make sure no
> > > > > > degradation with
> > > > > generic implementation.
> > > > >
> > > > > I don't understand the usage.
> > > > > Which platform should use it?
> > > >
> > > > Platforms that implement WFE semantic (e.g. N1) can use.
> > > > The user can enable this feature for power efficiency purpose. But
> > > > there is something to note as described in commit message 1be7855d77
> > when the API was introduced.
> > > >
> > > > > Should it be a compile-time option?
> > > >
> > > > Yes, it should be a compile-time option.
> > > > It can be configured via c_args meson option?
> > >
> > > +Cc Bruce for discussing how to enable such feature.
> > >
> > > The problem with c_args is that the application has no way to know.
> > >
> > Agree about c_args not being a great choice. Why does this need to be a
> > compile-time option? Can runtime support not be detected in some
> > manner?
> The problem is inconsistency in performance on different Arm platforms. We had decided that each platform needs to enable it after some testing.
Then it sounds like it does indeed need to be a build option. Does it need
to be added to the meson_options.txt, or can it just be specified in
cross-files and optionally via c_args?
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] Use WFE for spinlock and ring
2021-04-30 9:16 0% ` Bruce Richardson
@ 2021-04-30 13:41 0% ` Honnappa Nagarahalli
2021-04-30 14:19 0% ` Bruce Richardson
0 siblings, 1 reply; 200+ results
From: Honnappa Nagarahalli @ 2021-04-30 13:41 UTC (permalink / raw)
To: Bruce Richardson, thomas
Cc: Ruifeng Wang, David Marchand, dev, jerinj, nd, Honnappa Nagarahalli, nd
<snip>
> > > > > > >
> > > > > > > The rte_wait_until_equal_xxx APIs abstract the functionality
> > > > > > > of 'polling for a memory location to become equal to a given
> value'[1].
> > > > > > >
> > > > > > > Use the API for the rte spinlock and ring implementations.
> > > > > > > With the wait until equal APIs being stable, changes will not impact
> ABI.
> > > > > >
> > > > > > Afaics, there is no ARM target with WFE enabled and we lost
> > > > > > ability to enable WFE support with removal of the make build
> system.
> > > > >
> > > > > WFE can be enabled with direct meson file change.
> > > > > WFE is not intended to be enabled by default. It can be enabled
> > > > > based on benchmarking result on hardware.
> > > > > >
> > > > > > $ git grep RTE_ARM_USE_WFE
> > > > > > config/arm/meson.build: ['RTE_ARM_USE_WFE', false],
> > > > > > lib/eal/arm/include/rte_pause_64.h:#ifdef RTE_ARM_USE_WFE
> > > > > >
> > > > > > How did you enable WFE to test this series?
> > > > >
> > > > > I modified meson file to test.
> > > > > Tests were also done with WFE disabled to make sure no
> > > > > degradation with
> > > > generic implementation.
> > > >
> > > > I don't understand the usage.
> > > > Which platform should use it?
> > >
> > > Platforms that implement WFE semantic (e.g. N1) can use.
> > > The user can enable this feature for power efficiency purpose. But
> > > there is something to note as described in commit message 1be7855d77
> when the API was introduced.
> > >
> > > > Should it be a compile-time option?
> > >
> > > Yes, it should be a compile-time option.
> > > It can be configured via c_args meson option?
> >
> > +Cc Bruce for discussing how to enable such feature.
> >
> > The problem with c_args is that the application has no way to know.
> >
> Agree about c_args not being a great choice. Why does this need to be a
> compile-time option? Can runtime support not be detected in some
> manner?
The problem is inconsistency in performance on different Arm platforms. We had decided that each platform needs to enable it after some testing.
^ permalink raw reply [relevance 0%]
* [dpdk-dev] [PATCH v3 12/12] raw/ioat: report status of completed jobs
@ 2021-04-30 11:17 2% ` Bruce Richardson
0 siblings, 0 replies; 200+ results
From: Bruce Richardson @ 2021-04-30 11:17 UTC (permalink / raw)
To: dev; +Cc: kevin.laatz, sunil.pai.g, jiayu.hu, Bruce Richardson
Add improved error handling to rte_ioat_completed_ops(). This patch adds
new parameters to the function to enable the user to track the completion
status of each individual operation in a batch. With this addition, the
function can help the user to determine firstly, how many operations may
have failed or been skipped and then secondly, which specific operations
did not complete successfully.
Signed-off-by: Kevin Laatz <kevin.laatz@intel.com>
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
---
doc/guides/rel_notes/release_21_05.rst | 5 +
drivers/raw/ioat/ioat_common.c | 9 +
drivers/raw/ioat/ioat_rawdev_test.c | 274 ++++++++++++++++++++++++-
drivers/raw/ioat/rte_idxd_rawdev_fns.h | 151 ++++++++++----
drivers/raw/ioat/rte_ioat_rawdev.h | 53 ++++-
drivers/raw/ioat/rte_ioat_rawdev_fns.h | 15 +-
examples/ioat/ioatfwd.c | 14 +-
examples/vhost/ioat.c | 2 +-
8 files changed, 455 insertions(+), 68 deletions(-)
diff --git a/doc/guides/rel_notes/release_21_05.rst b/doc/guides/rel_notes/release_21_05.rst
index b3224dc332..7f29f5789f 100644
--- a/doc/guides/rel_notes/release_21_05.rst
+++ b/doc/guides/rel_notes/release_21_05.rst
@@ -329,6 +329,11 @@ API Changes
``policer_action_recolor_supported`` and ``policer_action_drop_supported``
have been removed.
+* raw/ioat: The experimental function ``rte_ioat_completed_ops()`` now
+ supports two additional parameters, ``status`` and ``num_unsuccessful``,
+ to allow the reporting of errors from hardware when performing copy
+ operations.
+
ABI Changes
-----------
diff --git a/drivers/raw/ioat/ioat_common.c b/drivers/raw/ioat/ioat_common.c
index fcb30572e6..d01c1ee367 100644
--- a/drivers/raw/ioat/ioat_common.c
+++ b/drivers/raw/ioat/ioat_common.c
@@ -162,6 +162,15 @@ idxd_dev_configure(const struct rte_rawdev *dev,
rte_idxd->desc_ring = NULL;
return -ENOMEM;
}
+ rte_idxd->hdl_ring_flags = rte_zmalloc(NULL,
+ sizeof(*rte_idxd->hdl_ring_flags) * max_desc, 0);
+ if (rte_idxd->hdl_ring_flags == NULL) {
+ rte_free(rte_idxd->desc_ring);
+ rte_free(rte_idxd->hdl_ring);
+ rte_idxd->desc_ring = NULL;
+ rte_idxd->hdl_ring = NULL;
+ return -ENOMEM;
+ }
rte_idxd->hdls_read = rte_idxd->batch_start = 0;
rte_idxd->batch_size = 0;
diff --git a/drivers/raw/ioat/ioat_rawdev_test.c b/drivers/raw/ioat/ioat_rawdev_test.c
index b007549275..6a16e5ea81 100644
--- a/drivers/raw/ioat/ioat_rawdev_test.c
+++ b/drivers/raw/ioat/ioat_rawdev_test.c
@@ -73,13 +73,15 @@ do_multi_copies(int dev_id, int split_batches, int split_completions)
if (split_completions) {
/* gather completions in two halves */
uint16_t half_len = RTE_DIM(srcs) / 2;
- if (rte_ioat_completed_ops(dev_id, half_len, (void *)completed_src,
+ if (rte_ioat_completed_ops(dev_id, half_len, NULL, NULL,
+ (void *)completed_src,
(void *)completed_dst) != half_len) {
PRINT_ERR("Error with rte_ioat_completed_ops - first half request\n");
rte_rawdev_dump(dev_id, stdout);
return -1;
}
- if (rte_ioat_completed_ops(dev_id, half_len, (void *)&completed_src[half_len],
+ if (rte_ioat_completed_ops(dev_id, half_len, NULL, NULL,
+ (void *)&completed_src[half_len],
(void *)&completed_dst[half_len]) != half_len) {
PRINT_ERR("Error with rte_ioat_completed_ops - second half request\n");
rte_rawdev_dump(dev_id, stdout);
@@ -87,7 +89,8 @@ do_multi_copies(int dev_id, int split_batches, int split_completions)
}
} else {
/* gather all completions in one go */
- if (rte_ioat_completed_ops(dev_id, 64, (void *)completed_src,
+ if (rte_ioat_completed_ops(dev_id, RTE_DIM(completed_src), NULL, NULL,
+ (void *)completed_src,
(void *)completed_dst) != RTE_DIM(srcs)) {
PRINT_ERR("Error with rte_ioat_completed_ops\n");
rte_rawdev_dump(dev_id, stdout);
@@ -151,7 +154,7 @@ test_enqueue_copies(int dev_id)
rte_ioat_perform_ops(dev_id);
usleep(10);
- if (rte_ioat_completed_ops(dev_id, 1, (void *)&completed[0],
+ if (rte_ioat_completed_ops(dev_id, 1, NULL, NULL, (void *)&completed[0],
(void *)&completed[1]) != 1) {
PRINT_ERR("Error with rte_ioat_completed_ops\n");
return -1;
@@ -170,6 +173,13 @@ test_enqueue_copies(int dev_id)
}
rte_pktmbuf_free(src);
rte_pktmbuf_free(dst);
+
+ /* check ring is now empty */
+ if (rte_ioat_completed_ops(dev_id, 1, NULL, NULL, (void *)&completed[0],
+ (void *)&completed[1]) != 0) {
+ PRINT_ERR("Error: got unexpected returned handles from rte_ioat_completed_ops\n");
+ return -1;
+ }
} while (0);
/* test doing a multiple single copies */
@@ -203,7 +213,8 @@ test_enqueue_copies(int dev_id)
}
usleep(10);
- if (rte_ioat_completed_ops(dev_id, max_completions, (void *)&completed[0],
+ if (rte_ioat_completed_ops(dev_id, max_completions, NULL, NULL,
+ (void *)&completed[0],
(void *)&completed[max_completions]) != max_ops) {
PRINT_ERR("Error with rte_ioat_completed_ops\n");
rte_rawdev_dump(dev_id, stdout);
@@ -256,7 +267,7 @@ test_enqueue_fill(int dev_id)
rte_ioat_perform_ops(dev_id);
usleep(100);
- if (rte_ioat_completed_ops(dev_id, 1, (void *)&completed[0],
+ if (rte_ioat_completed_ops(dev_id, 1, NULL, NULL, (void *)&completed[0],
(void *)&completed[1]) != 1) {
PRINT_ERR("Error with completed ops\n");
return -1;
@@ -266,8 +277,7 @@ test_enqueue_fill(int dev_id)
char pat_byte = ((char *)&pattern)[j % 8];
if (dst_data[j] != pat_byte) {
PRINT_ERR("Error with fill operation (lengths = %u): got (%x), not (%x)\n",
- lengths[i], dst_data[j],
- pat_byte);
+ lengths[i], dst_data[j], pat_byte);
return -1;
}
}
@@ -323,6 +333,7 @@ test_burst_capacity(int dev_id)
usleep(100);
for (i = 0; i < ring_space / (2 * BURST_SIZE); i++) {
if (rte_ioat_completed_ops(dev_id, BURST_SIZE,
+ NULL, NULL,
completions, completions) != BURST_SIZE) {
PRINT_ERR("Error with completions\n");
return -1;
@@ -340,10 +351,248 @@ test_burst_capacity(int dev_id)
return 0;
}
+static int
+test_completion_status(int dev_id)
+{
+#define COMP_BURST_SZ 16
+ const unsigned int fail_copy[] = {0, 7, 15};
+ struct rte_mbuf *srcs[COMP_BURST_SZ], *dsts[COMP_BURST_SZ];
+ struct rte_mbuf *completed_src[COMP_BURST_SZ * 2];
+ struct rte_mbuf *completed_dst[COMP_BURST_SZ * 2];
+ unsigned int length = 1024;
+ unsigned int i;
+ uint8_t not_ok = 0;
+
+ /* Test single full batch statuses */
+ for (i = 0; i < RTE_DIM(fail_copy); i++) {
+ uint32_t status[COMP_BURST_SZ] = {0};
+ unsigned int j;
+
+ for (j = 0; j < COMP_BURST_SZ; j++) {
+ srcs[j] = rte_pktmbuf_alloc(pool);
+ dsts[j] = rte_pktmbuf_alloc(pool);
+
+ if (rte_ioat_enqueue_copy(dev_id,
+ (j == fail_copy[i] ? (phys_addr_t)NULL :
+ (srcs[j]->buf_iova + srcs[j]->data_off)),
+ dsts[j]->buf_iova + dsts[j]->data_off,
+ length,
+ (uintptr_t)srcs[j],
+ (uintptr_t)dsts[j]) != 1) {
+ PRINT_ERR("Error with rte_ioat_enqueue_copy for buffer %u\n", j);
+ return -1;
+ }
+ }
+ rte_ioat_perform_ops(dev_id);
+ usleep(100);
+
+ if (rte_ioat_completed_ops(dev_id, COMP_BURST_SZ, status, ¬_ok,
+ (void *)completed_src, (void *)completed_dst) != COMP_BURST_SZ) {
+ PRINT_ERR("Error with rte_ioat_completed_ops\n");
+ rte_rawdev_dump(dev_id, stdout);
+ return -1;
+ }
+ if (not_ok != 1 || status[fail_copy[i]] == RTE_IOAT_OP_SUCCESS) {
+ unsigned int j;
+ PRINT_ERR("Error, missing expected failed copy, %u\n", fail_copy[i]);
+ for (j = 0; j < COMP_BURST_SZ; j++)
+ printf("%u ", status[j]);
+ printf("<-- Statuses\n");
+ return -1;
+ }
+ for (j = 0; j < COMP_BURST_SZ; j++) {
+ rte_pktmbuf_free(completed_src[j]);
+ rte_pktmbuf_free(completed_dst[j]);
+ }
+ }
+
+ /* Test gathering status for two batches at once */
+ for (i = 0; i < RTE_DIM(fail_copy); i++) {
+ uint32_t status[COMP_BURST_SZ] = {0};
+ unsigned int batch, j;
+ unsigned int expected_failures = 0;
+
+ for (batch = 0; batch < 2; batch++) {
+ for (j = 0; j < COMP_BURST_SZ/2; j++) {
+ srcs[j] = rte_pktmbuf_alloc(pool);
+ dsts[j] = rte_pktmbuf_alloc(pool);
+
+ if (j == fail_copy[i])
+ expected_failures++;
+ if (rte_ioat_enqueue_copy(dev_id,
+ (j == fail_copy[i] ? (phys_addr_t)NULL :
+ (srcs[j]->buf_iova + srcs[j]->data_off)),
+ dsts[j]->buf_iova + dsts[j]->data_off,
+ length,
+ (uintptr_t)srcs[j],
+ (uintptr_t)dsts[j]) != 1) {
+ PRINT_ERR("Error with rte_ioat_enqueue_copy for buffer %u\n",
+ j);
+ return -1;
+ }
+ }
+ rte_ioat_perform_ops(dev_id);
+ }
+ usleep(100);
+
+ if (rte_ioat_completed_ops(dev_id, COMP_BURST_SZ, status, ¬_ok,
+ (void *)completed_src, (void *)completed_dst) != COMP_BURST_SZ) {
+ PRINT_ERR("Error with rte_ioat_completed_ops\n");
+ rte_rawdev_dump(dev_id, stdout);
+ return -1;
+ }
+ if (not_ok != expected_failures) {
+ unsigned int j;
+ PRINT_ERR("Error, missing expected failed copy, got %u, not %u\n",
+ not_ok, expected_failures);
+ for (j = 0; j < COMP_BURST_SZ; j++)
+ printf("%u ", status[j]);
+ printf("<-- Statuses\n");
+ return -1;
+ }
+ for (j = 0; j < COMP_BURST_SZ; j++) {
+ rte_pktmbuf_free(completed_src[j]);
+ rte_pktmbuf_free(completed_dst[j]);
+ }
+ }
+
+ /* Test gathering status for half batch at a time */
+ for (i = 0; i < RTE_DIM(fail_copy); i++) {
+ uint32_t status[COMP_BURST_SZ] = {0};
+ unsigned int j;
+
+ for (j = 0; j < COMP_BURST_SZ; j++) {
+ srcs[j] = rte_pktmbuf_alloc(pool);
+ dsts[j] = rte_pktmbuf_alloc(pool);
+
+ if (rte_ioat_enqueue_copy(dev_id,
+ (j == fail_copy[i] ? (phys_addr_t)NULL :
+ (srcs[j]->buf_iova + srcs[j]->data_off)),
+ dsts[j]->buf_iova + dsts[j]->data_off,
+ length,
+ (uintptr_t)srcs[j],
+ (uintptr_t)dsts[j]) != 1) {
+ PRINT_ERR("Error with rte_ioat_enqueue_copy for buffer %u\n", j);
+ return -1;
+ }
+ }
+ rte_ioat_perform_ops(dev_id);
+ usleep(100);
+
+ if (rte_ioat_completed_ops(dev_id, COMP_BURST_SZ / 2, status, ¬_ok,
+ (void *)completed_src,
+ (void *)completed_dst) != (COMP_BURST_SZ / 2)) {
+ PRINT_ERR("Error with rte_ioat_completed_ops\n");
+ rte_rawdev_dump(dev_id, stdout);
+ return -1;
+ }
+ if (fail_copy[i] < COMP_BURST_SZ / 2 &&
+ (not_ok != 1 || status[fail_copy[i]] == RTE_IOAT_OP_SUCCESS)) {
+ PRINT_ERR("Missing expected failure in first half-batch\n");
+ rte_rawdev_dump(dev_id, stdout);
+ return -1;
+ }
+ if (rte_ioat_completed_ops(dev_id, COMP_BURST_SZ / 2, status, ¬_ok,
+ (void *)&completed_src[COMP_BURST_SZ / 2],
+ (void *)&completed_dst[COMP_BURST_SZ / 2]) != (COMP_BURST_SZ / 2)) {
+ PRINT_ERR("Error with rte_ioat_completed_ops\n");
+ rte_rawdev_dump(dev_id, stdout);
+ return -1;
+ }
+ if (fail_copy[i] >= COMP_BURST_SZ / 2 && (not_ok != 1 ||
+ status[fail_copy[i] - (COMP_BURST_SZ / 2)]
+ == RTE_IOAT_OP_SUCCESS)) {
+ PRINT_ERR("Missing expected failure in second half-batch\n");
+ rte_rawdev_dump(dev_id, stdout);
+ return -1;
+ }
+
+ for (j = 0; j < COMP_BURST_SZ; j++) {
+ rte_pktmbuf_free(completed_src[j]);
+ rte_pktmbuf_free(completed_dst[j]);
+ }
+ }
+
+ /* Test gathering statuses with fence */
+ for (i = 1; i < RTE_DIM(fail_copy); i++) {
+ uint32_t status[COMP_BURST_SZ * 2] = {0};
+ unsigned int j;
+ uint16_t count;
+
+ for (j = 0; j < COMP_BURST_SZ; j++) {
+ srcs[j] = rte_pktmbuf_alloc(pool);
+ dsts[j] = rte_pktmbuf_alloc(pool);
+
+ /* always fail the first copy */
+ if (rte_ioat_enqueue_copy(dev_id,
+ (j == 0 ? (phys_addr_t)NULL :
+ (srcs[j]->buf_iova + srcs[j]->data_off)),
+ dsts[j]->buf_iova + dsts[j]->data_off,
+ length,
+ (uintptr_t)srcs[j],
+ (uintptr_t)dsts[j]) != 1) {
+ PRINT_ERR("Error with rte_ioat_enqueue_copy for buffer %u\n", j);
+ return -1;
+ }
+ /* put in a fence which will stop any further transactions
+ * because we had a previous failure.
+ */
+ if (j == fail_copy[i])
+ rte_ioat_fence(dev_id);
+ }
+ rte_ioat_perform_ops(dev_id);
+ usleep(100);
+
+ count = rte_ioat_completed_ops(dev_id, COMP_BURST_SZ * 2, status, ¬_ok,
+ (void *)completed_src, (void *)completed_dst);
+ if (count != COMP_BURST_SZ) {
+ PRINT_ERR("Error with rte_ioat_completed_ops, got %u not %u\n",
+ count, COMP_BURST_SZ);
+ for (j = 0; j < count; j++)
+ printf("%u ", status[j]);
+ printf("<-- Statuses\n");
+ return -1;
+ }
+ if (not_ok != COMP_BURST_SZ - fail_copy[i]) {
+ PRINT_ERR("Unexpected failed copy count, got %u, expected %u\n",
+ not_ok, COMP_BURST_SZ - fail_copy[i]);
+ for (j = 0; j < COMP_BURST_SZ; j++)
+ printf("%u ", status[j]);
+ printf("<-- Statuses\n");
+ return -1;
+ }
+ if (status[0] == RTE_IOAT_OP_SUCCESS || status[0] == RTE_IOAT_OP_SKIPPED) {
+ PRINT_ERR("Error, op 0 unexpectedly did not fail.\n");
+ return -1;
+ }
+ for (j = 1; j <= fail_copy[i]; j++) {
+ if (status[j] != RTE_IOAT_OP_SUCCESS) {
+ PRINT_ERR("Error, op %u unexpectedly failed\n", j);
+ return -1;
+ }
+ }
+ for (j = fail_copy[i] + 1; j < COMP_BURST_SZ; j++) {
+ if (status[j] != RTE_IOAT_OP_SKIPPED) {
+ PRINT_ERR("Error, all descriptors after fence should be invalid\n");
+ return -1;
+ }
+ }
+ for (j = 0; j < COMP_BURST_SZ; j++) {
+ rte_pktmbuf_free(completed_src[j]);
+ rte_pktmbuf_free(completed_dst[j]);
+ }
+ }
+
+ return 0;
+}
+
int
ioat_rawdev_test(uint16_t dev_id)
{
#define IOAT_TEST_RINGSIZE 512
+ const struct rte_idxd_rawdev *idxd =
+ (struct rte_idxd_rawdev *)rte_rawdevs[dev_id].dev_private;
+ const enum rte_ioat_dev_type ioat_type = idxd->type;
struct rte_ioat_rawdev_config p = { .ring_size = -1 };
struct rte_rawdev_info info = { .dev_private = &p };
struct rte_rawdev_xstats_name *snames = NULL;
@@ -452,6 +701,15 @@ ioat_rawdev_test(uint16_t dev_id)
if (test_burst_capacity(dev_id) != 0)
goto err;
+ /* only DSA devices report address errors, and we can only use null pointers
+ * to generate those errors when DPDK is in VA mode.
+ */
+ if (rte_eal_iova_mode() == RTE_IOVA_VA && ioat_type == RTE_IDXD_DEV) {
+ printf("Running Completions Status Test\n");
+ if (test_completion_status(dev_id) != 0)
+ goto err;
+ }
+
rte_rawdev_stop(dev_id);
if (rte_rawdev_xstats_reset(dev_id, NULL, 0) != 0) {
PRINT_ERR("Error resetting xstat values\n");
diff --git a/drivers/raw/ioat/rte_idxd_rawdev_fns.h b/drivers/raw/ioat/rte_idxd_rawdev_fns.h
index 41f0ad6e99..ee011e5992 100644
--- a/drivers/raw/ioat/rte_idxd_rawdev_fns.h
+++ b/drivers/raw/ioat/rte_idxd_rawdev_fns.h
@@ -104,8 +104,17 @@ struct rte_idxd_rawdev {
struct rte_idxd_hw_desc *desc_ring;
struct rte_idxd_user_hdl *hdl_ring;
+ /* flags to indicate handle validity. Kept separate from ring, to avoid
+ * using 8 bytes per flag. Upper 8 bits holds error code if any.
+ */
+ uint16_t *hdl_ring_flags;
};
+#define RTE_IDXD_HDL_NORMAL 0
+#define RTE_IDXD_HDL_INVALID (1 << 0) /* no handle stored for this element */
+#define RTE_IDXD_HDL_OP_FAILED (1 << 1) /* return failure for this one */
+#define RTE_IDXD_HDL_OP_SKIPPED (1 << 2) /* this op was skipped */
+
static __rte_always_inline uint16_t
__idxd_burst_capacity(int dev_id)
{
@@ -124,8 +133,10 @@ __idxd_burst_capacity(int dev_id)
write_idx += idxd->desc_ring_mask + 1;
used_space = write_idx - idxd->hdls_read;
- /* Return amount of free space in the descriptor ring */
- return idxd->desc_ring_mask - used_space;
+ /* Return amount of free space in the descriptor ring
+ * subtract 1 for space for batch descriptor and 1 for possible null desc
+ */
+ return idxd->desc_ring_mask - used_space - 2;
}
static __rte_always_inline rte_iova_t
@@ -145,23 +156,28 @@ __idxd_write_desc(int dev_id,
struct rte_idxd_rawdev *idxd =
(struct rte_idxd_rawdev *)rte_rawdevs[dev_id].dev_private;
uint16_t write_idx = idxd->batch_start + idxd->batch_size;
+ uint16_t mask = idxd->desc_ring_mask;
/* first check batch ring space then desc ring space */
if ((idxd->batch_idx_read == 0 && idxd->batch_idx_write == idxd->max_batches) ||
idxd->batch_idx_write + 1 == idxd->batch_idx_read)
goto failed;
- if (((write_idx + 1) & idxd->desc_ring_mask) == idxd->hdls_read)
+ /* for descriptor ring, we always need a slot for batch completion */
+ if (((write_idx + 2) & mask) == idxd->hdls_read)
goto failed;
/* write desc and handle. Note, descriptors don't wrap */
idxd->desc_ring[write_idx].pasid = 0;
idxd->desc_ring[write_idx].op_flags = op_flags | IDXD_FLAG_COMPLETION_ADDR_VALID;
- idxd->desc_ring[write_idx].completion = __desc_idx_to_iova(idxd, write_idx);
+ idxd->desc_ring[write_idx].completion = __desc_idx_to_iova(idxd, write_idx & mask);
idxd->desc_ring[write_idx].src = src;
idxd->desc_ring[write_idx].dst = dst;
idxd->desc_ring[write_idx].size = size;
- idxd->hdl_ring[write_idx & idxd->desc_ring_mask] = *hdl;
+ if (hdl == NULL)
+ idxd->hdl_ring_flags[write_idx & mask] = RTE_IDXD_HDL_INVALID;
+ else
+ idxd->hdl_ring[write_idx & mask] = *hdl;
idxd->batch_size++;
idxd->xstats.enqueued++;
@@ -203,9 +219,8 @@ __idxd_enqueue_copy(int dev_id, rte_iova_t src, rte_iova_t dst,
static __rte_always_inline int
__idxd_fence(int dev_id)
{
- static const struct rte_idxd_user_hdl null_hdl;
/* only op field needs filling - zero src, dst and length */
- return __idxd_write_desc(dev_id, IDXD_FLAG_FENCE, 0, 0, 0, &null_hdl);
+ return __idxd_write_desc(dev_id, IDXD_FLAG_FENCE, 0, 0, 0, NULL);
}
static __rte_always_inline void
@@ -222,42 +237,37 @@ __idxd_perform_ops(int dev_id)
{
struct rte_idxd_rawdev *idxd =
(struct rte_idxd_rawdev *)rte_rawdevs[dev_id].dev_private;
- /* write completion to last desc in the batch */
- uint16_t comp_idx = idxd->batch_start + idxd->batch_size - 1;
- if (comp_idx > idxd->desc_ring_mask) {
- comp_idx &= idxd->desc_ring_mask;
- *((uint64_t *)&idxd->desc_ring[comp_idx]) = 0; /* zero start of desc */
- }
+
+ if (!idxd->cfg.no_prefetch_completions)
+ rte_prefetch1(&idxd->desc_ring[idxd->batch_idx_ring[idxd->batch_idx_read]]);
if (idxd->batch_size == 0)
return 0;
- _mm_sfence(); /* fence before writing desc to device */
- if (idxd->batch_size > 1) {
- struct rte_idxd_hw_desc batch_desc = {
- .op_flags = (idxd_op_batch << IDXD_CMD_OP_SHIFT) |
- IDXD_FLAG_COMPLETION_ADDR_VALID |
- IDXD_FLAG_REQUEST_COMPLETION,
- .desc_addr = __desc_idx_to_iova(idxd, idxd->batch_start),
- .completion = __desc_idx_to_iova(idxd, comp_idx),
- .size = idxd->batch_size,
- };
-
- __idxd_movdir64b(idxd->portal, &batch_desc);
- } else {
- /* special case batch size of 1, as not allowed by HW */
- /* comp_idx == batch_start */
- struct rte_idxd_hw_desc *desc = &idxd->desc_ring[comp_idx];
- desc->op_flags |= IDXD_FLAG_COMPLETION_ADDR_VALID |
- IDXD_FLAG_REQUEST_COMPLETION;
- desc->completion = __desc_idx_to_iova(idxd, comp_idx);
-
- __idxd_movdir64b(idxd->portal, desc);
- }
+ if (idxd->batch_size == 1)
+ /* use a fence as a null descriptor, so batch_size >= 2 */
+ if (__idxd_fence(dev_id) != 1)
+ return -1;
+
+ /* write completion beyond last desc in the batch */
+ uint16_t comp_idx = (idxd->batch_start + idxd->batch_size) & idxd->desc_ring_mask;
+ *((uint64_t *)&idxd->desc_ring[comp_idx]) = 0; /* zero start of desc */
+ idxd->hdl_ring_flags[comp_idx] = RTE_IDXD_HDL_INVALID;
+
+ const struct rte_idxd_hw_desc batch_desc = {
+ .op_flags = (idxd_op_batch << IDXD_CMD_OP_SHIFT) |
+ IDXD_FLAG_COMPLETION_ADDR_VALID |
+ IDXD_FLAG_REQUEST_COMPLETION,
+ .desc_addr = __desc_idx_to_iova(idxd, idxd->batch_start),
+ .completion = __desc_idx_to_iova(idxd, comp_idx),
+ .size = idxd->batch_size,
+ };
+ _mm_sfence(); /* fence before writing desc to device */
+ __idxd_movdir64b(idxd->portal, &batch_desc);
idxd->xstats.started += idxd->batch_size;
- idxd->batch_start += idxd->batch_size;
+ idxd->batch_start += idxd->batch_size + 1;
idxd->batch_start &= idxd->desc_ring_mask;
idxd->batch_size = 0;
@@ -269,7 +279,7 @@ __idxd_perform_ops(int dev_id)
}
static __rte_always_inline int
-__idxd_completed_ops(int dev_id, uint8_t max_ops,
+__idxd_completed_ops(int dev_id, uint8_t max_ops, uint32_t *status, uint8_t *num_unsuccessful,
uintptr_t *src_hdls, uintptr_t *dst_hdls)
{
struct rte_idxd_rawdev *idxd =
@@ -280,8 +290,37 @@ __idxd_completed_ops(int dev_id, uint8_t max_ops,
uint16_t idx_to_chk = idxd->batch_idx_ring[idxd->batch_idx_read];
volatile struct rte_idxd_completion *comp_to_chk =
(struct rte_idxd_completion *)&idxd->desc_ring[idx_to_chk];
- if (comp_to_chk->status == 0)
+ uint8_t status = comp_to_chk->status;
+ if (status == 0)
break;
+ comp_to_chk->status = 0;
+ if (unlikely(status > 1)) {
+ /* error occurred somewhere in batch, start where last checked */
+ uint16_t desc_count = comp_to_chk->completed_size;
+ uint16_t batch_start = idxd->hdls_avail;
+ uint16_t batch_end = idx_to_chk;
+
+ if (batch_start > batch_end)
+ batch_end += idxd->desc_ring_mask + 1;
+ /* go through each batch entry and see status */
+ for (n = 0; n < desc_count; n++) {
+ uint16_t idx = (batch_start + n) & idxd->desc_ring_mask;
+ volatile struct rte_idxd_completion *comp =
+ (struct rte_idxd_completion *)&idxd->desc_ring[idx];
+ if (comp->status != 0 &&
+ idxd->hdl_ring_flags[idx] == RTE_IDXD_HDL_NORMAL) {
+ idxd->hdl_ring_flags[idx] = RTE_IDXD_HDL_OP_FAILED;
+ idxd->hdl_ring_flags[idx] |= (comp->status << 8);
+ comp->status = 0; /* clear error for next time */
+ }
+ }
+ /* if batch is incomplete, mark rest as skipped */
+ for ( ; n < batch_end - batch_start; n++) {
+ uint16_t idx = (batch_start + n) & idxd->desc_ring_mask;
+ if (idxd->hdl_ring_flags[idx] == RTE_IDXD_HDL_NORMAL)
+ idxd->hdl_ring_flags[idx] = RTE_IDXD_HDL_OP_SKIPPED;
+ }
+ }
/* avail points to one after the last one written */
idxd->hdls_avail = (idx_to_chk + 1) & idxd->desc_ring_mask;
idxd->batch_idx_read++;
@@ -289,7 +328,7 @@ __idxd_completed_ops(int dev_id, uint8_t max_ops,
idxd->batch_idx_read = 0;
}
- if (idxd->cfg.hdls_disable) {
+ if (idxd->cfg.hdls_disable && status == NULL) {
n = (idxd->hdls_avail < idxd->hdls_read) ?
(idxd->hdls_avail + idxd->desc_ring_mask + 1 - idxd->hdls_read) :
(idxd->hdls_avail - idxd->hdls_read);
@@ -297,10 +336,36 @@ __idxd_completed_ops(int dev_id, uint8_t max_ops,
goto out;
}
- for (n = 0, h_idx = idxd->hdls_read;
- n < max_ops && h_idx != idxd->hdls_avail; n++) {
- src_hdls[n] = idxd->hdl_ring[h_idx].src;
- dst_hdls[n] = idxd->hdl_ring[h_idx].dst;
+ n = 0;
+ h_idx = idxd->hdls_read;
+ while (h_idx != idxd->hdls_avail) {
+ uint16_t flag = idxd->hdl_ring_flags[h_idx];
+ if (flag != RTE_IDXD_HDL_INVALID) {
+ if (!idxd->cfg.hdls_disable) {
+ src_hdls[n] = idxd->hdl_ring[h_idx].src;
+ dst_hdls[n] = idxd->hdl_ring[h_idx].dst;
+ }
+ if (unlikely(flag != RTE_IDXD_HDL_NORMAL)) {
+ if (status != NULL)
+ status[n] = flag == RTE_IDXD_HDL_OP_SKIPPED ?
+ RTE_IOAT_OP_SKIPPED :
+ /* failure case, return err code */
+ idxd->hdl_ring_flags[h_idx] >> 8;
+ if (num_unsuccessful != NULL)
+ *num_unsuccessful += 1;
+ }
+ n++;
+ }
+ idxd->hdl_ring_flags[h_idx] = RTE_IDXD_HDL_NORMAL;
+ if (++h_idx > idxd->desc_ring_mask)
+ h_idx = 0;
+ if (n >= max_ops)
+ break;
+ }
+
+ /* skip over any remaining blank elements, e.g. batch completion */
+ while (idxd->hdl_ring_flags[h_idx] == RTE_IDXD_HDL_INVALID && h_idx != idxd->hdls_avail) {
+ idxd->hdl_ring_flags[h_idx] = RTE_IDXD_HDL_NORMAL;
if (++h_idx > idxd->desc_ring_mask)
h_idx = 0;
}
diff --git a/drivers/raw/ioat/rte_ioat_rawdev.h b/drivers/raw/ioat/rte_ioat_rawdev.h
index e5a22a0799..6cc1560a64 100644
--- a/drivers/raw/ioat/rte_ioat_rawdev.h
+++ b/drivers/raw/ioat/rte_ioat_rawdev.h
@@ -35,6 +35,10 @@ extern "C" {
struct rte_ioat_rawdev_config {
unsigned short ring_size; /**< size of job submission descriptor ring */
bool hdls_disable; /**< if set, ignore user-supplied handle params */
+ /** set "no_prefetch_completions", if polling completions on separate core
+ * from the core submitting the jobs
+ */
+ bool no_prefetch_completions;
};
/**
@@ -131,40 +135,73 @@ static inline int
__rte_experimental
rte_ioat_perform_ops(int dev_id);
+/*
+ * Status codes for operations.
+ */
+#define RTE_IOAT_OP_SUCCESS 0 /**< Operation completed successfully */
+#define RTE_IOAT_OP_SKIPPED 1 /**< Operation was not attempted (Earlier fenced op failed) */
+/* Values >1 indicate a failure condition */
+/* Error codes taken from Intel(R) Data Streaming Accelerator Architecture
+ * Specification, section 5.7
+ */
+#define RTE_IOAT_OP_ADDRESS_ERR 0x03 /**< Page fault or invalid address */
+#define RTE_IOAT_OP_INVALID_LEN 0x13 /**< Invalid/too big length field passed */
+#define RTE_IOAT_OP_OVERLAPPING_BUFS 0x16 /**< Overlapping buffers error */
+
+
/**
* Returns details of operations that have been completed
*
+ * The status of each operation is returned in the status array parameter.
* If the hdls_disable option was not set when the device was configured,
* the function will return to the caller the user-provided "handles" for
* the copy operations which have been completed by the hardware, and not
* already returned by a previous call to this API.
* If the hdls_disable option for the device was set on configure, the
- * max_copies, src_hdls and dst_hdls parameters will be ignored, and the
+ * src_hdls and dst_hdls parameters will be ignored, and the
* function returns the number of newly-completed operations.
+ * If status is also NULL, then max_copies parameter is also ignored and the
+ * function returns a count of the number of newly-completed operations.
*
* @param dev_id
* The rawdev device id of the ioat instance
* @param max_copies
- * The number of entries which can fit in the src_hdls and dst_hdls
+ * The number of entries which can fit in the status, src_hdls and dst_hdls
* arrays, i.e. max number of completed operations to report.
* NOTE: If hdls_disable configuration option for the device is set, this
- * parameter is ignored.
+ * parameter applies only to the "status" array if specified
+ * @param status
+ * Array to hold the status of each completed operation. Array should be
+ * set to zeros on input, as the driver will only write error status values.
+ * A value of 1 implies an operation was not attempted, and any other non-zero
+ * value indicates operation failure.
+ * Parameter may be NULL if no status value checking is required.
+ * @param num_unsuccessful
+ * Returns the number of elements in status where the value is non-zero,
+ * i.e. the operation either failed or was not attempted due to an earlier
+ * failure. If this value is returned as zero (the expected case), the
+ * status array will not have been modified by the function and need not be
+ * checked by software
* @param src_hdls
* Array to hold the source handle parameters of the completed ops.
* NOTE: If hdls_disable configuration option for the device is set, this
- * parameter is ignored.
+ * parameter is ignored, and may be NULL
* @param dst_hdls
* Array to hold the destination handle parameters of the completed ops.
* NOTE: If hdls_disable configuration option for the device is set, this
- * parameter is ignored.
+ * parameter is ignored, and may be NULL
* @return
- * -1 on error, with rte_errno set appropriately.
- * Otherwise number of completed operations i.e. number of entries written
- * to the src_hdls and dst_hdls array parameters.
+ * -1 on device error, with rte_errno set appropriately and parameters
+ * unmodified.
+ * Otherwise number of returned operations i.e. number of valid entries
+ * in the status, src_hdls and dst_hdls array parameters. If status is NULL,
+ * and the hdls_disable config option is set, this value may be greater than
+ * max_copies parameter.
*/
static inline int
__rte_experimental
rte_ioat_completed_ops(int dev_id, uint8_t max_copies,
+ uint32_t *status, uint8_t *num_unsuccessful,
uintptr_t *src_hdls, uintptr_t *dst_hdls);
/* include the implementation details from a separate file */
diff --git a/drivers/raw/ioat/rte_ioat_rawdev_fns.h b/drivers/raw/ioat/rte_ioat_rawdev_fns.h
index 92ccdd03b9..9b8a9fa88e 100644
--- a/drivers/raw/ioat/rte_ioat_rawdev_fns.h
+++ b/drivers/raw/ioat/rte_ioat_rawdev_fns.h
@@ -334,16 +334,22 @@ rte_ioat_perform_ops(int dev_id)
static inline int
rte_ioat_completed_ops(int dev_id, uint8_t max_copies,
+ uint32_t *status, uint8_t *num_unsuccessful,
uintptr_t *src_hdls, uintptr_t *dst_hdls)
{
enum rte_ioat_dev_type *type =
(enum rte_ioat_dev_type *)rte_rawdevs[dev_id].dev_private;
+ uint8_t tmp; /* used so functions don't need to check for null parameter */
+
+ if (num_unsuccessful == NULL)
+ num_unsuccessful = &tmp;
+
+ *num_unsuccessful = 0;
if (*type == RTE_IDXD_DEV)
- return __idxd_completed_ops(dev_id, max_copies,
+ return __idxd_completed_ops(dev_id, max_copies, status, num_unsuccessful,
src_hdls, dst_hdls);
else
- return __ioat_completed_ops(dev_id, max_copies,
- src_hdls, dst_hdls);
+ return __ioat_completed_ops(dev_id, max_copies, src_hdls, dst_hdls);
}
static inline void
@@ -355,7 +361,8 @@ __rte_deprecated_msg("use rte_ioat_completed_ops() instead")
rte_ioat_completed_copies(int dev_id, uint8_t max_copies,
uintptr_t *src_hdls, uintptr_t *dst_hdls)
{
- return rte_ioat_completed_ops(dev_id, max_copies, src_hdls, dst_hdls);
+ return rte_ioat_completed_ops(dev_id, max_copies, NULL, NULL,
+ src_hdls, dst_hdls);
}
#endif /* _RTE_IOAT_RAWDEV_FNS_H_ */
diff --git a/examples/ioat/ioatfwd.c b/examples/ioat/ioatfwd.c
index 845301a6db..2e377e2d4b 100644
--- a/examples/ioat/ioatfwd.c
+++ b/examples/ioat/ioatfwd.c
@@ -447,12 +447,15 @@ ioat_tx_port(struct rxtx_port_config *tx_config)
for (i = 0; i < tx_config->nb_queues; i++) {
if (copy_mode == COPY_MODE_IOAT_NUM) {
- /* Deque the mbufs from IOAT device. */
+ /* Dequeue the mbufs from IOAT device. Since all memory
+ * is DPDK pinned memory and therefore all addresses should
+ * be valid, we don't check for copy errors
+ */
nb_dq = rte_ioat_completed_ops(
- tx_config->ioat_ids[i], MAX_PKT_BURST,
+ tx_config->ioat_ids[i], MAX_PKT_BURST, NULL, NULL,
(void *)mbufs_src, (void *)mbufs_dst);
} else {
- /* Deque the mbufs from rx_to_tx_ring. */
+ /* Dequeue the mbufs from rx_to_tx_ring. */
nb_dq = rte_ring_dequeue_burst(
tx_config->rx_to_tx_ring, (void *)mbufs_dst,
MAX_PKT_BURST, NULL);
@@ -725,7 +728,10 @@ check_link_status(uint32_t port_mask)
static void
configure_rawdev_queue(uint32_t dev_id)
{
- struct rte_ioat_rawdev_config dev_config = { .ring_size = ring_size };
+ struct rte_ioat_rawdev_config dev_config = {
+ .ring_size = ring_size,
+ .no_prefetch_completions = (cfg.nb_lcores > 1),
+ };
struct rte_rawdev_info info = { .dev_private = &dev_config };
if (rte_rawdev_configure(dev_id, &info, sizeof(dev_config)) != 0) {
diff --git a/examples/vhost/ioat.c b/examples/vhost/ioat.c
index 60b73be936..efdd3f6f76 100644
--- a/examples/vhost/ioat.c
+++ b/examples/vhost/ioat.c
@@ -183,7 +183,7 @@ ioat_check_completed_copies_cb(int vid, uint16_t queue_id,
uint16_t dev_id = dma_bind[vid].dmas[queue_id * 2
+ VIRTIO_RXQ].dev_id;
- n_seg = rte_ioat_completed_ops(dev_id, 255, dump, dump);
+ n_seg = rte_ioat_completed_ops(dev_id, 255, NULL, NULL, dump, dump);
if (n_seg < 0) {
RTE_LOG(ERR,
VHOST_DATA,
--
2.30.2
^ permalink raw reply [relevance 2%]
* Re: [dpdk-dev] Use WFE for spinlock and ring
2021-04-29 15:20 0% ` Thomas Monjalon
@ 2021-04-30 9:16 0% ` Bruce Richardson
2021-04-30 13:41 0% ` Honnappa Nagarahalli
0 siblings, 1 reply; 200+ results
From: Bruce Richardson @ 2021-04-30 9:16 UTC (permalink / raw)
To: Thomas Monjalon
Cc: Ruifeng Wang, David Marchand, dev, jerinj, nd, Honnappa Nagarahalli
On Thu, Apr 29, 2021 at 05:20:05PM +0200, Thomas Monjalon wrote:
> 29/04/2021 16:28, Ruifeng Wang:
> > From: Thomas Monjalon <thomas@monjalon.net>
> > > 28/04/2021 11:30, Ruifeng Wang:
> > > > From: David Marchand <david.marchand@redhat.com>
> > > > > On Sun, Apr 25, 2021 at 7:57 AM Ruifeng Wang <ruifeng.wang@arm.com>
> > > > > wrote:
> > > > > >
> > > > > > The rte_wait_until_equal_xxx APIs abstract the functionality of
> > > > > > 'polling for a memory location to become equal to a given value'[1].
> > > > > >
> > > > > > Use the API for the rte spinlock and ring implementations.
> > > > > > With the wait until equal APIs being stable, changes will not impact ABI.
> > > > >
> > > > > Afaics, there is no ARM target with WFE enabled and we lost ability
> > > > > to enable WFE support with removal of the make build system.
> > > >
> > > > WFE can be enabled with direct meson file change.
> > > > WFE is not intended to be enabled by default. It can be enabled based
> > > > on benchmarking result on hardware.
> > > > >
> > > > > $ git grep RTE_ARM_USE_WFE
> > > > > config/arm/meson.build: ['RTE_ARM_USE_WFE', false],
> > > > > lib/eal/arm/include/rte_pause_64.h:#ifdef RTE_ARM_USE_WFE
> > > > >
> > > > > How did you enable WFE to test this series?
> > > >
> > > > I modified meson file to test.
> > > > Tests were also done with WFE disabled to make sure no degradation with
> > > generic implementation.
> > >
> > > I don't understand the usage.
> > > Which platform should use it?
> >
> > Platforms that implement WFE semantic (e.g. N1) can use.
> > The user can enable this feature for power efficiency purpose. But there is something to
> > note as described in commit message 1be7855d77 when the API was introduced.
> >
> > > Should it be a compile-time option?
> >
> > Yes, it should be a compile-time option.
> > It can be configured via c_args meson option?
>
> +Cc Bruce for discussing how to enable such feature.
>
> The problem with c_args is that the application has no way to know.
>
Agree about c_args not being a great choice. Why does this need to be a
compile-time option? Can runtime support not be detected in some manner?
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH v2 4/4] vhost: fix offload flags in Rx path
2021-04-29 20:21 5% ` David Marchand
@ 2021-04-30 8:38 3% ` Maxime Coquelin
0 siblings, 0 replies; 200+ results
From: Maxime Coquelin @ 2021-04-30 8:38 UTC (permalink / raw)
To: David Marchand
Cc: dev, Olivier Matz, Flavio Leitner, Ilya Maximets, Chenbo Xia,
Stokes, Ian
Hi David,
On 4/29/21 10:21 PM, David Marchand wrote:
> On Thu, Apr 29, 2021 at 3:31 PM Maxime Coquelin
> <maxime.coquelin@redhat.com> wrote:
>> On 4/29/21 3:30 PM, Maxime Coquelin wrote:
>>>> The vhost library current configures Tx offloading (PKT_TX_*) on any
>>>> packet received from a guest virtio device which asks for some offloading.
>>>>
>>>> This is problematic, as Tx offloading is something that the application
>>>> must ask for: the application needs to configure devices
>>>> to support every used offloads (ip, tcp checksumming, tso..), and the
>>>> various l2/l3/l4 lengths must be set following any processing that
>>>> happened in the application itself.
>>>>
>>>> On the other hand, the received packets are not marked wrt current
>>>> packet l3/l4 checksumming info.
>>>>
>>>> Copy virtio rx processing to fix those offload flags but accepting
>>>> VIRTIO_NET_HDR_GSO_ECN and VIRTIO_NET_HDR_GSO_UDP too.
>>>>
>>>> The vhost example has been updated accordingly: TSO is applied to any
>>>> packet marked LRO.
>>>>
>>>> Fixes: 859b480d5afd ("vhost: add guest offload setting")
>>
>> As I understand it, this change kind of break the ABI, but it is
>> actually fixing a misuse of the mbuf API, so I think we should
>> take this patch.
>
> Indeed, this breaks the v21 ABI.
>
> But the only usecase I can think of is an application using TSO /
> checksum offloads *only* for traffic coming from vhost.
> I say *only* for traffic coming from vhost, because to have this
> application do TSO / checksum offloaing for traffic coming from a
> physical port, it would comply with the mbuf API and set the PKT_TX_*
> flags.
>
> Apart from the example/vhost, I am not sure there is such an
> application that only does v2v or v2p but _not_ p2v TSO / checksum
> offloading.
> (Note: I am unable to use this example... it seems unhappy with the
> mlx5 port I use => FPE because this driver does not support vmdq o_O)
>
>
> I see three options:
> - fix the vhost library and break the ABI that only works in an
> example (this current patch),
> - maintain the v21 ABI
> * using symbol versioning, this adds no branch, recompiled
> application use the new ABI, this can't be backported to 20.11,
> * keeping the current behavior by default, but introducing a new
> flag that an application would pass to rte_vhost_driver_register().
> This new flag triggers this current patch behavior but it would add an
> additional branch per packets bulk in vhost dequeue path. This *could*
> be backported to 20.11.
The flag option seems to be the best option, as it will not break ABI so
applications we don't know about using Vhost offloads won't be impacted
and can add support for the behaviour in a smooth way.
The hardest part with this solution is to find a proper name for that
flag...
Thanks,
Maxime
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [PATCH v6 01/10] eal: add thread id and simple thread functions
2021-04-29 16:28 0% ` Dmitry Kozlyuk
@ 2021-04-30 6:37 0% ` Narcisa Ana Maria Vasile
0 siblings, 0 replies; 200+ results
From: Narcisa Ana Maria Vasile @ 2021-04-30 6:37 UTC (permalink / raw)
To: Dmitry Kozlyuk
Cc: Kinsella, Ray, Thomas Monjalon, dev, khot, navasile, dmitrym,
roretzla, talshn, ocardona, bruce.richardson, david.marchand,
pallavi.kadam
On Thu, Apr 29, 2021 at 07:28:26PM +0300, Dmitry Kozlyuk wrote:
> 2021-04-29 13:05 (UTC+0100), Kinsella, Ray:
> > On 29/04/2021 08:44, Thomas Monjalon wrote:
> > > 29/04/2021 02:50, Dmitry Kozlyuk:
> > >> 2021-04-02 18:38 (UTC-0700), Narcisa Ana Maria Vasile:
> > >>> --- /dev/null
> > >>> +++ b/lib/librte_eal/windows/include/rte_windows_thread_types.h
> > >>> @@ -0,0 +1,12 @@
> > >>> +/* SPDX-License-Identifier: BSD-3-Clause
> > >>> + * Copyright(c) 2021 Microsoft Corporation
> > >>> + */
> > >>> +
> > >>> +#ifndef _RTE_THREAD_TYPES_H_
> > >>> +#define _RTE_THREAD_TYPES_H_
> > >>> +
> > >>> +#include <rte_windows.h>
> > >>> +
> > >>> +typedef DWORD rte_thread_t;
> > >>> +
> > >>> +#endif /* _RTE_THREAD_TYPES_H_ */
> > >>
> > >> pthread_t type in pthreads-win32 and winpthread is not 32 bit.
> > >> DPDK will have different ABI depending on a threading backend used.
> > >> Apps must know it at build time then. How do they discover it?
> > >> This is worth a warning in commit log and docs.
> > >
> > > Not sure this is an acceptable behaviour.
> > > In my opinion, ABI should not vary.
> > > +Cc Ray
> > >
> >
> > So pthread_t on Win32 should just map to the HANDLE datatype.
> > Which if memory serves is in fact a DWORD on Win32.
>
> DWORD = uint32_t, HANDLE = void*, which are of different size on x64.
> I suggest an opaque 64-bit value to fit pthread_t from MinGW's winpthread.
> Only pthreads-win32 has a bigger pthread_t, but we don't have to support it.
>
> > So I suspect that pthreads indirection is probably be just providing a circuitous route to end up in the same place, a HANDLE
> >
> > IMHO
> > To absolutely guarantee no ABI change, we ought to be passing back void * not rte_thread_t.
>
> Yes. Only I'd use a type-safe version:
>
> typedef struct rte_thread_tag {
> void *opaque; /* or uintptr_t per Tyler's suggestion */
> } rte_thread_t;
I agree we need a big enough value to fit different identifiers.
However, just to clarify, on Windows, there are two distinct thread-related identifiers:
thread id (DWORD) and thread HANDLE (void*).
In this API implementation I've used the rte_thread_t as the DWORD thread identifier, as the HANDLE
can be obtain from this DWORD using the OpenThread() function.
I will implement an opaque value that will be assigned the thread id (not the HANDLE) in this API.
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH v2 4/4] vhost: fix offload flags in Rx path
2021-04-29 13:31 3% ` Maxime Coquelin
@ 2021-04-29 20:21 5% ` David Marchand
2021-04-30 8:38 3% ` Maxime Coquelin
0 siblings, 1 reply; 200+ results
From: David Marchand @ 2021-04-29 20:21 UTC (permalink / raw)
To: Maxime Coquelin
Cc: dev, Olivier Matz, Flavio Leitner, Ilya Maximets, Chenbo Xia,
Stokes, Ian
On Thu, Apr 29, 2021 at 3:31 PM Maxime Coquelin
<maxime.coquelin@redhat.com> wrote:
> On 4/29/21 3:30 PM, Maxime Coquelin wrote:
> >> The vhost library current configures Tx offloading (PKT_TX_*) on any
> >> packet received from a guest virtio device which asks for some offloading.
> >>
> >> This is problematic, as Tx offloading is something that the application
> >> must ask for: the application needs to configure devices
> >> to support every used offloads (ip, tcp checksumming, tso..), and the
> >> various l2/l3/l4 lengths must be set following any processing that
> >> happened in the application itself.
> >>
> >> On the other hand, the received packets are not marked wrt current
> >> packet l3/l4 checksumming info.
> >>
> >> Copy virtio rx processing to fix those offload flags but accepting
> >> VIRTIO_NET_HDR_GSO_ECN and VIRTIO_NET_HDR_GSO_UDP too.
> >>
> >> The vhost example has been updated accordingly: TSO is applied to any
> >> packet marked LRO.
> >>
> >> Fixes: 859b480d5afd ("vhost: add guest offload setting")
>
> As I understand it, this change kind of break the ABI, but it is
> actually fixing a misuse of the mbuf API, so I think we should
> take this patch.
Indeed, this breaks the v21 ABI.
But the only usecase I can think of is an application using TSO /
checksum offloads *only* for traffic coming from vhost.
I say *only* for traffic coming from vhost, because to have this
application do TSO / checksum offloaing for traffic coming from a
physical port, it would comply with the mbuf API and set the PKT_TX_*
flags.
Apart from the example/vhost, I am not sure there is such an
application that only does v2v or v2p but _not_ p2v TSO / checksum
offloading.
(Note: I am unable to use this example... it seems unhappy with the
mlx5 port I use => FPE because this driver does not support vmdq o_O)
I see three options:
- fix the vhost library and break the ABI that only works in an
example (this current patch),
- maintain the v21 ABI
* using symbol versioning, this adds no branch, recompiled
application use the new ABI, this can't be backported to 20.11,
* keeping the current behavior by default, but introducing a new
flag that an application would pass to rte_vhost_driver_register().
This new flag triggers this current patch behavior but it would add an
additional branch per packets bulk in vhost dequeue path. This *could*
be backported to 20.11.
--
David Marchand
^ permalink raw reply [relevance 5%]
* Re: [dpdk-dev] [PATCH v2] ethdev: add sanity checks in control APIs
2021-04-29 17:48 3% ` Tyler Retzlaff
@ 2021-04-29 18:18 0% ` Stephen Hemminger
0 siblings, 0 replies; 200+ results
From: Stephen Hemminger @ 2021-04-29 18:18 UTC (permalink / raw)
To: Tyler Retzlaff
Cc: Min Hu (Connor), dev, ferruh.yigit, thomas, andrew.rybchenko
On Thu, 29 Apr 2021 10:48:34 -0700
Tyler Retzlaff <roretzla@linux.microsoft.com> wrote:
> On Tue, Apr 13, 2021 at 11:22:14AM +0800, Min Hu (Connor) wrote:
> > This patch adds more sanity checks in control path APIs.
> >
> > Fixes: 214ed1acd125 ("ethdev: add iterator to match devargs input")
> > Fixes: 3d98f921fbe9 ("ethdev: unify prefix for static functions and variables")
> > Fixes: 0366137722a0 ("ethdev: check for invalid device name")
> > Fixes: d948f596fee2 ("ethdev: fix port data mismatched in multiple process model")
> > Fixes: 5b7ba31148a8 ("ethdev: add port ownership")
> > Fixes: f8244c6399d9 ("ethdev: increase port id range")
> > Cc: stable@dpdk.org
> >
> > Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
> > ---
>
> this whole patch breaks abi since it returns new errno that were not
> previously documented or returned. even if it is accepted it probably
> should not be backported to stable.
>
> it is entirely conceivable that you can have code that was calling these
> functions and checking for specific return values where the new return
> values will not be handled at all or improperly handled.
>
> you can't just start emitting brand new errors or different errors for
> the same input parameters.
In practice, checking for passing a NULL doesn't add a lot of value.
No program should ever do that, and if it did the crash that happens
when it dereferenced is as good as an assert() or an error return.
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH v2] ethdev: add sanity checks in control APIs
@ 2021-04-29 17:48 3% ` Tyler Retzlaff
2021-04-29 18:18 0% ` Stephen Hemminger
0 siblings, 1 reply; 200+ results
From: Tyler Retzlaff @ 2021-04-29 17:48 UTC (permalink / raw)
To: Min Hu (Connor); +Cc: dev, ferruh.yigit, thomas, andrew.rybchenko
On Tue, Apr 13, 2021 at 11:22:14AM +0800, Min Hu (Connor) wrote:
> This patch adds more sanity checks in control path APIs.
>
> Fixes: 214ed1acd125 ("ethdev: add iterator to match devargs input")
> Fixes: 3d98f921fbe9 ("ethdev: unify prefix for static functions and variables")
> Fixes: 0366137722a0 ("ethdev: check for invalid device name")
> Fixes: d948f596fee2 ("ethdev: fix port data mismatched in multiple process model")
> Fixes: 5b7ba31148a8 ("ethdev: add port ownership")
> Fixes: f8244c6399d9 ("ethdev: increase port id range")
> Cc: stable@dpdk.org
>
> Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
> ---
this whole patch breaks abi since it returns new errno that were not
previously documented or returned. even if it is accepted it probably
should not be backported to stable.
it is entirely conceivable that you can have code that was calling these
functions and checking for specific return values where the new return
values will not be handled at all or improperly handled.
you can't just start emitting brand new errors or different errors for
the same input parameters.
thanks.
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [PATCH v6 01/10] eal: add thread id and simple thread functions
2021-04-29 12:05 3% ` Kinsella, Ray
2021-04-29 16:00 0% ` Tyler Retzlaff
@ 2021-04-29 16:28 0% ` Dmitry Kozlyuk
2021-04-30 6:37 0% ` Narcisa Ana Maria Vasile
1 sibling, 1 reply; 200+ results
From: Dmitry Kozlyuk @ 2021-04-29 16:28 UTC (permalink / raw)
To: Kinsella, Ray
Cc: Thomas Monjalon, Narcisa Ana Maria Vasile, dev, khot, navasile,
dmitrym, roretzla, talshn, ocardona, bruce.richardson,
david.marchand, pallavi.kadam
2021-04-29 13:05 (UTC+0100), Kinsella, Ray:
> On 29/04/2021 08:44, Thomas Monjalon wrote:
> > 29/04/2021 02:50, Dmitry Kozlyuk:
> >> 2021-04-02 18:38 (UTC-0700), Narcisa Ana Maria Vasile:
> >>> --- /dev/null
> >>> +++ b/lib/librte_eal/windows/include/rte_windows_thread_types.h
> >>> @@ -0,0 +1,12 @@
> >>> +/* SPDX-License-Identifier: BSD-3-Clause
> >>> + * Copyright(c) 2021 Microsoft Corporation
> >>> + */
> >>> +
> >>> +#ifndef _RTE_THREAD_TYPES_H_
> >>> +#define _RTE_THREAD_TYPES_H_
> >>> +
> >>> +#include <rte_windows.h>
> >>> +
> >>> +typedef DWORD rte_thread_t;
> >>> +
> >>> +#endif /* _RTE_THREAD_TYPES_H_ */
> >>
> >> pthread_t type in pthreads-win32 and winpthread is not 32 bit.
> >> DPDK will have different ABI depending on a threading backend used.
> >> Apps must know it at build time then. How do they discover it?
> >> This is worth a warning in commit log and docs.
> >
> > Not sure this is an acceptable behaviour.
> > In my opinion, ABI should not vary.
> > +Cc Ray
> >
>
> So pthread_t on Win32 should just map to the HANDLE datatype.
> Which if memory serves is in fact a DWORD on Win32.
DWORD = uint32_t, HANDLE = void*, which are of different size on x64.
I suggest an opaque 64-bit value to fit pthread_t from MinGW's winpthread.
Only pthreads-win32 has a bigger pthread_t, but we don't have to support it.
> So I suspect that pthreads indirection is probably be just providing a circuitous route to end up in the same place, a HANDLE
>
> IMHO
> To absolutely guarantee no ABI change, we ought to be passing back void * not rte_thread_t.
Yes. Only I'd use a type-safe version:
typedef struct rte_thread_tag {
void *opaque; /* or uintptr_t per Tyler's suggestion */
} rte_thread_t;
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH v6 01/10] eal: add thread id and simple thread functions
2021-04-29 12:05 3% ` Kinsella, Ray
@ 2021-04-29 16:00 0% ` Tyler Retzlaff
2021-04-29 16:28 0% ` Dmitry Kozlyuk
1 sibling, 0 replies; 200+ results
From: Tyler Retzlaff @ 2021-04-29 16:00 UTC (permalink / raw)
To: Kinsella, Ray
Cc: Thomas Monjalon, Narcisa Ana Maria Vasile, Dmitry Kozlyuk, dev,
khot, navasile, dmitrym, roretzla, talshn, ocardona,
bruce.richardson, david.marchand, pallavi.kadam
On Thu, Apr 29, 2021 at 01:05:05PM +0100, Kinsella, Ray wrote:
>
>
> On 29/04/2021 08:44, Thomas Monjalon wrote:
> > 29/04/2021 02:50, Dmitry Kozlyuk:
> >> 2021-04-02 18:38 (UTC-0700), Narcisa Ana Maria Vasile:
> >>> --- /dev/null
> >>> +++ b/lib/librte_eal/windows/include/rte_windows_thread_types.h
> >>> @@ -0,0 +1,12 @@
> >>> +/* SPDX-License-Identifier: BSD-3-Clause
> >>> + * Copyright(c) 2021 Microsoft Corporation
> >>> + */
> >>> +
> >>> +#ifndef _RTE_THREAD_TYPES_H_
> >>> +#define _RTE_THREAD_TYPES_H_
> >>> +
> >>> +#include <rte_windows.h>
> >>> +
> >>> +typedef DWORD rte_thread_t;
> >>> +
> >>> +#endif /* _RTE_THREAD_TYPES_H_ */
> >>
> >> pthread_t type in pthreads-win32 and winpthread is not 32 bit.
> >> DPDK will have different ABI depending on a threading backend used.
> >> Apps must know it at build time then. How do they discover it?
> >> This is worth a warning in commit log and docs.
> >
> > Not sure this is an acceptable behaviour.
> > In my opinion, ABI should not vary.
> > +Cc Ray
> >
>
> So pthread_t on Win32 should just map to the HANDLE datatype.
> Which if memory serves is in fact a DWORD on Win32.
> So I suspect that pthreads indirection is probably be just providing a circuitous route to end up in the same place, a HANDLE
>
> IMHO
> To absolutely guarantee no ABI change, we ought to be passing back void * not rte_thread_t.
agreed, the type should be opaque.
but may i suggest uintptr_t instead since void * still leaks implementation detail.
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] Use WFE for spinlock and ring
2021-04-29 14:28 0% ` Ruifeng Wang
@ 2021-04-29 15:20 0% ` Thomas Monjalon
2021-04-30 9:16 0% ` Bruce Richardson
0 siblings, 1 reply; 200+ results
From: Thomas Monjalon @ 2021-04-29 15:20 UTC (permalink / raw)
To: Ruifeng Wang
Cc: David Marchand, dev, jerinj, nd, Honnappa Nagarahalli, bruce.richardson
29/04/2021 16:28, Ruifeng Wang:
> From: Thomas Monjalon <thomas@monjalon.net>
> > 28/04/2021 11:30, Ruifeng Wang:
> > > From: David Marchand <david.marchand@redhat.com>
> > > > On Sun, Apr 25, 2021 at 7:57 AM Ruifeng Wang <ruifeng.wang@arm.com>
> > > > wrote:
> > > > >
> > > > > The rte_wait_until_equal_xxx APIs abstract the functionality of
> > > > > 'polling for a memory location to become equal to a given value'[1].
> > > > >
> > > > > Use the API for the rte spinlock and ring implementations.
> > > > > With the wait until equal APIs being stable, changes will not impact ABI.
> > > >
> > > > Afaics, there is no ARM target with WFE enabled and we lost ability
> > > > to enable WFE support with removal of the make build system.
> > >
> > > WFE can be enabled with direct meson file change.
> > > WFE is not intended to be enabled by default. It can be enabled based
> > > on benchmarking result on hardware.
> > > >
> > > > $ git grep RTE_ARM_USE_WFE
> > > > config/arm/meson.build: ['RTE_ARM_USE_WFE', false],
> > > > lib/eal/arm/include/rte_pause_64.h:#ifdef RTE_ARM_USE_WFE
> > > >
> > > > How did you enable WFE to test this series?
> > >
> > > I modified meson file to test.
> > > Tests were also done with WFE disabled to make sure no degradation with
> > generic implementation.
> >
> > I don't understand the usage.
> > Which platform should use it?
>
> Platforms that implement WFE semantic (e.g. N1) can use.
> The user can enable this feature for power efficiency purpose. But there is something to
> note as described in commit message 1be7855d77 when the API was introduced.
>
> > Should it be a compile-time option?
>
> Yes, it should be a compile-time option.
> It can be configured via c_args meson option?
+Cc Bruce for discussing how to enable such feature.
The problem with c_args is that the application has no way to know.
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] Use WFE for spinlock and ring
2021-04-28 11:13 0% ` Thomas Monjalon
@ 2021-04-29 14:28 0% ` Ruifeng Wang
2021-04-29 15:20 0% ` Thomas Monjalon
0 siblings, 1 reply; 200+ results
From: Ruifeng Wang @ 2021-04-29 14:28 UTC (permalink / raw)
To: thomas; +Cc: David Marchand, dev, jerinj, nd, Honnappa Nagarahalli, nd
> -----Original Message-----
> From: Thomas Monjalon <thomas@monjalon.net>
> Sent: Wednesday, April 28, 2021 7:14 PM
> To: Ruifeng Wang <Ruifeng.Wang@arm.com>
> Cc: David Marchand <david.marchand@redhat.com>; dev <dev@dpdk.org>;
> jerinj@marvell.com; nd <nd@arm.com>; Honnappa Nagarahalli
> <Honnappa.Nagarahalli@arm.com>
> Subject: Re: Use WFE for spinlock and ring
>
> 28/04/2021 11:30, Ruifeng Wang:
> > From: David Marchand <david.marchand@redhat.com>
> > > On Sun, Apr 25, 2021 at 7:57 AM Ruifeng Wang <ruifeng.wang@arm.com>
> > > wrote:
> > > >
> > > > The rte_wait_until_equal_xxx APIs abstract the functionality of
> > > > 'polling for a memory location to become equal to a given value'[1].
> > > >
> > > > Use the API for the rte spinlock and ring implementations.
> > > > With the wait until equal APIs being stable, changes will not impact ABI.
> > >
> > > Afaics, there is no ARM target with WFE enabled and we lost ability
> > > to enable WFE support with removal of the make build system.
> >
> > WFE can be enabled with direct meson file change.
> > WFE is not intended to be enabled by default. It can be enabled based
> > on benchmarking result on hardware.
> > >
> > > $ git grep RTE_ARM_USE_WFE
> > > config/arm/meson.build: ['RTE_ARM_USE_WFE', false],
> > > lib/eal/arm/include/rte_pause_64.h:#ifdef RTE_ARM_USE_WFE
> > >
> > > How did you enable WFE to test this series?
> >
> > I modified meson file to test.
> > Tests were also done with WFE disabled to make sure no degradation with
> generic implementation.
>
> I don't understand the usage.
> Which platform should use it?
Platforms that implement WFE semantic (e.g. N1) can use.
The user can enable this feature for power efficiency purpose. But there is something to
note as described in commit message 1be7855d77 when the API was introduced.
> Should it be a compile-time option?
Yes, it should be a compile-time option.
It can be configured via c_args meson option?
>
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH v2 4/4] vhost: fix offload flags in Rx path
@ 2021-04-29 13:31 3% ` Maxime Coquelin
2021-04-29 20:21 5% ` David Marchand
0 siblings, 1 reply; 200+ results
From: Maxime Coquelin @ 2021-04-29 13:31 UTC (permalink / raw)
To: David Marchand, dev
Cc: olivier.matz, fbl, i.maximets, Chenbo Xia, Jijiang Liu, Stokes, Ian
On 4/29/21 3:30 PM, Maxime Coquelin wrote:
>
>
> On 4/29/21 10:04 AM, David Marchand wrote:
>> The vhost library current configures Tx offloading (PKT_TX_*) on any
>
> s/current/currently/
>
>> packet received from a guest virtio device which asks for some offloading.
>>
>> This is problematic, as Tx offloading is something that the application
>> must ask for: the application needs to configure devices
>> to support every used offloads (ip, tcp checksumming, tso..), and the
>> various l2/l3/l4 lengths must be set following any processing that
>> happened in the application itself.
>>
>> On the other hand, the received packets are not marked wrt current
>> packet l3/l4 checksumming info.
>>
>> Copy virtio rx processing to fix those offload flags but accepting
>> VIRTIO_NET_HDR_GSO_ECN and VIRTIO_NET_HDR_GSO_UDP too.
>>
>> The vhost example has been updated accordingly: TSO is applied to any
>> packet marked LRO.
>>
>> Fixes: 859b480d5afd ("vhost: add guest offload setting")
>>
>> Signed-off-by: David Marchand <david.marchand@redhat.com>
>> ---
>> Changes since v1:
>> - updated vhost example,
>> - restored VIRTIO_NET_HDR_GSO_ECN and VIRTIO_NET_HDR_GSO_UDP support,
>> - restored log on buggy offload request,
>>
>> ---
>> examples/vhost/main.c | 42 +++++++------
>> lib/vhost/virtio_net.c | 139 +++++++++++++++++------------------------
>> 2 files changed, 78 insertions(+), 103 deletions(-)
>
> Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
>
As I understand it, this change kind of break the ABI, but it is
actually fixing a misuse of the mbuf API, so I think we should
take this patch.
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [PATCH v6 01/10] eal: add thread id and simple thread functions
2021-04-29 7:44 3% ` Thomas Monjalon
@ 2021-04-29 12:05 3% ` Kinsella, Ray
2021-04-29 16:00 0% ` Tyler Retzlaff
2021-04-29 16:28 0% ` Dmitry Kozlyuk
0 siblings, 2 replies; 200+ results
From: Kinsella, Ray @ 2021-04-29 12:05 UTC (permalink / raw)
To: Thomas Monjalon, Narcisa Ana Maria Vasile, Dmitry Kozlyuk
Cc: dev, khot, navasile, dmitrym, roretzla, talshn, ocardona,
bruce.richardson, david.marchand, pallavi.kadam
On 29/04/2021 08:44, Thomas Monjalon wrote:
> 29/04/2021 02:50, Dmitry Kozlyuk:
>> 2021-04-02 18:38 (UTC-0700), Narcisa Ana Maria Vasile:
>>> --- /dev/null
>>> +++ b/lib/librte_eal/windows/include/rte_windows_thread_types.h
>>> @@ -0,0 +1,12 @@
>>> +/* SPDX-License-Identifier: BSD-3-Clause
>>> + * Copyright(c) 2021 Microsoft Corporation
>>> + */
>>> +
>>> +#ifndef _RTE_THREAD_TYPES_H_
>>> +#define _RTE_THREAD_TYPES_H_
>>> +
>>> +#include <rte_windows.h>
>>> +
>>> +typedef DWORD rte_thread_t;
>>> +
>>> +#endif /* _RTE_THREAD_TYPES_H_ */
>>
>> pthread_t type in pthreads-win32 and winpthread is not 32 bit.
>> DPDK will have different ABI depending on a threading backend used.
>> Apps must know it at build time then. How do they discover it?
>> This is worth a warning in commit log and docs.
>
> Not sure this is an acceptable behaviour.
> In my opinion, ABI should not vary.
> +Cc Ray
>
So pthread_t on Win32 should just map to the HANDLE datatype.
Which if memory serves is in fact a DWORD on Win32.
So I suspect that pthreads indirection is probably be just providing a circuitous route to end up in the same place, a HANDLE
IMHO
To absolutely guarantee no ABI change, we ought to be passing back void * not rte_thread_t.
#ifdef WIN32
/* The primitives for Windows types */
..
typedef HANDLE apr_os_thread_t; /*becomes pthread_t later*/
..
Ray K
^ permalink raw reply [relevance 3%]
* [dpdk-dev] [PATCH v5 0/1] add new hdr for gtp qfi
@ 2021-04-29 8:10 3% ` Raslan Darawsheh
0 siblings, 0 replies; 200+ results
From: Raslan Darawsheh @ 2021-04-29 8:10 UTC (permalink / raw)
To: dev
Cc: ferruh.yigit, orika, andrew.rybchenko, ivan.malov, ying.a.wang,
olivier.matz, viacheslavo, shirik
This is introducin a new hdr definition of gtp psc
support to match the RFC 38415-g30
v2: introduce new header definition for gtp psc
update commit msg for rte flow item change.
v3: fixed typo in comment
Cc relevant people.
v4: update hdr definition to have hdr suffix.
update variable name to be hdr in the gtp_psc item.
update default max to use the new added hdr.
v5: updated the hdr definition after code review.
dropped the change for rte_flow item psc to avoid ABI breakage
added hdr definition for type0 and type1 psc's
Raslan Darawsheh (1):
ethdev: add new ext hdr for gtp psc
lib/net/rte_gtp.h | 78 +++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 78 insertions(+)
--
2.25.1
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [PATCH v6 01/10] eal: add thread id and simple thread functions
2021-04-29 0:50 3% ` Dmitry Kozlyuk
@ 2021-04-29 7:44 3% ` Thomas Monjalon
2021-04-29 12:05 3% ` Kinsella, Ray
0 siblings, 1 reply; 200+ results
From: Thomas Monjalon @ 2021-04-29 7:44 UTC (permalink / raw)
To: Narcisa Ana Maria Vasile, Dmitry Kozlyuk
Cc: dev, khot, navasile, dmitrym, roretzla, talshn, ocardona,
bruce.richardson, david.marchand, pallavi.kadam, mdr
29/04/2021 02:50, Dmitry Kozlyuk:
> 2021-04-02 18:38 (UTC-0700), Narcisa Ana Maria Vasile:
> > --- /dev/null
> > +++ b/lib/librte_eal/windows/include/rte_windows_thread_types.h
> > @@ -0,0 +1,12 @@
> > +/* SPDX-License-Identifier: BSD-3-Clause
> > + * Copyright(c) 2021 Microsoft Corporation
> > + */
> > +
> > +#ifndef _RTE_THREAD_TYPES_H_
> > +#define _RTE_THREAD_TYPES_H_
> > +
> > +#include <rte_windows.h>
> > +
> > +typedef DWORD rte_thread_t;
> > +
> > +#endif /* _RTE_THREAD_TYPES_H_ */
>
> pthread_t type in pthreads-win32 and winpthread is not 32 bit.
> DPDK will have different ABI depending on a threading backend used.
> Apps must know it at build time then. How do they discover it?
> This is worth a warning in commit log and docs.
Not sure this is an acceptable behaviour.
In my opinion, ABI should not vary.
+Cc Ray
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [PATCH v6 01/10] eal: add thread id and simple thread functions
@ 2021-04-29 0:50 3% ` Dmitry Kozlyuk
2021-04-29 7:44 3% ` Thomas Monjalon
0 siblings, 1 reply; 200+ results
From: Dmitry Kozlyuk @ 2021-04-29 0:50 UTC (permalink / raw)
To: Narcisa Ana Maria Vasile
Cc: dev, thomas, khot, navasile, dmitrym, roretzla, talshn, ocardona,
bruce.richardson, david.marchand, pallavi.kadam
2021-04-02 18:38 (UTC-0700), Narcisa Ana Maria Vasile:
> From: Narcisa Vasile <navasile@microsoft.com>
>
> Add the thread identifier type.
> Add functions for comparing thread ids and obtaining the thread id
> for the current thread.
>
> Signed-off-by: Narcisa Vasile <navasile@microsoft.com>
> ---
(For the whole series.)
Please summarize and distribute relevant parts of the cover letter to commit
messages. Remember that cover letter doesn't get to commit log. This series
has subtle details that a good commit message should describe.
> diff --git a/lib/librte_eal/include/rte_thread_types.h b/lib/librte_eal/include/rte_thread_types.h
> new file mode 100644
> index 000000000..19fb85e38
> --- /dev/null
> +++ b/lib/librte_eal/include/rte_thread_types.h
> @@ -0,0 +1,12 @@
> +/* SPDX-License-Identifier: BSD-3-Clause
> + * Copyright(c) 2021 Microsoft Corporation
> + */
> +
> +#ifndef _RTE_THREAD_TYPES_H_
> +#define _RTE_THREAD_TYPES_H_
> +
> +#include <pthread.h>
> +
> +typedef pthread_t rte_thread_t;
> +
> +#endif /* _RTE_THREAD_TYPES_H_ */
> diff --git a/lib/librte_eal/windows/include/rte_windows_thread_types.h b/lib/librte_eal/windows/include/rte_windows_thread_types.h
> new file mode 100644
> index 000000000..ebd3d9e8f
> --- /dev/null
> +++ b/lib/librte_eal/windows/include/rte_windows_thread_types.h
> @@ -0,0 +1,12 @@
> +/* SPDX-License-Identifier: BSD-3-Clause
> + * Copyright(c) 2021 Microsoft Corporation
> + */
> +
> +#ifndef _RTE_THREAD_TYPES_H_
> +#define _RTE_THREAD_TYPES_H_
> +
> +#include <rte_windows.h>
> +
> +typedef DWORD rte_thread_t;
> +
> +#endif /* _RTE_THREAD_TYPES_H_ */
pthread_t type in pthreads-win32 and winpthread is not 32 bit.
DPDK will have different ABI depending on a threading backend used.
Apps must know it at build time then. How do they discover it?
This is worth a warning in commit log and docs.
> diff --git a/lib/librte_eal/windows/rte_thread.c b/lib/librte_eal/windows/rte_thread.c
> index 667287c38..940d9c653 100644
> --- a/lib/librte_eal/windows/rte_thread.c
> +++ b/lib/librte_eal/windows/rte_thread.c
> @@ -1,5 +1,6 @@
> /* SPDX-License-Identifier: BSD-3-Clause
> * Copyright 2021 Mellanox Technologies, Ltd
> + * Copyright(c) 2021 Microsoft Corporation
> */
>
> #include <rte_common.h>
> @@ -11,6 +12,18 @@ struct eal_tls_key {
> DWORD thread_index;
> };
>
> +rte_thread_t
> +rte_thread_self(void)
> +{
> + return GetCurrentThreadId();
> +}
> +
> +int
> +rte_thread_equal(rte_thread_t t1, rte_thread_t t2)
> +{
> + return t1 == t2 ? 1 : 0;
> +}
> +
"a == b" returns (int)0 or (int)1 in C.
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [PATCH v2] common/iavf: fix wrong order of protocol header types
2021-04-25 6:53 3% [dpdk-dev] [PATCH v2] " Ting Xu
@ 2021-04-29 0:49 0% ` Zhang, Qi Z
0 siblings, 0 replies; 200+ results
From: Zhang, Qi Z @ 2021-04-29 0:49 UTC (permalink / raw)
To: Xu, Ting, dev; +Cc: Xing, Beilei, Wu, Jingjing, stable
> -----Original Message-----
> From: Xu, Ting <ting.xu@intel.com>
> Sent: Sunday, April 25, 2021 2:53 PM
> To: dev@dpdk.org
> Cc: Xing, Beilei <beilei.xing@intel.com>; Wu, Jingjing <jingjing.wu@intel.com>;
> Zhang, Qi Z <qi.z.zhang@intel.com>; Xu, Ting <ting.xu@intel.com>;
> stable@dpdk.org
> Subject: [PATCH v2] common/iavf: fix wrong order of protocol header types
>
> The new virtchnl protocol header types for IPv4 and IPv6 fragment are not
> added in order, which will break ABI. Move them to the end of the list.
>
> Signed-off-by: Ting Xu <ting.xu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Applied to dpdk-next-net-intel after update the base code release date in README as this is the last iavf base code update for DPDK 21.05.
Thanks
Qi
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] Use WFE for spinlock and ring
2021-04-28 9:30 0% ` Ruifeng Wang
@ 2021-04-28 11:13 0% ` Thomas Monjalon
2021-04-29 14:28 0% ` Ruifeng Wang
0 siblings, 1 reply; 200+ results
From: Thomas Monjalon @ 2021-04-28 11:13 UTC (permalink / raw)
To: Ruifeng Wang; +Cc: David Marchand, dev, jerinj, nd, Honnappa Nagarahalli
28/04/2021 11:30, Ruifeng Wang:
> From: David Marchand <david.marchand@redhat.com>
> > On Sun, Apr 25, 2021 at 7:57 AM Ruifeng Wang <ruifeng.wang@arm.com>
> > wrote:
> > >
> > > The rte_wait_until_equal_xxx APIs abstract the functionality of
> > > 'polling for a memory location to become equal to a given value'[1].
> > >
> > > Use the API for the rte spinlock and ring implementations.
> > > With the wait until equal APIs being stable, changes will not impact ABI.
> >
> > Afaics, there is no ARM target with WFE enabled and we lost ability to enable
> > WFE support with removal of the make build system.
>
> WFE can be enabled with direct meson file change.
> WFE is not intended to be enabled by default. It can be enabled based on benchmarking
> result on hardware.
> >
> > $ git grep RTE_ARM_USE_WFE
> > config/arm/meson.build: ['RTE_ARM_USE_WFE', false],
> > lib/eal/arm/include/rte_pause_64.h:#ifdef RTE_ARM_USE_WFE
> >
> > How did you enable WFE to test this series?
>
> I modified meson file to test.
> Tests were also done with WFE disabled to make sure no degradation with generic implementation.
I don't understand the usage.
Which platform should use it?
Should it be a compile-time option?
^ permalink raw reply [relevance 0%]
* [dpdk-dev] [PATCH 1/3] common/sfc_efx/base: update MCDI headers
@ 2021-04-28 9:49 1% Ivan Malov
2021-05-22 19:32 1% ` [dpdk-dev] [PATCH v2 " Ivan Malov
` (2 more replies)
0 siblings, 3 replies; 200+ results
From: Ivan Malov @ 2021-04-28 9:49 UTC (permalink / raw)
To: dev; +Cc: Andrew Rybchenko
From: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
---
drivers/common/sfc_efx/base/efx_regs_mcdi.h | 3509 +++++++++++++++--
.../common/sfc_efx/base/efx_regs_mcdi_aoe.h | 142 +-
.../common/sfc_efx/base/efx_regs_mcdi_strs.h | 2 +-
3 files changed, 3312 insertions(+), 341 deletions(-)
diff --git a/drivers/common/sfc_efx/base/efx_regs_mcdi.h b/drivers/common/sfc_efx/base/efx_regs_mcdi.h
index 976db37d6..2c564e8b3 100644
--- a/drivers/common/sfc_efx/base/efx_regs_mcdi.h
+++ b/drivers/common/sfc_efx/base/efx_regs_mcdi.h
@@ -6,7 +6,7 @@
/*
* This file is automatically generated. DO NOT EDIT IT.
- * To make changes, edit the .yml files in sfregistry under doc/mcdi/ and
+ * To make changes, edit the .yml files in smartnic_registry under doc/mcdi/ and
* rebuild this file with "make mcdi_headers_v5".
*/
@@ -410,6 +410,48 @@
#define MC_CMD_RESOURCE_INSTANCE_ANY 0xffffffff
#define MC_CMD_RESOURCE_INSTANCE_NONE 0xfffffffe /* enum */
+/* MC_CMD_FPGA_FLASH_INDEX enum */
+#define MC_CMD_FPGA_FLASH_PRIMARY 0x0 /* enum */
+#define MC_CMD_FPGA_FLASH_SECONDARY 0x1 /* enum */
+
+/* MC_CMD_EXTERNAL_MAE_LINK_MODE enum */
+/* enum: Legacy mode as described in XN-200039-TC. */
+#define MC_CMD_EXTERNAL_MAE_LINK_MODE_LEGACY 0x0
+/* enum: Switchdev mode as described in XN-200039-TC. */
+#define MC_CMD_EXTERNAL_MAE_LINK_MODE_SWITCHDEV 0x1
+/* enum: Bootstrap mode as described in XN-200039-TC. */
+#define MC_CMD_EXTERNAL_MAE_LINK_MODE_BOOTSTRAP 0x2
+/* enum: Link-mode change is in-progress as described in XN-200039-TC. */
+#define MC_CMD_EXTERNAL_MAE_LINK_MODE_PENDING 0xf
+
+/* PCIE_INTERFACE enum: From EF100 onwards, SFC products can have multiple PCIe
+ * interfaces. There is a need to refer to interfaces explicitly from drivers
+ * (for example, a management driver on one interface administering a function
+ * on another interface). This enumeration provides stable identifiers to all
+ * interfaces present on a product. Product documentation will specify which
+ * interfaces exist and their associated identifier. In general, drivers,
+ * should not assign special meanings to specific values. Instead, behaviour
+ * should be determined by NIC configuration, which will identify interfaces
+ * where appropriate.
+ */
+/* enum: Primary host interfaces. Typically (i.e. for all known SFC products)
+ * the interface exposed on the edge connector (or form factor equivalent).
+ */
+#define PCIE_INTERFACE_HOST_PRIMARY 0x0
+/* enum: Riverhead and keystone products have a second PCIe interface to which
+ * an on-NIC ARM module is expected to be connecte.
+ */
+#define PCIE_INTERFACE_NIC_EMBEDDED 0x1
+/* enum: For MCDI commands issued over a PCIe interface, this value is
+ * translated into the interface over which the command was issued. Not
+ * meaningful for other MCDI transports.
+ */
+#define PCIE_INTERFACE_CALLER 0xffffffff
+
+/* MC_CLIENT_ID_SPECIFIER enum */
+/* enum: Equivalent to the caller's client ID */
+#define MC_CMD_CLIENT_ID_SELF 0xffffffff
+
/* MAE_FIELD_SUPPORT_STATUS enum */
/* enum: The NIC does not support this field. The driver must ensure that any
* mask associated with this field in a match rule is zeroed. The NIC may
@@ -470,6 +512,20 @@
#define MAE_FIELD_CT_PRIVATE_FLAGS 0x8
/* enum: 1 if the packet ingressed the NIC from one of the MACs, else 0. */
#define MAE_FIELD_IS_FROM_NETWORK 0x9
+/* enum: 1 if the packet has 1 or more VLAN tags, else 0. */
+#define MAE_FIELD_HAS_OVLAN 0xa
+/* enum: 1 if the packet has 2 or more VLAN tags, else 0. */
+#define MAE_FIELD_HAS_IVLAN 0xb
+/* enum: 1 if the outer packet has 1 or more VLAN tags, else 0; only present
+ * when encap
+ */
+#define MAE_FIELD_ENC_HAS_OVLAN 0xc
+/* enum: 1 if the outer packet has 2 or more VLAN tags, else 0; only present
+ * when encap
+ */
+#define MAE_FIELD_ENC_HAS_IVLAN 0xd
+/* enum: Packet is IP fragment */
+#define MAE_FIELD_ENC_IP_FRAG 0xe
#define MAE_FIELD_ETHER_TYPE 0x21 /* enum */
#define MAE_FIELD_VLAN0_TCI 0x22 /* enum */
#define MAE_FIELD_VLAN0_PROTO 0x23 /* enum */
@@ -508,6 +564,10 @@
#define MAE_FIELD_L4_DPORT 0x33
/* enum: Inner when encap */
#define MAE_FIELD_TCP_FLAGS 0x34
+/* enum: TCP packet with any of SYN, FIN or RST flag set */
+#define MAE_FIELD_TCP_SYN_FIN_RST 0x35
+/* enum: Packet is IP fragment with fragment offset 0 */
+#define MAE_FIELD_IP_FIRST_FRAG 0x36
/* enum: The type of encapsulated used for this packet. Value as per
* ENCAP_TYPE_*.
*/
@@ -550,8 +610,8 @@
#define MAE_FIELD_ENC_L4_SPORT 0x52
/* enum: Outer; only present when encap */
#define MAE_FIELD_ENC_L4_DPORT 0x53
-/* enum: VNI (when VXLAN or GENEVE) VSID (when NVGRE) Outer; only present when
- * encap
+/* enum: VNI (when VXLAN or GENEVE) VSID (when NVGRE) Bottom 24 bits of Key
+ * (when L2GRE) Outer; only present when encap
*/
#define MAE_FIELD_ENC_VNET_ID 0x54
@@ -566,6 +626,14 @@
#define MAE_MCDI_ENCAP_TYPE_GENEVE 0x3 /* enum */
#define MAE_MCDI_ENCAP_TYPE_L2GRE 0x4 /* enum */
+/* MAE_MPORT_END enum: Selects which end of the logical link identified by an
+ * MPORT_SELECTOR is targetted by an operation.
+ */
+/* enum: Selects the port on the MAE virtual switch */
+#define MAE_MPORT_END_MAE 0x1
+/* enum: Selects the virtual NIC plugged into the MAE switch */
+#define MAE_MPORT_END_VNIC 0x2
+
/* MCDI_EVENT structuredef: The structure of an MCDI_EVENT on Siena/EF10/EF100
* platforms
*/
@@ -647,17 +715,21 @@
#define MCDI_EVENT_TX_ERR_TYPE_OFST 0
#define MCDI_EVENT_TX_ERR_TYPE_LBN 12
#define MCDI_EVENT_TX_ERR_TYPE_WIDTH 4
-/* enum: Descriptor loader reported failure */
+/* enum: Descriptor loader reported failure. Specific to EF10-family NICs. */
#define MCDI_EVENT_TX_ERR_DL_FAIL 0x1
-/* enum: Descriptor ring empty and no EOP seen for packet */
+/* enum: Descriptor ring empty and no EOP seen for packet. Specific to
+ * EF10-family NICs
+ */
#define MCDI_EVENT_TX_ERR_NO_EOP 0x2
-/* enum: Overlength packet */
+/* enum: Overlength packet. Specific to EF10-family NICs. */
#define MCDI_EVENT_TX_ERR_2BIG 0x3
-/* enum: Malformed option descriptor */
+/* enum: Malformed option descriptor. Specific to EF10-family NICs. */
#define MCDI_EVENT_TX_BAD_OPTDESC 0x5
-/* enum: Option descriptor part way through a packet */
+/* enum: Option descriptor part way through a packet. Specific to EF10-family
+ * NICs.
+ */
#define MCDI_EVENT_TX_OPT_IN_PKT 0x8
-/* enum: DMA or PIO data access error */
+/* enum: DMA or PIO data access error. Specific to EF10-family NICs */
#define MCDI_EVENT_TX_ERR_BAD_DMA_OR_PIO 0x9
#define MCDI_EVENT_TX_ERR_INFO_OFST 0
#define MCDI_EVENT_TX_ERR_INFO_LBN 16
@@ -1270,7 +1342,13 @@
#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_OFST 8
#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LEN 8
#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LO_OFST 8
+#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LO_LEN 4
+#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LO_LBN 64
+#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LO_WIDTH 32
#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_HI_OFST 12
+#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_HI_LEN 4
+#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_HI_LBN 96
+#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_HI_WIDTH 32
#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_MINNUM 1
#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_MAXNUM 30
#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_MAXNUM_MCDI2 126
@@ -1384,6 +1462,7 @@
* has additional checks to reject insecure calls.
*/
#define MC_CMD_READ32 0x1
+#define MC_CMD_READ32_MSGSET 0x1
#undef MC_CMD_0x1_PRIVILEGE_CTG
#define MC_CMD_0x1_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -1413,6 +1492,7 @@
* Write multiple 32byte words to MC memory.
*/
#define MC_CMD_WRITE32 0x2
+#define MC_CMD_WRITE32_MSGSET 0x2
#undef MC_CMD_0x2_PRIVILEGE_CTG
#define MC_CMD_0x2_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -1442,6 +1522,7 @@
* has additional checks to reject insecure calls.
*/
#define MC_CMD_COPYCODE 0x3
+#define MC_CMD_COPYCODE_MSGSET 0x3
#undef MC_CMD_0x3_PRIVILEGE_CTG
#define MC_CMD_0x3_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -1505,6 +1586,7 @@
* Select function for function-specific commands.
*/
#define MC_CMD_SET_FUNC 0x4
+#define MC_CMD_SET_FUNC_MSGSET 0x4
#undef MC_CMD_0x4_PRIVILEGE_CTG
#define MC_CMD_0x4_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -1524,6 +1606,7 @@
* Get the instruction address from which the MC booted.
*/
#define MC_CMD_GET_BOOT_STATUS 0x5
+#define MC_CMD_GET_BOOT_STATUS_MSGSET 0x5
#undef MC_CMD_0x5_PRIVILEGE_CTG
#define MC_CMD_0x5_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -1558,6 +1641,7 @@
* fields will only be present if OUT.GLOBAL_FLAGS != NO_FAILS
*/
#define MC_CMD_GET_ASSERTS 0x6
+#define MC_CMD_GET_ASSERTS_MSGSET 0x6
#undef MC_CMD_0x6_PRIVILEGE_CTG
#define MC_CMD_0x6_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -1682,12 +1766,24 @@
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_OFST 260
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_LEN 8
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_LO_OFST 260
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_LO_LEN 4
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_LO_LBN 2080
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_LO_WIDTH 32
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_HI_OFST 264
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_HI_LEN 4
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_HI_LBN 2112
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_HI_WIDTH 32
/* MC firmware version number */
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_OFST 268
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_LEN 8
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_LO_OFST 268
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_LO_LEN 4
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_LO_LBN 2144
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_LO_WIDTH 32
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_HI_OFST 272
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_HI_LEN 4
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_HI_LBN 2176
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_HI_WIDTH 32
/* MC firmware security level */
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_SECURITY_LEVEL_OFST 276
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_SECURITY_LEVEL_LEN 4
@@ -1705,6 +1801,7 @@
* sensor notifications and MCDI completions
*/
#define MC_CMD_LOG_CTRL 0x7
+#define MC_CMD_LOG_CTRL_MSGSET 0x7
#undef MC_CMD_0x7_PRIVILEGE_CTG
#define MC_CMD_0x7_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -1731,6 +1828,7 @@
* Get version information about adapter components.
*/
#define MC_CMD_GET_VERSION 0x8
+#define MC_CMD_GET_VERSION_MSGSET 0x8
#undef MC_CMD_0x8_PRIVILEGE_CTG
#define MC_CMD_0x8_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -1771,7 +1869,13 @@
#define MC_CMD_GET_VERSION_OUT_VERSION_OFST 24
#define MC_CMD_GET_VERSION_OUT_VERSION_LEN 8
#define MC_CMD_GET_VERSION_OUT_VERSION_LO_OFST 24
+#define MC_CMD_GET_VERSION_OUT_VERSION_LO_LEN 4
+#define MC_CMD_GET_VERSION_OUT_VERSION_LO_LBN 192
+#define MC_CMD_GET_VERSION_OUT_VERSION_LO_WIDTH 32
#define MC_CMD_GET_VERSION_OUT_VERSION_HI_OFST 28
+#define MC_CMD_GET_VERSION_OUT_VERSION_HI_LEN 4
+#define MC_CMD_GET_VERSION_OUT_VERSION_HI_LBN 224
+#define MC_CMD_GET_VERSION_OUT_VERSION_HI_WIDTH 32
/* MC_CMD_GET_VERSION_EXT_OUT msgresponse */
#define MC_CMD_GET_VERSION_EXT_OUT_LEN 48
@@ -1787,7 +1891,13 @@
#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_OFST 24
#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_LEN 8
#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_LO_OFST 24
+#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_LO_LEN 4
+#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_LO_LBN 192
+#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_LO_WIDTH 32
#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_HI_OFST 28
+#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_HI_LEN 4
+#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_HI_LBN 224
+#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_HI_WIDTH 32
/* extra info */
#define MC_CMD_GET_VERSION_EXT_OUT_EXTRA_OFST 32
#define MC_CMD_GET_VERSION_EXT_OUT_EXTRA_LEN 16
@@ -1811,7 +1921,13 @@
#define MC_CMD_GET_VERSION_V2_OUT_VERSION_OFST 24
#define MC_CMD_GET_VERSION_V2_OUT_VERSION_LEN 8
#define MC_CMD_GET_VERSION_V2_OUT_VERSION_LO_OFST 24
+#define MC_CMD_GET_VERSION_V2_OUT_VERSION_LO_LEN 4
+#define MC_CMD_GET_VERSION_V2_OUT_VERSION_LO_LBN 192
+#define MC_CMD_GET_VERSION_V2_OUT_VERSION_LO_WIDTH 32
#define MC_CMD_GET_VERSION_V2_OUT_VERSION_HI_OFST 28
+#define MC_CMD_GET_VERSION_V2_OUT_VERSION_HI_LEN 4
+#define MC_CMD_GET_VERSION_V2_OUT_VERSION_HI_LBN 224
+#define MC_CMD_GET_VERSION_V2_OUT_VERSION_HI_WIDTH 32
/* extra info */
#define MC_CMD_GET_VERSION_V2_OUT_EXTRA_OFST 32
#define MC_CMD_GET_VERSION_V2_OUT_EXTRA_LEN 16
@@ -1833,6 +1949,33 @@
#define MC_CMD_GET_VERSION_V2_OUT_BOARD_EXT_INFO_PRESENT_OFST 48
#define MC_CMD_GET_VERSION_V2_OUT_BOARD_EXT_INFO_PRESENT_LBN 4
#define MC_CMD_GET_VERSION_V2_OUT_BOARD_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_DATAPATH_HW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_DATAPATH_HW_VERSION_PRESENT_LBN 5
+#define MC_CMD_GET_VERSION_V2_OUT_DATAPATH_HW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_DATAPATH_FW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_DATAPATH_FW_VERSION_PRESENT_LBN 6
+#define MC_CMD_GET_VERSION_V2_OUT_DATAPATH_FW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_BOOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_BOOT_VERSION_PRESENT_LBN 7
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_BOOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_UBOOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_UBOOT_VERSION_PRESENT_LBN 8
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_UBOOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_LBN 9
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_LBN 10
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_VERSION_PRESENT_LBN 11
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_BOARD_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_BOARD_VERSION_PRESENT_LBN 12
+#define MC_CMD_GET_VERSION_V2_OUT_BOARD_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_BUNDLE_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_BUNDLE_VERSION_PRESENT_LBN 13
+#define MC_CMD_GET_VERSION_V2_OUT_BUNDLE_VERSION_PRESENT_WIDTH 1
/* MC firmware unique build ID (as binary SHA-1 value) */
#define MC_CMD_GET_VERSION_V2_OUT_MCFW_BUILD_ID_OFST 52
#define MC_CMD_GET_VERSION_V2_OUT_MCFW_BUILD_ID_LEN 20
@@ -1850,7 +1993,13 @@
#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_OFST 156
#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_LEN 8
#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_LO_OFST 156
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_LO_LEN 4
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_LO_LBN 1248
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_LO_WIDTH 32
#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_HI_OFST 160
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_HI_LEN 4
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_HI_LBN 1280
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_HI_WIDTH 32
/* The ID of the SUC chip. This is specific to the platform but typically
* indicates family, memory sizes etc. See SF-116728-SW for further details.
*/
@@ -1864,7 +2013,13 @@
#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_OFST 184
#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_LEN 8
#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_LO_OFST 184
+#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_LO_LEN 4
+#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_LO_LBN 1472
+#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_LO_WIDTH 32
#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_HI_OFST 188
+#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_HI_LEN 4
+#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_HI_LBN 1504
+#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_HI_WIDTH 32
/* FPGA version as three numbers. On Riverhead based systems this field uses
* the same encoding as hardware version ID registers (MC_FPGA_BUILD_HWRD_REG):
* FPGA_VERSION[0]: x => Image H{x} FPGA_VERSION[1]: Revision letter (0 => A, 1
@@ -1886,12 +2041,496 @@
#define MC_CMD_GET_VERSION_V2_OUT_BOARD_SERIAL_OFST 240
#define MC_CMD_GET_VERSION_V2_OUT_BOARD_SERIAL_LEN 64
+/* MC_CMD_GET_VERSION_V3_OUT msgresponse: Extended response providing version
+ * information for all adapter components. For Riverhead based designs, base MC
+ * firmware version fields refer to NMC firmware, while CMC firmware data is in
+ * dedicated CMC fields. Flags indicate which data is present in the response
+ * (depending on which components exist on a particular adapter)
+ */
+#define MC_CMD_GET_VERSION_V3_OUT_LEN 328
+/* MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */
+/* MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */
+/* Enum values, see field(s): */
+/* MC_CMD_GET_VERSION_V0_OUT/MC_CMD_GET_VERSION_OUT_FIRMWARE */
+#define MC_CMD_GET_VERSION_V3_OUT_PCOL_OFST 4
+#define MC_CMD_GET_VERSION_V3_OUT_PCOL_LEN 4
+/* 128bit mask of functions supported by the current firmware */
+#define MC_CMD_GET_VERSION_V3_OUT_SUPPORTED_FUNCS_OFST 8
+#define MC_CMD_GET_VERSION_V3_OUT_SUPPORTED_FUNCS_LEN 16
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_OFST 24
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_LEN 8
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_LO_OFST 24
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_LO_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_LO_LBN 192
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_HI_OFST 28
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_HI_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_HI_LBN 224
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_HI_WIDTH 32
+/* extra info */
+#define MC_CMD_GET_VERSION_V3_OUT_EXTRA_OFST 32
+#define MC_CMD_GET_VERSION_V3_OUT_EXTRA_LEN 16
+/* Flags indicating which extended fields are valid */
+#define MC_CMD_GET_VERSION_V3_OUT_FLAGS_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_FLAGS_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_EXT_INFO_PRESENT_LBN 0
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_EXT_INFO_PRESENT_LBN 1
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_CMC_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_CMC_EXT_INFO_PRESENT_LBN 2
+#define MC_CMD_GET_VERSION_V3_OUT_CMC_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_FPGA_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_FPGA_EXT_INFO_PRESENT_LBN 3
+#define MC_CMD_GET_VERSION_V3_OUT_FPGA_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_EXT_INFO_PRESENT_LBN 4
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_HW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_HW_VERSION_PRESENT_LBN 5
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_HW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_FW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_FW_VERSION_PRESENT_LBN 6
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_FW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_BOOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_BOOT_VERSION_PRESENT_LBN 7
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_BOOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_UBOOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_UBOOT_VERSION_PRESENT_LBN 8
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_UBOOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_LBN 9
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_LBN 10
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_VERSION_PRESENT_LBN 11
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_VERSION_PRESENT_LBN 12
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_BUNDLE_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_BUNDLE_VERSION_PRESENT_LBN 13
+#define MC_CMD_GET_VERSION_V3_OUT_BUNDLE_VERSION_PRESENT_WIDTH 1
+/* MC firmware unique build ID (as binary SHA-1 value) */
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_BUILD_ID_OFST 52
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_BUILD_ID_LEN 20
+/* MC firmware security level */
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_SECURITY_LEVEL_OFST 72
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_SECURITY_LEVEL_LEN 4
+/* MC firmware build name (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_BUILD_NAME_OFST 76
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_BUILD_NAME_LEN 64
+/* The SUC firmware version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_VERSION_OFST 140
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_VERSION_NUM 4
+/* SUC firmware build date (as 64-bit Unix timestamp) */
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_OFST 156
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_LEN 8
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_LO_OFST 156
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_LO_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_LO_LBN 1248
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_HI_OFST 160
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_HI_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_HI_LBN 1280
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_HI_WIDTH 32
+/* The ID of the SUC chip. This is specific to the platform but typically
+ * indicates family, memory sizes etc. See SF-116728-SW for further details.
+ */
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_CHIP_ID_OFST 164
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_CHIP_ID_LEN 4
+/* The CMC firmware version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_VERSION_OFST 168
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_VERSION_NUM 4
+/* CMC firmware build date (as 64-bit Unix timestamp) */
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_OFST 184
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_LEN 8
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_LO_OFST 184
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_LO_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_LO_LBN 1472
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_HI_OFST 188
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_HI_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_HI_LBN 1504
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_HI_WIDTH 32
+/* FPGA version as three numbers. On Riverhead based systems this field uses
+ * the same encoding as hardware version ID registers (MC_FPGA_BUILD_HWRD_REG):
+ * FPGA_VERSION[0]: x => Image H{x} FPGA_VERSION[1]: Revision letter (0 => A, 1
+ * => B, ...) FPGA_VERSION[2]: Sub-revision number
+ */
+#define MC_CMD_GET_VERSION_V3_OUT_FPGA_VERSION_OFST 192
+#define MC_CMD_GET_VERSION_V3_OUT_FPGA_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_FPGA_VERSION_NUM 3
+/* Extra FPGA revision information (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V3_OUT_FPGA_EXTRA_OFST 204
+#define MC_CMD_GET_VERSION_V3_OUT_FPGA_EXTRA_LEN 16
+/* Board name / adapter model (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_NAME_OFST 220
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_NAME_LEN 16
+/* Board revision number */
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_REVISION_OFST 236
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_REVISION_LEN 4
+/* Board serial number (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_SERIAL_OFST 240
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_SERIAL_LEN 64
+/* The version of the datapath hardware design as three number - a.b.c */
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_HW_VERSION_OFST 304
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_HW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_HW_VERSION_NUM 3
+/* The version of the firmware library used to control the datapath as three
+ * number - a.b.c
+ */
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_FW_VERSION_OFST 316
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_FW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_FW_VERSION_NUM 3
+
+/* MC_CMD_GET_VERSION_V4_OUT msgresponse: Extended response providing SoC
+ * version information
+ */
+#define MC_CMD_GET_VERSION_V4_OUT_LEN 392
+/* MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */
+/* MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */
+/* Enum values, see field(s): */
+/* MC_CMD_GET_VERSION_V0_OUT/MC_CMD_GET_VERSION_OUT_FIRMWARE */
+#define MC_CMD_GET_VERSION_V4_OUT_PCOL_OFST 4
+#define MC_CMD_GET_VERSION_V4_OUT_PCOL_LEN 4
+/* 128bit mask of functions supported by the current firmware */
+#define MC_CMD_GET_VERSION_V4_OUT_SUPPORTED_FUNCS_OFST 8
+#define MC_CMD_GET_VERSION_V4_OUT_SUPPORTED_FUNCS_LEN 16
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_OFST 24
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_LEN 8
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_LO_OFST 24
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_LO_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_LO_LBN 192
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_HI_OFST 28
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_HI_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_HI_LBN 224
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_HI_WIDTH 32
+/* extra info */
+#define MC_CMD_GET_VERSION_V4_OUT_EXTRA_OFST 32
+#define MC_CMD_GET_VERSION_V4_OUT_EXTRA_LEN 16
+/* Flags indicating which extended fields are valid */
+#define MC_CMD_GET_VERSION_V4_OUT_FLAGS_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_FLAGS_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_EXT_INFO_PRESENT_LBN 0
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_EXT_INFO_PRESENT_LBN 1
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_CMC_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_CMC_EXT_INFO_PRESENT_LBN 2
+#define MC_CMD_GET_VERSION_V4_OUT_CMC_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_FPGA_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_FPGA_EXT_INFO_PRESENT_LBN 3
+#define MC_CMD_GET_VERSION_V4_OUT_FPGA_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_EXT_INFO_PRESENT_LBN 4
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_HW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_HW_VERSION_PRESENT_LBN 5
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_HW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_FW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_FW_VERSION_PRESENT_LBN 6
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_FW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_BOOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_BOOT_VERSION_PRESENT_LBN 7
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_BOOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_UBOOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_UBOOT_VERSION_PRESENT_LBN 8
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_UBOOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_LBN 9
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_LBN 10
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_VERSION_PRESENT_LBN 11
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_VERSION_PRESENT_LBN 12
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_BUNDLE_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_BUNDLE_VERSION_PRESENT_LBN 13
+#define MC_CMD_GET_VERSION_V4_OUT_BUNDLE_VERSION_PRESENT_WIDTH 1
+/* MC firmware unique build ID (as binary SHA-1 value) */
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_BUILD_ID_OFST 52
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_BUILD_ID_LEN 20
+/* MC firmware security level */
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_SECURITY_LEVEL_OFST 72
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_SECURITY_LEVEL_LEN 4
+/* MC firmware build name (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_BUILD_NAME_OFST 76
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_BUILD_NAME_LEN 64
+/* The SUC firmware version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_VERSION_OFST 140
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_VERSION_NUM 4
+/* SUC firmware build date (as 64-bit Unix timestamp) */
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_OFST 156
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_LEN 8
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_LO_OFST 156
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_LO_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_LO_LBN 1248
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_HI_OFST 160
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_HI_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_HI_LBN 1280
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_HI_WIDTH 32
+/* The ID of the SUC chip. This is specific to the platform but typically
+ * indicates family, memory sizes etc. See SF-116728-SW for further details.
+ */
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_CHIP_ID_OFST 164
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_CHIP_ID_LEN 4
+/* The CMC firmware version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_VERSION_OFST 168
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_VERSION_NUM 4
+/* CMC firmware build date (as 64-bit Unix timestamp) */
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_OFST 184
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_LEN 8
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_LO_OFST 184
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_LO_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_LO_LBN 1472
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_HI_OFST 188
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_HI_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_HI_LBN 1504
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_HI_WIDTH 32
+/* FPGA version as three numbers. On Riverhead based systems this field uses
+ * the same encoding as hardware version ID registers (MC_FPGA_BUILD_HWRD_REG):
+ * FPGA_VERSION[0]: x => Image H{x} FPGA_VERSION[1]: Revision letter (0 => A, 1
+ * => B, ...) FPGA_VERSION[2]: Sub-revision number
+ */
+#define MC_CMD_GET_VERSION_V4_OUT_FPGA_VERSION_OFST 192
+#define MC_CMD_GET_VERSION_V4_OUT_FPGA_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_FPGA_VERSION_NUM 3
+/* Extra FPGA revision information (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V4_OUT_FPGA_EXTRA_OFST 204
+#define MC_CMD_GET_VERSION_V4_OUT_FPGA_EXTRA_LEN 16
+/* Board name / adapter model (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_NAME_OFST 220
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_NAME_LEN 16
+/* Board revision number */
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_REVISION_OFST 236
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_REVISION_LEN 4
+/* Board serial number (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_SERIAL_OFST 240
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_SERIAL_LEN 64
+/* The version of the datapath hardware design as three number - a.b.c */
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_HW_VERSION_OFST 304
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_HW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_HW_VERSION_NUM 3
+/* The version of the firmware library used to control the datapath as three
+ * number - a.b.c
+ */
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_FW_VERSION_OFST 316
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_FW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_FW_VERSION_NUM 3
+/* The SOC boot version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_BOOT_VERSION_OFST 328
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_BOOT_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_BOOT_VERSION_NUM 4
+/* The SOC uboot version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_UBOOT_VERSION_OFST 344
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_UBOOT_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_UBOOT_VERSION_NUM 4
+/* The SOC main rootfs version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_MAIN_ROOTFS_VERSION_OFST 360
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_MAIN_ROOTFS_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_MAIN_ROOTFS_VERSION_NUM 4
+/* The SOC recovery buildroot version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_RECOVERY_BUILDROOT_VERSION_OFST 376
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_RECOVERY_BUILDROOT_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_RECOVERY_BUILDROOT_VERSION_NUM 4
+
+/* MC_CMD_GET_VERSION_V5_OUT msgresponse: Extended response providing bundle
+ * and board version information
+ */
+#define MC_CMD_GET_VERSION_V5_OUT_LEN 424
+/* MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */
+/* MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */
+/* Enum values, see field(s): */
+/* MC_CMD_GET_VERSION_V0_OUT/MC_CMD_GET_VERSION_OUT_FIRMWARE */
+#define MC_CMD_GET_VERSION_V5_OUT_PCOL_OFST 4
+#define MC_CMD_GET_VERSION_V5_OUT_PCOL_LEN 4
+/* 128bit mask of functions supported by the current firmware */
+#define MC_CMD_GET_VERSION_V5_OUT_SUPPORTED_FUNCS_OFST 8
+#define MC_CMD_GET_VERSION_V5_OUT_SUPPORTED_FUNCS_LEN 16
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_OFST 24
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_LEN 8
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_LO_OFST 24
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_LO_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_LO_LBN 192
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_HI_OFST 28
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_HI_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_HI_LBN 224
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_HI_WIDTH 32
+/* extra info */
+#define MC_CMD_GET_VERSION_V5_OUT_EXTRA_OFST 32
+#define MC_CMD_GET_VERSION_V5_OUT_EXTRA_LEN 16
+/* Flags indicating which extended fields are valid */
+#define MC_CMD_GET_VERSION_V5_OUT_FLAGS_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_FLAGS_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_EXT_INFO_PRESENT_LBN 0
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_EXT_INFO_PRESENT_LBN 1
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_CMC_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_CMC_EXT_INFO_PRESENT_LBN 2
+#define MC_CMD_GET_VERSION_V5_OUT_CMC_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_FPGA_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_FPGA_EXT_INFO_PRESENT_LBN 3
+#define MC_CMD_GET_VERSION_V5_OUT_FPGA_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_EXT_INFO_PRESENT_LBN 4
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_HW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_HW_VERSION_PRESENT_LBN 5
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_HW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_FW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_FW_VERSION_PRESENT_LBN 6
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_FW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_BOOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_BOOT_VERSION_PRESENT_LBN 7
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_BOOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_UBOOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_UBOOT_VERSION_PRESENT_LBN 8
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_UBOOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_LBN 9
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_LBN 10
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_VERSION_PRESENT_LBN 11
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_VERSION_PRESENT_LBN 12
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_BUNDLE_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_BUNDLE_VERSION_PRESENT_LBN 13
+#define MC_CMD_GET_VERSION_V5_OUT_BUNDLE_VERSION_PRESENT_WIDTH 1
+/* MC firmware unique build ID (as binary SHA-1 value) */
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_BUILD_ID_OFST 52
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_BUILD_ID_LEN 20
+/* MC firmware security level */
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_SECURITY_LEVEL_OFST 72
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_SECURITY_LEVEL_LEN 4
+/* MC firmware build name (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_BUILD_NAME_OFST 76
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_BUILD_NAME_LEN 64
+/* The SUC firmware version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_VERSION_OFST 140
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_VERSION_NUM 4
+/* SUC firmware build date (as 64-bit Unix timestamp) */
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_OFST 156
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_LEN 8
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_LO_OFST 156
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_LO_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_LO_LBN 1248
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_HI_OFST 160
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_HI_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_HI_LBN 1280
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_HI_WIDTH 32
+/* The ID of the SUC chip. This is specific to the platform but typically
+ * indicates family, memory sizes etc. See SF-116728-SW for further details.
+ */
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_CHIP_ID_OFST 164
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_CHIP_ID_LEN 4
+/* The CMC firmware version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_VERSION_OFST 168
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_VERSION_NUM 4
+/* CMC firmware build date (as 64-bit Unix timestamp) */
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_OFST 184
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_LEN 8
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_LO_OFST 184
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_LO_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_LO_LBN 1472
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_HI_OFST 188
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_HI_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_HI_LBN 1504
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_HI_WIDTH 32
+/* FPGA version as three numbers. On Riverhead based systems this field uses
+ * the same encoding as hardware version ID registers (MC_FPGA_BUILD_HWRD_REG):
+ * FPGA_VERSION[0]: x => Image H{x} FPGA_VERSION[1]: Revision letter (0 => A, 1
+ * => B, ...) FPGA_VERSION[2]: Sub-revision number
+ */
+#define MC_CMD_GET_VERSION_V5_OUT_FPGA_VERSION_OFST 192
+#define MC_CMD_GET_VERSION_V5_OUT_FPGA_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_FPGA_VERSION_NUM 3
+/* Extra FPGA revision information (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V5_OUT_FPGA_EXTRA_OFST 204
+#define MC_CMD_GET_VERSION_V5_OUT_FPGA_EXTRA_LEN 16
+/* Board name / adapter model (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_NAME_OFST 220
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_NAME_LEN 16
+/* Board revision number */
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_REVISION_OFST 236
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_REVISION_LEN 4
+/* Board serial number (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_SERIAL_OFST 240
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_SERIAL_LEN 64
+/* The version of the datapath hardware design as three number - a.b.c */
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_HW_VERSION_OFST 304
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_HW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_HW_VERSION_NUM 3
+/* The version of the firmware library used to control the datapath as three
+ * number - a.b.c
+ */
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_FW_VERSION_OFST 316
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_FW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_FW_VERSION_NUM 3
+/* The SOC boot version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_BOOT_VERSION_OFST 328
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_BOOT_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_BOOT_VERSION_NUM 4
+/* The SOC uboot version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_UBOOT_VERSION_OFST 344
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_UBOOT_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_UBOOT_VERSION_NUM 4
+/* The SOC main rootfs version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_MAIN_ROOTFS_VERSION_OFST 360
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_MAIN_ROOTFS_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_MAIN_ROOTFS_VERSION_NUM 4
+/* The SOC recovery buildroot version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_RECOVERY_BUILDROOT_VERSION_OFST 376
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_RECOVERY_BUILDROOT_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_RECOVERY_BUILDROOT_VERSION_NUM 4
+/* Board version as four numbers - a.b.c.d. BOARD_VERSION[0] duplicates the
+ * BOARD_REVISION field
+ */
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_VERSION_OFST 392
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_VERSION_NUM 4
+/* Bundle version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V5_OUT_BUNDLE_VERSION_OFST 408
+#define MC_CMD_GET_VERSION_V5_OUT_BUNDLE_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_BUNDLE_VERSION_NUM 4
+
/***********************************/
/* MC_CMD_PTP
* Perform PTP operation
*/
#define MC_CMD_PTP 0xb
+#define MC_CMD_PTP_MSGSET 0xb
#undef MC_CMD_0xb_PRIVILEGE_CTG
#define MC_CMD_0xb_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -2066,7 +2705,13 @@
#define MC_CMD_PTP_IN_ADJUST_FREQ_OFST 8
#define MC_CMD_PTP_IN_ADJUST_FREQ_LEN 8
#define MC_CMD_PTP_IN_ADJUST_FREQ_LO_OFST 8
+#define MC_CMD_PTP_IN_ADJUST_FREQ_LO_LEN 4
+#define MC_CMD_PTP_IN_ADJUST_FREQ_LO_LBN 64
+#define MC_CMD_PTP_IN_ADJUST_FREQ_LO_WIDTH 32
#define MC_CMD_PTP_IN_ADJUST_FREQ_HI_OFST 12
+#define MC_CMD_PTP_IN_ADJUST_FREQ_HI_LEN 4
+#define MC_CMD_PTP_IN_ADJUST_FREQ_HI_LBN 96
+#define MC_CMD_PTP_IN_ADJUST_FREQ_HI_WIDTH 32
/* enum: Number of fractional bits in frequency adjustment */
#define MC_CMD_PTP_IN_ADJUST_BITS 0x28
/* enum: Number of fractional bits in frequency adjustment when FP44_FREQ_ADJ
@@ -2097,7 +2742,13 @@
#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_OFST 8
#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_LEN 8
#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_LO_OFST 8
+#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_LO_LEN 4
+#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_LO_LBN 64
+#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_LO_WIDTH 32
#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_HI_OFST 12
+#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_HI_LEN 4
+#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_HI_LBN 96
+#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_HI_WIDTH 32
/* enum: Number of fractional bits in frequency adjustment */
/* MC_CMD_PTP_IN_ADJUST_BITS 0x28 */
/* enum: Number of fractional bits in frequency adjustment when FP44_FREQ_ADJ
@@ -2136,7 +2787,13 @@
#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_OFST 12
#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_LEN 8
#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_LO_OFST 12
+#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_LO_LEN 4
+#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_LO_LBN 96
+#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_LO_WIDTH 32
#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_HI_OFST 16
+#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_HI_LEN 4
+#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_HI_LBN 128
+#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_HI_WIDTH 32
/* MC_CMD_PTP_IN_MANFTEST_BASIC msgrequest */
#define MC_CMD_PTP_IN_MANFTEST_BASIC_LEN 8
@@ -2252,7 +2909,13 @@
#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_OFST 8
#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_LEN 8
#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_LO_OFST 8
+#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_LO_LEN 4
+#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_LO_LBN 64
+#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_LO_WIDTH 32
#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_HI_OFST 12
+#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_HI_LEN 4
+#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_HI_LBN 96
+#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_HI_WIDTH 32
/* Enum values, see field(s): */
/* MC_CMD_PTP/MC_CMD_PTP_IN_ADJUST/FREQ */
@@ -2283,7 +2946,13 @@
#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_OFST 12
#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_LEN 8
#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_LO_OFST 12
+#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_LO_LEN 4
+#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_LO_LBN 96
+#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_LO_WIDTH 32
#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_HI_OFST 16
+#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_HI_LEN 4
+#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_HI_LBN 128
+#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_HI_WIDTH 32
/* MC_CMD_PTP_IN_RX_SET_DOMAIN_FILTER msgrequest */
#define MC_CMD_PTP_IN_RX_SET_DOMAIN_FILTER_LEN 16
@@ -2745,6 +3414,7 @@
* Read 32bit words from the indirect memory map.
*/
#define MC_CMD_CSR_READ32 0xc
+#define MC_CMD_CSR_READ32_MSGSET 0xc
#undef MC_CMD_0xc_PRIVILEGE_CTG
#define MC_CMD_0xc_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -2778,6 +3448,7 @@
* Write 32bit dwords to the indirect memory map.
*/
#define MC_CMD_CSR_WRITE32 0xd
+#define MC_CMD_CSR_WRITE32_MSGSET 0xd
#undef MC_CMD_0xd_PRIVILEGE_CTG
#define MC_CMD_0xd_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -2811,6 +3482,7 @@
* MCDI command to avoid creating too many MCDI commands.
*/
#define MC_CMD_HP 0x54
+#define MC_CMD_HP_MSGSET 0x54
#undef MC_CMD_0x54_PRIVILEGE_CTG
#define MC_CMD_0x54_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -2834,7 +3506,13 @@
#define MC_CMD_HP_IN_OCSD_ADDR_OFST 4
#define MC_CMD_HP_IN_OCSD_ADDR_LEN 8
#define MC_CMD_HP_IN_OCSD_ADDR_LO_OFST 4
+#define MC_CMD_HP_IN_OCSD_ADDR_LO_LEN 4
+#define MC_CMD_HP_IN_OCSD_ADDR_LO_LBN 32
+#define MC_CMD_HP_IN_OCSD_ADDR_LO_WIDTH 32
#define MC_CMD_HP_IN_OCSD_ADDR_HI_OFST 8
+#define MC_CMD_HP_IN_OCSD_ADDR_HI_LEN 4
+#define MC_CMD_HP_IN_OCSD_ADDR_HI_LBN 64
+#define MC_CMD_HP_IN_OCSD_ADDR_HI_WIDTH 32
/* The requested update interval, in seconds. (Or the sub-command if ADDR is
* NULL.)
*/
@@ -2858,6 +3536,7 @@
* Get stack information.
*/
#define MC_CMD_STACKINFO 0xf
+#define MC_CMD_STACKINFO_MSGSET 0xf
#undef MC_CMD_0xf_PRIVILEGE_CTG
#define MC_CMD_0xf_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -2884,6 +3563,7 @@
* MDIO register read.
*/
#define MC_CMD_MDIO_READ 0x10
+#define MC_CMD_MDIO_READ_MSGSET 0x10
#undef MC_CMD_0x10_PRIVILEGE_CTG
#define MC_CMD_0x10_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -2932,6 +3612,7 @@
* MDIO register write.
*/
#define MC_CMD_MDIO_WRITE 0x11
+#define MC_CMD_MDIO_WRITE_MSGSET 0x11
#undef MC_CMD_0x11_PRIVILEGE_CTG
#define MC_CMD_0x11_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -2980,6 +3661,7 @@
* Write DBI register(s).
*/
#define MC_CMD_DBI_WRITE 0x12
+#define MC_CMD_DBI_WRITE_MSGSET 0x12
#undef MC_CMD_0x12_PRIVILEGE_CTG
#define MC_CMD_0x12_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -3033,6 +3715,7 @@
* access is implied by the Shared memory channel used.
*/
#define MC_CMD_PORT_READ32 0x14
+#define MC_CMD_PORT_READ32_MSGSET 0x14
/* MC_CMD_PORT_READ32_IN msgrequest */
#define MC_CMD_PORT_READ32_IN_LEN 4
@@ -3056,6 +3739,7 @@
* access is implied by the Shared memory channel used.
*/
#define MC_CMD_PORT_WRITE32 0x15
+#define MC_CMD_PORT_WRITE32_MSGSET 0x15
/* MC_CMD_PORT_WRITE32_IN msgrequest */
#define MC_CMD_PORT_WRITE32_IN_LEN 8
@@ -3079,6 +3763,7 @@
* access is implied by the Shared memory channel used.
*/
#define MC_CMD_PORT_READ128 0x16
+#define MC_CMD_PORT_READ128_MSGSET 0x16
/* MC_CMD_PORT_READ128_IN msgrequest */
#define MC_CMD_PORT_READ128_IN_LEN 4
@@ -3102,6 +3787,7 @@
* access is implied by the Shared memory channel used.
*/
#define MC_CMD_PORT_WRITE128 0x17
+#define MC_CMD_PORT_WRITE128_MSGSET 0x17
/* MC_CMD_PORT_WRITE128_IN msgrequest */
#define MC_CMD_PORT_WRITE128_IN_LEN 20
@@ -3150,6 +3836,7 @@
* Returns the MC firmware configuration structure.
*/
#define MC_CMD_GET_BOARD_CFG 0x18
+#define MC_CMD_GET_BOARD_CFG_MSGSET 0x18
#undef MC_CMD_0x18_PRIVILEGE_CTG
#define MC_CMD_0x18_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -3225,6 +3912,7 @@
* Read DBI register(s) -- extended functionality
*/
#define MC_CMD_DBI_READX 0x19
+#define MC_CMD_DBI_READX_MSGSET 0x19
#undef MC_CMD_0x19_PRIVILEGE_CTG
#define MC_CMD_0x19_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -3239,7 +3927,13 @@
#define MC_CMD_DBI_READX_IN_DBIRDOP_OFST 0
#define MC_CMD_DBI_READX_IN_DBIRDOP_LEN 8
#define MC_CMD_DBI_READX_IN_DBIRDOP_LO_OFST 0
+#define MC_CMD_DBI_READX_IN_DBIRDOP_LO_LEN 4
+#define MC_CMD_DBI_READX_IN_DBIRDOP_LO_LBN 0
+#define MC_CMD_DBI_READX_IN_DBIRDOP_LO_WIDTH 32
#define MC_CMD_DBI_READX_IN_DBIRDOP_HI_OFST 4
+#define MC_CMD_DBI_READX_IN_DBIRDOP_HI_LEN 4
+#define MC_CMD_DBI_READX_IN_DBIRDOP_HI_LBN 32
+#define MC_CMD_DBI_READX_IN_DBIRDOP_HI_WIDTH 32
#define MC_CMD_DBI_READX_IN_DBIRDOP_MINNUM 1
#define MC_CMD_DBI_READX_IN_DBIRDOP_MAXNUM 31
#define MC_CMD_DBI_READX_IN_DBIRDOP_MAXNUM_MCDI2 127
@@ -3283,6 +3977,7 @@
* Set the 16byte seed for the MC pseudo-random generator.
*/
#define MC_CMD_SET_RAND_SEED 0x1a
+#define MC_CMD_SET_RAND_SEED_MSGSET 0x1a
#undef MC_CMD_0x1a_PRIVILEGE_CTG
#define MC_CMD_0x1a_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -3302,6 +3997,7 @@
* Retrieve the history of the LTSSM, if the build supports it.
*/
#define MC_CMD_LTSSM_HIST 0x1b
+#define MC_CMD_LTSSM_HIST_MSGSET 0x1b
/* MC_CMD_LTSSM_HIST_IN msgrequest */
#define MC_CMD_LTSSM_HIST_IN_LEN 0
@@ -3330,6 +4026,7 @@
* platforms.
*/
#define MC_CMD_DRV_ATTACH 0x1c
+#define MC_CMD_DRV_ATTACH_MSGSET 0x1c
#undef MC_CMD_0x1c_PRIVILEGE_CTG
#define MC_CMD_0x1c_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -3524,6 +4221,7 @@
* Route UART output to circular buffer in shared memory instead.
*/
#define MC_CMD_SHMUART 0x1f
+#define MC_CMD_SHMUART_MSGSET 0x1f
/* MC_CMD_SHMUART_IN msgrequest */
#define MC_CMD_SHMUART_IN_LEN 4
@@ -3542,6 +4240,7 @@
* use MC_CMD_ENTITY_RESET instead.
*/
#define MC_CMD_PORT_RESET 0x20
+#define MC_CMD_PORT_RESET_MSGSET 0x20
#undef MC_CMD_0x20_PRIVILEGE_CTG
#define MC_CMD_0x20_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -3560,6 +4259,7 @@
* extended version of the deprecated MC_CMD_PORT_RESET with added fields.
*/
#define MC_CMD_ENTITY_RESET 0x20
+#define MC_CMD_ENTITY_RESET_MSGSET 0x20
/* MC_CMD_0x20_PRIVILEGE_CTG SRIOV_CTG_GENERAL */
/* MC_CMD_ENTITY_RESET_IN msgrequest */
@@ -3582,6 +4282,7 @@
* Read instantaneous and minimum flow control thresholds.
*/
#define MC_CMD_PCIE_CREDITS 0x21
+#define MC_CMD_PCIE_CREDITS_MSGSET 0x21
/* MC_CMD_PCIE_CREDITS_IN msgrequest */
#define MC_CMD_PCIE_CREDITS_IN_LEN 8
@@ -3617,6 +4318,7 @@
* Get histogram of RX queue fill level.
*/
#define MC_CMD_RXD_MONITOR 0x22
+#define MC_CMD_RXD_MONITOR_MSGSET 0x22
/* MC_CMD_RXD_MONITOR_IN msgrequest */
#define MC_CMD_RXD_MONITOR_IN_LEN 12
@@ -3676,6 +4378,7 @@
* Copy the given ASCII string out onto UART and/or out of the network port.
*/
#define MC_CMD_PUTS 0x23
+#define MC_CMD_PUTS_MSGSET 0x23
#undef MC_CMD_0x23_PRIVILEGE_CTG
#define MC_CMD_0x23_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -3712,6 +4415,7 @@
* 'zombie' state. Locks required: None
*/
#define MC_CMD_GET_PHY_CFG 0x24
+#define MC_CMD_GET_PHY_CFG_MSGSET 0x24
#undef MC_CMD_0x24_PRIVILEGE_CTG
#define MC_CMD_0x24_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -3868,6 +4572,7 @@
* Return code: 0, EINVAL, EACCES (if PHY_LOCK is not held)
*/
#define MC_CMD_START_BIST 0x25
+#define MC_CMD_START_BIST_MSGSET 0x25
#undef MC_CMD_0x25_PRIVILEGE_CTG
#define MC_CMD_0x25_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -3908,6 +4613,7 @@
* EACCES (if PHY_LOCK is not held).
*/
#define MC_CMD_POLL_BIST 0x26
+#define MC_CMD_POLL_BIST_MSGSET 0x26
#undef MC_CMD_0x26_PRIVILEGE_CTG
#define MC_CMD_0x26_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -4077,6 +4783,7 @@
* returns). The driver must still wait for flush done/failure events as usual.
*/
#define MC_CMD_FLUSH_RX_QUEUES 0x27
+#define MC_CMD_FLUSH_RX_QUEUES_MSGSET 0x27
/* MC_CMD_FLUSH_RX_QUEUES_IN msgrequest */
#define MC_CMD_FLUSH_RX_QUEUES_IN_LENMIN 4
@@ -4099,6 +4806,7 @@
* Returns a bitmask of loopback modes available at each speed.
*/
#define MC_CMD_GET_LOOPBACK_MODES 0x28
+#define MC_CMD_GET_LOOPBACK_MODES_MSGSET 0x28
#undef MC_CMD_0x28_PRIVILEGE_CTG
#define MC_CMD_0x28_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -4112,7 +4820,13 @@
#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_OFST 0
#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_LO_OFST 0
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_LO_LBN 0
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_HI_OFST 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_HI_LBN 32
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_HI_WIDTH 32
/* enum: None. */
#define MC_CMD_LOOPBACK_NONE 0x0
/* enum: Data. */
@@ -4195,28 +4909,52 @@
#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_OFST 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_LO_OFST 8
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_LO_LBN 64
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_HI_OFST 12
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_HI_LBN 96
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_OFST 16
#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_LO_OFST 16
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_LO_LBN 128
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_HI_OFST 20
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_HI_LBN 160
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_OFST 24
#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_LO_OFST 24
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_LO_LBN 192
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_HI_OFST 28
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_HI_LBN 224
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_OFST 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_LO_OFST 32
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_LO_LBN 256
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_HI_OFST 36
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_HI_LBN 288
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
@@ -4228,7 +4966,13 @@
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_OFST 0
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_LO_OFST 0
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_LO_LBN 0
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_HI_OFST 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_HI_LBN 32
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_HI_WIDTH 32
/* enum: None. */
/* MC_CMD_LOOPBACK_NONE 0x0 */
/* enum: Data. */
@@ -4311,49 +5055,91 @@
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_OFST 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_LO_OFST 8
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_LO_LBN 64
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_HI_OFST 12
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_HI_LBN 96
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_OFST 16
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_LO_OFST 16
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_LO_LBN 128
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_HI_OFST 20
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_HI_LBN 160
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_OFST 24
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_LO_OFST 24
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_LO_LBN 192
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_HI_OFST 28
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_HI_LBN 224
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_OFST 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_LO_OFST 32
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_LO_LBN 256
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_HI_OFST 36
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_HI_LBN 288
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported 25G loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_OFST 40
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_LO_OFST 40
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_LO_LBN 320
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_HI_OFST 44
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_HI_LBN 352
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported 50 loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_OFST 48
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_LO_OFST 48
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_LO_LBN 384
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_HI_OFST 52
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_HI_LBN 416
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported 100G loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_OFST 56
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_LO_OFST 56
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_LO_LBN 448
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_HI_OFST 60
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_HI_LBN 480
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
@@ -4395,6 +5181,7 @@
* ETIME.
*/
#define MC_CMD_GET_LINK 0x29
+#define MC_CMD_GET_LINK_MSGSET 0x29
#undef MC_CMD_0x29_PRIVILEGE_CTG
#define MC_CMD_0x29_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -4596,6 +5383,7 @@
* code: 0, EINVAL, ETIME, EAGAIN
*/
#define MC_CMD_SET_LINK 0x2a
+#define MC_CMD_SET_LINK_MSGSET 0x2a
#undef MC_CMD_0x2a_PRIVILEGE_CTG
#define MC_CMD_0x2a_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -4686,6 +5474,7 @@
* Set identification LED state. Locks required: None. Return code: 0, EINVAL
*/
#define MC_CMD_SET_ID_LED 0x2b
+#define MC_CMD_SET_ID_LED_MSGSET 0x2b
#undef MC_CMD_0x2b_PRIVILEGE_CTG
#define MC_CMD_0x2b_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -4708,6 +5497,7 @@
* Set MAC configuration. Locks required: None. Return code: 0, EINVAL
*/
#define MC_CMD_SET_MAC 0x2c
+#define MC_CMD_SET_MAC_MSGSET 0x2c
#undef MC_CMD_0x2c_PRIVILEGE_CTG
#define MC_CMD_0x2c_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -4724,7 +5514,13 @@
#define MC_CMD_SET_MAC_IN_ADDR_OFST 8
#define MC_CMD_SET_MAC_IN_ADDR_LEN 8
#define MC_CMD_SET_MAC_IN_ADDR_LO_OFST 8
+#define MC_CMD_SET_MAC_IN_ADDR_LO_LEN 4
+#define MC_CMD_SET_MAC_IN_ADDR_LO_LBN 64
+#define MC_CMD_SET_MAC_IN_ADDR_LO_WIDTH 32
#define MC_CMD_SET_MAC_IN_ADDR_HI_OFST 12
+#define MC_CMD_SET_MAC_IN_ADDR_HI_LEN 4
+#define MC_CMD_SET_MAC_IN_ADDR_HI_LBN 96
+#define MC_CMD_SET_MAC_IN_ADDR_HI_WIDTH 32
#define MC_CMD_SET_MAC_IN_REJECT_OFST 16
#define MC_CMD_SET_MAC_IN_REJECT_LEN 4
#define MC_CMD_SET_MAC_IN_REJECT_UNCST_OFST 16
@@ -4765,7 +5561,13 @@
#define MC_CMD_SET_MAC_EXT_IN_ADDR_OFST 8
#define MC_CMD_SET_MAC_EXT_IN_ADDR_LEN 8
#define MC_CMD_SET_MAC_EXT_IN_ADDR_LO_OFST 8
+#define MC_CMD_SET_MAC_EXT_IN_ADDR_LO_LEN 4
+#define MC_CMD_SET_MAC_EXT_IN_ADDR_LO_LBN 64
+#define MC_CMD_SET_MAC_EXT_IN_ADDR_LO_WIDTH 32
#define MC_CMD_SET_MAC_EXT_IN_ADDR_HI_OFST 12
+#define MC_CMD_SET_MAC_EXT_IN_ADDR_HI_LEN 4
+#define MC_CMD_SET_MAC_EXT_IN_ADDR_HI_LBN 96
+#define MC_CMD_SET_MAC_EXT_IN_ADDR_HI_WIDTH 32
#define MC_CMD_SET_MAC_EXT_IN_REJECT_OFST 16
#define MC_CMD_SET_MAC_EXT_IN_REJECT_LEN 4
#define MC_CMD_SET_MAC_EXT_IN_REJECT_UNCST_OFST 16
@@ -4816,6 +5618,129 @@
#define MC_CMD_SET_MAC_EXT_IN_CFG_FCS_LBN 4
#define MC_CMD_SET_MAC_EXT_IN_CFG_FCS_WIDTH 1
+/* MC_CMD_SET_MAC_V3_IN msgrequest */
+#define MC_CMD_SET_MAC_V3_IN_LEN 40
+/* The MTU is the MTU programmed directly into the XMAC/GMAC (inclusive of
+ * EtherII, VLAN, bug16011 padding).
+ */
+#define MC_CMD_SET_MAC_V3_IN_MTU_OFST 0
+#define MC_CMD_SET_MAC_V3_IN_MTU_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_DRAIN_OFST 4
+#define MC_CMD_SET_MAC_V3_IN_DRAIN_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_ADDR_OFST 8
+#define MC_CMD_SET_MAC_V3_IN_ADDR_LEN 8
+#define MC_CMD_SET_MAC_V3_IN_ADDR_LO_OFST 8
+#define MC_CMD_SET_MAC_V3_IN_ADDR_LO_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_ADDR_LO_LBN 64
+#define MC_CMD_SET_MAC_V3_IN_ADDR_LO_WIDTH 32
+#define MC_CMD_SET_MAC_V3_IN_ADDR_HI_OFST 12
+#define MC_CMD_SET_MAC_V3_IN_ADDR_HI_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_ADDR_HI_LBN 96
+#define MC_CMD_SET_MAC_V3_IN_ADDR_HI_WIDTH 32
+#define MC_CMD_SET_MAC_V3_IN_REJECT_OFST 16
+#define MC_CMD_SET_MAC_V3_IN_REJECT_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_REJECT_UNCST_OFST 16
+#define MC_CMD_SET_MAC_V3_IN_REJECT_UNCST_LBN 0
+#define MC_CMD_SET_MAC_V3_IN_REJECT_UNCST_WIDTH 1
+#define MC_CMD_SET_MAC_V3_IN_REJECT_BRDCST_OFST 16
+#define MC_CMD_SET_MAC_V3_IN_REJECT_BRDCST_LBN 1
+#define MC_CMD_SET_MAC_V3_IN_REJECT_BRDCST_WIDTH 1
+#define MC_CMD_SET_MAC_V3_IN_FCNTL_OFST 20
+#define MC_CMD_SET_MAC_V3_IN_FCNTL_LEN 4
+/* enum: Flow control is off. */
+/* MC_CMD_FCNTL_OFF 0x0 */
+/* enum: Respond to flow control. */
+/* MC_CMD_FCNTL_RESPOND 0x1 */
+/* enum: Respond to and Issue flow control. */
+/* MC_CMD_FCNTL_BIDIR 0x2 */
+/* enum: Auto neg flow control. */
+/* MC_CMD_FCNTL_AUTO 0x3 */
+/* enum: Priority flow control (eftest builds only). */
+/* MC_CMD_FCNTL_QBB 0x4 */
+/* enum: Issue flow control. */
+/* MC_CMD_FCNTL_GENERATE 0x5 */
+#define MC_CMD_SET_MAC_V3_IN_FLAGS_OFST 24
+#define MC_CMD_SET_MAC_V3_IN_FLAGS_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_FLAG_INCLUDE_FCS_OFST 24
+#define MC_CMD_SET_MAC_V3_IN_FLAG_INCLUDE_FCS_LBN 0
+#define MC_CMD_SET_MAC_V3_IN_FLAG_INCLUDE_FCS_WIDTH 1
+/* Select which parameters to configure. A parameter will only be modified if
+ * the corresponding control flag is set. If SET_MAC_ENHANCED is not set in
+ * capabilities then this field is ignored (and all flags are assumed to be
+ * set).
+ */
+#define MC_CMD_SET_MAC_V3_IN_CONTROL_OFST 28
+#define MC_CMD_SET_MAC_V3_IN_CONTROL_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_CFG_MTU_OFST 28
+#define MC_CMD_SET_MAC_V3_IN_CFG_MTU_LBN 0
+#define MC_CMD_SET_MAC_V3_IN_CFG_MTU_WIDTH 1
+#define MC_CMD_SET_MAC_V3_IN_CFG_DRAIN_OFST 28
+#define MC_CMD_SET_MAC_V3_IN_CFG_DRAIN_LBN 1
+#define MC_CMD_SET_MAC_V3_IN_CFG_DRAIN_WIDTH 1
+#define MC_CMD_SET_MAC_V3_IN_CFG_REJECT_OFST 28
+#define MC_CMD_SET_MAC_V3_IN_CFG_REJECT_LBN 2
+#define MC_CMD_SET_MAC_V3_IN_CFG_REJECT_WIDTH 1
+#define MC_CMD_SET_MAC_V3_IN_CFG_FCNTL_OFST 28
+#define MC_CMD_SET_MAC_V3_IN_CFG_FCNTL_LBN 3
+#define MC_CMD_SET_MAC_V3_IN_CFG_FCNTL_WIDTH 1
+#define MC_CMD_SET_MAC_V3_IN_CFG_FCS_OFST 28
+#define MC_CMD_SET_MAC_V3_IN_CFG_FCS_LBN 4
+#define MC_CMD_SET_MAC_V3_IN_CFG_FCS_WIDTH 1
+/* Identifies the MAC to update by the specifying the end of a logical MAE
+ * link. Setting TARGET to MAE_LINK_ENDPOINT_COMPAT is equivalent to using the
+ * previous version of the command (MC_CMD_SET_MAC_EXT). Not all possible
+ * combinations of MPORT_END and MPORT_SELECTOR in TARGET will work in all
+ * circumstances. 1. Some will always work (e.g. a VF can always address its
+ * logical MAC using MPORT_SELECTOR=ASSIGNED,LINK_END=VNIC), 2. Some are not
+ * meaningful and will always fail with EINVAL (e.g. attempting to address the
+ * VNIC end of a link to a physical port), 3. Some are meaningful but require
+ * the MCDI client to have the required permission and fail with EPERM
+ * otherwise (e.g. trying to set the MAC on a VF the caller cannot administer),
+ * and 4. Some could be implementation-specific and fail with ENOTSUP if not
+ * available (no examples exist right now). See SF-123581-TC section 4.3 for
+ * more details.
+ */
+#define MC_CMD_SET_MAC_V3_IN_TARGET_OFST 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_LEN 8
+#define MC_CMD_SET_MAC_V3_IN_TARGET_LO_OFST 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_LO_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_LO_LBN 256
+#define MC_CMD_SET_MAC_V3_IN_TARGET_LO_WIDTH 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_HI_OFST 36
+#define MC_CMD_SET_MAC_V3_IN_TARGET_HI_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_HI_LBN 288
+#define MC_CMD_SET_MAC_V3_IN_TARGET_HI_WIDTH 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_OFST 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FLAT_OFST 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FLAT_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_TYPE_OFST 35
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_TYPE_LEN 1
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_MPORT_ID_OFST 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_MPORT_ID_LEN 3
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_PPORT_ID_LBN 256
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_PPORT_ID_WIDTH 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_LBN 276
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_WIDTH 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_LBN 272
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_WIDTH 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FUNC_PF_ID_OFST 34
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FUNC_PF_ID_LEN 1
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FUNC_VF_ID_OFST 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FUNC_VF_ID_LEN 2
+#define MC_CMD_SET_MAC_V3_IN_TARGET_LINK_END_OFST 36
+#define MC_CMD_SET_MAC_V3_IN_TARGET_LINK_END_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_OFST 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_LEN 8
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_LO_OFST 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_LO_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_LO_LBN 256
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_LO_WIDTH 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_HI_OFST 36
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_HI_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_HI_LBN 288
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_HI_WIDTH 32
+
/* MC_CMD_SET_MAC_OUT msgresponse */
#define MC_CMD_SET_MAC_OUT_LEN 0
@@ -4839,6 +5764,7 @@
* Returns: 0, ETIME
*/
#define MC_CMD_PHY_STATS 0x2d
+#define MC_CMD_PHY_STATS_MSGSET 0x2d
#undef MC_CMD_0x2d_PRIVILEGE_CTG
#define MC_CMD_0x2d_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -4849,7 +5775,13 @@
#define MC_CMD_PHY_STATS_IN_DMA_ADDR_OFST 0
#define MC_CMD_PHY_STATS_IN_DMA_ADDR_LEN 8
#define MC_CMD_PHY_STATS_IN_DMA_ADDR_LO_OFST 0
+#define MC_CMD_PHY_STATS_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_PHY_STATS_IN_DMA_ADDR_LO_LBN 0
+#define MC_CMD_PHY_STATS_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_PHY_STATS_IN_DMA_ADDR_HI_OFST 4
+#define MC_CMD_PHY_STATS_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_PHY_STATS_IN_DMA_ADDR_HI_LBN 32
+#define MC_CMD_PHY_STATS_IN_DMA_ADDR_HI_WIDTH 32
/* MC_CMD_PHY_STATS_OUT_DMA msgresponse */
#define MC_CMD_PHY_STATS_OUT_DMA_LEN 0
@@ -4921,6 +5853,7 @@
* effect. Returns: 0, ETIME
*/
#define MC_CMD_MAC_STATS 0x2e
+#define MC_CMD_MAC_STATS_MSGSET 0x2e
#undef MC_CMD_0x2e_PRIVILEGE_CTG
#define MC_CMD_0x2e_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -4931,7 +5864,13 @@
#define MC_CMD_MAC_STATS_IN_DMA_ADDR_OFST 0
#define MC_CMD_MAC_STATS_IN_DMA_ADDR_LEN 8
#define MC_CMD_MAC_STATS_IN_DMA_ADDR_LO_OFST 0
+#define MC_CMD_MAC_STATS_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_MAC_STATS_IN_DMA_ADDR_LO_LBN 0
+#define MC_CMD_MAC_STATS_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_MAC_STATS_IN_DMA_ADDR_HI_OFST 4
+#define MC_CMD_MAC_STATS_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_MAC_STATS_IN_DMA_ADDR_HI_LBN 32
+#define MC_CMD_MAC_STATS_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_MAC_STATS_IN_CMD_OFST 8
#define MC_CMD_MAC_STATS_IN_CMD_LEN 4
#define MC_CMD_MAC_STATS_IN_DMA_OFST 8
@@ -4974,7 +5913,13 @@
#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_OFST 0
#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_LEN 8
#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_LO_OFST 0
+#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_LO_LEN 4
+#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_LO_LBN 0
+#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_LO_WIDTH 32
#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_HI_OFST 4
+#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_HI_LEN 4
+#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_HI_LBN 32
+#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_HI_WIDTH 32
#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS
#define MC_CMD_MAC_GENERATION_START 0x0 /* enum */
#define MC_CMD_MAC_DMABUF_START 0x1 /* enum */
@@ -5130,7 +6075,13 @@
#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_OFST 0
#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_LEN 8
#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_LO_OFST 0
+#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_LO_LEN 4
+#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_LO_LBN 0
+#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_LO_WIDTH 32
#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_HI_OFST 4
+#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_HI_LEN 4
+#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_HI_LBN 32
+#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_HI_WIDTH 32
#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS_V2
/* enum: Start of FEC stats buffer space, Medford2 and up */
#define MC_CMD_MAC_FEC_DMABUF_START 0x61
@@ -5163,7 +6114,13 @@
#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_OFST 0
#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_LEN 8
#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_LO_OFST 0
+#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_LO_LEN 4
+#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_LO_LBN 0
+#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_LO_WIDTH 32
#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_HI_OFST 4
+#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_HI_LEN 4
+#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_HI_LBN 32
+#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_HI_WIDTH 32
#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS_V3
/* enum: Start of CTPIO stats buffer space, Medford2 and up */
#define MC_CMD_MAC_CTPIO_DMABUF_START 0x68
@@ -5237,7 +6194,13 @@
#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_OFST 0
#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_LEN 8
#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_LO_OFST 0
+#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_LO_LEN 4
+#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_LO_LBN 0
+#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_LO_WIDTH 32
#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_HI_OFST 4
+#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_HI_LEN 4
+#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_HI_LBN 32
+#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_HI_WIDTH 32
#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS_V4
/* enum: Start of V4 stats buffer space */
#define MC_CMD_MAC_V4_DMABUF_START 0x79
@@ -5266,6 +6229,7 @@
* to be documented
*/
#define MC_CMD_SRIOV 0x30
+#define MC_CMD_SRIOV_MSGSET 0x30
/* MC_CMD_SRIOV_IN msgrequest */
#define MC_CMD_SRIOV_IN_LEN 12
@@ -5297,7 +6261,13 @@
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_OFST 8
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LEN 8
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LO_OFST 8
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LO_LEN 4
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LO_LBN 64
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LO_WIDTH 32
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_HI_OFST 12
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_HI_LEN 4
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_HI_LBN 96
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_HI_WIDTH 32
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LBN 64
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_WIDTH 64
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_RID_OFST 16
@@ -5308,7 +6278,13 @@
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_OFST 20
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LEN 8
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LO_OFST 20
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LO_LEN 4
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LO_LBN 160
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LO_WIDTH 32
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_HI_OFST 24
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_HI_LEN 4
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_HI_LBN 192
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_HI_WIDTH 32
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LBN 160
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_WIDTH 64
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_LENGTH_OFST 28
@@ -5338,6 +6314,7 @@
* Returns: 0, EINVAL (invalid RID)
*/
#define MC_CMD_MEMCPY 0x31
+#define MC_CMD_MEMCPY_MSGSET 0x31
/* MC_CMD_MEMCPY_IN msgrequest */
#define MC_CMD_MEMCPY_IN_LENMIN 32
@@ -5361,6 +6338,7 @@
* Set a WoL filter.
*/
#define MC_CMD_WOL_FILTER_SET 0x32
+#define MC_CMD_WOL_FILTER_SET_MSGSET 0x32
#undef MC_CMD_0x32_PRIVILEGE_CTG
#define MC_CMD_0x32_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -5401,7 +6379,13 @@
#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_OFST 8
#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_LEN 8
#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_LO_OFST 8
+#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_LO_LEN 4
+#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_LO_LBN 64
+#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_LO_WIDTH 32
#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_HI_OFST 12
+#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_HI_LEN 4
+#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_HI_LBN 96
+#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_HI_WIDTH 32
/* MC_CMD_WOL_FILTER_SET_IN_IPV4_SYN msgrequest */
#define MC_CMD_WOL_FILTER_SET_IN_IPV4_SYN_LEN 20
@@ -5476,6 +6460,7 @@
* Remove a WoL filter. Locks required: None. Returns: 0, EINVAL, ENOSYS
*/
#define MC_CMD_WOL_FILTER_REMOVE 0x33
+#define MC_CMD_WOL_FILTER_REMOVE_MSGSET 0x33
#undef MC_CMD_0x33_PRIVILEGE_CTG
#define MC_CMD_0x33_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -5495,6 +6480,7 @@
* ENOSYS
*/
#define MC_CMD_WOL_FILTER_RESET 0x34
+#define MC_CMD_WOL_FILTER_RESET_MSGSET 0x34
#undef MC_CMD_0x34_PRIVILEGE_CTG
#define MC_CMD_0x34_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -5515,6 +6501,7 @@
* Set the MCAST hash value without otherwise reconfiguring the MAC
*/
#define MC_CMD_SET_MCAST_HASH 0x35
+#define MC_CMD_SET_MCAST_HASH_MSGSET 0x35
/* MC_CMD_SET_MCAST_HASH_IN msgrequest */
#define MC_CMD_SET_MCAST_HASH_IN_LEN 32
@@ -5533,6 +6520,7 @@
* Locks required: none. Returns: 0
*/
#define MC_CMD_NVRAM_TYPES 0x36
+#define MC_CMD_NVRAM_TYPES_MSGSET 0x36
#undef MC_CMD_0x36_PRIVILEGE_CTG
#define MC_CMD_0x36_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -5595,6 +6583,7 @@
* EINVAL (bad type).
*/
#define MC_CMD_NVRAM_INFO 0x37
+#define MC_CMD_NVRAM_INFO_MSGSET 0x37
#undef MC_CMD_0x37_PRIVILEGE_CTG
#define MC_CMD_0x37_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -5692,6 +6681,7 @@
* EPERM.
*/
#define MC_CMD_NVRAM_UPDATE_START 0x38
+#define MC_CMD_NVRAM_UPDATE_START_MSGSET 0x38
#undef MC_CMD_0x38_PRIVILEGE_CTG
#define MC_CMD_0x38_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -5732,6 +6722,7 @@
* PHY_LOCK required and not held)
*/
#define MC_CMD_NVRAM_READ 0x39
+#define MC_CMD_NVRAM_READ_MSGSET 0x39
#undef MC_CMD_0x39_PRIVILEGE_CTG
#define MC_CMD_0x39_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -5803,6 +6794,7 @@
* PHY_LOCK required and not held)
*/
#define MC_CMD_NVRAM_WRITE 0x3a
+#define MC_CMD_NVRAM_WRITE_MSGSET 0x3a
#undef MC_CMD_0x3a_PRIVILEGE_CTG
#define MC_CMD_0x3a_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -5838,6 +6830,7 @@
* PHY_LOCK required and not held)
*/
#define MC_CMD_NVRAM_ERASE 0x3b
+#define MC_CMD_NVRAM_ERASE_MSGSET 0x3b
#undef MC_CMD_0x3b_PRIVILEGE_CTG
#define MC_CMD_0x3b_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -5868,6 +6861,7 @@
* the error EPERM.
*/
#define MC_CMD_NVRAM_UPDATE_FINISH 0x3c
+#define MC_CMD_NVRAM_UPDATE_FINISH_MSGSET 0x3c
#undef MC_CMD_0x3c_PRIVILEGE_CTG
#define MC_CMD_0x3c_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -5906,6 +6900,9 @@
#define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_POLL_VERIFY_RESULT_OFST 8
#define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_POLL_VERIFY_RESULT_LBN 2
#define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_POLL_VERIFY_RESULT_WIDTH 1
+#define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_ABORT_OFST 8
+#define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_ABORT_LBN 3
+#define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_ABORT_WIDTH 1
/* MC_CMD_NVRAM_UPDATE_FINISH_OUT msgresponse: Legacy NVRAM_UPDATE_FINISH
* response. Use NVRAM_UPDATE_FINISH_V2_OUT in new code
@@ -6036,6 +7033,7 @@
* DATALEN=0
*/
#define MC_CMD_REBOOT 0x3d
+#define MC_CMD_REBOOT_MSGSET 0x3d
#undef MC_CMD_0x3d_PRIVILEGE_CTG
#define MC_CMD_0x3d_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -6057,6 +7055,7 @@
* thread address.
*/
#define MC_CMD_SCHEDINFO 0x3e
+#define MC_CMD_SCHEDINFO_MSGSET 0x3e
#undef MC_CMD_0x3e_PRIVILEGE_CTG
#define MC_CMD_0x3e_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -6083,6 +7082,7 @@
* mode to the specified value. Returns the old mode.
*/
#define MC_CMD_REBOOT_MODE 0x3f
+#define MC_CMD_REBOOT_MODE_MSGSET 0x3f
#undef MC_CMD_0x3f_PRIVILEGE_CTG
#define MC_CMD_0x3f_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -6141,6 +7141,7 @@
* Locks required: None Returns: 0
*/
#define MC_CMD_SENSOR_INFO 0x41
+#define MC_CMD_SENSOR_INFO_MSGSET 0x41
#undef MC_CMD_0x41_PRIVILEGE_CTG
#define MC_CMD_0x41_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -6380,7 +7381,13 @@
#define MC_CMD_SENSOR_ENTRY_OFST 4
#define MC_CMD_SENSOR_ENTRY_LEN 8
#define MC_CMD_SENSOR_ENTRY_LO_OFST 4
+#define MC_CMD_SENSOR_ENTRY_LO_LEN 4
+#define MC_CMD_SENSOR_ENTRY_LO_LBN 32
+#define MC_CMD_SENSOR_ENTRY_LO_WIDTH 32
#define MC_CMD_SENSOR_ENTRY_HI_OFST 8
+#define MC_CMD_SENSOR_ENTRY_HI_LEN 4
+#define MC_CMD_SENSOR_ENTRY_HI_LBN 64
+#define MC_CMD_SENSOR_ENTRY_HI_WIDTH 32
#define MC_CMD_SENSOR_ENTRY_MINNUM 0
#define MC_CMD_SENSOR_ENTRY_MAXNUM 31
#define MC_CMD_SENSOR_ENTRY_MAXNUM_MCDI2 127
@@ -6402,7 +7409,13 @@
/* MC_CMD_SENSOR_ENTRY_OFST 4 */
/* MC_CMD_SENSOR_ENTRY_LEN 8 */
/* MC_CMD_SENSOR_ENTRY_LO_OFST 4 */
+/* MC_CMD_SENSOR_ENTRY_LO_LEN 4 */
+/* MC_CMD_SENSOR_ENTRY_LO_LBN 32 */
+/* MC_CMD_SENSOR_ENTRY_LO_WIDTH 32 */
/* MC_CMD_SENSOR_ENTRY_HI_OFST 8 */
+/* MC_CMD_SENSOR_ENTRY_HI_LEN 4 */
+/* MC_CMD_SENSOR_ENTRY_HI_LBN 64 */
+/* MC_CMD_SENSOR_ENTRY_HI_WIDTH 32 */
/* MC_CMD_SENSOR_ENTRY_MINNUM 0 */
/* MC_CMD_SENSOR_ENTRY_MAXNUM 31 */
/* MC_CMD_SENSOR_ENTRY_MAXNUM_MCDI2 127 */
@@ -6445,6 +7458,7 @@
* STATE_WARNING. Otherwise the board should not be expected to function.
*/
#define MC_CMD_READ_SENSORS 0x42
+#define MC_CMD_READ_SENSORS_MSGSET 0x42
#undef MC_CMD_0x42_PRIVILEGE_CTG
#define MC_CMD_0x42_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -6459,7 +7473,13 @@
#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_OFST 0
#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_LEN 8
#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_LO_OFST 0
+#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_LO_LBN 0
+#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_HI_OFST 4
+#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_HI_LBN 32
+#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_HI_WIDTH 32
/* MC_CMD_READ_SENSORS_EXT_IN msgrequest */
#define MC_CMD_READ_SENSORS_EXT_IN_LEN 12
@@ -6471,7 +7491,13 @@
#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_OFST 0
#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_LEN 8
#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_LO_OFST 0
+#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_LO_LBN 0
+#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_HI_OFST 4
+#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_HI_LBN 32
+#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_HI_WIDTH 32
/* Size in bytes of host buffer. */
#define MC_CMD_READ_SENSORS_EXT_IN_LENGTH_OFST 8
#define MC_CMD_READ_SENSORS_EXT_IN_LENGTH_LEN 4
@@ -6486,7 +7512,13 @@
#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_OFST 0
#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_LEN 8
#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_LO_OFST 0
+#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_LO_LEN 4
+#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_LO_LBN 0
+#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_HI_OFST 4
+#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_HI_LEN 4
+#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_HI_LBN 32
+#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_HI_WIDTH 32
/* Size in bytes of host buffer. */
#define MC_CMD_READ_SENSORS_EXT_IN_V2_LENGTH_OFST 8
#define MC_CMD_READ_SENSORS_EXT_IN_V2_LENGTH_LEN 4
@@ -6540,6 +7572,7 @@
* code: 0
*/
#define MC_CMD_GET_PHY_STATE 0x43
+#define MC_CMD_GET_PHY_STATE_MSGSET 0x43
#undef MC_CMD_0x43_PRIVILEGE_CTG
#define MC_CMD_0x43_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -6563,6 +7596,7 @@
* disable 802.Qbb for a given priority.
*/
#define MC_CMD_SETUP_8021QBB 0x44
+#define MC_CMD_SETUP_8021QBB_MSGSET 0x44
/* MC_CMD_SETUP_8021QBB_IN msgrequest */
#define MC_CMD_SETUP_8021QBB_IN_LEN 32
@@ -6578,6 +7612,7 @@
* Retrieve ID of any WoL filters. Locks required: None. Returns: 0, ENOSYS
*/
#define MC_CMD_WOL_FILTER_GET 0x45
+#define MC_CMD_WOL_FILTER_GET_MSGSET 0x45
#undef MC_CMD_0x45_PRIVILEGE_CTG
#define MC_CMD_0x45_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -6597,6 +7632,7 @@
* Returns: 0, ENOSYS
*/
#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD 0x46
+#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_MSGSET 0x46
#undef MC_CMD_0x46_PRIVILEGE_CTG
#define MC_CMD_0x46_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -6649,6 +7685,7 @@
* None. Returns: 0, ENOSYS
*/
#define MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD 0x47
+#define MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_MSGSET 0x47
#undef MC_CMD_0x47_PRIVILEGE_CTG
#define MC_CMD_0x47_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -6669,6 +7706,7 @@
* Restore MAC after block reset. Locks required: None. Returns: 0.
*/
#define MC_CMD_MAC_RESET_RESTORE 0x48
+#define MC_CMD_MAC_RESET_RESTORE_MSGSET 0x48
/* MC_CMD_MAC_RESET_RESTORE_IN msgrequest */
#define MC_CMD_MAC_RESET_RESTORE_IN_LEN 0
@@ -6684,6 +7722,7 @@
* required: None Returns: 0
*/
#define MC_CMD_TESTASSERT 0x49
+#define MC_CMD_TESTASSERT_MSGSET 0x49
#undef MC_CMD_0x49_PRIVILEGE_CTG
#define MC_CMD_0x49_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -6727,6 +7766,7 @@
* basis. Locks required: None. Returns: 0, EINVAL .
*/
#define MC_CMD_WORKAROUND 0x4a
+#define MC_CMD_WORKAROUND_MSGSET 0x4a
#undef MC_CMD_0x4a_PRIVILEGE_CTG
#define MC_CMD_0x4a_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -6790,6 +7830,7 @@
* Anything else: currently undefined. Locks required: None. Return code: 0.
*/
#define MC_CMD_GET_PHY_MEDIA_INFO 0x4b
+#define MC_CMD_GET_PHY_MEDIA_INFO_MSGSET 0x4b
#undef MC_CMD_0x4b_PRIVILEGE_CTG
#define MC_CMD_0x4b_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -6821,6 +7862,7 @@
* on the type of partition).
*/
#define MC_CMD_NVRAM_TEST 0x4c
+#define MC_CMD_NVRAM_TEST_MSGSET 0x4c
#undef MC_CMD_0x4c_PRIVILEGE_CTG
#define MC_CMD_0x4c_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -6851,6 +7893,7 @@
* they are configured first. Locks required: None. Return code: 0, EINVAL.
*/
#define MC_CMD_MRSFP_TWEAK 0x4d
+#define MC_CMD_MRSFP_TWEAK_MSGSET 0x4d
/* MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG msgrequest */
#define MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_LEN 16
@@ -6894,6 +7937,7 @@
* of range.
*/
#define MC_CMD_SENSOR_SET_LIMS 0x4e
+#define MC_CMD_SENSOR_SET_LIMS_MSGSET 0x4e
#undef MC_CMD_0x4e_PRIVILEGE_CTG
#define MC_CMD_0x4e_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -6925,6 +7969,7 @@
/* MC_CMD_GET_RESOURCE_LIMITS
*/
#define MC_CMD_GET_RESOURCE_LIMITS 0x4f
+#define MC_CMD_GET_RESOURCE_LIMITS_MSGSET 0x4f
/* MC_CMD_GET_RESOURCE_LIMITS_IN msgrequest */
#define MC_CMD_GET_RESOURCE_LIMITS_IN_LEN 0
@@ -6947,6 +7992,7 @@
* none. Returns: 0, EINVAL (bad type).
*/
#define MC_CMD_NVRAM_PARTITIONS 0x51
+#define MC_CMD_NVRAM_PARTITIONS_MSGSET 0x51
#undef MC_CMD_0x51_PRIVILEGE_CTG
#define MC_CMD_0x51_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -6977,6 +8023,7 @@
* none. Returns: 0, EINVAL (bad type).
*/
#define MC_CMD_NVRAM_METADATA 0x52
+#define MC_CMD_NVRAM_METADATA_MSGSET 0x52
#undef MC_CMD_0x52_PRIVILEGE_CTG
#define MC_CMD_0x52_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -7035,6 +8082,7 @@
* Returns the base MAC, count and stride for the requesting function
*/
#define MC_CMD_GET_MAC_ADDRESSES 0x55
+#define MC_CMD_GET_MAC_ADDRESSES_MSGSET 0x55
#undef MC_CMD_0x55_PRIVILEGE_CTG
#define MC_CMD_0x55_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -7066,6 +8114,7 @@
* SF-120509-TC and SF-117282-PS.
*/
#define MC_CMD_CLP 0x56
+#define MC_CMD_CLP_MSGSET 0x56
#undef MC_CMD_0x56_PRIVILEGE_CTG
#define MC_CMD_0x56_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -7188,6 +8237,7 @@
* Perform a MUM operation
*/
#define MC_CMD_MUM 0x57
+#define MC_CMD_MUM_MSGSET 0x57
#undef MC_CMD_0x57_PRIVILEGE_CTG
#define MC_CMD_0x57_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -7604,7 +8654,13 @@
#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_OFST 4
#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_LEN 8
#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_LO_OFST 4
+#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_LO_LEN 4
+#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_LO_LBN 32
+#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_LO_WIDTH 32
#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_HI_OFST 8
+#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_HI_LEN 4
+#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_HI_LBN 64
+#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_HI_WIDTH 32
/* MC_CMD_MUM_OUT_RAW_CMD msgresponse */
#define MC_CMD_MUM_OUT_RAW_CMD_LENMIN 1
@@ -7789,7 +8845,13 @@
#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_OFST 8
#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_LEN 8
#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_LO_OFST 8
+#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_LO_LEN 4
+#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_LO_LBN 64
+#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_LO_WIDTH 32
#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_HI_OFST 12
+#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_HI_LEN 4
+#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_HI_LBN 96
+#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_HI_WIDTH 32
#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_MINNUM 2
#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_MAXNUM 30
#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_MAXNUM_MCDI2 126
@@ -7986,6 +9048,7 @@
* sensor_query SPHINX service.
*/
#define MC_CMD_DYNAMIC_SENSORS_LIST 0x66
+#define MC_CMD_DYNAMIC_SENSORS_LIST_MSGSET 0x66
#undef MC_CMD_0x66_PRIVILEGE_CTG
#define MC_CMD_0x66_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -8031,6 +9094,7 @@
* `get_descriptions` in the sensor_query SPHINX service.
*/
#define MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS 0x67
+#define MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_MSGSET 0x67
#undef MC_CMD_0x67_PRIVILEGE_CTG
#define MC_CMD_0x67_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -8080,6 +9144,7 @@
* in the sensor_query SPHINX service.
*/
#define MC_CMD_DYNAMIC_SENSORS_GET_READINGS 0x68
+#define MC_CMD_DYNAMIC_SENSORS_GET_READINGS_MSGSET 0x68
#undef MC_CMD_0x68_PRIVILEGE_CTG
#define MC_CMD_0x68_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -8117,6 +9182,7 @@
* receive (Riverhead).
*/
#define MC_CMD_EVENT_CTRL 0x69
+#define MC_CMD_EVENT_CTRL_MSGSET 0x69
#undef MC_CMD_0x69_PRIVILEGE_CTG
#define MC_CMD_0x69_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -8197,7 +9263,13 @@
#define BUFTBL_ENTRY_RAWADDR_OFST 4
#define BUFTBL_ENTRY_RAWADDR_LEN 8
#define BUFTBL_ENTRY_RAWADDR_LO_OFST 4
+#define BUFTBL_ENTRY_RAWADDR_LO_LEN 4
+#define BUFTBL_ENTRY_RAWADDR_LO_LBN 32
+#define BUFTBL_ENTRY_RAWADDR_LO_WIDTH 32
#define BUFTBL_ENTRY_RAWADDR_HI_OFST 8
+#define BUFTBL_ENTRY_RAWADDR_HI_LEN 4
+#define BUFTBL_ENTRY_RAWADDR_HI_LBN 64
+#define BUFTBL_ENTRY_RAWADDR_HI_WIDTH 32
#define BUFTBL_ENTRY_RAWADDR_LBN 32
#define BUFTBL_ENTRY_RAWADDR_WIDTH 64
@@ -8207,14 +9279,25 @@
#define NVRAM_PARTITION_TYPE_ID_LEN 2
/* enum: Primary MC firmware partition */
#define NVRAM_PARTITION_TYPE_MC_FIRMWARE 0x100
+/* enum: NMC firmware partition (this is intentionally an alias of MC_FIRMWARE)
+ */
+#define NVRAM_PARTITION_TYPE_NMC_FIRMWARE 0x100
/* enum: Secondary MC firmware partition */
#define NVRAM_PARTITION_TYPE_MC_FIRMWARE_BACKUP 0x200
/* enum: Expansion ROM partition */
#define NVRAM_PARTITION_TYPE_EXPANSION_ROM 0x300
/* enum: Static configuration TLV partition */
#define NVRAM_PARTITION_TYPE_STATIC_CONFIG 0x400
+/* enum: Factory configuration TLV partition (this is intentionally an alias of
+ * STATIC_CONFIG)
+ */
+#define NVRAM_PARTITION_TYPE_FACTORY_CONFIG 0x400
/* enum: Dynamic configuration TLV partition */
#define NVRAM_PARTITION_TYPE_DYNAMIC_CONFIG 0x500
+/* enum: User configuration TLV partition (this is intentionally an alias of
+ * DYNAMIC_CONFIG)
+ */
+#define NVRAM_PARTITION_TYPE_USER_CONFIG 0x500
/* enum: Expansion ROM configuration data for port 0 */
#define NVRAM_PARTITION_TYPE_EXPROM_CONFIG_PORT0 0x600
/* enum: Synonym for EXPROM_CONFIG_PORT0 as used in pmap files */
@@ -8227,10 +9310,16 @@
#define NVRAM_PARTITION_TYPE_EXPROM_CONFIG_PORT3 0x603
/* enum: Non-volatile log output partition */
#define NVRAM_PARTITION_TYPE_LOG 0x700
+/* enum: Non-volatile log output partition for NMC firmware (this is
+ * intentionally an alias of LOG)
+ */
+#define NVRAM_PARTITION_TYPE_NMC_LOG 0x700
/* enum: Non-volatile log output of second core on dual-core device */
#define NVRAM_PARTITION_TYPE_LOG_SLAVE 0x701
/* enum: Device state dump output partition */
#define NVRAM_PARTITION_TYPE_DUMP 0x800
+/* enum: Crash log partition for NMC firmware */
+#define NVRAM_PARTITION_TYPE_NMC_CRASH_LOG 0x801
/* enum: Application license key storage partition */
#define NVRAM_PARTITION_TYPE_LICENSE 0x900
/* enum: Start of range used for PHY partitions (low 8 bits are the PHY ID) */
@@ -8247,6 +9336,16 @@
#define NVRAM_PARTITION_TYPE_FC_LICENSE 0xb03
/* enum: Non-volatile log output partition for FC */
#define NVRAM_PARTITION_TYPE_FC_LOG 0xb04
+/* enum: FPGA Stage 1 bitstream */
+#define NVRAM_PARTITION_TYPE_FPGA_STAGE1 0xb05
+/* enum: FPGA Stage 2 bitstream */
+#define NVRAM_PARTITION_TYPE_FPGA_STAGE2 0xb06
+/* enum: FPGA User XCLBIN / Programmable Region 0 bitstream */
+#define NVRAM_PARTITION_TYPE_FPGA_REGION0 0xb07
+/* enum: FPGA jump instruction (a.k.a. boot) partition to select Stage1
+ * bitstream
+ */
+#define NVRAM_PARTITION_TYPE_FPGA_JUMP 0xb08
/* enum: MUM firmware partition */
#define NVRAM_PARTITION_TYPE_MUM_FIRMWARE 0xc00
/* enum: SUC firmware partition (this is intentionally an alias of
@@ -8255,6 +9354,10 @@
#define NVRAM_PARTITION_TYPE_SUC_FIRMWARE 0xc00
/* enum: MUM Non-volatile log output partition. */
#define NVRAM_PARTITION_TYPE_MUM_LOG 0xc01
+/* enum: SUC Non-volatile log output partition (this is intentionally an alias
+ * of MUM_LOG).
+ */
+#define NVRAM_PARTITION_TYPE_SUC_LOG 0xc01
/* enum: MUM Application table partition. */
#define NVRAM_PARTITION_TYPE_MUM_APPTABLE 0xc02
/* enum: MUM boot rom partition. */
@@ -8269,6 +9372,10 @@
#define NVRAM_PARTITION_TYPE_EXPANSION_UEFI 0xd00
/* enum: Used by the expansion ROM for logging */
#define NVRAM_PARTITION_TYPE_PXE_LOG 0x1000
+/* enum: Non-volatile log output partition for Expansion ROM (this is
+ * intentionally an alias of PXE_LOG).
+ */
+#define NVRAM_PARTITION_TYPE_EXPROM_LOG 0x1000
/* enum: Used for XIP code of shmbooted images */
#define NVRAM_PARTITION_TYPE_XIP_SCRATCH 0x1100
/* enum: Spare partition 2 */
@@ -8277,6 +9384,10 @@
* between XJTAG and Manftest.
*/
#define NVRAM_PARTITION_TYPE_MANUFACTURING 0x1300
+/* enum: Deployment configuration TLV partition (this is intentionally an alias
+ * of MANUFACTURING)
+ */
+#define NVRAM_PARTITION_TYPE_DEPLOYMENT_CONFIG 0x1300
/* enum: Spare partition 4 */
#define NVRAM_PARTITION_TYPE_SPARE_4 0x1400
/* enum: Spare partition 5 */
@@ -8312,14 +9423,43 @@
#define NVRAM_PARTITION_TYPE_BUNDLE_LOG 0x1e02
/* enum: Partition for Solarflare gPXE bootrom installed via Bundle update. */
#define NVRAM_PARTITION_TYPE_EXPANSION_ROM_INTERNAL 0x1e03
+/* enum: Test partition on SmartNIC system microcontroller (SUC) */
+#define NVRAM_PARTITION_TYPE_SUC_TEST 0x1f00
+/* enum: System microcontroller access to primary FPGA flash. */
+#define NVRAM_PARTITION_TYPE_SUC_FPGA_PRIMARY 0x1f01
+/* enum: System microcontroller access to secondary FPGA flash (if present) */
+#define NVRAM_PARTITION_TYPE_SUC_FPGA_SECONDARY 0x1f02
+/* enum: System microcontroller access to primary System-on-Chip flash */
+#define NVRAM_PARTITION_TYPE_SUC_SOC_PRIMARY 0x1f03
+/* enum: System microcontroller access to secondary System-on-Chip flash (if
+ * present)
+ */
+#define NVRAM_PARTITION_TYPE_SUC_SOC_SECONDARY 0x1f04
+/* enum: System microcontroller critical failure logs. Contains structured
+ * details of sensors leading up to a critical failure (where the board is shut
+ * down).
+ */
+#define NVRAM_PARTITION_TYPE_SUC_FAILURE_LOG 0x1f05
+/* enum: System-on-Chip configuration information (see XN-200467-PS). */
+#define NVRAM_PARTITION_TYPE_SUC_SOC_CONFIG 0x1f07
+/* enum: System-on-Chip update information. */
+#define NVRAM_PARTITION_TYPE_SOC_UPDATE 0x2003
/* enum: Start of reserved value range (firmware may use for any purpose) */
#define NVRAM_PARTITION_TYPE_RESERVED_VALUES_MIN 0xff00
/* enum: End of reserved value range (firmware may use for any purpose) */
#define NVRAM_PARTITION_TYPE_RESERVED_VALUES_MAX 0xfffd
/* enum: Recovery partition map (provided if real map is missing or corrupt) */
#define NVRAM_PARTITION_TYPE_RECOVERY_MAP 0xfffe
+/* enum: Recovery Flash Partition Table, see SF-122606-TC. (this is
+ * intentionally an alias of RECOVERY_MAP)
+ */
+#define NVRAM_PARTITION_TYPE_RECOVERY_FPT 0xfffe
/* enum: Partition map (real map as stored in flash) */
#define NVRAM_PARTITION_TYPE_PARTITION_MAP 0xffff
+/* enum: Flash Partition Table, see SF-122606-TC. (this is intentionally an
+ * alias of PARTITION_MAP)
+ */
+#define NVRAM_PARTITION_TYPE_FPT 0xffff
#define NVRAM_PARTITION_TYPE_ID_LBN 0
#define NVRAM_PARTITION_TYPE_ID_WIDTH 16
@@ -8368,7 +9508,13 @@
#define LICENSED_FEATURES_MASK_OFST 0
#define LICENSED_FEATURES_MASK_LEN 8
#define LICENSED_FEATURES_MASK_LO_OFST 0
+#define LICENSED_FEATURES_MASK_LO_LEN 4
+#define LICENSED_FEATURES_MASK_LO_LBN 0
+#define LICENSED_FEATURES_MASK_LO_WIDTH 32
#define LICENSED_FEATURES_MASK_HI_OFST 4
+#define LICENSED_FEATURES_MASK_HI_LEN 4
+#define LICENSED_FEATURES_MASK_HI_LBN 32
+#define LICENSED_FEATURES_MASK_HI_WIDTH 32
#define LICENSED_FEATURES_RX_CUT_THROUGH_OFST 0
#define LICENSED_FEATURES_RX_CUT_THROUGH_LBN 0
#define LICENSED_FEATURES_RX_CUT_THROUGH_WIDTH 1
@@ -8408,7 +9554,13 @@
#define LICENSED_V3_APPS_MASK_OFST 0
#define LICENSED_V3_APPS_MASK_LEN 8
#define LICENSED_V3_APPS_MASK_LO_OFST 0
+#define LICENSED_V3_APPS_MASK_LO_LEN 4
+#define LICENSED_V3_APPS_MASK_LO_LBN 0
+#define LICENSED_V3_APPS_MASK_LO_WIDTH 32
#define LICENSED_V3_APPS_MASK_HI_OFST 4
+#define LICENSED_V3_APPS_MASK_HI_LEN 4
+#define LICENSED_V3_APPS_MASK_HI_LBN 32
+#define LICENSED_V3_APPS_MASK_HI_WIDTH 32
#define LICENSED_V3_APPS_ONLOAD_OFST 0
#define LICENSED_V3_APPS_ONLOAD_LBN 0
#define LICENSED_V3_APPS_ONLOAD_WIDTH 1
@@ -8466,7 +9618,13 @@
#define LICENSED_V3_FEATURES_MASK_OFST 0
#define LICENSED_V3_FEATURES_MASK_LEN 8
#define LICENSED_V3_FEATURES_MASK_LO_OFST 0
+#define LICENSED_V3_FEATURES_MASK_LO_LEN 4
+#define LICENSED_V3_FEATURES_MASK_LO_LBN 0
+#define LICENSED_V3_FEATURES_MASK_LO_WIDTH 32
#define LICENSED_V3_FEATURES_MASK_HI_OFST 4
+#define LICENSED_V3_FEATURES_MASK_HI_LEN 4
+#define LICENSED_V3_FEATURES_MASK_HI_LBN 32
+#define LICENSED_V3_FEATURES_MASK_HI_WIDTH 32
#define LICENSED_V3_FEATURES_RX_CUT_THROUGH_OFST 0
#define LICENSED_V3_FEATURES_RX_CUT_THROUGH_LBN 0
#define LICENSED_V3_FEATURES_RX_CUT_THROUGH_WIDTH 1
@@ -8617,6 +9775,7 @@
* Get a dump of the MCPU registers
*/
#define MC_CMD_READ_REGS 0x50
+#define MC_CMD_READ_REGS_MSGSET 0x50
#undef MC_CMD_0x50_PRIVILEGE_CTG
#define MC_CMD_0x50_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -8643,6 +9802,7 @@
* end with an address for each 4k of host memory required to back the EVQ.
*/
#define MC_CMD_INIT_EVQ 0x80
+#define MC_CMD_INIT_EVQ_MSGSET 0x80
#undef MC_CMD_0x80_PRIVILEGE_CTG
#define MC_CMD_0x80_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -8657,7 +9817,8 @@
#define MC_CMD_INIT_EVQ_IN_SIZE_OFST 0
#define MC_CMD_INIT_EVQ_IN_SIZE_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_EVQ_IN_INSTANCE_OFST 4
#define MC_CMD_INIT_EVQ_IN_INSTANCE_LEN 4
@@ -8729,7 +9890,13 @@
#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_OFST 36
#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_LO_OFST 36
+#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_LO_LBN 288
+#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_HI_OFST 40
+#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_HI_LBN 320
+#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_MINNUM 1
#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_MAXNUM 64
#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_MAXNUM_MCDI2 64
@@ -8750,7 +9917,8 @@
#define MC_CMD_INIT_EVQ_V2_IN_SIZE_OFST 0
#define MC_CMD_INIT_EVQ_V2_IN_SIZE_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_EVQ_V2_IN_INSTANCE_OFST 4
#define MC_CMD_INIT_EVQ_V2_IN_INSTANCE_LEN 4
@@ -8847,7 +10015,13 @@
#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_OFST 36
#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_LO_OFST 36
+#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_LO_LBN 288
+#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_HI_OFST 40
+#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_HI_LBN 320
+#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_MINNUM 1
#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_MAXNUM 64
#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_MAXNUM_MCDI2 64
@@ -8900,6 +10074,7 @@
* the RXQ.
*/
#define MC_CMD_INIT_RXQ 0x81
+#define MC_CMD_INIT_RXQ_MSGSET 0x81
#undef MC_CMD_0x81_PRIVILEGE_CTG
#define MC_CMD_0x81_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -8923,7 +10098,8 @@
#define MC_CMD_INIT_RXQ_IN_LABEL_OFST 8
#define MC_CMD_INIT_RXQ_IN_LABEL_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_RXQ_IN_INSTANCE_OFST 12
#define MC_CMD_INIT_RXQ_IN_INSTANCE_LEN 4
@@ -8964,7 +10140,13 @@
#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_OFST 28
#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_LO_OFST 28
+#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_LO_LBN 224
+#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_HI_OFST 32
+#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_HI_LBN 256
+#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_MINNUM 1
#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_MAXNUM 28
#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_MAXNUM_MCDI2 124
@@ -8988,7 +10170,8 @@
#define MC_CMD_INIT_RXQ_EXT_IN_LABEL_OFST 8
#define MC_CMD_INIT_RXQ_EXT_IN_LABEL_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_RXQ_EXT_IN_INSTANCE_OFST 12
#define MC_CMD_INIT_RXQ_EXT_IN_INSTANCE_LEN 4
@@ -9062,7 +10245,13 @@
#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_OFST 28
#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_LO_OFST 28
+#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_LO_LBN 224
+#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_HI_OFST 32
+#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_HI_LBN 256
+#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_NUM 64
/* Maximum length of packet to receive, if SNAPSHOT_MODE flag is set */
#define MC_CMD_INIT_RXQ_EXT_IN_SNAPSHOT_LENGTH_OFST 540
@@ -9085,7 +10274,8 @@
#define MC_CMD_INIT_RXQ_V3_IN_LABEL_OFST 8
#define MC_CMD_INIT_RXQ_V3_IN_LABEL_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_RXQ_V3_IN_INSTANCE_OFST 12
#define MC_CMD_INIT_RXQ_V3_IN_INSTANCE_LEN 4
@@ -9159,7 +10349,13 @@
#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_OFST 28
#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_LO_OFST 28
+#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_LO_LBN 224
+#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_HI_OFST 32
+#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_HI_LBN 256
+#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_NUM 64
/* Maximum length of packet to receive, if SNAPSHOT_MODE flag is set */
#define MC_CMD_INIT_RXQ_V3_IN_SNAPSHOT_LENGTH_OFST 540
@@ -9211,7 +10407,8 @@
#define MC_CMD_INIT_RXQ_V4_IN_LABEL_OFST 8
#define MC_CMD_INIT_RXQ_V4_IN_LABEL_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_RXQ_V4_IN_INSTANCE_OFST 12
#define MC_CMD_INIT_RXQ_V4_IN_INSTANCE_LEN 4
@@ -9285,7 +10482,13 @@
#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_OFST 28
#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_LO_OFST 28
+#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_LO_LBN 224
+#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_HI_OFST 32
+#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_HI_LBN 256
+#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_NUM 64
/* Maximum length of packet to receive, if SNAPSHOT_MODE flag is set */
#define MC_CMD_INIT_RXQ_V4_IN_SNAPSHOT_LENGTH_OFST 540
@@ -9350,7 +10553,8 @@
#define MC_CMD_INIT_RXQ_V5_IN_LABEL_OFST 8
#define MC_CMD_INIT_RXQ_V5_IN_LABEL_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_RXQ_V5_IN_INSTANCE_OFST 12
#define MC_CMD_INIT_RXQ_V5_IN_INSTANCE_LEN 4
@@ -9424,7 +10628,13 @@
#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_OFST 28
#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_LO_OFST 28
+#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_LO_LBN 224
+#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_HI_OFST 32
+#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_HI_LBN 256
+#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_NUM 64
/* Maximum length of packet to receive, if SNAPSHOT_MODE flag is set */
#define MC_CMD_INIT_RXQ_V5_IN_SNAPSHOT_LENGTH_OFST 540
@@ -9497,6 +10707,7 @@
/* MC_CMD_INIT_TXQ
*/
#define MC_CMD_INIT_TXQ 0x82
+#define MC_CMD_INIT_TXQ_MSGSET 0x82
#undef MC_CMD_0x82_PRIVILEGE_CTG
#define MC_CMD_0x82_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -9521,7 +10732,8 @@
#define MC_CMD_INIT_TXQ_IN_LABEL_OFST 8
#define MC_CMD_INIT_TXQ_IN_LABEL_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_TXQ_IN_INSTANCE_OFST 12
#define MC_CMD_INIT_TXQ_IN_INSTANCE_LEN 4
@@ -9565,7 +10777,13 @@
#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_OFST 28
#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_LO_OFST 28
+#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_LO_LBN 224
+#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_HI_OFST 32
+#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_HI_LBN 256
+#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_MINNUM 1
#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_MAXNUM 28
#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_MAXNUM_MCDI2 124
@@ -9586,7 +10804,8 @@
#define MC_CMD_INIT_TXQ_EXT_IN_LABEL_OFST 8
#define MC_CMD_INIT_TXQ_EXT_IN_LABEL_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_TXQ_EXT_IN_INSTANCE_OFST 12
#define MC_CMD_INIT_TXQ_EXT_IN_INSTANCE_LEN 4
@@ -9648,7 +10867,13 @@
#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_OFST 28
#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_LO_OFST 28
+#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_LO_LBN 224
+#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_HI_OFST 32
+#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_HI_LBN 256
+#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_MINNUM 1
#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_MAXNUM 64
#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_MAXNUM_MCDI2 64
@@ -9674,6 +10899,7 @@
* or the operation will fail with EBUSY
*/
#define MC_CMD_FINI_EVQ 0x83
+#define MC_CMD_FINI_EVQ_MSGSET 0x83
#undef MC_CMD_0x83_PRIVILEGE_CTG
#define MC_CMD_0x83_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -9695,6 +10921,7 @@
* Teardown a RXQ.
*/
#define MC_CMD_FINI_RXQ 0x84
+#define MC_CMD_FINI_RXQ_MSGSET 0x84
#undef MC_CMD_0x84_PRIVILEGE_CTG
#define MC_CMD_0x84_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -9714,6 +10941,7 @@
* Teardown a TXQ.
*/
#define MC_CMD_FINI_TXQ 0x85
+#define MC_CMD_FINI_TXQ_MSGSET 0x85
#undef MC_CMD_0x85_PRIVILEGE_CTG
#define MC_CMD_0x85_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -9733,6 +10961,7 @@
* Generate an event on an EVQ belonging to the function issuing the command.
*/
#define MC_CMD_DRIVER_EVENT 0x86
+#define MC_CMD_DRIVER_EVENT_MSGSET 0x86
#undef MC_CMD_0x86_PRIVILEGE_CTG
#define MC_CMD_0x86_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -9746,7 +10975,13 @@
#define MC_CMD_DRIVER_EVENT_IN_DATA_OFST 4
#define MC_CMD_DRIVER_EVENT_IN_DATA_LEN 8
#define MC_CMD_DRIVER_EVENT_IN_DATA_LO_OFST 4
+#define MC_CMD_DRIVER_EVENT_IN_DATA_LO_LEN 4
+#define MC_CMD_DRIVER_EVENT_IN_DATA_LO_LBN 32
+#define MC_CMD_DRIVER_EVENT_IN_DATA_LO_WIDTH 32
#define MC_CMD_DRIVER_EVENT_IN_DATA_HI_OFST 8
+#define MC_CMD_DRIVER_EVENT_IN_DATA_HI_LEN 4
+#define MC_CMD_DRIVER_EVENT_IN_DATA_HI_LBN 64
+#define MC_CMD_DRIVER_EVENT_IN_DATA_HI_WIDTH 32
/* MC_CMD_DRIVER_EVENT_OUT msgresponse */
#define MC_CMD_DRIVER_EVENT_OUT_LEN 0
@@ -9760,6 +10995,7 @@
* MC_CMD_SET_FUNC, which remains available for Siena but now deprecated.
*/
#define MC_CMD_PROXY_CMD 0x5b
+#define MC_CMD_PROXY_CMD_MSGSET 0x5b
#undef MC_CMD_0x5b_PRIVILEGE_CTG
#define MC_CMD_0x5b_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -9828,6 +11064,7 @@
* a designated admin function
*/
#define MC_CMD_PROXY_CONFIGURE 0x58
+#define MC_CMD_PROXY_CONFIGURE_MSGSET 0x58
#undef MC_CMD_0x58_PRIVILEGE_CTG
#define MC_CMD_0x58_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -9845,7 +11082,13 @@
#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_OFST 4
#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_LEN 8
#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_LO_OFST 4
+#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_LO_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_LO_LBN 32
+#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_LO_WIDTH 32
#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_HI_OFST 8
+#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_HI_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_HI_LBN 64
+#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_HI_WIDTH 32
/* Must be a power of 2 */
#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BLOCK_SIZE_OFST 12
#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BLOCK_SIZE_LEN 4
@@ -9855,7 +11098,13 @@
#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_OFST 16
#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_LEN 8
#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_LO_OFST 16
+#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_LO_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_LO_LBN 128
+#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_LO_WIDTH 32
#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_HI_OFST 20
+#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_HI_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_HI_LBN 160
+#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_HI_WIDTH 32
/* Must be a power of 2 */
#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BLOCK_SIZE_OFST 24
#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BLOCK_SIZE_LEN 4
@@ -9866,7 +11115,13 @@
#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_OFST 28
#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_LEN 8
#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_LO_OFST 28
+#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_LO_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_LO_LBN 224
+#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_LO_WIDTH 32
#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_HI_OFST 32
+#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_HI_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_HI_LBN 256
+#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_HI_WIDTH 32
/* Must be a power of 2, or zero if this buffer is not provided */
#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BLOCK_SIZE_OFST 36
#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BLOCK_SIZE_LEN 4
@@ -9890,7 +11145,13 @@
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_OFST 4
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_LEN 8
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_LO_OFST 4
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_LO_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_LO_LBN 32
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_LO_WIDTH 32
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_HI_OFST 8
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_HI_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_HI_LBN 64
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_HI_WIDTH 32
/* Must be a power of 2 */
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BLOCK_SIZE_OFST 12
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BLOCK_SIZE_LEN 4
@@ -9900,7 +11161,13 @@
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_OFST 16
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_LEN 8
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_LO_OFST 16
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_LO_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_LO_LBN 128
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_LO_WIDTH 32
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_HI_OFST 20
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_HI_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_HI_LBN 160
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_HI_WIDTH 32
/* Must be a power of 2 */
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BLOCK_SIZE_OFST 24
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BLOCK_SIZE_LEN 4
@@ -9911,7 +11178,13 @@
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_OFST 28
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_LEN 8
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_LO_OFST 28
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_LO_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_LO_LBN 224
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_LO_WIDTH 32
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_HI_OFST 32
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_HI_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_HI_LBN 256
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_HI_WIDTH 32
/* Must be a power of 2, or zero if this buffer is not provided */
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BLOCK_SIZE_OFST 36
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BLOCK_SIZE_LEN 4
@@ -9936,6 +11209,7 @@
* MC_CMD_PROXY_CONFIGURE).
*/
#define MC_CMD_PROXY_COMPLETE 0x5f
+#define MC_CMD_PROXY_COMPLETE_MSGSET 0x5f
#undef MC_CMD_0x5f_PRIVILEGE_CTG
#define MC_CMD_0x5f_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -9974,6 +11248,7 @@
* cannot do so). The buffer table entries will initially be zeroed.
*/
#define MC_CMD_ALLOC_BUFTBL_CHUNK 0x87
+#define MC_CMD_ALLOC_BUFTBL_CHUNK_MSGSET 0x87
#undef MC_CMD_0x87_PRIVILEGE_CTG
#define MC_CMD_0x87_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -10005,6 +11280,7 @@
* Reprogram a set of buffer table entries in the specified chunk.
*/
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES 0x88
+#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_MSGSET 0x88
#undef MC_CMD_0x88_PRIVILEGE_CTG
#define MC_CMD_0x88_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -10027,7 +11303,13 @@
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_OFST 12
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LEN 8
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LO_OFST 12
+#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LO_LEN 4
+#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LO_LBN 96
+#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LO_WIDTH 32
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_HI_OFST 16
+#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_HI_LEN 4
+#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_HI_LBN 128
+#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_HI_WIDTH 32
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_MINNUM 1
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_MAXNUM 32
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_MAXNUM_MCDI2 32
@@ -10040,6 +11322,7 @@
/* MC_CMD_FREE_BUFTBL_CHUNK
*/
#define MC_CMD_FREE_BUFTBL_CHUNK 0x89
+#define MC_CMD_FREE_BUFTBL_CHUNK_MSGSET 0x89
#undef MC_CMD_0x89_PRIVILEGE_CTG
#define MC_CMD_0x89_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -10058,6 +11341,7 @@
* Multiplexed MCDI call for filter operations
*/
#define MC_CMD_FILTER_OP 0x8a
+#define MC_CMD_FILTER_OP_MSGSET 0x8a
#undef MC_CMD_0x8a_PRIVILEGE_CTG
#define MC_CMD_0x8a_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -10083,7 +11367,13 @@
#define MC_CMD_FILTER_OP_IN_HANDLE_OFST 4
#define MC_CMD_FILTER_OP_IN_HANDLE_LEN 8
#define MC_CMD_FILTER_OP_IN_HANDLE_LO_OFST 4
+#define MC_CMD_FILTER_OP_IN_HANDLE_LO_LEN 4
+#define MC_CMD_FILTER_OP_IN_HANDLE_LO_LBN 32
+#define MC_CMD_FILTER_OP_IN_HANDLE_LO_WIDTH 32
#define MC_CMD_FILTER_OP_IN_HANDLE_HI_OFST 8
+#define MC_CMD_FILTER_OP_IN_HANDLE_HI_LEN 4
+#define MC_CMD_FILTER_OP_IN_HANDLE_HI_LBN 64
+#define MC_CMD_FILTER_OP_IN_HANDLE_HI_WIDTH 32
/* The port ID associated with the v-adaptor which should contain this filter.
*/
#define MC_CMD_FILTER_OP_IN_PORT_ID_OFST 12
@@ -10239,7 +11529,13 @@
#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_OFST 4
#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_LEN 8
#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_LO_OFST 4
+#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_LO_LEN 4
+#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_LO_LBN 32
+#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_LO_WIDTH 32
#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_HI_OFST 8
+#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_HI_LEN 4
+#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_HI_LBN 64
+#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_HI_WIDTH 32
/* The port ID associated with the v-adaptor which should contain this filter.
*/
#define MC_CMD_FILTER_OP_EXT_IN_PORT_ID_OFST 12
@@ -10518,7 +11814,13 @@
#define MC_CMD_FILTER_OP_V3_IN_HANDLE_OFST 4
#define MC_CMD_FILTER_OP_V3_IN_HANDLE_LEN 8
#define MC_CMD_FILTER_OP_V3_IN_HANDLE_LO_OFST 4
+#define MC_CMD_FILTER_OP_V3_IN_HANDLE_LO_LEN 4
+#define MC_CMD_FILTER_OP_V3_IN_HANDLE_LO_LBN 32
+#define MC_CMD_FILTER_OP_V3_IN_HANDLE_LO_WIDTH 32
#define MC_CMD_FILTER_OP_V3_IN_HANDLE_HI_OFST 8
+#define MC_CMD_FILTER_OP_V3_IN_HANDLE_HI_LEN 4
+#define MC_CMD_FILTER_OP_V3_IN_HANDLE_HI_LBN 64
+#define MC_CMD_FILTER_OP_V3_IN_HANDLE_HI_WIDTH 32
/* The port ID associated with the v-adaptor which should contain this filter.
*/
#define MC_CMD_FILTER_OP_V3_IN_PORT_ID_OFST 12
@@ -10779,15 +12081,15 @@
*/
#define MC_CMD_FILTER_OP_V3_IN_IFRM_DST_IP_OFST 156
#define MC_CMD_FILTER_OP_V3_IN_IFRM_DST_IP_LEN 16
-/* Flags controlling mutations of the user_mark and user_flag fields of
- * matching packets, with logic as follows: if (req.MATCH_BITOR_FLAG == 1)
- * user_flag = req.MATCH_SET_FLAG bit_or user_flag; else user_flag =
- * req.MATCH_SET_FLAG; if (req.MATCH_SET_MARK == 0) user_mark = 0; else if
- * (req.MATCH_BITOR_MARK == 1) user_mark = req.MATCH_SET_MARK bit_or user_mark;
- * else user_mark = req.MATCH_SET_MARK; N.B. These flags overlap with the
- * MATCH_ACTION field, which is deprecated in favour of this field. For the
- * cases where these flags induce a valid encoding of the MATCH_ACTION field,
- * the semantics agree.
+/* Flags controlling mutations of the packet and/or metadata when the filter is
+ * matched. The user_mark and user_flag fields' logic is as follows: if
+ * (req.MATCH_BITOR_FLAG == 1) user_flag = req.MATCH_SET_FLAG bit_or user_flag;
+ * else user_flag = req.MATCH_SET_FLAG; if (req.MATCH_SET_MARK == 0) user_mark
+ * = 0; else if (req.MATCH_BITOR_MARK == 1) user_mark = req.MATCH_SET_MARK
+ * bit_or user_mark; else user_mark = req.MATCH_SET_MARK; N.B. These flags
+ * overlap with the MATCH_ACTION field, which is deprecated in favour of this
+ * field. For the cases where these flags induce a valid encoding of the
+ * MATCH_ACTION field, the semantics agree.
*/
#define MC_CMD_FILTER_OP_V3_IN_MATCH_ACTION_FLAGS_OFST 172
#define MC_CMD_FILTER_OP_V3_IN_MATCH_ACTION_FLAGS_LEN 4
@@ -10803,6 +12105,9 @@
#define MC_CMD_FILTER_OP_V3_IN_MATCH_BITOR_MARK_OFST 172
#define MC_CMD_FILTER_OP_V3_IN_MATCH_BITOR_MARK_LBN 3
#define MC_CMD_FILTER_OP_V3_IN_MATCH_BITOR_MARK_WIDTH 1
+#define MC_CMD_FILTER_OP_V3_IN_MATCH_STRIP_VLAN_OFST 172
+#define MC_CMD_FILTER_OP_V3_IN_MATCH_STRIP_VLAN_LBN 4
+#define MC_CMD_FILTER_OP_V3_IN_MATCH_STRIP_VLAN_WIDTH 1
/* Deprecated: the overlapping MATCH_ACTION_FLAGS field exposes all of the
* functionality of this field in an ABI-backwards-compatible manner, and
* should be used instead. Any future extensions should be made to the
@@ -10848,7 +12153,13 @@
#define MC_CMD_FILTER_OP_OUT_HANDLE_OFST 4
#define MC_CMD_FILTER_OP_OUT_HANDLE_LEN 8
#define MC_CMD_FILTER_OP_OUT_HANDLE_LO_OFST 4
+#define MC_CMD_FILTER_OP_OUT_HANDLE_LO_LEN 4
+#define MC_CMD_FILTER_OP_OUT_HANDLE_LO_LBN 32
+#define MC_CMD_FILTER_OP_OUT_HANDLE_LO_WIDTH 32
#define MC_CMD_FILTER_OP_OUT_HANDLE_HI_OFST 8
+#define MC_CMD_FILTER_OP_OUT_HANDLE_HI_LEN 4
+#define MC_CMD_FILTER_OP_OUT_HANDLE_HI_LBN 64
+#define MC_CMD_FILTER_OP_OUT_HANDLE_HI_WIDTH 32
/* enum: guaranteed invalid filter handle (low 32 bits) */
#define MC_CMD_FILTER_OP_OUT_HANDLE_LO_INVALID 0xffffffff
/* enum: guaranteed invalid filter handle (high 32 bits) */
@@ -10868,7 +12179,13 @@
#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_OFST 4
#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_LEN 8
#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_LO_OFST 4
+#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_LO_LEN 4
+#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_LO_LBN 32
+#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_LO_WIDTH 32
#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_HI_OFST 8
+#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_HI_LEN 4
+#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_HI_LBN 64
+#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_HI_WIDTH 32
/* Enum values, see field(s): */
/* MC_CMD_FILTER_OP_OUT/HANDLE */
@@ -10878,6 +12195,7 @@
* Get information related to the parser-dispatcher subsystem
*/
#define MC_CMD_GET_PARSER_DISP_INFO 0xe4
+#define MC_CMD_GET_PARSER_DISP_INFO_MSGSET 0xe4
#undef MC_CMD_0xe4_PRIVILEGE_CTG
#define MC_CMD_0xe4_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11025,6 +12343,7 @@
* permitted.
*/
#define MC_CMD_PARSER_DISP_RW 0xe5
+#define MC_CMD_PARSER_DISP_RW_MSGSET 0xe5
#undef MC_CMD_0xe5_PRIVILEGE_CTG
#define MC_CMD_0xe5_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -11115,6 +12434,7 @@
* Get number of PFs on the device.
*/
#define MC_CMD_GET_PF_COUNT 0xb6
+#define MC_CMD_GET_PF_COUNT_MSGSET 0xb6
#undef MC_CMD_0xb6_PRIVILEGE_CTG
#define MC_CMD_0xb6_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11134,6 +12454,7 @@
* Set number of PFs on the device.
*/
#define MC_CMD_SET_PF_COUNT 0xb7
+#define MC_CMD_SET_PF_COUNT_MSGSET 0xb7
/* MC_CMD_SET_PF_COUNT_IN msgrequest */
#define MC_CMD_SET_PF_COUNT_IN_LEN 4
@@ -11150,6 +12471,7 @@
* Get port assignment for current PCI function.
*/
#define MC_CMD_GET_PORT_ASSIGNMENT 0xb8
+#define MC_CMD_GET_PORT_ASSIGNMENT_MSGSET 0xb8
#undef MC_CMD_0xb8_PRIVILEGE_CTG
#define MC_CMD_0xb8_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11175,6 +12497,7 @@
* Set port assignment for current PCI function.
*/
#define MC_CMD_SET_PORT_ASSIGNMENT 0xb9
+#define MC_CMD_SET_PORT_ASSIGNMENT_MSGSET 0xb9
#undef MC_CMD_0xb9_PRIVILEGE_CTG
#define MC_CMD_0xb9_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -11194,6 +12517,7 @@
* Allocate VIs for current PCI function.
*/
#define MC_CMD_ALLOC_VIS 0x8b
+#define MC_CMD_ALLOC_VIS_MSGSET 0x8b
#undef MC_CMD_0x8b_PRIVILEGE_CTG
#define MC_CMD_0x8b_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11241,6 +12565,7 @@
* but not freed.
*/
#define MC_CMD_FREE_VIS 0x8c
+#define MC_CMD_FREE_VIS_MSGSET 0x8c
#undef MC_CMD_0x8c_PRIVILEGE_CTG
#define MC_CMD_0x8c_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11257,6 +12582,7 @@
* Get SRIOV config for this PF.
*/
#define MC_CMD_GET_SRIOV_CFG 0xba
+#define MC_CMD_GET_SRIOV_CFG_MSGSET 0xba
#undef MC_CMD_0xba_PRIVILEGE_CTG
#define MC_CMD_0xba_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11290,6 +12616,7 @@
* Set SRIOV config for this PF.
*/
#define MC_CMD_SET_SRIOV_CFG 0xbb
+#define MC_CMD_SET_SRIOV_CFG_MSGSET 0xbb
#undef MC_CMD_0xbb_PRIVILEGE_CTG
#define MC_CMD_0xbb_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -11325,9 +12652,11 @@
/***********************************/
/* MC_CMD_GET_VI_ALLOC_INFO
* Get information about number of VI's and base VI number allocated to this
- * function.
+ * function. This message is not available to dynamic clients created by
+ * MC_CMD_CLIENT_ALLOC.
*/
#define MC_CMD_GET_VI_ALLOC_INFO 0x8d
+#define MC_CMD_GET_VI_ALLOC_INFO_MSGSET 0x8d
#undef MC_CMD_0x8d_PRIVILEGE_CTG
#define MC_CMD_0x8d_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11352,9 +12681,12 @@
/***********************************/
/* MC_CMD_DUMP_VI_STATE
- * For CmdClient use. Dump pertinent information on a specific absolute VI.
+ * For CmdClient use. Dump pertinent information on a specific absolute VI. The
+ * VI must be owned by the calling client or one of its ancestors; usership of
+ * the VI (as set by MC_CMD_SET_VI_USER) is not sufficient.
*/
#define MC_CMD_DUMP_VI_STATE 0x8e
+#define MC_CMD_DUMP_VI_STATE_MSGSET 0x8e
#undef MC_CMD_0x8e_PRIVILEGE_CTG
#define MC_CMD_0x8e_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11366,7 +12698,7 @@
#define MC_CMD_DUMP_VI_STATE_IN_VI_NUMBER_LEN 4
/* MC_CMD_DUMP_VI_STATE_OUT msgresponse */
-#define MC_CMD_DUMP_VI_STATE_OUT_LEN 96
+#define MC_CMD_DUMP_VI_STATE_OUT_LEN 100
/* The PF part of the function owning this VI. */
#define MC_CMD_DUMP_VI_STATE_OUT_OWNER_PF_OFST 0
#define MC_CMD_DUMP_VI_STATE_OUT_OWNER_PF_LEN 2
@@ -11389,12 +12721,24 @@
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_OFST 12
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_LO_OFST 12
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_LO_LBN 96
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_HI_OFST 16
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_HI_LBN 128
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_HI_WIDTH 32
/* Raw evq timer table data. */
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_OFST 20
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_LO_OFST 20
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_LO_LBN 160
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_HI_OFST 24
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_HI_LBN 192
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_HI_WIDTH 32
/* Combined metadata field. */
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_OFST 28
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_LEN 4
@@ -11411,22 +12755,46 @@
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_OFST 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_LO_OFST 32
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_LO_LBN 256
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_HI_OFST 36
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_HI_LBN 288
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_HI_WIDTH 32
/* TXDPCPU raw table data for queue. */
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_OFST 40
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_LO_OFST 40
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_LO_LBN 320
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_HI_OFST 44
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_HI_LBN 352
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_HI_WIDTH 32
/* TXDPCPU raw table data for queue. */
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_OFST 48
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_LO_OFST 48
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_LO_LBN 384
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_HI_OFST 52
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_HI_LBN 416
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_HI_WIDTH 32
/* Combined metadata field. */
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_OFST 56
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_LO_OFST 56
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_LO_LBN 448
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_HI_OFST 60
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_HI_LBN 480
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_HI_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_BUFS_BASE_OFST 56
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_BUFS_BASE_LBN 0
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_BUFS_BASE_WIDTH 16
@@ -11446,22 +12814,46 @@
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_OFST 64
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_LO_OFST 64
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_LO_LBN 512
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_HI_OFST 68
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_HI_LBN 544
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_HI_WIDTH 32
/* RXDPCPU raw table data for queue. */
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_OFST 72
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_LO_OFST 72
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_LO_LBN 576
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_HI_OFST 76
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_HI_LBN 608
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_HI_WIDTH 32
/* Reserved, currently 0. */
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_OFST 80
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_LO_OFST 80
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_LO_LBN 640
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_HI_OFST 84
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_HI_LBN 672
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_HI_WIDTH 32
/* Combined metadata field. */
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_OFST 88
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_LO_OFST 88
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_LO_LBN 704
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_HI_OFST 92
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_HI_LBN 736
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_HI_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_BUFS_BASE_OFST 88
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_BUFS_BASE_LBN 0
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_BUFS_BASE_WIDTH 16
@@ -11474,6 +12866,9 @@
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_WAITCOUNT_OFST 88
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_WAITCOUNT_LBN 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_WAITCOUNT_WIDTH 8
+/* Current user, as assigned by MC_CMD_SET_VI_USER. */
+#define MC_CMD_DUMP_VI_STATE_OUT_USER_CLIENT_ID_OFST 96
+#define MC_CMD_DUMP_VI_STATE_OUT_USER_CLIENT_ID_LEN 4
/***********************************/
@@ -11481,6 +12876,7 @@
* Allocate a push I/O buffer for later use with a tx queue.
*/
#define MC_CMD_ALLOC_PIOBUF 0x8f
+#define MC_CMD_ALLOC_PIOBUF_MSGSET 0x8f
#undef MC_CMD_0x8f_PRIVILEGE_CTG
#define MC_CMD_0x8f_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -11500,6 +12896,7 @@
* Free a push I/O buffer.
*/
#define MC_CMD_FREE_PIOBUF 0x90
+#define MC_CMD_FREE_PIOBUF_MSGSET 0x90
#undef MC_CMD_0x90_PRIVILEGE_CTG
#define MC_CMD_0x90_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -11516,9 +12913,12 @@
/***********************************/
/* MC_CMD_GET_VI_TLP_PROCESSING
- * Get TLP steering and ordering information for a VI.
+ * Get TLP steering and ordering information for a VI. The caller must must
+ * have the GRP_FUNC_DMA privilege and must be the currently-assigned user of
+ * this VI or an ancestor of the current user (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_GET_VI_TLP_PROCESSING 0xb0
+#define MC_CMD_GET_VI_TLP_PROCESSING_MSGSET 0xb0
#undef MC_CMD_0xb0_PRIVILEGE_CTG
#define MC_CMD_0xb0_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11555,9 +12955,12 @@
/***********************************/
/* MC_CMD_SET_VI_TLP_PROCESSING
- * Set TLP steering and ordering information for a VI.
+ * Set TLP steering and ordering information for a VI. The caller must must
+ * have the GRP_FUNC_DMA privilege and must be the currently-assigned user of
+ * this VI or an ancestor of the current user (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_SET_VI_TLP_PROCESSING 0xb1
+#define MC_CMD_SET_VI_TLP_PROCESSING_MSGSET 0xb1
#undef MC_CMD_0xb1_PRIVILEGE_CTG
#define MC_CMD_0xb1_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11597,6 +13000,7 @@
* Get global PCIe steering and transaction processing configuration.
*/
#define MC_CMD_GET_TLP_PROCESSING_GLOBALS 0xbc
+#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_MSGSET 0xbc
#undef MC_CMD_0xbc_PRIVILEGE_CTG
#define MC_CMD_0xbc_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -11681,6 +13085,7 @@
* Set global PCIe steering and transaction processing configuration.
*/
#define MC_CMD_SET_TLP_PROCESSING_GLOBALS 0xbd
+#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_MSGSET 0xbd
#undef MC_CMD_0xbd_PRIVILEGE_CTG
#define MC_CMD_0xbd_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -11746,6 +13151,7 @@
* Download a new set of images to the satellite CPUs from the host.
*/
#define MC_CMD_SATELLITE_DOWNLOAD 0x91
+#define MC_CMD_SATELLITE_DOWNLOAD_MSGSET 0x91
#undef MC_CMD_0x91_PRIVILEGE_CTG
#define MC_CMD_0x91_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -11873,6 +13279,7 @@
* reference inherent device capabilities as opposed to current NVRAM config.
*/
#define MC_CMD_GET_CAPABILITIES 0xbe
+#define MC_CMD_GET_CAPABILITIES_MSGSET 0xbe
#undef MC_CMD_0xbe_PRIVILEGE_CTG
#define MC_CMD_0xbe_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -14813,6 +16220,18 @@
#define MC_CMD_GET_CAPABILITIES_V7_OUT_UNSOL_EV_CREDIT_SUPPORTED_OFST 148
#define MC_CMD_GET_CAPABILITIES_V7_OUT_UNSOL_EV_CREDIT_SUPPORTED_LBN 7
#define MC_CMD_GET_CAPABILITIES_V7_OUT_UNSOL_EV_CREDIT_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_ENCAPSULATED_MCDI_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_ENCAPSULATED_MCDI_SUPPORTED_LBN 8
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_ENCAPSULATED_MCDI_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_EXTERNAL_MAE_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_EXTERNAL_MAE_SUPPORTED_LBN 9
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_EXTERNAL_MAE_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_LBN 10
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_LBN 11
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_WIDTH 1
/* MC_CMD_GET_CAPABILITIES_V8_OUT msgresponse */
#define MC_CMD_GET_CAPABILITIES_V8_OUT_LEN 160
@@ -15299,6 +16718,18 @@
#define MC_CMD_GET_CAPABILITIES_V8_OUT_UNSOL_EV_CREDIT_SUPPORTED_OFST 148
#define MC_CMD_GET_CAPABILITIES_V8_OUT_UNSOL_EV_CREDIT_SUPPORTED_LBN 7
#define MC_CMD_GET_CAPABILITIES_V8_OUT_UNSOL_EV_CREDIT_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_ENCAPSULATED_MCDI_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_ENCAPSULATED_MCDI_SUPPORTED_LBN 8
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_ENCAPSULATED_MCDI_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_EXTERNAL_MAE_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_EXTERNAL_MAE_SUPPORTED_LBN 9
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_EXTERNAL_MAE_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_LBN 10
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_LBN 11
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_WIDTH 1
/* These bits are reserved for communicating test-specific capabilities to
* host-side test software. All production drivers should treat this field as
* opaque.
@@ -15306,7 +16737,13 @@
#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_OFST 152
#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_LEN 8
#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_LO_OFST 152
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_LO_LEN 4
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_LO_LBN 1216
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_LO_WIDTH 32
#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_HI_OFST 156
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_HI_LEN 4
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_HI_LBN 1248
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_HI_WIDTH 32
/* MC_CMD_GET_CAPABILITIES_V9_OUT msgresponse */
#define MC_CMD_GET_CAPABILITIES_V9_OUT_LEN 184
@@ -15793,6 +17230,18 @@
#define MC_CMD_GET_CAPABILITIES_V9_OUT_UNSOL_EV_CREDIT_SUPPORTED_OFST 148
#define MC_CMD_GET_CAPABILITIES_V9_OUT_UNSOL_EV_CREDIT_SUPPORTED_LBN 7
#define MC_CMD_GET_CAPABILITIES_V9_OUT_UNSOL_EV_CREDIT_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_ENCAPSULATED_MCDI_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_ENCAPSULATED_MCDI_SUPPORTED_LBN 8
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_ENCAPSULATED_MCDI_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_EXTERNAL_MAE_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_EXTERNAL_MAE_SUPPORTED_LBN 9
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_EXTERNAL_MAE_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_LBN 10
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_LBN 11
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_WIDTH 1
/* These bits are reserved for communicating test-specific capabilities to
* host-side test software. All production drivers should treat this field as
* opaque.
@@ -15800,7 +17249,13 @@
#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_OFST 152
#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_LEN 8
#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_LO_OFST 152
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_LO_LEN 4
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_LO_LBN 1216
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_LO_WIDTH 32
#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_HI_OFST 156
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_HI_LEN 4
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_HI_LBN 1248
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_HI_WIDTH 32
/* The minimum size (in table entries) of indirection table to be allocated
* from the pool for an RSS context. Note that the table size used must be a
* power of 2.
@@ -16322,6 +17777,18 @@
#define MC_CMD_GET_CAPABILITIES_V10_OUT_UNSOL_EV_CREDIT_SUPPORTED_OFST 148
#define MC_CMD_GET_CAPABILITIES_V10_OUT_UNSOL_EV_CREDIT_SUPPORTED_LBN 7
#define MC_CMD_GET_CAPABILITIES_V10_OUT_UNSOL_EV_CREDIT_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_ENCAPSULATED_MCDI_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_ENCAPSULATED_MCDI_SUPPORTED_LBN 8
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_ENCAPSULATED_MCDI_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_EXTERNAL_MAE_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_EXTERNAL_MAE_SUPPORTED_LBN 9
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_EXTERNAL_MAE_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_LBN 10
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_LBN 11
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_WIDTH 1
/* These bits are reserved for communicating test-specific capabilities to
* host-side test software. All production drivers should treat this field as
* opaque.
@@ -16329,7 +17796,13 @@
#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_OFST 152
#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_LEN 8
#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_LO_OFST 152
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_LO_LEN 4
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_LO_LBN 1216
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_LO_WIDTH 32
#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_HI_OFST 156
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_HI_LEN 4
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_HI_LBN 1248
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_HI_WIDTH 32
/* The minimum size (in table entries) of indirection table to be allocated
* from the pool for an RSS context. Note that the table size used must be a
* power of 2.
@@ -16386,6 +17859,7 @@
* Encapsulation for a v2 extended command
*/
#define MC_CMD_V2_EXTN 0x7f
+#define MC_CMD_V2_EXTN_MSGSET 0x7f
/* MC_CMD_V2_EXTN_IN msgrequest */
#define MC_CMD_V2_EXTN_IN_LEN 4
@@ -16417,6 +17891,7 @@
* Allocate a pacer bucket (for qau rp or a snapper test)
*/
#define MC_CMD_TCM_BUCKET_ALLOC 0xb2
+#define MC_CMD_TCM_BUCKET_ALLOC_MSGSET 0xb2
#undef MC_CMD_0xb2_PRIVILEGE_CTG
#define MC_CMD_0xb2_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16436,6 +17911,7 @@
* Free a pacer bucket
*/
#define MC_CMD_TCM_BUCKET_FREE 0xb3
+#define MC_CMD_TCM_BUCKET_FREE_MSGSET 0xb3
#undef MC_CMD_0xb3_PRIVILEGE_CTG
#define MC_CMD_0xb3_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16455,6 +17931,7 @@
* Initialise pacer bucket with a given rate
*/
#define MC_CMD_TCM_BUCKET_INIT 0xb4
+#define MC_CMD_TCM_BUCKET_INIT_MSGSET 0xb4
#undef MC_CMD_0xb4_PRIVILEGE_CTG
#define MC_CMD_0xb4_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16489,6 +17966,7 @@
* Initialise txq in pacer with given options or set options
*/
#define MC_CMD_TCM_TXQ_INIT 0xb5
+#define MC_CMD_TCM_TXQ_INIT_MSGSET 0xb5
#undef MC_CMD_0xb5_PRIVILEGE_CTG
#define MC_CMD_0xb5_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16579,6 +18057,7 @@
* Link a push I/O buffer to a TxQ
*/
#define MC_CMD_LINK_PIOBUF 0x92
+#define MC_CMD_LINK_PIOBUF_MSGSET 0x92
#undef MC_CMD_0x92_PRIVILEGE_CTG
#define MC_CMD_0x92_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -16588,7 +18067,7 @@
/* Handle for allocated push I/O buffer. */
#define MC_CMD_LINK_PIOBUF_IN_PIOBUF_HANDLE_OFST 0
#define MC_CMD_LINK_PIOBUF_IN_PIOBUF_HANDLE_LEN 4
-/* Function Local Instance (VI) number. */
+/* Function Local Instance (VI) number which has a TxQ allocated to it. */
#define MC_CMD_LINK_PIOBUF_IN_TXQ_INSTANCE_OFST 4
#define MC_CMD_LINK_PIOBUF_IN_TXQ_INSTANCE_LEN 4
@@ -16601,6 +18080,7 @@
* Unlink a push I/O buffer from a TxQ
*/
#define MC_CMD_UNLINK_PIOBUF 0x93
+#define MC_CMD_UNLINK_PIOBUF_MSGSET 0x93
#undef MC_CMD_0x93_PRIVILEGE_CTG
#define MC_CMD_0x93_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -16620,6 +18100,7 @@
* allocate and initialise a v-switch.
*/
#define MC_CMD_VSWITCH_ALLOC 0x94
+#define MC_CMD_VSWITCH_ALLOC_MSGSET 0x94
#undef MC_CMD_0x94_PRIVILEGE_CTG
#define MC_CMD_0x94_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16667,6 +18148,7 @@
* de-allocate a v-switch.
*/
#define MC_CMD_VSWITCH_FREE 0x95
+#define MC_CMD_VSWITCH_FREE_MSGSET 0x95
#undef MC_CMD_0x95_PRIVILEGE_CTG
#define MC_CMD_0x95_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16688,6 +18170,7 @@
* not, then the command returns ENOENT).
*/
#define MC_CMD_VSWITCH_QUERY 0x63
+#define MC_CMD_VSWITCH_QUERY_MSGSET 0x63
#undef MC_CMD_0x63_PRIVILEGE_CTG
#define MC_CMD_0x63_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16707,6 +18190,7 @@
* allocate a v-port.
*/
#define MC_CMD_VPORT_ALLOC 0x96
+#define MC_CMD_VPORT_ALLOC_MSGSET 0x96
#undef MC_CMD_0x96_PRIVILEGE_CTG
#define MC_CMD_0x96_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16774,6 +18258,7 @@
* de-allocate a v-port.
*/
#define MC_CMD_VPORT_FREE 0x97
+#define MC_CMD_VPORT_FREE_MSGSET 0x97
#undef MC_CMD_0x97_PRIVILEGE_CTG
#define MC_CMD_0x97_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16793,6 +18278,7 @@
* allocate a v-adaptor.
*/
#define MC_CMD_VADAPTOR_ALLOC 0x98
+#define MC_CMD_VADAPTOR_ALLOC_MSGSET 0x98
#undef MC_CMD_0x98_PRIVILEGE_CTG
#define MC_CMD_0x98_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16841,6 +18327,7 @@
* de-allocate a v-adaptor.
*/
#define MC_CMD_VADAPTOR_FREE 0x99
+#define MC_CMD_VADAPTOR_FREE_MSGSET 0x99
#undef MC_CMD_0x99_PRIVILEGE_CTG
#define MC_CMD_0x99_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16860,6 +18347,7 @@
* assign a new MAC address to a v-adaptor.
*/
#define MC_CMD_VADAPTOR_SET_MAC 0x5d
+#define MC_CMD_VADAPTOR_SET_MAC_MSGSET 0x5d
#undef MC_CMD_0x5d_PRIVILEGE_CTG
#define MC_CMD_0x5d_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16882,6 +18370,7 @@
* read the MAC address assigned to a v-adaptor.
*/
#define MC_CMD_VADAPTOR_GET_MAC 0x5e
+#define MC_CMD_VADAPTOR_GET_MAC_MSGSET 0x5e
#undef MC_CMD_0x5e_PRIVILEGE_CTG
#define MC_CMD_0x5e_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16904,6 +18393,7 @@
* read some config of v-adaptor.
*/
#define MC_CMD_VADAPTOR_QUERY 0x61
+#define MC_CMD_VADAPTOR_QUERY_MSGSET 0x61
#undef MC_CMD_0x61_PRIVILEGE_CTG
#define MC_CMD_0x61_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16932,6 +18422,7 @@
* assign a port to a PCI function.
*/
#define MC_CMD_EVB_PORT_ASSIGN 0x9a
+#define MC_CMD_EVB_PORT_ASSIGN_MSGSET 0x9a
#undef MC_CMD_0x9a_PRIVILEGE_CTG
#define MC_CMD_0x9a_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16960,6 +18451,7 @@
* Assign the 64 bit region addresses.
*/
#define MC_CMD_RDWR_A64_REGIONS 0x9b
+#define MC_CMD_RDWR_A64_REGIONS_MSGSET 0x9b
#undef MC_CMD_0x9b_PRIVILEGE_CTG
#define MC_CMD_0x9b_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -16999,6 +18491,7 @@
* Allocate an Onload stack ID.
*/
#define MC_CMD_ONLOAD_STACK_ALLOC 0x9c
+#define MC_CMD_ONLOAD_STACK_ALLOC_MSGSET 0x9c
#undef MC_CMD_0x9c_PRIVILEGE_CTG
#define MC_CMD_0x9c_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -17021,6 +18514,7 @@
* Free an Onload stack ID.
*/
#define MC_CMD_ONLOAD_STACK_FREE 0x9d
+#define MC_CMD_ONLOAD_STACK_FREE_MSGSET 0x9d
#undef MC_CMD_0x9d_PRIVILEGE_CTG
#define MC_CMD_0x9d_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -17040,6 +18534,7 @@
* Allocate an RSS context.
*/
#define MC_CMD_RSS_CONTEXT_ALLOC 0x9e
+#define MC_CMD_RSS_CONTEXT_ALLOC_MSGSET 0x9e
#undef MC_CMD_0x9e_PRIVILEGE_CTG
#define MC_CMD_0x9e_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17140,6 +18635,7 @@
* Free an RSS context.
*/
#define MC_CMD_RSS_CONTEXT_FREE 0x9f
+#define MC_CMD_RSS_CONTEXT_FREE_MSGSET 0x9f
#undef MC_CMD_0x9f_PRIVILEGE_CTG
#define MC_CMD_0x9f_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17159,6 +18655,7 @@
* Set the Toeplitz hash key for an RSS context.
*/
#define MC_CMD_RSS_CONTEXT_SET_KEY 0xa0
+#define MC_CMD_RSS_CONTEXT_SET_KEY_MSGSET 0xa0
#undef MC_CMD_0xa0_PRIVILEGE_CTG
#define MC_CMD_0xa0_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17181,6 +18678,7 @@
* Get the Toeplitz hash key for an RSS context.
*/
#define MC_CMD_RSS_CONTEXT_GET_KEY 0xa1
+#define MC_CMD_RSS_CONTEXT_GET_KEY_MSGSET 0xa1
#undef MC_CMD_0xa1_PRIVILEGE_CTG
#define MC_CMD_0xa1_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17205,6 +18703,7 @@
* when the RSS context is allocated without specifying a table size.
*/
#define MC_CMD_RSS_CONTEXT_SET_TABLE 0xa2
+#define MC_CMD_RSS_CONTEXT_SET_TABLE_MSGSET 0xa2
#undef MC_CMD_0xa2_PRIVILEGE_CTG
#define MC_CMD_0xa2_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17229,6 +18728,7 @@
* when the RSS context is allocated without specifying a table size.
*/
#define MC_CMD_RSS_CONTEXT_GET_TABLE 0xa3
+#define MC_CMD_RSS_CONTEXT_GET_TABLE_MSGSET 0xa3
#undef MC_CMD_0xa3_PRIVILEGE_CTG
#define MC_CMD_0xa3_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17253,6 +18753,7 @@
* RSS_SELECTABLE_TABLE_SIZE bit is set in MC_CMD_GET_CAPABILITIES.
*/
#define MC_CMD_RSS_CONTEXT_WRITE_TABLE 0x13e
+#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_MSGSET 0x13e
#undef MC_CMD_0x13e_PRIVILEGE_CTG
#define MC_CMD_0x13e_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17299,6 +18800,7 @@
* RSS_SELECTABLE_TABLE_SIZE bit is set in MC_CMD_GET_CAPABILITIES.
*/
#define MC_CMD_RSS_CONTEXT_READ_TABLE 0x13f
+#define MC_CMD_RSS_CONTEXT_READ_TABLE_MSGSET 0x13f
#undef MC_CMD_0x13f_PRIVILEGE_CTG
#define MC_CMD_0x13f_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17338,6 +18840,7 @@
* Set various control flags for an RSS context.
*/
#define MC_CMD_RSS_CONTEXT_SET_FLAGS 0xe1
+#define MC_CMD_RSS_CONTEXT_SET_FLAGS_MSGSET 0xe1
#undef MC_CMD_0xe1_PRIVILEGE_CTG
#define MC_CMD_0xe1_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17404,6 +18907,7 @@
* Get various control flags for an RSS context.
*/
#define MC_CMD_RSS_CONTEXT_GET_FLAGS 0xe2
+#define MC_CMD_RSS_CONTEXT_GET_FLAGS_MSGSET 0xe2
#undef MC_CMD_0xe2_PRIVILEGE_CTG
#define MC_CMD_0xe2_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17471,6 +18975,7 @@
* Allocate a .1p mapping.
*/
#define MC_CMD_DOT1P_MAPPING_ALLOC 0xa4
+#define MC_CMD_DOT1P_MAPPING_ALLOC_MSGSET 0xa4
#undef MC_CMD_0xa4_PRIVILEGE_CTG
#define MC_CMD_0xa4_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -17504,6 +19009,7 @@
* Free a .1p mapping.
*/
#define MC_CMD_DOT1P_MAPPING_FREE 0xa5
+#define MC_CMD_DOT1P_MAPPING_FREE_MSGSET 0xa5
#undef MC_CMD_0xa5_PRIVILEGE_CTG
#define MC_CMD_0xa5_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -17523,6 +19029,7 @@
* Set the mapping table for a .1p mapping.
*/
#define MC_CMD_DOT1P_MAPPING_SET_TABLE 0xa6
+#define MC_CMD_DOT1P_MAPPING_SET_TABLE_MSGSET 0xa6
#undef MC_CMD_0xa6_PRIVILEGE_CTG
#define MC_CMD_0xa6_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -17547,6 +19054,7 @@
* Get the mapping table for a .1p mapping.
*/
#define MC_CMD_DOT1P_MAPPING_GET_TABLE 0xa7
+#define MC_CMD_DOT1P_MAPPING_GET_TABLE_MSGSET 0xa7
#undef MC_CMD_0xa7_PRIVILEGE_CTG
#define MC_CMD_0xa7_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -17571,6 +19079,7 @@
* Get Interrupt Vector config for this PF.
*/
#define MC_CMD_GET_VECTOR_CFG 0xbf
+#define MC_CMD_GET_VECTOR_CFG_MSGSET 0xbf
#undef MC_CMD_0xbf_PRIVILEGE_CTG
#define MC_CMD_0xbf_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17596,6 +19105,7 @@
* Set Interrupt Vector config for this PF.
*/
#define MC_CMD_SET_VECTOR_CFG 0xc0
+#define MC_CMD_SET_VECTOR_CFG_MSGSET 0xc0
#undef MC_CMD_0xc0_PRIVILEGE_CTG
#define MC_CMD_0xc0_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17623,6 +19133,7 @@
* Add a MAC address to a v-port
*/
#define MC_CMD_VPORT_ADD_MAC_ADDRESS 0xa8
+#define MC_CMD_VPORT_ADD_MAC_ADDRESS_MSGSET 0xa8
#undef MC_CMD_0xa8_PRIVILEGE_CTG
#define MC_CMD_0xa8_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17645,6 +19156,7 @@
* Delete a MAC address from a v-port
*/
#define MC_CMD_VPORT_DEL_MAC_ADDRESS 0xa9
+#define MC_CMD_VPORT_DEL_MAC_ADDRESS_MSGSET 0xa9
#undef MC_CMD_0xa9_PRIVILEGE_CTG
#define MC_CMD_0xa9_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17667,6 +19179,7 @@
* Delete a MAC address from a v-port
*/
#define MC_CMD_VPORT_GET_MAC_ADDRESSES 0xaa
+#define MC_CMD_VPORT_GET_MAC_ADDRESSES_MSGSET 0xaa
#undef MC_CMD_0xaa_PRIVILEGE_CTG
#define MC_CMD_0xaa_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17701,6 +19214,7 @@
* function will be reset before applying the changes.
*/
#define MC_CMD_VPORT_RECONFIGURE 0xeb
+#define MC_CMD_VPORT_RECONFIGURE_MSGSET 0xeb
#undef MC_CMD_0xeb_PRIVILEGE_CTG
#define MC_CMD_0xeb_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17756,6 +19270,7 @@
* read some config of v-port.
*/
#define MC_CMD_EVB_PORT_QUERY 0x62
+#define MC_CMD_EVB_PORT_QUERY_MSGSET 0x62
#undef MC_CMD_0x62_PRIVILEGE_CTG
#define MC_CMD_0x62_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17786,6 +19301,7 @@
* lifted in future.
*/
#define MC_CMD_DUMP_BUFTBL_ENTRIES 0xab
+#define MC_CMD_DUMP_BUFTBL_ENTRIES_MSGSET 0xab
#undef MC_CMD_0xab_PRIVILEGE_CTG
#define MC_CMD_0xab_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -17818,6 +19334,7 @@
* Set global RXDP configuration settings
*/
#define MC_CMD_SET_RXDP_CONFIG 0xc1
+#define MC_CMD_SET_RXDP_CONFIG_MSGSET 0xc1
#undef MC_CMD_0xc1_PRIVILEGE_CTG
#define MC_CMD_0xc1_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -17848,6 +19365,7 @@
* Get global RXDP configuration settings
*/
#define MC_CMD_GET_RXDP_CONFIG 0xc2
+#define MC_CMD_GET_RXDP_CONFIG_MSGSET 0xc2
#undef MC_CMD_0xc2_PRIVILEGE_CTG
#define MC_CMD_0xc2_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17874,6 +19392,7 @@
* Return the system and PDCPU clock frequencies.
*/
#define MC_CMD_GET_CLOCK 0xac
+#define MC_CMD_GET_CLOCK_MSGSET 0xac
#undef MC_CMD_0xac_PRIVILEGE_CTG
#define MC_CMD_0xac_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17896,6 +19415,7 @@
* Control the system and DPCPU clock frequencies. Changes are lost reboot.
*/
#define MC_CMD_SET_CLOCK 0xad
+#define MC_CMD_SET_CLOCK_MSGSET 0xad
#undef MC_CMD_0xad_PRIVILEGE_CTG
#define MC_CMD_0xad_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -17982,6 +19502,7 @@
* Send an arbitrary DPCPU message.
*/
#define MC_CMD_DPCPU_RPC 0xae
+#define MC_CMD_DPCPU_RPC_MSGSET 0xae
#undef MC_CMD_0xae_PRIVILEGE_CTG
#define MC_CMD_0xae_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -18100,6 +19621,7 @@
* Trigger an interrupt by prodding the BIU.
*/
#define MC_CMD_TRIGGER_INTERRUPT 0xe3
+#define MC_CMD_TRIGGER_INTERRUPT_MSGSET 0xe3
#undef MC_CMD_0xe3_PRIVILEGE_CTG
#define MC_CMD_0xe3_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -18119,6 +19641,7 @@
* Special operations to support (for now) shmboot.
*/
#define MC_CMD_SHMBOOT_OP 0xe6
+#define MC_CMD_SHMBOOT_OP_MSGSET 0xe6
#undef MC_CMD_0xe6_PRIVILEGE_CTG
#define MC_CMD_0xe6_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -18140,6 +19663,7 @@
* Read multiple 64bit words from capture block memory
*/
#define MC_CMD_CAP_BLK_READ 0xe7
+#define MC_CMD_CAP_BLK_READ_MSGSET 0xe7
#undef MC_CMD_0xe7_PRIVILEGE_CTG
#define MC_CMD_0xe7_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -18162,7 +19686,13 @@
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_OFST 0
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_LEN 8
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_LO_OFST 0
+#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_LO_LEN 4
+#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_LO_LBN 0
+#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_LO_WIDTH 32
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_HI_OFST 4
+#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_HI_LEN 4
+#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_HI_LBN 32
+#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_HI_WIDTH 32
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_MINNUM 1
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_MAXNUM 31
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_MAXNUM_MCDI2 127
@@ -18173,6 +19703,7 @@
* Take a dump of the DUT state
*/
#define MC_CMD_DUMP_DO 0xe8
+#define MC_CMD_DUMP_DO_MSGSET 0xe8
#undef MC_CMD_0xe8_PRIVILEGE_CTG
#define MC_CMD_0xe8_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -18253,6 +19784,7 @@
* Configure unsolicited dumps
*/
#define MC_CMD_DUMP_CONFIGURE_UNSOLICITED 0xe9
+#define MC_CMD_DUMP_CONFIGURE_UNSOLICITED_MSGSET 0xe9
#undef MC_CMD_0xe9_PRIVILEGE_CTG
#define MC_CMD_0xe9_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -18322,6 +19854,7 @@
* the parameter is out of range.
*/
#define MC_CMD_SET_PSU 0xea
+#define MC_CMD_SET_PSU_MSGSET 0xea
#undef MC_CMD_0xea_PRIVILEGE_CTG
#define MC_CMD_0xea_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -18348,6 +19881,7 @@
* Get function information. PF and VF number.
*/
#define MC_CMD_GET_FUNCTION_INFO 0xec
+#define MC_CMD_GET_FUNCTION_INFO_MSGSET 0xec
#undef MC_CMD_0xec_PRIVILEGE_CTG
#define MC_CMD_0xec_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -18370,6 +19904,7 @@
* reboot.
*/
#define MC_CMD_ENABLE_OFFLINE_BIST 0xed
+#define MC_CMD_ENABLE_OFFLINE_BIST_MSGSET 0xed
#undef MC_CMD_0xed_PRIVILEGE_CTG
#define MC_CMD_0xed_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -18388,6 +19923,7 @@
* forget.
*/
#define MC_CMD_UART_SEND_DATA 0xee
+#define MC_CMD_UART_SEND_DATA_MSGSET 0xee
#undef MC_CMD_0xee_PRIVILEGE_CTG
#define MC_CMD_0xee_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -18426,6 +19962,7 @@
* subject to change and not currently implemented.
*/
#define MC_CMD_UART_RECV_DATA 0xef
+#define MC_CMD_UART_RECV_DATA_MSGSET 0xef
#undef MC_CMD_0xef_PRIVILEGE_CTG
#define MC_CMD_0xef_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -18475,6 +20012,7 @@
* Read data programmed into the device One-Time-Programmable (OTP) Fuses
*/
#define MC_CMD_READ_FUSES 0xf0
+#define MC_CMD_READ_FUSES_MSGSET 0xf0
#undef MC_CMD_0xf0_PRIVILEGE_CTG
#define MC_CMD_0xf0_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -18510,6 +20048,7 @@
* Get or set KR Serdes RXEQ and TX Driver settings
*/
#define MC_CMD_KR_TUNE 0xf1
+#define MC_CMD_KR_TUNE_MSGSET 0xf1
#undef MC_CMD_0xf1_PRIVILEGE_CTG
#define MC_CMD_0xf1_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -19066,6 +20605,7 @@
* Get or set PCIE Serdes RXEQ and TX Driver settings
*/
#define MC_CMD_PCIE_TUNE 0xf2
+#define MC_CMD_PCIE_TUNE_MSGSET 0xf2
#undef MC_CMD_0xf2_PRIVILEGE_CTG
#define MC_CMD_0xf2_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -19323,6 +20863,7 @@
* - not used for V3 licensing
*/
#define MC_CMD_LICENSING 0xf3
+#define MC_CMD_LICENSING_MSGSET 0xf3
#undef MC_CMD_0xf3_PRIVILEGE_CTG
#define MC_CMD_0xf3_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19379,6 +20920,7 @@
* - V3 licensing (Medford)
*/
#define MC_CMD_LICENSING_V3 0xd0
+#define MC_CMD_LICENSING_V3_MSGSET 0xd0
#undef MC_CMD_0xd0_PRIVILEGE_CTG
#define MC_CMD_0xd0_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19429,7 +20971,13 @@
#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_OFST 24
#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_LEN 8
#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_LO_OFST 24
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_LO_LEN 4
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_LO_LBN 192
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_LO_WIDTH 32
#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_HI_OFST 28
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_HI_LEN 4
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_HI_LBN 224
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_HI_WIDTH 32
/* reserved for future use */
#define MC_CMD_LICENSING_V3_OUT_RESERVED_0_OFST 32
#define MC_CMD_LICENSING_V3_OUT_RESERVED_0_LEN 24
@@ -19437,7 +20985,13 @@
#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_OFST 56
#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_LEN 8
#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_LO_OFST 56
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_LO_LEN 4
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_LO_LBN 448
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_LO_WIDTH 32
#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_HI_OFST 60
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_HI_LEN 4
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_HI_LBN 480
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_HI_WIDTH 32
/* reserved for future use */
#define MC_CMD_LICENSING_V3_OUT_RESERVED_1_OFST 64
#define MC_CMD_LICENSING_V3_OUT_RESERVED_1_LEN 24
@@ -19449,6 +21003,7 @@
* partition - V3 licensing (Medford)
*/
#define MC_CMD_LICENSING_GET_ID_V3 0xd1
+#define MC_CMD_LICENSING_GET_ID_V3_MSGSET 0xd1
#undef MC_CMD_0xd1_PRIVILEGE_CTG
#define MC_CMD_0xd1_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19482,6 +21037,7 @@
* This will fail on a single-core system.
*/
#define MC_CMD_MC2MC_PROXY 0xf4
+#define MC_CMD_MC2MC_PROXY_MSGSET 0xf4
#undef MC_CMD_0xf4_PRIVILEGE_CTG
#define MC_CMD_0xf4_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19500,6 +21056,7 @@
* or a reboot of the MC.) Not used for V3 licensing
*/
#define MC_CMD_GET_LICENSED_APP_STATE 0xf5
+#define MC_CMD_GET_LICENSED_APP_STATE_MSGSET 0xf5
#undef MC_CMD_0xf5_PRIVILEGE_CTG
#define MC_CMD_0xf5_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19528,6 +21085,7 @@
* operation or a reboot of the MC.) Used for V3 licensing (Medford)
*/
#define MC_CMD_GET_LICENSED_V3_APP_STATE 0xd2
+#define MC_CMD_GET_LICENSED_V3_APP_STATE_MSGSET 0xd2
#undef MC_CMD_0xd2_PRIVILEGE_CTG
#define MC_CMD_0xd2_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19540,7 +21098,13 @@
#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_OFST 0
#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_LEN 8
#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_LO_OFST 0
+#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_LO_LEN 4
+#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_LO_LBN 0
+#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_LO_WIDTH 32
#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_HI_OFST 4
+#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_HI_LEN 4
+#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_HI_LBN 32
+#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_HI_WIDTH 32
/* MC_CMD_GET_LICENSED_V3_APP_STATE_OUT msgresponse */
#define MC_CMD_GET_LICENSED_V3_APP_STATE_OUT_LEN 4
@@ -19560,6 +21124,7 @@
* operation or a reboot of the MC.) Used for V3 licensing (Medford)
*/
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES 0xd3
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_MSGSET 0xd3
#undef MC_CMD_0xd3_PRIVILEGE_CTG
#define MC_CMD_0xd3_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19572,7 +21137,13 @@
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_OFST 0
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_LEN 8
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_LO_OFST 0
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_LO_LEN 4
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_LO_LBN 0
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_LO_WIDTH 32
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_HI_OFST 4
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_HI_LEN 4
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_HI_LBN 32
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_HI_WIDTH 32
/* MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT msgresponse */
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_LEN 8
@@ -19580,7 +21151,13 @@
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_OFST 0
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_LEN 8
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_LO_OFST 0
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_LO_LEN 4
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_LO_LBN 0
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_LO_WIDTH 32
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_HI_OFST 4
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_HI_LEN 4
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_HI_LBN 32
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_HI_WIDTH 32
/***********************************/
@@ -19589,6 +21166,7 @@
* licensing.
*/
#define MC_CMD_LICENSED_APP_OP 0xf6
+#define MC_CMD_LICENSED_APP_OP_MSGSET 0xf6
#undef MC_CMD_0xf6_PRIVILEGE_CTG
#define MC_CMD_0xf6_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19672,6 +21250,7 @@
* (Medford)
*/
#define MC_CMD_LICENSED_V3_VALIDATE_APP 0xd4
+#define MC_CMD_LICENSED_V3_VALIDATE_APP_MSGSET 0xd4
#undef MC_CMD_0xd4_PRIVILEGE_CTG
#define MC_CMD_0xd4_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19685,7 +21264,13 @@
#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_OFST 48
#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_LEN 8
#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_LO_OFST 48
+#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_LO_LEN 4
+#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_LO_LBN 384
+#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_LO_WIDTH 32
#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_HI_OFST 52
+#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_HI_LEN 4
+#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_HI_LBN 416
+#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_HI_WIDTH 32
/* MC_CMD_LICENSED_V3_VALIDATE_APP_OUT msgresponse */
#define MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_LEN 116
@@ -19725,6 +21310,7 @@
* Mask features - V3 licensing (Medford)
*/
#define MC_CMD_LICENSED_V3_MASK_FEATURES 0xd5
+#define MC_CMD_LICENSED_V3_MASK_FEATURES_MSGSET 0xd5
#undef MC_CMD_0xd5_PRIVILEGE_CTG
#define MC_CMD_0xd5_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -19735,7 +21321,13 @@
#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_OFST 0
#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_LEN 8
#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_LO_OFST 0
+#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_LO_LEN 4
+#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_LO_LBN 0
+#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_LO_WIDTH 32
#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_HI_OFST 4
+#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_HI_LEN 4
+#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_HI_LBN 32
+#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_HI_WIDTH 32
/* whether to turn on or turn off the masked features */
#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_FLAG_OFST 8
#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_FLAG_LEN 4
@@ -19757,6 +21349,7 @@
* erased when the adapter is power cycled
*/
#define MC_CMD_LICENSING_V3_TEMPORARY 0xd6
+#define MC_CMD_LICENSING_V3_TEMPORARY_MSGSET 0xd6
#undef MC_CMD_0xd6_PRIVILEGE_CTG
#define MC_CMD_0xd6_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -19815,7 +21408,13 @@
#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_OFST 4
#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_LEN 8
#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_LO_OFST 4
+#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_LO_LEN 4
+#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_LO_LBN 32
+#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_LO_WIDTH 32
#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_HI_OFST 8
+#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_HI_LEN 4
+#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_HI_LBN 64
+#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_HI_WIDTH 32
/***********************************/
@@ -19827,6 +21426,7 @@
* delivered to a specific queue, or a set of queues with RSS.
*/
#define MC_CMD_SET_PORT_SNIFF_CONFIG 0xf7
+#define MC_CMD_SET_PORT_SNIFF_CONFIG_MSGSET 0xf7
#undef MC_CMD_0xf7_PRIVILEGE_CTG
#define MC_CMD_0xf7_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -19870,6 +21470,7 @@
* the configuration.
*/
#define MC_CMD_GET_PORT_SNIFF_CONFIG 0xf8
+#define MC_CMD_GET_PORT_SNIFF_CONFIG_MSGSET 0xf8
#undef MC_CMD_0xf8_PRIVILEGE_CTG
#define MC_CMD_0xf8_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19908,6 +21509,7 @@
* Change configuration related to the parser-dispatcher subsystem.
*/
#define MC_CMD_SET_PARSER_DISP_CONFIG 0xf9
+#define MC_CMD_SET_PARSER_DISP_CONFIG_MSGSET 0xf9
#undef MC_CMD_0xf9_PRIVILEGE_CTG
#define MC_CMD_0xf9_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19953,6 +21555,7 @@
* Read configuration related to the parser-dispatcher subsystem.
*/
#define MC_CMD_GET_PARSER_DISP_CONFIG 0xfa
+#define MC_CMD_GET_PARSER_DISP_CONFIG_MSGSET 0xfa
#undef MC_CMD_0xfa_PRIVILEGE_CTG
#define MC_CMD_0xfa_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19997,6 +21600,7 @@
* dedicated as TX sniff receivers.
*/
#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG 0xfb
+#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG_MSGSET 0xfb
#undef MC_CMD_0xfb_PRIVILEGE_CTG
#define MC_CMD_0xfb_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -20037,6 +21641,7 @@
* the configuration.
*/
#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG 0xfc
+#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG_MSGSET 0xfc
#undef MC_CMD_0xfc_PRIVILEGE_CTG
#define MC_CMD_0xfc_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -20072,6 +21677,7 @@
* Per queue rx error stats.
*/
#define MC_CMD_RMON_STATS_RX_ERRORS 0xfe
+#define MC_CMD_RMON_STATS_RX_ERRORS_MSGSET 0xfe
#undef MC_CMD_0xfe_PRIVILEGE_CTG
#define MC_CMD_0xfe_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -20104,6 +21710,7 @@
* Find out about available PCIE resources
*/
#define MC_CMD_GET_PCIE_RESOURCE_INFO 0xfd
+#define MC_CMD_GET_PCIE_RESOURCE_INFO_MSGSET 0xfd
#undef MC_CMD_0xfd_PRIVILEGE_CTG
#define MC_CMD_0xfd_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -20143,6 +21750,7 @@
* Find out about available port modes
*/
#define MC_CMD_GET_PORT_MODES 0xff
+#define MC_CMD_GET_PORT_MODES_MSGSET 0xff
#undef MC_CMD_0xff_PRIVILEGE_CTG
#define MC_CMD_0xff_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -20199,6 +21807,7 @@
* the new port mode, as the override does not affect PF configuration.
*/
#define MC_CMD_OVERRIDE_PORT_MODE 0x137
+#define MC_CMD_OVERRIDE_PORT_MODE_MSGSET 0x137
#undef MC_CMD_0x137_PRIVILEGE_CTG
#define MC_CMD_0x137_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -20223,6 +21832,7 @@
* Sample voltages on the ATB
*/
#define MC_CMD_READ_ATB 0x100
+#define MC_CMD_READ_ATB_MSGSET 0x100
#undef MC_CMD_0x100_PRIVILEGE_CTG
#define MC_CMD_0x100_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20253,6 +21863,7 @@
* enums here must correspond with those in MC_CMD_WORKAROUND.
*/
#define MC_CMD_GET_WORKAROUNDS 0x59
+#define MC_CMD_GET_WORKAROUNDS_MSGSET 0x59
#undef MC_CMD_0x59_PRIVILEGE_CTG
#define MC_CMD_0x59_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -20290,6 +21901,7 @@
* Read/set privileges of an arbitrary PCIe function
*/
#define MC_CMD_PRIVILEGE_MASK 0x5a
+#define MC_CMD_PRIVILEGE_MASK_MSGSET 0x5a
#undef MC_CMD_0x5a_PRIVILEGE_CTG
#define MC_CMD_0x5a_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -20351,6 +21963,20 @@
#define MC_CMD_PRIVILEGE_MASK_IN_GRP_ADMIN_TSA_UNBOUND 0x8000
/* enum: Control the Match-Action Engine if present. See mcdi_mae.yml. */
#define MC_CMD_PRIVILEGE_MASK_IN_GRP_MAE 0x10000
+/* enum: This Function/client may call MC_CMD_CLIENT_ALLOC to create new
+ * dynamic client children of itself.
+ */
+#define MC_CMD_PRIVILEGE_MASK_IN_GRP_ALLOC_CLIENT 0x20000
+/* enum: A dynamic client with this privilege may perform all the same DMA
+ * operations as the function client from which it is descended.
+ */
+#define MC_CMD_PRIVILEGE_MASK_IN_GRP_FUNC_DMA 0x40000
+/* enum: A client with this privilege may perform DMA as any PCIe function on
+ * the device and to on-device DDR. It allows clients to use TX-DESC2CMPT-DESC
+ * descriptors, and to use TX-SEG-DESC and TX-MEM2MEM-DESC with an address
+ * space override (i.e. with the ADDR_SPC_EN bit set).
+ */
+#define MC_CMD_PRIVILEGE_MASK_IN_GRP_ARBITRARY_DMA 0x80000
/* enum: Set this bit to indicate that a new privilege mask is to be set,
* otherwise the command will only read the existing mask.
*/
@@ -20368,6 +21994,7 @@
* Read/set link state mode of a VF
*/
#define MC_CMD_LINK_STATE_MODE 0x5c
+#define MC_CMD_LINK_STATE_MODE_MSGSET 0x5c
#undef MC_CMD_0x5c_PRIVILEGE_CTG
#define MC_CMD_0x5c_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -20407,6 +22034,7 @@
* parameter to MC_CMD_INIT_RXQ.
*/
#define MC_CMD_GET_SNAPSHOT_LENGTH 0x101
+#define MC_CMD_GET_SNAPSHOT_LENGTH_MSGSET 0x101
#undef MC_CMD_0x101_PRIVILEGE_CTG
#define MC_CMD_0x101_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -20429,6 +22057,7 @@
* Additional fuse diagnostics
*/
#define MC_CMD_FUSE_DIAGS 0x102
+#define MC_CMD_FUSE_DIAGS_MSGSET 0x102
#undef MC_CMD_0x102_PRIVILEGE_CTG
#define MC_CMD_0x102_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20483,6 +22112,7 @@
* included in one of the masks provided.
*/
#define MC_CMD_PRIVILEGE_MODIFY 0x60
+#define MC_CMD_PRIVILEGE_MODIFY_MSGSET 0x60
#undef MC_CMD_0x60_PRIVILEGE_CTG
#define MC_CMD_0x60_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -20527,6 +22157,7 @@
* Read XPM memory
*/
#define MC_CMD_XPM_READ_BYTES 0x103
+#define MC_CMD_XPM_READ_BYTES_MSGSET 0x103
#undef MC_CMD_0x103_PRIVILEGE_CTG
#define MC_CMD_0x103_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -20559,6 +22190,7 @@
* Write XPM memory
*/
#define MC_CMD_XPM_WRITE_BYTES 0x104
+#define MC_CMD_XPM_WRITE_BYTES_MSGSET 0x104
#undef MC_CMD_0x104_PRIVILEGE_CTG
#define MC_CMD_0x104_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20591,6 +22223,7 @@
* Read XPM sector
*/
#define MC_CMD_XPM_READ_SECTOR 0x105
+#define MC_CMD_XPM_READ_SECTOR_MSGSET 0x105
#undef MC_CMD_0x105_PRIVILEGE_CTG
#define MC_CMD_0x105_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20631,6 +22264,7 @@
* Write XPM sector
*/
#define MC_CMD_XPM_WRITE_SECTOR 0x106
+#define MC_CMD_XPM_WRITE_SECTOR_MSGSET 0x106
#undef MC_CMD_0x106_PRIVILEGE_CTG
#define MC_CMD_0x106_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20677,6 +22311,7 @@
* Invalidate XPM sector
*/
#define MC_CMD_XPM_INVALIDATE_SECTOR 0x107
+#define MC_CMD_XPM_INVALIDATE_SECTOR_MSGSET 0x107
#undef MC_CMD_0x107_PRIVILEGE_CTG
#define MC_CMD_0x107_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20696,6 +22331,7 @@
* Blank-check XPM memory and report bad locations
*/
#define MC_CMD_XPM_BLANK_CHECK 0x108
+#define MC_CMD_XPM_BLANK_CHECK_MSGSET 0x108
#undef MC_CMD_0x108_PRIVILEGE_CTG
#define MC_CMD_0x108_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20733,6 +22369,7 @@
* Blank-check and repair XPM memory
*/
#define MC_CMD_XPM_REPAIR 0x109
+#define MC_CMD_XPM_REPAIR_MSGSET 0x109
#undef MC_CMD_0x109_PRIVILEGE_CTG
#define MC_CMD_0x109_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20756,6 +22393,7 @@
* be performed on an unprogrammed part.
*/
#define MC_CMD_XPM_DECODER_TEST 0x10a
+#define MC_CMD_XPM_DECODER_TEST_MSGSET 0x10a
#undef MC_CMD_0x10a_PRIVILEGE_CTG
#define MC_CMD_0x10a_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20776,6 +22414,7 @@
* first available location to use, or fail with ENOSPC if none left.
*/
#define MC_CMD_XPM_WRITE_TEST 0x10b
+#define MC_CMD_XPM_WRITE_TEST_MSGSET 0x10b
#undef MC_CMD_0x10b_PRIVILEGE_CTG
#define MC_CMD_0x10b_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20797,6 +22436,7 @@
* does match, otherwise it will respond with success before it jumps to IMEM.
*/
#define MC_CMD_EXEC_SIGNED 0x10c
+#define MC_CMD_EXEC_SIGNED_MSGSET 0x10c
#undef MC_CMD_0x10c_PRIVILEGE_CTG
#define MC_CMD_0x10c_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -20827,6 +22467,7 @@
* MC_CMD_EXEC_SIGNED.
*/
#define MC_CMD_PREPARE_SIGNED 0x10d
+#define MC_CMD_PREPARE_SIGNED_MSGSET 0x10d
#undef MC_CMD_0x10d_PRIVILEGE_CTG
#define MC_CMD_0x10d_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -20850,6 +22491,7 @@
* will be removed once it is regarded as stable.
*/
#define MC_CMD_SET_SECURITY_RULE 0x10f
+#define MC_CMD_SET_SECURITY_RULE_MSGSET 0x10f
#undef MC_CMD_0x10f_PRIVILEGE_CTG
#define MC_CMD_0x10f_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -21040,6 +22682,7 @@
* development. This note will be removed once it is regarded as stable.
*/
#define MC_CMD_RESET_SECURITY_RULES 0x110
+#define MC_CMD_RESET_SECURITY_RULES_MSGSET 0x110
#undef MC_CMD_0x110_PRIVILEGE_CTG
#define MC_CMD_0x110_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -21066,6 +22709,7 @@
* will be removed once it is regarded as stable.
*/
#define MC_CMD_GET_SECURITY_RULESET_VERSION 0x111
+#define MC_CMD_GET_SECURITY_RULESET_VERSION_MSGSET 0x111
#undef MC_CMD_0x111_PRIVILEGE_CTG
#define MC_CMD_0x111_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -21096,6 +22740,7 @@
* removed once it is regarded as stable.
*/
#define MC_CMD_SECURITY_RULE_COUNTER_ALLOC 0x112
+#define MC_CMD_SECURITY_RULE_COUNTER_ALLOC_MSGSET 0x112
#undef MC_CMD_0x112_PRIVILEGE_CTG
#define MC_CMD_0x112_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -21134,6 +22779,7 @@
* removed once it is regarded as stable.
*/
#define MC_CMD_SECURITY_RULE_COUNTER_FREE 0x113
+#define MC_CMD_SECURITY_RULE_COUNTER_FREE_MSGSET 0x113
#undef MC_CMD_0x113_PRIVILEGE_CTG
#define MC_CMD_0x113_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -21169,6 +22815,7 @@
* will be removed once it is regarded as stable.
*/
#define MC_CMD_SUBNET_MAP_SET_NODE 0x114
+#define MC_CMD_SUBNET_MAP_SET_NODE_MSGSET 0x114
#undef MC_CMD_0x114_PRIVILEGE_CTG
#define MC_CMD_0x114_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -21224,6 +22871,7 @@
* will be removed once it is regarded as stable.
*/
#define MC_CMD_REMOTE_PORTRANGE_MAP_SET_TREE 0x115
+#define MC_CMD_REMOTE_PORTRANGE_MAP_SET_TREE_MSGSET 0x115
#undef MC_CMD_0x115_PRIVILEGE_CTG
#define MC_CMD_0x115_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -21258,6 +22906,7 @@
* will be removed once it is regarded as stable.
*/
#define MC_CMD_LOCAL_PORTRANGE_MAP_SET_TREE 0x116
+#define MC_CMD_LOCAL_PORTRANGE_MAP_SET_TREE_MSGSET 0x116
#undef MC_CMD_0x116_PRIVILEGE_CTG
#define MC_CMD_0x116_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -21311,6 +22960,7 @@
* cause all functions to see a reset. (Available on Medford only.)
*/
#define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS 0x117
+#define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_MSGSET 0x117
#undef MC_CMD_0x117_PRIVILEGE_CTG
#define MC_CMD_0x117_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -21357,6 +23007,7 @@
* priority.
*/
#define MC_CMD_RX_BALANCING 0x118
+#define MC_CMD_RX_BALANCING_MSGSET 0x118
#undef MC_CMD_0x118_PRIVILEGE_CTG
#define MC_CMD_0x118_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -21386,6 +23037,7 @@
* info in respect to the binding protocol.
*/
#define MC_CMD_TSA_BIND 0x119
+#define MC_CMD_TSA_BIND_MSGSET 0x119
#undef MC_CMD_0x119_PRIVILEGE_CTG
#define MC_CMD_0x119_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -21951,6 +23603,7 @@
* OP_GET_CACHED_VERSION. All other sub-operations are prohibited.
*/
#define MC_CMD_MANAGE_SECURITY_RULESET_CACHE 0x11a
+#define MC_CMD_MANAGE_SECURITY_RULESET_CACHE_MSGSET 0x11a
#undef MC_CMD_0x11a_PRIVILEGE_CTG
#define MC_CMD_0x11a_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -22007,6 +23660,7 @@
* if the tag is already present.
*/
#define MC_CMD_NVRAM_PRIVATE_APPEND 0x11c
+#define MC_CMD_NVRAM_PRIVATE_APPEND_MSGSET 0x11c
#undef MC_CMD_0x11c_PRIVILEGE_CTG
#define MC_CMD_0x11c_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -22041,6 +23695,7 @@
* correctly at ATE.
*/
#define MC_CMD_XPM_VERIFY_CONTENTS 0x11b
+#define MC_CMD_XPM_VERIFY_CONTENTS_MSGSET 0x11b
#undef MC_CMD_0x11b_PRIVILEGE_CTG
#define MC_CMD_0x11b_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -22084,6 +23739,7 @@
* and TMR_RELOAD_ACT_NS).
*/
#define MC_CMD_SET_EVQ_TMR 0x120
+#define MC_CMD_SET_EVQ_TMR_MSGSET 0x120
#undef MC_CMD_0x120_PRIVILEGE_CTG
#define MC_CMD_0x120_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -22122,6 +23778,7 @@
* Query properties about the event queue timers.
*/
#define MC_CMD_GET_EVQ_TMR_PROPERTIES 0x122
+#define MC_CMD_GET_EVQ_TMR_PROPERTIES_MSGSET 0x122
#undef MC_CMD_0x122_PRIVILEGE_CTG
#define MC_CMD_0x122_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -22191,6 +23848,7 @@
* non used switch buffers.
*/
#define MC_CMD_ALLOCATE_TX_VFIFO_CP 0x11d
+#define MC_CMD_ALLOCATE_TX_VFIFO_CP_MSGSET 0x11d
#undef MC_CMD_0x11d_PRIVILEGE_CTG
#define MC_CMD_0x11d_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -22198,7 +23856,8 @@
/* MC_CMD_ALLOCATE_TX_VFIFO_CP_IN msgrequest */
#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_LEN 20
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_INSTANCE_OFST 0
#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_INSTANCE_LEN 4
@@ -22243,6 +23902,7 @@
* previously allocated common pools.
*/
#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO 0x11e
+#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_MSGSET 0x11e
#undef MC_CMD_0x11e_PRIVILEGE_CTG
#define MC_CMD_0x11e_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -22296,6 +23956,7 @@
* ready to be re-used.
*/
#define MC_CMD_TEARDOWN_TX_VFIFO_VF 0x11f
+#define MC_CMD_TEARDOWN_TX_VFIFO_VF_MSGSET 0x11f
#undef MC_CMD_0x11f_PRIVILEGE_CTG
#define MC_CMD_0x11f_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -22316,6 +23977,7 @@
* it ready to be re-used.
*/
#define MC_CMD_DEALLOCATE_TX_VFIFO_CP 0x121
+#define MC_CMD_DEALLOCATE_TX_VFIFO_CP_MSGSET 0x121
#undef MC_CMD_0x121_PRIVILEGE_CTG
#define MC_CMD_0x121_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -22344,6 +24006,7 @@
* or 0 if there has not been a previous rekey.
*/
#define MC_CMD_REKEY 0x123
+#define MC_CMD_REKEY_MSGSET 0x123
#undef MC_CMD_0x123_PRIVILEGE_CTG
#define MC_CMD_0x123_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -22368,6 +24031,7 @@
* not yet assigned.
*/
#define MC_CMD_SWITCH_GET_UNASSIGNED_BUFFERS 0x124
+#define MC_CMD_SWITCH_GET_UNASSIGNED_BUFFERS_MSGSET 0x124
#undef MC_CMD_0x124_PRIVILEGE_CTG
#define MC_CMD_0x124_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -22396,6 +24060,7 @@
* the required bits were not set.
*/
#define MC_CMD_SET_SECURITY_FUSES 0x126
+#define MC_CMD_SET_SECURITY_FUSES_MSGSET 0x126
#undef MC_CMD_0x126_PRIVILEGE_CTG
#define MC_CMD_0x126_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -22438,6 +24103,7 @@
* SF-117371-SW
*/
#define MC_CMD_TSA_INFO 0x127
+#define MC_CMD_TSA_INFO_MSGSET 0x127
#undef MC_CMD_0x127_PRIVILEGE_CTG
#define MC_CMD_0x127_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -22614,6 +24280,7 @@
* Doxbox reference SF-117371-SW
*/
#define MC_CMD_HOST_INFO 0x128
+#define MC_CMD_HOST_INFO_MSGSET 0x128
#undef MC_CMD_0x128_PRIVILEGE_CTG
#define MC_CMD_0x128_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -22681,6 +24348,7 @@
* section 'Adapter Information'
*/
#define MC_CMD_TSAN_INFO 0x129
+#define MC_CMD_TSAN_INFO_MSGSET 0x129
#undef MC_CMD_0x129_PRIVILEGE_CTG
#define MC_CMD_0x129_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -22780,6 +24448,7 @@
* TSA adapter statistics operations.
*/
#define MC_CMD_TSA_STATISTICS 0x130
+#define MC_CMD_TSA_STATISTICS_MSGSET 0x130
#undef MC_CMD_0x130_PRIVILEGE_CTG
#define MC_CMD_0x130_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -22884,14 +24553,26 @@
#define MC_TSA_STATISTICS_ENTRY_TX_STAT_OFST 0
#define MC_TSA_STATISTICS_ENTRY_TX_STAT_LEN 8
#define MC_TSA_STATISTICS_ENTRY_TX_STAT_LO_OFST 0
+#define MC_TSA_STATISTICS_ENTRY_TX_STAT_LO_LEN 4
+#define MC_TSA_STATISTICS_ENTRY_TX_STAT_LO_LBN 0
+#define MC_TSA_STATISTICS_ENTRY_TX_STAT_LO_WIDTH 32
#define MC_TSA_STATISTICS_ENTRY_TX_STAT_HI_OFST 4
+#define MC_TSA_STATISTICS_ENTRY_TX_STAT_HI_LEN 4
+#define MC_TSA_STATISTICS_ENTRY_TX_STAT_HI_LBN 32
+#define MC_TSA_STATISTICS_ENTRY_TX_STAT_HI_WIDTH 32
#define MC_TSA_STATISTICS_ENTRY_TX_STAT_LBN 0
#define MC_TSA_STATISTICS_ENTRY_TX_STAT_WIDTH 64
/* Rx statistics counter */
#define MC_TSA_STATISTICS_ENTRY_RX_STAT_OFST 8
#define MC_TSA_STATISTICS_ENTRY_RX_STAT_LEN 8
#define MC_TSA_STATISTICS_ENTRY_RX_STAT_LO_OFST 8
+#define MC_TSA_STATISTICS_ENTRY_RX_STAT_LO_LEN 4
+#define MC_TSA_STATISTICS_ENTRY_RX_STAT_LO_LBN 64
+#define MC_TSA_STATISTICS_ENTRY_RX_STAT_LO_WIDTH 32
#define MC_TSA_STATISTICS_ENTRY_RX_STAT_HI_OFST 12
+#define MC_TSA_STATISTICS_ENTRY_RX_STAT_HI_LEN 4
+#define MC_TSA_STATISTICS_ENTRY_RX_STAT_HI_LBN 96
+#define MC_TSA_STATISTICS_ENTRY_RX_STAT_HI_WIDTH 32
#define MC_TSA_STATISTICS_ENTRY_RX_STAT_LBN 64
#define MC_TSA_STATISTICS_ENTRY_RX_STAT_WIDTH 64
@@ -22904,6 +24585,7 @@
* installing TSA binding certificates. See SF-117631-TC.
*/
#define MC_CMD_ERASE_INITIAL_NIC_SECRET 0x131
+#define MC_CMD_ERASE_INITIAL_NIC_SECRET_MSGSET 0x131
#undef MC_CMD_0x131_PRIVILEGE_CTG
#define MC_CMD_0x131_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -22921,6 +24603,7 @@
* NIC for TSA binding.
*/
#define MC_CMD_TSA_CONFIG 0x64
+#define MC_CMD_TSA_CONFIG_MSGSET 0x64
#undef MC_CMD_0x64_PRIVILEGE_CTG
#define MC_CMD_0x64_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -23038,6 +24721,7 @@
* to a TSA adapter.
*/
#define MC_CMD_TSA_IPADDR 0x65
+#define MC_CMD_TSA_IPADDR_MSGSET 0x65
#undef MC_CMD_0x65_PRIVILEGE_CTG
#define MC_CMD_0x65_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -23089,7 +24773,13 @@
#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_OFST 8
#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_LEN 8
#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_LO_OFST 8
+#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_LO_LEN 4
+#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_LO_LBN 64
+#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_LO_WIDTH 32
#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_HI_OFST 12
+#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_HI_LEN 4
+#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_HI_LBN 96
+#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_HI_WIDTH 32
#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_MINNUM 1
#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_MAXNUM 30
#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_MAXNUM_MCDI2 126
@@ -23119,7 +24809,13 @@
#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_OFST 8
#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_LEN 8
#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_LO_OFST 8
+#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_LO_LEN 4
+#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_LO_LBN 64
+#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_LO_WIDTH 32
#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_HI_OFST 12
+#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_HI_LEN 4
+#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_HI_LBN 96
+#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_HI_WIDTH 32
#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_MINNUM 1
#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_MAXNUM 30
#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_MAXNUM_MCDI2 126
@@ -23135,6 +24831,7 @@
* disabled.
*/
#define MC_CMD_SECURE_NIC_INFO 0x132
+#define MC_CMD_SECURE_NIC_INFO_MSGSET 0x132
#undef MC_CMD_0x132_PRIVILEGE_CTG
#define MC_CMD_0x132_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -23228,6 +24925,7 @@
* parameters in request or response.
*/
#define MC_CMD_TSA_TEST 0x125
+#define MC_CMD_TSA_TEST_MSGSET 0x125
#undef MC_CMD_0x125_PRIVILEGE_CTG
#define MC_CMD_0x125_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -23249,6 +24947,7 @@
* rule-set transitions.
*/
#define MC_CMD_TSA_RULESET_OVERRIDE 0x12a
+#define MC_CMD_TSA_RULESET_OVERRIDE_MSGSET 0x12a
#undef MC_CMD_0x12a_PRIVILEGE_CTG
#define MC_CMD_0x12a_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -23281,6 +24980,7 @@
* Specific usage is determined by the TYPE field.
*/
#define MC_CMD_TSAC_REQUEST 0x12b
+#define MC_CMD_TSAC_REQUEST_MSGSET 0x12b
#undef MC_CMD_0x12b_PRIVILEGE_CTG
#define MC_CMD_0x12b_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -23305,6 +25005,7 @@
* Get the version of the SUC
*/
#define MC_CMD_SUC_VERSION 0x134
+#define MC_CMD_SUC_VERSION_MSGSET 0x134
#undef MC_CMD_0x134_PRIVILEGE_CTG
#define MC_CMD_0x134_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -23350,6 +25051,7 @@
* Operations to support manftest on SUC based systems.
*/
#define MC_CMD_SUC_MANFTEST 0x135
+#define MC_CMD_SUC_MANFTEST_MSGSET 0x135
#undef MC_CMD_0x135_PRIVILEGE_CTG
#define MC_CMD_0x135_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -23546,6 +25248,7 @@
* Request a certificate.
*/
#define MC_CMD_GET_CERTIFICATE 0x12c
+#define MC_CMD_GET_CERTIFICATE_MSGSET 0x12c
#undef MC_CMD_0x12c_PRIVILEGE_CTG
#define MC_CMD_0x12c_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -23620,6 +25323,7 @@
* Get a global value which applies to all PCI functions
*/
#define MC_CMD_GET_NIC_GLOBAL 0x12d
+#define MC_CMD_GET_NIC_GLOBAL_MSGSET 0x12d
#undef MC_CMD_0x12d_PRIVILEGE_CTG
#define MC_CMD_0x12d_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -23647,6 +25351,7 @@
* appropriate error otherwise (see key descriptions).
*/
#define MC_CMD_SET_NIC_GLOBAL 0x12e
+#define MC_CMD_SET_NIC_GLOBAL_MSGSET 0x12e
#undef MC_CMD_0x12e_PRIVILEGE_CTG
#define MC_CMD_0x12e_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -23694,6 +25399,7 @@
* firmware buffer for later extraction.
*/
#define MC_CMD_LTSSM_TRACE_POLL 0x12f
+#define MC_CMD_LTSSM_TRACE_POLL_MSGSET 0x12f
#undef MC_CMD_0x12f_PRIVILEGE_CTG
#define MC_CMD_0x12f_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -23731,7 +25437,13 @@
#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_OFST 8
#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_LEN 8
#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_LO_OFST 8
+#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_LO_LEN 4
+#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_LO_LBN 64
+#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_LO_WIDTH 32
#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_HI_OFST 12
+#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_HI_LEN 4
+#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_HI_LBN 96
+#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_HI_WIDTH 32
#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_MINNUM 0
#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_MAXNUM 30
#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_MAXNUM_MCDI2 126
@@ -23765,6 +25477,7 @@
* firmware variant.
*/
#define MC_CMD_TELEMETRY_ENABLE 0x138
+#define MC_CMD_TELEMETRY_ENABLE_MSGSET 0x138
#undef MC_CMD_0x138_PRIVILEGE_CTG
#define MC_CMD_0x138_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -23856,6 +25569,7 @@
* Reference - SF-120569-SW Telemetry Firmware Design.
*/
#define MC_CMD_TELEMETRY_CONFIG 0x139
+#define MC_CMD_TELEMETRY_CONFIG_MSGSET 0x139
#undef MC_CMD_0x139_PRIVILEGE_CTG
#define MC_CMD_0x139_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -23925,6 +25639,7 @@
* due to resource constraints, returns ENOSPC.
*/
#define MC_CMD_GET_RX_PREFIX_ID 0x13b
+#define MC_CMD_GET_RX_PREFIX_ID_MSGSET 0x13b
#undef MC_CMD_0x13b_PRIVILEGE_CTG
#define MC_CMD_0x13b_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -23935,7 +25650,13 @@
#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_OFST 0
#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_LEN 8
#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_LO_OFST 0
+#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_LO_LEN 4
+#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_LO_LBN 0
+#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_LO_WIDTH 32
#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_HI_OFST 4
+#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_HI_LEN 4
+#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_HI_LBN 32
+#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_HI_WIDTH 32
#define MC_CMD_GET_RX_PREFIX_ID_IN_LENGTH_OFST 0
#define MC_CMD_GET_RX_PREFIX_ID_IN_LENGTH_LBN 0
#define MC_CMD_GET_RX_PREFIX_ID_IN_LENGTH_WIDTH 1
@@ -24056,6 +25777,7 @@
* created with that prefix id
*/
#define MC_CMD_QUERY_RX_PREFIX_ID 0x13c
+#define MC_CMD_QUERY_RX_PREFIX_ID_MSGSET 0x13c
#undef MC_CMD_0x13c_PRIVILEGE_CTG
#define MC_CMD_0x13c_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24092,6 +25814,7 @@
* A command to perform various bundle-related operations on insecure cards.
*/
#define MC_CMD_BUNDLE 0x13d
+#define MC_CMD_BUNDLE_MSGSET 0x13d
#undef MC_CMD_0x13d_PRIVILEGE_CTG
#define MC_CMD_0x13d_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -24154,6 +25877,7 @@
* Read all VPD starting from a given address
*/
#define MC_CMD_GET_VPD 0x165
+#define MC_CMD_GET_VPD_MSGSET 0x165
#undef MC_CMD_0x165_PRIVILEGE_CTG
#define MC_CMD_0x165_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24185,6 +25909,7 @@
* Provide information about the NC-SI stack
*/
#define MC_CMD_GET_NCSI_INFO 0x167
+#define MC_CMD_GET_NCSI_INFO_MSGSET 0x167
#undef MC_CMD_0x167_PRIVILEGE_CTG
#define MC_CMD_0x167_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24256,6 +25981,7 @@
* System lockdown, when enabled firmware updates are blocked.
*/
#define MC_CMD_FIRMWARE_SET_LOCKDOWN 0x16f
+#define MC_CMD_FIRMWARE_SET_LOCKDOWN_MSGSET 0x16f
#undef MC_CMD_0x16f_PRIVILEGE_CTG
#define MC_CMD_0x16f_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -24278,6 +26004,7 @@
* documentation.
*/
#define MC_CMD_GET_TEST_FEATURES 0x1ac
+#define MC_CMD_GET_TEST_FEATURES_MSGSET 0x1ac
#undef MC_CMD_0x1ac_PRIVILEGE_CTG
#define MC_CMD_0x1ac_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24300,6 +26027,253 @@
#define MC_CMD_GET_TEST_FEATURE_OUT_TEST_FEATURES_MAXNUM 63
#define MC_CMD_GET_TEST_FEATURE_OUT_TEST_FEATURES_MAXNUM_MCDI2 255
+
+/***********************************/
+/* MC_CMD_FPGA
+ * A command to perform various fpga-related operations on platforms that
+ * include FPGAs. Note that some platforms may only support a subset of these
+ * operations.
+ */
+#define MC_CMD_FPGA 0x1bf
+#define MC_CMD_FPGA_MSGSET 0x1bf
+#undef MC_CMD_0x1bf_PRIVILEGE_CTG
+
+#define MC_CMD_0x1bf_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_FPGA_IN msgrequest */
+#define MC_CMD_FPGA_IN_LEN 4
+/* Sub-command code */
+#define MC_CMD_FPGA_IN_OP_OFST 0
+#define MC_CMD_FPGA_IN_OP_LEN 4
+/* enum: Get the FPGA version string. */
+#define MC_CMD_FPGA_IN_OP_GET_VERSION 0x0
+/* enum: Read bitmask of features supported in the FPGA image. */
+#define MC_CMD_FPGA_IN_OP_GET_CAPABILITIES 0x1
+/* enum: Perform a FPGA reset. */
+#define MC_CMD_FPGA_IN_OP_RESET 0x2
+/* enum: Set active flash device. */
+#define MC_CMD_FPGA_IN_OP_SELECT_FLASH 0x3
+/* enum: Get active flash device. */
+#define MC_CMD_FPGA_IN_OP_GET_ACTIVE_FLASH 0x4
+/* enum: Configure internal link i.e. the FPGA port facing the ASIC. */
+#define MC_CMD_FPGA_IN_OP_SET_INTERNAL_LINK 0x5
+/* enum: Read internal link configuration. */
+#define MC_CMD_FPGA_IN_OP_GET_INTERNAL_LINK 0x6
+
+/* MC_CMD_FPGA_OP_GET_VERSION_IN msgrequest: Get the FPGA version string. A
+ * free-format string is returned in response to this command. Any checks on
+ * supported FPGA operations are based on the response to
+ * MC_CMD_FPGA_OP_GET_CAPABILITIES.
+ */
+#define MC_CMD_FPGA_OP_GET_VERSION_IN_LEN 4
+/* Sub-command code. Must be OP_GET_VERSION */
+#define MC_CMD_FPGA_OP_GET_VERSION_IN_OP_OFST 0
+#define MC_CMD_FPGA_OP_GET_VERSION_IN_OP_LEN 4
+
+/* MC_CMD_FPGA_OP_GET_VERSION_OUT msgresponse: Returns the version string. */
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_LENMIN 0
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_LENMAX 252
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_LENMAX_MCDI2 1020
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_LEN(num) (0+1*(num))
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_VERSION_NUM(len) (((len)-0)/1)
+/* Null-terminated string containing version information. */
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_VERSION_OFST 0
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_VERSION_LEN 1
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_VERSION_MINNUM 0
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_VERSION_MAXNUM 252
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_VERSION_MAXNUM_MCDI2 1020
+
+/* MC_CMD_FPGA_OP_GET_CAPABILITIES_IN msgrequest: Read bitmask of features
+ * supported in the FPGA image.
+ */
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_IN_LEN 4
+/* Sub-command code. Must be OP_GET_CAPABILITIES */
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_IN_OP_OFST 0
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_IN_OP_LEN 4
+
+/* MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT msgresponse: Returns the version string.
+ */
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_LEN 4
+/* Bit-mask of supported features. */
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_CAPABILITIES_OFST 0
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_CAPABILITIES_LEN 4
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_MAC_OFST 0
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_MAC_LBN 0
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_MAC_WIDTH 1
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_MAE_OFST 0
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_MAE_LBN 1
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_MAE_WIDTH 1
+
+/* MC_CMD_FPGA_OP_RESET_IN msgrequest: Perform a FPGA reset operation where
+ * supported.
+ */
+#define MC_CMD_FPGA_OP_RESET_IN_LEN 4
+/* Sub-command code. Must be OP_RESET */
+#define MC_CMD_FPGA_OP_RESET_IN_OP_OFST 0
+#define MC_CMD_FPGA_OP_RESET_IN_OP_LEN 4
+
+/* MC_CMD_FPGA_OP_RESET_OUT msgresponse */
+#define MC_CMD_FPGA_OP_RESET_OUT_LEN 0
+
+/* MC_CMD_FPGA_OP_SELECT_FLASH_IN msgrequest: Set active FPGA flash device.
+ * Returns EINVAL if selected flash index does not exist on the platform under
+ * test.
+ */
+#define MC_CMD_FPGA_OP_SELECT_FLASH_IN_LEN 8
+/* Sub-command code. Must be OP_SELECT_FLASH */
+#define MC_CMD_FPGA_OP_SELECT_FLASH_IN_OP_OFST 0
+#define MC_CMD_FPGA_OP_SELECT_FLASH_IN_OP_LEN 4
+/* Flash device identifier. */
+#define MC_CMD_FPGA_OP_SELECT_FLASH_IN_FLASH_ID_OFST 4
+#define MC_CMD_FPGA_OP_SELECT_FLASH_IN_FLASH_ID_LEN 4
+/* Enum values, see field(s): */
+/* MC_CMD_FPGA_FLASH_INDEX */
+
+/* MC_CMD_FPGA_OP_SELECT_FLASH_OUT msgresponse */
+#define MC_CMD_FPGA_OP_SELECT_FLASH_OUT_LEN 0
+
+/* MC_CMD_FPGA_OP_GET_ACTIVE_FLASH_IN msgrequest: Get active FPGA flash device.
+ */
+#define MC_CMD_FPGA_OP_GET_ACTIVE_FLASH_IN_LEN 4
+/* Sub-command code. Must be OP_GET_ACTIVE_FLASH */
+#define MC_CMD_FPGA_OP_GET_ACTIVE_FLASH_IN_OP_OFST 0
+#define MC_CMD_FPGA_OP_GET_ACTIVE_FLASH_IN_OP_LEN 4
+
+/* MC_CMD_FPGA_OP_GET_ACTIVE_FLASH_OUT msgresponse: Returns flash identifier
+ * for current active flash.
+ */
+#define MC_CMD_FPGA_OP_GET_ACTIVE_FLASH_OUT_LEN 4
+/* Flash device identifier. */
+#define MC_CMD_FPGA_OP_GET_ACTIVE_FLASH_OUT_FLASH_ID_OFST 0
+#define MC_CMD_FPGA_OP_GET_ACTIVE_FLASH_OUT_FLASH_ID_LEN 4
+/* Enum values, see field(s): */
+/* MC_CMD_FPGA_FLASH_INDEX */
+
+/* MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN msgrequest: Configure FPGA internal
+ * port, facing the ASIC
+ */
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_LEN 12
+/* Sub-command code. Must be OP_SET_INTERNAL_LINK */
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_OP_OFST 0
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_OP_LEN 4
+/* Flags */
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_FLAGS_OFST 4
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_FLAGS_LEN 4
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_LINK_STATE_OFST 4
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_LINK_STATE_LBN 0
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_LINK_STATE_WIDTH 2
+/* enum: Unmodified, same as last state set by firmware */
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_AUTO 0x0
+/* enum: Configure link-up */
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_UP 0x1
+/* enum: Configure link-down */
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_DOWN 0x2
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_FLUSH_OFST 4
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_FLUSH_LBN 2
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_FLUSH_WIDTH 1
+/* Link speed to be applied on FPGA internal port MAC. */
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_SPEED_OFST 8
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_SPEED_LEN 4
+
+/* MC_CMD_FPGA_OP_SET_INTERNAL_LINK_OUT msgresponse */
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_OUT_LEN 0
+
+/* MC_CMD_FPGA_OP_GET_INTERNAL_LINK_IN msgrequest: Read FPGA internal port
+ * configuration and status
+ */
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_IN_LEN 4
+/* Sub-command code. Must be OP_GET_INTERNAL_LINK */
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_IN_OP_OFST 0
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_IN_OP_LEN 4
+
+/* MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT msgresponse: Response format for read
+ * FPGA internal port configuration and status
+ */
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT_LEN 8
+/* Flags */
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT_FLAGS_OFST 0
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT_FLAGS_LEN 4
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT_LINK_STATE_OFST 0
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT_LINK_STATE_LBN 0
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT_LINK_STATE_WIDTH 2
+/* Enum values, see field(s): */
+/* MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN/FLAGS */
+/* Link speed set on FPGA internal port MAC. */
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT_SPEED_OFST 4
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT_SPEED_LEN 4
+
+
+/***********************************/
+/* MC_CMD_EXTERNAL_MAE_GET_LINK_MODE
+ * This command is expected to be used on a U25 board with an MAE in the FPGA.
+ * It does not modify the operational state of the NIC. The modes are described
+ * in XN-200039-TC - U25 OVS packet formats.
+ */
+#define MC_CMD_EXTERNAL_MAE_GET_LINK_MODE 0x1c0
+#define MC_CMD_EXTERNAL_MAE_GET_LINK_MODE_MSGSET 0x1c0
+#undef MC_CMD_0x1c0_PRIVILEGE_CTG
+
+#define MC_CMD_0x1c0_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_EXTERNAL_MAE_GET_LINK_MODE_IN msgrequest */
+#define MC_CMD_EXTERNAL_MAE_GET_LINK_MODE_IN_LEN 0
+
+/* MC_CMD_EXTERNAL_MAE_GET_LINK_MODE_OUT msgresponse */
+#define MC_CMD_EXTERNAL_MAE_GET_LINK_MODE_OUT_LEN 4
+/* The current link mode */
+#define MC_CMD_EXTERNAL_MAE_GET_LINK_MODE_OUT_MODE_OFST 0
+#define MC_CMD_EXTERNAL_MAE_GET_LINK_MODE_OUT_MODE_LEN 4
+/* Enum values, see field(s): */
+/* MC_CMD_EXTERNAL_MAE_LINK_MODE */
+
+
+/***********************************/
+/* MC_CMD_EXTERNAL_MAE_SET_LINK_MODE
+ * This command is expected to be used on a U25 board with an MAE in the FPGA.
+ * The modes are described in XN-200039-TC - U25 OVS packet formats. This
+ * command will set the link between the FPGA and the X2 to the specified new
+ * mode. It will first enter bootstrap mode, make sure there are no packets in
+ * flight and then enter the requested mode. In order to make sure there are no
+ * packets in flight, it will flush the X2 TX path, the FPGA RX path from the
+ * X2, the FPGA TX path to the X2 and the X2 RX path. The driver is responsible
+ * for making sure there are no TX or RX descriptors posted on any TXQ or RXQ
+ * associated with the affected port before invoking this command. This command
+ * is run implicitly with MODE set to LEGACY when MC_CMD_DRV_ATTACH is
+ * executed.
+ */
+#define MC_CMD_EXTERNAL_MAE_SET_LINK_MODE 0x1c1
+#define MC_CMD_EXTERNAL_MAE_SET_LINK_MODE_MSGSET 0x1c1
+#undef MC_CMD_0x1c1_PRIVILEGE_CTG
+
+#define MC_CMD_0x1c1_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_EXTERNAL_MAE_SET_LINK_MODE_IN msgrequest */
+#define MC_CMD_EXTERNAL_MAE_SET_LINK_MODE_IN_LEN 4
+/* The new link mode. */
+#define MC_CMD_EXTERNAL_MAE_SET_LINK_MODE_IN_MODE_OFST 0
+#define MC_CMD_EXTERNAL_MAE_SET_LINK_MODE_IN_MODE_LEN 4
+/* Enum values, see field(s): */
+/* MC_CMD_EXTERNAL_MAE_LINK_MODE */
+
+/* MC_CMD_EXTERNAL_MAE_SET_LINK_MODE_OUT msgresponse */
+#define MC_CMD_EXTERNAL_MAE_SET_LINK_MODE_OUT_LEN 0
+
+/* CLIENT_HANDLE structuredef: A client is an abstract entity that can make
+ * requests of the device and that can own resources managed by the device.
+ * Examples of clients include PCIe functions and dynamic clients. A client
+ * handle is a 32b opaque value used to refer to a client. Further details can
+ * be found within XN-200418-TC.
+ */
+#define CLIENT_HANDLE_LEN 4
+#define CLIENT_HANDLE_OPAQUE_OFST 0
+#define CLIENT_HANDLE_OPAQUE_LEN 4
+/* enum: A client handle guaranteed never to refer to a real client. */
+#define CLIENT_HANDLE_NULL 0xffffffff
+/* enum: Used to refer to the calling client. */
+#define CLIENT_HANDLE_SELF 0xfffffffe
+#define CLIENT_HANDLE_OPAQUE_LBN 0
+#define CLIENT_HANDLE_OPAQUE_WIDTH 32
+
/* CLOCK_INFO structuredef: Information about a single hardware clock */
#define CLOCK_INFO_LEN 28
/* Enumeration that uniquely identifies the clock */
@@ -24333,7 +26307,13 @@
#define CLOCK_INFO_FREQUENCY_OFST 4
#define CLOCK_INFO_FREQUENCY_LEN 8
#define CLOCK_INFO_FREQUENCY_LO_OFST 4
+#define CLOCK_INFO_FREQUENCY_LO_LEN 4
+#define CLOCK_INFO_FREQUENCY_LO_LBN 32
+#define CLOCK_INFO_FREQUENCY_LO_WIDTH 32
#define CLOCK_INFO_FREQUENCY_HI_OFST 8
+#define CLOCK_INFO_FREQUENCY_HI_LEN 4
+#define CLOCK_INFO_FREQUENCY_HI_LBN 64
+#define CLOCK_INFO_FREQUENCY_HI_WIDTH 32
#define CLOCK_INFO_FREQUENCY_LBN 32
#define CLOCK_INFO_FREQUENCY_WIDTH 64
/* Human-readable ASCII name for clock, with NUL termination */
@@ -24343,12 +26323,62 @@
#define CLOCK_INFO_NAME_LBN 96
#define CLOCK_INFO_NAME_WIDTH 8
+/* SCHED_CREDIT_CHECK_RESULT structuredef */
+#define SCHED_CREDIT_CHECK_RESULT_LEN 16
+/* The instance of the scheduler. Refer to XN-200389-AW for the location of
+ * these schedulers in the hardware.
+ */
+#define SCHED_CREDIT_CHECK_RESULT_SCHED_INSTANCE_OFST 0
+#define SCHED_CREDIT_CHECK_RESULT_SCHED_INSTANCE_LEN 1
+#define SCHED_CREDIT_CHECK_RESULT_HUB_HOST_A 0x0 /* enum */
+#define SCHED_CREDIT_CHECK_RESULT_HUB_NET_A 0x1 /* enum */
+#define SCHED_CREDIT_CHECK_RESULT_HUB_B 0x2 /* enum */
+#define SCHED_CREDIT_CHECK_RESULT_HUB_HOST_C 0x3 /* enum */
+#define SCHED_CREDIT_CHECK_RESULT_HUB_NET_TX 0x4 /* enum */
+#define SCHED_CREDIT_CHECK_RESULT_HUB_HOST_D 0x5 /* enum */
+#define SCHED_CREDIT_CHECK_RESULT_HUB_REPLAY 0x6 /* enum */
+#define SCHED_CREDIT_CHECK_RESULT_DMAC_H2C 0x7 /* enum */
+#define SCHED_CREDIT_CHECK_RESULT_SCHED_INSTANCE_LBN 0
+#define SCHED_CREDIT_CHECK_RESULT_SCHED_INSTANCE_WIDTH 8
+/* The type of node that this result refers to. */
+#define SCHED_CREDIT_CHECK_RESULT_NODE_TYPE_OFST 1
+#define SCHED_CREDIT_CHECK_RESULT_NODE_TYPE_LEN 1
+/* enum: Destination node */
+#define SCHED_CREDIT_CHECK_RESULT_DEST 0x0
+/* enum: Source node */
+#define SCHED_CREDIT_CHECK_RESULT_SOURCE 0x1
+#define SCHED_CREDIT_CHECK_RESULT_NODE_TYPE_LBN 8
+#define SCHED_CREDIT_CHECK_RESULT_NODE_TYPE_WIDTH 8
+/* Level of node in scheduler hierarchy (level 0 is the bottom of the
+ * hierarchy, increasing towards the root node).
+ */
+#define SCHED_CREDIT_CHECK_RESULT_NODE_LEVEL_OFST 2
+#define SCHED_CREDIT_CHECK_RESULT_NODE_LEVEL_LEN 2
+#define SCHED_CREDIT_CHECK_RESULT_NODE_LEVEL_LBN 16
+#define SCHED_CREDIT_CHECK_RESULT_NODE_LEVEL_WIDTH 16
+/* Node index */
+#define SCHED_CREDIT_CHECK_RESULT_NODE_INDEX_OFST 4
+#define SCHED_CREDIT_CHECK_RESULT_NODE_INDEX_LEN 4
+#define SCHED_CREDIT_CHECK_RESULT_NODE_INDEX_LBN 32
+#define SCHED_CREDIT_CHECK_RESULT_NODE_INDEX_WIDTH 32
+/* The number of credits the node is expected to have. */
+#define SCHED_CREDIT_CHECK_RESULT_EXPECTED_CREDITS_OFST 8
+#define SCHED_CREDIT_CHECK_RESULT_EXPECTED_CREDITS_LEN 4
+#define SCHED_CREDIT_CHECK_RESULT_EXPECTED_CREDITS_LBN 64
+#define SCHED_CREDIT_CHECK_RESULT_EXPECTED_CREDITS_WIDTH 32
+/* The number of credits the node actually had. */
+#define SCHED_CREDIT_CHECK_RESULT_ACTUAL_CREDITS_OFST 12
+#define SCHED_CREDIT_CHECK_RESULT_ACTUAL_CREDITS_LEN 4
+#define SCHED_CREDIT_CHECK_RESULT_ACTUAL_CREDITS_LBN 96
+#define SCHED_CREDIT_CHECK_RESULT_ACTUAL_CREDITS_WIDTH 32
+
/***********************************/
/* MC_CMD_GET_CLOCKS_INFO
* Get information about the device clocks
*/
#define MC_CMD_GET_CLOCKS_INFO 0x166
+#define MC_CMD_GET_CLOCKS_INFO_MSGSET 0x166
#undef MC_CMD_0x166_PRIVILEGE_CTG
#define MC_CMD_0x166_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24387,6 +26417,7 @@
* returns ENOSPC if the caller's table is full.
*/
#define MC_CMD_VNIC_ENCAP_RULE_ADD 0x16d
+#define MC_CMD_VNIC_ENCAP_RULE_ADD_MSGSET 0x16d
#undef MC_CMD_0x16d_PRIVILEGE_CTG
#define MC_CMD_0x16d_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24469,6 +26500,7 @@
* if the input HANDLE doesn't correspond to an existing rule.
*/
#define MC_CMD_VNIC_ENCAP_RULE_REMOVE 0x16e
+#define MC_CMD_VNIC_ENCAP_RULE_REMOVE_MSGSET 0x16e
#undef MC_CMD_0x16e_PRIVILEGE_CTG
#define MC_CMD_0x16e_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24508,303 +26540,568 @@
#define UUID_NODE_LBN 80
#define UUID_NODE_WIDTH 48
-/* MC_CMD_DEVEL_DUMP_VI_ENTRY structuredef */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_LEN 28
-/* Type of entry */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_TYPE_OFST 0
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_TYPE_LEN 4
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QDMA_SW_C2H 0x0 /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QDMA_SW_H2C 0x1 /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QDMA_HW_C2H 0x2 /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QDMA_HW_H2C 0x3 /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QDMA_CR_C2H 0x4 /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QDMA_CR_H2C 0x5 /* enum */
-/* enum: First QDMA writeback/completion queue. Used for ef100, C2H VDPA and
- * plain virtio.
- */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QDMA_WRB 0x6
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QDMA_PFTCH 0x7 /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_DMAC_H2C_QTBL 0x100 /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_DMAC_C2H_QTBL 0x101 /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_DMAC_H2C_VIO 0x10a /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_TYPE_LBN 0
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_TYPE_WIDTH 32
-/* Internal QDMA/dmac queue number for this entry */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QUEUE_NUMBER_OFST 4
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QUEUE_NUMBER_LEN 4
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QUEUE_NUMBER_LBN 32
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QUEUE_NUMBER_WIDTH 32
-/* Size of entry data */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_SIZE_OFST 8
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_SIZE_LEN 4
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_SIZE_LBN 64
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_SIZE_WIDTH 32
-/* Offset of entry data from start of MCDI message response payload */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_OFFSET_OFST 12
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_OFFSET_LEN 4
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_OFFSET_LBN 96
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_OFFSET_WIDTH 32
-/* Absolute VI of the entry, or 0xffffffff if not available/applicable */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_ABS_VI_OFST 16
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_ABS_VI_LEN 4
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_NO_ABS_VI 0xffffffff /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_ABS_VI_LBN 128
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_ABS_VI_WIDTH 32
-/* Reserved */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_RESERVED_OFST 20
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_RESERVED_LEN 8
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_RESERVED_LO_OFST 20
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_RESERVED_HI_OFST 24
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_RESERVED_LBN 160
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_RESERVED_WIDTH 64
-
-
-/***********************************/
-/* MC_CMD_DEVEL_DUMP_VI
- * Dump various parts of the hardware's state for a VI.
- */
-#define MC_CMD_DEVEL_DUMP_VI 0x1b5
-#undef MC_CMD_0x1b5_PRIVILEGE_CTG
-
-#define MC_CMD_0x1b5_PRIVILEGE_CTG SRIOV_CTG_GENERAL
-
-/* MC_CMD_DEVEL_DUMP_VI_IN msgrequest */
-#define MC_CMD_DEVEL_DUMP_VI_IN_LEN 4
-/* Absolute queue id of queue to dump state for */
-#define MC_CMD_DEVEL_DUMP_VI_IN_QID_OFST 0
-#define MC_CMD_DEVEL_DUMP_VI_IN_QID_LEN 4
-
-/* MC_CMD_DEVEL_DUMP_VI_IN_V2 msgrequest */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_LEN 20
-/* Which queue to dump. The meaning of this field dependes on ADDRESS_MODE. */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_ID_OFST 0
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_ID_LEN 4
-/* Method of referring to the queue to dump */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_ADDRESS_MODE_OFST 4
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_ADDRESS_MODE_LEN 4
-/* enum: First field refers to queue number as understood by QDMA/DMAC hardware
- */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_QUEUE_NUMBER 0x0
-/* enum: First field refers to absolute VI number */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_ABS_VI 0x1
-/* enum: First field refers to function-relative VI number on the command's
- * function
- */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_REL_VI 0x2
-/* enum: First field refers to function-relative VI number on a specified
- * function
- */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_REL_VI_PROXY 0x3
-/* Type of VI. Not needed if ADDRESS_MODE is QUEUE_NUMBER. */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_VI_TYPE_OFST 8
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_VI_TYPE_LEN 4
-/* enum: Return only entries used for ef100 queues (a single hardware queue) */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_EF100 0x0
-/* enum: Return entries used for virtio (Potentially two hardware queues,
- * depending on hardware implementation)
+/* PLUGIN_EXTENSION structuredef: Used within MC_CMD_PLUGIN_GET_ALL to describe
+ * an individual extension.
+ */
+#define PLUGIN_EXTENSION_LEN 20
+#define PLUGIN_EXTENSION_UUID_OFST 0
+#define PLUGIN_EXTENSION_UUID_LEN 16
+#define PLUGIN_EXTENSION_UUID_LBN 0
+#define PLUGIN_EXTENSION_UUID_WIDTH 128
+#define PLUGIN_EXTENSION_ADMIN_GROUP_OFST 16
+#define PLUGIN_EXTENSION_ADMIN_GROUP_LEN 1
+#define PLUGIN_EXTENSION_ADMIN_GROUP_LBN 128
+#define PLUGIN_EXTENSION_ADMIN_GROUP_WIDTH 8
+#define PLUGIN_EXTENSION_FLAG_ENABLED_LBN 136
+#define PLUGIN_EXTENSION_FLAG_ENABLED_WIDTH 1
+#define PLUGIN_EXTENSION_RESERVED_LBN 137
+#define PLUGIN_EXTENSION_RESERVED_WIDTH 23
+
+/* DESC_ADDR_REGION structuredef: Describes a contiguous region of DESC_ADDR
+ * space that maps to a contiguous region of TRGT_ADDR space. Addresses
+ * DESC_ADDR in the range [DESC_ADDR_BASE:DESC_ADDR_BASE + 1 <<
+ * WINDOW_SIZE_LOG2) map to TRGT_ADDR = DESC_ADDR - DESC_ADDR_BASE +
+ * TRGT_ADDR_BASE.
+ */
+#define DESC_ADDR_REGION_LEN 32
+/* The start of the region in DESC_ADDR space. */
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_OFST 0
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_LEN 8
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_LO_OFST 0
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_LO_LEN 4
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_LO_LBN 0
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_LO_WIDTH 32
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_HI_OFST 4
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_HI_LEN 4
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_HI_LBN 32
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_HI_WIDTH 32
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_LBN 0
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_WIDTH 64
+/* The start of the region in TRGT_ADDR space. Drivers can set this via
+ * MC_CMD_SET_DESC_ADDR_REGIONS.
+ */
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_OFST 8
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_LEN 8
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_LO_OFST 8
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_LO_LEN 4
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_LO_LBN 64
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_LO_WIDTH 32
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_HI_OFST 12
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_HI_LEN 4
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_HI_LBN 96
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_HI_WIDTH 32
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_LBN 64
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_WIDTH 64
+/* The size of the region. */
+#define DESC_ADDR_REGION_WINDOW_SIZE_LOG2_OFST 16
+#define DESC_ADDR_REGION_WINDOW_SIZE_LOG2_LEN 4
+#define DESC_ADDR_REGION_WINDOW_SIZE_LOG2_LBN 128
+#define DESC_ADDR_REGION_WINDOW_SIZE_LOG2_WIDTH 32
+/* The alignment restriction on TRGT_ADDR. TRGT_ADDR values set by the driver
+ * must be a multiple of 1 << TRGT_ADDR_ALIGN_LOG2.
+ */
+#define DESC_ADDR_REGION_TRGT_ADDR_ALIGN_LOG2_OFST 20
+#define DESC_ADDR_REGION_TRGT_ADDR_ALIGN_LOG2_LEN 4
+#define DESC_ADDR_REGION_TRGT_ADDR_ALIGN_LOG2_LBN 160
+#define DESC_ADDR_REGION_TRGT_ADDR_ALIGN_LOG2_WIDTH 32
+#define DESC_ADDR_REGION_RSVD_OFST 24
+#define DESC_ADDR_REGION_RSVD_LEN 8
+#define DESC_ADDR_REGION_RSVD_LO_OFST 24
+#define DESC_ADDR_REGION_RSVD_LO_LEN 4
+#define DESC_ADDR_REGION_RSVD_LO_LBN 192
+#define DESC_ADDR_REGION_RSVD_LO_WIDTH 32
+#define DESC_ADDR_REGION_RSVD_HI_OFST 28
+#define DESC_ADDR_REGION_RSVD_HI_LEN 4
+#define DESC_ADDR_REGION_RSVD_HI_LBN 224
+#define DESC_ADDR_REGION_RSVD_HI_WIDTH 32
+#define DESC_ADDR_REGION_RSVD_LBN 192
+#define DESC_ADDR_REGION_RSVD_WIDTH 64
+
+
+/***********************************/
+/* MC_CMD_GET_DESC_ADDR_INFO
+ * Returns a description of the mapping from DESC_ADDR to TRGT_ADDR for the calling function's address space.
+ */
+#define MC_CMD_GET_DESC_ADDR_INFO 0x1b7
+#define MC_CMD_GET_DESC_ADDR_INFO_MSGSET 0x1b7
+#undef MC_CMD_0x1b7_PRIVILEGE_CTG
+
+#define MC_CMD_0x1b7_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_GET_DESC_ADDR_INFO_IN msgrequest */
+#define MC_CMD_GET_DESC_ADDR_INFO_IN_LEN 0
+
+/* MC_CMD_GET_DESC_ADDR_INFO_OUT msgresponse */
+#define MC_CMD_GET_DESC_ADDR_INFO_OUT_LEN 4
+/* The type of mapping; see SF-nnnnnn-xx (EF100 driver writer's guide, once
+ * written) for details of each type.
+ */
+#define MC_CMD_GET_DESC_ADDR_INFO_OUT_MAPPING_TYPE_OFST 0
+#define MC_CMD_GET_DESC_ADDR_INFO_OUT_MAPPING_TYPE_LEN 4
+/* enum: TRGT_ADDR = DESC_ADDR */
+#define MC_CMD_GET_DESC_ADDR_INFO_OUT_MAPPING_FLAT 0x0
+/* enum: DESC_ADDR has one or more regions that map into TRGT_ADDR. The base
+ * TRGT_ADDR for each region is programmable via MCDI.
+ */
+#define MC_CMD_GET_DESC_ADDR_INFO_OUT_MAPPING_REGIONED 0x1
+
+
+/***********************************/
+/* MC_CMD_GET_DESC_ADDR_REGIONS
+ * Returns a list of the DESC_ADDR regions for the calling function's address space. Only valid if that function's address space has the REGIONED mapping from DESC_ADDR to TRGT_ADDR.
+ */
+#define MC_CMD_GET_DESC_ADDR_REGIONS 0x1b8
+#define MC_CMD_GET_DESC_ADDR_REGIONS_MSGSET 0x1b8
+#undef MC_CMD_0x1b8_PRIVILEGE_CTG
+
+#define MC_CMD_0x1b8_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_GET_DESC_ADDR_REGIONS_IN msgrequest */
+#define MC_CMD_GET_DESC_ADDR_REGIONS_IN_LEN 0
+
+/* MC_CMD_GET_DESC_ADDR_REGIONS_OUT msgresponse */
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_LENMIN 32
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_LENMAX 224
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_LENMAX_MCDI2 992
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_LEN(num) (0+32*(num))
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_REGIONS_NUM(len) (((len)-0)/32)
+/* An array of DESC_ADDR_REGION strutures. The number of entries in the array
+ * indicates the number of available regions.
+ */
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_REGIONS_OFST 0
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_REGIONS_LEN 32
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_REGIONS_MINNUM 1
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_REGIONS_MAXNUM 7
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_REGIONS_MAXNUM_MCDI2 31
+
+
+/***********************************/
+/* MC_CMD_SET_DESC_ADDR_REGIONS
+ * Set the base TRGT_ADDR for a set of DESC_ADDR regions for the calling function's address space. Only valid if that function's address space had the REGIONED mapping from DESC_ADDR to TRGT_ADDR.
+ */
+#define MC_CMD_SET_DESC_ADDR_REGIONS 0x1b9
+#define MC_CMD_SET_DESC_ADDR_REGIONS_MSGSET 0x1b9
+#undef MC_CMD_0x1b9_PRIVILEGE_CTG
+
+#define MC_CMD_0x1b9_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_SET_DESC_ADDR_REGIONS_IN msgrequest */
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_LENMIN 16
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_LENMAX 248
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_LENMAX_MCDI2 1016
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_LEN(num) (8+8*(num))
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_NUM(len) (((len)-8)/8)
+/* A bitmask indicating which regions should have their base TRGT_ADDR updated.
+ * To update the base TRGR_ADDR for a DESC_ADDR region, the corresponding bit
+ * should be set to 1.
+ */
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_SET_REGION_MASK_OFST 0
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_SET_REGION_MASK_LEN 4
+/* Reserved field; must be set to zero. */
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_RSVD_OFST 4
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_RSVD_LEN 4
+/* An array of values used to updated the base TRGT_ADDR for DESC_ADDR regions.
+ * Array indices corresponding to region numbers (i.e. the array is sparse, and
+ * included entries for regions even if the corresponding SET_REGION_MASK bit
+ * is zero).
*/
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_VIRTIO 0x1
-/* Only if ADDRESS_MODE is REL_VI_PROXY. Interface of function the queue is on.
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_OFST 8
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_LEN 8
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_LO_OFST 8
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_LO_LEN 4
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_LO_LBN 64
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_LO_WIDTH 32
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_HI_OFST 12
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_HI_LEN 4
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_HI_LBN 96
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_HI_WIDTH 32
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_MINNUM 1
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_MAXNUM 30
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_MAXNUM_MCDI2 126
+
+/* MC_CMD_SET_DESC_ADDR_REGIONS_OUT msgresponse */
+#define MC_CMD_SET_DESC_ADDR_REGIONS_OUT_LEN 0
+
+
+/***********************************/
+/* MC_CMD_CLIENT_CMD
+ * Execute an arbitrary MCDI command on behalf of a different client. The
+ * consequences of the command (e.g. ownership of any resources created) apply
+ * to the indicated client rather than the function client which actually sent
+ * this command. All inherent permission checks are also performed on the
+ * indicated client. The given client must be a descendant of the requestor.
+ * The command to be proxied follows immediately afterward in the host buffer
+ * (or on the UART). Chaining multiple MC_CMD_CLIENT_CMD is unnecessary and not
+ * supported. New dynamic clients may be created with MC_CMD_CLIENT_ALLOC.
*/
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_PCIE_INTERFACE_OFST 12
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_PCIE_INTERFACE_LEN 4
-/* Enum values, see field(s): */
-/* DEVEL_PCIE_INTERFACE */
-/* Only if ADDRESS_MODE is REL_VI_PROXY. PF number of the function the queue is
- * on.
- */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_PF_OFST 16
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_PF_LEN 2
-/* Only if ADDRESS_MODE is REL_VI_PROXY. VF number of the function the queue is
- * on.
- */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_VF_OFST 18
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_VF_LEN 2
-/* enum: The function is on a PF, not a VF. */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_VF_NULL 0xffff
-
-/* MC_CMD_DEVEL_DUMP_VI_OUT msgresponse */
-#define MC_CMD_DEVEL_DUMP_VI_OUT_LENMIN 4
-#define MC_CMD_DEVEL_DUMP_VI_OUT_LENMAX 252
-#define MC_CMD_DEVEL_DUMP_VI_OUT_LENMAX_MCDI2 1012
-#define MC_CMD_DEVEL_DUMP_VI_OUT_LEN(num) (0+1*(num))
-#define MC_CMD_DEVEL_DUMP_VI_OUT_DATA_NUM(len) (((len)-0)/1)
-/* Number of dump entries returned */
-#define MC_CMD_DEVEL_DUMP_VI_OUT_NUM_ENTRIES_OFST 0
-#define MC_CMD_DEVEL_DUMP_VI_OUT_NUM_ENTRIES_LEN 4
-#define MC_CMD_DEVEL_DUMP_VI_OUT_DATA_OFST 0
-#define MC_CMD_DEVEL_DUMP_VI_OUT_DATA_LBN 0
-#define MC_CMD_DEVEL_DUMP_VI_OUT_DATA_WIDTH 8
-#define MC_CMD_DEVEL_DUMP_VI_OUT_DATA_MINNUM 0
-#define MC_CMD_DEVEL_DUMP_VI_OUT_DATA_MAXNUM 252
-#define MC_CMD_DEVEL_DUMP_VI_OUT_DATA_MAXNUM_MCDI2 1020
-/* Array of MC_CMD_DEVEL_DUMP_VI_ENTRY structures of length NUM_ENTRIES */
-#define MC_CMD_DEVEL_DUMP_VI_OUT_ENTRIES_OFST 4
-#define MC_CMD_DEVEL_DUMP_VI_OUT_ENTRIES_LEN 28
-#define MC_CMD_DEVEL_DUMP_VI_OUT_ENTRIES_MINNUM 0
-#define MC_CMD_DEVEL_DUMP_VI_OUT_ENTRIES_MAXNUM 8
-#define MC_CMD_DEVEL_DUMP_VI_OUT_ENTRIES_MAXNUM_MCDI2 36
-
-/* MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY structuredef */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_LEN 16
-/* What register this is */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_REG_OFST 0
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_REG_LEN 4
-/* enum: Catchall for registers that aren't in this enum. Nothing should be in
- * this long-term
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_UNKNOWN 0xffffffff
-/* enum: S2IC Converter Debug Packet Counter register. Informs number of
- * packets passed through Converter.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_H2C_S2IC_DBG_PKT_CNT 0x0
-/* enum: IC2S Converter Debug Packet Counter register. Informs number of
- * packets passed through Converter.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_C2H_IC2S_DBG_PKT_CNT 0x1
-/* enum: Event Controller Tx path Debug register. Count of Moderator Tx events,
- * not incl D2C, VirtIO, Dproxy.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TX_DEBUG 0x2
-/* enum: Event Controller Rx path Debug register. Count of Moderator Rx events.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_RX_DEBUG 0x3
-/* enum: Event Controller Debug register. Count of Total EVC events. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TOTAL_DEBUG 0x4
-/* enum: Same info as EVC_RX_DEBUG; collected at different location in design
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_RX_EF100_DEBUG 0x5
-/* enum: Same info as EVC_TX_DEBUG; collected at different location in design
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TX_EF100_DEBUG 0x6
-/* enum: Event Controller Debug register. Count of Tx VirtIO events. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TX_VIRTIO_DEBUG 0x7
-/* enum: Event Controller Debug register. Count of Tx Descriptor Proxy events.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TX_DPRXY_DEBUG 0x8
-/* enum: Event Controller Debug register. Count of Tx VirtQ Descriptor Proxy
- * events.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TX_VIRTQ_DPRXY_DEBUG 0x9
-/* enum: Event Controller Debug register. Count of Tx Descriptor-to-Completion
- * events.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TX_D2C_DEBUG 0xa
-/* enum: Event Controller Debug register. Count of Tx VirtIO Descriptor-to-
- * Completion events.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TX_VIRTQ_D2C_DEBUG 0xb
-/* enum: Event Controller Debug register. Count of Tx Timestamp events. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TX_TSTAMP_DEBUG 0xc
-/* enum: Event Controller Debug register. Count of Rx EvQ Timeout events. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_RX_EVQ_TIMEOUT_DEBUG 0xd
-/* enum: Event Controller Debug register. Count of MC events. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_MC_DEBUG 0xe
-/* enum: Event Controller Debug register. Count of EQDMA VirtIO Control events.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_EQDMA_VIO_CTL_DEBUG 0xf
-/* enum: Counter of QDMA Dropped C2H packets. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_DMAC_C2H_DROP_CTR_REG 0x10
-/* enum: Number of packets received by c host fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_C_H_PACKETS_IN_TBL 0x11
-/* enum: Number of packets sent by c host fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_C_H_PACKETS_OUT_TBL 0x12
-/* enum: Number of packets received by c plugin fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_C_P_PACKETS_IN_TBL 0x13
-/* enum: Number of packets received by b host fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_B_H_PACKETS_IN_TBL 0x14
-/* enum: Number of packets received by b net fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_B_N_PACKETS_IN_TBL 0x15
-/* enum: Number of packets received by b host fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_B_PH_PACKETS_IN_TBL 0x16
-/* enum: Number of packets received by b net fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_B_PN_PACKETS_IN_TBL 0x17
-/* enum: Number of packets sent by b net fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_B_PACKETS_OUT_TBL 0x18
-/* enum: Number of packets received by c net fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_C_N_PACKETS_IN_TBL 0x19
-/* enum: Number of packets sent by c net fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_C_N_PACKETS_OUT_TBL 0x1a
-/* enum: Number of packets received by ha fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_HA_PACKETS_IN_TBL 0x1b
-/* enum: Number of packets received by ha host shadow fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_HA_PH_PACKETS_IN_TBL 0x1c
-/* enum: Number of packets received by ha fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_HA_PACKETS_OUT_TBL 0x1d
-/* enum: Number of packets received by d hub fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_D_PACKETS_IN_TBL 0x1e
-/* enum: Number of packets received by d hub plugin fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_D_P_PACKETS_IN_TBL 0x1f
-/* enum: Number of packets received by d hub plugin fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_D_O_PACKETS_IN_TBL 0x20
-/* enum: Number of packets sent to dmac. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_D_PACKETS_OUT_TBL 0x21
-/* enum: Number of packets received by na fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_NA_PACKETS_IN_TBL 0x22
-/* enum: Number of packets dropped by na fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_NA_PACKETS_DROPPED_TBL 0x23
-/* enum: Number of packets sent by na fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_NA_PACKETS_OUT_TBL 0x24
-/* enum: Number of packets received by rp hub fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_RP_PACKETS_IN_TBL 0x25
-/* enum: Number of packets removed from fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_RP_PACKETS_OUT_TBL 0x26
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_REG_LBN 0
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_REG_WIDTH 32
-/* If REG is a table, the table row. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_ROW_OFST 4
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_ROW_LEN 4
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_ROW_LBN 32
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_ROW_WIDTH 32
-/* Address of the register (as seen by the MC) */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_ADDRESS_OFST 8
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_ADDRESS_LEN 4
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_ADDRESS_LBN 64
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_ADDRESS_WIDTH 32
-/* Value of the register */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_VALUE_OFST 12
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_VALUE_LEN 4
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_VALUE_LBN 96
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_VALUE_WIDTH 32
-
-
-/***********************************/
-/* MC_CMD_DEVEL_DUMP_RHEAD_REGS
- * Dump an assortment of hopefully useful riverhead debug registers
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS 0x1b6
-#undef MC_CMD_0x1b6_PRIVILEGE_CTG
-
-#define MC_CMD_0x1b6_PRIVILEGE_CTG SRIOV_CTG_GENERAL
-
-/* MC_CMD_DEVEL_DUMP_RHEAD_REGS_IN msgrequest */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_IN_LEN 4
-/* Which page of registers to retrieve. Page 0 always exists, later pages may
- * also exist if there are too many registers to fit in a single mcdi response.
- * NUM_PAGES in the response will tell you how many there are.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_IN_PAGE_OFST 0
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_IN_PAGE_LEN 4
-
-/* MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT msgresponse */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_LENMIN 8
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_LENMAX 248
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_LENMAX_MCDI2 1016
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_LEN(num) (8+16*(num))
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_REGS_NUM(len) (((len)-8)/16)
-/* Number of registers dumped in this response */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_NUM_REGS_OFST 0
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_NUM_REGS_LEN 4
-/* How many pages of registers are available to extract */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_NUM_PAGES_OFST 4
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_NUM_PAGES_LEN 4
-/* Array of MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY structs, one for each register
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_REGS_OFST 8
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_REGS_LEN 16
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_REGS_MINNUM 0
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_REGS_MAXNUM 15
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_REGS_MAXNUM_MCDI2 63
+#define MC_CMD_CLIENT_CMD 0x1ba
+#define MC_CMD_CLIENT_CMD_MSGSET 0x1ba
+#undef MC_CMD_0x1ba_PRIVILEGE_CTG
+
+#define MC_CMD_0x1ba_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_CLIENT_CMD_IN msgrequest */
+#define MC_CMD_CLIENT_CMD_IN_LEN 4
+/* The client as which to execute the following command. */
+#define MC_CMD_CLIENT_CMD_IN_CLIENT_ID_OFST 0
+#define MC_CMD_CLIENT_CMD_IN_CLIENT_ID_LEN 4
+
+/* MC_CMD_CLIENT_CMD_OUT msgresponse */
+#define MC_CMD_CLIENT_CMD_OUT_LEN 0
+
+
+/***********************************/
+/* MC_CMD_CLIENT_ALLOC
+ * Create a new client object. Clients are a system for delineating NIC
+ * resource ownership, such that groups of resources may be torn down as a
+ * unit. See also MC_CMD_CLIENT_CMD. See XN-200265-TC for background, concepts
+ * and a glossary. Clients created by this command are known as "dynamic
+ * clients". The newly-created client is a child of the client which sent this
+ * command. The caller must have the GRP_ALLOC_CLIENT privilege. The new client
+ * initially has no permission to do anything; see
+ * MC_CMD_DEVEL_CLIENT_PRIVILEGE_MODIFY.
+ */
+#define MC_CMD_CLIENT_ALLOC 0x1bb
+#define MC_CMD_CLIENT_ALLOC_MSGSET 0x1bb
+#undef MC_CMD_0x1bb_PRIVILEGE_CTG
+
+#define MC_CMD_0x1bb_PRIVILEGE_CTG SRIOV_CTG_ALLOC_CLIENT
+
+/* MC_CMD_CLIENT_ALLOC_IN msgrequest */
+#define MC_CMD_CLIENT_ALLOC_IN_LEN 0
+
+/* MC_CMD_CLIENT_ALLOC_OUT msgresponse */
+#define MC_CMD_CLIENT_ALLOC_OUT_LEN 4
+/* The ID of the new client object which has been created. */
+#define MC_CMD_CLIENT_ALLOC_OUT_CLIENT_ID_OFST 0
+#define MC_CMD_CLIENT_ALLOC_OUT_CLIENT_ID_LEN 4
+
+
+/***********************************/
+/* MC_CMD_CLIENT_FREE
+ * Destroy and release an existing client object. All resources owned by that
+ * client (including its child clients, and thus all resources owned by the
+ * entire family tree) are freed.
+ */
+#define MC_CMD_CLIENT_FREE 0x1bc
+#define MC_CMD_CLIENT_FREE_MSGSET 0x1bc
+#undef MC_CMD_0x1bc_PRIVILEGE_CTG
+
+#define MC_CMD_0x1bc_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_CLIENT_FREE_IN msgrequest */
+#define MC_CMD_CLIENT_FREE_IN_LEN 4
+/* The ID of the client to be freed. This client must be a descendant of the
+ * requestor. A client cannot free itself.
+ */
+#define MC_CMD_CLIENT_FREE_IN_CLIENT_ID_OFST 0
+#define MC_CMD_CLIENT_FREE_IN_CLIENT_ID_LEN 4
+
+/* MC_CMD_CLIENT_FREE_OUT msgresponse */
+#define MC_CMD_CLIENT_FREE_OUT_LEN 0
+
+
+/***********************************/
+/* MC_CMD_SET_VI_USER
+ * Assign partial rights over this VI to another client. VIs have an 'owner'
+ * and a 'user'. The owner is the client which allocated the VI
+ * (MC_CMD_ALLOC_VIS) and cannot be changed. The user is the client which has
+ * permission to create queues and other resources on that VI. Initially
+ * user==owner, but the user can be changed by this command; the resources thus
+ * created are then owned by the user-client. Only the VI owner can call this
+ * command, and the request will fail if there are any outstanding child
+ * resources (e.g. queues) currently allocated from this VI.
+ */
+#define MC_CMD_SET_VI_USER 0x1be
+#define MC_CMD_SET_VI_USER_MSGSET 0x1be
+#undef MC_CMD_0x1be_PRIVILEGE_CTG
+
+#define MC_CMD_0x1be_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_SET_VI_USER_IN msgrequest */
+#define MC_CMD_SET_VI_USER_IN_LEN 8
+/* Function-relative VI number to modify. */
+#define MC_CMD_SET_VI_USER_IN_INSTANCE_OFST 0
+#define MC_CMD_SET_VI_USER_IN_INSTANCE_LEN 4
+/* Client ID to become the new user. This must be a descendant of the owning
+ * client, the owning client itself, or the special value MC_CMD_CLIENT_ID_SELF
+ * which is synonymous with the owning client.
+ */
+#define MC_CMD_SET_VI_USER_IN_CLIENT_ID_OFST 4
+#define MC_CMD_SET_VI_USER_IN_CLIENT_ID_LEN 4
+
+/* MC_CMD_SET_VI_USER_OUT msgresponse */
+#define MC_CMD_SET_VI_USER_OUT_LEN 0
+
+
+/***********************************/
+/* MC_CMD_GET_CLIENT_MAC_ADDRESSES
+ * A device reports a set of MAC addresses for each client to use, known as the
+ * "permanent MAC addresses". Those MAC addresses are provided by the client's
+ * administrator, e.g. via MC_CMD_SET_CLIENT_MAC_ADDRESSES, and are intended as
+ * a hint to that client which MAC address its administrator would like to use
+ * to identity itself. This API exists solely to allow communication of MAC
+ * address from administrator to adminstree, and has no inherent interaction
+ * with switching within the device. There is no guarantee that a client will
+ * be able to send traffic with a source MAC address taken from the list of MAC
+ * address reported, nor is there a guarantee that a client will be able to
+ * resource traffic with a destination MAC taken from the list of MAC
+ * addresses. Likewise, there is no guarantee that a client will not be able to
+ * use a MAC address not present in the list. Restrictions on switching are
+ * controlled either through the EVB API if operating in EVB mode, or via MAE
+ * rules if host software is directly managing the MAE. In order to allow
+ * tenants to use this API whilst a provider is using the EVB API, the MAC
+ * addresses reported by MC_CMD_GET_CLIENT_MAC_ADDRESSES will be augmented with
+ * any MAC addresses associated with the vPort assigned to the caller. In order
+ * to allow tenants to use the EVB API whilst a provider is using this API, if
+ * a client queries the MAC addresses for a vPort using the host_evb_port_id
+ * EVB_PORT_ASSIGNED, that list of MAC addresses will be augmented with the MAC
+ * addresses assigned to the calling client. This query can either be explicit
+ * (i.e. MC_CMD_VPORT_GET_MAC_ADDRESSES) or implicit (e.g. creation of a
+ * vAdaptor with a NULL/automatic MAC address). Changing the MAC address on a
+ * vAdaptor only affects VNIC steering filters; it has no effect on the MAC
+ * addresses assigned to the vAdaptor's owner. VirtIO clients behave as EVB
+ * clients. On VirtIO device reset, a vAdaptor is created with an automatic MAC
+ * address. Querying the VirtIO device's MAC address queries the underlying
+ * vAdaptor's MAC address. Setting the VirtIO device's MAC address sets the
+ * underlying vAdaptor's MAC addresses.
+ */
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES 0x1c4
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_MSGSET 0x1c4
+#undef MC_CMD_0x1c4_PRIVILEGE_CTG
+
+#define MC_CMD_0x1c4_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_GET_CLIENT_MAC_ADDRESSES_IN msgrequest */
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_IN_LEN 4
+/* A handle for the client for whom MAC address should be obtained. Use
+ * CLIENT_HANDLE_SELF to obtain the MAC addresses assigned to the calling
+ * client.
+ */
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_IN_CLIENT_HANDLE_OFST 0
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_IN_CLIENT_HANDLE_LEN 4
+
+/* MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT msgresponse */
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_LENMIN 0
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_LENMAX 252
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_LENMAX_MCDI2 1020
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_LEN(num) (0+6*(num))
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_MAC_ADDRS_NUM(len) (((len)-0)/6)
+/* An array of MAC addresses assigned to the client. */
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_MAC_ADDRS_OFST 0
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_MAC_ADDRS_LEN 6
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_MAC_ADDRS_MINNUM 0
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_MAC_ADDRS_MAXNUM 42
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_MAC_ADDRS_MAXNUM_MCDI2 170
+
+
+/***********************************/
+/* MC_CMD_SET_CLIENT_MAC_ADDRESSES
+ * Set the permanent MAC addresses for a client. The caller must by an
+ * adminstrator of the target client. See MC_CMD_GET_CLIENT_MAC_ADDRESSES for
+ * additional detail.
+ */
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES 0x1c5
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_MSGSET 0x1c5
+#undef MC_CMD_0x1c5_PRIVILEGE_CTG
+
+#define MC_CMD_0x1c5_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN msgrequest */
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_LENMIN 4
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_LENMAX 250
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_LENMAX_MCDI2 1018
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_LEN(num) (4+6*(num))
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_MAC_ADDRS_NUM(len) (((len)-4)/6)
+/* A handle for the client for whom MAC addresses should be set */
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_CLIENT_HANDLE_OFST 0
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_CLIENT_HANDLE_LEN 4
+/* An array of MAC addresses to assign to the client. */
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_MAC_ADDRS_OFST 4
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_MAC_ADDRS_LEN 6
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_MAC_ADDRS_MINNUM 0
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_MAC_ADDRS_MAXNUM 41
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_MAC_ADDRS_MAXNUM_MCDI2 169
+
+/* MC_CMD_SET_CLIENT_MAC_ADDRESSES_OUT msgresponse */
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_OUT_LEN 0
+
+
+/***********************************/
+/* MC_CMD_GET_BOARD_ATTR
+ * Retrieve physical build-level board attributes as configured at
+ * manufacturing stage. Fields originate from EEPROM and per-platform constants
+ * in firmware. Fields are used in development to identify/ differentiate
+ * boards based on build levels/parameters, and also in manufacturing to cross
+ * check "what was programmed in manufacturing" is same as "what firmware
+ * thinks has been programmed" as there are two layers to translation within
+ * firmware before the attributes reach this MCDI handler. Some parameters are
+ * retrieved as part of other commands and therefore not replicated here. See
+ * GET_VERSION_OUT.
+ */
+#define MC_CMD_GET_BOARD_ATTR 0x1c6
+#define MC_CMD_GET_BOARD_ATTR_MSGSET 0x1c6
+#undef MC_CMD_0x1c6_PRIVILEGE_CTG
+
+#define MC_CMD_0x1c6_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_GET_BOARD_ATTR_IN msgrequest */
+#define MC_CMD_GET_BOARD_ATTR_IN_LEN 0
+
+/* MC_CMD_GET_BOARD_ATTR_OUT msgresponse */
+#define MC_CMD_GET_BOARD_ATTR_OUT_LEN 16
+/* Defines board capabilities and validity of attributes returned in this
+ * response-message.
+ */
+#define MC_CMD_GET_BOARD_ATTR_OUT_FLAGS_OFST 0
+#define MC_CMD_GET_BOARD_ATTR_OUT_FLAGS_LEN 4
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_FAN_OFST 0
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_FAN_LBN 0
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_FAN_WIDTH 1
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_SOC_OFST 0
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_SOC_LBN 1
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_SOC_WIDTH 1
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_AUX_POWER_OFST 0
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_AUX_POWER_LBN 2
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_AUX_POWER_WIDTH 1
+#define MC_CMD_GET_BOARD_ATTR_OUT_ATTRIBUTES_OFST 4
+#define MC_CMD_GET_BOARD_ATTR_OUT_ATTRIBUTES_LEN 4
+#define MC_CMD_GET_BOARD_ATTR_OUT_SOC_EE_OFST 4
+#define MC_CMD_GET_BOARD_ATTR_OUT_SOC_EE_LBN 0
+#define MC_CMD_GET_BOARD_ATTR_OUT_SOC_EE_WIDTH 1
+#define MC_CMD_GET_BOARD_ATTR_OUT_SUC_EE_OFST 4
+#define MC_CMD_GET_BOARD_ATTR_OUT_SUC_EE_LBN 1
+#define MC_CMD_GET_BOARD_ATTR_OUT_SUC_EE_WIDTH 1
+#define MC_CMD_GET_BOARD_ATTR_OUT_FPGA_VOLTAGES_SUPPORTED_OFST 4
+#define MC_CMD_GET_BOARD_ATTR_OUT_FPGA_VOLTAGES_SUPPORTED_LBN 16
+#define MC_CMD_GET_BOARD_ATTR_OUT_FPGA_VOLTAGES_SUPPORTED_WIDTH 8
+/* enum: The FPGA voltage on the adapter can be set to low */
+#define MC_CMD_FPGA_VOLTAGE_LOW 0x0
+/* enum: The FPGA voltage on the adapter can be set to regular */
+#define MC_CMD_FPGA_VOLTAGE_REG 0x1
+/* enum: The FPGA voltage on the adapter can be set to high */
+#define MC_CMD_FPGA_VOLTAGE_HIGH 0x2
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_COUNT_OFST 4
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_COUNT_LBN 24
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_COUNT_WIDTH 8
+/* An array of cage types on the board */
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_OFST 8
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_LEN 1
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_NUM 8
+/* enum: The cages are not known */
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_UNKNOWN 0x0
+/* enum: The cages are SFP/SFP+ */
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_SFP 0x1
+/* enum: The cages are QSFP/QSFP+ */
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_QSFP 0x2
+
+
+/***********************************/
+/* MC_CMD_GET_SOC_STATE
+ * Retrieve current state of the System-on-Chip. This command is valid when
+ * MC_CMD_GET_BOARD_ATTR:HAS_SOC is set.
+ */
+#define MC_CMD_GET_SOC_STATE 0x1c7
+#define MC_CMD_GET_SOC_STATE_MSGSET 0x1c7
+#undef MC_CMD_0x1c7_PRIVILEGE_CTG
+
+#define MC_CMD_0x1c7_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_GET_SOC_STATE_IN msgrequest */
+#define MC_CMD_GET_SOC_STATE_IN_LEN 0
+
+/* MC_CMD_GET_SOC_STATE_OUT msgresponse */
+#define MC_CMD_GET_SOC_STATE_OUT_LEN 12
+/* Status flags for the SoC */
+#define MC_CMD_GET_SOC_STATE_OUT_FLAGS_OFST 0
+#define MC_CMD_GET_SOC_STATE_OUT_FLAGS_LEN 4
+#define MC_CMD_GET_SOC_STATE_OUT_SHOULD_THROTTLE_OFST 0
+#define MC_CMD_GET_SOC_STATE_OUT_SHOULD_THROTTLE_LBN 0
+#define MC_CMD_GET_SOC_STATE_OUT_SHOULD_THROTTLE_WIDTH 1
+#define MC_CMD_GET_SOC_STATE_OUT_OS_RECOVERY_REQUIRED_OFST 0
+#define MC_CMD_GET_SOC_STATE_OUT_OS_RECOVERY_REQUIRED_LBN 1
+#define MC_CMD_GET_SOC_STATE_OUT_OS_RECOVERY_REQUIRED_WIDTH 1
+#define MC_CMD_GET_SOC_STATE_OUT_WDT_FIRED_OFST 0
+#define MC_CMD_GET_SOC_STATE_OUT_WDT_FIRED_LBN 2
+#define MC_CMD_GET_SOC_STATE_OUT_WDT_FIRED_WIDTH 1
+/* Status fields for the SoC */
+#define MC_CMD_GET_SOC_STATE_OUT_ATTRIBUTES_OFST 4
+#define MC_CMD_GET_SOC_STATE_OUT_ATTRIBUTES_LEN 4
+#define MC_CMD_GET_SOC_STATE_OUT_RUN_STATE_OFST 4
+#define MC_CMD_GET_SOC_STATE_OUT_RUN_STATE_LBN 0
+#define MC_CMD_GET_SOC_STATE_OUT_RUN_STATE_WIDTH 8
+/* enum: Power on (set by SUC on power up) */
+#define MC_CMD_GET_SOC_STATE_OUT_SOC_BOOT 0x0
+/* enum: Running bootloader */
+#define MC_CMD_GET_SOC_STATE_OUT_SOC_BOOTLOADER 0x1
+/* enum: Bootloader has started OS. OS is booting */
+#define MC_CMD_GET_SOC_STATE_OUT_SOC_OS_START 0x2
+/* enum: OS is running */
+#define MC_CMD_GET_SOC_STATE_OUT_SOC_OS_RUNNING 0x3
+/* enum: Maintenance OS is running */
+#define MC_CMD_GET_SOC_STATE_OUT_SOC_OS_MAINTENANCE 0x4
+/* Number of SoC resets since power on */
+#define MC_CMD_GET_SOC_STATE_OUT_RESET_COUNT_OFST 8
+#define MC_CMD_GET_SOC_STATE_OUT_RESET_COUNT_LEN 4
+
+
+/***********************************/
+/* MC_CMD_CHECK_SCHEDULER_CREDITS
+ * For debugging purposes. For each source and destination node in the hardware
+ * schedulers, check whether the number of credits is as it should be. This
+ * should only be used when the NIC is idle, because collection is not atomic
+ * and because the expected credit counts are only meaningful when no traffic
+ * is flowing.
+ */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS 0x1c8
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_MSGSET 0x1c8
+#undef MC_CMD_0x1c8_PRIVILEGE_CTG
+
+#define MC_CMD_0x1c8_PRIVILEGE_CTG SRIOV_CTG_ADMIN
+
+/* MC_CMD_CHECK_SCHEDULER_CREDITS_IN msgrequest */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_IN_LEN 8
+/* Flags for the request */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_IN_FLAGS_OFST 0
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_IN_FLAGS_LEN 4
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_IN_REPORT_ALL_OFST 0
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_IN_REPORT_ALL_LBN 0
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_IN_REPORT_ALL_WIDTH 1
+/* If there are too many results to fit into an MCDI response, they're split
+ * into pages. This field specifies which (0-indexed) page to request. A
+ * request with PAGE=0 will snapshot the results, and subsequent requests with
+ * PAGE>0 will return data from the most recent snapshot. The GENERATION field
+ * in the response allows callers to verify that all responses correspond to
+ * the same snapshot.
+ */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_IN_PAGE_OFST 4
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_IN_PAGE_LEN 4
+
+/* MC_CMD_CHECK_SCHEDULER_CREDITS_OUT msgresponse */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_LENMIN 16
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_LENMAX 240
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_LENMAX_MCDI2 1008
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_LEN(num) (16+16*(num))
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_NUM(len) (((len)-16)/16)
+/* The total number of results (across all pages). */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_TOTAL_RESULTS_OFST 0
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_TOTAL_RESULTS_LEN 4
+/* The number of pages that the response is split across. */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_NUM_PAGES_OFST 4
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_NUM_PAGES_LEN 4
+/* The number of results in this response. */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_THIS_PAGE_OFST 8
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_THIS_PAGE_LEN 4
+/* Result generation count. Incremented any time a request is made with PAGE=0.
+ */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_GENERATION_OFST 12
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_GENERATION_LEN 4
+/* The results, as an array of SCHED_CREDIT_CHECK_RESULT structures. */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_OFST 16
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_LEN 16
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_MINNUM 0
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_MAXNUM 14
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_MAXNUM_MCDI2 62
/* FUNCTION_PERSONALITY structuredef: The meanings of the personalities are
* defined in SF-120734-TC with more information in SF-122717-TC.
@@ -24839,6 +27136,7 @@
* Get a list of the virtio features supported by the device.
*/
#define MC_CMD_VIRTIO_GET_FEATURES 0x168
+#define MC_CMD_VIRTIO_GET_FEATURES_MSGSET 0x168
#undef MC_CMD_0x168_PRIVILEGE_CTG
#define MC_CMD_0x168_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24867,7 +27165,13 @@
#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_OFST 0
#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_LEN 8
#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_LO_OFST 0
+#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_LO_LEN 4
+#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_LO_LBN 0
+#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_LO_WIDTH 32
#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_HI_OFST 4
+#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_HI_LEN 4
+#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_HI_LBN 32
+#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_HI_WIDTH 32
/***********************************/
@@ -24877,6 +27181,7 @@
* the driver fails to request a feature which the device requires.
*/
#define MC_CMD_VIRTIO_TEST_FEATURES 0x169
+#define MC_CMD_VIRTIO_TEST_FEATURES_MSGSET 0x169
#undef MC_CMD_0x169_PRIVILEGE_CTG
#define MC_CMD_0x169_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24898,7 +27203,13 @@
#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_OFST 8
#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_LEN 8
#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_LO_OFST 8
+#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_LO_LEN 4
+#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_LO_LBN 64
+#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_LO_WIDTH 32
#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_HI_OFST 12
+#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_HI_LEN 4
+#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_HI_LBN 96
+#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_HI_WIDTH 32
/* MC_CMD_VIRTIO_TEST_FEATURES_OUT msgresponse */
#define MC_CMD_VIRTIO_TEST_FEATURES_OUT_LEN 0
@@ -24912,6 +27223,7 @@
* invalid.
*/
#define MC_CMD_VIRTIO_INIT_QUEUE 0x16a
+#define MC_CMD_VIRTIO_INIT_QUEUE_MSGSET 0x16a
#undef MC_CMD_0x16a_PRIVILEGE_CTG
#define MC_CMD_0x16a_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24956,17 +27268,35 @@
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_OFST 16
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_LEN 8
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_LO_OFST 16
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_LO_LEN 4
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_LO_LBN 128
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_LO_WIDTH 32
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_HI_OFST 20
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_HI_LEN 4
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_HI_LBN 160
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_HI_WIDTH 32
/* Address of the available ring in the virtqueue. */
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_OFST 24
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_LEN 8
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_LO_OFST 24
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_LO_LEN 4
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_LO_LBN 192
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_LO_WIDTH 32
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_HI_OFST 28
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_HI_LEN 4
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_HI_LBN 224
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_HI_WIDTH 32
/* Address of the used ring in the virtqueue. */
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_OFST 32
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_LEN 8
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_LO_OFST 32
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_LO_LEN 4
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_LO_LBN 256
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_LO_WIDTH 32
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_HI_OFST 36
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_HI_LEN 4
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_HI_LBN 288
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_HI_WIDTH 32
/* PASID to use on PCIe transactions involving this queue. Ignored if the
* USE_PASID flag is not set.
*/
@@ -24990,7 +27320,13 @@
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_OFST 48
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_LEN 8
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_LO_OFST 48
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_LO_LEN 4
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_LO_LBN 384
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_LO_WIDTH 32
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_HI_OFST 52
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_HI_LEN 4
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_HI_LBN 416
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_HI_WIDTH 32
/* Enum values, see field(s): */
/* MC_CMD_VIRTIO_GET_FEATURES/MC_CMD_VIRTIO_GET_FEATURES_OUT/FEATURES */
/* The initial producer index for this queue's used ring. If this queue is
@@ -25023,6 +27359,7 @@
* Destroy a virtio virtqueue
*/
#define MC_CMD_VIRTIO_FINI_QUEUE 0x16b
+#define MC_CMD_VIRTIO_FINI_QUEUE_MSGSET 0x16b
#undef MC_CMD_0x16b_PRIVILEGE_CTG
#define MC_CMD_0x16b_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -25063,6 +27400,7 @@
* queue(s) to be allocated.
*/
#define MC_CMD_VIRTIO_GET_DOORBELL_OFFSET 0x16c
+#define MC_CMD_VIRTIO_GET_DOORBELL_OFFSET_MSGSET 0x16c
#undef MC_CMD_0x16c_PRIVILEGE_CTG
#define MC_CMD_0x16c_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -25132,12 +27470,18 @@
#define PCIE_FUNCTION_VF_NULL 0xffff
#define PCIE_FUNCTION_VF_LBN 16
#define PCIE_FUNCTION_VF_WIDTH 16
-/* PCIe interface of the function */
+/* PCIe interface of the function. Values should be taken from the the
+ * PCIE_INTERFACE enum
+ */
#define PCIE_FUNCTION_INTF_OFST 4
#define PCIE_FUNCTION_INTF_LEN 4
-/* enum: Host PCIe interface */
+/* enum: Host PCIe interface. (Alias for HOST_PRIMARY, provided for backwards
+ * compatability)
+ */
#define PCIE_FUNCTION_INTF_HOST 0x0
-/* enum: Application Processor interface */
+/* enum: Application Processor interface (alias for NIC_EMBEDDED, provided for
+ * backwards compatability)
+ */
#define PCIE_FUNCTION_INTF_AP 0x1
#define PCIE_FUNCTION_INTF_LBN 32
#define PCIE_FUNCTION_INTF_WIDTH 32
@@ -25157,6 +27501,7 @@
* MC_CMD_DESC_PROXY_FUNC_COMMIT_IN.
*/
#define MC_CMD_DESC_PROXY_FUNC_CREATE 0x172
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_MSGSET 0x172
#undef MC_CMD_0x172_PRIVILEGE_CTG
#define MC_CMD_0x172_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25170,7 +27515,19 @@
#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_OFST 0
#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_LEN 8
#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_LO_OFST 0
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_LO_LEN 4
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_LO_LBN 0
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_LO_WIDTH 32
#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_HI_OFST 4
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_HI_LEN 4
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_HI_LBN 32
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_HI_WIDTH 32
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_PF_OFST 0
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_PF_LEN 2
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_VF_OFST 2
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_VF_LEN 2
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_INTF_OFST 4
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_INTF_LEN 4
/* The personality to set. The meanings of the personalities are defined in
* SF-120734-TC with more information in SF-122717-TC. At present, we only
* support proxying for VIRTIO_BLK
@@ -25194,7 +27551,19 @@
#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_OFST 4
#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_LEN 8
#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_LO_OFST 4
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_LO_LEN 4
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_LO_LBN 32
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_LO_WIDTH 32
#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_HI_OFST 8
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_HI_LEN 4
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_HI_LBN 64
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_HI_WIDTH 32
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_PF_OFST 4
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_PF_LEN 2
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_VF_OFST 6
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_VF_LEN 2
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_INTF_OFST 8
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_INTF_LEN 4
/***********************************/
@@ -25205,6 +27574,7 @@
* ownership is released.
*/
#define MC_CMD_DESC_PROXY_FUNC_DESTROY 0x173
+#define MC_CMD_DESC_PROXY_FUNC_DESTROY_MSGSET 0x173
#undef MC_CMD_0x173_PRIVILEGE_CTG
#define MC_CMD_0x173_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25235,7 +27605,13 @@
#define VIRTIO_BLK_CONFIG_FEATURES_OFST 0
#define VIRTIO_BLK_CONFIG_FEATURES_LEN 8
#define VIRTIO_BLK_CONFIG_FEATURES_LO_OFST 0
+#define VIRTIO_BLK_CONFIG_FEATURES_LO_LEN 4
+#define VIRTIO_BLK_CONFIG_FEATURES_LO_LBN 0
+#define VIRTIO_BLK_CONFIG_FEATURES_LO_WIDTH 32
#define VIRTIO_BLK_CONFIG_FEATURES_HI_OFST 4
+#define VIRTIO_BLK_CONFIG_FEATURES_HI_LEN 4
+#define VIRTIO_BLK_CONFIG_FEATURES_HI_LBN 32
+#define VIRTIO_BLK_CONFIG_FEATURES_HI_WIDTH 32
#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_BARRIER_OFST 0
#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_BARRIER_LBN 0
#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_BARRIER_WIDTH 1
@@ -25308,7 +27684,13 @@
#define VIRTIO_BLK_CONFIG_CAPACITY_OFST 8
#define VIRTIO_BLK_CONFIG_CAPACITY_LEN 8
#define VIRTIO_BLK_CONFIG_CAPACITY_LO_OFST 8
+#define VIRTIO_BLK_CONFIG_CAPACITY_LO_LEN 4
+#define VIRTIO_BLK_CONFIG_CAPACITY_LO_LBN 64
+#define VIRTIO_BLK_CONFIG_CAPACITY_LO_WIDTH 32
#define VIRTIO_BLK_CONFIG_CAPACITY_HI_OFST 12
+#define VIRTIO_BLK_CONFIG_CAPACITY_HI_LEN 4
+#define VIRTIO_BLK_CONFIG_CAPACITY_HI_LBN 96
+#define VIRTIO_BLK_CONFIG_CAPACITY_HI_WIDTH 32
#define VIRTIO_BLK_CONFIG_CAPACITY_LBN 64
#define VIRTIO_BLK_CONFIG_CAPACITY_WIDTH 64
/* Maximum size of any single segment. Only valid when VIRTIO_BLK_F_SIZE_MAX is
@@ -25445,6 +27827,7 @@
* not persisted until the caller commits with MC_CMD_DESC_PROXY_FUNC_COMMIT_IN
*/
#define MC_CMD_DESC_PROXY_FUNC_CONFIG_SET 0x174
+#define MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_MSGSET 0x174
#undef MC_CMD_0x174_PRIVILEGE_CTG
#define MC_CMD_0x174_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25485,6 +27868,7 @@
* delivered to callers MCDI event queue.
*/
#define MC_CMD_DESC_PROXY_FUNC_COMMIT 0x175
+#define MC_CMD_DESC_PROXY_FUNC_COMMIT_MSGSET 0x175
#undef MC_CMD_0x175_PRIVILEGE_CTG
#define MC_CMD_0x175_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25518,6 +27902,7 @@
* cycle. Returns ENODEV if no function with given label exists.
*/
#define MC_CMD_DESC_PROXY_FUNC_OPEN 0x176
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_MSGSET 0x176
#undef MC_CMD_0x176_PRIVILEGE_CTG
#define MC_CMD_0x176_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25543,7 +27928,19 @@
#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_OFST 4
#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_LEN 8
#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_LO_OFST 4
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_LO_LEN 4
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_LO_LBN 32
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_LO_WIDTH 32
#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_HI_OFST 8
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_HI_LEN 4
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_HI_LBN 64
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_HI_WIDTH 32
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_PF_OFST 4
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_PF_LEN 2
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_VF_OFST 6
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_VF_LEN 2
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_INTF_OFST 8
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_INTF_LEN 4
/* Function personality */
#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_PERSONALITY_OFST 12
#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_PERSONALITY_LEN 4
@@ -25588,6 +27985,7 @@
* error (for virtio, DEVICE_NEEDS_RESET flag would be set on the host side)
*/
#define MC_CMD_DESC_PROXY_FUNC_CLOSE 0x1a1
+#define MC_CMD_DESC_PROXY_FUNC_CLOSE_MSGSET 0x1a1
#undef MC_CMD_0x1a1_PRIVILEGE_CTG
#define MC_CMD_0x1a1_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25607,9 +28005,27 @@
#define DESC_PROXY_FUNC_MAP_FUNC_OFST 0
#define DESC_PROXY_FUNC_MAP_FUNC_LEN 8
#define DESC_PROXY_FUNC_MAP_FUNC_LO_OFST 0
+#define DESC_PROXY_FUNC_MAP_FUNC_LO_LEN 4
+#define DESC_PROXY_FUNC_MAP_FUNC_LO_LBN 0
+#define DESC_PROXY_FUNC_MAP_FUNC_LO_WIDTH 32
#define DESC_PROXY_FUNC_MAP_FUNC_HI_OFST 4
+#define DESC_PROXY_FUNC_MAP_FUNC_HI_LEN 4
+#define DESC_PROXY_FUNC_MAP_FUNC_HI_LBN 32
+#define DESC_PROXY_FUNC_MAP_FUNC_HI_WIDTH 32
#define DESC_PROXY_FUNC_MAP_FUNC_LBN 0
#define DESC_PROXY_FUNC_MAP_FUNC_WIDTH 64
+#define DESC_PROXY_FUNC_MAP_FUNC_PF_OFST 0
+#define DESC_PROXY_FUNC_MAP_FUNC_PF_LEN 2
+#define DESC_PROXY_FUNC_MAP_FUNC_PF_LBN 0
+#define DESC_PROXY_FUNC_MAP_FUNC_PF_WIDTH 16
+#define DESC_PROXY_FUNC_MAP_FUNC_VF_OFST 2
+#define DESC_PROXY_FUNC_MAP_FUNC_VF_LEN 2
+#define DESC_PROXY_FUNC_MAP_FUNC_VF_LBN 16
+#define DESC_PROXY_FUNC_MAP_FUNC_VF_WIDTH 16
+#define DESC_PROXY_FUNC_MAP_FUNC_INTF_OFST 4
+#define DESC_PROXY_FUNC_MAP_FUNC_INTF_LEN 4
+#define DESC_PROXY_FUNC_MAP_FUNC_INTF_LBN 32
+#define DESC_PROXY_FUNC_MAP_FUNC_INTF_WIDTH 32
/* Function personality */
#define DESC_PROXY_FUNC_MAP_PERSONALITY_OFST 8
#define DESC_PROXY_FUNC_MAP_PERSONALITY_LEN 4
@@ -25631,6 +28047,7 @@
* Enumerate existing descriptor proxy functions
*/
#define MC_CMD_DESC_PROXY_FUNC_ENUM 0x177
+#define MC_CMD_DESC_PROXY_FUNC_ENUM_MSGSET 0x177
#undef MC_CMD_0x177_PRIVILEGE_CTG
#define MC_CMD_0x177_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25670,6 +28087,7 @@
* function.
*/
#define MC_CMD_DESC_PROXY_FUNC_ENABLE 0x178
+#define MC_CMD_DESC_PROXY_FUNC_ENABLE_MSGSET 0x178
#undef MC_CMD_0x178_PRIVILEGE_CTG
#define MC_CMD_0x178_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25702,6 +28120,7 @@
* Disable descriptor proxying for function
*/
#define MC_CMD_DESC_PROXY_FUNC_DISABLE 0x179
+#define MC_CMD_DESC_PROXY_FUNC_DISABLE_MSGSET 0x179
#undef MC_CMD_0x179_PRIVILEGE_CTG
#define MC_CMD_0x179_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25725,6 +28144,7 @@
* descriptors.
*/
#define MC_CMD_GET_ADDR_SPC_ID 0x1a0
+#define MC_CMD_GET_ADDR_SPC_ID_MSGSET 0x1a0
#undef MC_CMD_0x1a0_PRIVILEGE_CTG
#define MC_CMD_0x1a0_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25769,7 +28189,19 @@
#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_OFST 4
#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_LEN 8
#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_LO_OFST 4
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_LO_LEN 4
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_LO_LBN 32
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_LO_WIDTH 32
#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_HI_OFST 8
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_HI_LEN 4
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_HI_LBN 64
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_HI_WIDTH 32
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_PF_OFST 4
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_PF_LEN 2
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_VF_OFST 6
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_VF_LEN 2
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_INTF_OFST 8
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_INTF_LEN 4
/* PASID value. Only valid if TYPE is PCI_FUNC_PASID. */
#define MC_CMD_GET_ADDR_SPC_ID_IN_PASID_OFST 12
#define MC_CMD_GET_ADDR_SPC_ID_IN_PASID_LEN 4
@@ -25789,7 +28221,72 @@
#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_OFST 0
#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_LEN 8
#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_LO_OFST 0
+#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_LO_LEN 4
+#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_LO_LBN 0
+#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_LO_WIDTH 32
#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_HI_OFST 4
+#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_HI_LEN 4
+#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_HI_LBN 32
+#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_HI_WIDTH 32
+
+
+/***********************************/
+/* MC_CMD_GET_CLIENT_HANDLE
+ * Obtain a handle for a client given a description of that client. N.B. this
+ * command is subject to change given the open discussion about how PCIe
+ * functions should be referenced on an iEP (integrated endpoint: functions
+ * span multiple buses) and multihost (multiple PCIe interfaces) system.
+ */
+#define MC_CMD_GET_CLIENT_HANDLE 0x1c3
+#define MC_CMD_GET_CLIENT_HANDLE_MSGSET 0x1c3
+#undef MC_CMD_0x1c3_PRIVILEGE_CTG
+
+#define MC_CMD_0x1c3_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_GET_CLIENT_HANDLE_IN msgrequest */
+#define MC_CMD_GET_CLIENT_HANDLE_IN_LEN 12
+/* Type of client to get a client handle for */
+#define MC_CMD_GET_CLIENT_HANDLE_IN_TYPE_OFST 0
+#define MC_CMD_GET_CLIENT_HANDLE_IN_TYPE_LEN 4
+/* enum: Obtain a client handle for a PCIe function-type client. */
+#define MC_CMD_GET_CLIENT_HANDLE_IN_TYPE_FUNC 0x0
+/* PCIe Function ID (as struct PCIE_FUNCTION). Valid when TYPE==FUNC. Use: -
+ * INTF=CALLER, PF=PF_NULL, VF=VF_NULL to refer to the calling function -
+ * INTF=CALLER, PF=PF_NULL, VF=... to refer to a VF child of the calling PF or
+ * a sibling VF of the calling VF. - INTF=CALLER, PF=..., VF=VF_NULL to refer
+ * to a PF on the calling interface - INTF=CALLER, PF=..., VF=... to refer to a
+ * VF on the calling interface - INTF=..., PF=..., VF=VF_NULL to refer to a PF
+ * on a named interface - INTF=..., PF=..., VF=... to refer to a VF on a named
+ * interface where ... refers to a small integer for the VF/PF fields, and to
+ * values from the PCIE_INTERFACE enum for for the INTF field. It's only
+ * meaningful to use INTF=CALLER within a structure that's an argument to
+ * MC_CMD_DEVEL_GET_CLIENT_HANDLE.
+ */
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_OFST 4
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_LEN 8
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_LO_OFST 4
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_LO_LEN 4
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_LO_LBN 32
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_LO_WIDTH 32
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_HI_OFST 8
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_HI_LEN 4
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_HI_LBN 64
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_HI_WIDTH 32
+/* enum: NULL value for the INTF field of struct PCIE_FUNCTION. Provided for
+ * backwards compatability only, callers should use PCIE_INTERFACE_CALLER.
+ */
+#define MC_CMD_GET_CLIENT_HANDLE_IN_PCIE_FUNCTION_INTF_NULL 0xffffffff
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_PF_OFST 4
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_PF_LEN 2
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_VF_OFST 6
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_VF_LEN 2
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_INTF_OFST 8
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_INTF_LEN 4
+
+/* MC_CMD_GET_CLIENT_HANDLE_OUT msgresponse */
+#define MC_CMD_GET_CLIENT_HANDLE_OUT_LEN 4
+#define MC_CMD_GET_CLIENT_HANDLE_OUT_HANDLE_OFST 0
+#define MC_CMD_GET_CLIENT_HANDLE_OUT_HANDLE_LEN 4
/* MAE_FIELD_FLAGS structuredef */
#define MAE_FIELD_FLAGS_LEN 4
@@ -25937,6 +28434,40 @@
#define MAE_ENC_FIELD_PAIRS_ENC_IP_TTL_MASK_LEN 1
#define MAE_ENC_FIELD_PAIRS_ENC_IP_TTL_MASK_LBN 1096
#define MAE_ENC_FIELD_PAIRS_ENC_IP_TTL_MASK_WIDTH 8
+#define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_OFST 138
+#define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_LEN 1
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_OVLAN_OFST 138
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_OVLAN_LBN 0
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_OVLAN_WIDTH 1
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_IVLAN_OFST 138
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_IVLAN_LBN 1
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_IVLAN_WIDTH 1
+#define MAE_ENC_FIELD_PAIRS_ENC_IP_FRAG_OFST 138
+#define MAE_ENC_FIELD_PAIRS_ENC_IP_FRAG_LBN 2
+#define MAE_ENC_FIELD_PAIRS_ENC_IP_FRAG_WIDTH 1
+#define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_LBN 1104
+#define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_WIDTH 8
+#define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_OFST 138
+#define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_LEN 1
+#define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_LBN 1104
+#define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_WIDTH 8
+#define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_MASK_OFST 139
+#define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_MASK_LEN 1
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_OVLAN_MASK_OFST 139
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_OVLAN_MASK_LBN 0
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_OVLAN_MASK_WIDTH 1
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_IVLAN_MASK_OFST 139
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_IVLAN_MASK_LBN 1
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_IVLAN_MASK_WIDTH 1
+#define MAE_ENC_FIELD_PAIRS_ENC_IP_FRAG_MASK_OFST 139
+#define MAE_ENC_FIELD_PAIRS_ENC_IP_FRAG_MASK_LBN 2
+#define MAE_ENC_FIELD_PAIRS_ENC_IP_FRAG_MASK_WIDTH 1
+#define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_MASK_LBN 1112
+#define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_MASK_WIDTH 8
+#define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_MASK_OFST 139
+#define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_MASK_LEN 1
+#define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_MASK_LBN 1112
+#define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_MASK_WIDTH 8
#define MAE_ENC_FIELD_PAIRS_ENC_IP_FLAGS_BE_OFST 140
#define MAE_ENC_FIELD_PAIRS_ENC_IP_FLAGS_BE_LEN 4
#define MAE_ENC_FIELD_PAIRS_ENC_IP_FLAGS_BE_LBN 1120
@@ -26623,9 +29154,24 @@
#define MAE_FIELD_MASK_VALUE_PAIRS_V2_IS_FROM_NETWORK_OFST 344
#define MAE_FIELD_MASK_VALUE_PAIRS_V2_IS_FROM_NETWORK_LBN 3
#define MAE_FIELD_MASK_VALUE_PAIRS_V2_IS_FROM_NETWORK_WIDTH 1
-#define MAE_FIELD_MASK_VALUE_PAIRS_V2_RSVD_OFST 344
-#define MAE_FIELD_MASK_VALUE_PAIRS_V2_RSVD_LBN 4
-#define MAE_FIELD_MASK_VALUE_PAIRS_V2_RSVD_WIDTH 28
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_HAS_OVLAN_OFST 344
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_HAS_OVLAN_LBN 4
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_HAS_OVLAN_WIDTH 1
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_HAS_IVLAN_OFST 344
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_HAS_IVLAN_LBN 5
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_HAS_IVLAN_WIDTH 1
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_ENC_HAS_OVLAN_OFST 344
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_ENC_HAS_OVLAN_LBN 6
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_ENC_HAS_OVLAN_WIDTH 1
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_ENC_HAS_IVLAN_OFST 344
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_ENC_HAS_IVLAN_LBN 7
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_ENC_HAS_IVLAN_WIDTH 1
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_TCP_SYN_FIN_RST_OFST 344
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_TCP_SYN_FIN_RST_LBN 8
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_TCP_SYN_FIN_RST_WIDTH 1
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_IP_FIRST_FRAG_OFST 344
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_IP_FIRST_FRAG_LBN 9
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_IP_FIRST_FRAG_WIDTH 1
#define MAE_FIELD_MASK_VALUE_PAIRS_V2_FLAGS_LBN 2752
#define MAE_FIELD_MASK_VALUE_PAIRS_V2_FLAGS_WIDTH 32
#define MAE_FIELD_MASK_VALUE_PAIRS_V2_FLAGS_MASK_OFST 348
@@ -26707,16 +29253,32 @@
#define MAE_MPORT_SELECTOR_TYPE_WIDTH 8
/* enum: The MPORT connected to a given physical port */
#define MAE_MPORT_SELECTOR_TYPE_PPORT 0x2
-/* enum: The MPORT assigned to a given PCIe function */
+/* enum: The MPORT assigned to a given PCIe function. Deprecated in favour of
+ * MH_FUNC.
+ */
#define MAE_MPORT_SELECTOR_TYPE_FUNC 0x3
/* enum: An mport_id */
#define MAE_MPORT_SELECTOR_TYPE_MPORT_ID 0x4
+/* enum: The MPORT assigned to a given PCIe function (see also FWRIVERHD-1108)
+ */
+#define MAE_MPORT_SELECTOR_TYPE_MH_FUNC 0x5
#define MAE_MPORT_SELECTOR_MPORT_ID_OFST 0
#define MAE_MPORT_SELECTOR_MPORT_ID_LBN 0
#define MAE_MPORT_SELECTOR_MPORT_ID_WIDTH 24
#define MAE_MPORT_SELECTOR_PPORT_ID_OFST 0
#define MAE_MPORT_SELECTOR_PPORT_ID_LBN 0
#define MAE_MPORT_SELECTOR_PPORT_ID_WIDTH 4
+#define MAE_MPORT_SELECTOR_FUNC_INTF_ID_OFST 0
+#define MAE_MPORT_SELECTOR_FUNC_INTF_ID_LBN 20
+#define MAE_MPORT_SELECTOR_FUNC_INTF_ID_WIDTH 4
+#define MAE_MPORT_SELECTOR_HOST_PRIMARY 0x1 /* enum */
+#define MAE_MPORT_SELECTOR_NIC_EMBEDDED 0x2 /* enum */
+/* enum: Deprecated, use CALLER_INTF instead. */
+#define MAE_MPORT_SELECTOR_CALLER 0xf
+#define MAE_MPORT_SELECTOR_CALLER_INTF 0xf /* enum */
+#define MAE_MPORT_SELECTOR_FUNC_MH_PF_ID_OFST 0
+#define MAE_MPORT_SELECTOR_FUNC_MH_PF_ID_LBN 16
+#define MAE_MPORT_SELECTOR_FUNC_MH_PF_ID_WIDTH 4
#define MAE_MPORT_SELECTOR_FUNC_PF_ID_OFST 0
#define MAE_MPORT_SELECTOR_FUNC_PF_ID_LBN 16
#define MAE_MPORT_SELECTOR_FUNC_PF_ID_WIDTH 8
@@ -26737,15 +29299,56 @@
* function.
*/
#define MAE_MPORT_SELECTOR_FUNC_PF_ID_CALLER 0xff
+/* enum: Same as PF_ID_CALLER, but for use in the smaller MH_PF_ID field. Only
+ * valid if FUNC_INTF_ID is CALLER.
+ */
+#define MAE_MPORT_SELECTOR_FUNC_MH_PF_ID_CALLER 0xf
#define MAE_MPORT_SELECTOR_FLAT_LBN 0
#define MAE_MPORT_SELECTOR_FLAT_WIDTH 32
+/* MAE_LINK_ENDPOINT_SELECTOR structuredef: Structure that identifies a real or
+ * virtual network port by MAE port and link end
+ */
+#define MAE_LINK_ENDPOINT_SELECTOR_LEN 8
+/* The MAE MPORT of interest */
+#define MAE_LINK_ENDPOINT_SELECTOR_MPORT_SELECTOR_OFST 0
+#define MAE_LINK_ENDPOINT_SELECTOR_MPORT_SELECTOR_LEN 4
+#define MAE_LINK_ENDPOINT_SELECTOR_MPORT_SELECTOR_LBN 0
+#define MAE_LINK_ENDPOINT_SELECTOR_MPORT_SELECTOR_WIDTH 32
+/* Which end of the link identified by MPORT to consider */
+#define MAE_LINK_ENDPOINT_SELECTOR_LINK_END_OFST 4
+#define MAE_LINK_ENDPOINT_SELECTOR_LINK_END_LEN 4
+/* Enum values, see field(s): */
+/* MAE_MPORT_END */
+#define MAE_LINK_ENDPOINT_SELECTOR_LINK_END_LBN 32
+#define MAE_LINK_ENDPOINT_SELECTOR_LINK_END_WIDTH 32
+/* A field for accessing the endoint selector as a collection of bits */
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_OFST 0
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_LEN 8
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_LO_OFST 0
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_LO_LEN 4
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_LO_LBN 0
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_LO_WIDTH 32
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_HI_OFST 4
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_HI_LEN 4
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_HI_LBN 32
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_HI_WIDTH 32
+/* enum: Set FLAT to this value to obtain backward-compatible behaviour in
+ * commands that have been extended to take a MAE_LINK_ENDPOINT_SELECTOR
+ * argument. New commands that are designed to take such an argument from the
+ * start will not support this.
+ */
+#define MAE_LINK_ENDPOINT_SELECTOR_MAE_LINK_ENDPOINT_COMPAT 0x0
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_LBN 0
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_WIDTH 64
+
/***********************************/
/* MC_CMD_MAE_GET_CAPS
* Describes capabilities of the MAE (Match-Action Engine)
*/
#define MC_CMD_MAE_GET_CAPS 0x140
+#define MC_CMD_MAE_GET_CAPS_MSGSET 0x140
#undef MC_CMD_0x140_PRIVILEGE_CTG
#define MC_CMD_0x140_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -26772,6 +29375,9 @@
#define MC_CMD_MAE_GET_CAPS_OUT_ENCAP_TYPE_GENEVE_OFST 4
#define MC_CMD_MAE_GET_CAPS_OUT_ENCAP_TYPE_GENEVE_LBN 2
#define MC_CMD_MAE_GET_CAPS_OUT_ENCAP_TYPE_GENEVE_WIDTH 1
+#define MC_CMD_MAE_GET_CAPS_OUT_ENCAP_TYPE_L2GRE_OFST 4
+#define MC_CMD_MAE_GET_CAPS_OUT_ENCAP_TYPE_L2GRE_LBN 3
+#define MC_CMD_MAE_GET_CAPS_OUT_ENCAP_TYPE_L2GRE_WIDTH 1
/* The total number of counters available to allocate. */
#define MC_CMD_MAE_GET_CAPS_OUT_COUNTERS_OFST 8
#define MC_CMD_MAE_GET_CAPS_OUT_COUNTERS_LEN 4
@@ -26823,6 +29429,7 @@
* Get a level of support for match fields when used in match-action rules
*/
#define MC_CMD_MAE_GET_AR_CAPS 0x141
+#define MC_CMD_MAE_GET_AR_CAPS_MSGSET 0x141
#undef MC_CMD_0x141_PRIVILEGE_CTG
#define MC_CMD_0x141_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -26855,6 +29462,7 @@
* Get a level of support for fields used in outer rule keys.
*/
#define MC_CMD_MAE_GET_OR_CAPS 0x142
+#define MC_CMD_MAE_GET_OR_CAPS_MSGSET 0x142
#undef MC_CMD_0x142_PRIVILEGE_CTG
#define MC_CMD_0x142_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -26885,6 +29493,7 @@
* Rules.
*/
#define MC_CMD_MAE_COUNTER_ALLOC 0x143
+#define MC_CMD_MAE_COUNTER_ALLOC_MSGSET 0x143
#undef MC_CMD_0x143_PRIVILEGE_CTG
#define MC_CMD_0x143_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -26928,6 +29537,7 @@
* Free match-action-engine counters
*/
#define MC_CMD_MAE_COUNTER_FREE 0x144
+#define MC_CMD_MAE_COUNTER_FREE_MSGSET 0x144
#undef MC_CMD_0x144_PRIVILEGE_CTG
#define MC_CMD_0x144_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -26995,6 +29605,7 @@
* delivering packets to the current queue first.
*/
#define MC_CMD_MAE_COUNTERS_STREAM_START 0x151
+#define MC_CMD_MAE_COUNTERS_STREAM_START_MSGSET 0x151
#undef MC_CMD_0x151_PRIVILEGE_CTG
#define MC_CMD_0x151_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27031,6 +29642,7 @@
* Stop streaming counter values to the specified RxQ.
*/
#define MC_CMD_MAE_COUNTERS_STREAM_STOP 0x152
+#define MC_CMD_MAE_COUNTERS_STREAM_STOP_MSGSET 0x152
#undef MC_CMD_0x152_PRIVILEGE_CTG
#define MC_CMD_0x152_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27060,6 +29672,7 @@
* MAE_COUNTERS_PACKETISER_STREAM_START/PACKET_SIZE and rung the doorbell.
*/
#define MC_CMD_MAE_COUNTERS_STREAM_GIVE_CREDITS 0x153
+#define MC_CMD_MAE_COUNTERS_STREAM_GIVE_CREDITS_MSGSET 0x153
#undef MC_CMD_0x153_PRIVILEGE_CTG
#define MC_CMD_0x153_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27076,9 +29689,14 @@
/***********************************/
/* MC_CMD_MAE_ENCAP_HEADER_ALLOC
- * Allocate encap action metadata
+ * Allocate an encapsulation header to be used in an Action Rule response. The
+ * header must be constructed as a valid packet with 0-length payload.
+ * Specifically, the L3/L4 lengths & checksums will only be incrementally fixed
+ * by the NIC, rather than recomputed entirely. Currently only IPv4, IPv6 and
+ * UDP are supported.
*/
#define MC_CMD_MAE_ENCAP_HEADER_ALLOC 0x148
+#define MC_CMD_MAE_ENCAP_HEADER_ALLOC_MSGSET 0x148
#undef MC_CMD_0x148_PRIVILEGE_CTG
#define MC_CMD_0x148_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27109,9 +29727,10 @@
/***********************************/
/* MC_CMD_MAE_ENCAP_HEADER_UPDATE
- * Update encap action metadata
+ * Update encap action metadata. See comments for MAE_ENCAP_HEADER_ALLOC.
*/
#define MC_CMD_MAE_ENCAP_HEADER_UPDATE 0x149
+#define MC_CMD_MAE_ENCAP_HEADER_UPDATE_MSGSET 0x149
#undef MC_CMD_0x149_PRIVILEGE_CTG
#define MC_CMD_0x149_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27141,6 +29760,7 @@
* Free encap action metadata
*/
#define MC_CMD_MAE_ENCAP_HEADER_FREE 0x14a
+#define MC_CMD_MAE_ENCAP_HEADER_FREE_MSGSET 0x14a
#undef MC_CMD_0x14a_PRIVILEGE_CTG
#define MC_CMD_0x14a_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27179,6 +29799,7 @@
* same MAC address twice (but instead reuse its ID).
*/
#define MC_CMD_MAE_MAC_ADDR_ALLOC 0x15e
+#define MC_CMD_MAE_MAC_ADDR_ALLOC_MSGSET 0x15e
#undef MC_CMD_0x15e_PRIVILEGE_CTG
#define MC_CMD_0x15e_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27204,6 +29825,7 @@
* Free MAC address.
*/
#define MC_CMD_MAE_MAC_ADDR_FREE 0x15f
+#define MC_CMD_MAE_MAC_ADDR_FREE_MSGSET 0x15f
#undef MC_CMD_0x15f_PRIVILEGE_CTG
#define MC_CMD_0x15f_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27241,6 +29863,7 @@
* Action Rule, or as part of an Action Set List.
*/
#define MC_CMD_MAE_ACTION_SET_ALLOC 0x14d
+#define MC_CMD_MAE_ACTION_SET_ALLOC_MSGSET 0x14d
#undef MC_CMD_0x14d_PRIVILEGE_CTG
#define MC_CMD_0x14d_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27267,6 +29890,15 @@
#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_NAT_OFST 0
#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_NAT_LBN 11
#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_NAT_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_DECR_IP_TTL_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_DECR_IP_TTL_LBN 12
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_DECR_IP_TTL_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_SET_SRC_MPORT_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_SET_SRC_MPORT_LBN 13
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_SET_SRC_MPORT_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_SUPPRESS_SELF_DELIVERY_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_SUPPRESS_SELF_DELIVERY_LBN 14
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_SUPPRESS_SELF_DELIVERY_WIDTH 1
/* If VLAN_PUSH >= 1, TCI value to be inserted as outermost VLAN. */
#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_VLAN0_TCI_BE_OFST 4
#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_VLAN0_TCI_BE_LEN 2
@@ -27313,8 +29945,135 @@
#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DST_MAC_ID_OFST 40
#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DST_MAC_ID_LEN 4
+/* MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN msgrequest: Only supported if
+ * MAE_ACTION_SET_ALLOC_V2_SUPPORTED is advertised in
+ * MC_CMD_GET_CAPABILITIES_V7_OUT.
+ */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_LEN 51
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_FLAGS_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_FLAGS_LEN 4
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN_PUSH_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN_PUSH_LBN 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN_PUSH_WIDTH 2
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN_POP_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN_POP_LBN 4
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN_POP_WIDTH 2
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DECAP_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DECAP_LBN 8
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DECAP_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_MARK_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_MARK_LBN 9
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_MARK_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_FLAG_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_FLAG_LBN 10
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_FLAG_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_NAT_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_NAT_LBN 11
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_NAT_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DECR_IP_TTL_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DECR_IP_TTL_LBN 12
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DECR_IP_TTL_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_SET_SRC_MPORT_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_SET_SRC_MPORT_LBN 13
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_SET_SRC_MPORT_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_SUPPRESS_SELF_DELIVERY_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_SUPPRESS_SELF_DELIVERY_LBN 14
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_SUPPRESS_SELF_DELIVERY_WIDTH 1
+/* If VLAN_PUSH >= 1, TCI value to be inserted as outermost VLAN. */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN0_TCI_BE_OFST 4
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN0_TCI_BE_LEN 2
+/* If VLAN_PUSH >= 1, TPID value to be inserted as outermost VLAN. */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN0_PROTO_BE_OFST 6
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN0_PROTO_BE_LEN 2
+/* If VLAN_PUSH == 2, inner TCI value to be inserted. */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN1_TCI_BE_OFST 8
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN1_TCI_BE_LEN 2
+/* If VLAN_PUSH == 2, inner TPID value to be inserted. */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN1_PROTO_BE_OFST 10
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN1_PROTO_BE_LEN 2
+/* Reserved. Ignored by firmware. Should be set to zero or 0xffffffff. */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_RSVD_OFST 12
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_RSVD_LEN 4
+/* Set to ENCAP_HEADER_ID_NULL to request no encap action */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ENCAP_HEADER_ID_OFST 16
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ENCAP_HEADER_ID_LEN 4
+/* An m-port selector identifying the m-port that the modified packet should be
+ * delivered to. Set to MPORT_SELECTOR_NULL to request no delivery of the
+ * packet.
+ */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DELIVER_OFST 20
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DELIVER_LEN 4
+/* Allows an action set to trigger several counter updates. Set to
+ * COUNTER_LIST_ID_NULL to request no counter action.
+ */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_COUNTER_LIST_ID_OFST 24
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_COUNTER_LIST_ID_LEN 4
+/* If a driver only wished to update one counter within this action set, then
+ * it can supply a COUNTER_ID instead of allocating a single-element counter
+ * list. This field should be set to COUNTER_ID_NULL if this behaviour is not
+ * required. It is not valid to supply a non-NULL value for both
+ * COUNTER_LIST_ID and COUNTER_ID.
+ */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_COUNTER_ID_OFST 28
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_COUNTER_ID_LEN 4
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_MARK_VALUE_OFST 32
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_MARK_VALUE_LEN 4
+/* Set to MAC_ID_NULL to request no source MAC replacement. */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_SRC_MAC_ID_OFST 36
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_SRC_MAC_ID_LEN 4
+/* Set to MAC_ID_NULL to request no destination MAC replacement. */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DST_MAC_ID_OFST 40
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DST_MAC_ID_LEN 4
+/* Source m-port ID to be reported for DO_SET_SRC_MPORT action. */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_REPORTED_SRC_MPORT_OFST 44
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_REPORTED_SRC_MPORT_LEN 4
+/* Actions for modifying the Differentiated Services Code-Point (DSCP) bits
+ * within IPv4 and IPv6 headers.
+ */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DSCP_CONTROL_OFST 48
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DSCP_CONTROL_LEN 2
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DSCP_ENCAP_COPY_OFST 48
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DSCP_ENCAP_COPY_LBN 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DSCP_ENCAP_COPY_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DSCP_DECAP_COPY_OFST 48
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DSCP_DECAP_COPY_LBN 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DSCP_DECAP_COPY_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_DSCP_OFST 48
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_DSCP_LBN 2
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_DSCP_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DSCP_VALUE_OFST 48
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DSCP_VALUE_LBN 3
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DSCP_VALUE_WIDTH 6
+/* Actions for modifying the Explicit Congestion Notification (ECN) bits within
+ * IPv4 and IPv6 headers.
+ */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_CONTROL_OFST 50
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_CONTROL_LEN 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_ECN_ENCAP_COPY_OFST 50
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_ECN_ENCAP_COPY_LBN 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_ECN_ENCAP_COPY_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_ECN_DECAP_COPY_OFST 50
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_ECN_DECAP_COPY_LBN 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_ECN_DECAP_COPY_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_ECN_OFST 50
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_ECN_LBN 2
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_ECN_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_VALUE_OFST 50
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_VALUE_LBN 3
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_VALUE_WIDTH 2
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_ECT_0_TO_CE_OFST 50
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_ECT_0_TO_CE_LBN 5
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_ECT_0_TO_CE_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_ECT_1_TO_CE_OFST 50
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_ECT_1_TO_CE_LBN 6
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_ECT_1_TO_CE_WIDTH 1
+
/* MC_CMD_MAE_ACTION_SET_ALLOC_OUT msgresponse */
#define MC_CMD_MAE_ACTION_SET_ALLOC_OUT_LEN 4
+/* The MSB of the AS_ID is guaranteed to be clear if the ID is not
+ * ACTION_SET_ID_NULL. This allows an AS_ID to be distinguished from an ASL_ID
+ * returned from MC_CMD_MAE_ACTION_SET_LIST_ALLOC.
+ */
#define MC_CMD_MAE_ACTION_SET_ALLOC_OUT_AS_ID_OFST 0
#define MC_CMD_MAE_ACTION_SET_ALLOC_OUT_AS_ID_LEN 4
/* enum: An action set ID that is guaranteed never to represent an action set
@@ -27326,6 +30085,7 @@
/* MC_CMD_MAE_ACTION_SET_FREE
*/
#define MC_CMD_MAE_ACTION_SET_FREE 0x14e
+#define MC_CMD_MAE_ACTION_SET_FREE_MSGSET 0x14e
#undef MC_CMD_0x14e_PRIVILEGE_CTG
#define MC_CMD_0x14e_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27364,6 +30124,7 @@
* matching the rule every action set in the list is applied.
*/
#define MC_CMD_MAE_ACTION_SET_LIST_ALLOC 0x14f
+#define MC_CMD_MAE_ACTION_SET_LIST_ALLOC_MSGSET 0x14f
#undef MC_CMD_0x14f_PRIVILEGE_CTG
#define MC_CMD_0x14f_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27394,6 +30155,9 @@
/* MC_CMD_MAE_ACTION_SET_LIST_ALLOC_OUT msgresponse */
#define MC_CMD_MAE_ACTION_SET_LIST_ALLOC_OUT_LEN 4
+/* The MSB of the ASL_ID is guaranteed to be set. This allows an ASL_ID to be
+ * distinguished from an AS_ID returned from MC_CMD_MAE_ACTION_SET_ALLOC.
+ */
#define MC_CMD_MAE_ACTION_SET_LIST_ALLOC_OUT_ASL_ID_OFST 0
#define MC_CMD_MAE_ACTION_SET_LIST_ALLOC_OUT_ASL_ID_LEN 4
/* enum: An action set list ID that is guaranteed never to represent an action
@@ -27407,6 +30171,7 @@
* Free match-action-engine redirect_lists
*/
#define MC_CMD_MAE_ACTION_SET_LIST_FREE 0x150
+#define MC_CMD_MAE_ACTION_SET_LIST_FREE_MSGSET 0x150
#undef MC_CMD_0x150_PRIVILEGE_CTG
#define MC_CMD_0x150_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27444,6 +30209,7 @@
* influence the Lookup Sequence.
*/
#define MC_CMD_MAE_OUTER_RULE_INSERT 0x15a
+#define MC_CMD_MAE_OUTER_RULE_INSERT_MSGSET 0x15a
#undef MC_CMD_0x15a_PRIVILEGE_CTG
#define MC_CMD_0x15a_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27504,6 +30270,7 @@
/* MC_CMD_MAE_OUTER_RULE_REMOVE
*/
#define MC_CMD_MAE_OUTER_RULE_REMOVE 0x15b
+#define MC_CMD_MAE_OUTER_RULE_REMOVE_MSGSET 0x15b
#undef MC_CMD_0x15b_PRIVILEGE_CTG
#define MC_CMD_0x15b_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27586,6 +30353,7 @@
* MC_CMD_MAE_GET_MATCH_FIELD_CAPABILITIES.
*/
#define MC_CMD_MAE_ACTION_RULE_INSERT 0x15c
+#define MC_CMD_MAE_ACTION_RULE_INSERT_MSGSET 0x15c
#undef MC_CMD_0x15c_PRIVILEGE_CTG
#define MC_CMD_0x15c_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27627,6 +30395,7 @@
* ENOTSUP, in which case the driver should DELETE/INSERT.
*/
#define MC_CMD_MAE_ACTION_RULE_UPDATE 0x15d
+#define MC_CMD_MAE_ACTION_RULE_UPDATE_MSGSET 0x15d
#undef MC_CMD_0x15d_PRIVILEGE_CTG
#define MC_CMD_0x15d_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27648,6 +30417,7 @@
/* MC_CMD_MAE_ACTION_RULE_DELETE
*/
#define MC_CMD_MAE_ACTION_RULE_DELETE 0x155
+#define MC_CMD_MAE_ACTION_RULE_DELETE_MSGSET 0x155
#undef MC_CMD_0x155_PRIVILEGE_CTG
#define MC_CMD_0x155_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27684,6 +30454,7 @@
* Return the m-port corresponding to a selector.
*/
#define MC_CMD_MAE_MPORT_LOOKUP 0x160
+#define MC_CMD_MAE_MPORT_LOOKUP_MSGSET 0x160
#undef MC_CMD_0x160_PRIVILEGE_CTG
#define MC_CMD_0x160_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -27705,6 +30476,7 @@
* match or delivery argument.
*/
#define MC_CMD_MAE_MPORT_ALLOC 0x163
+#define MC_CMD_MAE_MPORT_ALLOC_MSGSET 0x163
#undef MC_CMD_0x163_PRIVILEGE_CTG
#define MC_CMD_0x163_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27812,6 +30584,7 @@
* Free a m-port which was previously allocated by the driver.
*/
#define MC_CMD_MAE_MPORT_FREE 0x164
+#define MC_CMD_MAE_MPORT_FREE_MSGSET 0x164
#undef MC_CMD_0x164_PRIVILEGE_CTG
#define MC_CMD_0x164_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27847,6 +30620,9 @@
#define MAE_MPORT_DESC_CAN_DELETE_OFST 8
#define MAE_MPORT_DESC_CAN_DELETE_LBN 2
#define MAE_MPORT_DESC_CAN_DELETE_WIDTH 1
+#define MAE_MPORT_DESC_IS_ZOMBIE_OFST 8
+#define MAE_MPORT_DESC_IS_ZOMBIE_LBN 3
+#define MAE_MPORT_DESC_IS_ZOMBIE_WIDTH 1
#define MAE_MPORT_DESC_CALLER_FLAGS_LBN 64
#define MAE_MPORT_DESC_CALLER_FLAGS_WIDTH 32
/* Not the ideal name; it's really the type of thing connected to the m-port */
@@ -27869,7 +30645,13 @@
#define MAE_MPORT_DESC_RESERVED_OFST 32
#define MAE_MPORT_DESC_RESERVED_LEN 8
#define MAE_MPORT_DESC_RESERVED_LO_OFST 32
+#define MAE_MPORT_DESC_RESERVED_LO_LEN 4
+#define MAE_MPORT_DESC_RESERVED_LO_LBN 256
+#define MAE_MPORT_DESC_RESERVED_LO_WIDTH 32
#define MAE_MPORT_DESC_RESERVED_HI_OFST 36
+#define MAE_MPORT_DESC_RESERVED_HI_LEN 4
+#define MAE_MPORT_DESC_RESERVED_HI_LBN 288
+#define MAE_MPORT_DESC_RESERVED_HI_WIDTH 32
#define MAE_MPORT_DESC_RESERVED_LBN 256
#define MAE_MPORT_DESC_RESERVED_WIDTH 64
/* Logical port index. Only valid when type NET Port. */
@@ -27889,7 +30671,7 @@
#define MAE_MPORT_DESC_VNIC_CLIENT_TYPE_PLUGIN 0x2 /* enum */
#define MAE_MPORT_DESC_VNIC_CLIENT_TYPE_LBN 320
#define MAE_MPORT_DESC_VNIC_CLIENT_TYPE_WIDTH 32
-/* The PCIe interface on which the function lives. CJK: We need an enumeration
+/* The PCIe interface on which the funcion lives. CJK: We need an enumeration
* of interfaces that we extend as new interface (types) appear. This belongs
* elsewhere and should be referenced from here
*/
@@ -27916,8 +30698,11 @@
/***********************************/
/* MC_CMD_MAE_MPORT_ENUMERATE
+ * Deprecated in favour of MAE_MPORT_READ_JOURNAL. Support for this command
+ * will be removed at some future point.
*/
#define MC_CMD_MAE_MPORT_ENUMERATE 0x17c
+#define MC_CMD_MAE_MPORT_ENUMERATE_MSGSET 0x17c
#undef MC_CMD_0x17c_PRIVILEGE_CTG
#define MC_CMD_0x17c_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -27945,4 +30730,50 @@
#define MC_CMD_MAE_MPORT_ENUMERATE_OUT_MPORT_DESC_DATA_MAXNUM 244
#define MC_CMD_MAE_MPORT_ENUMERATE_OUT_MPORT_DESC_DATA_MAXNUM_MCDI2 1012
+
+/***********************************/
+/* MC_CMD_MAE_MPORT_READ_JOURNAL
+ * Firmware maintains a per-client journal of mport creations and deletions.
+ * This journal is clear-on-read, i.e. repeated calls of this command will
+ * drain the buffer. Whenever the caller resets its function via FLR or
+ * MC_CMD_ENTITY_RESET, the journal is regenerated from a blank start.
+ */
+#define MC_CMD_MAE_MPORT_READ_JOURNAL 0x147
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_MSGSET 0x147
+#undef MC_CMD_0x147_PRIVILEGE_CTG
+
+#define MC_CMD_0x147_PRIVILEGE_CTG SRIOV_CTG_MAE
+
+/* MC_CMD_MAE_MPORT_READ_JOURNAL_IN msgrequest */
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_IN_LEN 4
+/* Any unused flags are reserved and must be set to zero. */
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_IN_FLAGS_OFST 0
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_IN_FLAGS_LEN 4
+
+/* MC_CMD_MAE_MPORT_READ_JOURNAL_OUT msgresponse */
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_LENMIN 12
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_LENMAX 252
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_LENMAX_MCDI2 1020
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_LEN(num) (12+1*(num))
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_DATA_NUM(len) (((len)-12)/1)
+/* Any unused flags are reserved and must be ignored. */
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_FLAGS_OFST 0
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_FLAGS_LEN 4
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MORE_OFST 0
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MORE_LBN 0
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MORE_WIDTH 1
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_COUNT_OFST 4
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_COUNT_LEN 4
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_SIZEOF_MPORT_DESC_OFST 8
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_SIZEOF_MPORT_DESC_LEN 4
+/* Any array of MAE_MPORT_DESC structures. The MAE_MPORT_DESC structure may
+ * grow in future version of this command. Drivers should use a stride of
+ * SIZEOF_MPORT_DESC. Fields beyond SIZEOF_MPORT_DESC are not present.
+ */
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_DATA_OFST 12
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_DATA_LEN 1
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_DATA_MINNUM 0
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_DATA_MAXNUM 240
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_DATA_MAXNUM_MCDI2 1008
+
#endif /* _SIENA_MC_DRIVER_PCOL_H */
diff --git a/drivers/common/sfc_efx/base/efx_regs_mcdi_aoe.h b/drivers/common/sfc_efx/base/efx_regs_mcdi_aoe.h
index f7c89fabc..c45f678c2 100644
--- a/drivers/common/sfc_efx/base/efx_regs_mcdi_aoe.h
+++ b/drivers/common/sfc_efx/base/efx_regs_mcdi_aoe.h
@@ -6,7 +6,7 @@
/*
* This file is automatically generated. DO NOT EDIT IT.
- * To make changes, edit the .yml files in sfregistry under doc/mcdi/ and
+ * To make changes, edit the .yml files in smartnic_registry under doc/mcdi/ and
* rebuild this file with "make mcdi_headers_v5".
*/
@@ -20,6 +20,7 @@
* Perform an FC operation
*/
#define MC_CMD_FC 0x9
+#define MC_CMD_FC_MSGSET 0x9
/* MC_CMD_FC_IN msgrequest */
#define MC_CMD_FC_IN_LEN 4
@@ -212,7 +213,13 @@
#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_OFST 16
#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_LEN 8
#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_LO_OFST 16
+#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_LO_LEN 4
+#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_LO_LBN 128
+#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_LO_WIDTH 32
#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_HI_OFST 20
+#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_HI_LEN 4
+#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_HI_LBN 160
+#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_HI_WIDTH 32
#define MC_CMD_FC_IN_MAC_SET_LINK_REJECT_OFST 24
#define MC_CMD_FC_IN_MAC_SET_LINK_REJECT_LEN 4
#define MC_CMD_FC_IN_MAC_SET_LINK_REJECT_UNICAST_OFST 24
@@ -784,12 +791,24 @@
#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_OFST 12
#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_LEN 8
#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_LO_OFST 12
+#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_LO_LEN 4
+#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_LO_LBN 96
+#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_LO_WIDTH 32
#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_HI_OFST 16
+#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_HI_LEN 4
+#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_HI_LBN 128
+#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_HI_WIDTH 32
/* AOE address from which to transfer data */
#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_OFST 20
#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_LEN 8
#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_LO_OFST 20
+#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_LO_LEN 4
+#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_LO_LBN 160
+#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_LO_WIDTH 32
#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_HI_OFST 24
+#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_HI_LEN 4
+#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_HI_LBN 192
+#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_HI_WIDTH 32
/* Length of AOE transfer (total) */
#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_LENGTH_OFST 28
#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_LENGTH_LEN 4
@@ -916,7 +935,13 @@
#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_OFST 12
#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_LEN 8
#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_LO_OFST 12
+#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_LO_LEN 4
+#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_LO_LBN 96
+#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_LO_WIDTH 32
#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_HI_OFST 16
+#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_HI_LEN 4
+#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_HI_LBN 128
+#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_HI_WIDTH 32
#define MC_CMD_FC_IN_CLOCK_SET_TIME_NANOSECONDS_OFST 20
#define MC_CMD_FC_IN_CLOCK_SET_TIME_NANOSECONDS_LEN 4
@@ -1016,7 +1041,13 @@
#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_OFST 12
#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_LEN 8
#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_LO_OFST 12
+#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_LO_LEN 4
+#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_LO_LBN 96
+#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_LO_WIDTH 32
#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_HI_OFST 16
+#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_HI_LEN 4
+#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_HI_LBN 128
+#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_HI_WIDTH 32
/* Port number of PTP packet for which timestamp required */
#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_PORT_NUM_OFST 20
#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_PORT_NUM_LEN 4
@@ -1320,7 +1351,13 @@
#define MC_CMD_FC_OUT_GET_VERSION_VERSION_OFST 4
#define MC_CMD_FC_OUT_GET_VERSION_VERSION_LEN 8
#define MC_CMD_FC_OUT_GET_VERSION_VERSION_LO_OFST 4
+#define MC_CMD_FC_OUT_GET_VERSION_VERSION_LO_LEN 4
+#define MC_CMD_FC_OUT_GET_VERSION_VERSION_LO_LBN 32
+#define MC_CMD_FC_OUT_GET_VERSION_VERSION_LO_WIDTH 32
#define MC_CMD_FC_OUT_GET_VERSION_VERSION_HI_OFST 8
+#define MC_CMD_FC_OUT_GET_VERSION_VERSION_HI_LEN 4
+#define MC_CMD_FC_OUT_GET_VERSION_VERSION_HI_LBN 64
+#define MC_CMD_FC_OUT_GET_VERSION_VERSION_HI_WIDTH 32
/* MC_CMD_FC_OUT_TRC_RX_READ msgresponse */
#define MC_CMD_FC_OUT_TRC_RX_READ_LEN 8
@@ -1347,7 +1384,13 @@
#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_OFST 0
#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_LEN 8
#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_LO_OFST 0
+#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_LO_LEN 4
+#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_LO_LBN 0
+#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_LO_WIDTH 32
#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_HI_OFST 4
+#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_HI_LEN 4
+#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_HI_LBN 32
+#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_HI_WIDTH 32
#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_NUM MC_CMD_FC_MAC_RX_NSTATS
#define MC_CMD_FC_MAC_RX_STATS_OCTETS 0x0 /* enum */
#define MC_CMD_FC_MAC_RX_OCTETS_OK 0x1 /* enum */
@@ -1382,7 +1425,13 @@
#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_OFST 0
#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_LEN 8
#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_LO_OFST 0
+#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_LO_LEN 4
+#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_LO_LBN 0
+#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_LO_WIDTH 32
#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_HI_OFST 4
+#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_HI_LEN 4
+#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_HI_LBN 32
+#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_HI_WIDTH 32
#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_NUM MC_CMD_FC_MAC_TX_NSTATS
#define MC_CMD_FC_MAC_TX_STATS_OCTETS 0x0 /* enum */
#define MC_CMD_FC_MAC_TX_OCTETS_OK 0x1 /* enum */
@@ -1415,7 +1464,13 @@
#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_OFST 0
#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_LEN 8
#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_LO_OFST 0
+#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_LO_LEN 4
+#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_LO_LBN 0
+#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_LO_WIDTH 32
#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_HI_OFST 4
+#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_HI_LEN 4
+#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_HI_LBN 32
+#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_HI_WIDTH 32
#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_NUM MC_CMD_FC_MAC_NSTATS_PER_BLOCK
/* MC_CMD_FC_OUT_MAC msgresponse */
@@ -1636,7 +1691,13 @@
#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_OFST 16
#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_LEN 8
#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_LO_OFST 16
+#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_LO_LEN 4
+#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_LO_LBN 128
+#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_LO_WIDTH 32
#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_HI_OFST 20
+#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_HI_LEN 4
+#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_HI_LBN 160
+#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_HI_WIDTH 32
#define MC_CMD_FC_OUT_FPGA_BUILD_REVISION_LO_OFST 24
#define MC_CMD_FC_OUT_FPGA_BUILD_REVISION_LO_LEN 4
#define MC_CMD_FC_OUT_FPGA_BUILD_REVISION_HI_OFST 28
@@ -1976,12 +2037,24 @@
#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_OFST 8
#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_LEN 8
#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_LO_OFST 8
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_LO_LEN 4
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_LO_LBN 64
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_LO_WIDTH 32
#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_HI_OFST 12
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_HI_LEN 4
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_HI_LBN 96
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_HI_WIDTH 32
/* Length of address map */
#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_OFST 16
#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_LEN 8
#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_LO_OFST 16
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_LO_LEN 4
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_LO_LBN 128
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_LO_WIDTH 32
#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_HI_OFST 20
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_HI_LEN 4
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_HI_LBN 160
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_HI_WIDTH 32
/* Component information field */
#define MC_CMD_FC_OUT_READ_MAP_INDEX_COMP_INFO_OFST 24
#define MC_CMD_FC_OUT_READ_MAP_INDEX_COMP_INFO_LEN 4
@@ -1989,7 +2062,13 @@
#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_OFST 28
#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_LEN 8
#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_LO_OFST 28
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_LO_LEN 4
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_LO_LBN 224
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_LO_WIDTH 32
#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_HI_OFST 32
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_HI_LEN 4
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_HI_LBN 256
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_HI_WIDTH 32
/* Name of the component */
#define MC_CMD_FC_OUT_READ_MAP_INDEX_NAME_OFST 36
#define MC_CMD_FC_OUT_READ_MAP_INDEX_NAME_LEN 1
@@ -2132,7 +2211,13 @@
#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_OFST 12
#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_LEN 8
#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_LO_OFST 12
+#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_LO_LEN 4
+#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_LO_LBN 96
+#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_LO_WIDTH 32
#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_HI_OFST 16
+#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_HI_LEN 4
+#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_HI_LBN 128
+#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_HI_WIDTH 32
/* MC_CMD_FC_OUT_UHLINK_RX_EYE msgresponse */
#define MC_CMD_FC_OUT_UHLINK_RX_EYE_LEN ((((0-1+(32*MC_CMD_FC_UHLINK_RX_EYE_PER_BLOCK))+1))>>3)
@@ -2153,7 +2238,13 @@
#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_OFST 4
#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_LEN 8
#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_LO_OFST 4
+#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_LO_LEN 4
+#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_LO_LBN 32
+#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_LO_WIDTH 32
#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_HI_OFST 8
+#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_HI_LEN 4
+#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_HI_LBN 64
+#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_HI_WIDTH 32
#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_NUM MC_CMD_FC_UHLINK_RX_EYE_PLOT_ROWS_PER_BLOCK
/* MC_CMD_FC_OUT_UHLINK_RX_TUNE msgresponse */
@@ -2222,12 +2313,24 @@
#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_OFST 4
#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_LEN 8
#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_LO_OFST 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_LO_LEN 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_LO_LBN 32
+#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_LO_WIDTH 32
#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_HI_OFST 8
+#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_HI_LEN 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_HI_LBN 64
+#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_HI_WIDTH 32
/* AOE address from which to transfer data */
#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_OFST 12
#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_LEN 8
#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_LO_OFST 12
+#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_LO_LEN 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_LO_LBN 96
+#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_LO_WIDTH 32
#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_HI_OFST 16
+#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_HI_LEN 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_HI_LBN 128
+#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_HI_WIDTH 32
/* Length of AOE transfer (total) */
#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_LENGTH_OFST 20
#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_LENGTH_LEN 4
@@ -2243,12 +2346,24 @@
#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_OFST 36
#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_LEN 8
#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_LO_OFST 36
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_LO_LEN 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_LO_LBN 288
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_LO_WIDTH 32
#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_HI_OFST 40
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_HI_LEN 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_HI_LBN 320
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_HI_WIDTH 32
/* When active, end read time */
#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_OFST 44
#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_LEN 8
#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_LO_OFST 44
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_LO_LEN 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_LO_LBN 352
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_LO_WIDTH 32
#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_HI_OFST 48
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_HI_LEN 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_HI_LBN 384
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_HI_WIDTH 32
/* MC_CMD_FC_OUT_LOG_ADDR_RANGE msgresponse */
#define MC_CMD_FC_OUT_LOG_ADDR_RANGE_LEN 0
@@ -2263,7 +2378,13 @@
#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_OFST 4
#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_LEN 8
#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_LO_OFST 4
+#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_LO_LEN 4
+#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_LO_LBN 32
+#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_LO_WIDTH 32
#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_HI_OFST 8
+#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_HI_LEN 4
+#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_HI_LBN 64
+#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_HI_WIDTH 32
#define MC_CMD_FC_OUT_CLOCK_GET_TIME_NANOSECONDS_OFST 12
#define MC_CMD_FC_OUT_CLOCK_GET_TIME_NANOSECONDS_LEN 4
#define MC_CMD_FC_OUT_CLOCK_GET_TIME_RANGE_OFST 16
@@ -2311,7 +2432,13 @@
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_OFST 0
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_LEN 8
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_LO_OFST 0
+#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_LO_LEN 4
+#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_LO_LBN 0
+#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_LO_WIDTH 32
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_HI_OFST 4
+#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_HI_LEN 4
+#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_HI_LBN 32
+#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_HI_WIDTH 32
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_MINNUM 0
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_MAXNUM 31
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_MAXNUM_MCDI2 127
@@ -2391,6 +2518,7 @@
* AOE operations on MC
*/
#define MC_CMD_AOE 0xa
+#define MC_CMD_AOE_MSGSET 0xa
/* MC_CMD_AOE_IN msgrequest */
#define MC_CMD_AOE_IN_LEN 4
@@ -2580,7 +2708,13 @@
#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_OFST 8
#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_LEN 8
#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_LO_OFST 8
+#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_LO_LEN 4
+#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_LO_LBN 64
+#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_HI_OFST 12
+#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_HI_LEN 4
+#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_HI_LBN 96
+#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_AOE_IN_MAC_STATS_CMD_OFST 16
#define MC_CMD_AOE_IN_MAC_STATS_CMD_LEN 4
#define MC_CMD_AOE_IN_MAC_STATS_DMA_OFST 16
@@ -3024,7 +3158,13 @@
#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_OFST 0
#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_LEN 8
#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_LO_OFST 0
+#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_LO_LEN 4
+#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_LO_LBN 0
+#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_LO_WIDTH 32
#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_HI_OFST 4
+#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_HI_LEN 4
+#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_HI_LBN 32
+#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_HI_WIDTH 32
#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS
/* MC_CMD_AOE_OUT_GET_PHY_MEDIA_INFO msgresponse */
diff --git a/drivers/common/sfc_efx/base/efx_regs_mcdi_strs.h b/drivers/common/sfc_efx/base/efx_regs_mcdi_strs.h
index be570bc0a..e8fbb6f94 100644
--- a/drivers/common/sfc_efx/base/efx_regs_mcdi_strs.h
+++ b/drivers/common/sfc_efx/base/efx_regs_mcdi_strs.h
@@ -6,7 +6,7 @@
/*
* This file is automatically generated. DO NOT EDIT IT.
- * To make changes, edit the .yml files in sfregistry under doc/mcdi/ and
+ * To make changes, edit the .yml files in smartnic_registry under doc/mcdi/ and
* rebuild this file with "make mcdi_headers_v5".
*
* The version of this file has MCDI strings really used in the libefx.
--
2.20.1
^ permalink raw reply [relevance 1%]
* Re: [dpdk-dev] Use WFE for spinlock and ring
2021-04-28 7:42 0% ` David Marchand
@ 2021-04-28 9:30 0% ` Ruifeng Wang
2021-04-28 11:13 0% ` Thomas Monjalon
0 siblings, 1 reply; 200+ results
From: Ruifeng Wang @ 2021-04-28 9:30 UTC (permalink / raw)
To: David Marchand; +Cc: dev, thomas, jerinj, nd, Honnappa Nagarahalli, nd
> -----Original Message-----
> From: David Marchand <david.marchand@redhat.com>
> Sent: Wednesday, April 28, 2021 3:42 PM
> To: Ruifeng Wang <Ruifeng.Wang@arm.com>
> Cc: dev <dev@dpdk.org>; thomas@monjalon.net; jerinj@marvell.com; nd
> <nd@arm.com>; Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com>
> Subject: Re: Use WFE for spinlock and ring
>
> Hello Ruifeng,
Hello David,
>
> On Sun, Apr 25, 2021 at 7:57 AM Ruifeng Wang <ruifeng.wang@arm.com>
> wrote:
> >
> > The rte_wait_until_equal_xxx APIs abstract the functionality of
> > 'polling for a memory location to become equal to a given value'[1].
> >
> > Use the API for the rte spinlock and ring implementations.
> > With the wait until equal APIs being stable, changes will not impact ABI.
>
> Afaics, there is no ARM target with WFE enabled and we lost ability to enable
> WFE support with removal of the make build system.
WFE can be enabled with direct meson file change.
WFE is not intended to be enabled by default. It can be enabled based on benchmarking
result on hardware.
>
> $ git grep RTE_ARM_USE_WFE
> config/arm/meson.build: ['RTE_ARM_USE_WFE', false],
> lib/eal/arm/include/rte_pause_64.h:#ifdef RTE_ARM_USE_WFE
>
> How did you enable WFE to test this series?
I modified meson file to test.
Tests were also done with WFE disabled to make sure no degradation with generic implementation.
>
>
> --
> David Marchand
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] Use WFE for spinlock and ring
2021-04-25 5:56 3% ` [dpdk-dev] " Ruifeng Wang
@ 2021-04-28 7:42 0% ` David Marchand
2021-04-28 9:30 0% ` Ruifeng Wang
0 siblings, 1 reply; 200+ results
From: David Marchand @ 2021-04-28 7:42 UTC (permalink / raw)
To: Ruifeng Wang
Cc: dev, Thomas Monjalon, Jerin Jacob Kollanukkaran, nd,
Honnappa Nagarahalli
Hello Ruifeng,
On Sun, Apr 25, 2021 at 7:57 AM Ruifeng Wang <ruifeng.wang@arm.com> wrote:
>
> The rte_wait_until_equal_xxx APIs abstract the functionality of 'polling
> for a memory location to become equal to a given value'[1].
>
> Use the API for the rte spinlock and ring implementations.
> With the wait until equal APIs being stable, changes will not impact ABI.
Afaics, there is no ARM target with WFE enabled and we lost ability to
enable WFE support with removal of the make build system.
$ git grep RTE_ARM_USE_WFE
config/arm/meson.build: ['RTE_ARM_USE_WFE', false],
lib/eal/arm/include/rte_pause_64.h:#ifdef RTE_ARM_USE_WFE
How did you enable WFE to test this series?
--
David Marchand
^ permalink raw reply [relevance 0%]
* [dpdk-dev] [dpdk-techboard] Minutes of Technical Board Meeting, 2021-04-21
@ 2021-04-27 15:07 3% Ananyev, Konstantin
0 siblings, 0 replies; 200+ results
From: Ananyev, Konstantin @ 2021-04-27 15:07 UTC (permalink / raw)
To: dev; +Cc: DPDK Techboard
Minutes of Technical Board Meeting, 2021-04-21
Members Attending
---------------------------
-Aaron
-Bruce
-Ferruh
-Hemant
-Honnappa
-Jerin
-Kevin
-Konstantin (chair)
-Maxime
-Olivier
-Stephen
-Thomas
NOTE: The technical board meetings every second Wednesday at
https://meet.jit.si/DPDK at 3 pm UTC.
Meetings are public, and DPDK community members are welcome to attend.
NOTE: Next meeting will be on Wednesday 2021-04-21 @3pm UTC, and will be
chaired by Kevin.
1) eventdev DLB2 -> DLB driver rename
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
* it could be considered as API/ABI breakage, so should happen at LTS release timeframe (21.11)
* Renaming it back to DLB is possible, but might create a confusion,
when 20.11 LTS and 21.11 LTS will have two different drivers with the same name (dlb).
* Proposal to consider to use new name (idlb) for renaming in 21.11.
2) build: use platform option 'generic' as default one
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
* Current default option is 'native'.
* To go ahead with such noticeable change need to collect feedback from the community first.
* Techboard preference is to keep 'native' as a default choice.
3) Tech Board Membership Policy
~~~~~~~~~~~~~~~~~~~~~~~~~~~~
* Agreed that it needs to be clearly defined and better documented.
* Start with codifying current status (AR to Hemant).
* Review existing policies for other open-source projects and come-up
with some suitable proposal for DPDK (AR to Stephen and other members).
4) Linux Foundation interaction
~~~~~~~~~~~~~~~~~~~~~~~~~~
Discussion on current situation and what can be improved in future.
5) DPDK Userspace 2021
~~~~~~~~~~~~~~~~~~~~
Discussed initial thoughts about DPDK Userspace 2021 event.
Techboard opinion:
In current situation it seems premature to consider F2F event for 2021.
Probably safer to plan it as virtual for 2021 and consider F2F one for 2022.
6) Other opens
~~~~~~~~~~~~~
* More reviews for 21.05 are welcome (as usual)
* examples/l3fwd - looking for maintainer.
^ permalink raw reply [relevance 3%]
* [dpdk-dev] [PATCH v2 12/12] raw/ioat: report status of completed jobs
@ 2021-04-26 9:52 1% ` Bruce Richardson
0 siblings, 0 replies; 200+ results
From: Bruce Richardson @ 2021-04-26 9:52 UTC (permalink / raw)
To: dev; +Cc: kevin.laatz, jiayu.hu, Bruce Richardson
Add improved error handling to rte_ioat_completed_ops(). This patch adds
new parameters to the function to enable the user to track the completion
status of each individual operation in a batch. With this addition, the
function can help the user to determine firstly, how many operations may
have failed or been skipped and then secondly, which specific operations
did not complete successfully.
Signed-off-by: Kevin Laatz <kevin.laatz@intel.com>
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
---
doc/guides/rel_notes/release_21_05.rst | 5 +
drivers/raw/ioat/ioat_common.c | 9 +
drivers/raw/ioat/ioat_rawdev_test.c | 300 +++++++++++++++++++++++--
drivers/raw/ioat/rte_idxd_rawdev_fns.h | 146 ++++++++----
drivers/raw/ioat/rte_ioat_rawdev.h | 53 ++++-
drivers/raw/ioat/rte_ioat_rawdev_fns.h | 15 +-
examples/ioat/ioatfwd.c | 14 +-
examples/vhost/ioat.c | 2 +-
8 files changed, 464 insertions(+), 80 deletions(-)
diff --git a/doc/guides/rel_notes/release_21_05.rst b/doc/guides/rel_notes/release_21_05.rst
index b3224dc332..7f29f5789f 100644
--- a/doc/guides/rel_notes/release_21_05.rst
+++ b/doc/guides/rel_notes/release_21_05.rst
@@ -329,6 +329,11 @@ API Changes
``policer_action_recolor_supported`` and ``policer_action_drop_supported``
have been removed.
+* raw/ioat: The experimental function ``rte_ioat_completed_ops()`` now
+ supports two additional parameters, ``status`` and ``num_unsuccessful``,
+ to allow the reporting of errors from hardware when performing copy
+ operations.
+
ABI Changes
-----------
diff --git a/drivers/raw/ioat/ioat_common.c b/drivers/raw/ioat/ioat_common.c
index fcb30572e6..d01c1ee367 100644
--- a/drivers/raw/ioat/ioat_common.c
+++ b/drivers/raw/ioat/ioat_common.c
@@ -162,6 +162,15 @@ idxd_dev_configure(const struct rte_rawdev *dev,
rte_idxd->desc_ring = NULL;
return -ENOMEM;
}
+ rte_idxd->hdl_ring_flags = rte_zmalloc(NULL,
+ sizeof(*rte_idxd->hdl_ring_flags) * max_desc, 0);
+ if (rte_idxd->hdl_ring_flags == NULL) {
+ rte_free(rte_idxd->desc_ring);
+ rte_free(rte_idxd->hdl_ring);
+ rte_idxd->desc_ring = NULL;
+ rte_idxd->hdl_ring = NULL;
+ return -ENOMEM;
+ }
rte_idxd->hdls_read = rte_idxd->batch_start = 0;
rte_idxd->batch_size = 0;
diff --git a/drivers/raw/ioat/ioat_rawdev_test.c b/drivers/raw/ioat/ioat_rawdev_test.c
index 5f75c6ff69..d987b560d2 100644
--- a/drivers/raw/ioat/ioat_rawdev_test.c
+++ b/drivers/raw/ioat/ioat_rawdev_test.c
@@ -73,13 +73,15 @@ do_multi_copies(int dev_id, int split_batches, int split_completions)
if (split_completions) {
/* gather completions in two halves */
uint16_t half_len = RTE_DIM(srcs) / 2;
- if (rte_ioat_completed_ops(dev_id, half_len, (void *)completed_src,
+ if (rte_ioat_completed_ops(dev_id, half_len, NULL, NULL,
+ (void *)completed_src,
(void *)completed_dst) != half_len) {
PRINT_ERR("Error with rte_ioat_completed_ops - first half request\n");
rte_rawdev_dump(dev_id, stdout);
return -1;
}
- if (rte_ioat_completed_ops(dev_id, half_len, (void *)&completed_src[half_len],
+ if (rte_ioat_completed_ops(dev_id, half_len, NULL, NULL,
+ (void *)&completed_src[half_len],
(void *)&completed_dst[half_len]) != half_len) {
PRINT_ERR("Error with rte_ioat_completed_ops - second half request\n");
rte_rawdev_dump(dev_id, stdout);
@@ -87,7 +89,8 @@ do_multi_copies(int dev_id, int split_batches, int split_completions)
}
} else {
/* gather all completions in one go */
- if (rte_ioat_completed_ops(dev_id, 64, (void *)completed_src,
+ if (rte_ioat_completed_ops(dev_id, RTE_DIM(completed_src), NULL, NULL,
+ (void *)completed_src,
(void *)completed_dst) != RTE_DIM(srcs)) {
PRINT_ERR("Error with rte_ioat_completed_ops\n");
rte_rawdev_dump(dev_id, stdout);
@@ -151,7 +154,7 @@ test_enqueue_copies(int dev_id)
rte_ioat_perform_ops(dev_id);
usleep(10);
- if (rte_ioat_completed_ops(dev_id, 1, (void *)&completed[0],
+ if (rte_ioat_completed_ops(dev_id, 1, NULL, NULL, (void *)&completed[0],
(void *)&completed[1]) != 1) {
PRINT_ERR("Error with rte_ioat_completed_ops\n");
return -1;
@@ -170,6 +173,13 @@ test_enqueue_copies(int dev_id)
}
rte_pktmbuf_free(src);
rte_pktmbuf_free(dst);
+
+ /* check ring is now empty */
+ if (rte_ioat_completed_ops(dev_id, 1, NULL, NULL, (void *)&completed[0],
+ (void *)&completed[1]) != 0) {
+ PRINT_ERR("Error: got unexpected returned handles from rte_ioat_completed_ops\n");
+ return -1;
+ }
} while (0);
/* test doing a multiple single copies */
@@ -203,7 +213,8 @@ test_enqueue_copies(int dev_id)
}
usleep(10);
- if (rte_ioat_completed_ops(dev_id, max_completions, (void *)&completed[0],
+ if (rte_ioat_completed_ops(dev_id, max_completions, NULL, NULL,
+ (void *)&completed[0],
(void *)&completed[max_completions]) != max_ops) {
PRINT_ERR("Error with rte_ioat_completed_ops\n");
rte_rawdev_dump(dev_id, stdout);
@@ -256,7 +267,7 @@ test_enqueue_fill(int dev_id)
rte_ioat_perform_ops(dev_id);
usleep(100);
- if (rte_ioat_completed_ops(dev_id, 1, (void *)&completed[0],
+ if (rte_ioat_completed_ops(dev_id, 1, NULL, NULL, (void *)&completed[0],
(void *)&completed[1]) != 1) {
PRINT_ERR("Error with completed ops\n");
return -1;
@@ -266,8 +277,7 @@ test_enqueue_fill(int dev_id)
char pat_byte = ((char *)&pattern)[j % 8];
if (dst_data[j] != pat_byte) {
PRINT_ERR("Error with fill operation (lengths = %u): got (%x), not (%x)\n",
- lengths[i], dst_data[j],
- pat_byte);
+ lengths[i], dst_data[j], pat_byte);
return -1;
}
}
@@ -307,12 +317,16 @@ test_burst_capacity(int dev_id)
unsigned int i;
unsigned int length = 1024;
uintptr_t completions[BURST_SIZE];
+ /* for CBDMA, no batch descriptor, for DSA there is one */
+ unsigned int batch_desc = (*(enum rte_ioat_dev_type *)
+ rte_rawdevs[dev_id].dev_private == RTE_IDXD_DEV);
+ unsigned int desc_per_burst = BURST_SIZE + batch_desc;
/* Ring pointer reset needed for checking test results */
reset_ring_ptrs(dev_id);
const unsigned int ring_space = rte_ioat_burst_capacity(dev_id);
- const unsigned int expected_bursts = (ring_space)/BURST_SIZE;
+ const unsigned int expected_bursts = (ring_space)/(desc_per_burst);
src = rte_pktmbuf_alloc(pool);
dst = rte_pktmbuf_alloc(pool);
@@ -327,8 +341,7 @@ test_burst_capacity(int dev_id)
}
}
bursts_enqueued++;
- if ((i & 1) == 1) /* hit doorbell every second burst */
- rte_ioat_perform_ops(dev_id);
+ rte_ioat_perform_ops(dev_id);
}
rte_ioat_perform_ops(dev_id);
@@ -340,9 +353,9 @@ test_burst_capacity(int dev_id)
}
/* check the space is now as expected */
- if (rte_ioat_burst_capacity(dev_id) != ring_space - bursts_enqueued * BURST_SIZE) {
- printf("Capacity error. Expected %u free slots, got %u\n",
- ring_space - bursts_enqueued * BURST_SIZE,
+ if (rte_ioat_burst_capacity(dev_id) != ring_space - bursts_enqueued * desc_per_burst) {
+ PRINT_ERR("Capacity error. Expected %u free slots, got %u\n",
+ ring_space - bursts_enqueued * desc_per_burst,
rte_ioat_burst_capacity(dev_id));
return -1;
}
@@ -350,8 +363,8 @@ test_burst_capacity(int dev_id)
/* do cleanup before next tests */
usleep(100);
for (i = 0; i < bursts_enqueued; i++) {
- if (rte_ioat_completed_ops(dev_id, BURST_SIZE, completions,
- completions) != BURST_SIZE) {
+ if (rte_ioat_completed_ops(dev_id, BURST_SIZE, NULL, NULL,
+ completions, completions) != BURST_SIZE) {
PRINT_ERR("error with completions\n");
return -1;
}
@@ -364,7 +377,8 @@ test_burst_capacity(int dev_id)
/* Verify the descriptor ring is empty before we test */
if (rte_ioat_burst_capacity(dev_id) != ring_space) {
- PRINT_ERR("Error, ring should be empty\n");
+ PRINT_ERR("Error, ring should be empty. Expected %u, got %u\n",
+ ring_space, rte_ioat_burst_capacity(dev_id));
return -1;
}
@@ -386,20 +400,23 @@ test_burst_capacity(int dev_id)
/* This check will confirm both that the correct amount of space is taken
* the ring, and that the ring wrap around handling is correct.
*/
- if (rte_ioat_burst_capacity(dev_id) != ring_space - BURST_SIZE) {
- PRINT_ERR("Error, space available not as expected\n");
+ if (rte_ioat_burst_capacity(dev_id) != ring_space - desc_per_burst) {
+ PRINT_ERR("Error, space available not as expected. Expected %u, got %u\n",
+ ring_space - desc_per_burst, rte_ioat_burst_capacity(dev_id));
return -1;
}
/* Now we gather completions to update the read pointer */
- if (rte_ioat_completed_ops(dev_id, BURST_SIZE, completions, completions) != BURST_SIZE) {
+ if (rte_ioat_completed_ops(dev_id, BURST_SIZE, NULL, NULL,
+ completions, completions) != BURST_SIZE) {
PRINT_ERR("Error with completions\n");
return -1;
}
/* After gathering the completions, the descriptor ring should be empty */
if (rte_ioat_burst_capacity(dev_id) != ring_space) {
- PRINT_ERR("Error, space available not as expected\n");
+ PRINT_ERR("Error, space available not as expected, Expected %u, got %u\n",
+ ring_space, rte_ioat_burst_capacity(dev_id));
return -1;
}
@@ -409,6 +426,241 @@ test_burst_capacity(int dev_id)
return 0;
}
+static int
+test_completion_status(int dev_id)
+{
+#define COMP_BURST_SZ 16
+ const unsigned int fail_copy[] = {0, 7, 15};
+ struct rte_mbuf *srcs[COMP_BURST_SZ], *dsts[COMP_BURST_SZ];
+ struct rte_mbuf *completed_src[COMP_BURST_SZ * 2];
+ struct rte_mbuf *completed_dst[COMP_BURST_SZ * 2];
+ unsigned int length = 1024;
+ unsigned int i;
+ uint8_t not_ok = 0;
+
+ /* Test single full batch statuses */
+ for (i = 0; i < RTE_DIM(fail_copy); i++) {
+ uint32_t status[COMP_BURST_SZ] = {0};
+ unsigned int j;
+
+ for (j = 0; j < COMP_BURST_SZ; j++) {
+ srcs[j] = rte_pktmbuf_alloc(pool);
+ dsts[j] = rte_pktmbuf_alloc(pool);
+
+ if (rte_ioat_enqueue_copy(dev_id,
+ (j == fail_copy[i] ? (phys_addr_t)NULL :
+ (srcs[j]->buf_iova + srcs[j]->data_off)),
+ dsts[j]->buf_iova + dsts[j]->data_off,
+ length,
+ (uintptr_t)srcs[j],
+ (uintptr_t)dsts[j]) != 1) {
+ PRINT_ERR("Error with rte_ioat_enqueue_copy for buffer %u\n", j);
+ return -1;
+ }
+ }
+ rte_ioat_perform_ops(dev_id);
+ usleep(100);
+
+ if (rte_ioat_completed_ops(dev_id, COMP_BURST_SZ, status, ¬_ok,
+ (void *)completed_src, (void *)completed_dst) != COMP_BURST_SZ) {
+ PRINT_ERR("Error with rte_ioat_completed_ops\n");
+ rte_rawdev_dump(dev_id, stdout);
+ return -1;
+ }
+ if (not_ok != 1 || status[fail_copy[i]] == RTE_IOAT_OP_SUCCESS) {
+ unsigned int j;
+ PRINT_ERR("Error, missing expected failed copy, %u\n", fail_copy[i]);
+ for (j = 0; j < COMP_BURST_SZ; j++)
+ printf("%u ", status[j]);
+ printf("<-- Statuses\n");
+ return -1;
+ }
+ for (j = 0; j < COMP_BURST_SZ; j++) {
+ rte_pktmbuf_free(completed_src[j]);
+ rte_pktmbuf_free(completed_dst[j]);
+ }
+ }
+
+ /* Test gathering status for two batches at once */
+ for (i = 0; i < RTE_DIM(fail_copy); i++) {
+ uint32_t status[COMP_BURST_SZ] = {0};
+ unsigned int batch, j;
+ unsigned int expected_failures = 0;
+
+ for (batch = 0; batch < 2; batch++) {
+ for (j = 0; j < COMP_BURST_SZ/2; j++) {
+ srcs[j] = rte_pktmbuf_alloc(pool);
+ dsts[j] = rte_pktmbuf_alloc(pool);
+
+ if (j == fail_copy[i])
+ expected_failures++;
+ if (rte_ioat_enqueue_copy(dev_id,
+ (j == fail_copy[i] ? (phys_addr_t)NULL :
+ (srcs[j]->buf_iova + srcs[j]->data_off)),
+ dsts[j]->buf_iova + dsts[j]->data_off,
+ length,
+ (uintptr_t)srcs[j],
+ (uintptr_t)dsts[j]) != 1) {
+ PRINT_ERR("Error with rte_ioat_enqueue_copy for buffer %u\n",
+ j);
+ return -1;
+ }
+ }
+ rte_ioat_perform_ops(dev_id);
+ }
+ usleep(100);
+
+ if (rte_ioat_completed_ops(dev_id, COMP_BURST_SZ, status, ¬_ok,
+ (void *)completed_src, (void *)completed_dst) != COMP_BURST_SZ) {
+ PRINT_ERR("Error with rte_ioat_completed_ops\n");
+ rte_rawdev_dump(dev_id, stdout);
+ return -1;
+ }
+ if (not_ok != expected_failures) {
+ unsigned int j;
+ PRINT_ERR("Error, missing expected failed copy, got %u, not %u\n",
+ not_ok, expected_failures);
+ for (j = 0; j < COMP_BURST_SZ; j++)
+ printf("%u ", status[j]);
+ printf("<-- Statuses\n");
+ return -1;
+ }
+ for (j = 0; j < COMP_BURST_SZ; j++) {
+ rte_pktmbuf_free(completed_src[j]);
+ rte_pktmbuf_free(completed_dst[j]);
+ }
+ }
+
+ /* Test gathering status for half batch at a time */
+ for (i = 0; i < RTE_DIM(fail_copy); i++) {
+ uint32_t status[COMP_BURST_SZ] = {0};
+ unsigned int j;
+
+ for (j = 0; j < COMP_BURST_SZ; j++) {
+ srcs[j] = rte_pktmbuf_alloc(pool);
+ dsts[j] = rte_pktmbuf_alloc(pool);
+
+ if (rte_ioat_enqueue_copy(dev_id,
+ (j == fail_copy[i] ? (phys_addr_t)NULL :
+ (srcs[j]->buf_iova + srcs[j]->data_off)),
+ dsts[j]->buf_iova + dsts[j]->data_off,
+ length,
+ (uintptr_t)srcs[j],
+ (uintptr_t)dsts[j]) != 1) {
+ PRINT_ERR("Error with rte_ioat_enqueue_copy for buffer %u\n", j);
+ return -1;
+ }
+ }
+ rte_ioat_perform_ops(dev_id);
+ usleep(100);
+
+ if (rte_ioat_completed_ops(dev_id, COMP_BURST_SZ / 2, status, ¬_ok,
+ (void *)completed_src,
+ (void *)completed_dst) != (COMP_BURST_SZ / 2)) {
+ PRINT_ERR("Error with rte_ioat_completed_ops\n");
+ rte_rawdev_dump(dev_id, stdout);
+ return -1;
+ }
+ if (fail_copy[i] < COMP_BURST_SZ / 2 &&
+ (not_ok != 1 || status[fail_copy[i]] == RTE_IOAT_OP_SUCCESS)) {
+ PRINT_ERR("Missing expected failure in first half-batch\n");
+ rte_rawdev_dump(dev_id, stdout);
+ return -1;
+ }
+ if (rte_ioat_completed_ops(dev_id, COMP_BURST_SZ / 2, status, ¬_ok,
+ (void *)&completed_src[COMP_BURST_SZ / 2],
+ (void *)&completed_dst[COMP_BURST_SZ / 2]) != (COMP_BURST_SZ / 2)) {
+ PRINT_ERR("Error with rte_ioat_completed_ops\n");
+ rte_rawdev_dump(dev_id, stdout);
+ return -1;
+ }
+ if (fail_copy[i] >= COMP_BURST_SZ / 2 && (not_ok != 1 ||
+ status[fail_copy[i] - (COMP_BURST_SZ / 2)]
+ == RTE_IOAT_OP_SUCCESS)) {
+ PRINT_ERR("Missing expected failure in second half-batch\n");
+ rte_rawdev_dump(dev_id, stdout);
+ return -1;
+ }
+
+ for (j = 0; j < COMP_BURST_SZ; j++) {
+ rte_pktmbuf_free(completed_src[j]);
+ rte_pktmbuf_free(completed_dst[j]);
+ }
+ }
+
+ /* Test gathering statuses with fence */
+ for (i = 1; i < RTE_DIM(fail_copy); i++) {
+ uint32_t status[COMP_BURST_SZ * 2] = {0};
+ unsigned int j;
+ uint16_t count;
+
+ for (j = 0; j < COMP_BURST_SZ; j++) {
+ srcs[j] = rte_pktmbuf_alloc(pool);
+ dsts[j] = rte_pktmbuf_alloc(pool);
+
+ /* always fail the first copy */
+ if (rte_ioat_enqueue_copy(dev_id,
+ (j == 0 ? (phys_addr_t)NULL :
+ (srcs[j]->buf_iova + srcs[j]->data_off)),
+ dsts[j]->buf_iova + dsts[j]->data_off,
+ length,
+ (uintptr_t)srcs[j],
+ (uintptr_t)dsts[j]) != 1) {
+ PRINT_ERR("Error with rte_ioat_enqueue_copy for buffer %u\n", j);
+ return -1;
+ }
+ /* put in a fence which will stop any further transactions
+ * because we had a previous failure.
+ */
+ if (j == fail_copy[i])
+ rte_ioat_fence(dev_id);
+ }
+ rte_ioat_perform_ops(dev_id);
+ usleep(100);
+
+ count = rte_ioat_completed_ops(dev_id, COMP_BURST_SZ * 2, status, ¬_ok,
+ (void *)completed_src, (void *)completed_dst);
+ if (count != COMP_BURST_SZ) {
+ PRINT_ERR("Error with rte_ioat_completed_ops, got %u not %u\n",
+ count, COMP_BURST_SZ);
+ for (j = 0; j < count; j++)
+ printf("%u ", status[j]);
+ printf("<-- Statuses\n");
+ return -1;
+ }
+ if (not_ok != COMP_BURST_SZ - fail_copy[i]) {
+ PRINT_ERR("Unexpected failed copy count, got %u, expected %u\n",
+ not_ok, COMP_BURST_SZ - fail_copy[i]);
+ for (j = 0; j < COMP_BURST_SZ; j++)
+ printf("%u ", status[j]);
+ printf("<-- Statuses\n");
+ return -1;
+ }
+ if (status[0] == RTE_IOAT_OP_SUCCESS || status[0] == RTE_IOAT_OP_SKIPPED) {
+ PRINT_ERR("Error, op 0 unexpectedly did not fail.\n");
+ return -1;
+ }
+ for (j = 1; j <= fail_copy[i]; j++) {
+ if (status[j] != RTE_IOAT_OP_SUCCESS) {
+ PRINT_ERR("Error, op %u unexpectedly failed\n", j);
+ return -1;
+ }
+ }
+ for (j = fail_copy[i] + 1; j < COMP_BURST_SZ; j++) {
+ if (status[j] != RTE_IOAT_OP_SKIPPED) {
+ PRINT_ERR("Error, all descriptors after fence should be invalid\n");
+ return -1;
+ }
+ }
+ for (j = 0; j < COMP_BURST_SZ; j++) {
+ rte_pktmbuf_free(completed_src[j]);
+ rte_pktmbuf_free(completed_dst[j]);
+ }
+ }
+
+ return 0;
+}
+
int
ioat_rawdev_test(uint16_t dev_id)
{
@@ -521,6 +773,12 @@ ioat_rawdev_test(uint16_t dev_id)
if (test_burst_capacity(dev_id) != 0)
goto err;
+ if (rte_eal_iova_mode() == RTE_IOVA_VA) {
+ printf("Running Completions Status Test\n");
+ if (test_completion_status(dev_id) != 0)
+ goto err;
+ }
+
rte_rawdev_stop(dev_id);
if (rte_rawdev_xstats_reset(dev_id, NULL, 0) != 0) {
PRINT_ERR("Error resetting xstat values\n");
diff --git a/drivers/raw/ioat/rte_idxd_rawdev_fns.h b/drivers/raw/ioat/rte_idxd_rawdev_fns.h
index 41f0ad6e99..dc16917b63 100644
--- a/drivers/raw/ioat/rte_idxd_rawdev_fns.h
+++ b/drivers/raw/ioat/rte_idxd_rawdev_fns.h
@@ -104,8 +104,17 @@ struct rte_idxd_rawdev {
struct rte_idxd_hw_desc *desc_ring;
struct rte_idxd_user_hdl *hdl_ring;
+ /* flags to indicate handle validity. Kept separate from ring, to avoid
+ * using 8 bytes per flag. Upper 8 bits holds error code if any.
+ */
+ uint16_t *hdl_ring_flags;
};
+#define RTE_IDXD_HDL_NORMAL 0
+#define RTE_IDXD_HDL_INVALID (1 << 0) /* no handle stored for this element */
+#define RTE_IDXD_HDL_OP_FAILED (1 << 1) /* return failure for this one */
+#define RTE_IDXD_HDL_OP_SKIPPED (1 << 2) /* this op was skipped */
+
static __rte_always_inline uint16_t
__idxd_burst_capacity(int dev_id)
{
@@ -124,8 +133,10 @@ __idxd_burst_capacity(int dev_id)
write_idx += idxd->desc_ring_mask + 1;
used_space = write_idx - idxd->hdls_read;
- /* Return amount of free space in the descriptor ring */
- return idxd->desc_ring_mask - used_space;
+ /* Return amount of free space in the descriptor ring
+ * subtract 1 for space for batch descriptor and 1 for possible null desc
+ */
+ return idxd->desc_ring_mask - used_space - 2;
}
static __rte_always_inline rte_iova_t
@@ -150,7 +161,8 @@ __idxd_write_desc(int dev_id,
if ((idxd->batch_idx_read == 0 && idxd->batch_idx_write == idxd->max_batches) ||
idxd->batch_idx_write + 1 == idxd->batch_idx_read)
goto failed;
- if (((write_idx + 1) & idxd->desc_ring_mask) == idxd->hdls_read)
+ /* for descriptor ring, we always need a slot for batch completion */
+ if (((write_idx + 2) & idxd->desc_ring_mask) == idxd->hdls_read)
goto failed;
/* write desc and handle. Note, descriptors don't wrap */
@@ -161,7 +173,10 @@ __idxd_write_desc(int dev_id,
idxd->desc_ring[write_idx].dst = dst;
idxd->desc_ring[write_idx].size = size;
- idxd->hdl_ring[write_idx & idxd->desc_ring_mask] = *hdl;
+ if (hdl == NULL)
+ idxd->hdl_ring_flags[write_idx & idxd->desc_ring_mask] = RTE_IDXD_HDL_INVALID;
+ else
+ idxd->hdl_ring[write_idx & idxd->desc_ring_mask] = *hdl;
idxd->batch_size++;
idxd->xstats.enqueued++;
@@ -203,9 +218,8 @@ __idxd_enqueue_copy(int dev_id, rte_iova_t src, rte_iova_t dst,
static __rte_always_inline int
__idxd_fence(int dev_id)
{
- static const struct rte_idxd_user_hdl null_hdl;
/* only op field needs filling - zero src, dst and length */
- return __idxd_write_desc(dev_id, IDXD_FLAG_FENCE, 0, 0, 0, &null_hdl);
+ return __idxd_write_desc(dev_id, IDXD_FLAG_FENCE, 0, 0, 0, NULL);
}
static __rte_always_inline void
@@ -222,42 +236,37 @@ __idxd_perform_ops(int dev_id)
{
struct rte_idxd_rawdev *idxd =
(struct rte_idxd_rawdev *)rte_rawdevs[dev_id].dev_private;
- /* write completion to last desc in the batch */
- uint16_t comp_idx = idxd->batch_start + idxd->batch_size - 1;
- if (comp_idx > idxd->desc_ring_mask) {
- comp_idx &= idxd->desc_ring_mask;
- *((uint64_t *)&idxd->desc_ring[comp_idx]) = 0; /* zero start of desc */
- }
+
+ if (!idxd->cfg.no_prefetch_completions)
+ rte_prefetch1(&idxd->desc_ring[idxd->batch_idx_ring[idxd->batch_idx_read]]);
if (idxd->batch_size == 0)
return 0;
- _mm_sfence(); /* fence before writing desc to device */
- if (idxd->batch_size > 1) {
- struct rte_idxd_hw_desc batch_desc = {
- .op_flags = (idxd_op_batch << IDXD_CMD_OP_SHIFT) |
- IDXD_FLAG_COMPLETION_ADDR_VALID |
- IDXD_FLAG_REQUEST_COMPLETION,
- .desc_addr = __desc_idx_to_iova(idxd, idxd->batch_start),
- .completion = __desc_idx_to_iova(idxd, comp_idx),
- .size = idxd->batch_size,
- };
-
- __idxd_movdir64b(idxd->portal, &batch_desc);
- } else {
- /* special case batch size of 1, as not allowed by HW */
- /* comp_idx == batch_start */
- struct rte_idxd_hw_desc *desc = &idxd->desc_ring[comp_idx];
- desc->op_flags |= IDXD_FLAG_COMPLETION_ADDR_VALID |
- IDXD_FLAG_REQUEST_COMPLETION;
- desc->completion = __desc_idx_to_iova(idxd, comp_idx);
-
- __idxd_movdir64b(idxd->portal, desc);
- }
+ if (idxd->batch_size == 1)
+ /* use a fence as a null descriptor, so batch_size >= 2 */
+ if (__idxd_fence(dev_id) != 1)
+ return -1;
+
+ /* write completion beyond last desc in the batch */
+ uint16_t comp_idx = (idxd->batch_start + idxd->batch_size) & idxd->desc_ring_mask;
+ *((uint64_t *)&idxd->desc_ring[comp_idx]) = 0; /* zero start of desc */
+ idxd->hdl_ring_flags[comp_idx] = RTE_IDXD_HDL_INVALID;
+
+ const struct rte_idxd_hw_desc batch_desc = {
+ .op_flags = (idxd_op_batch << IDXD_CMD_OP_SHIFT) |
+ IDXD_FLAG_COMPLETION_ADDR_VALID |
+ IDXD_FLAG_REQUEST_COMPLETION,
+ .desc_addr = __desc_idx_to_iova(idxd, idxd->batch_start),
+ .completion = __desc_idx_to_iova(idxd, comp_idx),
+ .size = idxd->batch_size,
+ };
+ _mm_sfence(); /* fence before writing desc to device */
+ __idxd_movdir64b(idxd->portal, &batch_desc);
idxd->xstats.started += idxd->batch_size;
- idxd->batch_start += idxd->batch_size;
+ idxd->batch_start += idxd->batch_size + 1;
idxd->batch_start &= idxd->desc_ring_mask;
idxd->batch_size = 0;
@@ -269,7 +278,7 @@ __idxd_perform_ops(int dev_id)
}
static __rte_always_inline int
-__idxd_completed_ops(int dev_id, uint8_t max_ops,
+__idxd_completed_ops(int dev_id, uint8_t max_ops, uint32_t *status, uint8_t *num_unsuccessful,
uintptr_t *src_hdls, uintptr_t *dst_hdls)
{
struct rte_idxd_rawdev *idxd =
@@ -280,8 +289,35 @@ __idxd_completed_ops(int dev_id, uint8_t max_ops,
uint16_t idx_to_chk = idxd->batch_idx_ring[idxd->batch_idx_read];
volatile struct rte_idxd_completion *comp_to_chk =
(struct rte_idxd_completion *)&idxd->desc_ring[idx_to_chk];
- if (comp_to_chk->status == 0)
+ uint8_t status = comp_to_chk->status;
+ if (status == 0)
break;
+ if (unlikely(status > 1)) {
+ /* error occurred somewhere in batch, start where last checked */
+ uint16_t desc_count = comp_to_chk->completed_size;
+ uint16_t batch_start = idxd->hdls_avail;
+ uint16_t batch_end = idx_to_chk;
+
+ if (batch_start > batch_end)
+ batch_end += idxd->desc_ring_mask + 1;
+ /* go through each batch entry and see status */
+ for (n = 0; n < desc_count; n++) {
+ uint16_t idx = (batch_start + n) & idxd->desc_ring_mask;
+ volatile struct rte_idxd_completion *comp =
+ (struct rte_idxd_completion *)&idxd->desc_ring[idx];
+ if (comp->status != 0 &&
+ idxd->hdl_ring_flags[idx] == RTE_IDXD_HDL_NORMAL) {
+ idxd->hdl_ring_flags[idx] = RTE_IDXD_HDL_OP_FAILED;
+ idxd->hdl_ring_flags[idx] |= (comp->status << 8);
+ }
+ }
+ /* if batch is incomplete, mark rest as skipped */
+ for ( ; n < batch_end - batch_start; n++) {
+ uint16_t idx = (batch_start + n) & idxd->desc_ring_mask;
+ if (idxd->hdl_ring_flags[idx] == RTE_IDXD_HDL_NORMAL)
+ idxd->hdl_ring_flags[idx] = RTE_IDXD_HDL_OP_SKIPPED;
+ }
+ }
/* avail points to one after the last one written */
idxd->hdls_avail = (idx_to_chk + 1) & idxd->desc_ring_mask;
idxd->batch_idx_read++;
@@ -289,7 +325,7 @@ __idxd_completed_ops(int dev_id, uint8_t max_ops,
idxd->batch_idx_read = 0;
}
- if (idxd->cfg.hdls_disable) {
+ if (idxd->cfg.hdls_disable && status == NULL) {
n = (idxd->hdls_avail < idxd->hdls_read) ?
(idxd->hdls_avail + idxd->desc_ring_mask + 1 - idxd->hdls_read) :
(idxd->hdls_avail - idxd->hdls_read);
@@ -297,10 +333,36 @@ __idxd_completed_ops(int dev_id, uint8_t max_ops,
goto out;
}
- for (n = 0, h_idx = idxd->hdls_read;
- n < max_ops && h_idx != idxd->hdls_avail; n++) {
- src_hdls[n] = idxd->hdl_ring[h_idx].src;
- dst_hdls[n] = idxd->hdl_ring[h_idx].dst;
+ n = 0;
+ h_idx = idxd->hdls_read;
+ while (h_idx != idxd->hdls_avail) {
+ uint16_t flag = idxd->hdl_ring_flags[h_idx];
+ if (flag != RTE_IDXD_HDL_INVALID) {
+ if (!idxd->cfg.hdls_disable) {
+ src_hdls[n] = idxd->hdl_ring[h_idx].src;
+ dst_hdls[n] = idxd->hdl_ring[h_idx].dst;
+ }
+ if (unlikely(flag != RTE_IDXD_HDL_NORMAL)) {
+ if (status != NULL)
+ status[n] = flag == RTE_IDXD_HDL_OP_SKIPPED ?
+ RTE_IOAT_OP_SKIPPED :
+ /* failure case, return err code */
+ idxd->hdl_ring_flags[h_idx] >> 8;
+ if (num_unsuccessful != NULL)
+ *num_unsuccessful += 1;
+ }
+ n++;
+ }
+ idxd->hdl_ring_flags[h_idx] = RTE_IDXD_HDL_NORMAL;
+ if (++h_idx > idxd->desc_ring_mask)
+ h_idx = 0;
+ if (n >= max_ops)
+ break;
+ }
+
+ /* skip over any remaining blank elements, e.g. batch completion */
+ while (idxd->hdl_ring_flags[h_idx] == RTE_IDXD_HDL_INVALID && h_idx != idxd->hdls_avail) {
+ idxd->hdl_ring_flags[h_idx] = RTE_IDXD_HDL_NORMAL;
if (++h_idx > idxd->desc_ring_mask)
h_idx = 0;
}
diff --git a/drivers/raw/ioat/rte_ioat_rawdev.h b/drivers/raw/ioat/rte_ioat_rawdev.h
index e5a22a0799..6cc1560a64 100644
--- a/drivers/raw/ioat/rte_ioat_rawdev.h
+++ b/drivers/raw/ioat/rte_ioat_rawdev.h
@@ -35,6 +35,10 @@ extern "C" {
struct rte_ioat_rawdev_config {
unsigned short ring_size; /**< size of job submission descriptor ring */
bool hdls_disable; /**< if set, ignore user-supplied handle params */
+ /** set "no_prefetch_completions", if polling completions on separate core
+ * from the core submitting the jobs
+ */
+ bool no_prefetch_completions;
};
/**
@@ -131,40 +135,73 @@ static inline int
__rte_experimental
rte_ioat_perform_ops(int dev_id);
+/*
+ * Status codes for operations.
+ */
+#define RTE_IOAT_OP_SUCCESS 0 /**< Operation completed successfully */
+#define RTE_IOAT_OP_SKIPPED 1 /**< Operation was not attempted (Earlier fenced op failed) */
+/* Values >1 indicate a failure condition */
+/* Error codes taken from Intel(R) Data Streaming Accelerator Architecture
+ * Specification, section 5.7
+ */
+#define RTE_IOAT_OP_ADDRESS_ERR 0x03 /**< Page fault or invalid address */
+#define RTE_IOAT_OP_INVALID_LEN 0x13 /**< Invalid/too big length field passed */
+#define RTE_IOAT_OP_OVERLAPPING_BUFS 0x16 /**< Overlapping buffers error */
+
+
/**
* Returns details of operations that have been completed
*
+ * The status of each operation is returned in the status array parameter.
* If the hdls_disable option was not set when the device was configured,
* the function will return to the caller the user-provided "handles" for
* the copy operations which have been completed by the hardware, and not
* already returned by a previous call to this API.
* If the hdls_disable option for the device was set on configure, the
- * max_copies, src_hdls and dst_hdls parameters will be ignored, and the
+ * src_hdls and dst_hdls parameters will be ignored, and the
* function returns the number of newly-completed operations.
+ * If status is also NULL, then max_copies parameter is also ignored and the
+ * function returns a count of the number of newly-completed operations.
*
* @param dev_id
* The rawdev device id of the ioat instance
* @param max_copies
- * The number of entries which can fit in the src_hdls and dst_hdls
+ * The number of entries which can fit in the status, src_hdls and dst_hdls
* arrays, i.e. max number of completed operations to report.
* NOTE: If hdls_disable configuration option for the device is set, this
- * parameter is ignored.
+ * parameter applies only to the "status" array if specified
+ * @param status
+ * Array to hold the status of each completed operation. Array should be
+ * set to zeros on input, as the driver will only write error status values.
+ * A value of 1 implies an operation was not attempted, and any other non-zero
+ * value indicates operation failure.
+ * Parameter may be NULL if no status value checking is required.
+ * @param num_unsuccessful
+ * Returns the number of elements in status where the value is non-zero,
+ * i.e. the operation either failed or was not attempted due to an earlier
+ * failure. If this value is returned as zero (the expected case), the
+ * status array will not have been modified by the function and need not be
+ * checked by software
* @param src_hdls
* Array to hold the source handle parameters of the completed ops.
* NOTE: If hdls_disable configuration option for the device is set, this
- * parameter is ignored.
+ * parameter is ignored, and may be NULL
* @param dst_hdls
* Array to hold the destination handle parameters of the completed ops.
* NOTE: If hdls_disable configuration option for the device is set, this
- * parameter is ignored.
+ * parameter is ignored, and may be NULL
* @return
- * -1 on error, with rte_errno set appropriately.
- * Otherwise number of completed operations i.e. number of entries written
- * to the src_hdls and dst_hdls array parameters.
+ * -1 on device error, with rte_errno set appropriately and parameters
+ * unmodified.
+ * Otherwise number of returned operations i.e. number of valid entries
+ * in the status, src_hdls and dst_hdls array parameters. If status is NULL,
+ * and the hdls_disable config option is set, this value may be greater than
+ * max_copies parameter.
*/
static inline int
__rte_experimental
rte_ioat_completed_ops(int dev_id, uint8_t max_copies,
+ uint32_t *status, uint8_t *num_unsuccessful,
uintptr_t *src_hdls, uintptr_t *dst_hdls);
/* include the implementation details from a separate file */
diff --git a/drivers/raw/ioat/rte_ioat_rawdev_fns.h b/drivers/raw/ioat/rte_ioat_rawdev_fns.h
index 92ccdd03b9..9b8a9fa88e 100644
--- a/drivers/raw/ioat/rte_ioat_rawdev_fns.h
+++ b/drivers/raw/ioat/rte_ioat_rawdev_fns.h
@@ -334,16 +334,22 @@ rte_ioat_perform_ops(int dev_id)
static inline int
rte_ioat_completed_ops(int dev_id, uint8_t max_copies,
+ uint32_t *status, uint8_t *num_unsuccessful,
uintptr_t *src_hdls, uintptr_t *dst_hdls)
{
enum rte_ioat_dev_type *type =
(enum rte_ioat_dev_type *)rte_rawdevs[dev_id].dev_private;
+ uint8_t tmp; /* used so functions don't need to check for null parameter */
+
+ if (num_unsuccessful == NULL)
+ num_unsuccessful = &tmp;
+
+ *num_unsuccessful = 0;
if (*type == RTE_IDXD_DEV)
- return __idxd_completed_ops(dev_id, max_copies,
+ return __idxd_completed_ops(dev_id, max_copies, status, num_unsuccessful,
src_hdls, dst_hdls);
else
- return __ioat_completed_ops(dev_id, max_copies,
- src_hdls, dst_hdls);
+ return __ioat_completed_ops(dev_id, max_copies, src_hdls, dst_hdls);
}
static inline void
@@ -355,7 +361,8 @@ __rte_deprecated_msg("use rte_ioat_completed_ops() instead")
rte_ioat_completed_copies(int dev_id, uint8_t max_copies,
uintptr_t *src_hdls, uintptr_t *dst_hdls)
{
- return rte_ioat_completed_ops(dev_id, max_copies, src_hdls, dst_hdls);
+ return rte_ioat_completed_ops(dev_id, max_copies, NULL, NULL,
+ src_hdls, dst_hdls);
}
#endif /* _RTE_IOAT_RAWDEV_FNS_H_ */
diff --git a/examples/ioat/ioatfwd.c b/examples/ioat/ioatfwd.c
index 845301a6db..2e377e2d4b 100644
--- a/examples/ioat/ioatfwd.c
+++ b/examples/ioat/ioatfwd.c
@@ -447,12 +447,15 @@ ioat_tx_port(struct rxtx_port_config *tx_config)
for (i = 0; i < tx_config->nb_queues; i++) {
if (copy_mode == COPY_MODE_IOAT_NUM) {
- /* Deque the mbufs from IOAT device. */
+ /* Dequeue the mbufs from IOAT device. Since all memory
+ * is DPDK pinned memory and therefore all addresses should
+ * be valid, we don't check for copy errors
+ */
nb_dq = rte_ioat_completed_ops(
- tx_config->ioat_ids[i], MAX_PKT_BURST,
+ tx_config->ioat_ids[i], MAX_PKT_BURST, NULL, NULL,
(void *)mbufs_src, (void *)mbufs_dst);
} else {
- /* Deque the mbufs from rx_to_tx_ring. */
+ /* Dequeue the mbufs from rx_to_tx_ring. */
nb_dq = rte_ring_dequeue_burst(
tx_config->rx_to_tx_ring, (void *)mbufs_dst,
MAX_PKT_BURST, NULL);
@@ -725,7 +728,10 @@ check_link_status(uint32_t port_mask)
static void
configure_rawdev_queue(uint32_t dev_id)
{
- struct rte_ioat_rawdev_config dev_config = { .ring_size = ring_size };
+ struct rte_ioat_rawdev_config dev_config = {
+ .ring_size = ring_size,
+ .no_prefetch_completions = (cfg.nb_lcores > 1),
+ };
struct rte_rawdev_info info = { .dev_private = &dev_config };
if (rte_rawdev_configure(dev_id, &info, sizeof(dev_config)) != 0) {
diff --git a/examples/vhost/ioat.c b/examples/vhost/ioat.c
index 60b73be936..efdd3f6f76 100644
--- a/examples/vhost/ioat.c
+++ b/examples/vhost/ioat.c
@@ -183,7 +183,7 @@ ioat_check_completed_copies_cb(int vid, uint16_t queue_id,
uint16_t dev_id = dma_bind[vid].dmas[queue_id * 2
+ VIRTIO_RXQ].dev_id;
- n_seg = rte_ioat_completed_ops(dev_id, 255, dump, dump);
+ n_seg = rte_ioat_completed_ops(dev_id, 255, NULL, NULL, dump, dump);
if (n_seg < 0) {
RTE_LOG(ERR,
VHOST_DATA,
--
2.30.2
^ permalink raw reply [relevance 1%]
* Re: [dpdk-dev] [PATCH V4] ethdev: add queue state when retrieve queue information
2021-04-25 16:42 0% ` Thomas Monjalon
@ 2021-04-26 9:48 0% ` Kinsella, Ray
0 siblings, 0 replies; 200+ results
From: Kinsella, Ray @ 2021-04-26 9:48 UTC (permalink / raw)
To: Thomas Monjalon, Lijun Ou, Ferruh Yigit; +Cc: dev, linuxarm
On 25/04/2021 17:42, Thomas Monjalon wrote:
> Kinsella, Ray:
>> On 16/04/2021 10:57, Thomas Monjalon wrote:
>>> 16/04/2021 11:41, Ferruh Yigit:
>>>> On 4/16/2021 9:58 AM, Thomas Monjalon wrote:
>>>>> 16/04/2021 10:46, Lijun Ou:
>>>>>> Currently, upper-layer application could get queue state only
>>>>>> through pointers such as dev->data->tx_queue_state[queue_id],
>>>>>> this is not the recommended way to access it. So this patch
>>>>>> add get queue state when call rte_eth_rx_queue_info_get and
>>>>>> rte_eth_tx_queue_info_get API.
>>>>>>
>>>>>> Note: After add queue_state field, the 'struct rte_eth_rxq_info' size
>>>>>> remains 128B, and the 'struct rte_eth_txq_info' size remains 64B, so
>>>>>> it could be ABI compatible.
>>>>> [...]
>>>>>> --- a/doc/guides/rel_notes/release_21_05.rst
>>>>>> +++ b/doc/guides/rel_notes/release_21_05.rst
>>>>>> @@ -251,6 +251,12 @@ ABI Changes
>>>>>> function was already marked as internal in the API documentation for it,
>>>>>> and was not for use by external applications.
>>>>>>
>>>>>> +* Added new field ``queue_state`` to ``rte_eth_rxq_info`` structure
>>>>>> + to provide indicated rxq queue state.
>>>>>> +
>>>>>> +* Added new field ``queue_state`` to ``rte_eth_txq_info`` structure
>>>>>> + to provide indicated txq queue state.
>>>>>
>>>>> Not sure we should add a note here for additions which
>>>>> do not break ABI compatibility.
>>>>> It may be confusing.
>>>>>
>>>>
>>>> Hi Thomas,
>>>>
>>>> What do about adding the documentation to "API Changes" section?
>>>> Since 'rte_eth_rx_queue_info_get()'/'rte_eth_tx_queue_info_get()' can get
>>>> 'queue_state' now, which may taken as API change.
>>>
>>> That's an addition.
>>> The users have nothing to change in their existing code,
>>> so I think we don't need a note in API or ABI change.
>>> The only required note would be in the "New Features".
>>
>> Well it definitely isn't an ABI change, however it still is an API addition.
>> I don't know, if additions qualify as changes.
>
> Additions are already notified in the section "New Features" in general.
> The purpose of the API section in the release notes is for app developers
> to be warned of changes requiring attention in their maintenance.
>
Understood - thanks.
Ray K
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH V4] ethdev: add queue state when retrieve queue information
2021-04-23 11:08 3% ` Kinsella, Ray
@ 2021-04-25 16:42 0% ` Thomas Monjalon
2021-04-26 9:48 0% ` Kinsella, Ray
0 siblings, 1 reply; 200+ results
From: Thomas Monjalon @ 2021-04-25 16:42 UTC (permalink / raw)
To: Ray Kinsella, Lijun Ou, Ferruh Yigit; +Cc: dev, linuxarm
Kinsella, Ray:
> On 16/04/2021 10:57, Thomas Monjalon wrote:
> > 16/04/2021 11:41, Ferruh Yigit:
> >> On 4/16/2021 9:58 AM, Thomas Monjalon wrote:
> >>> 16/04/2021 10:46, Lijun Ou:
> >>>> Currently, upper-layer application could get queue state only
> >>>> through pointers such as dev->data->tx_queue_state[queue_id],
> >>>> this is not the recommended way to access it. So this patch
> >>>> add get queue state when call rte_eth_rx_queue_info_get and
> >>>> rte_eth_tx_queue_info_get API.
> >>>>
> >>>> Note: After add queue_state field, the 'struct rte_eth_rxq_info' size
> >>>> remains 128B, and the 'struct rte_eth_txq_info' size remains 64B, so
> >>>> it could be ABI compatible.
> >>> [...]
> >>>> --- a/doc/guides/rel_notes/release_21_05.rst
> >>>> +++ b/doc/guides/rel_notes/release_21_05.rst
> >>>> @@ -251,6 +251,12 @@ ABI Changes
> >>>> function was already marked as internal in the API documentation for it,
> >>>> and was not for use by external applications.
> >>>>
> >>>> +* Added new field ``queue_state`` to ``rte_eth_rxq_info`` structure
> >>>> + to provide indicated rxq queue state.
> >>>> +
> >>>> +* Added new field ``queue_state`` to ``rte_eth_txq_info`` structure
> >>>> + to provide indicated txq queue state.
> >>>
> >>> Not sure we should add a note here for additions which
> >>> do not break ABI compatibility.
> >>> It may be confusing.
> >>>
> >>
> >> Hi Thomas,
> >>
> >> What do about adding the documentation to "API Changes" section?
> >> Since 'rte_eth_rx_queue_info_get()'/'rte_eth_tx_queue_info_get()' can get
> >> 'queue_state' now, which may taken as API change.
> >
> > That's an addition.
> > The users have nothing to change in their existing code,
> > so I think we don't need a note in API or ABI change.
> > The only required note would be in the "New Features".
>
> Well it definitely isn't an ABI change, however it still is an API addition.
> I don't know, if additions qualify as changes.
Additions are already notified in the section "New Features" in general.
The purpose of the API section in the release notes is for app developers
to be warned of changes requiring attention in their maintenance.
^ permalink raw reply [relevance 0%]
* [dpdk-dev] [PATCH v2] common/iavf: fix wrong order of protocol header types
@ 2021-04-25 6:53 3% Ting Xu
2021-04-29 0:49 0% ` Zhang, Qi Z
0 siblings, 1 reply; 200+ results
From: Ting Xu @ 2021-04-25 6:53 UTC (permalink / raw)
To: dev; +Cc: beilei.xing, jingjing.wu, qi.z.zhang, Ting Xu, stable
The new virtchnl protocol header types for IPv4 and IPv6 fragment are
not added in order, which will break ABI. Move them to the end of the
list.
Signed-off-by: Ting Xu <ting.xu@intel.com>
Fixes: e6a42fd9158b ("common/iavf: add protocol header for IP fragment")
Cc: stable@dpdk.org
---
drivers/common/iavf/virtchnl.h | 19 ++++++++++++-------
1 file changed, 12 insertions(+), 7 deletions(-)
diff --git a/drivers/common/iavf/virtchnl.h b/drivers/common/iavf/virtchnl.h
index 139569787f..42ea91a6b0 100644
--- a/drivers/common/iavf/virtchnl.h
+++ b/drivers/common/iavf/virtchnl.h
@@ -1415,9 +1415,7 @@ enum virtchnl_proto_hdr_type {
VIRTCHNL_PROTO_HDR_S_VLAN,
VIRTCHNL_PROTO_HDR_C_VLAN,
VIRTCHNL_PROTO_HDR_IPV4,
- VIRTCHNL_PROTO_HDR_IPV4_FRAG,
VIRTCHNL_PROTO_HDR_IPV6,
- VIRTCHNL_PROTO_HDR_IPV6_EH_FRAG,
VIRTCHNL_PROTO_HDR_TCP,
VIRTCHNL_PROTO_HDR_UDP,
VIRTCHNL_PROTO_HDR_SCTP,
@@ -1434,6 +1432,12 @@ enum virtchnl_proto_hdr_type {
VIRTCHNL_PROTO_HDR_ECPRI,
VIRTCHNL_PROTO_HDR_L2TPV2,
VIRTCHNL_PROTO_HDR_PPP,
+ /* IPv4 and IPv6 Fragment header types are only associated to
+ * VIRTCHNL_PROTO_HDR_IPV4 and VIRTCHNL_PROTO_HDR_IPV6 respectively,
+ * cannot be used independently.
+ */
+ VIRTCHNL_PROTO_HDR_IPV4_FRAG,
+ VIRTCHNL_PROTO_HDR_IPV6_EH_FRAG,
};
/* Protocol header field within a protocol header. */
@@ -1456,8 +1460,6 @@ enum virtchnl_proto_hdr_field {
VIRTCHNL_PROTO_HDR_IPV4_DSCP,
VIRTCHNL_PROTO_HDR_IPV4_TTL,
VIRTCHNL_PROTO_HDR_IPV4_PROT,
- VIRTCHNL_PROTO_HDR_IPV4_FRAG_PKID =
- PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_IPV4_FRAG),
/* IPV6 */
VIRTCHNL_PROTO_HDR_IPV6_SRC =
PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_IPV6),
@@ -1478,9 +1480,6 @@ enum virtchnl_proto_hdr_field {
VIRTCHNL_PROTO_HDR_IPV6_PREFIX64_DST,
VIRTCHNL_PROTO_HDR_IPV6_PREFIX96_SRC,
VIRTCHNL_PROTO_HDR_IPV6_PREFIX96_DST,
- /* IPv6 Extension Header Fragment */
- VIRTCHNL_PROTO_HDR_IPV6_EH_FRAG_PKID =
- PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_IPV6_EH_FRAG),
/* TCP */
VIRTCHNL_PROTO_HDR_TCP_SRC_PORT =
PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_TCP),
@@ -1523,6 +1522,12 @@ enum virtchnl_proto_hdr_field {
VIRTCHNL_PROTO_HDR_ECPRI_MSG_TYPE =
PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_ECPRI),
VIRTCHNL_PROTO_HDR_ECPRI_PC_RTC_ID,
+ /* IPv4 Dummy Fragment */
+ VIRTCHNL_PROTO_HDR_IPV4_FRAG_PKID =
+ PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_IPV4_FRAG),
+ /* IPv6 Extension Fragment */
+ VIRTCHNL_PROTO_HDR_IPV6_EH_FRAG_PKID =
+ PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_IPV6_EH_FRAG),
};
struct virtchnl_proto_hdr {
--
2.17.1
^ permalink raw reply [relevance 3%]
* [dpdk-dev] Use WFE for spinlock and ring
@ 2021-04-25 5:56 3% ` Ruifeng Wang
2021-04-28 7:42 0% ` David Marchand
0 siblings, 1 reply; 200+ results
From: Ruifeng Wang @ 2021-04-25 5:56 UTC (permalink / raw)
Cc: dev, david.marchand, thomas, jerinj, nd, honnappa.nagarahalli,
ruifeng.wang
The rte_wait_until_equal_xxx APIs abstract the functionality of 'polling
for a memory location to become equal to a given value'[1].
Use the API for the rte spinlock and ring implementations.
With the wait until equal APIs being stable, changes will not impact ABI.
[1] http://patches.dpdk.org/cover/62703/
v3:
Series rebased. (David)
Gavin Hu (1):
spinlock: use wfe to reduce contention on aarch64
Ruifeng Wang (1):
ring: use wfe to wait for ring tail update on aarch64
lib/eal/include/generic/rte_spinlock.h | 4 ++--
lib/ring/rte_ring_c11_pvt.h | 4 ++--
lib/ring/rte_ring_generic_pvt.h | 3 +--
3 files changed, 5 insertions(+), 6 deletions(-)
--
2.25.1
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [PATCH V5] ethdev: add queue state when retrieve queue information
2021-04-23 11:26 0% ` Ananyev, Konstantin
@ 2021-04-23 15:43 3% ` Kinsella, Ray
0 siblings, 0 replies; 200+ results
From: Kinsella, Ray @ 2021-04-23 15:43 UTC (permalink / raw)
To: Ananyev, Konstantin, Lijun Ou, thomas, Yigit, Ferruh
Cc: dev, linuxarm, Dodji Seketeli
On 23/04/2021 12:26, Ananyev, Konstantin wrote:
>
>
>> -----Original Message-----
>> From: dev <dev-bounces@dpdk.org> On Behalf Of Kinsella, Ray
>> Sent: Friday, April 23, 2021 12:17 PM
>> To: Lijun Ou <oulijun@huawei.com>; thomas@monjalon.net; Yigit, Ferruh <ferruh.yigit@intel.com>
>> Cc: dev@dpdk.org; linuxarm@openeuler.org
>> Subject: Re: [dpdk-dev] [PATCH V5] ethdev: add queue state when retrieve queue information
>>
>>
>>
>> On 17/04/2021 04:09, Lijun Ou wrote:
>>> Currently, upper-layer application could get queue state only
>>> through pointers such as dev->data->tx_queue_state[queue_id],
>>> this is not the recommended way to access it. So this patch
>>> add get queue state when call rte_eth_rx_queue_info_get and
>>> rte_eth_tx_queue_info_get API.
>>>
>>> Note: After add queue_state field, the 'struct rte_eth_rxq_info' size
>>> remains 128B, and the 'struct rte_eth_txq_info' size remains 64B, so
>>> it could be ABI compatible.
>>>
>>> Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
>>> Signed-off-by: Lijun Ou <oulijun@huawei.com>
>>> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
>>> ---
>>> V4->V5:
>>> - Add acked-by
>>> - add a note to the "New features" section to annouce the new feature.
>>>
>>> V3->V4:
>>> - update libabigail.abignore for removing the CI warnings
>>>
>>> V2->V3:
>>> - rewrite the commit log and delete the part Note
>>> - rewrite tht comments for queue state
>>> - move the queue_state definition locations
>>>
>>> V1->V2:
>>> - move queue state defines to public file
>>> ---
>>> doc/guides/rel_notes/release_21_05.rst | 6 ++++++
>>> lib/librte_ethdev/ethdev_driver.h | 7 -------
>>> lib/librte_ethdev/rte_ethdev.c | 3 +++
>>> lib/librte_ethdev/rte_ethdev.h | 9 +++++++++
>>> 4 files changed, 18 insertions(+), 7 deletions(-)
>>>
>>> diff --git a/doc/guides/rel_notes/release_21_05.rst b/doc/guides/rel_notes/release_21_05.rst
>>> index 58272e1..1ab3681 100644
>>> --- a/doc/guides/rel_notes/release_21_05.rst
>>> +++ b/doc/guides/rel_notes/release_21_05.rst
>>> @@ -81,6 +81,12 @@ New Features
>>> representor=[[c#]pf#]sf# sf[0,2-1023] /* 1023 SFs. */
>>> representor=[c#]pf# c2pf[0,1] /* 2 PFs on controller 2. */
>>>
>>> +* **Enhanced function for getting rxq/txq info ABI.**
>>> + * Added new field ``queue_state`` to ``rte_eth_rxq_info`` structure to
>>> + provide indicated rxq queue state.
>>> + * Added new field ``queue_state`` to ``rte_eth_txq_info`` structure to
>>> + provide indicated txq queue state.
>>> +
>>> * **Added support for meter PPS profile.**
>>>
>>> Currently meter algorithms only supports bytes per second(BPS).
>>> diff --git a/lib/librte_ethdev/ethdev_driver.h b/lib/librte_ethdev/ethdev_driver.h
>>> index 113129d..40e474a 100644
>>> --- a/lib/librte_ethdev/ethdev_driver.h
>>> +++ b/lib/librte_ethdev/ethdev_driver.h
>>> @@ -952,13 +952,6 @@ struct eth_dev_ops {
>>> };
>>>
>>> /**
>>> - * RX/TX queue states
>>> - */
>>> -#define RTE_ETH_QUEUE_STATE_STOPPED 0
>>> -#define RTE_ETH_QUEUE_STATE_STARTED 1
>>> -#define RTE_ETH_QUEUE_STATE_HAIRPIN 2
>>> -
>>> -/**
>>> * @internal
>>> * Check if the selected Rx queue is hairpin queue.
>>> *
>>> diff --git a/lib/librte_ethdev/rte_ethdev.c b/lib/librte_ethdev/rte_ethdev.c
>>> index c73d263..d5adf4f 100644
>>> --- a/lib/librte_ethdev/rte_ethdev.c
>>> +++ b/lib/librte_ethdev/rte_ethdev.c
>>> @@ -5038,6 +5038,8 @@ rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
>>>
>>> memset(qinfo, 0, sizeof(*qinfo));
>>> dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
>>> + qinfo->queue_state = dev->data->rx_queue_state[queue_id];
>>> +
>>> return 0;
>>> }
>>>
>>> @@ -5078,6 +5080,7 @@ rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
>>>
>>> memset(qinfo, 0, sizeof(*qinfo));
>>> dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
>>> + qinfo->queue_state = dev->data->tx_queue_state[queue_id];
>>>
>>> return 0;
>>> }
>>> diff --git a/lib/librte_ethdev/rte_ethdev.h b/lib/librte_ethdev/rte_ethdev.h
>>> index 3b773b6..a0d01d2 100644
>>> --- a/lib/librte_ethdev/rte_ethdev.h
>>> +++ b/lib/librte_ethdev/rte_ethdev.h
>>> @@ -1588,6 +1588,13 @@ struct rte_eth_dev_info {
>>> };
>>>
>>> /**
>>> + * RX/TX queue states
>>> + */
>>> +#define RTE_ETH_QUEUE_STATE_STOPPED 0
>>> +#define RTE_ETH_QUEUE_STATE_STARTED 1
>>> +#define RTE_ETH_QUEUE_STATE_HAIRPIN 2
>>> +
>>> +/**
>>> * Ethernet device RX queue information structure.
>>> * Used to retrieve information about configured queue.
>>> */
>>> @@ -1595,6 +1602,7 @@ struct rte_eth_rxq_info {
>>> struct rte_mempool *mp; /**< mempool used by that queue. */
>>> struct rte_eth_rxconf conf; /**< queue config parameters. */
>>> uint8_t scattered_rx; /**< scattered packets RX supported. */
>>> + uint8_t queue_state; /**< one of RTE_ETH_QUEUE_STATE_*. */
>>
>> Are we sure this is a false positive? - it is being added mid-structure on the rx-side at least.
>> Shouldn't this be appended to the end - unless it is being sneaked into padding between fields.
>
> I believe there was a padding, that's why it was suggested to squeeze it here.
Yes - I took a look with pahole after reading back in the thread a bit,
where Thomas points out the 1byte padding hole in memory we could use.
Good work, as it avoids having to rework the structure at the next ABI version.
>>
>>> uint16_t nb_desc; /**< configured number of RXDs. */
>>> uint16_t rx_buf_size; /**< hardware receive buffer size. */
>>> } __rte_cache_min_aligned;
>>> @@ -1606,6 +1614,7 @@ struct rte_eth_rxq_info {
>>> struct rte_eth_txq_info {
>>> struct rte_eth_txconf conf; /**< queue config parameters. */
>>> uint16_t nb_desc; /**< configured number of TXDs. */
>>> + uint8_t queue_state; /**< one of RTE_ETH_QUEUE_STATE_*. */
>>> } __rte_cache_min_aligned;
>>>
>>> /* Generic Burst mode flag definition, values can be ORed. */
>>>
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [PATCH v5 0/5] eal: enable global device syntax by default
2021-04-23 11:39 3% ` Gaëtan Rivet
@ 2021-04-23 12:35 0% ` Kinsella, Ray
0 siblings, 0 replies; 200+ results
From: Kinsella, Ray @ 2021-04-23 12:35 UTC (permalink / raw)
To: Gaëtan Rivet, Thomas Monjalon, Xueming(Steven) Li
Cc: Gaetan Rivet, dev, Asaf Penso, David Marchand
On 23/04/2021 12:39, Gaëtan Rivet wrote:
> On Fri, Apr 23, 2021, at 13:06, Kinsella, Ray wrote:
>>
>>
>> On 14/04/2021 20:49, Thomas Monjalon wrote:
>>> 13/04/2021 05:14, Xueming Li:
>>>> Xueming Li (5):
>>>> devargs: unify scratch buffer storage
>>>> devargs: fix memory leak on parsing error
>>>> kvargs: add get by key function
>>>> bus: add device arguments name parsing API
>>>> devargs: parse global device syntax
>>>
>>> The patch 4 adds a new callback in rte_bus.
>>> I thought about it during the whole day and I don't see any good way
>>> to merge it without breaking the ABI compatibility.
>>>
>>> Only first 3 patches are applied for now, thanks.
>>>
>>
>> I took a look, I don't immediately see the concern.
>>
>> The new entry is at the end of the memory structure.
>> The call back is internal and hidden behind the symbol rte_devargs_layers_parse.
>>
>> So will only be trigger by a rte_devargs_layers_parse of the same
>> version of DPDK that introduce the new callback.
>>
>> Should be fine?
>>
>
> It might have been an issue IMO with a structure exposed as an array, i.e. rte_eth_devices[].
> But I thought this kind of ABI break was the kind that would be accepted between two LTS.
Very much depends on how it is done.
New fields are ok in some circumstances, at first glance I thought one is ok.
> The only potential risk is in using a new version librte_eal.so with an older librte_bus_xxx.so
We don't account for or consider that, that would be an irrational environmnet.
> But I think it is fair to expect installations to be internally consistent.
>
> Maybe we could have a runtime warning when loading mismatched versions
Nope - that would be insanely complex.
> (if there isn't one already) -- each librte_*.so could have an internal version stamp and alignment could
> be checked through a constructor in each lib?
>
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH v5 0/5] eal: enable global device syntax by default
2021-04-23 11:06 0% ` Kinsella, Ray
@ 2021-04-23 11:39 3% ` Gaëtan Rivet
2021-04-23 12:35 0% ` Kinsella, Ray
0 siblings, 1 reply; 200+ results
From: Gaëtan Rivet @ 2021-04-23 11:39 UTC (permalink / raw)
To: Kinsella, Ray, Thomas Monjalon, Xueming(Steven) Li
Cc: Gaetan Rivet, dev, Asaf Penso, David Marchand
On Fri, Apr 23, 2021, at 13:06, Kinsella, Ray wrote:
>
>
> On 14/04/2021 20:49, Thomas Monjalon wrote:
> > 13/04/2021 05:14, Xueming Li:
> >> Xueming Li (5):
> >> devargs: unify scratch buffer storage
> >> devargs: fix memory leak on parsing error
> >> kvargs: add get by key function
> >> bus: add device arguments name parsing API
> >> devargs: parse global device syntax
> >
> > The patch 4 adds a new callback in rte_bus.
> > I thought about it during the whole day and I don't see any good way
> > to merge it without breaking the ABI compatibility.
> >
> > Only first 3 patches are applied for now, thanks.
> >
>
> I took a look, I don't immediately see the concern.
>
> The new entry is at the end of the memory structure.
> The call back is internal and hidden behind the symbol rte_devargs_layers_parse.
>
> So will only be trigger by a rte_devargs_layers_parse of the same
> version of DPDK that introduce the new callback.
>
> Should be fine?
>
It might have been an issue IMO with a structure exposed as an array, i.e. rte_eth_devices[].
But I thought this kind of ABI break was the kind that would be accepted between two LTS.
The only potential risk is in using a new version librte_eal.so with an older librte_bus_xxx.so
But I think it is fair to expect installations to be internally consistent.
Maybe we could have a runtime warning when loading mismatched versions
(if there isn't one already) -- each librte_*.so could have an internal version stamp and alignment could
be checked through a constructor in each lib?
--
Gaetan Rivet
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [PATCH V5] ethdev: add queue state when retrieve queue information
2021-04-23 11:17 0% ` [dpdk-dev] [PATCH V5] " Kinsella, Ray
@ 2021-04-23 11:26 0% ` Ananyev, Konstantin
2021-04-23 15:43 3% ` Kinsella, Ray
0 siblings, 1 reply; 200+ results
From: Ananyev, Konstantin @ 2021-04-23 11:26 UTC (permalink / raw)
To: Kinsella, Ray, Lijun Ou, thomas, Yigit, Ferruh; +Cc: dev, linuxarm
> -----Original Message-----
> From: dev <dev-bounces@dpdk.org> On Behalf Of Kinsella, Ray
> Sent: Friday, April 23, 2021 12:17 PM
> To: Lijun Ou <oulijun@huawei.com>; thomas@monjalon.net; Yigit, Ferruh <ferruh.yigit@intel.com>
> Cc: dev@dpdk.org; linuxarm@openeuler.org
> Subject: Re: [dpdk-dev] [PATCH V5] ethdev: add queue state when retrieve queue information
>
>
>
> On 17/04/2021 04:09, Lijun Ou wrote:
> > Currently, upper-layer application could get queue state only
> > through pointers such as dev->data->tx_queue_state[queue_id],
> > this is not the recommended way to access it. So this patch
> > add get queue state when call rte_eth_rx_queue_info_get and
> > rte_eth_tx_queue_info_get API.
> >
> > Note: After add queue_state field, the 'struct rte_eth_rxq_info' size
> > remains 128B, and the 'struct rte_eth_txq_info' size remains 64B, so
> > it could be ABI compatible.
> >
> > Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
> > Signed-off-by: Lijun Ou <oulijun@huawei.com>
> > Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
> > ---
> > V4->V5:
> > - Add acked-by
> > - add a note to the "New features" section to annouce the new feature.
> >
> > V3->V4:
> > - update libabigail.abignore for removing the CI warnings
> >
> > V2->V3:
> > - rewrite the commit log and delete the part Note
> > - rewrite tht comments for queue state
> > - move the queue_state definition locations
> >
> > V1->V2:
> > - move queue state defines to public file
> > ---
> > doc/guides/rel_notes/release_21_05.rst | 6 ++++++
> > lib/librte_ethdev/ethdev_driver.h | 7 -------
> > lib/librte_ethdev/rte_ethdev.c | 3 +++
> > lib/librte_ethdev/rte_ethdev.h | 9 +++++++++
> > 4 files changed, 18 insertions(+), 7 deletions(-)
> >
> > diff --git a/doc/guides/rel_notes/release_21_05.rst b/doc/guides/rel_notes/release_21_05.rst
> > index 58272e1..1ab3681 100644
> > --- a/doc/guides/rel_notes/release_21_05.rst
> > +++ b/doc/guides/rel_notes/release_21_05.rst
> > @@ -81,6 +81,12 @@ New Features
> > representor=[[c#]pf#]sf# sf[0,2-1023] /* 1023 SFs. */
> > representor=[c#]pf# c2pf[0,1] /* 2 PFs on controller 2. */
> >
> > +* **Enhanced function for getting rxq/txq info ABI.**
> > + * Added new field ``queue_state`` to ``rte_eth_rxq_info`` structure to
> > + provide indicated rxq queue state.
> > + * Added new field ``queue_state`` to ``rte_eth_txq_info`` structure to
> > + provide indicated txq queue state.
> > +
> > * **Added support for meter PPS profile.**
> >
> > Currently meter algorithms only supports bytes per second(BPS).
> > diff --git a/lib/librte_ethdev/ethdev_driver.h b/lib/librte_ethdev/ethdev_driver.h
> > index 113129d..40e474a 100644
> > --- a/lib/librte_ethdev/ethdev_driver.h
> > +++ b/lib/librte_ethdev/ethdev_driver.h
> > @@ -952,13 +952,6 @@ struct eth_dev_ops {
> > };
> >
> > /**
> > - * RX/TX queue states
> > - */
> > -#define RTE_ETH_QUEUE_STATE_STOPPED 0
> > -#define RTE_ETH_QUEUE_STATE_STARTED 1
> > -#define RTE_ETH_QUEUE_STATE_HAIRPIN 2
> > -
> > -/**
> > * @internal
> > * Check if the selected Rx queue is hairpin queue.
> > *
> > diff --git a/lib/librte_ethdev/rte_ethdev.c b/lib/librte_ethdev/rte_ethdev.c
> > index c73d263..d5adf4f 100644
> > --- a/lib/librte_ethdev/rte_ethdev.c
> > +++ b/lib/librte_ethdev/rte_ethdev.c
> > @@ -5038,6 +5038,8 @@ rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
> >
> > memset(qinfo, 0, sizeof(*qinfo));
> > dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
> > + qinfo->queue_state = dev->data->rx_queue_state[queue_id];
> > +
> > return 0;
> > }
> >
> > @@ -5078,6 +5080,7 @@ rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
> >
> > memset(qinfo, 0, sizeof(*qinfo));
> > dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
> > + qinfo->queue_state = dev->data->tx_queue_state[queue_id];
> >
> > return 0;
> > }
> > diff --git a/lib/librte_ethdev/rte_ethdev.h b/lib/librte_ethdev/rte_ethdev.h
> > index 3b773b6..a0d01d2 100644
> > --- a/lib/librte_ethdev/rte_ethdev.h
> > +++ b/lib/librte_ethdev/rte_ethdev.h
> > @@ -1588,6 +1588,13 @@ struct rte_eth_dev_info {
> > };
> >
> > /**
> > + * RX/TX queue states
> > + */
> > +#define RTE_ETH_QUEUE_STATE_STOPPED 0
> > +#define RTE_ETH_QUEUE_STATE_STARTED 1
> > +#define RTE_ETH_QUEUE_STATE_HAIRPIN 2
> > +
> > +/**
> > * Ethernet device RX queue information structure.
> > * Used to retrieve information about configured queue.
> > */
> > @@ -1595,6 +1602,7 @@ struct rte_eth_rxq_info {
> > struct rte_mempool *mp; /**< mempool used by that queue. */
> > struct rte_eth_rxconf conf; /**< queue config parameters. */
> > uint8_t scattered_rx; /**< scattered packets RX supported. */
> > + uint8_t queue_state; /**< one of RTE_ETH_QUEUE_STATE_*. */
>
> Are we sure this is a false positive? - it is being added mid-structure on the rx-side at least.
> Shouldn't this be appended to the end - unless it is being sneaked into padding between fields.
I believe there was a padding, that's why it was suggested to squeeze it here.
>
> > uint16_t nb_desc; /**< configured number of RXDs. */
> > uint16_t rx_buf_size; /**< hardware receive buffer size. */
> > } __rte_cache_min_aligned;
> > @@ -1606,6 +1614,7 @@ struct rte_eth_rxq_info {
> > struct rte_eth_txq_info {
> > struct rte_eth_txconf conf; /**< queue config parameters. */
> > uint16_t nb_desc; /**< configured number of TXDs. */
> > + uint8_t queue_state; /**< one of RTE_ETH_QUEUE_STATE_*. */
> > } __rte_cache_min_aligned;
> >
> > /* Generic Burst mode flag definition, values can be ORed. */
> >
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH V5] ethdev: add queue state when retrieve queue information
2021-04-17 3:09 8% ` [dpdk-dev] [PATCH V5] " Lijun Ou
2021-04-17 22:00 0% ` Ferruh Yigit
2021-04-19 2:03 7% ` [dpdk-dev] [PATCH V6] " Lijun Ou
@ 2021-04-23 11:17 0% ` Kinsella, Ray
2021-04-23 11:26 0% ` Ananyev, Konstantin
2 siblings, 1 reply; 200+ results
From: Kinsella, Ray @ 2021-04-23 11:17 UTC (permalink / raw)
To: Lijun Ou, thomas, ferruh.yigit; +Cc: dev, linuxarm
On 17/04/2021 04:09, Lijun Ou wrote:
> Currently, upper-layer application could get queue state only
> through pointers such as dev->data->tx_queue_state[queue_id],
> this is not the recommended way to access it. So this patch
> add get queue state when call rte_eth_rx_queue_info_get and
> rte_eth_tx_queue_info_get API.
>
> Note: After add queue_state field, the 'struct rte_eth_rxq_info' size
> remains 128B, and the 'struct rte_eth_txq_info' size remains 64B, so
> it could be ABI compatible.
>
> Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
> Signed-off-by: Lijun Ou <oulijun@huawei.com>
> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
> ---
> V4->V5:
> - Add acked-by
> - add a note to the "New features" section to annouce the new feature.
>
> V3->V4:
> - update libabigail.abignore for removing the CI warnings
>
> V2->V3:
> - rewrite the commit log and delete the part Note
> - rewrite tht comments for queue state
> - move the queue_state definition locations
>
> V1->V2:
> - move queue state defines to public file
> ---
> doc/guides/rel_notes/release_21_05.rst | 6 ++++++
> lib/librte_ethdev/ethdev_driver.h | 7 -------
> lib/librte_ethdev/rte_ethdev.c | 3 +++
> lib/librte_ethdev/rte_ethdev.h | 9 +++++++++
> 4 files changed, 18 insertions(+), 7 deletions(-)
>
> diff --git a/doc/guides/rel_notes/release_21_05.rst b/doc/guides/rel_notes/release_21_05.rst
> index 58272e1..1ab3681 100644
> --- a/doc/guides/rel_notes/release_21_05.rst
> +++ b/doc/guides/rel_notes/release_21_05.rst
> @@ -81,6 +81,12 @@ New Features
> representor=[[c#]pf#]sf# sf[0,2-1023] /* 1023 SFs. */
> representor=[c#]pf# c2pf[0,1] /* 2 PFs on controller 2. */
>
> +* **Enhanced function for getting rxq/txq info ABI.**
> + * Added new field ``queue_state`` to ``rte_eth_rxq_info`` structure to
> + provide indicated rxq queue state.
> + * Added new field ``queue_state`` to ``rte_eth_txq_info`` structure to
> + provide indicated txq queue state.
> +
> * **Added support for meter PPS profile.**
>
> Currently meter algorithms only supports bytes per second(BPS).
> diff --git a/lib/librte_ethdev/ethdev_driver.h b/lib/librte_ethdev/ethdev_driver.h
> index 113129d..40e474a 100644
> --- a/lib/librte_ethdev/ethdev_driver.h
> +++ b/lib/librte_ethdev/ethdev_driver.h
> @@ -952,13 +952,6 @@ struct eth_dev_ops {
> };
>
> /**
> - * RX/TX queue states
> - */
> -#define RTE_ETH_QUEUE_STATE_STOPPED 0
> -#define RTE_ETH_QUEUE_STATE_STARTED 1
> -#define RTE_ETH_QUEUE_STATE_HAIRPIN 2
> -
> -/**
> * @internal
> * Check if the selected Rx queue is hairpin queue.
> *
> diff --git a/lib/librte_ethdev/rte_ethdev.c b/lib/librte_ethdev/rte_ethdev.c
> index c73d263..d5adf4f 100644
> --- a/lib/librte_ethdev/rte_ethdev.c
> +++ b/lib/librte_ethdev/rte_ethdev.c
> @@ -5038,6 +5038,8 @@ rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
>
> memset(qinfo, 0, sizeof(*qinfo));
> dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
> + qinfo->queue_state = dev->data->rx_queue_state[queue_id];
> +
> return 0;
> }
>
> @@ -5078,6 +5080,7 @@ rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
>
> memset(qinfo, 0, sizeof(*qinfo));
> dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
> + qinfo->queue_state = dev->data->tx_queue_state[queue_id];
>
> return 0;
> }
> diff --git a/lib/librte_ethdev/rte_ethdev.h b/lib/librte_ethdev/rte_ethdev.h
> index 3b773b6..a0d01d2 100644
> --- a/lib/librte_ethdev/rte_ethdev.h
> +++ b/lib/librte_ethdev/rte_ethdev.h
> @@ -1588,6 +1588,13 @@ struct rte_eth_dev_info {
> };
>
> /**
> + * RX/TX queue states
> + */
> +#define RTE_ETH_QUEUE_STATE_STOPPED 0
> +#define RTE_ETH_QUEUE_STATE_STARTED 1
> +#define RTE_ETH_QUEUE_STATE_HAIRPIN 2
> +
> +/**
> * Ethernet device RX queue information structure.
> * Used to retrieve information about configured queue.
> */
> @@ -1595,6 +1602,7 @@ struct rte_eth_rxq_info {
> struct rte_mempool *mp; /**< mempool used by that queue. */
> struct rte_eth_rxconf conf; /**< queue config parameters. */
> uint8_t scattered_rx; /**< scattered packets RX supported. */
> + uint8_t queue_state; /**< one of RTE_ETH_QUEUE_STATE_*. */
Are we sure this is a false positive? - it is being added mid-structure on the rx-side at least.
Shouldn't this be appended to the end - unless it is being sneaked into padding between fields.
> uint16_t nb_desc; /**< configured number of RXDs. */
> uint16_t rx_buf_size; /**< hardware receive buffer size. */
> } __rte_cache_min_aligned;
> @@ -1606,6 +1614,7 @@ struct rte_eth_rxq_info {
> struct rte_eth_txq_info {
> struct rte_eth_txconf conf; /**< queue config parameters. */
> uint16_t nb_desc; /**< configured number of TXDs. */
> + uint8_t queue_state; /**< one of RTE_ETH_QUEUE_STATE_*. */
> } __rte_cache_min_aligned;
>
> /* Generic Burst mode flag definition, values can be ORed. */
>
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH V4] ethdev: add queue state when retrieve queue information
2021-04-16 9:57 3% ` Thomas Monjalon
@ 2021-04-23 11:08 3% ` Kinsella, Ray
2021-04-25 16:42 0% ` Thomas Monjalon
0 siblings, 1 reply; 200+ results
From: Kinsella, Ray @ 2021-04-23 11:08 UTC (permalink / raw)
To: Thomas Monjalon, Lijun Ou, Ferruh Yigit; +Cc: dev, linuxarm
On 16/04/2021 10:57, Thomas Monjalon wrote:
> 16/04/2021 11:41, Ferruh Yigit:
>> On 4/16/2021 9:58 AM, Thomas Monjalon wrote:
>>> 16/04/2021 10:46, Lijun Ou:
>>>> Currently, upper-layer application could get queue state only
>>>> through pointers such as dev->data->tx_queue_state[queue_id],
>>>> this is not the recommended way to access it. So this patch
>>>> add get queue state when call rte_eth_rx_queue_info_get and
>>>> rte_eth_tx_queue_info_get API.
>>>>
>>>> Note: After add queue_state field, the 'struct rte_eth_rxq_info' size
>>>> remains 128B, and the 'struct rte_eth_txq_info' size remains 64B, so
>>>> it could be ABI compatible.
>>> [...]
>>>> --- a/doc/guides/rel_notes/release_21_05.rst
>>>> +++ b/doc/guides/rel_notes/release_21_05.rst
>>>> @@ -251,6 +251,12 @@ ABI Changes
>>>> function was already marked as internal in the API documentation for it,
>>>> and was not for use by external applications.
>>>>
>>>> +* Added new field ``queue_state`` to ``rte_eth_rxq_info`` structure
>>>> + to provide indicated rxq queue state.
>>>> +
>>>> +* Added new field ``queue_state`` to ``rte_eth_txq_info`` structure
>>>> + to provide indicated txq queue state.
>>>
>>> Not sure we should add a note here for additions which
>>> do not break ABI compatibility.
>>> It may be confusing.
>>>
>>
>> Hi Thomas,
>>
>> What do about adding the documentation to "API Changes" section?
>> Since 'rte_eth_rx_queue_info_get()'/'rte_eth_tx_queue_info_get()' can get
>> 'queue_state' now, which may taken as API change.
>
> That's an addition.
> The users have nothing to change in their existing code,
> so I think we don't need a note in API or ABI change.
> The only required note would be in the "New Features".
Well it definitely isn't an ABI change, however it still is an API addition.
I don't know, if additions qualify as changes.
Ray K
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [PATCH v5 0/5] eal: enable global device syntax by default
2021-04-14 19:49 3% ` [dpdk-dev] [PATCH v5 0/5] eal: enable global device syntax by default Thomas Monjalon
@ 2021-04-23 11:06 0% ` Kinsella, Ray
2021-04-23 11:39 3% ` Gaëtan Rivet
0 siblings, 1 reply; 200+ results
From: Kinsella, Ray @ 2021-04-23 11:06 UTC (permalink / raw)
To: Thomas Monjalon, Xueming Li; +Cc: Gaetan Rivet, dev, Asaf Penso, david.marchand
On 14/04/2021 20:49, Thomas Monjalon wrote:
> 13/04/2021 05:14, Xueming Li:
>> Xueming Li (5):
>> devargs: unify scratch buffer storage
>> devargs: fix memory leak on parsing error
>> kvargs: add get by key function
>> bus: add device arguments name parsing API
>> devargs: parse global device syntax
>
> The patch 4 adds a new callback in rte_bus.
> I thought about it during the whole day and I don't see any good way
> to merge it without breaking the ABI compatibility.
>
> Only first 3 patches are applied for now, thanks.
>
I took a look, I don't immediately see the concern.
The new entry is at the end of the memory structure.
The call back is internal and hidden behind the symbol rte_devargs_layers_parse.
So will only be trigger by a rte_devargs_layers_parse of the same version of DPDK that introduce the new callback.
Should be fine?
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH] doc: announce modification in eventdev structure
2021-04-15 9:08 3% [dpdk-dev] [PATCH] doc: announce modification in eventdev structure gakhil
2021-04-18 9:11 0% ` Jerin Jacob
@ 2021-04-23 10:53 3% ` Kinsella, Ray
2021-05-03 11:18 0% ` [dpdk-dev] [EXT] " Akhil Goyal
1 sibling, 1 reply; 200+ results
From: Kinsella, Ray @ 2021-04-23 10:53 UTC (permalink / raw)
To: gakhil, jerinj, thomas, dev, david.marchand
Cc: abhinandan.gujjar, hemant.agrawal, nipun.gupta, sachin.saxena,
anoobj, matan, roy.fan.zhang, g.singh, erik.g.carrillo,
jay.jayatheerthan, pbhagavatula, harry.van.haaren, sthotton
On 15/04/2021 10:08, gakhil@marvell.com wrote:
> From: Akhil Goyal <gakhil@marvell.com>
>
> A new field ``ca_enqueue`` is added in ``rte_eventdev``
> in the end to maintain ABI. It needs to be moved above
> in the structure to align with other enqueue callbacks.
>
> Signed-off-by: Akhil Goyal <gakhil@marvell.com>
> ---
> doc/guides/rel_notes/deprecation.rst | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/doc/guides/rel_notes/deprecation.rst b/doc/guides/rel_notes/deprecation.rst
> index 2afc84c39..a973de4a9 100644
> --- a/doc/guides/rel_notes/deprecation.rst
> +++ b/doc/guides/rel_notes/deprecation.rst
> @@ -127,6 +127,10 @@ Deprecation Notices
> values to the function ``rte_event_eth_rx_adapter_queue_add`` using
> the structure ``rte_event_eth_rx_adapter_queue_add``.
>
> +* eventdev: The function pointer ``ca_enqueue`` in structure ``rte_eventdev``
> + will be moved after ``txa_enqueue`` so that all enqueue/dequeue
> + function pointers are adjacent to each other.
> +
> * sched: To allow more traffic classes, flexible mapping of pipe queues to
> traffic classes, and subport level configuration of pipes and queues
> changes will be made to macros, data structures and API functions defined
>
I admire the disipline - but since you are not actually removing ca_enqueue,
just moving it in memory when the new ABI is declared in anycase, this is not required.
Thanks,
Ray K
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [PATCH v3 2/2] lib/mempool: distinguish debug counters from cache and pool
2021-04-21 16:29 3% ` Olivier Matz
2021-04-22 21:27 0% ` Dharmik Thakkar
@ 2021-04-23 10:41 0% ` Kinsella, Ray
1 sibling, 0 replies; 200+ results
From: Kinsella, Ray @ 2021-04-23 10:41 UTC (permalink / raw)
To: Olivier Matz, Dharmik Thakkar; +Cc: Andrew Rybchenko, dev, nd, joyce.kong
On 21/04/2021 17:29, Olivier Matz wrote:
> Hi Dharmik,
>
> Please see some comments below.
>
> On Mon, Apr 19, 2021 at 07:08:00PM -0500, Dharmik Thakkar wrote:
>> From: Joyce Kong <joyce.kong@arm.com>
>>
>> If cache is enabled, objects will be retrieved/put from/to cache,
>> subsequently from/to the common pool. Now the debug stats calculate
>> the objects retrieved/put from/to cache and pool together, it is
>> better to distinguish them.
>>
>> Signed-off-by: Joyce Kong <joyce.kong@arm.com>
>> Signed-off-by: Dharmik Thakkar <dharmik.thakkar@arm.com>
>> Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
>> Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
>> ---
>> lib/librte_mempool/rte_mempool.c | 24 ++++++++++++++++
>> lib/librte_mempool/rte_mempool.h | 47 ++++++++++++++++++++++----------
>> 2 files changed, 57 insertions(+), 14 deletions(-)
>>
>> diff --git a/lib/librte_mempool/rte_mempool.c b/lib/librte_mempool/rte_mempool.c
>> index afb1239c8d48..339f14455624 100644
>> --- a/lib/librte_mempool/rte_mempool.c
>> +++ b/lib/librte_mempool/rte_mempool.c
>> @@ -1244,6 +1244,18 @@ rte_mempool_dump(FILE *f, struct rte_mempool *mp)
>> for (lcore_id = 0; lcore_id < RTE_MAX_LCORE; lcore_id++) {
>> sum.put_bulk += mp->stats[lcore_id].put_bulk;
>> sum.put_objs += mp->stats[lcore_id].put_objs;
>> + sum.put_common_pool_bulk +=
>> + mp->stats[lcore_id].put_common_pool_bulk;
>> + sum.put_common_pool_objs +=
>> + mp->stats[lcore_id].put_common_pool_objs;
>> + sum.put_cache_bulk += mp->stats[lcore_id].put_cache_bulk;
>> + sum.put_cache_objs += mp->stats[lcore_id].put_cache_objs;
>> + sum.get_common_pool_bulk +=
>> + mp->stats[lcore_id].get_common_pool_bulk;
>> + sum.get_common_pool_objs +=
>> + mp->stats[lcore_id].get_common_pool_objs;
>> + sum.get_cache_bulk += mp->stats[lcore_id].get_cache_bulk;
>> + sum.get_cache_objs += mp->stats[lcore_id].get_cache_objs;
>> sum.get_success_bulk += mp->stats[lcore_id].get_success_bulk;
>> sum.get_success_objs += mp->stats[lcore_id].get_success_objs;
>> sum.get_fail_bulk += mp->stats[lcore_id].get_fail_bulk;
>> @@ -1254,6 +1266,18 @@ rte_mempool_dump(FILE *f, struct rte_mempool *mp)
>> fprintf(f, " stats:\n");
>> fprintf(f, " put_bulk=%"PRIu64"\n", sum.put_bulk);
>> fprintf(f, " put_objs=%"PRIu64"\n", sum.put_objs);
>> + fprintf(f, " put_common_pool_bulk=%"PRIu64"\n",
>> + sum.put_common_pool_bulk);
>> + fprintf(f, " put_common_pool_objs=%"PRIu64"\n",
>> + sum.put_common_pool_objs);
>> + fprintf(f, " put_cache_bulk=%"PRIu64"\n", sum.put_cache_bulk);
>> + fprintf(f, " put_cache_objs=%"PRIu64"\n", sum.put_cache_objs);
>> + fprintf(f, " get_common_pool_bulk=%"PRIu64"\n",
>> + sum.get_common_pool_bulk);
>> + fprintf(f, " get_common_pool_objs=%"PRIu64"\n",
>> + sum.get_common_pool_objs);
>> + fprintf(f, " get_cache_bulk=%"PRIu64"\n", sum.get_cache_bulk);
>> + fprintf(f, " get_cache_objs=%"PRIu64"\n", sum.get_cache_objs);
>> fprintf(f, " get_success_bulk=%"PRIu64"\n", sum.get_success_bulk);
>> fprintf(f, " get_success_objs=%"PRIu64"\n", sum.get_success_objs);
>> fprintf(f, " get_fail_bulk=%"PRIu64"\n", sum.get_fail_bulk);
>> diff --git a/lib/librte_mempool/rte_mempool.h b/lib/librte_mempool/rte_mempool.h
>> index 848a19226149..0959f8a3f367 100644
>> --- a/lib/librte_mempool/rte_mempool.h
>> +++ b/lib/librte_mempool/rte_mempool.h
>> @@ -66,12 +66,20 @@ extern "C" {
>> * A structure that stores the mempool statistics (per-lcore).
>> */
>> struct rte_mempool_debug_stats {
>> - uint64_t put_bulk; /**< Number of puts. */
>> - uint64_t put_objs; /**< Number of objects successfully put. */
>> - uint64_t get_success_bulk; /**< Successful allocation number. */
>> - uint64_t get_success_objs; /**< Objects successfully allocated. */
>> - uint64_t get_fail_bulk; /**< Failed allocation number. */
>> - uint64_t get_fail_objs; /**< Objects that failed to be allocated. */
>> + uint64_t put_bulk; /**< Number of puts. */
>> + uint64_t put_objs; /**< Number of objects successfully put. */
>> + uint64_t put_common_pool_bulk; /**< Number of bulks enqueued in common pool. */
>> + uint64_t put_common_pool_objs; /**< Number of objects enqueued in common pool. */
>> + uint64_t put_cache_bulk; /**< Number of bulks enqueued in cache. */
>> + uint64_t put_cache_objs; /**< Number of objects enqueued in cache. */
>> + uint64_t get_common_pool_bulk; /**< Number of bulks dequeued from common pool. */
>> + uint64_t get_common_pool_objs; /**< Number of objects dequeued from common pool. */
>> + uint64_t get_cache_bulk; /**< Number of bulks dequeued from cache. */
>> + uint64_t get_cache_objs; /**< Number of objects dequeued from cache. */
>> + uint64_t get_success_bulk; /**< Successful allocation number. */
>> + uint64_t get_success_objs; /**< Objects successfully allocated. */
>> + uint64_t get_fail_bulk; /**< Failed allocation number. */
>> + uint64_t get_fail_objs; /**< Objects that failed to be allocated. */
>
> I missed it the first time, but this changes the size of the
> rte_mempool_debug_stats structure. I think we don't care about this ABI
> breakage because this structure is only defined if
> RTE_LIBRTE_MEMPOOL_DEBUG is set. But just in case, adding Ray as Cc.
Agreed, if it is just a debugging non-default feature.
> About the field themselves, I'm not certain that there is an added value
> to have stats for cache gets and puts. My feeling is that the important
> stat to monitor is the access to common pool, because it is the one that
> highlights a possible performance impact (contention). The cache stats
> are more or less equal to "success + fail - common". Moreover, it will
> simplify the patch and avoid risks of mistakes.
>
> What do you think?
>
>> /** Successful allocation number of contiguous blocks. */
>> uint64_t get_success_blks;
>> /** Failed allocation number of contiguous blocks. */
>> @@ -699,10 +707,18 @@ rte_mempool_ops_dequeue_bulk(struct rte_mempool *mp,
>> void **obj_table, unsigned n)
>> {
>> struct rte_mempool_ops *ops;
>> + int ret;
>>
>> rte_mempool_trace_ops_dequeue_bulk(mp, obj_table, n);
>> ops = rte_mempool_get_ops(mp->ops_index);
>> - return ops->dequeue(mp, obj_table, n);
>> + ret = ops->dequeue(mp, obj_table, n);
>> + if (ret == 0) {
>> + __MEMPOOL_STAT_ADD(mp, get_common_pool_bulk, 1);
>> + __MEMPOOL_STAT_ADD(mp, get_common_pool_objs, n);
>> + __MEMPOOL_STAT_ADD(mp, get_success_bulk, 1);
>> + __MEMPOOL_STAT_ADD(mp, get_success_objs, n);
>> + }
>> + return ret;
>> }
>>
>> /**
>> @@ -749,6 +765,8 @@ rte_mempool_ops_enqueue_bulk(struct rte_mempool *mp, void * const *obj_table,
>> {
>> struct rte_mempool_ops *ops;
>>
>> + __MEMPOOL_STAT_ADD(mp, put_common_pool_bulk, 1);
>> + __MEMPOOL_STAT_ADD(mp, put_common_pool_objs, n);
>> rte_mempool_trace_ops_enqueue_bulk(mp, obj_table, n);
>> ops = rte_mempool_get_ops(mp->ops_index);
>> return ops->enqueue(mp, obj_table, n);
>> @@ -1297,14 +1315,18 @@ __mempool_generic_put(struct rte_mempool *mp, void * const *obj_table,
>>
>> /* Add elements back into the cache */
>> rte_memcpy(&cache_objs[0], obj_table, sizeof(void *) * n);
>> -
>> cache->len += n;
>>
>> + __MEMPOOL_STAT_ADD(mp, put_cache_bulk, 1);
>> +
>> if (cache->len >= cache->flushthresh) {
>> + __MEMPOOL_STAT_ADD(mp, put_cache_objs,
>> + n - (cache->len - cache->size));
>> rte_mempool_ops_enqueue_bulk(mp, &cache->objs[cache->size],
>> cache->len - cache->size);
>> cache->len = cache->size;
>> - }
>> + } else
>> + __MEMPOOL_STAT_ADD(mp, put_cache_objs, n);
>>
>
> In case we keep cache stats, I'd add {} after the else to be consistent
> with the if().
>
>> return;
>>
>> @@ -1438,8 +1460,8 @@ __mempool_generic_get(struct rte_mempool *mp, void **obj_table,
>>
>> cache->len -= n;
>>
>> - __MEMPOOL_STAT_ADD(mp, get_success_bulk, 1);
>> - __MEMPOOL_STAT_ADD(mp, get_success_objs, n);
>> + __MEMPOOL_STAT_ADD(mp, get_cache_bulk, 1);
>> + __MEMPOOL_STAT_ADD(mp, get_cache_objs, n);
>
> In case we keep cache stats, I don't think we should remove get_success
> stats increment. Else, the success stats will never be incremented when
> retrieving objects from the cache.
>
>
>>
>> return 0;
>>
>> @@ -1451,9 +1473,6 @@ __mempool_generic_get(struct rte_mempool *mp, void **obj_table,
>> if (ret < 0) {
>> __MEMPOOL_STAT_ADD(mp, get_fail_bulk, 1);
>> __MEMPOOL_STAT_ADD(mp, get_fail_objs, n);
>> - } else {
>> - __MEMPOOL_STAT_ADD(mp, get_success_bulk, 1);
>> - __MEMPOOL_STAT_ADD(mp, get_success_objs, n);
>> }
>>
>> return ret;
>> --
>> 2.17.1
>>
^ permalink raw reply [relevance 0%]
* [dpdk-dev] [PATCH v1 2/2] common/iavf: fix wrong order of protocol header types
@ 2021-04-23 8:07 3% Ting Xu
0 siblings, 0 replies; 200+ results
From: Ting Xu @ 2021-04-23 8:07 UTC (permalink / raw)
To: dev; +Cc: beilei.xing, jingjing.wu, qi.z.zhang, Ting Xu, stable
The new virtchnl protocol header types for IPv4 and IPv6 fragment are
not added in order, which will break ABI. Move them to the end of the
list.
Signed-off-by: Ting Xu <ting.xu@intel.com>
Fixes: e6a42fd9158b ("common/iavf: add protocol header for IP fragment")
Cc: stable@dpdk.org
---
drivers/common/iavf/virtchnl.h | 15 ++++++++-------
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/drivers/common/iavf/virtchnl.h b/drivers/common/iavf/virtchnl.h
index 139569787f..64c9aa8889 100644
--- a/drivers/common/iavf/virtchnl.h
+++ b/drivers/common/iavf/virtchnl.h
@@ -1415,9 +1415,7 @@ enum virtchnl_proto_hdr_type {
VIRTCHNL_PROTO_HDR_S_VLAN,
VIRTCHNL_PROTO_HDR_C_VLAN,
VIRTCHNL_PROTO_HDR_IPV4,
- VIRTCHNL_PROTO_HDR_IPV4_FRAG,
VIRTCHNL_PROTO_HDR_IPV6,
- VIRTCHNL_PROTO_HDR_IPV6_EH_FRAG,
VIRTCHNL_PROTO_HDR_TCP,
VIRTCHNL_PROTO_HDR_UDP,
VIRTCHNL_PROTO_HDR_SCTP,
@@ -1434,6 +1432,8 @@ enum virtchnl_proto_hdr_type {
VIRTCHNL_PROTO_HDR_ECPRI,
VIRTCHNL_PROTO_HDR_L2TPV2,
VIRTCHNL_PROTO_HDR_PPP,
+ VIRTCHNL_PROTO_HDR_IPV4_FRAG,
+ VIRTCHNL_PROTO_HDR_IPV6_EH_FRAG,
};
/* Protocol header field within a protocol header. */
@@ -1456,8 +1456,6 @@ enum virtchnl_proto_hdr_field {
VIRTCHNL_PROTO_HDR_IPV4_DSCP,
VIRTCHNL_PROTO_HDR_IPV4_TTL,
VIRTCHNL_PROTO_HDR_IPV4_PROT,
- VIRTCHNL_PROTO_HDR_IPV4_FRAG_PKID =
- PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_IPV4_FRAG),
/* IPV6 */
VIRTCHNL_PROTO_HDR_IPV6_SRC =
PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_IPV6),
@@ -1478,9 +1476,6 @@ enum virtchnl_proto_hdr_field {
VIRTCHNL_PROTO_HDR_IPV6_PREFIX64_DST,
VIRTCHNL_PROTO_HDR_IPV6_PREFIX96_SRC,
VIRTCHNL_PROTO_HDR_IPV6_PREFIX96_DST,
- /* IPv6 Extension Header Fragment */
- VIRTCHNL_PROTO_HDR_IPV6_EH_FRAG_PKID =
- PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_IPV6_EH_FRAG),
/* TCP */
VIRTCHNL_PROTO_HDR_TCP_SRC_PORT =
PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_TCP),
@@ -1523,6 +1518,12 @@ enum virtchnl_proto_hdr_field {
VIRTCHNL_PROTO_HDR_ECPRI_MSG_TYPE =
PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_ECPRI),
VIRTCHNL_PROTO_HDR_ECPRI_PC_RTC_ID,
+ /* IPv4 Dummy Fragment */
+ VIRTCHNL_PROTO_HDR_IPV4_FRAG_PKID =
+ PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_IPV4_FRAG),
+ /* IPv6 Extension Fragment */
+ VIRTCHNL_PROTO_HDR_IPV6_EH_FRAG_PKID =
+ PROTO_HDR_FIELD_START(VIRTCHNL_PROTO_HDR_IPV6_EH_FRAG),
};
struct virtchnl_proto_hdr {
--
2.17.1
^ permalink raw reply [relevance 3%]
* [dpdk-dev] [PATCH v1] common/iavf: fix wrong order of protocol header types
@ 2021-04-23 6:13 3% Ting Xu
0 siblings, 0 replies; 200+ results
From: Ting Xu @ 2021-04-23 6:13 UTC (permalink / raw)
To: dev; +Cc: beilei.xing, jingjing.wu, qi.z.zhang, jia.guo, Ting Xu, stable
The new virtchnl protocol header types for IPv4 and IPv6 fragment are
not added in order, which will break ABI. Move them to the end of the
list. Also add PPP and L2TPv2 to align with virtchnl.
Signed-off-by: Ting Xu <ting.xu@intel.com>
Fixes: e6a42fd9158b ("common/iavf: add protocol header for IP fragment")
Cc: stable@dpdk.org
---
drivers/common/iavf/virtchnl.h | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/common/iavf/virtchnl.h b/drivers/common/iavf/virtchnl.h
index e3eb767d66..157230e99b 100644
--- a/drivers/common/iavf/virtchnl.h
+++ b/drivers/common/iavf/virtchnl.h
@@ -1415,9 +1415,7 @@ enum virtchnl_proto_hdr_type {
VIRTCHNL_PROTO_HDR_S_VLAN,
VIRTCHNL_PROTO_HDR_C_VLAN,
VIRTCHNL_PROTO_HDR_IPV4,
- VIRTCHNL_PROTO_HDR_IPV4_FRAG,
VIRTCHNL_PROTO_HDR_IPV6,
- VIRTCHNL_PROTO_HDR_IPV6_EH_FRAG,
VIRTCHNL_PROTO_HDR_TCP,
VIRTCHNL_PROTO_HDR_UDP,
VIRTCHNL_PROTO_HDR_SCTP,
@@ -1432,6 +1430,10 @@ enum virtchnl_proto_hdr_type {
VIRTCHNL_PROTO_HDR_PFCP,
VIRTCHNL_PROTO_HDR_GTPC,
VIRTCHNL_PROTO_HDR_ECPRI,
+ VIRTCHNL_PROTO_HDR_L2TPV2,
+ VIRTCHNL_PROTO_HDR_PPP,
+ VIRTCHNL_PROTO_HDR_IPV4_FRAG,
+ VIRTCHNL_PROTO_HDR_IPV6_EH_FRAG,
};
/* Protocol header field within a protocol header. */
--
2.17.1
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [PATCH v3 2/2] lib/mempool: distinguish debug counters from cache and pool
2021-04-22 21:27 0% ` Dharmik Thakkar
@ 2021-04-22 21:47 0% ` Honnappa Nagarahalli
0 siblings, 0 replies; 200+ results
From: Honnappa Nagarahalli @ 2021-04-22 21:47 UTC (permalink / raw)
To: Dharmik Thakkar, Olivier Matz
Cc: Andrew Rybchenko, dev, nd, Joyce Kong, Kinsella, Ray,
Honnappa Nagarahalli, nd
<snip>
> >> diff --git a/lib/librte_mempool/rte_mempool.h
> >> b/lib/librte_mempool/rte_mempool.h
> >> index 848a19226149..0959f8a3f367 100644
> >> --- a/lib/librte_mempool/rte_mempool.h
> >> +++ b/lib/librte_mempool/rte_mempool.h
> >> @@ -66,12 +66,20 @@ extern "C" {
> >> * A structure that stores the mempool statistics (per-lcore).
> >> */
> >> struct rte_mempool_debug_stats {
> >> -uint64_t put_bulk; /**< Number of puts. */
> >> -uint64_t put_objs; /**< Number of objects successfully put. */
> >> -uint64_t get_success_bulk; /**< Successful allocation number. */
> >> -uint64_t get_success_objs; /**< Objects successfully allocated. */
> >> -uint64_t get_fail_bulk; /**< Failed allocation number. */
> >> -uint64_t get_fail_objs; /**< Objects that failed to be allocated. */
> >> +uint64_t put_bulk; /**< Number of puts. */ uint64_t put_objs; /**<
> >> +Number of objects successfully put. */ uint64_t
> >> +put_common_pool_bulk; /**< Number of bulks enqueued in common
> pool.
> >> +*/ uint64_t put_common_pool_objs; /**< Number of objects enqueued
> >> +in common pool. */ uint64_t put_cache_bulk; /**< Number of bulks
> >> +enqueued in cache. */ uint64_t put_cache_objs; /**< Number of objects
> enqueued in cache. */
> >> +uint64_t get_common_pool_bulk; /**< Number of bulks dequeued from
> common pool. */
> >> +uint64_t get_common_pool_objs; /**< Number of objects dequeued from
> >> +common pool. */ uint64_t get_cache_bulk; /**< Number of bulks
> >> +dequeued from cache. */ uint64_t get_cache_objs; /**< Number of
> >> +objects dequeued from cache. */ uint64_t get_success_bulk; /**<
> >> +Successful allocation number. */ uint64_t get_success_objs; /**<
> >> +Objects successfully allocated. */ uint64_t get_fail_bulk; /**<
> >> +Failed allocation number. */ uint64_t get_fail_objs; /**< Objects
> >> +that failed to be allocated. */
> >
> > I missed it the first time, but this changes the size of the
> > rte_mempool_debug_stats structure. I think we don't care about this
> > ABI breakage because this structure is only defined if
> > RTE_LIBRTE_MEMPOOL_DEBUG is set. But just in case, adding Ray as Cc.
>
> Agreed, thank you!
>
> >
> > About the field themselves, I'm not certain that there is an added
> > value to have stats for cache gets and puts. My feeling is that the
> > important stat to monitor is the access to common pool, because it is
> > the one that highlights a possible performance impact (contention).
> > The cache stats are more or less equal to "success + fail - common".
> > Moreover, it will simplify the patch and avoid risks of mistakes.
> >
> > What do you think?
Agree as well. Can you please add a comment making a note of this in the stats structure?
>
> Yes, I think the cache stats can be removed.
> Also, please correct me if I’m wrong; but, in my understanding, the cache stats
> are equal to “success - common”. Is adding “fail” required?
>
> >
<snip>
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH v3 2/2] lib/mempool: distinguish debug counters from cache and pool
2021-04-21 16:29 3% ` Olivier Matz
@ 2021-04-22 21:27 0% ` Dharmik Thakkar
2021-04-22 21:47 0% ` Honnappa Nagarahalli
2021-04-23 10:41 0% ` Kinsella, Ray
1 sibling, 1 reply; 200+ results
From: Dharmik Thakkar @ 2021-04-22 21:27 UTC (permalink / raw)
To: Olivier Matz
Cc: Andrew Rybchenko, dev, nd, Joyce Kong, Kinsella, Ray,
Honnappa Nagarahalli
Hi Olivier,
Thank you for your comments!
> On Apr 21, 2021, at 11:29 AM, Olivier Matz <olivier.matz@6wind.com> wrote:
>
> Hi Dharmik,
>
> Please see some comments below.
>
> On Mon, Apr 19, 2021 at 07:08:00PM -0500, Dharmik Thakkar wrote:
>> From: Joyce Kong <joyce.kong@arm.com>
>>
>> If cache is enabled, objects will be retrieved/put from/to cache,
>> subsequently from/to the common pool. Now the debug stats calculate
>> the objects retrieved/put from/to cache and pool together, it is
>> better to distinguish them.
>>
>> Signed-off-by: Joyce Kong <joyce.kong@arm.com>
>> Signed-off-by: Dharmik Thakkar <dharmik.thakkar@arm.com>
>> Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
>> Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
>> ---
>> lib/librte_mempool/rte_mempool.c | 24 ++++++++++++++++
>> lib/librte_mempool/rte_mempool.h | 47 ++++++++++++++++++++++----------
>> 2 files changed, 57 insertions(+), 14 deletions(-)
>>
>> diff --git a/lib/librte_mempool/rte_mempool.c b/lib/librte_mempool/rte_mempool.c
>> index afb1239c8d48..339f14455624 100644
>> --- a/lib/librte_mempool/rte_mempool.c
>> +++ b/lib/librte_mempool/rte_mempool.c
>> @@ -1244,6 +1244,18 @@ rte_mempool_dump(FILE *f, struct rte_mempool *mp)
>> for (lcore_id = 0; lcore_id < RTE_MAX_LCORE; lcore_id++) {
>> sum.put_bulk += mp->stats[lcore_id].put_bulk;
>> sum.put_objs += mp->stats[lcore_id].put_objs;
>> + sum.put_common_pool_bulk +=
>> + mp->stats[lcore_id].put_common_pool_bulk;
>> + sum.put_common_pool_objs +=
>> + mp->stats[lcore_id].put_common_pool_objs;
>> + sum.put_cache_bulk += mp->stats[lcore_id].put_cache_bulk;
>> + sum.put_cache_objs += mp->stats[lcore_id].put_cache_objs;
>> + sum.get_common_pool_bulk +=
>> + mp->stats[lcore_id].get_common_pool_bulk;
>> + sum.get_common_pool_objs +=
>> + mp->stats[lcore_id].get_common_pool_objs;
>> + sum.get_cache_bulk += mp->stats[lcore_id].get_cache_bulk;
>> + sum.get_cache_objs += mp->stats[lcore_id].get_cache_objs;
>> sum.get_success_bulk += mp->stats[lcore_id].get_success_bulk;
>> sum.get_success_objs += mp->stats[lcore_id].get_success_objs;
>> sum.get_fail_bulk += mp->stats[lcore_id].get_fail_bulk;
>> @@ -1254,6 +1266,18 @@ rte_mempool_dump(FILE *f, struct rte_mempool *mp)
>> fprintf(f, " stats:\n");
>> fprintf(f, " put_bulk=%"PRIu64"\n", sum.put_bulk);
>> fprintf(f, " put_objs=%"PRIu64"\n", sum.put_objs);
>> + fprintf(f, " put_common_pool_bulk=%"PRIu64"\n",
>> + sum.put_common_pool_bulk);
>> + fprintf(f, " put_common_pool_objs=%"PRIu64"\n",
>> + sum.put_common_pool_objs);
>> + fprintf(f, " put_cache_bulk=%"PRIu64"\n", sum.put_cache_bulk);
>> + fprintf(f, " put_cache_objs=%"PRIu64"\n", sum.put_cache_objs);
>> + fprintf(f, " get_common_pool_bulk=%"PRIu64"\n",
>> + sum.get_common_pool_bulk);
>> + fprintf(f, " get_common_pool_objs=%"PRIu64"\n",
>> + sum.get_common_pool_objs);
>> + fprintf(f, " get_cache_bulk=%"PRIu64"\n", sum.get_cache_bulk);
>> + fprintf(f, " get_cache_objs=%"PRIu64"\n", sum.get_cache_objs);
>> fprintf(f, " get_success_bulk=%"PRIu64"\n", sum.get_success_bulk);
>> fprintf(f, " get_success_objs=%"PRIu64"\n", sum.get_success_objs);
>> fprintf(f, " get_fail_bulk=%"PRIu64"\n", sum.get_fail_bulk);
>> diff --git a/lib/librte_mempool/rte_mempool.h b/lib/librte_mempool/rte_mempool.h
>> index 848a19226149..0959f8a3f367 100644
>> --- a/lib/librte_mempool/rte_mempool.h
>> +++ b/lib/librte_mempool/rte_mempool.h
>> @@ -66,12 +66,20 @@ extern "C" {
>> * A structure that stores the mempool statistics (per-lcore).
>> */
>> struct rte_mempool_debug_stats {
>> - uint64_t put_bulk; /**< Number of puts. */
>> - uint64_t put_objs; /**< Number of objects successfully put. */
>> - uint64_t get_success_bulk; /**< Successful allocation number. */
>> - uint64_t get_success_objs; /**< Objects successfully allocated. */
>> - uint64_t get_fail_bulk; /**< Failed allocation number. */
>> - uint64_t get_fail_objs; /**< Objects that failed to be allocated. */
>> + uint64_t put_bulk; /**< Number of puts. */
>> + uint64_t put_objs; /**< Number of objects successfully put. */
>> + uint64_t put_common_pool_bulk; /**< Number of bulks enqueued in common pool. */
>> + uint64_t put_common_pool_objs; /**< Number of objects enqueued in common pool. */
>> + uint64_t put_cache_bulk; /**< Number of bulks enqueued in cache. */
>> + uint64_t put_cache_objs; /**< Number of objects enqueued in cache. */
>> + uint64_t get_common_pool_bulk; /**< Number of bulks dequeued from common pool. */
>> + uint64_t get_common_pool_objs; /**< Number of objects dequeued from common pool. */
>> + uint64_t get_cache_bulk; /**< Number of bulks dequeued from cache. */
>> + uint64_t get_cache_objs; /**< Number of objects dequeued from cache. */
>> + uint64_t get_success_bulk; /**< Successful allocation number. */
>> + uint64_t get_success_objs; /**< Objects successfully allocated. */
>> + uint64_t get_fail_bulk; /**< Failed allocation number. */
>> + uint64_t get_fail_objs; /**< Objects that failed to be allocated. */
>
> I missed it the first time, but this changes the size of the
> rte_mempool_debug_stats structure. I think we don't care about this ABI
> breakage because this structure is only defined if
> RTE_LIBRTE_MEMPOOL_DEBUG is set. But just in case, adding Ray as Cc.
Agreed, thank you!
>
> About the field themselves, I'm not certain that there is an added value
> to have stats for cache gets and puts. My feeling is that the important
> stat to monitor is the access to common pool, because it is the one that
> highlights a possible performance impact (contention). The cache stats
> are more or less equal to "success + fail - common". Moreover, it will
> simplify the patch and avoid risks of mistakes.
>
> What do you think?
Yes, I think the cache stats can be removed.
Also, please correct me if I’m wrong; but, in my understanding,
the cache stats are equal to “success - common”. Is adding “fail” required?
>
>> /** Successful allocation number of contiguous blocks. */
>> uint64_t get_success_blks;
>> /** Failed allocation number of contiguous blocks. */
>> @@ -699,10 +707,18 @@ rte_mempool_ops_dequeue_bulk(struct rte_mempool *mp,
>> void **obj_table, unsigned n)
>> {
>> struct rte_mempool_ops *ops;
>> + int ret;
>>
>> rte_mempool_trace_ops_dequeue_bulk(mp, obj_table, n);
>> ops = rte_mempool_get_ops(mp->ops_index);
>> - return ops->dequeue(mp, obj_table, n);
>> + ret = ops->dequeue(mp, obj_table, n);
>> + if (ret == 0) {
>> + __MEMPOOL_STAT_ADD(mp, get_common_pool_bulk, 1);
>> + __MEMPOOL_STAT_ADD(mp, get_common_pool_objs, n);
>> + __MEMPOOL_STAT_ADD(mp, get_success_bulk, 1);
>> + __MEMPOOL_STAT_ADD(mp, get_success_objs, n);
>> + }
>> + return ret;
>> }
>>
>> /**
>> @@ -749,6 +765,8 @@ rte_mempool_ops_enqueue_bulk(struct rte_mempool *mp, void * const *obj_table,
>> {
>> struct rte_mempool_ops *ops;
>>
>> + __MEMPOOL_STAT_ADD(mp, put_common_pool_bulk, 1);
>> + __MEMPOOL_STAT_ADD(mp, put_common_pool_objs, n);
>> rte_mempool_trace_ops_enqueue_bulk(mp, obj_table, n);
>> ops = rte_mempool_get_ops(mp->ops_index);
>> return ops->enqueue(mp, obj_table, n);
>> @@ -1297,14 +1315,18 @@ __mempool_generic_put(struct rte_mempool *mp, void * const *obj_table,
>>
>> /* Add elements back into the cache */
>> rte_memcpy(&cache_objs[0], obj_table, sizeof(void *) * n);
>> -
>> cache->len += n;
>>
>> + __MEMPOOL_STAT_ADD(mp, put_cache_bulk, 1);
>> +
>> if (cache->len >= cache->flushthresh) {
>> + __MEMPOOL_STAT_ADD(mp, put_cache_objs,
>> + n - (cache->len - cache->size));
>> rte_mempool_ops_enqueue_bulk(mp, &cache->objs[cache->size],
>> cache->len - cache->size);
>> cache->len = cache->size;
>> - }
>> + } else
>> + __MEMPOOL_STAT_ADD(mp, put_cache_objs, n);
>>
>
> In case we keep cache stats, I'd add {} after the else to be consistent
> with the if().
Ack.
>
>> return;
>>
>> @@ -1438,8 +1460,8 @@ __mempool_generic_get(struct rte_mempool *mp, void **obj_table,
>>
>> cache->len -= n;
>>
>> - __MEMPOOL_STAT_ADD(mp, get_success_bulk, 1);
>> - __MEMPOOL_STAT_ADD(mp, get_success_objs, n);
>> + __MEMPOOL_STAT_ADD(mp, get_cache_bulk, 1);
>> + __MEMPOOL_STAT_ADD(mp, get_cache_objs, n);
>
> In case we keep cache stats, I don't think we should remove get_success
> stats increment. Else, the success stats will never be incremented when
> retrieving objects from the cache.
>
Good catch. Thanks!
>
>>
>> return 0;
>>
>> @@ -1451,9 +1473,6 @@ __mempool_generic_get(struct rte_mempool *mp, void **obj_table,
>> if (ret < 0) {
>> __MEMPOOL_STAT_ADD(mp, get_fail_bulk, 1);
>> __MEMPOOL_STAT_ADD(mp, get_fail_objs, n);
>> - } else {
>> - __MEMPOOL_STAT_ADD(mp, get_success_bulk, 1);
>> - __MEMPOOL_STAT_ADD(mp, get_success_objs, n);
>> }
>>
>> return ret;
>> --
>> 2.17.1
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH v3 2/2] lib/mempool: distinguish debug counters from cache and pool
@ 2021-04-21 16:29 3% ` Olivier Matz
2021-04-22 21:27 0% ` Dharmik Thakkar
2021-04-23 10:41 0% ` Kinsella, Ray
0 siblings, 2 replies; 200+ results
From: Olivier Matz @ 2021-04-21 16:29 UTC (permalink / raw)
To: Dharmik Thakkar; +Cc: Andrew Rybchenko, dev, nd, joyce.kong, Kinsella, Ray
Hi Dharmik,
Please see some comments below.
On Mon, Apr 19, 2021 at 07:08:00PM -0500, Dharmik Thakkar wrote:
> From: Joyce Kong <joyce.kong@arm.com>
>
> If cache is enabled, objects will be retrieved/put from/to cache,
> subsequently from/to the common pool. Now the debug stats calculate
> the objects retrieved/put from/to cache and pool together, it is
> better to distinguish them.
>
> Signed-off-by: Joyce Kong <joyce.kong@arm.com>
> Signed-off-by: Dharmik Thakkar <dharmik.thakkar@arm.com>
> Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
> Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
> ---
> lib/librte_mempool/rte_mempool.c | 24 ++++++++++++++++
> lib/librte_mempool/rte_mempool.h | 47 ++++++++++++++++++++++----------
> 2 files changed, 57 insertions(+), 14 deletions(-)
>
> diff --git a/lib/librte_mempool/rte_mempool.c b/lib/librte_mempool/rte_mempool.c
> index afb1239c8d48..339f14455624 100644
> --- a/lib/librte_mempool/rte_mempool.c
> +++ b/lib/librte_mempool/rte_mempool.c
> @@ -1244,6 +1244,18 @@ rte_mempool_dump(FILE *f, struct rte_mempool *mp)
> for (lcore_id = 0; lcore_id < RTE_MAX_LCORE; lcore_id++) {
> sum.put_bulk += mp->stats[lcore_id].put_bulk;
> sum.put_objs += mp->stats[lcore_id].put_objs;
> + sum.put_common_pool_bulk +=
> + mp->stats[lcore_id].put_common_pool_bulk;
> + sum.put_common_pool_objs +=
> + mp->stats[lcore_id].put_common_pool_objs;
> + sum.put_cache_bulk += mp->stats[lcore_id].put_cache_bulk;
> + sum.put_cache_objs += mp->stats[lcore_id].put_cache_objs;
> + sum.get_common_pool_bulk +=
> + mp->stats[lcore_id].get_common_pool_bulk;
> + sum.get_common_pool_objs +=
> + mp->stats[lcore_id].get_common_pool_objs;
> + sum.get_cache_bulk += mp->stats[lcore_id].get_cache_bulk;
> + sum.get_cache_objs += mp->stats[lcore_id].get_cache_objs;
> sum.get_success_bulk += mp->stats[lcore_id].get_success_bulk;
> sum.get_success_objs += mp->stats[lcore_id].get_success_objs;
> sum.get_fail_bulk += mp->stats[lcore_id].get_fail_bulk;
> @@ -1254,6 +1266,18 @@ rte_mempool_dump(FILE *f, struct rte_mempool *mp)
> fprintf(f, " stats:\n");
> fprintf(f, " put_bulk=%"PRIu64"\n", sum.put_bulk);
> fprintf(f, " put_objs=%"PRIu64"\n", sum.put_objs);
> + fprintf(f, " put_common_pool_bulk=%"PRIu64"\n",
> + sum.put_common_pool_bulk);
> + fprintf(f, " put_common_pool_objs=%"PRIu64"\n",
> + sum.put_common_pool_objs);
> + fprintf(f, " put_cache_bulk=%"PRIu64"\n", sum.put_cache_bulk);
> + fprintf(f, " put_cache_objs=%"PRIu64"\n", sum.put_cache_objs);
> + fprintf(f, " get_common_pool_bulk=%"PRIu64"\n",
> + sum.get_common_pool_bulk);
> + fprintf(f, " get_common_pool_objs=%"PRIu64"\n",
> + sum.get_common_pool_objs);
> + fprintf(f, " get_cache_bulk=%"PRIu64"\n", sum.get_cache_bulk);
> + fprintf(f, " get_cache_objs=%"PRIu64"\n", sum.get_cache_objs);
> fprintf(f, " get_success_bulk=%"PRIu64"\n", sum.get_success_bulk);
> fprintf(f, " get_success_objs=%"PRIu64"\n", sum.get_success_objs);
> fprintf(f, " get_fail_bulk=%"PRIu64"\n", sum.get_fail_bulk);
> diff --git a/lib/librte_mempool/rte_mempool.h b/lib/librte_mempool/rte_mempool.h
> index 848a19226149..0959f8a3f367 100644
> --- a/lib/librte_mempool/rte_mempool.h
> +++ b/lib/librte_mempool/rte_mempool.h
> @@ -66,12 +66,20 @@ extern "C" {
> * A structure that stores the mempool statistics (per-lcore).
> */
> struct rte_mempool_debug_stats {
> - uint64_t put_bulk; /**< Number of puts. */
> - uint64_t put_objs; /**< Number of objects successfully put. */
> - uint64_t get_success_bulk; /**< Successful allocation number. */
> - uint64_t get_success_objs; /**< Objects successfully allocated. */
> - uint64_t get_fail_bulk; /**< Failed allocation number. */
> - uint64_t get_fail_objs; /**< Objects that failed to be allocated. */
> + uint64_t put_bulk; /**< Number of puts. */
> + uint64_t put_objs; /**< Number of objects successfully put. */
> + uint64_t put_common_pool_bulk; /**< Number of bulks enqueued in common pool. */
> + uint64_t put_common_pool_objs; /**< Number of objects enqueued in common pool. */
> + uint64_t put_cache_bulk; /**< Number of bulks enqueued in cache. */
> + uint64_t put_cache_objs; /**< Number of objects enqueued in cache. */
> + uint64_t get_common_pool_bulk; /**< Number of bulks dequeued from common pool. */
> + uint64_t get_common_pool_objs; /**< Number of objects dequeued from common pool. */
> + uint64_t get_cache_bulk; /**< Number of bulks dequeued from cache. */
> + uint64_t get_cache_objs; /**< Number of objects dequeued from cache. */
> + uint64_t get_success_bulk; /**< Successful allocation number. */
> + uint64_t get_success_objs; /**< Objects successfully allocated. */
> + uint64_t get_fail_bulk; /**< Failed allocation number. */
> + uint64_t get_fail_objs; /**< Objects that failed to be allocated. */
I missed it the first time, but this changes the size of the
rte_mempool_debug_stats structure. I think we don't care about this ABI
breakage because this structure is only defined if
RTE_LIBRTE_MEMPOOL_DEBUG is set. But just in case, adding Ray as Cc.
About the field themselves, I'm not certain that there is an added value
to have stats for cache gets and puts. My feeling is that the important
stat to monitor is the access to common pool, because it is the one that
highlights a possible performance impact (contention). The cache stats
are more or less equal to "success + fail - common". Moreover, it will
simplify the patch and avoid risks of mistakes.
What do you think?
> /** Successful allocation number of contiguous blocks. */
> uint64_t get_success_blks;
> /** Failed allocation number of contiguous blocks. */
> @@ -699,10 +707,18 @@ rte_mempool_ops_dequeue_bulk(struct rte_mempool *mp,
> void **obj_table, unsigned n)
> {
> struct rte_mempool_ops *ops;
> + int ret;
>
> rte_mempool_trace_ops_dequeue_bulk(mp, obj_table, n);
> ops = rte_mempool_get_ops(mp->ops_index);
> - return ops->dequeue(mp, obj_table, n);
> + ret = ops->dequeue(mp, obj_table, n);
> + if (ret == 0) {
> + __MEMPOOL_STAT_ADD(mp, get_common_pool_bulk, 1);
> + __MEMPOOL_STAT_ADD(mp, get_common_pool_objs, n);
> + __MEMPOOL_STAT_ADD(mp, get_success_bulk, 1);
> + __MEMPOOL_STAT_ADD(mp, get_success_objs, n);
> + }
> + return ret;
> }
>
> /**
> @@ -749,6 +765,8 @@ rte_mempool_ops_enqueue_bulk(struct rte_mempool *mp, void * const *obj_table,
> {
> struct rte_mempool_ops *ops;
>
> + __MEMPOOL_STAT_ADD(mp, put_common_pool_bulk, 1);
> + __MEMPOOL_STAT_ADD(mp, put_common_pool_objs, n);
> rte_mempool_trace_ops_enqueue_bulk(mp, obj_table, n);
> ops = rte_mempool_get_ops(mp->ops_index);
> return ops->enqueue(mp, obj_table, n);
> @@ -1297,14 +1315,18 @@ __mempool_generic_put(struct rte_mempool *mp, void * const *obj_table,
>
> /* Add elements back into the cache */
> rte_memcpy(&cache_objs[0], obj_table, sizeof(void *) * n);
> -
> cache->len += n;
>
> + __MEMPOOL_STAT_ADD(mp, put_cache_bulk, 1);
> +
> if (cache->len >= cache->flushthresh) {
> + __MEMPOOL_STAT_ADD(mp, put_cache_objs,
> + n - (cache->len - cache->size));
> rte_mempool_ops_enqueue_bulk(mp, &cache->objs[cache->size],
> cache->len - cache->size);
> cache->len = cache->size;
> - }
> + } else
> + __MEMPOOL_STAT_ADD(mp, put_cache_objs, n);
>
In case we keep cache stats, I'd add {} after the else to be consistent
with the if().
> return;
>
> @@ -1438,8 +1460,8 @@ __mempool_generic_get(struct rte_mempool *mp, void **obj_table,
>
> cache->len -= n;
>
> - __MEMPOOL_STAT_ADD(mp, get_success_bulk, 1);
> - __MEMPOOL_STAT_ADD(mp, get_success_objs, n);
> + __MEMPOOL_STAT_ADD(mp, get_cache_bulk, 1);
> + __MEMPOOL_STAT_ADD(mp, get_cache_objs, n);
In case we keep cache stats, I don't think we should remove get_success
stats increment. Else, the success stats will never be incremented when
retrieving objects from the cache.
>
> return 0;
>
> @@ -1451,9 +1473,6 @@ __mempool_generic_get(struct rte_mempool *mp, void **obj_table,
> if (ret < 0) {
> __MEMPOOL_STAT_ADD(mp, get_fail_bulk, 1);
> __MEMPOOL_STAT_ADD(mp, get_fail_objs, n);
> - } else {
> - __MEMPOOL_STAT_ADD(mp, get_success_bulk, 1);
> - __MEMPOOL_STAT_ADD(mp, get_success_objs, n);
> }
>
> return ret;
> --
> 2.17.1
>
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [dpdk-ci] UNH-IOL ABI Failures
2021-04-20 15:37 4% ` [dpdk-dev] [dpdk-ci] " Thomas Monjalon
@ 2021-04-20 17:02 7% ` Brandon Lo
0 siblings, 0 replies; 200+ results
From: Brandon Lo @ 2021-04-20 17:02 UTC (permalink / raw)
To: Thomas Monjalon; +Cc: dev, ci
Okay, I am updating the ABI version on the machines and rerunning the
affected patches.
I had mistakenly installed libabigail 1.6 since that was the default
in the linux-build.sh script.
Thanks,
Brandon
On Tue, Apr 20, 2021 at 11:37 AM Thomas Monjalon <thomas@monjalon.net> wrote:
>
> 20/04/2021 17:30, Brandon Lo:
> > Hi all,
> >
> > We have noticed some failures occurring repeatedly in our CI system
> > regarding the ABI test.
> >
> > I looked into the failures and saw that there were some failures
> > caused by a clock skew issue on the ARM ABI test.
> > Those failures have been rerun and the report will be resent to
> > patchworks for the updated result.
> >
> > However, the earlier test runs seem to report an actual failure:
> >
> > "1 function with some indirect sub-type change:
> >
> > [C]'function rte_security_session*
> > rte_security_session_create(rte_security_ctx*,
> > rte_security_session_conf*, rte_mempool*, rte_mempool*)' at
> > rte_security.c:43:1 has some indirect sub-type changes:
> > parameter 2 of type 'rte_security_session_conf*' has sub-type changes:
> > in pointed to type 'struct rte_security_session_conf' at
> > rte_security.h:366:1:
> > type size hasn't changed
> > 1 data member change:
> > type of 'rte_crypto_sym_xform*
> > rte_security_session_conf::crypto_xform' changed:
> > in pointed to type 'struct rte_crypto_sym_xform' at
> > rte_crypto_sym.h:575:1:
> > type size hasn't changed
> > 1 data member changes (1 filtered):
> >
> > Error: ABI issue reported for 'abidiff --suppr
> > dpdk/devtools/libabigail.abignore --no-added-syms --headers-dir1
> > reference/usr/local/include --headers-dir2 build/usr/local/include
> > reference/dump/librte_security.dump build/dump/librte_security.dump'
> >
> > ABIDIFF_ABI_CHANGE, this change requires a review (abidiff flagged
> > this as a potential issue)."
> >
> > Can anyone please confirm that this is a real ABI issue or if this
> > requires a change on the UNH-IOL side.
>
> It requires libabigail 1.8 on UNH-IOL side.
>
>
>
--
Brandon Lo
UNH InterOperability Laboratory
21 Madbury Rd, Suite 100, Durham, NH 03824
blo@iol.unh.edu
www.iol.unh.edu
^ permalink raw reply [relevance 7%]
* Re: [dpdk-dev] [dpdk-ci] UNH-IOL ABI Failures
2021-04-20 15:30 9% [dpdk-dev] UNH-IOL ABI Failures Brandon Lo
@ 2021-04-20 15:37 4% ` Thomas Monjalon
2021-04-20 17:02 7% ` Brandon Lo
0 siblings, 1 reply; 200+ results
From: Thomas Monjalon @ 2021-04-20 15:37 UTC (permalink / raw)
To: Brandon Lo; +Cc: dev, ci
20/04/2021 17:30, Brandon Lo:
> Hi all,
>
> We have noticed some failures occurring repeatedly in our CI system
> regarding the ABI test.
>
> I looked into the failures and saw that there were some failures
> caused by a clock skew issue on the ARM ABI test.
> Those failures have been rerun and the report will be resent to
> patchworks for the updated result.
>
> However, the earlier test runs seem to report an actual failure:
>
> "1 function with some indirect sub-type change:
>
> [C]'function rte_security_session*
> rte_security_session_create(rte_security_ctx*,
> rte_security_session_conf*, rte_mempool*, rte_mempool*)' at
> rte_security.c:43:1 has some indirect sub-type changes:
> parameter 2 of type 'rte_security_session_conf*' has sub-type changes:
> in pointed to type 'struct rte_security_session_conf' at
> rte_security.h:366:1:
> type size hasn't changed
> 1 data member change:
> type of 'rte_crypto_sym_xform*
> rte_security_session_conf::crypto_xform' changed:
> in pointed to type 'struct rte_crypto_sym_xform' at
> rte_crypto_sym.h:575:1:
> type size hasn't changed
> 1 data member changes (1 filtered):
>
> Error: ABI issue reported for 'abidiff --suppr
> dpdk/devtools/libabigail.abignore --no-added-syms --headers-dir1
> reference/usr/local/include --headers-dir2 build/usr/local/include
> reference/dump/librte_security.dump build/dump/librte_security.dump'
>
> ABIDIFF_ABI_CHANGE, this change requires a review (abidiff flagged
> this as a potential issue)."
>
> Can anyone please confirm that this is a real ABI issue or if this
> requires a change on the UNH-IOL side.
It requires libabigail 1.8 on UNH-IOL side.
^ permalink raw reply [relevance 4%]
* [dpdk-dev] UNH-IOL ABI Failures
@ 2021-04-20 15:30 9% Brandon Lo
2021-04-20 15:37 4% ` [dpdk-dev] [dpdk-ci] " Thomas Monjalon
0 siblings, 1 reply; 200+ results
From: Brandon Lo @ 2021-04-20 15:30 UTC (permalink / raw)
To: dev, ci
Hi all,
We have noticed some failures occurring repeatedly in our CI system
regarding the ABI test.
I looked into the failures and saw that there were some failures
caused by a clock skew issue on the ARM ABI test.
Those failures have been rerun and the report will be resent to
patchworks for the updated result.
However, the earlier test runs seem to report an actual failure:
"1 function with some indirect sub-type change:
[C]'function rte_security_session*
rte_security_session_create(rte_security_ctx*,
rte_security_session_conf*, rte_mempool*, rte_mempool*)' at
rte_security.c:43:1 has some indirect sub-type changes:
parameter 2 of type 'rte_security_session_conf*' has sub-type changes:
in pointed to type 'struct rte_security_session_conf' at
rte_security.h:366:1:
type size hasn't changed
1 data member change:
type of 'rte_crypto_sym_xform*
rte_security_session_conf::crypto_xform' changed:
in pointed to type 'struct rte_crypto_sym_xform' at
rte_crypto_sym.h:575:1:
type size hasn't changed
1 data member changes (1 filtered):
Error: ABI issue reported for 'abidiff --suppr
dpdk/devtools/libabigail.abignore --no-added-syms --headers-dir1
reference/usr/local/include --headers-dir2 build/usr/local/include
reference/dump/librte_security.dump build/dump/librte_security.dump'
ABIDIFF_ABI_CHANGE, this change requires a review (abidiff flagged
this as a potential issue)."
Can anyone please confirm that this is a real ABI issue or if this
requires a change on the UNH-IOL side.
Thanks,
Brandon
--
Brandon Lo
UNH InterOperability Laboratory
21 Madbury Rd, Suite 100, Durham, NH 03824
blo@iol.unh.edu
www.iol.unh.edu
^ permalink raw reply [relevance 9%]
* [dpdk-dev] [PATCH v2 14/16] lib: remove librte_ prefix from directory names
@ 2021-04-20 10:22 1% ` Bruce Richardson
0 siblings, 0 replies; 200+ results
From: Bruce Richardson @ 2021-04-20 10:22 UTC (permalink / raw)
To: dev
Cc: Bruce Richardson, Thomas Monjalon, Anatoly Burakov, Ciara Power,
Jan Viktorin, Ruifeng Wang, Jerin Jacob, Ray Kinsella,
Neil Horman, Erik Gabriel Carrillo, Cristian Dumitrescu,
Jasvinder Singh, Nipun Gupta, Hemant Agrawal, Matan Azrad,
Shahaf Shuler, Viacheslav Ovsiienko, Jay Zhou, Ferruh Yigit,
Konstantin Ananyev, David Christensen, Nicolas Chautru,
Olivier Matz, Fiona Trahe, Ashish Gupta, Declan Doherty,
David Hunt, Sunil Kumar Kori, Mattias Rönnblom,
Harry van Haaren, Harman Kalra, Honnappa Nagarahalli, Joyce Kong,
Dmitry Kozlyuk, Narcisa Ana Maria Vasile, Dmitry Malloy,
Pallavi Kadam, Byron Marohn, Yipeng Wang, Andrew Rybchenko,
Ori Kam, Abhinandan Gujjar, Jay Jayatheerthan,
Vladimir Medvedkin, Bernard Iremonger, Kiran Kumar K,
Nithin Dabilpuram, Jiayu Hu, Sameh Gobriel, Reshma Pattan,
Pavan Nikhilesh, Gaetan Rivet, Akhil Goyal, Robert Sanford,
Maxime Coquelin, Chenbo Xia
There is no reason for the DPDK libraries to all have 'librte_' prefix on
the directory names. This prefix makes the directory names longer and also
makes it awkward to add features referring to individual libraries in the
build - should the lib names be specified with or without the prefix.
Therefore, we can just remove the library prefix and use the library's
unique name as the directory name, i.e. 'eal' rather than 'librte_eal'
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
---
MAINTAINERS | 210 +++++++++---------
app/test/test_eal_fs.c | 2 +-
app/test/test_memzone.c | 2 +-
app/test/test_telemetry_json.c | 2 +-
config/arm/meson.build | 2 +-
devtools/build-tags.sh | 14 +-
doc/api/doxy-api.conf.in | 104 ++++-----
doc/guides/contributing/abi_versioning.rst | 12 +-
doc/guides/contributing/coding_style.rst | 4 +-
doc/guides/contributing/documentation.rst | 10 +-
doc/guides/prog_guide/event_timer_adapter.rst | 2 +-
doc/guides/prog_guide/qos_framework.rst | 4 +-
doc/guides/prog_guide/rawdev.rst | 2 +-
doc/guides/rel_notes/known_issues.rst | 2 +-
drivers/common/mlx5/linux/meson.build | 2 +-
drivers/crypto/virtio/meson.build | 2 +-
kernel/linux/kni/meson.build | 4 +-
lib/{librte_acl => acl}/acl.h | 0
lib/{librte_acl => acl}/acl_bld.c | 0
lib/{librte_acl => acl}/acl_gen.c | 0
lib/{librte_acl => acl}/acl_run.h | 0
lib/{librte_acl => acl}/acl_run_altivec.c | 0
lib/{librte_acl => acl}/acl_run_altivec.h | 0
lib/{librte_acl => acl}/acl_run_avx2.c | 0
lib/{librte_acl => acl}/acl_run_avx2.h | 0
lib/{librte_acl => acl}/acl_run_avx512.c | 0
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lib/{librte_acl => acl}/acl_run_avx512x16.h | 0
lib/{librte_acl => acl}/acl_run_avx512x8.h | 0
lib/{librte_acl => acl}/acl_run_neon.c | 0
lib/{librte_acl => acl}/acl_run_neon.h | 0
lib/{librte_acl => acl}/acl_run_scalar.c | 0
lib/{librte_acl => acl}/acl_run_sse.c | 0
lib/{librte_acl => acl}/acl_run_sse.h | 0
lib/{librte_acl => acl}/acl_vect.h | 0
lib/{librte_acl => acl}/meson.build | 0
lib/{librte_acl => acl}/rte_acl.c | 0
lib/{librte_acl => acl}/rte_acl.h | 0
lib/{librte_acl => acl}/rte_acl_osdep.h | 0
lib/{librte_acl => acl}/tb_mem.c | 0
lib/{librte_acl => acl}/tb_mem.h | 0
lib/{librte_acl => acl}/version.map | 0
lib/{librte_bbdev => bbdev}/meson.build | 0
lib/{librte_bbdev => bbdev}/rte_bbdev.c | 0
lib/{librte_bbdev => bbdev}/rte_bbdev.h | 0
lib/{librte_bbdev => bbdev}/rte_bbdev_op.h | 0
lib/{librte_bbdev => bbdev}/rte_bbdev_pmd.h | 0
lib/{librte_bbdev => bbdev}/version.map | 0
.../meson.build | 0
.../rte_bitrate.c | 0
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lib/{librte_bpf => bpf}/bpf.c | 0
lib/{librte_bpf => bpf}/bpf_def.h | 0
lib/{librte_bpf => bpf}/bpf_exec.c | 0
lib/{librte_bpf => bpf}/bpf_impl.h | 0
lib/{librte_bpf => bpf}/bpf_jit_arm64.c | 0
lib/{librte_bpf => bpf}/bpf_jit_x86.c | 0
lib/{librte_bpf => bpf}/bpf_load.c | 0
lib/{librte_bpf => bpf}/bpf_load_elf.c | 0
lib/{librte_bpf => bpf}/bpf_pkt.c | 0
lib/{librte_bpf => bpf}/bpf_validate.c | 0
lib/{librte_bpf => bpf}/meson.build | 0
lib/{librte_bpf => bpf}/rte_bpf.h | 0
lib/{librte_bpf => bpf}/rte_bpf_ethdev.h | 0
lib/{librte_bpf => bpf}/version.map | 0
lib/{librte_cfgfile => cfgfile}/meson.build | 0
lib/{librte_cfgfile => cfgfile}/rte_cfgfile.c | 0
lib/{librte_cfgfile => cfgfile}/rte_cfgfile.h | 0
lib/{librte_cfgfile => cfgfile}/version.map | 0
lib/{librte_cmdline => cmdline}/cmdline.c | 0
lib/{librte_cmdline => cmdline}/cmdline.h | 0
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.../cmdline_parse_etheraddr.c | 0
.../cmdline_parse_etheraddr.h | 0
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.../cmdline_parse_num.c | 0
.../cmdline_parse_num.h | 0
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.../cmdline_socket.c | 0
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.../cmdline_vt100.c | 0
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lib/{librte_cmdline => cmdline}/meson.build | 0
lib/{librte_cmdline => cmdline}/version.map | 0
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.../rte_distributor.h | 0
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.../arm/include/rte_cycles_32.h | 0
.../arm/include/rte_cycles_64.h | 0
lib/{librte_eal => eal}/arm/include/rte_io.h | 0
.../arm/include/rte_io_64.h | 0
.../arm/include/rte_mcslock.h | 0
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.../arm/include/rte_ticketlock.h | 0
.../arm/include/rte_vect.h | 0
lib/{librte_eal => eal}/arm/meson.build | 0
lib/{librte_eal => eal}/arm/rte_cpuflags.c | 0
lib/{librte_eal => eal}/arm/rte_cycles.c | 0
lib/{librte_eal => eal}/arm/rte_hypervisor.c | 0
.../arm/rte_power_intrinsics.c | 0
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.../common/eal_common_fbarray.c | 0
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.../common/eal_common_timer.c | 0
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.../common/eal_common_trace_ctf.c | 0
.../common/eal_common_trace_points.c | 0
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.../common/eal_common_uuid.c | 0
.../common/eal_filesystem.h | 0
.../common/eal_hugepages.h | 0
.../common/eal_internal_cfg.h | 0
lib/{librte_eal => eal}/common/eal_log.h | 0
lib/{librte_eal => eal}/common/eal_memalloc.h | 0
lib/{librte_eal => eal}/common/eal_memcfg.h | 0
lib/{librte_eal => eal}/common/eal_options.h | 0
lib/{librte_eal => eal}/common/eal_private.h | 0
lib/{librte_eal => eal}/common/eal_thread.h | 0
lib/{librte_eal => eal}/common/eal_trace.h | 0
lib/{librte_eal => eal}/common/hotplug_mp.c | 0
lib/{librte_eal => eal}/common/hotplug_mp.h | 0
lib/{librte_eal => eal}/common/malloc_elem.c | 0
lib/{librte_eal => eal}/common/malloc_elem.h | 0
lib/{librte_eal => eal}/common/malloc_heap.c | 0
lib/{librte_eal => eal}/common/malloc_heap.h | 0
lib/{librte_eal => eal}/common/malloc_mp.c | 0
lib/{librte_eal => eal}/common/malloc_mp.h | 0
lib/{librte_eal => eal}/common/meson.build | 0
.../common/rte_keepalive.c | 0
lib/{librte_eal => eal}/common/rte_malloc.c | 0
lib/{librte_eal => eal}/common/rte_random.c | 0
.../common/rte_reciprocal.c | 0
lib/{librte_eal => eal}/common/rte_service.c | 0
lib/{librte_eal => eal}/common/rte_version.c | 0
lib/{librte_eal => eal}/freebsd/eal.c | 0
lib/{librte_eal => eal}/freebsd/eal_alarm.c | 0
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lib/{librte_eal => eal}/freebsd/eal_debug.c | 0
lib/{librte_eal => eal}/freebsd/eal_dev.c | 0
.../freebsd/eal_hugepage_info.c | 0
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lib/{librte_eal => eal}/freebsd/eal_lcore.c | 0
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lib/{librte_eal => eal}/freebsd/eal_memory.c | 0
lib/{librte_eal => eal}/freebsd/eal_thread.c | 0
lib/{librte_eal => eal}/freebsd/eal_timer.c | 0
.../freebsd/include/meson.build | 0
.../freebsd/include/rte_os.h | 0
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lib/{librte_eal => eal}/freebsd/meson.build | 0
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lib/{librte_eal => eal}/include/meson.build | 0
lib/{librte_eal => eal}/include/rte_alarm.h | 0
lib/{librte_eal => eal}/include/rte_bitmap.h | 0
lib/{librte_eal => eal}/include/rte_bitops.h | 0
.../include/rte_branch_prediction.h | 0
lib/{librte_eal => eal}/include/rte_bus.h | 0
lib/{librte_eal => eal}/include/rte_class.h | 0
lib/{librte_eal => eal}/include/rte_common.h | 0
lib/{librte_eal => eal}/include/rte_compat.h | 0
lib/{librte_eal => eal}/include/rte_debug.h | 0
lib/{librte_eal => eal}/include/rte_dev.h | 0
lib/{librte_eal => eal}/include/rte_devargs.h | 0
lib/{librte_eal => eal}/include/rte_eal.h | 0
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lib/{librte_eal => eal}/include/rte_errno.h | 0
lib/{librte_eal => eal}/include/rte_fbarray.h | 0
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lib/{librte_eal => eal}/include/rte_hexdump.h | 0
.../include/rte_hypervisor.h | 0
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lib/{librte_eal => eal}/include/rte_launch.h | 0
lib/{librte_eal => eal}/include/rte_lcore.h | 0
lib/{librte_eal => eal}/include/rte_log.h | 0
lib/{librte_eal => eal}/include/rte_malloc.h | 0
lib/{librte_eal => eal}/include/rte_memory.h | 0
lib/{librte_eal => eal}/include/rte_memzone.h | 0
.../include/rte_pci_dev_feature_defs.h | 0
.../include/rte_pci_dev_features.h | 0
.../include/rte_per_lcore.h | 0
lib/{librte_eal => eal}/include/rte_random.h | 0
.../include/rte_reciprocal.h | 0
lib/{librte_eal => eal}/include/rte_service.h | 0
.../include/rte_service_component.h | 0
.../include/rte_string_fns.h | 0
lib/{librte_eal => eal}/include/rte_tailq.h | 0
lib/{librte_eal => eal}/include/rte_test.h | 0
lib/{librte_eal => eal}/include/rte_thread.h | 0
lib/{librte_eal => eal}/include/rte_time.h | 0
lib/{librte_eal => eal}/include/rte_trace.h | 0
.../include/rte_trace_point.h | 0
.../include/rte_trace_point_register.h | 0
lib/{librte_eal => eal}/include/rte_uuid.h | 0
lib/{librte_eal => eal}/include/rte_version.h | 0
lib/{librte_eal => eal}/include/rte_vfio.h | 0
lib/{librte_eal => eal}/linux/eal.c | 0
lib/{librte_eal => eal}/linux/eal_alarm.c | 0
lib/{librte_eal => eal}/linux/eal_cpuflags.c | 0
lib/{librte_eal => eal}/linux/eal_debug.c | 0
lib/{librte_eal => eal}/linux/eal_dev.c | 0
.../linux/eal_hugepage_info.c | 0
.../linux/eal_interrupts.c | 0
lib/{librte_eal => eal}/linux/eal_lcore.c | 0
lib/{librte_eal => eal}/linux/eal_log.c | 0
lib/{librte_eal => eal}/linux/eal_memalloc.c | 0
lib/{librte_eal => eal}/linux/eal_memory.c | 0
lib/{librte_eal => eal}/linux/eal_thread.c | 0
lib/{librte_eal => eal}/linux/eal_timer.c | 0
lib/{librte_eal => eal}/linux/eal_vfio.c | 0
lib/{librte_eal => eal}/linux/eal_vfio.h | 0
.../linux/eal_vfio_mp_sync.c | 0
.../linux/include/meson.build | 0
.../linux/include/rte_os.h | 0
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lib/{librte_eal => eal}/linux/meson.build | 0
lib/{librte_eal => eal}/meson.build | 0
.../ppc/include/meson.build | 0
.../ppc/include/rte_altivec.h | 0
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lib/{librte_eal => eal}/ppc/include/rte_io.h | 0
.../ppc/include/rte_mcslock.h | 0
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.../ppc/include/rte_pause.h | 0
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.../ppc/include/rte_ticketlock.h | 0
.../ppc/include/rte_vect.h | 0
lib/{librte_eal => eal}/ppc/meson.build | 0
lib/{librte_eal => eal}/ppc/rte_cpuflags.c | 0
lib/{librte_eal => eal}/ppc/rte_cycles.c | 0
lib/{librte_eal => eal}/ppc/rte_hypervisor.c | 0
.../ppc/rte_power_intrinsics.c | 0
lib/{librte_eal => eal}/unix/eal_file.c | 0
.../unix/eal_unix_memory.c | 0
lib/{librte_eal => eal}/unix/eal_unix_timer.c | 0
lib/{librte_eal => eal}/unix/meson.build | 0
lib/{librte_eal => eal}/unix/rte_thread.c | 0
lib/{librte_eal => eal}/version.map | 0
lib/{librte_eal => eal}/windows/eal.c | 0
lib/{librte_eal => eal}/windows/eal_alarm.c | 0
lib/{librte_eal => eal}/windows/eal_debug.c | 0
lib/{librte_eal => eal}/windows/eal_file.c | 0
.../windows/eal_hugepages.c | 0
.../windows/eal_interrupts.c | 0
lib/{librte_eal => eal}/windows/eal_lcore.c | 0
lib/{librte_eal => eal}/windows/eal_log.c | 0
.../windows/eal_memalloc.c | 0
lib/{librte_eal => eal}/windows/eal_memory.c | 0
lib/{librte_eal => eal}/windows/eal_mp.c | 0
lib/{librte_eal => eal}/windows/eal_thread.c | 0
lib/{librte_eal => eal}/windows/eal_timer.c | 0
lib/{librte_eal => eal}/windows/eal_windows.h | 0
lib/{librte_eal => eal}/windows/fnmatch.c | 0
lib/{librte_eal => eal}/windows/getopt.c | 0
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.../windows/include/rte_os.h | 0
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.../windows/include/rte_virt2phys.h | 0
.../windows/include/rte_windows.h | 0
.../windows/include/sched.h | 0
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.../windows/include/unistd.h | 0
lib/{librte_eal => eal}/windows/meson.build | 0
lib/{librte_eal => eal}/windows/rte_thread.c | 0
.../x86/include/meson.build | 0
.../x86/include/rte_atomic.h | 0
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.../x86/include/rte_byteorder_64.h | 0
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.../x86/include/rte_cycles.h | 0
lib/{librte_eal => eal}/x86/include/rte_io.h | 0
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.../x86/include/rte_pause.h | 0
.../x86/include/rte_pflock.h | 0
.../x86/include/rte_power_intrinsics.h | 0
.../x86/include/rte_prefetch.h | 0
lib/{librte_eal => eal}/x86/include/rte_rtm.h | 0
.../x86/include/rte_rwlock.h | 0
.../x86/include/rte_spinlock.h | 0
.../x86/include/rte_ticketlock.h | 0
.../x86/include/rte_vect.h | 0
lib/{librte_eal => eal}/x86/meson.build | 0
lib/{librte_eal => eal}/x86/rte_cpuflags.c | 0
lib/{librte_eal => eal}/x86/rte_cpuid.h | 0
lib/{librte_eal => eal}/x86/rte_cycles.c | 0
lib/{librte_eal => eal}/x86/rte_hypervisor.c | 0
.../x86/rte_power_intrinsics.c | 0
lib/{librte_eal => eal}/x86/rte_spinlock.c | 0
lib/{librte_efd => efd}/meson.build | 0
lib/{librte_efd => efd}/rte_efd.c | 0
lib/{librte_efd => efd}/rte_efd.h | 0
lib/{librte_efd => efd}/rte_efd_arm64.h | 0
lib/{librte_efd => efd}/rte_efd_x86.h | 0
lib/{librte_efd => efd}/version.map | 0
lib/{librte_ethdev => ethdev}/ethdev_driver.h | 0
lib/{librte_ethdev => ethdev}/ethdev_pci.h | 0
.../ethdev_private.c | 0
.../ethdev_private.h | 0
.../ethdev_profile.c | 0
.../ethdev_profile.h | 0
.../ethdev_trace_points.c | 0
lib/{librte_ethdev => ethdev}/ethdev_vdev.h | 0
lib/{librte_ethdev => ethdev}/meson.build | 0
lib/{librte_ethdev => ethdev}/rte_class_eth.c | 0
lib/{librte_ethdev => ethdev}/rte_dev_info.h | 0
lib/{librte_ethdev => ethdev}/rte_eth_ctrl.h | 0
lib/{librte_ethdev => ethdev}/rte_ethdev.c | 0
lib/{librte_ethdev => ethdev}/rte_ethdev.h | 0
.../rte_ethdev_core.h | 0
.../rte_ethdev_trace.h | 0
.../rte_ethdev_trace_fp.h | 0
lib/{librte_ethdev => ethdev}/rte_flow.c | 0
lib/{librte_ethdev => ethdev}/rte_flow.h | 0
.../rte_flow_driver.h | 0
lib/{librte_ethdev => ethdev}/rte_mtr.c | 0
lib/{librte_ethdev => ethdev}/rte_mtr.h | 0
.../rte_mtr_driver.h | 0
lib/{librte_ethdev => ethdev}/rte_tm.c | 0
lib/{librte_ethdev => ethdev}/rte_tm.h | 0
lib/{librte_ethdev => ethdev}/rte_tm_driver.h | 0
lib/{librte_ethdev => ethdev}/version.map | 0
.../eventdev_pmd.h | 0
.../eventdev_pmd_pci.h | 0
.../eventdev_pmd_vdev.h | 0
.../eventdev_trace_points.c | 0
lib/{librte_eventdev => eventdev}/meson.build | 0
.../rte_event_crypto_adapter.c | 0
.../rte_event_crypto_adapter.h | 0
.../rte_event_eth_rx_adapter.c | 0
.../rte_event_eth_rx_adapter.h | 0
.../rte_event_eth_tx_adapter.c | 0
.../rte_event_eth_tx_adapter.h | 0
.../rte_event_ring.c | 0
.../rte_event_ring.h | 0
.../rte_event_timer_adapter.c | 0
.../rte_event_timer_adapter.h | 0
.../rte_event_timer_adapter_pmd.h | 0
.../rte_eventdev.c | 0
.../rte_eventdev.h | 0
.../rte_eventdev_trace.h | 0
.../rte_eventdev_trace_fp.h | 0
lib/{librte_eventdev => eventdev}/version.map | 0
lib/{librte_fib => fib}/dir24_8.c | 0
lib/{librte_fib => fib}/dir24_8.h | 0
lib/{librte_fib => fib}/dir24_8_avx512.c | 0
lib/{librte_fib => fib}/dir24_8_avx512.h | 0
lib/{librte_fib => fib}/meson.build | 0
lib/{librte_fib => fib}/rte_fib.c | 0
lib/{librte_fib => fib}/rte_fib.h | 0
lib/{librte_fib => fib}/rte_fib6.c | 0
lib/{librte_fib => fib}/rte_fib6.h | 0
lib/{librte_fib => fib}/trie.c | 0
lib/{librte_fib => fib}/trie.h | 0
lib/{librte_fib => fib}/trie_avx512.c | 0
lib/{librte_fib => fib}/trie_avx512.h | 0
lib/{librte_fib => fib}/version.map | 0
.../meson.build | 0
.../rte_flow_classify.c | 0
.../rte_flow_classify.h | 0
.../rte_flow_classify_parse.c | 0
.../rte_flow_classify_parse.h | 0
.../version.map | 0
lib/{librte_graph => graph}/graph.c | 0
lib/{librte_graph => graph}/graph_debug.c | 0
lib/{librte_graph => graph}/graph_ops.c | 0
lib/{librte_graph => graph}/graph_populate.c | 0
lib/{librte_graph => graph}/graph_private.h | 0
lib/{librte_graph => graph}/graph_stats.c | 0
lib/{librte_graph => graph}/meson.build | 0
lib/{librte_graph => graph}/node.c | 0
lib/{librte_graph => graph}/rte_graph.h | 0
.../rte_graph_worker.h | 0
lib/{librte_graph => graph}/version.map | 0
lib/{librte_gro => gro}/gro_tcp4.c | 0
lib/{librte_gro => gro}/gro_tcp4.h | 0
lib/{librte_gro => gro}/gro_udp4.c | 0
lib/{librte_gro => gro}/gro_udp4.h | 0
lib/{librte_gro => gro}/gro_vxlan_tcp4.c | 0
lib/{librte_gro => gro}/gro_vxlan_tcp4.h | 0
lib/{librte_gro => gro}/gro_vxlan_udp4.c | 0
lib/{librte_gro => gro}/gro_vxlan_udp4.h | 0
lib/{librte_gro => gro}/meson.build | 0
lib/{librte_gro => gro}/rte_gro.c | 0
lib/{librte_gro => gro}/rte_gro.h | 0
lib/{librte_gro => gro}/version.map | 0
lib/{librte_gso => gso}/gso_common.c | 0
lib/{librte_gso => gso}/gso_common.h | 0
lib/{librte_gso => gso}/gso_tcp4.c | 0
lib/{librte_gso => gso}/gso_tcp4.h | 0
lib/{librte_gso => gso}/gso_tunnel_tcp4.c | 0
lib/{librte_gso => gso}/gso_tunnel_tcp4.h | 0
lib/{librte_gso => gso}/gso_tunnel_udp4.c | 0
lib/{librte_gso => gso}/gso_tunnel_udp4.h | 0
lib/{librte_gso => gso}/gso_udp4.c | 0
lib/{librte_gso => gso}/gso_udp4.h | 0
lib/{librte_gso => gso}/meson.build | 0
lib/{librte_gso => gso}/rte_gso.c | 0
lib/{librte_gso => gso}/rte_gso.h | 0
lib/{librte_gso => gso}/version.map | 0
lib/{librte_hash => hash}/meson.build | 0
lib/{librte_hash => hash}/rte_cmp_arm64.h | 0
lib/{librte_hash => hash}/rte_cmp_x86.h | 0
lib/{librte_hash => hash}/rte_crc_arm64.h | 0
lib/{librte_hash => hash}/rte_cuckoo_hash.c | 0
lib/{librte_hash => hash}/rte_cuckoo_hash.h | 0
lib/{librte_hash => hash}/rte_fbk_hash.c | 0
lib/{librte_hash => hash}/rte_fbk_hash.h | 0
lib/{librte_hash => hash}/rte_hash.h | 0
lib/{librte_hash => hash}/rte_hash_crc.h | 0
lib/{librte_hash => hash}/rte_jhash.h | 0
lib/{librte_hash => hash}/rte_thash.h | 0
lib/{librte_hash => hash}/version.map | 0
.../ip_frag_common.h | 0
.../ip_frag_internal.c | 0
lib/{librte_ip_frag => ip_frag}/meson.build | 0
lib/{librte_ip_frag => ip_frag}/rte_ip_frag.h | 0
.../rte_ip_frag_common.c | 0
.../rte_ipv4_fragmentation.c | 0
.../rte_ipv4_reassembly.c | 0
.../rte_ipv6_fragmentation.c | 0
.../rte_ipv6_reassembly.c | 0
lib/{librte_ip_frag => ip_frag}/version.map | 0
lib/{librte_ipsec => ipsec}/crypto.h | 0
lib/{librte_ipsec => ipsec}/esp_inb.c | 0
lib/{librte_ipsec => ipsec}/esp_outb.c | 0
lib/{librte_ipsec => ipsec}/iph.h | 0
lib/{librte_ipsec => ipsec}/ipsec_sad.c | 0
lib/{librte_ipsec => ipsec}/ipsec_sqn.h | 0
lib/{librte_ipsec => ipsec}/meson.build | 0
lib/{librte_ipsec => ipsec}/misc.h | 0
lib/{librte_ipsec => ipsec}/pad.h | 0
lib/{librte_ipsec => ipsec}/rte_ipsec.h | 0
lib/{librte_ipsec => ipsec}/rte_ipsec_group.h | 0
lib/{librte_ipsec => ipsec}/rte_ipsec_sa.h | 0
lib/{librte_ipsec => ipsec}/rte_ipsec_sad.h | 0
lib/{librte_ipsec => ipsec}/sa.c | 0
lib/{librte_ipsec => ipsec}/sa.h | 0
lib/{librte_ipsec => ipsec}/ses.c | 0
lib/{librte_ipsec => ipsec}/version.map | 0
lib/{librte_jobstats => jobstats}/meson.build | 0
.../rte_jobstats.c | 0
.../rte_jobstats.h | 0
lib/{librte_jobstats => jobstats}/version.map | 0
lib/{librte_kni => kni}/meson.build | 0
lib/{librte_kni => kni}/rte_kni.c | 0
lib/{librte_kni => kni}/rte_kni.h | 0
lib/{librte_kni => kni}/rte_kni_common.h | 0
lib/{librte_kni => kni}/rte_kni_fifo.h | 0
lib/{librte_kni => kni}/version.map | 0
lib/{librte_kvargs => kvargs}/meson.build | 0
lib/{librte_kvargs => kvargs}/rte_kvargs.c | 0
lib/{librte_kvargs => kvargs}/rte_kvargs.h | 0
lib/{librte_kvargs => kvargs}/version.map | 0
.../meson.build | 0
.../rte_latencystats.c | 0
.../rte_latencystats.h | 0
.../version.map | 0
lib/{librte_lpm => lpm}/meson.build | 0
lib/{librte_lpm => lpm}/rte_lpm.c | 0
lib/{librte_lpm => lpm}/rte_lpm.h | 0
lib/{librte_lpm => lpm}/rte_lpm6.c | 0
lib/{librte_lpm => lpm}/rte_lpm6.h | 0
lib/{librte_lpm => lpm}/rte_lpm_altivec.h | 0
lib/{librte_lpm => lpm}/rte_lpm_neon.h | 0
lib/{librte_lpm => lpm}/rte_lpm_sse.h | 0
lib/{librte_lpm => lpm}/rte_lpm_sve.h | 0
lib/{librte_lpm => lpm}/version.map | 0
lib/{librte_mbuf => mbuf}/meson.build | 0
lib/{librte_mbuf => mbuf}/rte_mbuf.c | 0
lib/{librte_mbuf => mbuf}/rte_mbuf.h | 0
lib/{librte_mbuf => mbuf}/rte_mbuf_core.h | 0
lib/{librte_mbuf => mbuf}/rte_mbuf_dyn.c | 0
lib/{librte_mbuf => mbuf}/rte_mbuf_dyn.h | 0
lib/{librte_mbuf => mbuf}/rte_mbuf_pool_ops.c | 0
lib/{librte_mbuf => mbuf}/rte_mbuf_pool_ops.h | 0
lib/{librte_mbuf => mbuf}/rte_mbuf_ptype.c | 0
lib/{librte_mbuf => mbuf}/rte_mbuf_ptype.h | 0
lib/{librte_mbuf => mbuf}/version.map | 0
lib/{librte_member => member}/meson.build | 0
lib/{librte_member => member}/rte_member.c | 0
lib/{librte_member => member}/rte_member.h | 0
lib/{librte_member => member}/rte_member_ht.c | 0
lib/{librte_member => member}/rte_member_ht.h | 0
.../rte_member_vbf.c | 0
.../rte_member_vbf.h | 0
.../rte_member_x86.h | 0
lib/{librte_member => member}/version.map | 0
.../mempool_trace_points.c | 0
lib/{librte_mempool => mempool}/meson.build | 0
lib/{librte_mempool => mempool}/rte_mempool.c | 0
lib/{librte_mempool => mempool}/rte_mempool.h | 0
.../rte_mempool_ops.c | 0
.../rte_mempool_ops_default.c | 0
.../rte_mempool_trace.h | 0
.../rte_mempool_trace_fp.h | 0
lib/{librte_mempool => mempool}/version.map | 0
lib/meson.build | 16 +-
lib/{librte_meter => meter}/meson.build | 0
lib/{librte_meter => meter}/rte_meter.c | 0
lib/{librte_meter => meter}/rte_meter.h | 0
lib/{librte_meter => meter}/version.map | 0
lib/{librte_metrics => metrics}/meson.build | 0
lib/{librte_metrics => metrics}/rte_metrics.c | 0
lib/{librte_metrics => metrics}/rte_metrics.h | 0
.../rte_metrics_telemetry.c | 0
.../rte_metrics_telemetry.h | 0
lib/{librte_metrics => metrics}/version.map | 0
lib/{librte_net => net}/meson.build | 0
lib/{librte_net => net}/net_crc.h | 0
lib/{librte_net => net}/net_crc_avx512.c | 0
lib/{librte_net => net}/net_crc_neon.c | 0
lib/{librte_net => net}/net_crc_sse.c | 0
lib/{librte_net => net}/rte_arp.c | 0
lib/{librte_net => net}/rte_arp.h | 0
lib/{librte_net => net}/rte_ecpri.h | 0
lib/{librte_net => net}/rte_esp.h | 0
lib/{librte_net => net}/rte_ether.c | 0
lib/{librte_net => net}/rte_ether.h | 0
lib/{librte_net => net}/rte_geneve.h | 0
lib/{librte_net => net}/rte_gre.h | 0
lib/{librte_net => net}/rte_gtp.h | 0
lib/{librte_net => net}/rte_higig.h | 0
lib/{librte_net => net}/rte_icmp.h | 0
lib/{librte_net => net}/rte_ip.h | 0
lib/{librte_net => net}/rte_mpls.h | 0
lib/{librte_net => net}/rte_net.c | 0
lib/{librte_net => net}/rte_net.h | 0
lib/{librte_net => net}/rte_net_crc.c | 0
lib/{librte_net => net}/rte_net_crc.h | 0
lib/{librte_net => net}/rte_sctp.h | 0
lib/{librte_net => net}/rte_tcp.h | 0
lib/{librte_net => net}/rte_udp.h | 0
lib/{librte_net => net}/rte_vxlan.h | 0
lib/{librte_net => net}/version.map | 0
lib/{librte_node => node}/ethdev_ctrl.c | 0
lib/{librte_node => node}/ethdev_rx.c | 0
lib/{librte_node => node}/ethdev_rx_priv.h | 0
lib/{librte_node => node}/ethdev_tx.c | 0
lib/{librte_node => node}/ethdev_tx_priv.h | 0
lib/{librte_node => node}/ip4_lookup.c | 0
lib/{librte_node => node}/ip4_lookup_neon.h | 0
lib/{librte_node => node}/ip4_lookup_sse.h | 0
lib/{librte_node => node}/ip4_rewrite.c | 0
lib/{librte_node => node}/ip4_rewrite_priv.h | 0
lib/{librte_node => node}/log.c | 0
lib/{librte_node => node}/meson.build | 0
lib/{librte_node => node}/node_private.h | 0
lib/{librte_node => node}/null.c | 0
lib/{librte_node => node}/pkt_cls.c | 0
lib/{librte_node => node}/pkt_cls_priv.h | 0
lib/{librte_node => node}/pkt_drop.c | 0
lib/{librte_node => node}/rte_node_eth_api.h | 0
lib/{librte_node => node}/rte_node_ip4_api.h | 0
lib/{librte_node => node}/version.map | 0
lib/{librte_pci => pci}/meson.build | 0
lib/{librte_pci => pci}/rte_pci.c | 0
lib/{librte_pci => pci}/rte_pci.h | 0
lib/{librte_pci => pci}/version.map | 0
lib/{librte_pdump => pdump}/meson.build | 0
lib/{librte_pdump => pdump}/rte_pdump.c | 0
lib/{librte_pdump => pdump}/rte_pdump.h | 0
lib/{librte_pdump => pdump}/version.map | 0
lib/{librte_pipeline => pipeline}/meson.build | 0
.../rte_pipeline.c | 0
.../rte_pipeline.h | 0
.../rte_port_in_action.c | 0
.../rte_port_in_action.h | 0
.../rte_swx_ctl.c | 0
.../rte_swx_ctl.h | 0
.../rte_swx_extern.h | 0
.../rte_swx_pipeline.c | 0
.../rte_swx_pipeline.h | 0
.../rte_swx_pipeline_spec.c | 0
.../rte_table_action.c | 0
.../rte_table_action.h | 0
lib/{librte_pipeline => pipeline}/version.map | 0
lib/{librte_port => port}/meson.build | 0
lib/{librte_port => port}/rte_port.h | 0
lib/{librte_port => port}/rte_port_ethdev.c | 0
lib/{librte_port => port}/rte_port_ethdev.h | 0
lib/{librte_port => port}/rte_port_eventdev.c | 0
lib/{librte_port => port}/rte_port_eventdev.h | 0
lib/{librte_port => port}/rte_port_fd.c | 0
lib/{librte_port => port}/rte_port_fd.h | 0
lib/{librte_port => port}/rte_port_frag.c | 0
lib/{librte_port => port}/rte_port_frag.h | 0
lib/{librte_port => port}/rte_port_kni.c | 0
lib/{librte_port => port}/rte_port_kni.h | 0
lib/{librte_port => port}/rte_port_ras.c | 0
lib/{librte_port => port}/rte_port_ras.h | 0
lib/{librte_port => port}/rte_port_ring.c | 0
lib/{librte_port => port}/rte_port_ring.h | 0
lib/{librte_port => port}/rte_port_sched.c | 0
lib/{librte_port => port}/rte_port_sched.h | 0
.../rte_port_source_sink.c | 0
.../rte_port_source_sink.h | 0
.../rte_port_sym_crypto.c | 0
.../rte_port_sym_crypto.h | 0
lib/{librte_port => port}/rte_swx_port.h | 0
.../rte_swx_port_ethdev.c | 0
.../rte_swx_port_ethdev.h | 0
lib/{librte_port => port}/rte_swx_port_fd.c | 0
lib/{librte_port => port}/rte_swx_port_fd.h | 0
lib/{librte_port => port}/rte_swx_port_ring.c | 0
lib/{librte_port => port}/rte_swx_port_ring.h | 0
.../rte_swx_port_source_sink.c | 0
.../rte_swx_port_source_sink.h | 0
lib/{librte_port => port}/version.map | 0
lib/{librte_power => power}/guest_channel.c | 0
lib/{librte_power => power}/guest_channel.h | 0
lib/{librte_power => power}/meson.build | 0
.../power_acpi_cpufreq.c | 0
.../power_acpi_cpufreq.h | 0
lib/{librte_power => power}/power_common.c | 0
lib/{librte_power => power}/power_common.h | 0
lib/{librte_power => power}/power_kvm_vm.c | 0
lib/{librte_power => power}/power_kvm_vm.h | 0
.../power_pstate_cpufreq.c | 0
.../power_pstate_cpufreq.h | 0
lib/{librte_power => power}/rte_power.c | 0
lib/{librte_power => power}/rte_power.h | 0
.../rte_power_empty_poll.c | 0
.../rte_power_empty_poll.h | 0
.../rte_power_guest_channel.h | 0
.../rte_power_pmd_mgmt.c | 0
.../rte_power_pmd_mgmt.h | 0
lib/{librte_power => power}/version.map | 0
lib/{librte_rawdev => rawdev}/meson.build | 0
lib/{librte_rawdev => rawdev}/rte_rawdev.c | 0
lib/{librte_rawdev => rawdev}/rte_rawdev.h | 0
.../rte_rawdev_pmd.h | 0
lib/{librte_rawdev => rawdev}/version.map | 0
lib/{librte_rcu => rcu}/meson.build | 0
lib/{librte_rcu => rcu}/rcu_qsbr_pvt.h | 0
lib/{librte_rcu => rcu}/rte_rcu_qsbr.c | 0
lib/{librte_rcu => rcu}/rte_rcu_qsbr.h | 0
lib/{librte_rcu => rcu}/version.map | 0
lib/{librte_regexdev => regexdev}/meson.build | 0
.../rte_regexdev.c | 0
.../rte_regexdev.h | 0
.../rte_regexdev_core.h | 0
.../rte_regexdev_driver.h | 0
lib/{librte_regexdev => regexdev}/version.map | 0
lib/{librte_reorder => reorder}/meson.build | 0
lib/{librte_reorder => reorder}/rte_reorder.c | 0
lib/{librte_reorder => reorder}/rte_reorder.h | 0
lib/{librte_reorder => reorder}/version.map | 0
lib/{librte_rib => rib}/meson.build | 0
lib/{librte_rib => rib}/rte_rib.c | 0
lib/{librte_rib => rib}/rte_rib.h | 0
lib/{librte_rib => rib}/rte_rib6.c | 0
lib/{librte_rib => rib}/rte_rib6.h | 0
lib/{librte_rib => rib}/version.map | 0
lib/{librte_ring => ring}/meson.build | 0
lib/{librte_ring => ring}/rte_ring.c | 0
lib/{librte_ring => ring}/rte_ring.h | 0
lib/{librte_ring => ring}/rte_ring_c11_pvt.h | 0
lib/{librte_ring => ring}/rte_ring_core.h | 0
lib/{librte_ring => ring}/rte_ring_elem.h | 0
lib/{librte_ring => ring}/rte_ring_elem_pvt.h | 0
.../rte_ring_generic_pvt.h | 0
lib/{librte_ring => ring}/rte_ring_hts.h | 0
.../rte_ring_hts_elem_pvt.h | 0
lib/{librte_ring => ring}/rte_ring_peek.h | 0
.../rte_ring_peek_elem_pvt.h | 0
lib/{librte_ring => ring}/rte_ring_peek_zc.h | 0
lib/{librte_ring => ring}/rte_ring_rts.h | 0
.../rte_ring_rts_elem_pvt.h | 0
lib/{librte_ring => ring}/version.map | 0
lib/{librte_sched => sched}/meson.build | 0
lib/{librte_sched => sched}/rte_approx.c | 0
lib/{librte_sched => sched}/rte_approx.h | 0
lib/{librte_sched => sched}/rte_red.c | 0
lib/{librte_sched => sched}/rte_red.h | 0
lib/{librte_sched => sched}/rte_sched.c | 0
lib/{librte_sched => sched}/rte_sched.h | 0
.../rte_sched_common.h | 0
lib/{librte_sched => sched}/version.map | 0
lib/{librte_security => security}/meson.build | 0
.../rte_security.c | 0
.../rte_security.h | 0
.../rte_security_driver.h | 0
lib/{librte_security => security}/version.map | 0
lib/{librte_stack => stack}/meson.build | 0
lib/{librte_stack => stack}/rte_stack.c | 0
lib/{librte_stack => stack}/rte_stack.h | 0
lib/{librte_stack => stack}/rte_stack_lf.c | 0
lib/{librte_stack => stack}/rte_stack_lf.h | 0
.../rte_stack_lf_c11.h | 0
.../rte_stack_lf_generic.h | 0
.../rte_stack_lf_stubs.h | 0
lib/{librte_stack => stack}/rte_stack_std.c | 0
lib/{librte_stack => stack}/rte_stack_std.h | 0
lib/{librte_stack => stack}/stack_pvt.h | 0
lib/{librte_stack => stack}/version.map | 0
lib/{librte_table => table}/meson.build | 0
lib/{librte_table => table}/rte_lru.h | 0
lib/{librte_table => table}/rte_lru_arm64.h | 0
lib/{librte_table => table}/rte_lru_x86.h | 0
lib/{librte_table => table}/rte_swx_table.h | 0
.../rte_swx_table_em.c | 0
.../rte_swx_table_em.h | 0
.../rte_swx_table_wm.c | 0
.../rte_swx_table_wm.h | 0
lib/{librte_table => table}/rte_table.h | 0
lib/{librte_table => table}/rte_table_acl.c | 0
lib/{librte_table => table}/rte_table_acl.h | 0
lib/{librte_table => table}/rte_table_array.c | 0
lib/{librte_table => table}/rte_table_array.h | 0
lib/{librte_table => table}/rte_table_hash.h | 0
.../rte_table_hash_cuckoo.c | 0
.../rte_table_hash_cuckoo.h | 0
.../rte_table_hash_ext.c | 0
.../rte_table_hash_func.h | 0
.../rte_table_hash_func_arm64.h | 0
.../rte_table_hash_key16.c | 0
.../rte_table_hash_key32.c | 0
.../rte_table_hash_key8.c | 0
.../rte_table_hash_lru.c | 0
lib/{librte_table => table}/rte_table_lpm.c | 0
lib/{librte_table => table}/rte_table_lpm.h | 0
.../rte_table_lpm_ipv6.c | 0
.../rte_table_lpm_ipv6.h | 0
lib/{librte_table => table}/rte_table_stub.c | 0
lib/{librte_table => table}/rte_table_stub.h | 0
lib/{librte_table => table}/version.map | 0
.../meson.build | 2 +-
.../rte_telemetry.h | 0
.../telemetry.c | 0
.../telemetry_data.c | 0
.../telemetry_data.h | 0
.../telemetry_internal.h | 0
.../telemetry_json.h | 0
.../telemetry_legacy.c | 0
.../version.map | 0
lib/{librte_timer => timer}/meson.build | 0
lib/{librte_timer => timer}/rte_timer.c | 0
lib/{librte_timer => timer}/rte_timer.h | 0
lib/{librte_timer => timer}/version.map | 0
lib/{librte_vhost => vhost}/fd_man.c | 0
lib/{librte_vhost => vhost}/fd_man.h | 0
lib/{librte_vhost => vhost}/iotlb.c | 0
lib/{librte_vhost => vhost}/iotlb.h | 0
lib/{librte_vhost => vhost}/meson.build | 0
lib/{librte_vhost => vhost}/rte_vdpa.h | 0
lib/{librte_vhost => vhost}/rte_vdpa_dev.h | 0
lib/{librte_vhost => vhost}/rte_vhost.h | 0
lib/{librte_vhost => vhost}/rte_vhost_async.h | 0
.../rte_vhost_crypto.h | 0
lib/{librte_vhost => vhost}/socket.c | 0
lib/{librte_vhost => vhost}/vdpa.c | 0
lib/{librte_vhost => vhost}/version.map | 0
lib/{librte_vhost => vhost}/vhost.c | 0
lib/{librte_vhost => vhost}/vhost.h | 0
lib/{librte_vhost => vhost}/vhost_crypto.c | 0
lib/{librte_vhost => vhost}/vhost_user.c | 0
lib/{librte_vhost => vhost}/vhost_user.h | 0
lib/{librte_vhost => vhost}/virtio_crypto.h | 0
lib/{librte_vhost => vhost}/virtio_net.c | 0
license/exceptions.txt | 6 +-
meson.build | 6 +-
877 files changed, 206 insertions(+), 204 deletions(-)
rename lib/{librte_acl => acl}/acl.h (100%)
rename lib/{librte_acl => acl}/acl_bld.c (100%)
rename lib/{librte_acl => acl}/acl_gen.c (100%)
rename lib/{librte_acl => acl}/acl_run.h (100%)
rename lib/{librte_acl => acl}/acl_run_altivec.c (100%)
rename lib/{librte_acl => acl}/acl_run_altivec.h (100%)
rename lib/{librte_acl => acl}/acl_run_avx2.c (100%)
rename lib/{librte_acl => acl}/acl_run_avx2.h (100%)
rename lib/{librte_acl => acl}/acl_run_avx512.c (100%)
rename lib/{librte_acl => acl}/acl_run_avx512_common.h (100%)
rename lib/{librte_acl => acl}/acl_run_avx512x16.h (100%)
rename lib/{librte_acl => acl}/acl_run_avx512x8.h (100%)
rename lib/{librte_acl => acl}/acl_run_neon.c (100%)
rename lib/{librte_acl => acl}/acl_run_neon.h (100%)
rename lib/{librte_acl => acl}/acl_run_scalar.c (100%)
rename lib/{librte_acl => acl}/acl_run_sse.c (100%)
rename lib/{librte_acl => acl}/acl_run_sse.h (100%)
rename lib/{librte_acl => acl}/acl_vect.h (100%)
rename lib/{librte_acl => acl}/meson.build (100%)
rename lib/{librte_acl => acl}/rte_acl.c (100%)
rename lib/{librte_acl => acl}/rte_acl.h (100%)
rename lib/{librte_acl => acl}/rte_acl_osdep.h (100%)
rename lib/{librte_acl => acl}/tb_mem.c (100%)
rename lib/{librte_acl => acl}/tb_mem.h (100%)
rename lib/{librte_acl => acl}/version.map (100%)
rename lib/{librte_bbdev => bbdev}/meson.build (100%)
rename lib/{librte_bbdev => bbdev}/rte_bbdev.c (100%)
rename lib/{librte_bbdev => bbdev}/rte_bbdev.h (100%)
rename lib/{librte_bbdev => bbdev}/rte_bbdev_op.h (100%)
rename lib/{librte_bbdev => bbdev}/rte_bbdev_pmd.h (100%)
rename lib/{librte_bbdev => bbdev}/version.map (100%)
rename lib/{librte_bitratestats => bitratestats}/meson.build (100%)
rename lib/{librte_bitratestats => bitratestats}/rte_bitrate.c (100%)
rename lib/{librte_bitratestats => bitratestats}/rte_bitrate.h (100%)
rename lib/{librte_bitratestats => bitratestats}/version.map (100%)
rename lib/{librte_bpf => bpf}/bpf.c (100%)
rename lib/{librte_bpf => bpf}/bpf_def.h (100%)
rename lib/{librte_bpf => bpf}/bpf_exec.c (100%)
rename lib/{librte_bpf => bpf}/bpf_impl.h (100%)
rename lib/{librte_bpf => bpf}/bpf_jit_arm64.c (100%)
rename lib/{librte_bpf => bpf}/bpf_jit_x86.c (100%)
rename lib/{librte_bpf => bpf}/bpf_load.c (100%)
rename lib/{librte_bpf => bpf}/bpf_load_elf.c (100%)
rename lib/{librte_bpf => bpf}/bpf_pkt.c (100%)
rename lib/{librte_bpf => bpf}/bpf_validate.c (100%)
rename lib/{librte_bpf => bpf}/meson.build (100%)
rename lib/{librte_bpf => bpf}/rte_bpf.h (100%)
rename lib/{librte_bpf => bpf}/rte_bpf_ethdev.h (100%)
rename lib/{librte_bpf => bpf}/version.map (100%)
rename lib/{librte_cfgfile => cfgfile}/meson.build (100%)
rename lib/{librte_cfgfile => cfgfile}/rte_cfgfile.c (100%)
rename lib/{librte_cfgfile => cfgfile}/rte_cfgfile.h (100%)
rename lib/{librte_cfgfile => cfgfile}/version.map (100%)
rename lib/{librte_cmdline => cmdline}/cmdline.c (100%)
rename lib/{librte_cmdline => cmdline}/cmdline.h (100%)
rename lib/{librte_cmdline => cmdline}/cmdline_cirbuf.c (100%)
rename lib/{librte_cmdline => cmdline}/cmdline_cirbuf.h (100%)
rename lib/{librte_cmdline => cmdline}/cmdline_os_unix.c (100%)
rename lib/{librte_cmdline => cmdline}/cmdline_os_windows.c (100%)
rename lib/{librte_cmdline => cmdline}/cmdline_parse.c (100%)
rename lib/{librte_cmdline => cmdline}/cmdline_parse.h (100%)
rename lib/{librte_cmdline => cmdline}/cmdline_parse_etheraddr.c (100%)
rename lib/{librte_cmdline => cmdline}/cmdline_parse_etheraddr.h (100%)
rename lib/{librte_cmdline => cmdline}/cmdline_parse_ipaddr.c (100%)
rename lib/{librte_cmdline => cmdline}/cmdline_parse_ipaddr.h (100%)
rename lib/{librte_cmdline => cmdline}/cmdline_parse_num.c (100%)
rename lib/{librte_cmdline => cmdline}/cmdline_parse_num.h (100%)
rename lib/{librte_cmdline => cmdline}/cmdline_parse_portlist.c (100%)
rename lib/{librte_cmdline => cmdline}/cmdline_parse_portlist.h (100%)
rename lib/{librte_cmdline => cmdline}/cmdline_parse_string.c (100%)
rename lib/{librte_cmdline => cmdline}/cmdline_parse_string.h (100%)
rename lib/{librte_cmdline => cmdline}/cmdline_private.h (100%)
rename lib/{librte_cmdline => cmdline}/cmdline_rdline.c (100%)
rename lib/{librte_cmdline => cmdline}/cmdline_rdline.h (100%)
rename lib/{librte_cmdline => cmdline}/cmdline_socket.c (100%)
rename lib/{librte_cmdline => cmdline}/cmdline_socket.h (100%)
rename lib/{librte_cmdline => cmdline}/cmdline_vt100.c (100%)
rename lib/{librte_cmdline => cmdline}/cmdline_vt100.h (100%)
rename lib/{librte_cmdline => cmdline}/meson.build (100%)
rename lib/{librte_cmdline => cmdline}/version.map (100%)
rename lib/{librte_compressdev => compressdev}/meson.build (100%)
rename lib/{librte_compressdev => compressdev}/rte_comp.c (100%)
rename lib/{librte_compressdev => compressdev}/rte_comp.h (100%)
rename lib/{librte_compressdev => compressdev}/rte_compressdev.c (100%)
rename lib/{librte_compressdev => compressdev}/rte_compressdev.h (100%)
rename lib/{librte_compressdev => compressdev}/rte_compressdev_internal.h (100%)
rename lib/{librte_compressdev => compressdev}/rte_compressdev_pmd.c (100%)
rename lib/{librte_compressdev => compressdev}/rte_compressdev_pmd.h (100%)
rename lib/{librte_compressdev => compressdev}/version.map (100%)
rename lib/{librte_cryptodev => cryptodev}/cryptodev_trace_points.c (100%)
rename lib/{librte_cryptodev => cryptodev}/meson.build (100%)
rename lib/{librte_cryptodev => cryptodev}/rte_crypto.h (100%)
rename lib/{librte_cryptodev => cryptodev}/rte_crypto_asym.h (100%)
rename lib/{librte_cryptodev => cryptodev}/rte_crypto_sym.h (100%)
rename lib/{librte_cryptodev => cryptodev}/rte_cryptodev.c (100%)
rename lib/{librte_cryptodev => cryptodev}/rte_cryptodev.h (100%)
rename lib/{librte_cryptodev => cryptodev}/rte_cryptodev_pmd.c (100%)
rename lib/{librte_cryptodev => cryptodev}/rte_cryptodev_pmd.h (100%)
rename lib/{librte_cryptodev => cryptodev}/rte_cryptodev_trace.h (100%)
rename lib/{librte_cryptodev => cryptodev}/rte_cryptodev_trace_fp.h (100%)
rename lib/{librte_cryptodev => cryptodev}/version.map (100%)
rename lib/{librte_distributor => distributor}/distributor_private.h (100%)
rename lib/{librte_distributor => distributor}/meson.build (100%)
rename lib/{librte_distributor => distributor}/rte_distributor.c (100%)
rename lib/{librte_distributor => distributor}/rte_distributor.h (100%)
rename lib/{librte_distributor => distributor}/rte_distributor_match_generic.c (100%)
rename lib/{librte_distributor => distributor}/rte_distributor_match_sse.c (100%)
rename lib/{librte_distributor => distributor}/rte_distributor_single.c (100%)
rename lib/{librte_distributor => distributor}/rte_distributor_single.h (100%)
rename lib/{librte_distributor => distributor}/version.map (100%)
rename lib/{librte_eal => eal}/arm/include/meson.build (100%)
rename lib/{librte_eal => eal}/arm/include/rte_atomic.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_atomic_32.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_atomic_64.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_byteorder.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_cpuflags.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_cpuflags_32.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_cpuflags_64.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_cycles.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_cycles_32.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_cycles_64.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_io.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_io_64.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_mcslock.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_memcpy.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_memcpy_32.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_memcpy_64.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_pause.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_pause_32.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_pause_64.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_pflock.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_power_intrinsics.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_prefetch.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_prefetch_32.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_prefetch_64.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_rwlock.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_spinlock.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_ticketlock.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_vect.h (100%)
rename lib/{librte_eal => eal}/arm/meson.build (100%)
rename lib/{librte_eal => eal}/arm/rte_cpuflags.c (100%)
rename lib/{librte_eal => eal}/arm/rte_cycles.c (100%)
rename lib/{librte_eal => eal}/arm/rte_hypervisor.c (100%)
rename lib/{librte_eal => eal}/arm/rte_power_intrinsics.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_bus.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_class.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_config.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_cpuflags.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_debug.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_dev.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_devargs.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_dynmem.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_errno.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_fbarray.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_hexdump.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_hypervisor.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_launch.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_lcore.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_log.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_mcfg.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_memalloc.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_memory.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_memzone.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_options.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_proc.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_string_fns.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_tailqs.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_thread.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_timer.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_trace.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_trace_ctf.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_trace_points.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_trace_utils.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_uuid.c (100%)
rename lib/{librte_eal => eal}/common/eal_filesystem.h (100%)
rename lib/{librte_eal => eal}/common/eal_hugepages.h (100%)
rename lib/{librte_eal => eal}/common/eal_internal_cfg.h (100%)
rename lib/{librte_eal => eal}/common/eal_log.h (100%)
rename lib/{librte_eal => eal}/common/eal_memalloc.h (100%)
rename lib/{librte_eal => eal}/common/eal_memcfg.h (100%)
rename lib/{librte_eal => eal}/common/eal_options.h (100%)
rename lib/{librte_eal => eal}/common/eal_private.h (100%)
rename lib/{librte_eal => eal}/common/eal_thread.h (100%)
rename lib/{librte_eal => eal}/common/eal_trace.h (100%)
rename lib/{librte_eal => eal}/common/hotplug_mp.c (100%)
rename lib/{librte_eal => eal}/common/hotplug_mp.h (100%)
rename lib/{librte_eal => eal}/common/malloc_elem.c (100%)
rename lib/{librte_eal => eal}/common/malloc_elem.h (100%)
rename lib/{librte_eal => eal}/common/malloc_heap.c (100%)
rename lib/{librte_eal => eal}/common/malloc_heap.h (100%)
rename lib/{librte_eal => eal}/common/malloc_mp.c (100%)
rename lib/{librte_eal => eal}/common/malloc_mp.h (100%)
rename lib/{librte_eal => eal}/common/meson.build (100%)
rename lib/{librte_eal => eal}/common/rte_keepalive.c (100%)
rename lib/{librte_eal => eal}/common/rte_malloc.c (100%)
rename lib/{librte_eal => eal}/common/rte_random.c (100%)
rename lib/{librte_eal => eal}/common/rte_reciprocal.c (100%)
rename lib/{librte_eal => eal}/common/rte_service.c (100%)
rename lib/{librte_eal => eal}/common/rte_version.c (100%)
rename lib/{librte_eal => eal}/freebsd/eal.c (100%)
rename lib/{librte_eal => eal}/freebsd/eal_alarm.c (100%)
rename lib/{librte_eal => eal}/freebsd/eal_alarm_private.h (100%)
rename lib/{librte_eal => eal}/freebsd/eal_cpuflags.c (100%)
rename lib/{librte_eal => eal}/freebsd/eal_debug.c (100%)
rename lib/{librte_eal => eal}/freebsd/eal_dev.c (100%)
rename lib/{librte_eal => eal}/freebsd/eal_hugepage_info.c (100%)
rename lib/{librte_eal => eal}/freebsd/eal_interrupts.c (100%)
rename lib/{librte_eal => eal}/freebsd/eal_lcore.c (100%)
rename lib/{librte_eal => eal}/freebsd/eal_memalloc.c (100%)
rename lib/{librte_eal => eal}/freebsd/eal_memory.c (100%)
rename lib/{librte_eal => eal}/freebsd/eal_thread.c (100%)
rename lib/{librte_eal => eal}/freebsd/eal_timer.c (100%)
rename lib/{librte_eal => eal}/freebsd/include/meson.build (100%)
rename lib/{librte_eal => eal}/freebsd/include/rte_os.h (100%)
rename lib/{librte_eal => eal}/freebsd/include/rte_os_shim.h (100%)
rename lib/{librte_eal => eal}/freebsd/meson.build (100%)
rename lib/{librte_eal => eal}/include/generic/rte_atomic.h (100%)
rename lib/{librte_eal => eal}/include/generic/rte_byteorder.h (100%)
rename lib/{librte_eal => eal}/include/generic/rte_cpuflags.h (100%)
rename lib/{librte_eal => eal}/include/generic/rte_cycles.h (100%)
rename lib/{librte_eal => eal}/include/generic/rte_io.h (100%)
rename lib/{librte_eal => eal}/include/generic/rte_mcslock.h (100%)
rename lib/{librte_eal => eal}/include/generic/rte_memcpy.h (100%)
rename lib/{librte_eal => eal}/include/generic/rte_pause.h (100%)
rename lib/{librte_eal => eal}/include/generic/rte_pflock.h (100%)
rename lib/{librte_eal => eal}/include/generic/rte_power_intrinsics.h (100%)
rename lib/{librte_eal => eal}/include/generic/rte_prefetch.h (100%)
rename lib/{librte_eal => eal}/include/generic/rte_rwlock.h (100%)
rename lib/{librte_eal => eal}/include/generic/rte_spinlock.h (100%)
rename lib/{librte_eal => eal}/include/generic/rte_ticketlock.h (100%)
rename lib/{librte_eal => eal}/include/generic/rte_vect.h (100%)
rename lib/{librte_eal => eal}/include/meson.build (100%)
rename lib/{librte_eal => eal}/include/rte_alarm.h (100%)
rename lib/{librte_eal => eal}/include/rte_bitmap.h (100%)
rename lib/{librte_eal => eal}/include/rte_bitops.h (100%)
rename lib/{librte_eal => eal}/include/rte_branch_prediction.h (100%)
rename lib/{librte_eal => eal}/include/rte_bus.h (100%)
rename lib/{librte_eal => eal}/include/rte_class.h (100%)
rename lib/{librte_eal => eal}/include/rte_common.h (100%)
rename lib/{librte_eal => eal}/include/rte_compat.h (100%)
rename lib/{librte_eal => eal}/include/rte_debug.h (100%)
rename lib/{librte_eal => eal}/include/rte_dev.h (100%)
rename lib/{librte_eal => eal}/include/rte_devargs.h (100%)
rename lib/{librte_eal => eal}/include/rte_eal.h (100%)
rename lib/{librte_eal => eal}/include/rte_eal_interrupts.h (100%)
rename lib/{librte_eal => eal}/include/rte_eal_memconfig.h (100%)
rename lib/{librte_eal => eal}/include/rte_eal_paging.h (100%)
rename lib/{librte_eal => eal}/include/rte_eal_trace.h (100%)
rename lib/{librte_eal => eal}/include/rte_errno.h (100%)
rename lib/{librte_eal => eal}/include/rte_fbarray.h (100%)
rename lib/{librte_eal => eal}/include/rte_function_versioning.h (100%)
rename lib/{librte_eal => eal}/include/rte_hexdump.h (100%)
rename lib/{librte_eal => eal}/include/rte_hypervisor.h (100%)
rename lib/{librte_eal => eal}/include/rte_interrupts.h (100%)
rename lib/{librte_eal => eal}/include/rte_keepalive.h (100%)
rename lib/{librte_eal => eal}/include/rte_launch.h (100%)
rename lib/{librte_eal => eal}/include/rte_lcore.h (100%)
rename lib/{librte_eal => eal}/include/rte_log.h (100%)
rename lib/{librte_eal => eal}/include/rte_malloc.h (100%)
rename lib/{librte_eal => eal}/include/rte_memory.h (100%)
rename lib/{librte_eal => eal}/include/rte_memzone.h (100%)
rename lib/{librte_eal => eal}/include/rte_pci_dev_feature_defs.h (100%)
rename lib/{librte_eal => eal}/include/rte_pci_dev_features.h (100%)
rename lib/{librte_eal => eal}/include/rte_per_lcore.h (100%)
rename lib/{librte_eal => eal}/include/rte_random.h (100%)
rename lib/{librte_eal => eal}/include/rte_reciprocal.h (100%)
rename lib/{librte_eal => eal}/include/rte_service.h (100%)
rename lib/{librte_eal => eal}/include/rte_service_component.h (100%)
rename lib/{librte_eal => eal}/include/rte_string_fns.h (100%)
rename lib/{librte_eal => eal}/include/rte_tailq.h (100%)
rename lib/{librte_eal => eal}/include/rte_test.h (100%)
rename lib/{librte_eal => eal}/include/rte_thread.h (100%)
rename lib/{librte_eal => eal}/include/rte_time.h (100%)
rename lib/{librte_eal => eal}/include/rte_trace.h (100%)
rename lib/{librte_eal => eal}/include/rte_trace_point.h (100%)
rename lib/{librte_eal => eal}/include/rte_trace_point_register.h (100%)
rename lib/{librte_eal => eal}/include/rte_uuid.h (100%)
rename lib/{librte_eal => eal}/include/rte_version.h (100%)
rename lib/{librte_eal => eal}/include/rte_vfio.h (100%)
rename lib/{librte_eal => eal}/linux/eal.c (100%)
rename lib/{librte_eal => eal}/linux/eal_alarm.c (100%)
rename lib/{librte_eal => eal}/linux/eal_cpuflags.c (100%)
rename lib/{librte_eal => eal}/linux/eal_debug.c (100%)
rename lib/{librte_eal => eal}/linux/eal_dev.c (100%)
rename lib/{librte_eal => eal}/linux/eal_hugepage_info.c (100%)
rename lib/{librte_eal => eal}/linux/eal_interrupts.c (100%)
rename lib/{librte_eal => eal}/linux/eal_lcore.c (100%)
rename lib/{librte_eal => eal}/linux/eal_log.c (100%)
rename lib/{librte_eal => eal}/linux/eal_memalloc.c (100%)
rename lib/{librte_eal => eal}/linux/eal_memory.c (100%)
rename lib/{librte_eal => eal}/linux/eal_thread.c (100%)
rename lib/{librte_eal => eal}/linux/eal_timer.c (100%)
rename lib/{librte_eal => eal}/linux/eal_vfio.c (100%)
rename lib/{librte_eal => eal}/linux/eal_vfio.h (100%)
rename lib/{librte_eal => eal}/linux/eal_vfio_mp_sync.c (100%)
rename lib/{librte_eal => eal}/linux/include/meson.build (100%)
rename lib/{librte_eal => eal}/linux/include/rte_os.h (100%)
rename lib/{librte_eal => eal}/linux/include/rte_os_shim.h (100%)
rename lib/{librte_eal => eal}/linux/meson.build (100%)
rename lib/{librte_eal => eal}/meson.build (100%)
rename lib/{librte_eal => eal}/ppc/include/meson.build (100%)
rename lib/{librte_eal => eal}/ppc/include/rte_altivec.h (100%)
rename lib/{librte_eal => eal}/ppc/include/rte_atomic.h (100%)
rename lib/{librte_eal => eal}/ppc/include/rte_byteorder.h (100%)
rename lib/{librte_eal => eal}/ppc/include/rte_cpuflags.h (100%)
rename lib/{librte_eal => eal}/ppc/include/rte_cycles.h (100%)
rename lib/{librte_eal => eal}/ppc/include/rte_io.h (100%)
rename lib/{librte_eal => eal}/ppc/include/rte_mcslock.h (100%)
rename lib/{librte_eal => eal}/ppc/include/rte_memcpy.h (100%)
rename lib/{librte_eal => eal}/ppc/include/rte_pause.h (100%)
rename lib/{librte_eal => eal}/ppc/include/rte_pflock.h (100%)
rename lib/{librte_eal => eal}/ppc/include/rte_power_intrinsics.h (100%)
rename lib/{librte_eal => eal}/ppc/include/rte_prefetch.h (100%)
rename lib/{librte_eal => eal}/ppc/include/rte_rwlock.h (100%)
rename lib/{librte_eal => eal}/ppc/include/rte_spinlock.h (100%)
rename lib/{librte_eal => eal}/ppc/include/rte_ticketlock.h (100%)
rename lib/{librte_eal => eal}/ppc/include/rte_vect.h (100%)
rename lib/{librte_eal => eal}/ppc/meson.build (100%)
rename lib/{librte_eal => eal}/ppc/rte_cpuflags.c (100%)
rename lib/{librte_eal => eal}/ppc/rte_cycles.c (100%)
rename lib/{librte_eal => eal}/ppc/rte_hypervisor.c (100%)
rename lib/{librte_eal => eal}/ppc/rte_power_intrinsics.c (100%)
rename lib/{librte_eal => eal}/unix/eal_file.c (100%)
rename lib/{librte_eal => eal}/unix/eal_unix_memory.c (100%)
rename lib/{librte_eal => eal}/unix/eal_unix_timer.c (100%)
rename lib/{librte_eal => eal}/unix/meson.build (100%)
rename lib/{librte_eal => eal}/unix/rte_thread.c (100%)
rename lib/{librte_eal => eal}/version.map (100%)
rename lib/{librte_eal => eal}/windows/eal.c (100%)
rename lib/{librte_eal => eal}/windows/eal_alarm.c (100%)
rename lib/{librte_eal => eal}/windows/eal_debug.c (100%)
rename lib/{librte_eal => eal}/windows/eal_file.c (100%)
rename lib/{librte_eal => eal}/windows/eal_hugepages.c (100%)
rename lib/{librte_eal => eal}/windows/eal_interrupts.c (100%)
rename lib/{librte_eal => eal}/windows/eal_lcore.c (100%)
rename lib/{librte_eal => eal}/windows/eal_log.c (100%)
rename lib/{librte_eal => eal}/windows/eal_memalloc.c (100%)
rename lib/{librte_eal => eal}/windows/eal_memory.c (100%)
rename lib/{librte_eal => eal}/windows/eal_mp.c (100%)
rename lib/{librte_eal => eal}/windows/eal_thread.c (100%)
rename lib/{librte_eal => eal}/windows/eal_timer.c (100%)
rename lib/{librte_eal => eal}/windows/eal_windows.h (100%)
rename lib/{librte_eal => eal}/windows/fnmatch.c (100%)
rename lib/{librte_eal => eal}/windows/getopt.c (100%)
rename lib/{librte_eal => eal}/windows/include/dirent.h (100%)
rename lib/{librte_eal => eal}/windows/include/fnmatch.h (100%)
rename lib/{librte_eal => eal}/windows/include/getopt.h (100%)
rename lib/{librte_eal => eal}/windows/include/meson.build (100%)
rename lib/{librte_eal => eal}/windows/include/pthread.h (100%)
rename lib/{librte_eal => eal}/windows/include/regex.h (100%)
rename lib/{librte_eal => eal}/windows/include/rte_os.h (100%)
rename lib/{librte_eal => eal}/windows/include/rte_os_shim.h (100%)
rename lib/{librte_eal => eal}/windows/include/rte_virt2phys.h (100%)
rename lib/{librte_eal => eal}/windows/include/rte_windows.h (100%)
rename lib/{librte_eal => eal}/windows/include/sched.h (100%)
rename lib/{librte_eal => eal}/windows/include/sys/queue.h (100%)
rename lib/{librte_eal => eal}/windows/include/unistd.h (100%)
rename lib/{librte_eal => eal}/windows/meson.build (100%)
rename lib/{librte_eal => eal}/windows/rte_thread.c (100%)
rename lib/{librte_eal => eal}/x86/include/meson.build (100%)
rename lib/{librte_eal => eal}/x86/include/rte_atomic.h (100%)
rename lib/{librte_eal => eal}/x86/include/rte_atomic_32.h (100%)
rename lib/{librte_eal => eal}/x86/include/rte_atomic_64.h (100%)
rename lib/{librte_eal => eal}/x86/include/rte_byteorder.h (100%)
rename lib/{librte_eal => eal}/x86/include/rte_byteorder_32.h (100%)
rename lib/{librte_eal => eal}/x86/include/rte_byteorder_64.h (100%)
rename lib/{librte_eal => eal}/x86/include/rte_cpuflags.h (100%)
rename lib/{librte_eal => eal}/x86/include/rte_cycles.h (100%)
rename lib/{librte_eal => eal}/x86/include/rte_io.h (100%)
rename lib/{librte_eal => eal}/x86/include/rte_mcslock.h (100%)
rename lib/{librte_eal => eal}/x86/include/rte_memcpy.h (100%)
rename lib/{librte_eal => eal}/x86/include/rte_pause.h (100%)
rename lib/{librte_eal => eal}/x86/include/rte_pflock.h (100%)
rename lib/{librte_eal => eal}/x86/include/rte_power_intrinsics.h (100%)
rename lib/{librte_eal => eal}/x86/include/rte_prefetch.h (100%)
rename lib/{librte_eal => eal}/x86/include/rte_rtm.h (100%)
rename lib/{librte_eal => eal}/x86/include/rte_rwlock.h (100%)
rename lib/{librte_eal => eal}/x86/include/rte_spinlock.h (100%)
rename lib/{librte_eal => eal}/x86/include/rte_ticketlock.h (100%)
rename lib/{librte_eal => eal}/x86/include/rte_vect.h (100%)
rename lib/{librte_eal => eal}/x86/meson.build (100%)
rename lib/{librte_eal => eal}/x86/rte_cpuflags.c (100%)
rename lib/{librte_eal => eal}/x86/rte_cpuid.h (100%)
rename lib/{librte_eal => eal}/x86/rte_cycles.c (100%)
rename lib/{librte_eal => eal}/x86/rte_hypervisor.c (100%)
rename lib/{librte_eal => eal}/x86/rte_power_intrinsics.c (100%)
rename lib/{librte_eal => eal}/x86/rte_spinlock.c (100%)
rename lib/{librte_efd => efd}/meson.build (100%)
rename lib/{librte_efd => efd}/rte_efd.c (100%)
rename lib/{librte_efd => efd}/rte_efd.h (100%)
rename lib/{librte_efd => efd}/rte_efd_arm64.h (100%)
rename lib/{librte_efd => efd}/rte_efd_x86.h (100%)
rename lib/{librte_efd => efd}/version.map (100%)
rename lib/{librte_ethdev => ethdev}/ethdev_driver.h (100%)
rename lib/{librte_ethdev => ethdev}/ethdev_pci.h (100%)
rename lib/{librte_ethdev => ethdev}/ethdev_private.c (100%)
rename lib/{librte_ethdev => ethdev}/ethdev_private.h (100%)
rename lib/{librte_ethdev => ethdev}/ethdev_profile.c (100%)
rename lib/{librte_ethdev => ethdev}/ethdev_profile.h (100%)
rename lib/{librte_ethdev => ethdev}/ethdev_trace_points.c (100%)
rename lib/{librte_ethdev => ethdev}/ethdev_vdev.h (100%)
rename lib/{librte_ethdev => ethdev}/meson.build (100%)
rename lib/{librte_ethdev => ethdev}/rte_class_eth.c (100%)
rename lib/{librte_ethdev => ethdev}/rte_dev_info.h (100%)
rename lib/{librte_ethdev => ethdev}/rte_eth_ctrl.h (100%)
rename lib/{librte_ethdev => ethdev}/rte_ethdev.c (100%)
rename lib/{librte_ethdev => ethdev}/rte_ethdev.h (100%)
rename lib/{librte_ethdev => ethdev}/rte_ethdev_core.h (100%)
rename lib/{librte_ethdev => ethdev}/rte_ethdev_trace.h (100%)
rename lib/{librte_ethdev => ethdev}/rte_ethdev_trace_fp.h (100%)
rename lib/{librte_ethdev => ethdev}/rte_flow.c (100%)
rename lib/{librte_ethdev => ethdev}/rte_flow.h (100%)
rename lib/{librte_ethdev => ethdev}/rte_flow_driver.h (100%)
rename lib/{librte_ethdev => ethdev}/rte_mtr.c (100%)
rename lib/{librte_ethdev => ethdev}/rte_mtr.h (100%)
rename lib/{librte_ethdev => ethdev}/rte_mtr_driver.h (100%)
rename lib/{librte_ethdev => ethdev}/rte_tm.c (100%)
rename lib/{librte_ethdev => ethdev}/rte_tm.h (100%)
rename lib/{librte_ethdev => ethdev}/rte_tm_driver.h (100%)
rename lib/{librte_ethdev => ethdev}/version.map (100%)
rename lib/{librte_eventdev => eventdev}/eventdev_pmd.h (100%)
rename lib/{librte_eventdev => eventdev}/eventdev_pmd_pci.h (100%)
rename lib/{librte_eventdev => eventdev}/eventdev_pmd_vdev.h (100%)
rename lib/{librte_eventdev => eventdev}/eventdev_trace_points.c (100%)
rename lib/{librte_eventdev => eventdev}/meson.build (100%)
rename lib/{librte_eventdev => eventdev}/rte_event_crypto_adapter.c (100%)
rename lib/{librte_eventdev => eventdev}/rte_event_crypto_adapter.h (100%)
rename lib/{librte_eventdev => eventdev}/rte_event_eth_rx_adapter.c (100%)
rename lib/{librte_eventdev => eventdev}/rte_event_eth_rx_adapter.h (100%)
rename lib/{librte_eventdev => eventdev}/rte_event_eth_tx_adapter.c (100%)
rename lib/{librte_eventdev => eventdev}/rte_event_eth_tx_adapter.h (100%)
rename lib/{librte_eventdev => eventdev}/rte_event_ring.c (100%)
rename lib/{librte_eventdev => eventdev}/rte_event_ring.h (100%)
rename lib/{librte_eventdev => eventdev}/rte_event_timer_adapter.c (100%)
rename lib/{librte_eventdev => eventdev}/rte_event_timer_adapter.h (100%)
rename lib/{librte_eventdev => eventdev}/rte_event_timer_adapter_pmd.h (100%)
rename lib/{librte_eventdev => eventdev}/rte_eventdev.c (100%)
rename lib/{librte_eventdev => eventdev}/rte_eventdev.h (100%)
rename lib/{librte_eventdev => eventdev}/rte_eventdev_trace.h (100%)
rename lib/{librte_eventdev => eventdev}/rte_eventdev_trace_fp.h (100%)
rename lib/{librte_eventdev => eventdev}/version.map (100%)
rename lib/{librte_fib => fib}/dir24_8.c (100%)
rename lib/{librte_fib => fib}/dir24_8.h (100%)
rename lib/{librte_fib => fib}/dir24_8_avx512.c (100%)
rename lib/{librte_fib => fib}/dir24_8_avx512.h (100%)
rename lib/{librte_fib => fib}/meson.build (100%)
rename lib/{librte_fib => fib}/rte_fib.c (100%)
rename lib/{librte_fib => fib}/rte_fib.h (100%)
rename lib/{librte_fib => fib}/rte_fib6.c (100%)
rename lib/{librte_fib => fib}/rte_fib6.h (100%)
rename lib/{librte_fib => fib}/trie.c (100%)
rename lib/{librte_fib => fib}/trie.h (100%)
rename lib/{librte_fib => fib}/trie_avx512.c (100%)
rename lib/{librte_fib => fib}/trie_avx512.h (100%)
rename lib/{librte_fib => fib}/version.map (100%)
rename lib/{librte_flow_classify => flow_classify}/meson.build (100%)
rename lib/{librte_flow_classify => flow_classify}/rte_flow_classify.c (100%)
rename lib/{librte_flow_classify => flow_classify}/rte_flow_classify.h (100%)
rename lib/{librte_flow_classify => flow_classify}/rte_flow_classify_parse.c (100%)
rename lib/{librte_flow_classify => flow_classify}/rte_flow_classify_parse.h (100%)
rename lib/{librte_flow_classify => flow_classify}/version.map (100%)
rename lib/{librte_graph => graph}/graph.c (100%)
rename lib/{librte_graph => graph}/graph_debug.c (100%)
rename lib/{librte_graph => graph}/graph_ops.c (100%)
rename lib/{librte_graph => graph}/graph_populate.c (100%)
rename lib/{librte_graph => graph}/graph_private.h (100%)
rename lib/{librte_graph => graph}/graph_stats.c (100%)
rename lib/{librte_graph => graph}/meson.build (100%)
rename lib/{librte_graph => graph}/node.c (100%)
rename lib/{librte_graph => graph}/rte_graph.h (100%)
rename lib/{librte_graph => graph}/rte_graph_worker.h (100%)
rename lib/{librte_graph => graph}/version.map (100%)
rename lib/{librte_gro => gro}/gro_tcp4.c (100%)
rename lib/{librte_gro => gro}/gro_tcp4.h (100%)
rename lib/{librte_gro => gro}/gro_udp4.c (100%)
rename lib/{librte_gro => gro}/gro_udp4.h (100%)
rename lib/{librte_gro => gro}/gro_vxlan_tcp4.c (100%)
rename lib/{librte_gro => gro}/gro_vxlan_tcp4.h (100%)
rename lib/{librte_gro => gro}/gro_vxlan_udp4.c (100%)
rename lib/{librte_gro => gro}/gro_vxlan_udp4.h (100%)
rename lib/{librte_gro => gro}/meson.build (100%)
rename lib/{librte_gro => gro}/rte_gro.c (100%)
rename lib/{librte_gro => gro}/rte_gro.h (100%)
rename lib/{librte_gro => gro}/version.map (100%)
rename lib/{librte_gso => gso}/gso_common.c (100%)
rename lib/{librte_gso => gso}/gso_common.h (100%)
rename lib/{librte_gso => gso}/gso_tcp4.c (100%)
rename lib/{librte_gso => gso}/gso_tcp4.h (100%)
rename lib/{librte_gso => gso}/gso_tunnel_tcp4.c (100%)
rename lib/{librte_gso => gso}/gso_tunnel_tcp4.h (100%)
rename lib/{librte_gso => gso}/gso_tunnel_udp4.c (100%)
rename lib/{librte_gso => gso}/gso_tunnel_udp4.h (100%)
rename lib/{librte_gso => gso}/gso_udp4.c (100%)
rename lib/{librte_gso => gso}/gso_udp4.h (100%)
rename lib/{librte_gso => gso}/meson.build (100%)
rename lib/{librte_gso => gso}/rte_gso.c (100%)
rename lib/{librte_gso => gso}/rte_gso.h (100%)
rename lib/{librte_gso => gso}/version.map (100%)
rename lib/{librte_hash => hash}/meson.build (100%)
rename lib/{librte_hash => hash}/rte_cmp_arm64.h (100%)
rename lib/{librte_hash => hash}/rte_cmp_x86.h (100%)
rename lib/{librte_hash => hash}/rte_crc_arm64.h (100%)
rename lib/{librte_hash => hash}/rte_cuckoo_hash.c (100%)
rename lib/{librte_hash => hash}/rte_cuckoo_hash.h (100%)
rename lib/{librte_hash => hash}/rte_fbk_hash.c (100%)
rename lib/{librte_hash => hash}/rte_fbk_hash.h (100%)
rename lib/{librte_hash => hash}/rte_hash.h (100%)
rename lib/{librte_hash => hash}/rte_hash_crc.h (100%)
rename lib/{librte_hash => hash}/rte_jhash.h (100%)
rename lib/{librte_hash => hash}/rte_thash.h (100%)
rename lib/{librte_hash => hash}/version.map (100%)
rename lib/{librte_ip_frag => ip_frag}/ip_frag_common.h (100%)
rename lib/{librte_ip_frag => ip_frag}/ip_frag_internal.c (100%)
rename lib/{librte_ip_frag => ip_frag}/meson.build (100%)
rename lib/{librte_ip_frag => ip_frag}/rte_ip_frag.h (100%)
rename lib/{librte_ip_frag => ip_frag}/rte_ip_frag_common.c (100%)
rename lib/{librte_ip_frag => ip_frag}/rte_ipv4_fragmentation.c (100%)
rename lib/{librte_ip_frag => ip_frag}/rte_ipv4_reassembly.c (100%)
rename lib/{librte_ip_frag => ip_frag}/rte_ipv6_fragmentation.c (100%)
rename lib/{librte_ip_frag => ip_frag}/rte_ipv6_reassembly.c (100%)
rename lib/{librte_ip_frag => ip_frag}/version.map (100%)
rename lib/{librte_ipsec => ipsec}/crypto.h (100%)
rename lib/{librte_ipsec => ipsec}/esp_inb.c (100%)
rename lib/{librte_ipsec => ipsec}/esp_outb.c (100%)
rename lib/{librte_ipsec => ipsec}/iph.h (100%)
rename lib/{librte_ipsec => ipsec}/ipsec_sad.c (100%)
rename lib/{librte_ipsec => ipsec}/ipsec_sqn.h (100%)
rename lib/{librte_ipsec => ipsec}/meson.build (100%)
rename lib/{librte_ipsec => ipsec}/misc.h (100%)
rename lib/{librte_ipsec => ipsec}/pad.h (100%)
rename lib/{librte_ipsec => ipsec}/rte_ipsec.h (100%)
rename lib/{librte_ipsec => ipsec}/rte_ipsec_group.h (100%)
rename lib/{librte_ipsec => ipsec}/rte_ipsec_sa.h (100%)
rename lib/{librte_ipsec => ipsec}/rte_ipsec_sad.h (100%)
rename lib/{librte_ipsec => ipsec}/sa.c (100%)
rename lib/{librte_ipsec => ipsec}/sa.h (100%)
rename lib/{librte_ipsec => ipsec}/ses.c (100%)
rename lib/{librte_ipsec => ipsec}/version.map (100%)
rename lib/{librte_jobstats => jobstats}/meson.build (100%)
rename lib/{librte_jobstats => jobstats}/rte_jobstats.c (100%)
rename lib/{librte_jobstats => jobstats}/rte_jobstats.h (100%)
rename lib/{librte_jobstats => jobstats}/version.map (100%)
rename lib/{librte_kni => kni}/meson.build (100%)
rename lib/{librte_kni => kni}/rte_kni.c (100%)
rename lib/{librte_kni => kni}/rte_kni.h (100%)
rename lib/{librte_kni => kni}/rte_kni_common.h (100%)
rename lib/{librte_kni => kni}/rte_kni_fifo.h (100%)
rename lib/{librte_kni => kni}/version.map (100%)
rename lib/{librte_kvargs => kvargs}/meson.build (100%)
rename lib/{librte_kvargs => kvargs}/rte_kvargs.c (100%)
rename lib/{librte_kvargs => kvargs}/rte_kvargs.h (100%)
rename lib/{librte_kvargs => kvargs}/version.map (100%)
rename lib/{librte_latencystats => latencystats}/meson.build (100%)
rename lib/{librte_latencystats => latencystats}/rte_latencystats.c (100%)
rename lib/{librte_latencystats => latencystats}/rte_latencystats.h (100%)
rename lib/{librte_latencystats => latencystats}/version.map (100%)
rename lib/{librte_lpm => lpm}/meson.build (100%)
rename lib/{librte_lpm => lpm}/rte_lpm.c (100%)
rename lib/{librte_lpm => lpm}/rte_lpm.h (100%)
rename lib/{librte_lpm => lpm}/rte_lpm6.c (100%)
rename lib/{librte_lpm => lpm}/rte_lpm6.h (100%)
rename lib/{librte_lpm => lpm}/rte_lpm_altivec.h (100%)
rename lib/{librte_lpm => lpm}/rte_lpm_neon.h (100%)
rename lib/{librte_lpm => lpm}/rte_lpm_sse.h (100%)
rename lib/{librte_lpm => lpm}/rte_lpm_sve.h (100%)
rename lib/{librte_lpm => lpm}/version.map (100%)
rename lib/{librte_mbuf => mbuf}/meson.build (100%)
rename lib/{librte_mbuf => mbuf}/rte_mbuf.c (100%)
rename lib/{librte_mbuf => mbuf}/rte_mbuf.h (100%)
rename lib/{librte_mbuf => mbuf}/rte_mbuf_core.h (100%)
rename lib/{librte_mbuf => mbuf}/rte_mbuf_dyn.c (100%)
rename lib/{librte_mbuf => mbuf}/rte_mbuf_dyn.h (100%)
rename lib/{librte_mbuf => mbuf}/rte_mbuf_pool_ops.c (100%)
rename lib/{librte_mbuf => mbuf}/rte_mbuf_pool_ops.h (100%)
rename lib/{librte_mbuf => mbuf}/rte_mbuf_ptype.c (100%)
rename lib/{librte_mbuf => mbuf}/rte_mbuf_ptype.h (100%)
rename lib/{librte_mbuf => mbuf}/version.map (100%)
rename lib/{librte_member => member}/meson.build (100%)
rename lib/{librte_member => member}/rte_member.c (100%)
rename lib/{librte_member => member}/rte_member.h (100%)
rename lib/{librte_member => member}/rte_member_ht.c (100%)
rename lib/{librte_member => member}/rte_member_ht.h (100%)
rename lib/{librte_member => member}/rte_member_vbf.c (100%)
rename lib/{librte_member => member}/rte_member_vbf.h (100%)
rename lib/{librte_member => member}/rte_member_x86.h (100%)
rename lib/{librte_member => member}/version.map (100%)
rename lib/{librte_mempool => mempool}/mempool_trace_points.c (100%)
rename lib/{librte_mempool => mempool}/meson.build (100%)
rename lib/{librte_mempool => mempool}/rte_mempool.c (100%)
rename lib/{librte_mempool => mempool}/rte_mempool.h (100%)
rename lib/{librte_mempool => mempool}/rte_mempool_ops.c (100%)
rename lib/{librte_mempool => mempool}/rte_mempool_ops_default.c (100%)
rename lib/{librte_mempool => mempool}/rte_mempool_trace.h (100%)
rename lib/{librte_mempool => mempool}/rte_mempool_trace_fp.h (100%)
rename lib/{librte_mempool => mempool}/version.map (100%)
rename lib/{librte_meter => meter}/meson.build (100%)
rename lib/{librte_meter => meter}/rte_meter.c (100%)
rename lib/{librte_meter => meter}/rte_meter.h (100%)
rename lib/{librte_meter => meter}/version.map (100%)
rename lib/{librte_metrics => metrics}/meson.build (100%)
rename lib/{librte_metrics => metrics}/rte_metrics.c (100%)
rename lib/{librte_metrics => metrics}/rte_metrics.h (100%)
rename lib/{librte_metrics => metrics}/rte_metrics_telemetry.c (100%)
rename lib/{librte_metrics => metrics}/rte_metrics_telemetry.h (100%)
rename lib/{librte_metrics => metrics}/version.map (100%)
rename lib/{librte_net => net}/meson.build (100%)
rename lib/{librte_net => net}/net_crc.h (100%)
rename lib/{librte_net => net}/net_crc_avx512.c (100%)
rename lib/{librte_net => net}/net_crc_neon.c (100%)
rename lib/{librte_net => net}/net_crc_sse.c (100%)
rename lib/{librte_net => net}/rte_arp.c (100%)
rename lib/{librte_net => net}/rte_arp.h (100%)
rename lib/{librte_net => net}/rte_ecpri.h (100%)
rename lib/{librte_net => net}/rte_esp.h (100%)
rename lib/{librte_net => net}/rte_ether.c (100%)
rename lib/{librte_net => net}/rte_ether.h (100%)
rename lib/{librte_net => net}/rte_geneve.h (100%)
rename lib/{librte_net => net}/rte_gre.h (100%)
rename lib/{librte_net => net}/rte_gtp.h (100%)
rename lib/{librte_net => net}/rte_higig.h (100%)
rename lib/{librte_net => net}/rte_icmp.h (100%)
rename lib/{librte_net => net}/rte_ip.h (100%)
rename lib/{librte_net => net}/rte_mpls.h (100%)
rename lib/{librte_net => net}/rte_net.c (100%)
rename lib/{librte_net => net}/rte_net.h (100%)
rename lib/{librte_net => net}/rte_net_crc.c (100%)
rename lib/{librte_net => net}/rte_net_crc.h (100%)
rename lib/{librte_net => net}/rte_sctp.h (100%)
rename lib/{librte_net => net}/rte_tcp.h (100%)
rename lib/{librte_net => net}/rte_udp.h (100%)
rename lib/{librte_net => net}/rte_vxlan.h (100%)
rename lib/{librte_net => net}/version.map (100%)
rename lib/{librte_node => node}/ethdev_ctrl.c (100%)
rename lib/{librte_node => node}/ethdev_rx.c (100%)
rename lib/{librte_node => node}/ethdev_rx_priv.h (100%)
rename lib/{librte_node => node}/ethdev_tx.c (100%)
rename lib/{librte_node => node}/ethdev_tx_priv.h (100%)
rename lib/{librte_node => node}/ip4_lookup.c (100%)
rename lib/{librte_node => node}/ip4_lookup_neon.h (100%)
rename lib/{librte_node => node}/ip4_lookup_sse.h (100%)
rename lib/{librte_node => node}/ip4_rewrite.c (100%)
rename lib/{librte_node => node}/ip4_rewrite_priv.h (100%)
rename lib/{librte_node => node}/log.c (100%)
rename lib/{librte_node => node}/meson.build (100%)
rename lib/{librte_node => node}/node_private.h (100%)
rename lib/{librte_node => node}/null.c (100%)
rename lib/{librte_node => node}/pkt_cls.c (100%)
rename lib/{librte_node => node}/pkt_cls_priv.h (100%)
rename lib/{librte_node => node}/pkt_drop.c (100%)
rename lib/{librte_node => node}/rte_node_eth_api.h (100%)
rename lib/{librte_node => node}/rte_node_ip4_api.h (100%)
rename lib/{librte_node => node}/version.map (100%)
rename lib/{librte_pci => pci}/meson.build (100%)
rename lib/{librte_pci => pci}/rte_pci.c (100%)
rename lib/{librte_pci => pci}/rte_pci.h (100%)
rename lib/{librte_pci => pci}/version.map (100%)
rename lib/{librte_pdump => pdump}/meson.build (100%)
rename lib/{librte_pdump => pdump}/rte_pdump.c (100%)
rename lib/{librte_pdump => pdump}/rte_pdump.h (100%)
rename lib/{librte_pdump => pdump}/version.map (100%)
rename lib/{librte_pipeline => pipeline}/meson.build (100%)
rename lib/{librte_pipeline => pipeline}/rte_pipeline.c (100%)
rename lib/{librte_pipeline => pipeline}/rte_pipeline.h (100%)
rename lib/{librte_pipeline => pipeline}/rte_port_in_action.c (100%)
rename lib/{librte_pipeline => pipeline}/rte_port_in_action.h (100%)
rename lib/{librte_pipeline => pipeline}/rte_swx_ctl.c (100%)
rename lib/{librte_pipeline => pipeline}/rte_swx_ctl.h (100%)
rename lib/{librte_pipeline => pipeline}/rte_swx_extern.h (100%)
rename lib/{librte_pipeline => pipeline}/rte_swx_pipeline.c (100%)
rename lib/{librte_pipeline => pipeline}/rte_swx_pipeline.h (100%)
rename lib/{librte_pipeline => pipeline}/rte_swx_pipeline_spec.c (100%)
rename lib/{librte_pipeline => pipeline}/rte_table_action.c (100%)
rename lib/{librte_pipeline => pipeline}/rte_table_action.h (100%)
rename lib/{librte_pipeline => pipeline}/version.map (100%)
rename lib/{librte_port => port}/meson.build (100%)
rename lib/{librte_port => port}/rte_port.h (100%)
rename lib/{librte_port => port}/rte_port_ethdev.c (100%)
rename lib/{librte_port => port}/rte_port_ethdev.h (100%)
rename lib/{librte_port => port}/rte_port_eventdev.c (100%)
rename lib/{librte_port => port}/rte_port_eventdev.h (100%)
rename lib/{librte_port => port}/rte_port_fd.c (100%)
rename lib/{librte_port => port}/rte_port_fd.h (100%)
rename lib/{librte_port => port}/rte_port_frag.c (100%)
rename lib/{librte_port => port}/rte_port_frag.h (100%)
rename lib/{librte_port => port}/rte_port_kni.c (100%)
rename lib/{librte_port => port}/rte_port_kni.h (100%)
rename lib/{librte_port => port}/rte_port_ras.c (100%)
rename lib/{librte_port => port}/rte_port_ras.h (100%)
rename lib/{librte_port => port}/rte_port_ring.c (100%)
rename lib/{librte_port => port}/rte_port_ring.h (100%)
rename lib/{librte_port => port}/rte_port_sched.c (100%)
rename lib/{librte_port => port}/rte_port_sched.h (100%)
rename lib/{librte_port => port}/rte_port_source_sink.c (100%)
rename lib/{librte_port => port}/rte_port_source_sink.h (100%)
rename lib/{librte_port => port}/rte_port_sym_crypto.c (100%)
rename lib/{librte_port => port}/rte_port_sym_crypto.h (100%)
rename lib/{librte_port => port}/rte_swx_port.h (100%)
rename lib/{librte_port => port}/rte_swx_port_ethdev.c (100%)
rename lib/{librte_port => port}/rte_swx_port_ethdev.h (100%)
rename lib/{librte_port => port}/rte_swx_port_fd.c (100%)
rename lib/{librte_port => port}/rte_swx_port_fd.h (100%)
rename lib/{librte_port => port}/rte_swx_port_ring.c (100%)
rename lib/{librte_port => port}/rte_swx_port_ring.h (100%)
rename lib/{librte_port => port}/rte_swx_port_source_sink.c (100%)
rename lib/{librte_port => port}/rte_swx_port_source_sink.h (100%)
rename lib/{librte_port => port}/version.map (100%)
rename lib/{librte_power => power}/guest_channel.c (100%)
rename lib/{librte_power => power}/guest_channel.h (100%)
rename lib/{librte_power => power}/meson.build (100%)
rename lib/{librte_power => power}/power_acpi_cpufreq.c (100%)
rename lib/{librte_power => power}/power_acpi_cpufreq.h (100%)
rename lib/{librte_power => power}/power_common.c (100%)
rename lib/{librte_power => power}/power_common.h (100%)
rename lib/{librte_power => power}/power_kvm_vm.c (100%)
rename lib/{librte_power => power}/power_kvm_vm.h (100%)
rename lib/{librte_power => power}/power_pstate_cpufreq.c (100%)
rename lib/{librte_power => power}/power_pstate_cpufreq.h (100%)
rename lib/{librte_power => power}/rte_power.c (100%)
rename lib/{librte_power => power}/rte_power.h (100%)
rename lib/{librte_power => power}/rte_power_empty_poll.c (100%)
rename lib/{librte_power => power}/rte_power_empty_poll.h (100%)
rename lib/{librte_power => power}/rte_power_guest_channel.h (100%)
rename lib/{librte_power => power}/rte_power_pmd_mgmt.c (100%)
rename lib/{librte_power => power}/rte_power_pmd_mgmt.h (100%)
rename lib/{librte_power => power}/version.map (100%)
rename lib/{librte_rawdev => rawdev}/meson.build (100%)
rename lib/{librte_rawdev => rawdev}/rte_rawdev.c (100%)
rename lib/{librte_rawdev => rawdev}/rte_rawdev.h (100%)
rename lib/{librte_rawdev => rawdev}/rte_rawdev_pmd.h (100%)
rename lib/{librte_rawdev => rawdev}/version.map (100%)
rename lib/{librte_rcu => rcu}/meson.build (100%)
rename lib/{librte_rcu => rcu}/rcu_qsbr_pvt.h (100%)
rename lib/{librte_rcu => rcu}/rte_rcu_qsbr.c (100%)
rename lib/{librte_rcu => rcu}/rte_rcu_qsbr.h (100%)
rename lib/{librte_rcu => rcu}/version.map (100%)
rename lib/{librte_regexdev => regexdev}/meson.build (100%)
rename lib/{librte_regexdev => regexdev}/rte_regexdev.c (100%)
rename lib/{librte_regexdev => regexdev}/rte_regexdev.h (100%)
rename lib/{librte_regexdev => regexdev}/rte_regexdev_core.h (100%)
rename lib/{librte_regexdev => regexdev}/rte_regexdev_driver.h (100%)
rename lib/{librte_regexdev => regexdev}/version.map (100%)
rename lib/{librte_reorder => reorder}/meson.build (100%)
rename lib/{librte_reorder => reorder}/rte_reorder.c (100%)
rename lib/{librte_reorder => reorder}/rte_reorder.h (100%)
rename lib/{librte_reorder => reorder}/version.map (100%)
rename lib/{librte_rib => rib}/meson.build (100%)
rename lib/{librte_rib => rib}/rte_rib.c (100%)
rename lib/{librte_rib => rib}/rte_rib.h (100%)
rename lib/{librte_rib => rib}/rte_rib6.c (100%)
rename lib/{librte_rib => rib}/rte_rib6.h (100%)
rename lib/{librte_rib => rib}/version.map (100%)
rename lib/{librte_ring => ring}/meson.build (100%)
rename lib/{librte_ring => ring}/rte_ring.c (100%)
rename lib/{librte_ring => ring}/rte_ring.h (100%)
rename lib/{librte_ring => ring}/rte_ring_c11_pvt.h (100%)
rename lib/{librte_ring => ring}/rte_ring_core.h (100%)
rename lib/{librte_ring => ring}/rte_ring_elem.h (100%)
rename lib/{librte_ring => ring}/rte_ring_elem_pvt.h (100%)
rename lib/{librte_ring => ring}/rte_ring_generic_pvt.h (100%)
rename lib/{librte_ring => ring}/rte_ring_hts.h (100%)
rename lib/{librte_ring => ring}/rte_ring_hts_elem_pvt.h (100%)
rename lib/{librte_ring => ring}/rte_ring_peek.h (100%)
rename lib/{librte_ring => ring}/rte_ring_peek_elem_pvt.h (100%)
rename lib/{librte_ring => ring}/rte_ring_peek_zc.h (100%)
rename lib/{librte_ring => ring}/rte_ring_rts.h (100%)
rename lib/{librte_ring => ring}/rte_ring_rts_elem_pvt.h (100%)
rename lib/{librte_ring => ring}/version.map (100%)
rename lib/{librte_sched => sched}/meson.build (100%)
rename lib/{librte_sched => sched}/rte_approx.c (100%)
rename lib/{librte_sched => sched}/rte_approx.h (100%)
rename lib/{librte_sched => sched}/rte_red.c (100%)
rename lib/{librte_sched => sched}/rte_red.h (100%)
rename lib/{librte_sched => sched}/rte_sched.c (100%)
rename lib/{librte_sched => sched}/rte_sched.h (100%)
rename lib/{librte_sched => sched}/rte_sched_common.h (100%)
rename lib/{librte_sched => sched}/version.map (100%)
rename lib/{librte_security => security}/meson.build (100%)
rename lib/{librte_security => security}/rte_security.c (100%)
rename lib/{librte_security => security}/rte_security.h (100%)
rename lib/{librte_security => security}/rte_security_driver.h (100%)
rename lib/{librte_security => security}/version.map (100%)
rename lib/{librte_stack => stack}/meson.build (100%)
rename lib/{librte_stack => stack}/rte_stack.c (100%)
rename lib/{librte_stack => stack}/rte_stack.h (100%)
rename lib/{librte_stack => stack}/rte_stack_lf.c (100%)
rename lib/{librte_stack => stack}/rte_stack_lf.h (100%)
rename lib/{librte_stack => stack}/rte_stack_lf_c11.h (100%)
rename lib/{librte_stack => stack}/rte_stack_lf_generic.h (100%)
rename lib/{librte_stack => stack}/rte_stack_lf_stubs.h (100%)
rename lib/{librte_stack => stack}/rte_stack_std.c (100%)
rename lib/{librte_stack => stack}/rte_stack_std.h (100%)
rename lib/{librte_stack => stack}/stack_pvt.h (100%)
rename lib/{librte_stack => stack}/version.map (100%)
rename lib/{librte_table => table}/meson.build (100%)
rename lib/{librte_table => table}/rte_lru.h (100%)
rename lib/{librte_table => table}/rte_lru_arm64.h (100%)
rename lib/{librte_table => table}/rte_lru_x86.h (100%)
rename lib/{librte_table => table}/rte_swx_table.h (100%)
rename lib/{librte_table => table}/rte_swx_table_em.c (100%)
rename lib/{librte_table => table}/rte_swx_table_em.h (100%)
rename lib/{librte_table => table}/rte_swx_table_wm.c (100%)
rename lib/{librte_table => table}/rte_swx_table_wm.h (100%)
rename lib/{librte_table => table}/rte_table.h (100%)
rename lib/{librte_table => table}/rte_table_acl.c (100%)
rename lib/{librte_table => table}/rte_table_acl.h (100%)
rename lib/{librte_table => table}/rte_table_array.c (100%)
rename lib/{librte_table => table}/rte_table_array.h (100%)
rename lib/{librte_table => table}/rte_table_hash.h (100%)
rename lib/{librte_table => table}/rte_table_hash_cuckoo.c (100%)
rename lib/{librte_table => table}/rte_table_hash_cuckoo.h (100%)
rename lib/{librte_table => table}/rte_table_hash_ext.c (100%)
rename lib/{librte_table => table}/rte_table_hash_func.h (100%)
rename lib/{librte_table => table}/rte_table_hash_func_arm64.h (100%)
rename lib/{librte_table => table}/rte_table_hash_key16.c (100%)
rename lib/{librte_table => table}/rte_table_hash_key32.c (100%)
rename lib/{librte_table => table}/rte_table_hash_key8.c (100%)
rename lib/{librte_table => table}/rte_table_hash_lru.c (100%)
rename lib/{librte_table => table}/rte_table_lpm.c (100%)
rename lib/{librte_table => table}/rte_table_lpm.h (100%)
rename lib/{librte_table => table}/rte_table_lpm_ipv6.c (100%)
rename lib/{librte_table => table}/rte_table_lpm_ipv6.h (100%)
rename lib/{librte_table => table}/rte_table_stub.c (100%)
rename lib/{librte_table => table}/rte_table_stub.h (100%)
rename lib/{librte_table => table}/version.map (100%)
rename lib/{librte_telemetry => telemetry}/meson.build (80%)
rename lib/{librte_telemetry => telemetry}/rte_telemetry.h (100%)
rename lib/{librte_telemetry => telemetry}/telemetry.c (100%)
rename lib/{librte_telemetry => telemetry}/telemetry_data.c (100%)
rename lib/{librte_telemetry => telemetry}/telemetry_data.h (100%)
rename lib/{librte_telemetry => telemetry}/telemetry_internal.h (100%)
rename lib/{librte_telemetry => telemetry}/telemetry_json.h (100%)
rename lib/{librte_telemetry => telemetry}/telemetry_legacy.c (100%)
rename lib/{librte_telemetry => telemetry}/version.map (100%)
rename lib/{librte_timer => timer}/meson.build (100%)
rename lib/{librte_timer => timer}/rte_timer.c (100%)
rename lib/{librte_timer => timer}/rte_timer.h (100%)
rename lib/{librte_timer => timer}/version.map (100%)
rename lib/{librte_vhost => vhost}/fd_man.c (100%)
rename lib/{librte_vhost => vhost}/fd_man.h (100%)
rename lib/{librte_vhost => vhost}/iotlb.c (100%)
rename lib/{librte_vhost => vhost}/iotlb.h (100%)
rename lib/{librte_vhost => vhost}/meson.build (100%)
rename lib/{librte_vhost => vhost}/rte_vdpa.h (100%)
rename lib/{librte_vhost => vhost}/rte_vdpa_dev.h (100%)
rename lib/{librte_vhost => vhost}/rte_vhost.h (100%)
rename lib/{librte_vhost => vhost}/rte_vhost_async.h (100%)
rename lib/{librte_vhost => vhost}/rte_vhost_crypto.h (100%)
rename lib/{librte_vhost => vhost}/socket.c (100%)
rename lib/{librte_vhost => vhost}/vdpa.c (100%)
rename lib/{librte_vhost => vhost}/version.map (100%)
rename lib/{librte_vhost => vhost}/vhost.c (100%)
rename lib/{librte_vhost => vhost}/vhost.h (100%)
rename lib/{librte_vhost => vhost}/vhost_crypto.c (100%)
rename lib/{librte_vhost => vhost}/vhost_user.c (100%)
rename lib/{librte_vhost => vhost}/vhost_user.h (100%)
rename lib/{librte_vhost => vhost}/virtio_crypto.h (100%)
rename lib/{librte_vhost => vhost}/virtio_net.c (100%)
diff --git a/MAINTAINERS b/MAINTAINERS
index 2550d950de..6a80ef7fae 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -114,8 +114,8 @@ F: .ci/
ABI Policy & Versioning
M: Ray Kinsella <mdr@ashroe.eu>
M: Neil Horman <nhorman@tuxdriver.com>
-F: lib/librte_eal/include/rte_compat.h
-F: lib/librte_eal/include/rte_function_versioning.h
+F: lib/eal/include/rte_compat.h
+F: lib/eal/include/rte_function_versioning.h
F: doc/guides/contributing/abi_*.rst
F: doc/guides/rel_notes/deprecation.rst
F: devtools/check-abi.sh
@@ -145,10 +145,10 @@ Environment Abstraction Layer
T: git://dpdk.org/dpdk
EAL API and common code
-F: lib/librte_eal/common/
-F: lib/librte_eal/unix/
-F: lib/librte_eal/include/
-F: lib/librte_eal/version.map
+F: lib/eal/common/
+F: lib/eal/unix/
+F: lib/eal/include/
+F: lib/eal/version.map
F: doc/guides/prog_guide/env_abstraction_layer.rst
F: app/test/test_alarm.c
F: app/test/test_atomic.c
@@ -176,24 +176,24 @@ F: app/test/test_version.c
Trace - EXPERIMENTAL
M: Jerin Jacob <jerinj@marvell.com>
M: Sunil Kumar Kori <skori@marvell.com>
-F: lib/librte_eal/include/rte_trace*.h
-F: lib/librte_eal/common/eal_common_trace*.c
-F: lib/librte_eal/common/eal_trace.h
+F: lib/eal/include/rte_trace*.h
+F: lib/eal/common/eal_common_trace*.c
+F: lib/eal/common/eal_trace.h
F: doc/guides/prog_guide/trace_lib.rst
F: app/test/test_trace*
Memory Allocation
M: Anatoly Burakov <anatoly.burakov@intel.com>
-F: lib/librte_eal/include/rte_fbarray.h
-F: lib/librte_eal/include/rte_mem*
-F: lib/librte_eal/include/rte_malloc.h
-F: lib/librte_eal/common/*malloc*
-F: lib/librte_eal/common/eal_common_dynmem.c
-F: lib/librte_eal/common/eal_common_fbarray.c
-F: lib/librte_eal/common/eal_common_mem*
-F: lib/librte_eal/common/eal_hugepages.h
-F: lib/librte_eal/linux/eal_mem*
-F: lib/librte_eal/freebsd/eal_mem*
+F: lib/eal/include/rte_fbarray.h
+F: lib/eal/include/rte_mem*
+F: lib/eal/include/rte_malloc.h
+F: lib/eal/common/*malloc*
+F: lib/eal/common/eal_common_dynmem.c
+F: lib/eal/common/eal_common_fbarray.c
+F: lib/eal/common/eal_common_mem*
+F: lib/eal/common/eal_hugepages.h
+F: lib/eal/linux/eal_mem*
+F: lib/eal/freebsd/eal_mem*
F: doc/guides/prog_guide/env_abstraction_layer.rst
F: app/test/test_external_mem.c
F: app/test/test_func_reentrancy.c
@@ -204,19 +204,19 @@ F: app/test/test_memzone.c
Interrupt Subsystem
M: Harman Kalra <hkalra@marvell.com>
-F: lib/librte_eal/*/*interrupts.*
+F: lib/eal/*/*interrupts.*
F: app/test/test_interrupts.c
Keep alive
-F: lib/librte_eal/include/rte_keepalive.h
-F: lib/librte_eal/common/rte_keepalive.c
+F: lib/eal/include/rte_keepalive.h
+F: lib/eal/common/rte_keepalive.c
F: examples/l2fwd-keepalive/
F: doc/guides/sample_app_ug/keep_alive.rst
Secondary process
M: Anatoly Burakov <anatoly.burakov@intel.com>
K: RTE_PROC_
-F: lib/librte_eal/common/eal_common_proc.c
+F: lib/eal/common/eal_common_proc.c
F: doc/guides/prog_guide/multi_proc_support.rst
F: app/test/test_mp_secondary.c
F: examples/multi_process/
@@ -224,52 +224,52 @@ F: doc/guides/sample_app_ug/multi_process.rst
Service Cores
M: Harry van Haaren <harry.van.haaren@intel.com>
-F: lib/librte_eal/include/rte_service.h
-F: lib/librte_eal/include/rte_service_component.h
-F: lib/librte_eal/common/rte_service.c
+F: lib/eal/include/rte_service.h
+F: lib/eal/include/rte_service_component.h
+F: lib/eal/common/rte_service.c
F: doc/guides/prog_guide/service_cores.rst
F: app/test/test_service_cores.c
Bitops
M: Joyce Kong <joyce.kong@arm.com>
-F: lib/librte_eal/include/rte_bitops.h
+F: lib/eal/include/rte_bitops.h
F: app/test/test_bitops.c
Bitmap
M: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
-F: lib/librte_eal/include/rte_bitmap.h
+F: lib/eal/include/rte_bitmap.h
F: app/test/test_bitmap.c
MCSlock
M: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
-F: lib/librte_eal/include/generic/rte_mcslock.h
+F: lib/eal/include/generic/rte_mcslock.h
F: app/test/test_mcslock.c
Ticketlock
M: Joyce Kong <joyce.kong@arm.com>
-F: lib/librte_eal/include/generic/rte_ticketlock.h
+F: lib/eal/include/generic/rte_ticketlock.h
F: app/test/test_ticketlock.c
Pseudo-random Number Generation
M: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
-F: lib/librte_eal/include/rte_random.h
-F: lib/librte_eal/common/rte_random.c
+F: lib/eal/include/rte_random.h
+F: lib/eal/common/rte_random.c
F: app/test/test_rand_perf.c
ARM v7
M: Jan Viktorin <viktorin@rehivetech.com>
M: Ruifeng Wang <ruifeng.wang@arm.com>
F: config/arm/
-F: lib/librte_eal/arm/
-X: lib/librte_eal/arm/include/*_64.h
+F: lib/eal/arm/
+X: lib/eal/arm/include/*_64.h
ARM v8
M: Jerin Jacob <jerinj@marvell.com>
M: Ruifeng Wang <ruifeng.wang@arm.com>
F: config/arm/
F: doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst
-F: lib/librte_eal/arm/
-X: lib/librte_eal/arm/include/*_32.h
+F: lib/eal/arm/
+X: lib/eal/arm/include/*_32.h
F: lib/*/*_arm64.*
F: lib/*/*_neon.*
F: drivers/*/*/*_neon.*
@@ -279,7 +279,7 @@ F: examples/*/*_neon.*
IBM POWER (alpha)
M: David Christensen <drc@linux.vnet.ibm.com>
F: config/ppc/
-F: lib/librte_eal/ppc/
+F: lib/eal/ppc/
F: lib/*/*_altivec*
F: drivers/*/*/*_altivec.*
F: app/*/*_altivec.*
@@ -292,7 +292,7 @@ F: config/x86/
F: doc/guides/linux_gsg/nic_perf_intel_platform.rst
F: buildtools/binutils-avx512-check.sh
F: doc/guides/howto/avx512.rst
-F: lib/librte_eal/x86/
+F: lib/eal/x86/
F: lib/*/*_sse*
F: lib/*/*_avx*
F: drivers/*/*/*_sse*
@@ -303,7 +303,7 @@ F: examples/*/*_sse*
F: examples/*/*_avx*
Linux EAL (with overlaps)
-F: lib/librte_eal/linux/
+F: lib/eal/linux/
F: doc/guides/linux_gsg/
Linux UIO
@@ -312,12 +312,12 @@ F: drivers/bus/pci/linux/*uio*
Linux VFIO
M: Anatoly Burakov <anatoly.burakov@intel.com>
-F: lib/librte_eal/linux/*vfio*
+F: lib/eal/linux/*vfio*
F: drivers/bus/pci/linux/*vfio*
FreeBSD EAL (with overlaps)
M: Bruce Richardson <bruce.richardson@intel.com>
-F: lib/librte_eal/freebsd/
+F: lib/eal/freebsd/
F: doc/guides/freebsd_gsg/
FreeBSD contigmem
@@ -333,14 +333,14 @@ M: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
M: Narcisa Ana Maria Vasile <navasile@linux.microsoft.com>
M: Dmitry Malloy <dmitrym@microsoft.com>
M: Pallavi Kadam <pallavi.kadam@intel.com>
-F: lib/librte_eal/windows/
+F: lib/eal/windows/
F: buildtools/map_to_win.py
F: doc/guides/windows_gsg/
Windows memory allocation
M: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
-F: lib/librte_eal/windows/eal_hugepages.c
-F: lib/librte_eal/windows/eal_mem*
+F: lib/eal/windows/eal_hugepages.c
+F: lib/eal/windows/eal_mem*
Core Libraries
@@ -350,7 +350,7 @@ T: git://dpdk.org/dpdk
Memory pool
M: Olivier Matz <olivier.matz@6wind.com>
M: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
-F: lib/librte_mempool/
+F: lib/mempool/
F: drivers/mempool/ring/
F: doc/guides/prog_guide/mempool_lib.rst
F: app/test/test_mempool*
@@ -359,21 +359,21 @@ F: app/test/test_func_reentrancy.c
Ring queue
M: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
M: Konstantin Ananyev <konstantin.ananyev@intel.com>
-F: lib/librte_ring/
+F: lib/ring/
F: doc/guides/prog_guide/ring_lib.rst
F: app/test/test_ring*
F: app/test/test_func_reentrancy.c
Stack
M: Olivier Matz <olivier.matz@6wind.com>
-F: lib/librte_stack/
+F: lib/stack/
F: drivers/mempool/stack/
F: app/test/test_stack*
F: doc/guides/prog_guide/stack_lib.rst
Packet buffer
M: Olivier Matz <olivier.matz@6wind.com>
-F: lib/librte_mbuf/
+F: lib/mbuf/
F: doc/guides/prog_guide/mbuf_lib.rst
F: app/test/test_mbuf.c
@@ -382,7 +382,7 @@ M: Thomas Monjalon <thomas@monjalon.net>
M: Ferruh Yigit <ferruh.yigit@intel.com>
M: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
T: git://dpdk.org/next/dpdk-next-net
-F: lib/librte_ethdev/
+F: lib/ethdev/
F: app/test/test_ethdev*
F: devtools/test-null.sh
F: doc/guides/prog_guide/switch_representation.rst
@@ -392,22 +392,22 @@ M: Ori Kam <orika@nvidia.com>
T: git://dpdk.org/next/dpdk-next-net
F: app/test-pmd/cmdline_flow.c
F: doc/guides/prog_guide/rte_flow.rst
-F: lib/librte_ethdev/rte_flow*
+F: lib/ethdev/rte_flow*
Traffic Management API - EXPERIMENTAL
M: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
T: git://dpdk.org/next/dpdk-next-net
-F: lib/librte_ethdev/rte_tm*
+F: lib/ethdev/rte_tm*
Traffic Metering and Policing API - EXPERIMENTAL
M: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
T: git://dpdk.org/next/dpdk-next-net
-F: lib/librte_ethdev/rte_mtr*
+F: lib/ethdev/rte_mtr*
Baseband API - EXPERIMENTAL
M: Nicolas Chautru <nicolas.chautru@intel.com>
T: git://dpdk.org/next/dpdk-next-crypto
-F: lib/librte_bbdev/
+F: lib/bbdev/
F: doc/guides/prog_guide/bbdev.rst
F: drivers/baseband/
F: doc/guides/bbdevs/
@@ -419,7 +419,7 @@ F: doc/guides/sample_app_ug/bbdev_app.rst
Crypto API
M: Declan Doherty <declan.doherty@intel.com>
T: git://dpdk.org/next/dpdk-next-crypto
-F: lib/librte_cryptodev/
+F: lib/cryptodev/
F: app/test/test_cryptodev*
F: examples/l2fwd-crypto/
@@ -427,7 +427,7 @@ Security API
M: Akhil Goyal <gakhil@marvell.com>
M: Declan Doherty <declan.doherty@intel.com>
T: git://dpdk.org/next/dpdk-next-crypto
-F: lib/librte_security/
+F: lib/security/
F: doc/guides/prog_guide/rte_security.rst
F: app/test/test_security.c
@@ -435,7 +435,7 @@ Compression API - EXPERIMENTAL
M: Fiona Trahe <fiona.trahe@intel.com>
M: Ashish Gupta <ashish.gupta@marvell.com>
T: git://dpdk.org/next/dpdk-next-crypto
-F: lib/librte_compressdev/
+F: lib/compressdev/
F: drivers/compress/
F: app/test/test_compressdev*
F: doc/guides/prog_guide/compressdev.rst
@@ -443,7 +443,7 @@ F: doc/guides/compressdevs/features/default.ini
RegEx API - EXPERIMENTAL
M: Ori Kam <orika@nvidia.com>
-F: lib/librte_regexdev/
+F: lib/regexdev/
F: app/test-regex/
F: doc/guides/prog_guide/regexdev.rst
F: doc/guides/regexdevs/features/default.ini
@@ -451,7 +451,7 @@ F: doc/guides/regexdevs/features/default.ini
Eventdev API
M: Jerin Jacob <jerinj@marvell.com>
T: git://dpdk.org/next/dpdk-next-eventdev
-F: lib/librte_eventdev/
+F: lib/eventdev/
F: drivers/event/skeleton/
F: app/test/test_eventdev.c
F: examples/l3fwd/l3fwd_event*
@@ -459,35 +459,35 @@ F: examples/l3fwd/l3fwd_event*
Eventdev Ethdev Rx Adapter API
M: Jay Jayatheerthan <jay.jayatheerthan@intel.com>
T: git://dpdk.org/next/dpdk-next-eventdev
-F: lib/librte_eventdev/*eth_rx_adapter*
+F: lib/eventdev/*eth_rx_adapter*
F: app/test/test_event_eth_rx_adapter.c
F: doc/guides/prog_guide/event_ethernet_rx_adapter.rst
Eventdev Ethdev Tx Adapter API
M: Jay Jayatheerthan <jay.jayatheerthan@intel.com>
T: git://dpdk.org/next/dpdk-next-eventdev
-F: lib/librte_eventdev/*eth_tx_adapter*
+F: lib/eventdev/*eth_tx_adapter*
F: app/test/test_event_eth_tx_adapter.c
F: doc/guides/prog_guide/event_ethernet_tx_adapter.rst
Eventdev Timer Adapter API
M: Erik Gabriel Carrillo <erik.g.carrillo@intel.com>
T: git://dpdk.org/next/dpdk-next-eventdev
-F: lib/librte_eventdev/*timer_adapter*
+F: lib/eventdev/*timer_adapter*
F: app/test/test_event_timer_adapter.c
F: doc/guides/prog_guide/event_timer_adapter.rst
Eventdev Crypto Adapter API
M: Abhinandan Gujjar <abhinandan.gujjar@intel.com>
T: git://dpdk.org/next/dpdk-next-eventdev
-F: lib/librte_eventdev/*crypto_adapter*
+F: lib/eventdev/*crypto_adapter*
F: app/test/test_event_crypto_adapter.c
F: doc/guides/prog_guide/event_crypto_adapter.rst
Raw device API
M: Nipun Gupta <nipun.gupta@nxp.com>
M: Hemant Agrawal <hemant.agrawal@nxp.com>
-F: lib/librte_rawdev/
+F: lib/rawdev/
F: drivers/raw/skeleton/
F: app/test/test_rawdev.c
F: doc/guides/prog_guide/rawdev.rst
@@ -561,7 +561,7 @@ F: examples/bond/
Linux KNI
M: Ferruh Yigit <ferruh.yigit@intel.com>
F: kernel/linux/kni/
-F: lib/librte_kni/
+F: lib/kni/
F: doc/guides/prog_guide/kernel_nic_interface.rst
F: app/test/test_kni.c
F: examples/kni/
@@ -913,7 +913,7 @@ Vhost-user
M: Maxime Coquelin <maxime.coquelin@redhat.com>
M: Chenbo Xia <chenbo.xia@intel.com>
T: git://dpdk.org/next/dpdk-next-virtio
-F: lib/librte_vhost/
+F: lib/vhost/
F: doc/guides/prog_guide/vhost_lib.rst
F: examples/vhost/
F: doc/guides/sample_app_ug/vhost.rst
@@ -1307,19 +1307,19 @@ Packet processing
Network headers
M: Olivier Matz <olivier.matz@6wind.com>
-F: lib/librte_net/
+F: lib/net/
Packet CRC
M: Jasvinder Singh <jasvinder.singh@intel.com>
-F: lib/librte_net/net_crc.h
-F: lib/librte_net/rte_net_crc*
-F: lib/librte_net/net_crc_avx512.c
-F: lib/librte_net/net_crc_sse.c
+F: lib/net/net_crc.h
+F: lib/net/rte_net_crc*
+F: lib/net/net_crc_avx512.c
+F: lib/net/net_crc_sse.c
F: app/test/test_crc.c
IP fragmentation & reassembly
M: Konstantin Ananyev <konstantin.ananyev@intel.com>
-F: lib/librte_ip_frag/
+F: lib/ip_frag/
F: doc/guides/prog_guide/ip_fragment_reassembly_lib.rst
F: app/test/test_ipfrag.c
F: examples/ip_fragmentation/
@@ -1329,18 +1329,18 @@ F: doc/guides/sample_app_ug/ip_reassembly.rst
Generic Receive Offload - EXPERIMENTAL
M: Jiayu Hu <jiayu.hu@intel.com>
-F: lib/librte_gro/
+F: lib/gro/
F: doc/guides/prog_guide/generic_receive_offload_lib.rst
Generic Segmentation Offload
M: Jiayu Hu <jiayu.hu@intel.com>
-F: lib/librte_gso/
+F: lib/gso/
F: doc/guides/prog_guide/generic_segmentation_offload_lib.rst
IPsec
M: Konstantin Ananyev <konstantin.ananyev@intel.com>
T: git://dpdk.org/next/dpdk-next-crypto
-F: lib/librte_ipsec/
+F: lib/ipsec/
M: Bernard Iremonger <bernard.iremonger@intel.com>
F: app/test/test_ipsec*
F: doc/guides/prog_guide/ipsec_lib.rst
@@ -1349,7 +1349,7 @@ F: app/test-sad/
Flow Classify - EXPERIMENTAL
M: Bernard Iremonger <bernard.iremonger@intel.com>
-F: lib/librte_flow_classify/
+F: lib/flow_classify/
F: app/test/test_flow_classify*
F: doc/guides/prog_guide/flow_classify_lib.rst
F: examples/flow_classify/
@@ -1357,7 +1357,7 @@ F: doc/guides/sample_app_ug/flow_classify.rst
Distributor
M: David Hunt <david.hunt@intel.com>
-F: lib/librte_distributor/
+F: lib/distributor/
F: doc/guides/prog_guide/packet_distrib_lib.rst
F: app/test/test_distributor*
F: examples/distributor/
@@ -1365,7 +1365,7 @@ F: doc/guides/sample_app_ug/dist_app.rst
Reorder
M: Reshma Pattan <reshma.pattan@intel.com>
-F: lib/librte_reorder/
+F: lib/reorder/
F: doc/guides/prog_guide/reorder_lib.rst
F: app/test/test_reorder*
F: examples/packet_ordering/
@@ -1374,7 +1374,7 @@ F: doc/guides/sample_app_ug/packet_ordering.rst
Hierarchical scheduler
M: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
M: Jasvinder Singh <jasvinder.singh@intel.com>
-F: lib/librte_sched/
+F: lib/sched/
F: doc/guides/prog_guide/qos_framework.rst
F: app/test/test_red.c
F: app/test/test_sched.c
@@ -1383,7 +1383,7 @@ F: doc/guides/sample_app_ug/qos_scheduler.rst
Packet capture
M: Reshma Pattan <reshma.pattan@intel.com>
-F: lib/librte_pdump/
+F: lib/pdump/
F: doc/guides/prog_guide/pdump_lib.rst
F: app/test/test_pdump.*
F: app/pdump/
@@ -1393,9 +1393,9 @@ F: doc/guides/tools/pdump.rst
Packet Framework
----------------
M: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
-F: lib/librte_pipeline/
-F: lib/librte_port/
-F: lib/librte_table/
+F: lib/pipeline/
+F: lib/port/
+F: lib/table/
F: doc/guides/prog_guide/packet_framework.rst
F: app/test/test_table*
F: app/test-pipeline/
@@ -1410,7 +1410,7 @@ Algorithms
ACL
M: Konstantin Ananyev <konstantin.ananyev@intel.com>
-F: lib/librte_acl/
+F: lib/acl/
F: doc/guides/prog_guide/packet_classif_access_ctrl.rst
F: app/test-acl/
F: app/test/test_acl.*
@@ -1420,7 +1420,7 @@ F: doc/guides/sample_app_ug/l3_forward_access_ctrl.rst
EFD
M: Byron Marohn <byron.marohn@intel.com>
M: Yipeng Wang <yipeng1.wang@intel.com>
-F: lib/librte_efd/
+F: lib/efd/
F: doc/guides/prog_guide/efd_lib.rst
F: app/test/test_efd*
F: examples/server_node_efd/
@@ -1430,7 +1430,7 @@ Hashes
M: Yipeng Wang <yipeng1.wang@intel.com>
M: Sameh Gobriel <sameh.gobriel@intel.com>
M: Bruce Richardson <bruce.richardson@intel.com>
-F: lib/librte_hash/
+F: lib/hash/
F: doc/guides/prog_guide/hash_lib.rst
F: app/test/test_*hash*
F: app/test/test_func_reentrancy.c
@@ -1438,7 +1438,7 @@ F: app/test/test_func_reentrancy.c
LPM
M: Bruce Richardson <bruce.richardson@intel.com>
M: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
-F: lib/librte_lpm/
+F: lib/lpm/
F: doc/guides/prog_guide/lpm*
F: app/test/test_lpm*
F: app/test/test_func_reentrancy.c
@@ -1447,21 +1447,21 @@ F: app/test/test_xmmt_ops.h
Membership - EXPERIMENTAL
M: Yipeng Wang <yipeng1.wang@intel.com>
M: Sameh Gobriel <sameh.gobriel@intel.com>
-F: lib/librte_member/
+F: lib/member/
F: doc/guides/prog_guide/member_lib.rst
F: app/test/test_member*
RIB/FIB - EXPERIMENTAL
M: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
-F: lib/librte_rib/
+F: lib/rib/
F: app/test/test_rib*
-F: lib/librte_fib/
+F: lib/fib/
F: app/test/test_fib*
F: app/test-fib/
Traffic metering
M: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
-F: lib/librte_meter/
+F: lib/meter/
F: doc/guides/sample_app_ug/qos_scheduler.rst
F: app/test/test_meter.c
F: examples/qos_meter/
@@ -1473,13 +1473,13 @@ Other libraries
Configuration file
M: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
-F: lib/librte_cfgfile/
+F: lib/cfgfile/
F: app/test/test_cfgfile.c
F: app/test/test_cfgfiles/
Interactive command line
M: Olivier Matz <olivier.matz@6wind.com>
-F: lib/librte_cmdline/
+F: lib/cmdline/
F: app/test-cmdline/
F: app/test/test_cmdline*
F: examples/cmdline/
@@ -1487,22 +1487,22 @@ F: doc/guides/sample_app_ug/cmd_line.rst
Key/Value parsing
M: Olivier Matz <olivier.matz@6wind.com>
-F: lib/librte_kvargs/
+F: lib/kvargs/
F: app/test/test_kvargs.c
RCU
M: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
-F: lib/librte_rcu/
+F: lib/rcu/
F: app/test/test_rcu*
F: doc/guides/prog_guide/rcu_lib.rst
PCI
M: Gaetan Rivet <grive@u256.net>
-F: lib/librte_pci/
+F: lib/pci/
Power management
M: David Hunt <david.hunt@intel.com>
-F: lib/librte_power/
+F: lib/power/
F: doc/guides/prog_guide/power_man.rst
F: app/test/test_power*
F: examples/l3fwd-power/
@@ -1513,40 +1513,40 @@ F: doc/guides/sample_app_ug/vm_power_management.rst
Timers
M: Robert Sanford <rsanford@akamai.com>
M: Erik Gabriel Carrillo <erik.g.carrillo@intel.com>
-F: lib/librte_timer/
+F: lib/timer/
F: doc/guides/prog_guide/timer_lib.rst
F: app/test/test_timer*
F: examples/timer/
F: doc/guides/sample_app_ug/timer.rst
Job statistics
-F: lib/librte_jobstats/
+F: lib/jobstats/
F: examples/l2fwd-jobstats/
F: doc/guides/sample_app_ug/l2_forward_job_stats.rst
Metrics
-F: lib/librte_metrics/
+F: lib/metrics/
F: app/test/test_metrics.c
Bit-rate statistics
-F: lib/librte_bitratestats/
+F: lib/bitratestats/
F: app/test/test_bitratestats.c
Latency statistics
M: Reshma Pattan <reshma.pattan@intel.com>
-F: lib/librte_latencystats/
+F: lib/latencystats/
F: app/test/test_latencystats.c
Telemetry - EXPERIMENTAL
M: Ciara Power <ciara.power@intel.com>
-F: lib/librte_telemetry/
+F: lib/telemetry/
F: app/test/test_telemetry*
F: usertools/dpdk-telemetry*
F: doc/guides/howto/telemetry.rst
BPF
M: Konstantin Ananyev <konstantin.ananyev@intel.com>
-F: lib/librte_bpf/
+F: lib/bpf/
F: examples/bpf/
F: app/test/test_bpf.c
F: doc/guides/prog_guide/bpf_lib.rst
@@ -1554,7 +1554,7 @@ F: doc/guides/prog_guide/bpf_lib.rst
Graph - EXPERIMENTAL
M: Jerin Jacob <jerinj@marvell.com>
M: Kiran Kumar K <kirankumark@marvell.com>
-F: lib/librte_graph/
+F: lib/graph/
F: doc/guides/prog_guide/graph_lib.rst
F: app/test/test_graph*
M: Nithin Dabilpuram <ndabilpuram@marvell.com>
@@ -1564,7 +1564,7 @@ F: doc/guides/sample_app_ug/l3_forward_graph.rst
Nodes - EXPERIMENTAL
M: Nithin Dabilpuram <ndabilpuram@marvell.com>
M: Pavan Nikhilesh <pbhagavatula@marvell.com>
-F: lib/librte_node/
+F: lib/node/
Test Applications
diff --git a/app/test/test_eal_fs.c b/app/test/test_eal_fs.c
index cae624f82a..bb93b82a43 100644
--- a/app/test/test_eal_fs.c
+++ b/app/test/test_eal_fs.c
@@ -9,7 +9,7 @@
#include <errno.h>
/* eal_filesystem.h is not a public header file, so use relative path */
-#include "../../lib/librte_eal/common/eal_filesystem.h"
+#include "../../lib/eal/common/eal_filesystem.h"
static int
test_parse_sysfs_value(void)
diff --git a/app/test/test_memzone.c b/app/test/test_memzone.c
index 0343b0326e..03a9d1d3bb 100644
--- a/app/test/test_memzone.c
+++ b/app/test/test_memzone.c
@@ -18,7 +18,7 @@
#include <rte_string_fns.h>
#include <rte_errno.h>
#include <rte_malloc.h>
-#include "../../lib/librte_eal/common/malloc_elem.h"
+#include "../../lib/eal/common/malloc_elem.h"
#include "test.h"
diff --git a/app/test/test_telemetry_json.c b/app/test/test_telemetry_json.c
index 7a91490f4c..3171ab12ec 100644
--- a/app/test/test_telemetry_json.c
+++ b/app/test/test_telemetry_json.c
@@ -4,7 +4,7 @@
#include <string.h>
-#include "../../lib/librte_telemetry/telemetry_json.h"
+#include "../../lib/telemetry/telemetry_json.h"
#include "test.h"
static int
diff --git a/config/arm/meson.build b/config/arm/meson.build
index 400b80eafc..e840b0af1a 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -7,7 +7,7 @@
flags_common = [
# Accelerate rte_memcpy. Be sure to run unit test (memcpy_perf_autotest)
# to determine the best threshold in code. Refer to notes in source file
- # (lib/librte_eal/arm/include/rte_memcpy_64.h) for more info.
+ # (lib/eal/arm/include/rte_memcpy_64.h) for more info.
['RTE_ARCH_ARM64_MEMCPY', false],
# ['RTE_ARM64_MEMCPY_ALIGNED_THRESHOLD', 2048],
# ['RTE_ARM64_MEMCPY_UNALIGNED_THRESHOLD', 512],
diff --git a/devtools/build-tags.sh b/devtools/build-tags.sh
index 8fa01ad177..0361135d6e 100755
--- a/devtools/build-tags.sh
+++ b/devtools/build-tags.sh
@@ -67,13 +67,13 @@ common_sources()
linux_sources()
{
- find_sources "lib/librte_eal/linux" '*.[chS]'
+ find_sources "lib/eal/linux" '*.[chS]'
find_sources "kernel/linux" '*.[chS]'
}
bsd_sources()
{
- find_sources "lib/librte_eal/freebsd" '*.[chS]'
+ find_sources "lib/eal/freebsd" '*.[chS]'
find_sources "kernel/freebsd" '*.[chS]'
}
@@ -85,14 +85,14 @@ arm_common()
arm_32_sources()
{
arm_common
- find_sources "lib/librte_eal/arm" '*.[chS]' \
+ find_sources "lib/eal/arm" '*.[chS]' \
"$skip_64b_files"
}
arm_64_sources()
{
arm_common
- find_sources "lib/librte_eal/arm" '*.[chS]' \
+ find_sources "lib/eal/arm" '*.[chS]' \
"$skip_32b_files"
find_sources "$source_dirs" '*arm64.[chS]'
}
@@ -108,20 +108,20 @@ x86_common()
x86_32_sources()
{
x86_common
- find_sources "lib/librte_eal/x86" '*.[chS]' \
+ find_sources "lib/eal/x86" '*.[chS]' \
"$skip_64b_files"
}
x86_64_sources()
{
x86_common
- find_sources "lib/librte_eal/x86" '*.[chS]' \
+ find_sources "lib/eal/x86" '*.[chS]' \
"$skip_32b_files"
}
ppc_64_sources()
{
- find_sources "lib/librte_eal/ppc" '*.[chS]'
+ find_sources "lib/eal/ppc" '*.[chS]'
find_sources "$source_dirs" '*altivec*.[chS]'
}
diff --git a/doc/api/doxy-api.conf.in b/doc/api/doxy-api.conf.in
index 3c7ee4608b..325a0195c6 100644
--- a/doc/api/doxy-api.conf.in
+++ b/doc/api/doxy-api.conf.in
@@ -24,58 +24,58 @@ INPUT = @TOPDIR@/doc/api/doxy-api-index.md \
@TOPDIR@/drivers/raw/dpaa2_qdma \
@TOPDIR@/drivers/raw/ifpga \
@TOPDIR@/drivers/raw/ioat \
- @TOPDIR@/lib/librte_eal/include \
- @TOPDIR@/lib/librte_eal/include/generic \
- @TOPDIR@/lib/librte_acl \
- @TOPDIR@/lib/librte_bbdev \
- @TOPDIR@/lib/librte_bitratestats \
- @TOPDIR@/lib/librte_bpf \
- @TOPDIR@/lib/librte_cfgfile \
- @TOPDIR@/lib/librte_cmdline \
- @TOPDIR@/lib/librte_compressdev \
- @TOPDIR@/lib/librte_cryptodev \
- @TOPDIR@/lib/librte_distributor \
- @TOPDIR@/lib/librte_efd \
- @TOPDIR@/lib/librte_ethdev \
- @TOPDIR@/lib/librte_eventdev \
- @TOPDIR@/lib/librte_fib \
- @TOPDIR@/lib/librte_flow_classify \
- @TOPDIR@/lib/librte_graph \
- @TOPDIR@/lib/librte_gro \
- @TOPDIR@/lib/librte_gso \
- @TOPDIR@/lib/librte_hash \
- @TOPDIR@/lib/librte_ip_frag \
- @TOPDIR@/lib/librte_ipsec \
- @TOPDIR@/lib/librte_jobstats \
- @TOPDIR@/lib/librte_kni \
- @TOPDIR@/lib/librte_kvargs \
- @TOPDIR@/lib/librte_latencystats \
- @TOPDIR@/lib/librte_lpm \
- @TOPDIR@/lib/librte_mbuf \
- @TOPDIR@/lib/librte_member \
- @TOPDIR@/lib/librte_mempool \
- @TOPDIR@/lib/librte_meter \
- @TOPDIR@/lib/librte_metrics \
- @TOPDIR@/lib/librte_node \
- @TOPDIR@/lib/librte_net \
- @TOPDIR@/lib/librte_pci \
- @TOPDIR@/lib/librte_pdump \
- @TOPDIR@/lib/librte_pipeline \
- @TOPDIR@/lib/librte_port \
- @TOPDIR@/lib/librte_power \
- @TOPDIR@/lib/librte_rawdev \
- @TOPDIR@/lib/librte_rcu \
- @TOPDIR@/lib/librte_regexdev \
- @TOPDIR@/lib/librte_reorder \
- @TOPDIR@/lib/librte_rib \
- @TOPDIR@/lib/librte_ring \
- @TOPDIR@/lib/librte_sched \
- @TOPDIR@/lib/librte_security \
- @TOPDIR@/lib/librte_stack \
- @TOPDIR@/lib/librte_table \
- @TOPDIR@/lib/librte_telemetry \
- @TOPDIR@/lib/librte_timer \
- @TOPDIR@/lib/librte_vhost
+ @TOPDIR@/lib/eal/include \
+ @TOPDIR@/lib/eal/include/generic \
+ @TOPDIR@/lib/acl \
+ @TOPDIR@/lib/bbdev \
+ @TOPDIR@/lib/bitratestats \
+ @TOPDIR@/lib/bpf \
+ @TOPDIR@/lib/cfgfile \
+ @TOPDIR@/lib/cmdline \
+ @TOPDIR@/lib/compressdev \
+ @TOPDIR@/lib/cryptodev \
+ @TOPDIR@/lib/distributor \
+ @TOPDIR@/lib/efd \
+ @TOPDIR@/lib/ethdev \
+ @TOPDIR@/lib/eventdev \
+ @TOPDIR@/lib/fib \
+ @TOPDIR@/lib/flow_classify \
+ @TOPDIR@/lib/graph \
+ @TOPDIR@/lib/gro \
+ @TOPDIR@/lib/gso \
+ @TOPDIR@/lib/hash \
+ @TOPDIR@/lib/ip_frag \
+ @TOPDIR@/lib/ipsec \
+ @TOPDIR@/lib/jobstats \
+ @TOPDIR@/lib/kni \
+ @TOPDIR@/lib/kvargs \
+ @TOPDIR@/lib/latencystats \
+ @TOPDIR@/lib/lpm \
+ @TOPDIR@/lib/mbuf \
+ @TOPDIR@/lib/member \
+ @TOPDIR@/lib/mempool \
+ @TOPDIR@/lib/meter \
+ @TOPDIR@/lib/metrics \
+ @TOPDIR@/lib/node \
+ @TOPDIR@/lib/net \
+ @TOPDIR@/lib/pci \
+ @TOPDIR@/lib/pdump \
+ @TOPDIR@/lib/pipeline \
+ @TOPDIR@/lib/port \
+ @TOPDIR@/lib/power \
+ @TOPDIR@/lib/rawdev \
+ @TOPDIR@/lib/rcu \
+ @TOPDIR@/lib/regexdev \
+ @TOPDIR@/lib/reorder \
+ @TOPDIR@/lib/rib \
+ @TOPDIR@/lib/ring \
+ @TOPDIR@/lib/sched \
+ @TOPDIR@/lib/security \
+ @TOPDIR@/lib/stack \
+ @TOPDIR@/lib/table \
+ @TOPDIR@/lib/telemetry \
+ @TOPDIR@/lib/timer \
+ @TOPDIR@/lib/vhost
INPUT += @API_EXAMPLES@
FILE_PATTERNS = rte_*.h \
cmdline.h
diff --git a/doc/guides/contributing/abi_versioning.rst b/doc/guides/contributing/abi_versioning.rst
index 91ada18dd7..7ff18f4f74 100644
--- a/doc/guides/contributing/abi_versioning.rst
+++ b/doc/guides/contributing/abi_versioning.rst
@@ -58,12 +58,12 @@ persists over multiple releases.
.. code-block:: none
- $ head ./lib/librte_acl/version.map
+ $ head ./lib/acl/version.map
DPDK_21 {
global:
...
- $ head ./lib/librte_eal/version.map
+ $ head ./lib/eal/version.map
DPDK_21 {
global:
...
@@ -77,7 +77,7 @@ that library.
.. code-block:: none
- $ head ./lib/librte_acl/version.map
+ $ head ./lib/acl/version.map
DPDK_21 {
global:
...
@@ -88,7 +88,7 @@ that library.
} DPDK_21;
...
- $ head ./lib/librte_eal/version.map
+ $ head ./lib/eal/version.map
DPDK_21 {
global:
...
@@ -100,12 +100,12 @@ how this may be done.
.. code-block:: none
- $ head ./lib/librte_acl/version.map
+ $ head ./lib/acl/version.map
DPDK_22 {
global:
...
- $ head ./lib/librte_eal/version.map
+ $ head ./lib/eal/version.map
DPDK_22 {
global:
...
diff --git a/doc/guides/contributing/coding_style.rst b/doc/guides/contributing/coding_style.rst
index dae1bd3245..7601162c4f 100644
--- a/doc/guides/contributing/coding_style.rst
+++ b/doc/guides/contributing/coding_style.rst
@@ -759,7 +759,7 @@ Examples:
* The virtio network PMD in ``drivers/net/virtio`` uses ``pmd.net.virtio``
* The eventdev software poll mode driver in ``drivers/event/sw`` uses ``pmd.event.sw``
* The octeontx mempool driver in ``drivers/mempool/octeontx`` uses ``pmd.mempool.octeontx``
- * The DPDK hash library in ``lib/librte_hash`` uses ``lib.hash``
+ * The DPDK hash library in ``lib/hash`` uses ``lib.hash``
Specializations
~~~~~~~~~~~~~~~
@@ -926,7 +926,7 @@ name
If a library's .so or .a file differs from that given in the directory
name, the name should be specified using this variable. In practice,
since the convention is that for a library called ``librte_xyz.so``, the
- sources are stored in a directory ``lib/librte_xyz``, this value should
+ sources are stored in a directory ``lib/xyz``, this value should
never be needed for new libraries.
.. note::
diff --git a/doc/guides/contributing/documentation.rst b/doc/guides/contributing/documentation.rst
index a4e6be6aca..842549a4c8 100644
--- a/doc/guides/contributing/documentation.rst
+++ b/doc/guides/contributing/documentation.rst
@@ -19,10 +19,10 @@ The DPDK source code repository contains input files to build the API documentat
The main directories that contain files related to documentation are shown below::
lib
- |-- librte_acl
- |-- librte_cfgfile
- |-- librte_cmdline
- |-- librte_eal
+ |-- acl
+ |-- cfgfile
+ |-- cmdline
+ |-- eal
| |-- ...
...
doc
@@ -40,7 +40,7 @@ The main directories that contain files related to documentation are shown below
The API documentation is built from `Doxygen <http://www.doxygen.nl>`_ comments in the header files.
-These files are mainly in the ``lib/librte_*`` directories although some of the Poll Mode Drivers in ``drivers/net``
+These files are mainly in the ``lib/*`` directories although some of the Poll Mode Drivers in ``drivers/net``
are also documented with Doxygen.
The configuration files that are used to control the Doxygen output are in the ``doc/api`` directory.
diff --git a/doc/guides/prog_guide/event_timer_adapter.rst b/doc/guides/prog_guide/event_timer_adapter.rst
index 8b18cd169d..7547059a05 100644
--- a/doc/guides/prog_guide/event_timer_adapter.rst
+++ b/doc/guides/prog_guide/event_timer_adapter.rst
@@ -35,7 +35,7 @@ device upon timer expiration.
The Event Timer Adapter API represents each event timer with a generic struct,
which contains an event and user metadata. The ``rte_event_timer`` struct is
-defined in ``lib/librte_event/librte_event_timer_adapter.h``.
+defined in ``lib/event/librte_event_timer_adapter.h``.
.. _timer_expiry_event:
diff --git a/doc/guides/prog_guide/qos_framework.rst b/doc/guides/prog_guide/qos_framework.rst
index 4e4ea33ccb..7d410d3cc6 100644
--- a/doc/guides/prog_guide/qos_framework.rst
+++ b/doc/guides/prog_guide/qos_framework.rst
@@ -1517,9 +1517,9 @@ Source Files Location
The source files for the DPDK dropper are located at:
-* DPDK/lib/librte_sched/rte_red.h
+* DPDK/lib/sched/rte_red.h
-* DPDK/lib/librte_sched/rte_red.c
+* DPDK/lib/sched/rte_red.c
Integration with the DPDK QoS Scheduler
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
diff --git a/doc/guides/prog_guide/rawdev.rst b/doc/guides/prog_guide/rawdev.rst
index a712c7fa99..488e0a7ef6 100644
--- a/doc/guides/prog_guide/rawdev.rst
+++ b/doc/guides/prog_guide/rawdev.rst
@@ -13,7 +13,7 @@ In terms of device flavor (type) support, DPDK currently has ethernet
For a new type of device, for example an accelerator, there are not many
options except:
-1. create another lib/librte_MySpecialDev, driver/MySpecialDrv and use it
+1. create another lib/MySpecialDev, driver/MySpecialDrv and use it
through Bus/PMD model.
2. Or, create a vdev and implement necessary custom APIs which are directly
exposed from driver layer. However this may still require changes in bus code
diff --git a/doc/guides/rel_notes/known_issues.rst b/doc/guides/rel_notes/known_issues.rst
index ee3ed1e658..43323e1a43 100644
--- a/doc/guides/rel_notes/known_issues.rst
+++ b/doc/guides/rel_notes/known_issues.rst
@@ -127,7 +127,7 @@ HPET timers do not work on the Osage customer reference platform
work correctly, provided the BIOS supports HPET.
**Driver/Module**:
- ``lib/librte_eal/include/rte_cycles.h``
+ ``lib/eal/include/rte_cycles.h``
Not all variants of supported NIC types have been used in testing
diff --git a/drivers/common/mlx5/linux/meson.build b/drivers/common/mlx5/linux/meson.build
index 3ca24988fc..7953684cf5 100644
--- a/drivers/common/mlx5/linux/meson.build
+++ b/drivers/common/mlx5/linux/meson.build
@@ -206,7 +206,7 @@ if dlopen_ibverbs
dlopen_sources = files('mlx5_glue.c')
dlopen_install_dir = [ eal_pmd_path + '-glue' ]
dlopen_includes = [global_inc]
- dlopen_includes += include_directories('../../../../lib/librte_eal/include/generic')
+ dlopen_includes += include_directories('../../../../lib/eal/include/generic')
shared_lib = shared_library(
dlopen_lib_name,
dlopen_sources,
diff --git a/drivers/crypto/virtio/meson.build b/drivers/crypto/virtio/meson.build
index 950f411327..7ecf3aa33d 100644
--- a/drivers/crypto/virtio/meson.build
+++ b/drivers/crypto/virtio/meson.build
@@ -1,7 +1,7 @@
# SPDX-License-Identifier: BSD-3-Clause
# Copyright(c) 2018 HUAWEI TECHNOLOGIES CO., LTD.
-includes += include_directories('../../../lib/librte_vhost')
+includes += include_directories('../../../lib/vhost')
deps += 'bus_pci'
sources = files('virtio_cryptodev.c', 'virtio_pci.c',
'virtio_rxtx.c', 'virtqueue.c')
diff --git a/kernel/linux/kni/meson.build b/kernel/linux/kni/meson.build
index f43860bcbb..c15c78b0b4 100644
--- a/kernel/linux/kni/meson.build
+++ b/kernel/linux/kni/meson.build
@@ -18,8 +18,8 @@ custom_target('rte_kni',
'M=' + meson.current_build_dir(),
'src=' + meson.current_source_dir(),
'MODULE_CFLAGS=-include ' + meson.source_root() + '/config/rte_config.h' +
- ' -I' + meson.source_root() + '/lib/librte_eal/include' +
- ' -I' + meson.source_root() + '/lib/librte_kni' +
+ ' -I' + meson.source_root() + '/lib/eal/include' +
+ ' -I' + meson.source_root() + '/lib/kni' +
' -I' + meson.build_root() +
' -I' + meson.current_source_dir(),
'modules'] + cross_args,
diff --git a/lib/librte_acl/acl.h b/lib/acl/acl.h
similarity index 100%
rename from lib/librte_acl/acl.h
rename to lib/acl/acl.h
diff --git a/lib/librte_acl/acl_bld.c b/lib/acl/acl_bld.c
similarity index 100%
rename from lib/librte_acl/acl_bld.c
rename to lib/acl/acl_bld.c
diff --git a/lib/librte_acl/acl_gen.c b/lib/acl/acl_gen.c
similarity index 100%
rename from lib/librte_acl/acl_gen.c
rename to lib/acl/acl_gen.c
diff --git a/lib/librte_acl/acl_run.h b/lib/acl/acl_run.h
similarity index 100%
rename from lib/librte_acl/acl_run.h
rename to lib/acl/acl_run.h
diff --git a/lib/librte_acl/acl_run_altivec.c b/lib/acl/acl_run_altivec.c
similarity index 100%
rename from lib/librte_acl/acl_run_altivec.c
rename to lib/acl/acl_run_altivec.c
diff --git a/lib/librte_acl/acl_run_altivec.h b/lib/acl/acl_run_altivec.h
similarity index 100%
rename from lib/librte_acl/acl_run_altivec.h
rename to lib/acl/acl_run_altivec.h
diff --git a/lib/librte_acl/acl_run_avx2.c b/lib/acl/acl_run_avx2.c
similarity index 100%
rename from lib/librte_acl/acl_run_avx2.c
rename to lib/acl/acl_run_avx2.c
diff --git a/lib/librte_acl/acl_run_avx2.h b/lib/acl/acl_run_avx2.h
similarity index 100%
rename from lib/librte_acl/acl_run_avx2.h
rename to lib/acl/acl_run_avx2.h
diff --git a/lib/librte_acl/acl_run_avx512.c b/lib/acl/acl_run_avx512.c
similarity index 100%
rename from lib/librte_acl/acl_run_avx512.c
rename to lib/acl/acl_run_avx512.c
diff --git a/lib/librte_acl/acl_run_avx512_common.h b/lib/acl/acl_run_avx512_common.h
similarity index 100%
rename from lib/librte_acl/acl_run_avx512_common.h
rename to lib/acl/acl_run_avx512_common.h
diff --git a/lib/librte_acl/acl_run_avx512x16.h b/lib/acl/acl_run_avx512x16.h
similarity index 100%
rename from lib/librte_acl/acl_run_avx512x16.h
rename to lib/acl/acl_run_avx512x16.h
diff --git a/lib/librte_acl/acl_run_avx512x8.h b/lib/acl/acl_run_avx512x8.h
similarity index 100%
rename from lib/librte_acl/acl_run_avx512x8.h
rename to lib/acl/acl_run_avx512x8.h
diff --git a/lib/librte_acl/acl_run_neon.c b/lib/acl/acl_run_neon.c
similarity index 100%
rename from lib/librte_acl/acl_run_neon.c
rename to lib/acl/acl_run_neon.c
diff --git a/lib/librte_acl/acl_run_neon.h b/lib/acl/acl_run_neon.h
similarity index 100%
rename from lib/librte_acl/acl_run_neon.h
rename to lib/acl/acl_run_neon.h
diff --git a/lib/librte_acl/acl_run_scalar.c b/lib/acl/acl_run_scalar.c
similarity index 100%
rename from lib/librte_acl/acl_run_scalar.c
rename to lib/acl/acl_run_scalar.c
diff --git a/lib/librte_acl/acl_run_sse.c b/lib/acl/acl_run_sse.c
similarity index 100%
rename from lib/librte_acl/acl_run_sse.c
rename to lib/acl/acl_run_sse.c
diff --git a/lib/librte_acl/acl_run_sse.h b/lib/acl/acl_run_sse.h
similarity index 100%
rename from lib/librte_acl/acl_run_sse.h
rename to lib/acl/acl_run_sse.h
diff --git a/lib/librte_acl/acl_vect.h b/lib/acl/acl_vect.h
similarity index 100%
rename from lib/librte_acl/acl_vect.h
rename to lib/acl/acl_vect.h
diff --git a/lib/librte_acl/meson.build b/lib/acl/meson.build
similarity index 100%
rename from lib/librte_acl/meson.build
rename to lib/acl/meson.build
diff --git a/lib/librte_acl/rte_acl.c b/lib/acl/rte_acl.c
similarity index 100%
rename from lib/librte_acl/rte_acl.c
rename to lib/acl/rte_acl.c
diff --git a/lib/librte_acl/rte_acl.h b/lib/acl/rte_acl.h
similarity index 100%
rename from lib/librte_acl/rte_acl.h
rename to lib/acl/rte_acl.h
diff --git a/lib/librte_acl/rte_acl_osdep.h b/lib/acl/rte_acl_osdep.h
similarity index 100%
rename from lib/librte_acl/rte_acl_osdep.h
rename to lib/acl/rte_acl_osdep.h
diff --git a/lib/librte_acl/tb_mem.c b/lib/acl/tb_mem.c
similarity index 100%
rename from lib/librte_acl/tb_mem.c
rename to lib/acl/tb_mem.c
diff --git a/lib/librte_acl/tb_mem.h b/lib/acl/tb_mem.h
similarity index 100%
rename from lib/librte_acl/tb_mem.h
rename to lib/acl/tb_mem.h
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diff --git a/lib/librte_bitratestats/meson.build b/lib/bitratestats/meson.build
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diff --git a/lib/librte_cmdline/cmdline_private.h b/lib/cmdline/cmdline_private.h
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diff --git a/lib/librte_cmdline/cmdline_rdline.h b/lib/cmdline/cmdline_rdline.h
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diff --git a/lib/librte_cmdline/cmdline_socket.c b/lib/cmdline/cmdline_socket.c
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diff --git a/lib/librte_cmdline/cmdline_vt100.c b/lib/cmdline/cmdline_vt100.c
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diff --git a/lib/librte_cmdline/meson.build b/lib/cmdline/meson.build
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diff --git a/lib/librte_compressdev/rte_compressdev_internal.h b/lib/compressdev/rte_compressdev_internal.h
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diff --git a/lib/librte_cryptodev/cryptodev_trace_points.c b/lib/cryptodev/cryptodev_trace_points.c
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diff --git a/lib/librte_cryptodev/rte_crypto_asym.h b/lib/cryptodev/rte_crypto_asym.h
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diff --git a/lib/librte_cryptodev/rte_cryptodev_trace.h b/lib/cryptodev/rte_cryptodev_trace.h
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diff --git a/lib/librte_cryptodev/rte_cryptodev_trace_fp.h b/lib/cryptodev/rte_cryptodev_trace_fp.h
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diff --git a/lib/librte_cryptodev/version.map b/lib/cryptodev/version.map
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diff --git a/lib/librte_distributor/distributor_private.h b/lib/distributor/distributor_private.h
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diff --git a/lib/librte_distributor/meson.build b/lib/distributor/meson.build
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rename to lib/distributor/rte_distributor_match_generic.c
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diff --git a/lib/librte_eal/arm/include/meson.build b/lib/eal/arm/include/meson.build
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diff --git a/lib/librte_eal/arm/include/rte_atomic_32.h b/lib/eal/arm/include/rte_atomic_32.h
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diff --git a/lib/librte_eal/arm/include/rte_byteorder.h b/lib/eal/arm/include/rte_byteorder.h
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diff --git a/lib/librte_eal/arm/include/rte_cpuflags_64.h b/lib/eal/arm/include/rte_cpuflags_64.h
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rename to lib/eal/arm/include/rte_cpuflags_64.h
diff --git a/lib/librte_eal/arm/include/rte_cycles.h b/lib/eal/arm/include/rte_cycles.h
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rename to lib/eal/arm/include/rte_cycles.h
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rename to lib/eal/freebsd/eal_interrupts.c
diff --git a/lib/librte_eal/freebsd/eal_lcore.c b/lib/eal/freebsd/eal_lcore.c
similarity index 100%
rename from lib/librte_eal/freebsd/eal_lcore.c
rename to lib/eal/freebsd/eal_lcore.c
diff --git a/lib/librte_eal/freebsd/eal_memalloc.c b/lib/eal/freebsd/eal_memalloc.c
similarity index 100%
rename from lib/librte_eal/freebsd/eal_memalloc.c
rename to lib/eal/freebsd/eal_memalloc.c
diff --git a/lib/librte_eal/freebsd/eal_memory.c b/lib/eal/freebsd/eal_memory.c
similarity index 100%
rename from lib/librte_eal/freebsd/eal_memory.c
rename to lib/eal/freebsd/eal_memory.c
diff --git a/lib/librte_eal/freebsd/eal_thread.c b/lib/eal/freebsd/eal_thread.c
similarity index 100%
rename from lib/librte_eal/freebsd/eal_thread.c
rename to lib/eal/freebsd/eal_thread.c
diff --git a/lib/librte_eal/freebsd/eal_timer.c b/lib/eal/freebsd/eal_timer.c
similarity index 100%
rename from lib/librte_eal/freebsd/eal_timer.c
rename to lib/eal/freebsd/eal_timer.c
diff --git a/lib/librte_eal/freebsd/include/meson.build b/lib/eal/freebsd/include/meson.build
similarity index 100%
rename from lib/librte_eal/freebsd/include/meson.build
rename to lib/eal/freebsd/include/meson.build
diff --git a/lib/librte_eal/freebsd/include/rte_os.h b/lib/eal/freebsd/include/rte_os.h
similarity index 100%
rename from lib/librte_eal/freebsd/include/rte_os.h
rename to lib/eal/freebsd/include/rte_os.h
diff --git a/lib/librte_eal/freebsd/include/rte_os_shim.h b/lib/eal/freebsd/include/rte_os_shim.h
similarity index 100%
rename from lib/librte_eal/freebsd/include/rte_os_shim.h
rename to lib/eal/freebsd/include/rte_os_shim.h
diff --git a/lib/librte_eal/freebsd/meson.build b/lib/eal/freebsd/meson.build
similarity index 100%
rename from lib/librte_eal/freebsd/meson.build
rename to lib/eal/freebsd/meson.build
diff --git a/lib/librte_eal/include/generic/rte_atomic.h b/lib/eal/include/generic/rte_atomic.h
similarity index 100%
rename from lib/librte_eal/include/generic/rte_atomic.h
rename to lib/eal/include/generic/rte_atomic.h
diff --git a/lib/librte_eal/include/generic/rte_byteorder.h b/lib/eal/include/generic/rte_byteorder.h
similarity index 100%
rename from lib/librte_eal/include/generic/rte_byteorder.h
rename to lib/eal/include/generic/rte_byteorder.h
diff --git a/lib/librte_eal/include/generic/rte_cpuflags.h b/lib/eal/include/generic/rte_cpuflags.h
similarity index 100%
rename from lib/librte_eal/include/generic/rte_cpuflags.h
rename to lib/eal/include/generic/rte_cpuflags.h
diff --git a/lib/librte_eal/include/generic/rte_cycles.h b/lib/eal/include/generic/rte_cycles.h
similarity index 100%
rename from lib/librte_eal/include/generic/rte_cycles.h
rename to lib/eal/include/generic/rte_cycles.h
diff --git a/lib/librte_eal/include/generic/rte_io.h b/lib/eal/include/generic/rte_io.h
similarity index 100%
rename from lib/librte_eal/include/generic/rte_io.h
rename to lib/eal/include/generic/rte_io.h
diff --git a/lib/librte_eal/include/generic/rte_mcslock.h b/lib/eal/include/generic/rte_mcslock.h
similarity index 100%
rename from lib/librte_eal/include/generic/rte_mcslock.h
rename to lib/eal/include/generic/rte_mcslock.h
diff --git a/lib/librte_eal/include/generic/rte_memcpy.h b/lib/eal/include/generic/rte_memcpy.h
similarity index 100%
rename from lib/librte_eal/include/generic/rte_memcpy.h
rename to lib/eal/include/generic/rte_memcpy.h
diff --git a/lib/librte_eal/include/generic/rte_pause.h b/lib/eal/include/generic/rte_pause.h
similarity index 100%
rename from lib/librte_eal/include/generic/rte_pause.h
rename to lib/eal/include/generic/rte_pause.h
diff --git a/lib/librte_eal/include/generic/rte_pflock.h b/lib/eal/include/generic/rte_pflock.h
similarity index 100%
rename from lib/librte_eal/include/generic/rte_pflock.h
rename to lib/eal/include/generic/rte_pflock.h
diff --git a/lib/librte_eal/include/generic/rte_power_intrinsics.h b/lib/eal/include/generic/rte_power_intrinsics.h
similarity index 100%
rename from lib/librte_eal/include/generic/rte_power_intrinsics.h
rename to lib/eal/include/generic/rte_power_intrinsics.h
diff --git a/lib/librte_eal/include/generic/rte_prefetch.h b/lib/eal/include/generic/rte_prefetch.h
similarity index 100%
rename from lib/librte_eal/include/generic/rte_prefetch.h
rename to lib/eal/include/generic/rte_prefetch.h
diff --git a/lib/librte_eal/include/generic/rte_rwlock.h b/lib/eal/include/generic/rte_rwlock.h
similarity index 100%
rename from lib/librte_eal/include/generic/rte_rwlock.h
rename to lib/eal/include/generic/rte_rwlock.h
diff --git a/lib/librte_eal/include/generic/rte_spinlock.h b/lib/eal/include/generic/rte_spinlock.h
similarity index 100%
rename from lib/librte_eal/include/generic/rte_spinlock.h
rename to lib/eal/include/generic/rte_spinlock.h
diff --git a/lib/librte_eal/include/generic/rte_ticketlock.h b/lib/eal/include/generic/rte_ticketlock.h
similarity index 100%
rename from lib/librte_eal/include/generic/rte_ticketlock.h
rename to lib/eal/include/generic/rte_ticketlock.h
diff --git a/lib/librte_eal/include/generic/rte_vect.h b/lib/eal/include/generic/rte_vect.h
similarity index 100%
rename from lib/librte_eal/include/generic/rte_vect.h
rename to lib/eal/include/generic/rte_vect.h
diff --git a/lib/librte_eal/include/meson.build b/lib/eal/include/meson.build
similarity index 100%
rename from lib/librte_eal/include/meson.build
rename to lib/eal/include/meson.build
diff --git a/lib/librte_eal/include/rte_alarm.h b/lib/eal/include/rte_alarm.h
similarity index 100%
rename from lib/librte_eal/include/rte_alarm.h
rename to lib/eal/include/rte_alarm.h
diff --git a/lib/librte_eal/include/rte_bitmap.h b/lib/eal/include/rte_bitmap.h
similarity index 100%
rename from lib/librte_eal/include/rte_bitmap.h
rename to lib/eal/include/rte_bitmap.h
diff --git a/lib/librte_eal/include/rte_bitops.h b/lib/eal/include/rte_bitops.h
similarity index 100%
rename from lib/librte_eal/include/rte_bitops.h
rename to lib/eal/include/rte_bitops.h
diff --git a/lib/librte_eal/include/rte_branch_prediction.h b/lib/eal/include/rte_branch_prediction.h
similarity index 100%
rename from lib/librte_eal/include/rte_branch_prediction.h
rename to lib/eal/include/rte_branch_prediction.h
diff --git a/lib/librte_eal/include/rte_bus.h b/lib/eal/include/rte_bus.h
similarity index 100%
rename from lib/librte_eal/include/rte_bus.h
rename to lib/eal/include/rte_bus.h
diff --git a/lib/librte_eal/include/rte_class.h b/lib/eal/include/rte_class.h
similarity index 100%
rename from lib/librte_eal/include/rte_class.h
rename to lib/eal/include/rte_class.h
diff --git a/lib/librte_eal/include/rte_common.h b/lib/eal/include/rte_common.h
similarity index 100%
rename from lib/librte_eal/include/rte_common.h
rename to lib/eal/include/rte_common.h
diff --git a/lib/librte_eal/include/rte_compat.h b/lib/eal/include/rte_compat.h
similarity index 100%
rename from lib/librte_eal/include/rte_compat.h
rename to lib/eal/include/rte_compat.h
diff --git a/lib/librte_eal/include/rte_debug.h b/lib/eal/include/rte_debug.h
similarity index 100%
rename from lib/librte_eal/include/rte_debug.h
rename to lib/eal/include/rte_debug.h
diff --git a/lib/librte_eal/include/rte_dev.h b/lib/eal/include/rte_dev.h
similarity index 100%
rename from lib/librte_eal/include/rte_dev.h
rename to lib/eal/include/rte_dev.h
diff --git a/lib/librte_eal/include/rte_devargs.h b/lib/eal/include/rte_devargs.h
similarity index 100%
rename from lib/librte_eal/include/rte_devargs.h
rename to lib/eal/include/rte_devargs.h
diff --git a/lib/librte_eal/include/rte_eal.h b/lib/eal/include/rte_eal.h
similarity index 100%
rename from lib/librte_eal/include/rte_eal.h
rename to lib/eal/include/rte_eal.h
diff --git a/lib/librte_eal/include/rte_eal_interrupts.h b/lib/eal/include/rte_eal_interrupts.h
similarity index 100%
rename from lib/librte_eal/include/rte_eal_interrupts.h
rename to lib/eal/include/rte_eal_interrupts.h
diff --git a/lib/librte_eal/include/rte_eal_memconfig.h b/lib/eal/include/rte_eal_memconfig.h
similarity index 100%
rename from lib/librte_eal/include/rte_eal_memconfig.h
rename to lib/eal/include/rte_eal_memconfig.h
diff --git a/lib/librte_eal/include/rte_eal_paging.h b/lib/eal/include/rte_eal_paging.h
similarity index 100%
rename from lib/librte_eal/include/rte_eal_paging.h
rename to lib/eal/include/rte_eal_paging.h
diff --git a/lib/librte_eal/include/rte_eal_trace.h b/lib/eal/include/rte_eal_trace.h
similarity index 100%
rename from lib/librte_eal/include/rte_eal_trace.h
rename to lib/eal/include/rte_eal_trace.h
diff --git a/lib/librte_eal/include/rte_errno.h b/lib/eal/include/rte_errno.h
similarity index 100%
rename from lib/librte_eal/include/rte_errno.h
rename to lib/eal/include/rte_errno.h
diff --git a/lib/librte_eal/include/rte_fbarray.h b/lib/eal/include/rte_fbarray.h
similarity index 100%
rename from lib/librte_eal/include/rte_fbarray.h
rename to lib/eal/include/rte_fbarray.h
diff --git a/lib/librte_eal/include/rte_function_versioning.h b/lib/eal/include/rte_function_versioning.h
similarity index 100%
rename from lib/librte_eal/include/rte_function_versioning.h
rename to lib/eal/include/rte_function_versioning.h
diff --git a/lib/librte_eal/include/rte_hexdump.h b/lib/eal/include/rte_hexdump.h
similarity index 100%
rename from lib/librte_eal/include/rte_hexdump.h
rename to lib/eal/include/rte_hexdump.h
diff --git a/lib/librte_eal/include/rte_hypervisor.h b/lib/eal/include/rte_hypervisor.h
similarity index 100%
rename from lib/librte_eal/include/rte_hypervisor.h
rename to lib/eal/include/rte_hypervisor.h
diff --git a/lib/librte_eal/include/rte_interrupts.h b/lib/eal/include/rte_interrupts.h
similarity index 100%
rename from lib/librte_eal/include/rte_interrupts.h
rename to lib/eal/include/rte_interrupts.h
diff --git a/lib/librte_eal/include/rte_keepalive.h b/lib/eal/include/rte_keepalive.h
similarity index 100%
rename from lib/librte_eal/include/rte_keepalive.h
rename to lib/eal/include/rte_keepalive.h
diff --git a/lib/librte_eal/include/rte_launch.h b/lib/eal/include/rte_launch.h
similarity index 100%
rename from lib/librte_eal/include/rte_launch.h
rename to lib/eal/include/rte_launch.h
diff --git a/lib/librte_eal/include/rte_lcore.h b/lib/eal/include/rte_lcore.h
similarity index 100%
rename from lib/librte_eal/include/rte_lcore.h
rename to lib/eal/include/rte_lcore.h
diff --git a/lib/librte_eal/include/rte_log.h b/lib/eal/include/rte_log.h
similarity index 100%
rename from lib/librte_eal/include/rte_log.h
rename to lib/eal/include/rte_log.h
diff --git a/lib/librte_eal/include/rte_malloc.h b/lib/eal/include/rte_malloc.h
similarity index 100%
rename from lib/librte_eal/include/rte_malloc.h
rename to lib/eal/include/rte_malloc.h
diff --git a/lib/librte_eal/include/rte_memory.h b/lib/eal/include/rte_memory.h
similarity index 100%
rename from lib/librte_eal/include/rte_memory.h
rename to lib/eal/include/rte_memory.h
diff --git a/lib/librte_eal/include/rte_memzone.h b/lib/eal/include/rte_memzone.h
similarity index 100%
rename from lib/librte_eal/include/rte_memzone.h
rename to lib/eal/include/rte_memzone.h
diff --git a/lib/librte_eal/include/rte_pci_dev_feature_defs.h b/lib/eal/include/rte_pci_dev_feature_defs.h
similarity index 100%
rename from lib/librte_eal/include/rte_pci_dev_feature_defs.h
rename to lib/eal/include/rte_pci_dev_feature_defs.h
diff --git a/lib/librte_eal/include/rte_pci_dev_features.h b/lib/eal/include/rte_pci_dev_features.h
similarity index 100%
rename from lib/librte_eal/include/rte_pci_dev_features.h
rename to lib/eal/include/rte_pci_dev_features.h
diff --git a/lib/librte_eal/include/rte_per_lcore.h b/lib/eal/include/rte_per_lcore.h
similarity index 100%
rename from lib/librte_eal/include/rte_per_lcore.h
rename to lib/eal/include/rte_per_lcore.h
diff --git a/lib/librte_eal/include/rte_random.h b/lib/eal/include/rte_random.h
similarity index 100%
rename from lib/librte_eal/include/rte_random.h
rename to lib/eal/include/rte_random.h
diff --git a/lib/librte_eal/include/rte_reciprocal.h b/lib/eal/include/rte_reciprocal.h
similarity index 100%
rename from lib/librte_eal/include/rte_reciprocal.h
rename to lib/eal/include/rte_reciprocal.h
diff --git a/lib/librte_eal/include/rte_service.h b/lib/eal/include/rte_service.h
similarity index 100%
rename from lib/librte_eal/include/rte_service.h
rename to lib/eal/include/rte_service.h
diff --git a/lib/librte_eal/include/rte_service_component.h b/lib/eal/include/rte_service_component.h
similarity index 100%
rename from lib/librte_eal/include/rte_service_component.h
rename to lib/eal/include/rte_service_component.h
diff --git a/lib/librte_eal/include/rte_string_fns.h b/lib/eal/include/rte_string_fns.h
similarity index 100%
rename from lib/librte_eal/include/rte_string_fns.h
rename to lib/eal/include/rte_string_fns.h
diff --git a/lib/librte_eal/include/rte_tailq.h b/lib/eal/include/rte_tailq.h
similarity index 100%
rename from lib/librte_eal/include/rte_tailq.h
rename to lib/eal/include/rte_tailq.h
diff --git a/lib/librte_eal/include/rte_test.h b/lib/eal/include/rte_test.h
similarity index 100%
rename from lib/librte_eal/include/rte_test.h
rename to lib/eal/include/rte_test.h
diff --git a/lib/librte_eal/include/rte_thread.h b/lib/eal/include/rte_thread.h
similarity index 100%
rename from lib/librte_eal/include/rte_thread.h
rename to lib/eal/include/rte_thread.h
diff --git a/lib/librte_eal/include/rte_time.h b/lib/eal/include/rte_time.h
similarity index 100%
rename from lib/librte_eal/include/rte_time.h
rename to lib/eal/include/rte_time.h
diff --git a/lib/librte_eal/include/rte_trace.h b/lib/eal/include/rte_trace.h
similarity index 100%
rename from lib/librte_eal/include/rte_trace.h
rename to lib/eal/include/rte_trace.h
diff --git a/lib/librte_eal/include/rte_trace_point.h b/lib/eal/include/rte_trace_point.h
similarity index 100%
rename from lib/librte_eal/include/rte_trace_point.h
rename to lib/eal/include/rte_trace_point.h
diff --git a/lib/librte_eal/include/rte_trace_point_register.h b/lib/eal/include/rte_trace_point_register.h
similarity index 100%
rename from lib/librte_eal/include/rte_trace_point_register.h
rename to lib/eal/include/rte_trace_point_register.h
diff --git a/lib/librte_eal/include/rte_uuid.h b/lib/eal/include/rte_uuid.h
similarity index 100%
rename from lib/librte_eal/include/rte_uuid.h
rename to lib/eal/include/rte_uuid.h
diff --git a/lib/librte_eal/include/rte_version.h b/lib/eal/include/rte_version.h
similarity index 100%
rename from lib/librte_eal/include/rte_version.h
rename to lib/eal/include/rte_version.h
diff --git a/lib/librte_eal/include/rte_vfio.h b/lib/eal/include/rte_vfio.h
similarity index 100%
rename from lib/librte_eal/include/rte_vfio.h
rename to lib/eal/include/rte_vfio.h
diff --git a/lib/librte_eal/linux/eal.c b/lib/eal/linux/eal.c
similarity index 100%
rename from lib/librte_eal/linux/eal.c
rename to lib/eal/linux/eal.c
diff --git a/lib/librte_eal/linux/eal_alarm.c b/lib/eal/linux/eal_alarm.c
similarity index 100%
rename from lib/librte_eal/linux/eal_alarm.c
rename to lib/eal/linux/eal_alarm.c
diff --git a/lib/librte_eal/linux/eal_cpuflags.c b/lib/eal/linux/eal_cpuflags.c
similarity index 100%
rename from lib/librte_eal/linux/eal_cpuflags.c
rename to lib/eal/linux/eal_cpuflags.c
diff --git a/lib/librte_eal/linux/eal_debug.c b/lib/eal/linux/eal_debug.c
similarity index 100%
rename from lib/librte_eal/linux/eal_debug.c
rename to lib/eal/linux/eal_debug.c
diff --git a/lib/librte_eal/linux/eal_dev.c b/lib/eal/linux/eal_dev.c
similarity index 100%
rename from lib/librte_eal/linux/eal_dev.c
rename to lib/eal/linux/eal_dev.c
diff --git a/lib/librte_eal/linux/eal_hugepage_info.c b/lib/eal/linux/eal_hugepage_info.c
similarity index 100%
rename from lib/librte_eal/linux/eal_hugepage_info.c
rename to lib/eal/linux/eal_hugepage_info.c
diff --git a/lib/librte_eal/linux/eal_interrupts.c b/lib/eal/linux/eal_interrupts.c
similarity index 100%
rename from lib/librte_eal/linux/eal_interrupts.c
rename to lib/eal/linux/eal_interrupts.c
diff --git a/lib/librte_eal/linux/eal_lcore.c b/lib/eal/linux/eal_lcore.c
similarity index 100%
rename from lib/librte_eal/linux/eal_lcore.c
rename to lib/eal/linux/eal_lcore.c
diff --git a/lib/librte_eal/linux/eal_log.c b/lib/eal/linux/eal_log.c
similarity index 100%
rename from lib/librte_eal/linux/eal_log.c
rename to lib/eal/linux/eal_log.c
diff --git a/lib/librte_eal/linux/eal_memalloc.c b/lib/eal/linux/eal_memalloc.c
similarity index 100%
rename from lib/librte_eal/linux/eal_memalloc.c
rename to lib/eal/linux/eal_memalloc.c
diff --git a/lib/librte_eal/linux/eal_memory.c b/lib/eal/linux/eal_memory.c
similarity index 100%
rename from lib/librte_eal/linux/eal_memory.c
rename to lib/eal/linux/eal_memory.c
diff --git a/lib/librte_eal/linux/eal_thread.c b/lib/eal/linux/eal_thread.c
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rename from lib/librte_eal/linux/eal_thread.c
rename to lib/eal/linux/eal_thread.c
diff --git a/lib/librte_eal/linux/eal_timer.c b/lib/eal/linux/eal_timer.c
similarity index 100%
rename from lib/librte_eal/linux/eal_timer.c
rename to lib/eal/linux/eal_timer.c
diff --git a/lib/librte_eal/linux/eal_vfio.c b/lib/eal/linux/eal_vfio.c
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rename from lib/librte_eal/linux/eal_vfio.c
rename to lib/eal/linux/eal_vfio.c
diff --git a/lib/librte_eal/linux/eal_vfio.h b/lib/eal/linux/eal_vfio.h
similarity index 100%
rename from lib/librte_eal/linux/eal_vfio.h
rename to lib/eal/linux/eal_vfio.h
diff --git a/lib/librte_eal/linux/eal_vfio_mp_sync.c b/lib/eal/linux/eal_vfio_mp_sync.c
similarity index 100%
rename from lib/librte_eal/linux/eal_vfio_mp_sync.c
rename to lib/eal/linux/eal_vfio_mp_sync.c
diff --git a/lib/librte_eal/linux/include/meson.build b/lib/eal/linux/include/meson.build
similarity index 100%
rename from lib/librte_eal/linux/include/meson.build
rename to lib/eal/linux/include/meson.build
diff --git a/lib/librte_eal/linux/include/rte_os.h b/lib/eal/linux/include/rte_os.h
similarity index 100%
rename from lib/librte_eal/linux/include/rte_os.h
rename to lib/eal/linux/include/rte_os.h
diff --git a/lib/librte_eal/linux/include/rte_os_shim.h b/lib/eal/linux/include/rte_os_shim.h
similarity index 100%
rename from lib/librte_eal/linux/include/rte_os_shim.h
rename to lib/eal/linux/include/rte_os_shim.h
diff --git a/lib/librte_eal/linux/meson.build b/lib/eal/linux/meson.build
similarity index 100%
rename from lib/librte_eal/linux/meson.build
rename to lib/eal/linux/meson.build
diff --git a/lib/librte_eal/meson.build b/lib/eal/meson.build
similarity index 100%
rename from lib/librte_eal/meson.build
rename to lib/eal/meson.build
diff --git a/lib/librte_eal/ppc/include/meson.build b/lib/eal/ppc/include/meson.build
similarity index 100%
rename from lib/librte_eal/ppc/include/meson.build
rename to lib/eal/ppc/include/meson.build
diff --git a/lib/librte_eal/ppc/include/rte_altivec.h b/lib/eal/ppc/include/rte_altivec.h
similarity index 100%
rename from lib/librte_eal/ppc/include/rte_altivec.h
rename to lib/eal/ppc/include/rte_altivec.h
diff --git a/lib/librte_eal/ppc/include/rte_atomic.h b/lib/eal/ppc/include/rte_atomic.h
similarity index 100%
rename from lib/librte_eal/ppc/include/rte_atomic.h
rename to lib/eal/ppc/include/rte_atomic.h
diff --git a/lib/librte_eal/ppc/include/rte_byteorder.h b/lib/eal/ppc/include/rte_byteorder.h
similarity index 100%
rename from lib/librte_eal/ppc/include/rte_byteorder.h
rename to lib/eal/ppc/include/rte_byteorder.h
diff --git a/lib/librte_eal/ppc/include/rte_cpuflags.h b/lib/eal/ppc/include/rte_cpuflags.h
similarity index 100%
rename from lib/librte_eal/ppc/include/rte_cpuflags.h
rename to lib/eal/ppc/include/rte_cpuflags.h
diff --git a/lib/librte_eal/ppc/include/rte_cycles.h b/lib/eal/ppc/include/rte_cycles.h
similarity index 100%
rename from lib/librte_eal/ppc/include/rte_cycles.h
rename to lib/eal/ppc/include/rte_cycles.h
diff --git a/lib/librte_eal/ppc/include/rte_io.h b/lib/eal/ppc/include/rte_io.h
similarity index 100%
rename from lib/librte_eal/ppc/include/rte_io.h
rename to lib/eal/ppc/include/rte_io.h
diff --git a/lib/librte_eal/ppc/include/rte_mcslock.h b/lib/eal/ppc/include/rte_mcslock.h
similarity index 100%
rename from lib/librte_eal/ppc/include/rte_mcslock.h
rename to lib/eal/ppc/include/rte_mcslock.h
diff --git a/lib/librte_eal/ppc/include/rte_memcpy.h b/lib/eal/ppc/include/rte_memcpy.h
similarity index 100%
rename from lib/librte_eal/ppc/include/rte_memcpy.h
rename to lib/eal/ppc/include/rte_memcpy.h
diff --git a/lib/librte_eal/ppc/include/rte_pause.h b/lib/eal/ppc/include/rte_pause.h
similarity index 100%
rename from lib/librte_eal/ppc/include/rte_pause.h
rename to lib/eal/ppc/include/rte_pause.h
diff --git a/lib/librte_eal/ppc/include/rte_pflock.h b/lib/eal/ppc/include/rte_pflock.h
similarity index 100%
rename from lib/librte_eal/ppc/include/rte_pflock.h
rename to lib/eal/ppc/include/rte_pflock.h
diff --git a/lib/librte_eal/ppc/include/rte_power_intrinsics.h b/lib/eal/ppc/include/rte_power_intrinsics.h
similarity index 100%
rename from lib/librte_eal/ppc/include/rte_power_intrinsics.h
rename to lib/eal/ppc/include/rte_power_intrinsics.h
diff --git a/lib/librte_eal/ppc/include/rte_prefetch.h b/lib/eal/ppc/include/rte_prefetch.h
similarity index 100%
rename from lib/librte_eal/ppc/include/rte_prefetch.h
rename to lib/eal/ppc/include/rte_prefetch.h
diff --git a/lib/librte_eal/ppc/include/rte_rwlock.h b/lib/eal/ppc/include/rte_rwlock.h
similarity index 100%
rename from lib/librte_eal/ppc/include/rte_rwlock.h
rename to lib/eal/ppc/include/rte_rwlock.h
diff --git a/lib/librte_eal/ppc/include/rte_spinlock.h b/lib/eal/ppc/include/rte_spinlock.h
similarity index 100%
rename from lib/librte_eal/ppc/include/rte_spinlock.h
rename to lib/eal/ppc/include/rte_spinlock.h
diff --git a/lib/librte_eal/ppc/include/rte_ticketlock.h b/lib/eal/ppc/include/rte_ticketlock.h
similarity index 100%
rename from lib/librte_eal/ppc/include/rte_ticketlock.h
rename to lib/eal/ppc/include/rte_ticketlock.h
diff --git a/lib/librte_eal/ppc/include/rte_vect.h b/lib/eal/ppc/include/rte_vect.h
similarity index 100%
rename from lib/librte_eal/ppc/include/rte_vect.h
rename to lib/eal/ppc/include/rte_vect.h
diff --git a/lib/librte_eal/ppc/meson.build b/lib/eal/ppc/meson.build
similarity index 100%
rename from lib/librte_eal/ppc/meson.build
rename to lib/eal/ppc/meson.build
diff --git a/lib/librte_eal/ppc/rte_cpuflags.c b/lib/eal/ppc/rte_cpuflags.c
similarity index 100%
rename from lib/librte_eal/ppc/rte_cpuflags.c
rename to lib/eal/ppc/rte_cpuflags.c
diff --git a/lib/librte_eal/ppc/rte_cycles.c b/lib/eal/ppc/rte_cycles.c
similarity index 100%
rename from lib/librte_eal/ppc/rte_cycles.c
rename to lib/eal/ppc/rte_cycles.c
diff --git a/lib/librte_eal/ppc/rte_hypervisor.c b/lib/eal/ppc/rte_hypervisor.c
similarity index 100%
rename from lib/librte_eal/ppc/rte_hypervisor.c
rename to lib/eal/ppc/rte_hypervisor.c
diff --git a/lib/librte_eal/ppc/rte_power_intrinsics.c b/lib/eal/ppc/rte_power_intrinsics.c
similarity index 100%
rename from lib/librte_eal/ppc/rte_power_intrinsics.c
rename to lib/eal/ppc/rte_power_intrinsics.c
diff --git a/lib/librte_eal/unix/eal_file.c b/lib/eal/unix/eal_file.c
similarity index 100%
rename from lib/librte_eal/unix/eal_file.c
rename to lib/eal/unix/eal_file.c
diff --git a/lib/librte_eal/unix/eal_unix_memory.c b/lib/eal/unix/eal_unix_memory.c
similarity index 100%
rename from lib/librte_eal/unix/eal_unix_memory.c
rename to lib/eal/unix/eal_unix_memory.c
diff --git a/lib/librte_eal/unix/eal_unix_timer.c b/lib/eal/unix/eal_unix_timer.c
similarity index 100%
rename from lib/librte_eal/unix/eal_unix_timer.c
rename to lib/eal/unix/eal_unix_timer.c
diff --git a/lib/librte_eal/unix/meson.build b/lib/eal/unix/meson.build
similarity index 100%
rename from lib/librte_eal/unix/meson.build
rename to lib/eal/unix/meson.build
diff --git a/lib/librte_eal/unix/rte_thread.c b/lib/eal/unix/rte_thread.c
similarity index 100%
rename from lib/librte_eal/unix/rte_thread.c
rename to lib/eal/unix/rte_thread.c
diff --git a/lib/librte_eal/version.map b/lib/eal/version.map
similarity index 100%
rename from lib/librte_eal/version.map
rename to lib/eal/version.map
diff --git a/lib/librte_eal/windows/eal.c b/lib/eal/windows/eal.c
similarity index 100%
rename from lib/librte_eal/windows/eal.c
rename to lib/eal/windows/eal.c
diff --git a/lib/librte_eal/windows/eal_alarm.c b/lib/eal/windows/eal_alarm.c
similarity index 100%
rename from lib/librte_eal/windows/eal_alarm.c
rename to lib/eal/windows/eal_alarm.c
diff --git a/lib/librte_eal/windows/eal_debug.c b/lib/eal/windows/eal_debug.c
similarity index 100%
rename from lib/librte_eal/windows/eal_debug.c
rename to lib/eal/windows/eal_debug.c
diff --git a/lib/librte_eal/windows/eal_file.c b/lib/eal/windows/eal_file.c
similarity index 100%
rename from lib/librte_eal/windows/eal_file.c
rename to lib/eal/windows/eal_file.c
diff --git a/lib/librte_eal/windows/eal_hugepages.c b/lib/eal/windows/eal_hugepages.c
similarity index 100%
rename from lib/librte_eal/windows/eal_hugepages.c
rename to lib/eal/windows/eal_hugepages.c
diff --git a/lib/librte_eal/windows/eal_interrupts.c b/lib/eal/windows/eal_interrupts.c
similarity index 100%
rename from lib/librte_eal/windows/eal_interrupts.c
rename to lib/eal/windows/eal_interrupts.c
diff --git a/lib/librte_eal/windows/eal_lcore.c b/lib/eal/windows/eal_lcore.c
similarity index 100%
rename from lib/librte_eal/windows/eal_lcore.c
rename to lib/eal/windows/eal_lcore.c
diff --git a/lib/librte_eal/windows/eal_log.c b/lib/eal/windows/eal_log.c
similarity index 100%
rename from lib/librte_eal/windows/eal_log.c
rename to lib/eal/windows/eal_log.c
diff --git a/lib/librte_eal/windows/eal_memalloc.c b/lib/eal/windows/eal_memalloc.c
similarity index 100%
rename from lib/librte_eal/windows/eal_memalloc.c
rename to lib/eal/windows/eal_memalloc.c
diff --git a/lib/librte_eal/windows/eal_memory.c b/lib/eal/windows/eal_memory.c
similarity index 100%
rename from lib/librte_eal/windows/eal_memory.c
rename to lib/eal/windows/eal_memory.c
diff --git a/lib/librte_eal/windows/eal_mp.c b/lib/eal/windows/eal_mp.c
similarity index 100%
rename from lib/librte_eal/windows/eal_mp.c
rename to lib/eal/windows/eal_mp.c
diff --git a/lib/librte_eal/windows/eal_thread.c b/lib/eal/windows/eal_thread.c
similarity index 100%
rename from lib/librte_eal/windows/eal_thread.c
rename to lib/eal/windows/eal_thread.c
diff --git a/lib/librte_eal/windows/eal_timer.c b/lib/eal/windows/eal_timer.c
similarity index 100%
rename from lib/librte_eal/windows/eal_timer.c
rename to lib/eal/windows/eal_timer.c
diff --git a/lib/librte_eal/windows/eal_windows.h b/lib/eal/windows/eal_windows.h
similarity index 100%
rename from lib/librte_eal/windows/eal_windows.h
rename to lib/eal/windows/eal_windows.h
diff --git a/lib/librte_eal/windows/fnmatch.c b/lib/eal/windows/fnmatch.c
similarity index 100%
rename from lib/librte_eal/windows/fnmatch.c
rename to lib/eal/windows/fnmatch.c
diff --git a/lib/librte_eal/windows/getopt.c b/lib/eal/windows/getopt.c
similarity index 100%
rename from lib/librte_eal/windows/getopt.c
rename to lib/eal/windows/getopt.c
diff --git a/lib/librte_eal/windows/include/dirent.h b/lib/eal/windows/include/dirent.h
similarity index 100%
rename from lib/librte_eal/windows/include/dirent.h
rename to lib/eal/windows/include/dirent.h
diff --git a/lib/librte_eal/windows/include/fnmatch.h b/lib/eal/windows/include/fnmatch.h
similarity index 100%
rename from lib/librte_eal/windows/include/fnmatch.h
rename to lib/eal/windows/include/fnmatch.h
diff --git a/lib/librte_eal/windows/include/getopt.h b/lib/eal/windows/include/getopt.h
similarity index 100%
rename from lib/librte_eal/windows/include/getopt.h
rename to lib/eal/windows/include/getopt.h
diff --git a/lib/librte_eal/windows/include/meson.build b/lib/eal/windows/include/meson.build
similarity index 100%
rename from lib/librte_eal/windows/include/meson.build
rename to lib/eal/windows/include/meson.build
diff --git a/lib/librte_eal/windows/include/pthread.h b/lib/eal/windows/include/pthread.h
similarity index 100%
rename from lib/librte_eal/windows/include/pthread.h
rename to lib/eal/windows/include/pthread.h
diff --git a/lib/librte_eal/windows/include/regex.h b/lib/eal/windows/include/regex.h
similarity index 100%
rename from lib/librte_eal/windows/include/regex.h
rename to lib/eal/windows/include/regex.h
diff --git a/lib/librte_eal/windows/include/rte_os.h b/lib/eal/windows/include/rte_os.h
similarity index 100%
rename from lib/librte_eal/windows/include/rte_os.h
rename to lib/eal/windows/include/rte_os.h
diff --git a/lib/librte_eal/windows/include/rte_os_shim.h b/lib/eal/windows/include/rte_os_shim.h
similarity index 100%
rename from lib/librte_eal/windows/include/rte_os_shim.h
rename to lib/eal/windows/include/rte_os_shim.h
diff --git a/lib/librte_eal/windows/include/rte_virt2phys.h b/lib/eal/windows/include/rte_virt2phys.h
similarity index 100%
rename from lib/librte_eal/windows/include/rte_virt2phys.h
rename to lib/eal/windows/include/rte_virt2phys.h
diff --git a/lib/librte_eal/windows/include/rte_windows.h b/lib/eal/windows/include/rte_windows.h
similarity index 100%
rename from lib/librte_eal/windows/include/rte_windows.h
rename to lib/eal/windows/include/rte_windows.h
diff --git a/lib/librte_eal/windows/include/sched.h b/lib/eal/windows/include/sched.h
similarity index 100%
rename from lib/librte_eal/windows/include/sched.h
rename to lib/eal/windows/include/sched.h
diff --git a/lib/librte_eal/windows/include/sys/queue.h b/lib/eal/windows/include/sys/queue.h
similarity index 100%
rename from lib/librte_eal/windows/include/sys/queue.h
rename to lib/eal/windows/include/sys/queue.h
diff --git a/lib/librte_eal/windows/include/unistd.h b/lib/eal/windows/include/unistd.h
similarity index 100%
rename from lib/librte_eal/windows/include/unistd.h
rename to lib/eal/windows/include/unistd.h
diff --git a/lib/librte_eal/windows/meson.build b/lib/eal/windows/meson.build
similarity index 100%
rename from lib/librte_eal/windows/meson.build
rename to lib/eal/windows/meson.build
diff --git a/lib/librte_eal/windows/rte_thread.c b/lib/eal/windows/rte_thread.c
similarity index 100%
rename from lib/librte_eal/windows/rte_thread.c
rename to lib/eal/windows/rte_thread.c
diff --git a/lib/librte_eal/x86/include/meson.build b/lib/eal/x86/include/meson.build
similarity index 100%
rename from lib/librte_eal/x86/include/meson.build
rename to lib/eal/x86/include/meson.build
diff --git a/lib/librte_eal/x86/include/rte_atomic.h b/lib/eal/x86/include/rte_atomic.h
similarity index 100%
rename from lib/librte_eal/x86/include/rte_atomic.h
rename to lib/eal/x86/include/rte_atomic.h
diff --git a/lib/librte_eal/x86/include/rte_atomic_32.h b/lib/eal/x86/include/rte_atomic_32.h
similarity index 100%
rename from lib/librte_eal/x86/include/rte_atomic_32.h
rename to lib/eal/x86/include/rte_atomic_32.h
diff --git a/lib/librte_eal/x86/include/rte_atomic_64.h b/lib/eal/x86/include/rte_atomic_64.h
similarity index 100%
rename from lib/librte_eal/x86/include/rte_atomic_64.h
rename to lib/eal/x86/include/rte_atomic_64.h
diff --git a/lib/librte_eal/x86/include/rte_byteorder.h b/lib/eal/x86/include/rte_byteorder.h
similarity index 100%
rename from lib/librte_eal/x86/include/rte_byteorder.h
rename to lib/eal/x86/include/rte_byteorder.h
diff --git a/lib/librte_eal/x86/include/rte_byteorder_32.h b/lib/eal/x86/include/rte_byteorder_32.h
similarity index 100%
rename from lib/librte_eal/x86/include/rte_byteorder_32.h
rename to lib/eal/x86/include/rte_byteorder_32.h
diff --git a/lib/librte_eal/x86/include/rte_byteorder_64.h b/lib/eal/x86/include/rte_byteorder_64.h
similarity index 100%
rename from lib/librte_eal/x86/include/rte_byteorder_64.h
rename to lib/eal/x86/include/rte_byteorder_64.h
diff --git a/lib/librte_eal/x86/include/rte_cpuflags.h b/lib/eal/x86/include/rte_cpuflags.h
similarity index 100%
rename from lib/librte_eal/x86/include/rte_cpuflags.h
rename to lib/eal/x86/include/rte_cpuflags.h
diff --git a/lib/librte_eal/x86/include/rte_cycles.h b/lib/eal/x86/include/rte_cycles.h
similarity index 100%
rename from lib/librte_eal/x86/include/rte_cycles.h
rename to lib/eal/x86/include/rte_cycles.h
diff --git a/lib/librte_eal/x86/include/rte_io.h b/lib/eal/x86/include/rte_io.h
similarity index 100%
rename from lib/librte_eal/x86/include/rte_io.h
rename to lib/eal/x86/include/rte_io.h
diff --git a/lib/librte_eal/x86/include/rte_mcslock.h b/lib/eal/x86/include/rte_mcslock.h
similarity index 100%
rename from lib/librte_eal/x86/include/rte_mcslock.h
rename to lib/eal/x86/include/rte_mcslock.h
diff --git a/lib/librte_eal/x86/include/rte_memcpy.h b/lib/eal/x86/include/rte_memcpy.h
similarity index 100%
rename from lib/librte_eal/x86/include/rte_memcpy.h
rename to lib/eal/x86/include/rte_memcpy.h
diff --git a/lib/librte_eal/x86/include/rte_pause.h b/lib/eal/x86/include/rte_pause.h
similarity index 100%
rename from lib/librte_eal/x86/include/rte_pause.h
rename to lib/eal/x86/include/rte_pause.h
diff --git a/lib/librte_eal/x86/include/rte_pflock.h b/lib/eal/x86/include/rte_pflock.h
similarity index 100%
rename from lib/librte_eal/x86/include/rte_pflock.h
rename to lib/eal/x86/include/rte_pflock.h
diff --git a/lib/librte_eal/x86/include/rte_power_intrinsics.h b/lib/eal/x86/include/rte_power_intrinsics.h
similarity index 100%
rename from lib/librte_eal/x86/include/rte_power_intrinsics.h
rename to lib/eal/x86/include/rte_power_intrinsics.h
diff --git a/lib/librte_eal/x86/include/rte_prefetch.h b/lib/eal/x86/include/rte_prefetch.h
similarity index 100%
rename from lib/librte_eal/x86/include/rte_prefetch.h
rename to lib/eal/x86/include/rte_prefetch.h
diff --git a/lib/librte_eal/x86/include/rte_rtm.h b/lib/eal/x86/include/rte_rtm.h
similarity index 100%
rename from lib/librte_eal/x86/include/rte_rtm.h
rename to lib/eal/x86/include/rte_rtm.h
diff --git a/lib/librte_eal/x86/include/rte_rwlock.h b/lib/eal/x86/include/rte_rwlock.h
similarity index 100%
rename from lib/librte_eal/x86/include/rte_rwlock.h
rename to lib/eal/x86/include/rte_rwlock.h
diff --git a/lib/librte_eal/x86/include/rte_spinlock.h b/lib/eal/x86/include/rte_spinlock.h
similarity index 100%
rename from lib/librte_eal/x86/include/rte_spinlock.h
rename to lib/eal/x86/include/rte_spinlock.h
diff --git a/lib/librte_eal/x86/include/rte_ticketlock.h b/lib/eal/x86/include/rte_ticketlock.h
similarity index 100%
rename from lib/librte_eal/x86/include/rte_ticketlock.h
rename to lib/eal/x86/include/rte_ticketlock.h
diff --git a/lib/librte_eal/x86/include/rte_vect.h b/lib/eal/x86/include/rte_vect.h
similarity index 100%
rename from lib/librte_eal/x86/include/rte_vect.h
rename to lib/eal/x86/include/rte_vect.h
diff --git a/lib/librte_eal/x86/meson.build b/lib/eal/x86/meson.build
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rename from lib/librte_member/rte_member.c
rename to lib/member/rte_member.c
diff --git a/lib/librte_member/rte_member.h b/lib/member/rte_member.h
similarity index 100%
rename from lib/librte_member/rte_member.h
rename to lib/member/rte_member.h
diff --git a/lib/librte_member/rte_member_ht.c b/lib/member/rte_member_ht.c
similarity index 100%
rename from lib/librte_member/rte_member_ht.c
rename to lib/member/rte_member_ht.c
diff --git a/lib/librte_member/rte_member_ht.h b/lib/member/rte_member_ht.h
similarity index 100%
rename from lib/librte_member/rte_member_ht.h
rename to lib/member/rte_member_ht.h
diff --git a/lib/librte_member/rte_member_vbf.c b/lib/member/rte_member_vbf.c
similarity index 100%
rename from lib/librte_member/rte_member_vbf.c
rename to lib/member/rte_member_vbf.c
diff --git a/lib/librte_member/rte_member_vbf.h b/lib/member/rte_member_vbf.h
similarity index 100%
rename from lib/librte_member/rte_member_vbf.h
rename to lib/member/rte_member_vbf.h
diff --git a/lib/librte_member/rte_member_x86.h b/lib/member/rte_member_x86.h
similarity index 100%
rename from lib/librte_member/rte_member_x86.h
rename to lib/member/rte_member_x86.h
diff --git a/lib/librte_member/version.map b/lib/member/version.map
similarity index 100%
rename from lib/librte_member/version.map
rename to lib/member/version.map
diff --git a/lib/librte_mempool/mempool_trace_points.c b/lib/mempool/mempool_trace_points.c
similarity index 100%
rename from lib/librte_mempool/mempool_trace_points.c
rename to lib/mempool/mempool_trace_points.c
diff --git a/lib/librte_mempool/meson.build b/lib/mempool/meson.build
similarity index 100%
rename from lib/librte_mempool/meson.build
rename to lib/mempool/meson.build
diff --git a/lib/librte_mempool/rte_mempool.c b/lib/mempool/rte_mempool.c
similarity index 100%
rename from lib/librte_mempool/rte_mempool.c
rename to lib/mempool/rte_mempool.c
diff --git a/lib/librte_mempool/rte_mempool.h b/lib/mempool/rte_mempool.h
similarity index 100%
rename from lib/librte_mempool/rte_mempool.h
rename to lib/mempool/rte_mempool.h
diff --git a/lib/librte_mempool/rte_mempool_ops.c b/lib/mempool/rte_mempool_ops.c
similarity index 100%
rename from lib/librte_mempool/rte_mempool_ops.c
rename to lib/mempool/rte_mempool_ops.c
diff --git a/lib/librte_mempool/rte_mempool_ops_default.c b/lib/mempool/rte_mempool_ops_default.c
similarity index 100%
rename from lib/librte_mempool/rte_mempool_ops_default.c
rename to lib/mempool/rte_mempool_ops_default.c
diff --git a/lib/librte_mempool/rte_mempool_trace.h b/lib/mempool/rte_mempool_trace.h
similarity index 100%
rename from lib/librte_mempool/rte_mempool_trace.h
rename to lib/mempool/rte_mempool_trace.h
diff --git a/lib/librte_mempool/rte_mempool_trace_fp.h b/lib/mempool/rte_mempool_trace_fp.h
similarity index 100%
rename from lib/librte_mempool/rte_mempool_trace_fp.h
rename to lib/mempool/rte_mempool_trace_fp.h
diff --git a/lib/librte_mempool/version.map b/lib/mempool/version.map
similarity index 100%
rename from lib/librte_mempool/version.map
rename to lib/mempool/version.map
diff --git a/lib/meson.build b/lib/meson.build
index 9b99aa0be0..3a9a6c3be4 100644
--- a/lib/meson.build
+++ b/lib/meson.build
@@ -114,8 +114,10 @@ foreach l:libraries
deps += ['eal']
endif
- dir_name = 'librte_' + l
- subdir(dir_name)
+ subdir(l)
+ if name != l
+ warning('Library name, "@0@", and directory name, "@1@", do not match'.format(name, l))
+ endif
if not build
dpdk_libs_disabled += name
@@ -128,7 +130,7 @@ foreach l:libraries
foreach d:deps
if not is_variable('shared_rte_' + d)
error('Missing internal dependency "@0@" for @1@ [@2@]'
- .format(d, name, 'lib/' + dir_name))
+ .format(d, name, 'lib/' + l))
endif
shared_deps += [get_variable('shared_rte_' + d)]
static_deps += [get_variable('static_rte_' + d)]
@@ -144,7 +146,7 @@ foreach l:libraries
dpdk_chkinc_headers += headers
libname = 'rte_' + name
- includes += include_directories(dir_name)
+ includes += include_directories(l)
if is_windows and use_function_versioning
message('@0@: Function versioning is not supported by Windows.'.format(name))
@@ -176,8 +178,8 @@ foreach l:libraries
cflags += '-DRTE_BUILD_SHARED_LIB'
endif
version_map = '@0@/@1@/version.map'.format(
- meson.current_source_dir(), dir_name)
- implib = dir_name + '.dll.a'
+ meson.current_source_dir(), l)
+ implib = 'librte_' + l + '.dll.a'
def_file = custom_target(libname + '_def',
command: [map_to_win_cmd, '@INPUT@', '@OUTPUT@'],
@@ -236,6 +238,6 @@ foreach l:libraries
set_variable('shared_rte_' + name, shared_dep)
set_variable('static_rte_' + name, static_dep)
if developer_mode
- message('lib/@0@: Defining dependency "@1@"'.format(dir_name, name))
+ message('lib/@0@: Defining dependency "@1@"'.format(l, name))
endif
endforeach
diff --git a/lib/librte_meter/meson.build b/lib/meter/meson.build
similarity index 100%
rename from lib/librte_meter/meson.build
rename to lib/meter/meson.build
diff --git a/lib/librte_meter/rte_meter.c b/lib/meter/rte_meter.c
similarity index 100%
rename from lib/librte_meter/rte_meter.c
rename to lib/meter/rte_meter.c
diff --git a/lib/librte_meter/rte_meter.h b/lib/meter/rte_meter.h
similarity index 100%
rename from lib/librte_meter/rte_meter.h
rename to lib/meter/rte_meter.h
diff --git a/lib/librte_meter/version.map b/lib/meter/version.map
similarity index 100%
rename from lib/librte_meter/version.map
rename to lib/meter/version.map
diff --git a/lib/librte_metrics/meson.build b/lib/metrics/meson.build
similarity index 100%
rename from lib/librte_metrics/meson.build
rename to lib/metrics/meson.build
diff --git a/lib/librte_metrics/rte_metrics.c b/lib/metrics/rte_metrics.c
similarity index 100%
rename from lib/librte_metrics/rte_metrics.c
rename to lib/metrics/rte_metrics.c
diff --git a/lib/librte_metrics/rte_metrics.h b/lib/metrics/rte_metrics.h
similarity index 100%
rename from lib/librte_metrics/rte_metrics.h
rename to lib/metrics/rte_metrics.h
diff --git a/lib/librte_metrics/rte_metrics_telemetry.c b/lib/metrics/rte_metrics_telemetry.c
similarity index 100%
rename from lib/librte_metrics/rte_metrics_telemetry.c
rename to lib/metrics/rte_metrics_telemetry.c
diff --git a/lib/librte_metrics/rte_metrics_telemetry.h b/lib/metrics/rte_metrics_telemetry.h
similarity index 100%
rename from lib/librte_metrics/rte_metrics_telemetry.h
rename to lib/metrics/rte_metrics_telemetry.h
diff --git a/lib/librte_metrics/version.map b/lib/metrics/version.map
similarity index 100%
rename from lib/librte_metrics/version.map
rename to lib/metrics/version.map
diff --git a/lib/librte_net/meson.build b/lib/net/meson.build
similarity index 100%
rename from lib/librte_net/meson.build
rename to lib/net/meson.build
diff --git a/lib/librte_net/net_crc.h b/lib/net/net_crc.h
similarity index 100%
rename from lib/librte_net/net_crc.h
rename to lib/net/net_crc.h
diff --git a/lib/librte_net/net_crc_avx512.c b/lib/net/net_crc_avx512.c
similarity index 100%
rename from lib/librte_net/net_crc_avx512.c
rename to lib/net/net_crc_avx512.c
diff --git a/lib/librte_net/net_crc_neon.c b/lib/net/net_crc_neon.c
similarity index 100%
rename from lib/librte_net/net_crc_neon.c
rename to lib/net/net_crc_neon.c
diff --git a/lib/librte_net/net_crc_sse.c b/lib/net/net_crc_sse.c
similarity index 100%
rename from lib/librte_net/net_crc_sse.c
rename to lib/net/net_crc_sse.c
diff --git a/lib/librte_net/rte_arp.c b/lib/net/rte_arp.c
similarity index 100%
rename from lib/librte_net/rte_arp.c
rename to lib/net/rte_arp.c
diff --git a/lib/librte_net/rte_arp.h b/lib/net/rte_arp.h
similarity index 100%
rename from lib/librte_net/rte_arp.h
rename to lib/net/rte_arp.h
diff --git a/lib/librte_net/rte_ecpri.h b/lib/net/rte_ecpri.h
similarity index 100%
rename from lib/librte_net/rte_ecpri.h
rename to lib/net/rte_ecpri.h
diff --git a/lib/librte_net/rte_esp.h b/lib/net/rte_esp.h
similarity index 100%
rename from lib/librte_net/rte_esp.h
rename to lib/net/rte_esp.h
diff --git a/lib/librte_net/rte_ether.c b/lib/net/rte_ether.c
similarity index 100%
rename from lib/librte_net/rte_ether.c
rename to lib/net/rte_ether.c
diff --git a/lib/librte_net/rte_ether.h b/lib/net/rte_ether.h
similarity index 100%
rename from lib/librte_net/rte_ether.h
rename to lib/net/rte_ether.h
diff --git a/lib/librte_net/rte_geneve.h b/lib/net/rte_geneve.h
similarity index 100%
rename from lib/librte_net/rte_geneve.h
rename to lib/net/rte_geneve.h
diff --git a/lib/librte_net/rte_gre.h b/lib/net/rte_gre.h
similarity index 100%
rename from lib/librte_net/rte_gre.h
rename to lib/net/rte_gre.h
diff --git a/lib/librte_net/rte_gtp.h b/lib/net/rte_gtp.h
similarity index 100%
rename from lib/librte_net/rte_gtp.h
rename to lib/net/rte_gtp.h
diff --git a/lib/librte_net/rte_higig.h b/lib/net/rte_higig.h
similarity index 100%
rename from lib/librte_net/rte_higig.h
rename to lib/net/rte_higig.h
diff --git a/lib/librte_net/rte_icmp.h b/lib/net/rte_icmp.h
similarity index 100%
rename from lib/librte_net/rte_icmp.h
rename to lib/net/rte_icmp.h
diff --git a/lib/librte_net/rte_ip.h b/lib/net/rte_ip.h
similarity index 100%
rename from lib/librte_net/rte_ip.h
rename to lib/net/rte_ip.h
diff --git a/lib/librte_net/rte_mpls.h b/lib/net/rte_mpls.h
similarity index 100%
rename from lib/librte_net/rte_mpls.h
rename to lib/net/rte_mpls.h
diff --git a/lib/librte_net/rte_net.c b/lib/net/rte_net.c
similarity index 100%
rename from lib/librte_net/rte_net.c
rename to lib/net/rte_net.c
diff --git a/lib/librte_net/rte_net.h b/lib/net/rte_net.h
similarity index 100%
rename from lib/librte_net/rte_net.h
rename to lib/net/rte_net.h
diff --git a/lib/librte_net/rte_net_crc.c b/lib/net/rte_net_crc.c
similarity index 100%
rename from lib/librte_net/rte_net_crc.c
rename to lib/net/rte_net_crc.c
diff --git a/lib/librte_net/rte_net_crc.h b/lib/net/rte_net_crc.h
similarity index 100%
rename from lib/librte_net/rte_net_crc.h
rename to lib/net/rte_net_crc.h
diff --git a/lib/librte_net/rte_sctp.h b/lib/net/rte_sctp.h
similarity index 100%
rename from lib/librte_net/rte_sctp.h
rename to lib/net/rte_sctp.h
diff --git a/lib/librte_net/rte_tcp.h b/lib/net/rte_tcp.h
similarity index 100%
rename from lib/librte_net/rte_tcp.h
rename to lib/net/rte_tcp.h
diff --git a/lib/librte_net/rte_udp.h b/lib/net/rte_udp.h
similarity index 100%
rename from lib/librte_net/rte_udp.h
rename to lib/net/rte_udp.h
diff --git a/lib/librte_net/rte_vxlan.h b/lib/net/rte_vxlan.h
similarity index 100%
rename from lib/librte_net/rte_vxlan.h
rename to lib/net/rte_vxlan.h
diff --git a/lib/librte_net/version.map b/lib/net/version.map
similarity index 100%
rename from lib/librte_net/version.map
rename to lib/net/version.map
diff --git a/lib/librte_node/ethdev_ctrl.c b/lib/node/ethdev_ctrl.c
similarity index 100%
rename from lib/librte_node/ethdev_ctrl.c
rename to lib/node/ethdev_ctrl.c
diff --git a/lib/librte_node/ethdev_rx.c b/lib/node/ethdev_rx.c
similarity index 100%
rename from lib/librte_node/ethdev_rx.c
rename to lib/node/ethdev_rx.c
diff --git a/lib/librte_node/ethdev_rx_priv.h b/lib/node/ethdev_rx_priv.h
similarity index 100%
rename from lib/librte_node/ethdev_rx_priv.h
rename to lib/node/ethdev_rx_priv.h
diff --git a/lib/librte_node/ethdev_tx.c b/lib/node/ethdev_tx.c
similarity index 100%
rename from lib/librte_node/ethdev_tx.c
rename to lib/node/ethdev_tx.c
diff --git a/lib/librte_node/ethdev_tx_priv.h b/lib/node/ethdev_tx_priv.h
similarity index 100%
rename from lib/librte_node/ethdev_tx_priv.h
rename to lib/node/ethdev_tx_priv.h
diff --git a/lib/librte_node/ip4_lookup.c b/lib/node/ip4_lookup.c
similarity index 100%
rename from lib/librte_node/ip4_lookup.c
rename to lib/node/ip4_lookup.c
diff --git a/lib/librte_node/ip4_lookup_neon.h b/lib/node/ip4_lookup_neon.h
similarity index 100%
rename from lib/librte_node/ip4_lookup_neon.h
rename to lib/node/ip4_lookup_neon.h
diff --git a/lib/librte_node/ip4_lookup_sse.h b/lib/node/ip4_lookup_sse.h
similarity index 100%
rename from lib/librte_node/ip4_lookup_sse.h
rename to lib/node/ip4_lookup_sse.h
diff --git a/lib/librte_node/ip4_rewrite.c b/lib/node/ip4_rewrite.c
similarity index 100%
rename from lib/librte_node/ip4_rewrite.c
rename to lib/node/ip4_rewrite.c
diff --git a/lib/librte_node/ip4_rewrite_priv.h b/lib/node/ip4_rewrite_priv.h
similarity index 100%
rename from lib/librte_node/ip4_rewrite_priv.h
rename to lib/node/ip4_rewrite_priv.h
diff --git a/lib/librte_node/log.c b/lib/node/log.c
similarity index 100%
rename from lib/librte_node/log.c
rename to lib/node/log.c
diff --git a/lib/librte_node/meson.build b/lib/node/meson.build
similarity index 100%
rename from lib/librte_node/meson.build
rename to lib/node/meson.build
diff --git a/lib/librte_node/node_private.h b/lib/node/node_private.h
similarity index 100%
rename from lib/librte_node/node_private.h
rename to lib/node/node_private.h
diff --git a/lib/librte_node/null.c b/lib/node/null.c
similarity index 100%
rename from lib/librte_node/null.c
rename to lib/node/null.c
diff --git a/lib/librte_node/pkt_cls.c b/lib/node/pkt_cls.c
similarity index 100%
rename from lib/librte_node/pkt_cls.c
rename to lib/node/pkt_cls.c
diff --git a/lib/librte_node/pkt_cls_priv.h b/lib/node/pkt_cls_priv.h
similarity index 100%
rename from lib/librte_node/pkt_cls_priv.h
rename to lib/node/pkt_cls_priv.h
diff --git a/lib/librte_node/pkt_drop.c b/lib/node/pkt_drop.c
similarity index 100%
rename from lib/librte_node/pkt_drop.c
rename to lib/node/pkt_drop.c
diff --git a/lib/librte_node/rte_node_eth_api.h b/lib/node/rte_node_eth_api.h
similarity index 100%
rename from lib/librte_node/rte_node_eth_api.h
rename to lib/node/rte_node_eth_api.h
diff --git a/lib/librte_node/rte_node_ip4_api.h b/lib/node/rte_node_ip4_api.h
similarity index 100%
rename from lib/librte_node/rte_node_ip4_api.h
rename to lib/node/rte_node_ip4_api.h
diff --git a/lib/librte_node/version.map b/lib/node/version.map
similarity index 100%
rename from lib/librte_node/version.map
rename to lib/node/version.map
diff --git a/lib/librte_pci/meson.build b/lib/pci/meson.build
similarity index 100%
rename from lib/librte_pci/meson.build
rename to lib/pci/meson.build
diff --git a/lib/librte_pci/rte_pci.c b/lib/pci/rte_pci.c
similarity index 100%
rename from lib/librte_pci/rte_pci.c
rename to lib/pci/rte_pci.c
diff --git a/lib/librte_pci/rte_pci.h b/lib/pci/rte_pci.h
similarity index 100%
rename from lib/librte_pci/rte_pci.h
rename to lib/pci/rte_pci.h
diff --git a/lib/librte_pci/version.map b/lib/pci/version.map
similarity index 100%
rename from lib/librte_pci/version.map
rename to lib/pci/version.map
diff --git a/lib/librte_pdump/meson.build b/lib/pdump/meson.build
similarity index 100%
rename from lib/librte_pdump/meson.build
rename to lib/pdump/meson.build
diff --git a/lib/librte_pdump/rte_pdump.c b/lib/pdump/rte_pdump.c
similarity index 100%
rename from lib/librte_pdump/rte_pdump.c
rename to lib/pdump/rte_pdump.c
diff --git a/lib/librte_pdump/rte_pdump.h b/lib/pdump/rte_pdump.h
similarity index 100%
rename from lib/librte_pdump/rte_pdump.h
rename to lib/pdump/rte_pdump.h
diff --git a/lib/librte_pdump/version.map b/lib/pdump/version.map
similarity index 100%
rename from lib/librte_pdump/version.map
rename to lib/pdump/version.map
diff --git a/lib/librte_pipeline/meson.build b/lib/pipeline/meson.build
similarity index 100%
rename from lib/librte_pipeline/meson.build
rename to lib/pipeline/meson.build
diff --git a/lib/librte_pipeline/rte_pipeline.c b/lib/pipeline/rte_pipeline.c
similarity index 100%
rename from lib/librte_pipeline/rte_pipeline.c
rename to lib/pipeline/rte_pipeline.c
diff --git a/lib/librte_pipeline/rte_pipeline.h b/lib/pipeline/rte_pipeline.h
similarity index 100%
rename from lib/librte_pipeline/rte_pipeline.h
rename to lib/pipeline/rte_pipeline.h
diff --git a/lib/librte_pipeline/rte_port_in_action.c b/lib/pipeline/rte_port_in_action.c
similarity index 100%
rename from lib/librte_pipeline/rte_port_in_action.c
rename to lib/pipeline/rte_port_in_action.c
diff --git a/lib/librte_pipeline/rte_port_in_action.h b/lib/pipeline/rte_port_in_action.h
similarity index 100%
rename from lib/librte_pipeline/rte_port_in_action.h
rename to lib/pipeline/rte_port_in_action.h
diff --git a/lib/librte_pipeline/rte_swx_ctl.c b/lib/pipeline/rte_swx_ctl.c
similarity index 100%
rename from lib/librte_pipeline/rte_swx_ctl.c
rename to lib/pipeline/rte_swx_ctl.c
diff --git a/lib/librte_pipeline/rte_swx_ctl.h b/lib/pipeline/rte_swx_ctl.h
similarity index 100%
rename from lib/librte_pipeline/rte_swx_ctl.h
rename to lib/pipeline/rte_swx_ctl.h
diff --git a/lib/librte_pipeline/rte_swx_extern.h b/lib/pipeline/rte_swx_extern.h
similarity index 100%
rename from lib/librte_pipeline/rte_swx_extern.h
rename to lib/pipeline/rte_swx_extern.h
diff --git a/lib/librte_pipeline/rte_swx_pipeline.c b/lib/pipeline/rte_swx_pipeline.c
similarity index 100%
rename from lib/librte_pipeline/rte_swx_pipeline.c
rename to lib/pipeline/rte_swx_pipeline.c
diff --git a/lib/librte_pipeline/rte_swx_pipeline.h b/lib/pipeline/rte_swx_pipeline.h
similarity index 100%
rename from lib/librte_pipeline/rte_swx_pipeline.h
rename to lib/pipeline/rte_swx_pipeline.h
diff --git a/lib/librte_pipeline/rte_swx_pipeline_spec.c b/lib/pipeline/rte_swx_pipeline_spec.c
similarity index 100%
rename from lib/librte_pipeline/rte_swx_pipeline_spec.c
rename to lib/pipeline/rte_swx_pipeline_spec.c
diff --git a/lib/librte_pipeline/rte_table_action.c b/lib/pipeline/rte_table_action.c
similarity index 100%
rename from lib/librte_pipeline/rte_table_action.c
rename to lib/pipeline/rte_table_action.c
diff --git a/lib/librte_pipeline/rte_table_action.h b/lib/pipeline/rte_table_action.h
similarity index 100%
rename from lib/librte_pipeline/rte_table_action.h
rename to lib/pipeline/rte_table_action.h
diff --git a/lib/librte_pipeline/version.map b/lib/pipeline/version.map
similarity index 100%
rename from lib/librte_pipeline/version.map
rename to lib/pipeline/version.map
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diff --git a/lib/librte_sched/rte_sched.c b/lib/sched/rte_sched.c
similarity index 100%
rename from lib/librte_sched/rte_sched.c
rename to lib/sched/rte_sched.c
diff --git a/lib/librte_sched/rte_sched.h b/lib/sched/rte_sched.h
similarity index 100%
rename from lib/librte_sched/rte_sched.h
rename to lib/sched/rte_sched.h
diff --git a/lib/librte_sched/rte_sched_common.h b/lib/sched/rte_sched_common.h
similarity index 100%
rename from lib/librte_sched/rte_sched_common.h
rename to lib/sched/rte_sched_common.h
diff --git a/lib/librte_sched/version.map b/lib/sched/version.map
similarity index 100%
rename from lib/librte_sched/version.map
rename to lib/sched/version.map
diff --git a/lib/librte_security/meson.build b/lib/security/meson.build
similarity index 100%
rename from lib/librte_security/meson.build
rename to lib/security/meson.build
diff --git a/lib/librte_security/rte_security.c b/lib/security/rte_security.c
similarity index 100%
rename from lib/librte_security/rte_security.c
rename to lib/security/rte_security.c
diff --git a/lib/librte_security/rte_security.h b/lib/security/rte_security.h
similarity index 100%
rename from lib/librte_security/rte_security.h
rename to lib/security/rte_security.h
diff --git a/lib/librte_security/rte_security_driver.h b/lib/security/rte_security_driver.h
similarity index 100%
rename from lib/librte_security/rte_security_driver.h
rename to lib/security/rte_security_driver.h
diff --git a/lib/librte_security/version.map b/lib/security/version.map
similarity index 100%
rename from lib/librte_security/version.map
rename to lib/security/version.map
diff --git a/lib/librte_stack/meson.build b/lib/stack/meson.build
similarity index 100%
rename from lib/librte_stack/meson.build
rename to lib/stack/meson.build
diff --git a/lib/librte_stack/rte_stack.c b/lib/stack/rte_stack.c
similarity index 100%
rename from lib/librte_stack/rte_stack.c
rename to lib/stack/rte_stack.c
diff --git a/lib/librte_stack/rte_stack.h b/lib/stack/rte_stack.h
similarity index 100%
rename from lib/librte_stack/rte_stack.h
rename to lib/stack/rte_stack.h
diff --git a/lib/librte_stack/rte_stack_lf.c b/lib/stack/rte_stack_lf.c
similarity index 100%
rename from lib/librte_stack/rte_stack_lf.c
rename to lib/stack/rte_stack_lf.c
diff --git a/lib/librte_stack/rte_stack_lf.h b/lib/stack/rte_stack_lf.h
similarity index 100%
rename from lib/librte_stack/rte_stack_lf.h
rename to lib/stack/rte_stack_lf.h
diff --git a/lib/librte_stack/rte_stack_lf_c11.h b/lib/stack/rte_stack_lf_c11.h
similarity index 100%
rename from lib/librte_stack/rte_stack_lf_c11.h
rename to lib/stack/rte_stack_lf_c11.h
diff --git a/lib/librte_stack/rte_stack_lf_generic.h b/lib/stack/rte_stack_lf_generic.h
similarity index 100%
rename from lib/librte_stack/rte_stack_lf_generic.h
rename to lib/stack/rte_stack_lf_generic.h
diff --git a/lib/librte_stack/rte_stack_lf_stubs.h b/lib/stack/rte_stack_lf_stubs.h
similarity index 100%
rename from lib/librte_stack/rte_stack_lf_stubs.h
rename to lib/stack/rte_stack_lf_stubs.h
diff --git a/lib/librte_stack/rte_stack_std.c b/lib/stack/rte_stack_std.c
similarity index 100%
rename from lib/librte_stack/rte_stack_std.c
rename to lib/stack/rte_stack_std.c
diff --git a/lib/librte_stack/rte_stack_std.h b/lib/stack/rte_stack_std.h
similarity index 100%
rename from lib/librte_stack/rte_stack_std.h
rename to lib/stack/rte_stack_std.h
diff --git a/lib/librte_stack/stack_pvt.h b/lib/stack/stack_pvt.h
similarity index 100%
rename from lib/librte_stack/stack_pvt.h
rename to lib/stack/stack_pvt.h
diff --git a/lib/librte_stack/version.map b/lib/stack/version.map
similarity index 100%
rename from lib/librte_stack/version.map
rename to lib/stack/version.map
diff --git a/lib/librte_table/meson.build b/lib/table/meson.build
similarity index 100%
rename from lib/librte_table/meson.build
rename to lib/table/meson.build
diff --git a/lib/librte_table/rte_lru.h b/lib/table/rte_lru.h
similarity index 100%
rename from lib/librte_table/rte_lru.h
rename to lib/table/rte_lru.h
diff --git a/lib/librte_table/rte_lru_arm64.h b/lib/table/rte_lru_arm64.h
similarity index 100%
rename from lib/librte_table/rte_lru_arm64.h
rename to lib/table/rte_lru_arm64.h
diff --git a/lib/librte_table/rte_lru_x86.h b/lib/table/rte_lru_x86.h
similarity index 100%
rename from lib/librte_table/rte_lru_x86.h
rename to lib/table/rte_lru_x86.h
diff --git a/lib/librte_table/rte_swx_table.h b/lib/table/rte_swx_table.h
similarity index 100%
rename from lib/librte_table/rte_swx_table.h
rename to lib/table/rte_swx_table.h
diff --git a/lib/librte_table/rte_swx_table_em.c b/lib/table/rte_swx_table_em.c
similarity index 100%
rename from lib/librte_table/rte_swx_table_em.c
rename to lib/table/rte_swx_table_em.c
diff --git a/lib/librte_table/rte_swx_table_em.h b/lib/table/rte_swx_table_em.h
similarity index 100%
rename from lib/librte_table/rte_swx_table_em.h
rename to lib/table/rte_swx_table_em.h
diff --git a/lib/librte_table/rte_swx_table_wm.c b/lib/table/rte_swx_table_wm.c
similarity index 100%
rename from lib/librte_table/rte_swx_table_wm.c
rename to lib/table/rte_swx_table_wm.c
diff --git a/lib/librte_table/rte_swx_table_wm.h b/lib/table/rte_swx_table_wm.h
similarity index 100%
rename from lib/librte_table/rte_swx_table_wm.h
rename to lib/table/rte_swx_table_wm.h
diff --git a/lib/librte_table/rte_table.h b/lib/table/rte_table.h
similarity index 100%
rename from lib/librte_table/rte_table.h
rename to lib/table/rte_table.h
diff --git a/lib/librte_table/rte_table_acl.c b/lib/table/rte_table_acl.c
similarity index 100%
rename from lib/librte_table/rte_table_acl.c
rename to lib/table/rte_table_acl.c
diff --git a/lib/librte_table/rte_table_acl.h b/lib/table/rte_table_acl.h
similarity index 100%
rename from lib/librte_table/rte_table_acl.h
rename to lib/table/rte_table_acl.h
diff --git a/lib/librte_table/rte_table_array.c b/lib/table/rte_table_array.c
similarity index 100%
rename from lib/librte_table/rte_table_array.c
rename to lib/table/rte_table_array.c
diff --git a/lib/librte_table/rte_table_array.h b/lib/table/rte_table_array.h
similarity index 100%
rename from lib/librte_table/rte_table_array.h
rename to lib/table/rte_table_array.h
diff --git a/lib/librte_table/rte_table_hash.h b/lib/table/rte_table_hash.h
similarity index 100%
rename from lib/librte_table/rte_table_hash.h
rename to lib/table/rte_table_hash.h
diff --git a/lib/librte_table/rte_table_hash_cuckoo.c b/lib/table/rte_table_hash_cuckoo.c
similarity index 100%
rename from lib/librte_table/rte_table_hash_cuckoo.c
rename to lib/table/rte_table_hash_cuckoo.c
diff --git a/lib/librte_table/rte_table_hash_cuckoo.h b/lib/table/rte_table_hash_cuckoo.h
similarity index 100%
rename from lib/librte_table/rte_table_hash_cuckoo.h
rename to lib/table/rte_table_hash_cuckoo.h
diff --git a/lib/librte_table/rte_table_hash_ext.c b/lib/table/rte_table_hash_ext.c
similarity index 100%
rename from lib/librte_table/rte_table_hash_ext.c
rename to lib/table/rte_table_hash_ext.c
diff --git a/lib/librte_table/rte_table_hash_func.h b/lib/table/rte_table_hash_func.h
similarity index 100%
rename from lib/librte_table/rte_table_hash_func.h
rename to lib/table/rte_table_hash_func.h
diff --git a/lib/librte_table/rte_table_hash_func_arm64.h b/lib/table/rte_table_hash_func_arm64.h
similarity index 100%
rename from lib/librte_table/rte_table_hash_func_arm64.h
rename to lib/table/rte_table_hash_func_arm64.h
diff --git a/lib/librte_table/rte_table_hash_key16.c b/lib/table/rte_table_hash_key16.c
similarity index 100%
rename from lib/librte_table/rte_table_hash_key16.c
rename to lib/table/rte_table_hash_key16.c
diff --git a/lib/librte_table/rte_table_hash_key32.c b/lib/table/rte_table_hash_key32.c
similarity index 100%
rename from lib/librte_table/rte_table_hash_key32.c
rename to lib/table/rte_table_hash_key32.c
diff --git a/lib/librte_table/rte_table_hash_key8.c b/lib/table/rte_table_hash_key8.c
similarity index 100%
rename from lib/librte_table/rte_table_hash_key8.c
rename to lib/table/rte_table_hash_key8.c
diff --git a/lib/librte_table/rte_table_hash_lru.c b/lib/table/rte_table_hash_lru.c
similarity index 100%
rename from lib/librte_table/rte_table_hash_lru.c
rename to lib/table/rte_table_hash_lru.c
diff --git a/lib/librte_table/rte_table_lpm.c b/lib/table/rte_table_lpm.c
similarity index 100%
rename from lib/librte_table/rte_table_lpm.c
rename to lib/table/rte_table_lpm.c
diff --git a/lib/librte_table/rte_table_lpm.h b/lib/table/rte_table_lpm.h
similarity index 100%
rename from lib/librte_table/rte_table_lpm.h
rename to lib/table/rte_table_lpm.h
diff --git a/lib/librte_table/rte_table_lpm_ipv6.c b/lib/table/rte_table_lpm_ipv6.c
similarity index 100%
rename from lib/librte_table/rte_table_lpm_ipv6.c
rename to lib/table/rte_table_lpm_ipv6.c
diff --git a/lib/librte_table/rte_table_lpm_ipv6.h b/lib/table/rte_table_lpm_ipv6.h
similarity index 100%
rename from lib/librte_table/rte_table_lpm_ipv6.h
rename to lib/table/rte_table_lpm_ipv6.h
diff --git a/lib/librte_table/rte_table_stub.c b/lib/table/rte_table_stub.c
similarity index 100%
rename from lib/librte_table/rte_table_stub.c
rename to lib/table/rte_table_stub.c
diff --git a/lib/librte_table/rte_table_stub.h b/lib/table/rte_table_stub.h
similarity index 100%
rename from lib/librte_table/rte_table_stub.h
rename to lib/table/rte_table_stub.h
diff --git a/lib/librte_table/version.map b/lib/table/version.map
similarity index 100%
rename from lib/librte_table/version.map
rename to lib/table/version.map
diff --git a/lib/librte_telemetry/meson.build b/lib/telemetry/meson.build
similarity index 80%
rename from lib/librte_telemetry/meson.build
rename to lib/telemetry/meson.build
index 719973ff92..f84c9aa3be 100644
--- a/lib/librte_telemetry/meson.build
+++ b/lib/telemetry/meson.build
@@ -5,4 +5,4 @@ includes = [global_inc]
sources = files('telemetry.c', 'telemetry_data.c', 'telemetry_legacy.c')
headers = files('rte_telemetry.h')
-includes += include_directories('../librte_metrics')
+includes += include_directories('../metrics')
diff --git a/lib/librte_telemetry/rte_telemetry.h b/lib/telemetry/rte_telemetry.h
similarity index 100%
rename from lib/librte_telemetry/rte_telemetry.h
rename to lib/telemetry/rte_telemetry.h
diff --git a/lib/librte_telemetry/telemetry.c b/lib/telemetry/telemetry.c
similarity index 100%
rename from lib/librte_telemetry/telemetry.c
rename to lib/telemetry/telemetry.c
diff --git a/lib/librte_telemetry/telemetry_data.c b/lib/telemetry/telemetry_data.c
similarity index 100%
rename from lib/librte_telemetry/telemetry_data.c
rename to lib/telemetry/telemetry_data.c
diff --git a/lib/librte_telemetry/telemetry_data.h b/lib/telemetry/telemetry_data.h
similarity index 100%
rename from lib/librte_telemetry/telemetry_data.h
rename to lib/telemetry/telemetry_data.h
diff --git a/lib/librte_telemetry/telemetry_internal.h b/lib/telemetry/telemetry_internal.h
similarity index 100%
rename from lib/librte_telemetry/telemetry_internal.h
rename to lib/telemetry/telemetry_internal.h
diff --git a/lib/librte_telemetry/telemetry_json.h b/lib/telemetry/telemetry_json.h
similarity index 100%
rename from lib/librte_telemetry/telemetry_json.h
rename to lib/telemetry/telemetry_json.h
diff --git a/lib/librte_telemetry/telemetry_legacy.c b/lib/telemetry/telemetry_legacy.c
similarity index 100%
rename from lib/librte_telemetry/telemetry_legacy.c
rename to lib/telemetry/telemetry_legacy.c
diff --git a/lib/librte_telemetry/version.map b/lib/telemetry/version.map
similarity index 100%
rename from lib/librte_telemetry/version.map
rename to lib/telemetry/version.map
diff --git a/lib/librte_timer/meson.build b/lib/timer/meson.build
similarity index 100%
rename from lib/librte_timer/meson.build
rename to lib/timer/meson.build
diff --git a/lib/librte_timer/rte_timer.c b/lib/timer/rte_timer.c
similarity index 100%
rename from lib/librte_timer/rte_timer.c
rename to lib/timer/rte_timer.c
diff --git a/lib/librte_timer/rte_timer.h b/lib/timer/rte_timer.h
similarity index 100%
rename from lib/librte_timer/rte_timer.h
rename to lib/timer/rte_timer.h
diff --git a/lib/librte_timer/version.map b/lib/timer/version.map
similarity index 100%
rename from lib/librte_timer/version.map
rename to lib/timer/version.map
diff --git a/lib/librte_vhost/fd_man.c b/lib/vhost/fd_man.c
similarity index 100%
rename from lib/librte_vhost/fd_man.c
rename to lib/vhost/fd_man.c
diff --git a/lib/librte_vhost/fd_man.h b/lib/vhost/fd_man.h
similarity index 100%
rename from lib/librte_vhost/fd_man.h
rename to lib/vhost/fd_man.h
diff --git a/lib/librte_vhost/iotlb.c b/lib/vhost/iotlb.c
similarity index 100%
rename from lib/librte_vhost/iotlb.c
rename to lib/vhost/iotlb.c
diff --git a/lib/librte_vhost/iotlb.h b/lib/vhost/iotlb.h
similarity index 100%
rename from lib/librte_vhost/iotlb.h
rename to lib/vhost/iotlb.h
diff --git a/lib/librte_vhost/meson.build b/lib/vhost/meson.build
similarity index 100%
rename from lib/librte_vhost/meson.build
rename to lib/vhost/meson.build
diff --git a/lib/librte_vhost/rte_vdpa.h b/lib/vhost/rte_vdpa.h
similarity index 100%
rename from lib/librte_vhost/rte_vdpa.h
rename to lib/vhost/rte_vdpa.h
diff --git a/lib/librte_vhost/rte_vdpa_dev.h b/lib/vhost/rte_vdpa_dev.h
similarity index 100%
rename from lib/librte_vhost/rte_vdpa_dev.h
rename to lib/vhost/rte_vdpa_dev.h
diff --git a/lib/librte_vhost/rte_vhost.h b/lib/vhost/rte_vhost.h
similarity index 100%
rename from lib/librte_vhost/rte_vhost.h
rename to lib/vhost/rte_vhost.h
diff --git a/lib/librte_vhost/rte_vhost_async.h b/lib/vhost/rte_vhost_async.h
similarity index 100%
rename from lib/librte_vhost/rte_vhost_async.h
rename to lib/vhost/rte_vhost_async.h
diff --git a/lib/librte_vhost/rte_vhost_crypto.h b/lib/vhost/rte_vhost_crypto.h
similarity index 100%
rename from lib/librte_vhost/rte_vhost_crypto.h
rename to lib/vhost/rte_vhost_crypto.h
diff --git a/lib/librte_vhost/socket.c b/lib/vhost/socket.c
similarity index 100%
rename from lib/librte_vhost/socket.c
rename to lib/vhost/socket.c
diff --git a/lib/librte_vhost/vdpa.c b/lib/vhost/vdpa.c
similarity index 100%
rename from lib/librte_vhost/vdpa.c
rename to lib/vhost/vdpa.c
diff --git a/lib/librte_vhost/version.map b/lib/vhost/version.map
similarity index 100%
rename from lib/librte_vhost/version.map
rename to lib/vhost/version.map
diff --git a/lib/librte_vhost/vhost.c b/lib/vhost/vhost.c
similarity index 100%
rename from lib/librte_vhost/vhost.c
rename to lib/vhost/vhost.c
diff --git a/lib/librte_vhost/vhost.h b/lib/vhost/vhost.h
similarity index 100%
rename from lib/librte_vhost/vhost.h
rename to lib/vhost/vhost.h
diff --git a/lib/librte_vhost/vhost_crypto.c b/lib/vhost/vhost_crypto.c
similarity index 100%
rename from lib/librte_vhost/vhost_crypto.c
rename to lib/vhost/vhost_crypto.c
diff --git a/lib/librte_vhost/vhost_user.c b/lib/vhost/vhost_user.c
similarity index 100%
rename from lib/librte_vhost/vhost_user.c
rename to lib/vhost/vhost_user.c
diff --git a/lib/librte_vhost/vhost_user.h b/lib/vhost/vhost_user.h
similarity index 100%
rename from lib/librte_vhost/vhost_user.h
rename to lib/vhost/vhost_user.h
diff --git a/lib/librte_vhost/virtio_crypto.h b/lib/vhost/virtio_crypto.h
similarity index 100%
rename from lib/librte_vhost/virtio_crypto.h
rename to lib/vhost/virtio_crypto.h
diff --git a/lib/librte_vhost/virtio_net.c b/lib/vhost/virtio_net.c
similarity index 100%
rename from lib/librte_vhost/virtio_net.c
rename to lib/vhost/virtio_net.c
diff --git a/license/exceptions.txt b/license/exceptions.txt
index 636c69b9bf..1bd4dbf8f7 100644
--- a/license/exceptions.txt
+++ b/license/exceptions.txt
@@ -12,8 +12,8 @@ Note that following licenses are not exceptions:-
---------------------------------------------------------------------------------------------------
SPDX Identifier TB Approval Date GB Approval Date File name
---------------------------------------------------------------------------------------------------
-1.MIT 10/23/2019 02/10/2020 lib/librte_eal/windows/include/dirent.h
-2.BSD-2-Clause 10/23/2019 12/18/2019 lib/librte_eal/windows/include/getopt.h
+1.MIT 10/23/2019 02/10/2020 lib/eal/windows/include/dirent.h
+2.BSD-2-Clause 10/23/2019 12/18/2019 lib/eal/windows/include/getopt.h
3.ISC AND
- BSD-2-Clause 10/23/2019 12/18/2019 lib/librte_eal/windows/getopt.c
+ BSD-2-Clause 10/23/2019 12/18/2019 lib/eal/windows/getopt.c
---------------------------------------------------------------------------------------------------
diff --git a/meson.build b/meson.build
index 13412780cd..12cb6e0e83 100644
--- a/meson.build
+++ b/meson.build
@@ -50,9 +50,9 @@ endif
# able to be included in any file. We also store a global array of include dirs
# for passing to pmdinfogen scripts
global_inc = include_directories('.', 'config',
- 'lib/librte_eal/include',
- 'lib/librte_eal/@0@/include'.format(host_machine.system()),
- 'lib/librte_eal/@0@/include'.format(arch_subdir),
+ 'lib/eal/include',
+ 'lib/eal/@0@/include'.format(host_machine.system()),
+ 'lib/eal/@0@/include'.format(arch_subdir),
)
# do configuration and get tool paths
--
2.27.0
^ permalink raw reply [relevance 1%]
* [dpdk-dev] [PATCH v5 1/1] ethdev: introduce indirect action APIs
@ 2021-04-19 14:38 1% ` Bing Zhao
0 siblings, 0 replies; 200+ results
From: Bing Zhao @ 2021-04-19 14:38 UTC (permalink / raw)
To: orika, thomas, ferruh.yigit, andrew.rybchenko, matan, viacheslavo
Cc: dev, ajit.khaparde, getelson, andreyv
Right now, rte_flow_shared_action_* APIs are used for some shared
actions, like RSS, count. The shared action should be created before
using it inside a flow. These shared actions sometimes are not
really shared but just some indirect actions decoupled from a flow.
The new functions rte_flow_action_handle_* are added to replace
the current shared functions rte_flow_shared_action_*.
There are two types of flow actions:
1. the direct (normal) actions that could be created and stored
within a flow rule. Such action is tied to its flow rule and
cannot be reused.
2. the indirect action, in the past, named shared_action. It is
created from a direct actioni, like count or rss, and then used
in the flow rules with an object handle. The PMD will take care
of the retrieve from indirect action to the direct action
when it is referenced.
The indirect action is accessed (update / query) w/o any flow rule,
just via the action object handle. For example, when querying or
resetting a counter, it could be done out of any flow using this
counter, but only the handle of the counter action object is
required.
The indirect action object could be shared by different flows or
used by a single flow, depending on the direct action type and
the real-life requirements.
The handle of an indirect action object is opaque and defined in
each driver and possibly different per direct action type.
The old name "shared" is improper in a sense and should be replaced.
Since the APIs are changed from "rte_flow_shared_action*" to the new
"rte_flow_action_handle*", the testpmd application code and command
line interfaces also need to be updated to do the adaption.
The testpmd application user guide is also updated. All the "shared
action" related parts are replaced with "indirect action" to have a
correct explanation.
The parameter of "update" interface is also changed. A general
pointer will replace the rte_flow_action struct pointer due to the
facts:
1. Some action may not support fields updating. In the example of a
counter, the only "update" supported should be the reset. So
passing a rte_flow_action struct pointer is meaningless and
there is even no such corresponding action struct. What's more,
if more than one operations should be supported, for some other
action, such pointer parameter may not meet the need.
2. Some action may need conditional or partial update, the current
parameter will not provide the ability to indicate which part(s)
to update.
For different types of indirect action objects, the pointer could
either be the same of rte_flow_action* struct - in order not to
break the current driver implementation, or some wrapper
structures with bits as masks to indicate which part to be
updated, depending on real needs of the corresponding direct
action. For different direct actions, the structures of indirect
action objects updating will be different.
All the underlayer PMD callbacks will be moved to these new APIs.
The RTE_FLOW_ACTION_TYPE_SHARED is kept for now in order not to
break the ABI. All the implementations are changed by using
RTE_FLOW_ACTION_TYPE_INDIRECT.
Since the APIs are changed from "rte_flow_shared_action*" to the new
"rte_flow_action_handle*" and the "update" interface's 3rd input
parameter is changed to generic pointer, the mlx5 PMD that uses these
APIs needs to do the adaption to the new APIs as well.
Signed-off-by: Bing Zhao <bingz@nvidia.com>
Acked-by: Andrey Vesnovaty <andreyv@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
---
app/test-pmd/cmdline.c | 24 +-
app/test-pmd/cmdline_flow.c | 252 ++++++++++----------
app/test-pmd/config.c | 160 ++++++-------
app/test-pmd/testpmd.h | 28 +--
doc/guides/prog_guide/rte_flow.rst | 29 +--
doc/guides/rel_notes/release_21_05.rst | 7 +
doc/guides/testpmd_app_ug/testpmd_funcs.rst | 106 ++++----
drivers/net/mlx5/mlx5.c | 2 +-
drivers/net/mlx5/mlx5_defs.h | 4 +-
drivers/net/mlx5/mlx5_flow.c | 238 +++++++++---------
drivers/net/mlx5/mlx5_flow.h | 24 +-
drivers/net/mlx5/mlx5_flow_dv.c | 85 +++----
lib/librte_ethdev/rte_flow.c | 56 ++---
lib/librte_ethdev/rte_flow.h | 119 +++++----
lib/librte_ethdev/rte_flow_driver.h | 26 +-
lib/librte_ethdev/version.map | 8 +-
16 files changed, 602 insertions(+), 566 deletions(-)
diff --git a/app/test-pmd/cmdline.c b/app/test-pmd/cmdline.c
index 5bf1497f2b..4d9e038ce8 100644
--- a/app/test-pmd/cmdline.c
+++ b/app/test-pmd/cmdline.c
@@ -1002,23 +1002,23 @@ static void cmd_help_long_parsed(void *parsed_result,
" List and destroy aged flows"
" flow rules\n\n"
- "flow shared_action {port_id} create"
- " [action_id {shared_action_id}]"
+ "flow indirect_action {port_id} create"
+ " [action_id {indirect_action_id}]"
" [ingress] [egress]"
" action {action} / end\n"
- " Create shared action.\n\n"
+ " Create indirect action.\n\n"
- "flow shared_action {port_id} update"
- " {shared_action_id} action {action} / end\n"
- " Update shared action.\n\n"
+ "flow indirect_action {port_id} update"
+ " {indirect_action_id} action {action} / end\n"
+ " Update indirect action.\n\n"
- "flow shared_action {port_id} destroy"
- " action_id {shared_action_id} [...]\n"
- " Destroy specific shared actions.\n\n"
+ "flow indirect_action {port_id} destroy"
+ " action_id {indirect_action_id} [...]\n"
+ " Destroy specific indirect actions.\n\n"
- "flow shared_action {port_id} query"
- " {shared_action_id}\n"
- " Query an existing shared action.\n\n"
+ "flow indirect_action {port_id} query"
+ " {indirect_action_id}\n"
+ " Query an existing indirect action.\n\n"
"set vxlan ip-version (ipv4|ipv6) vni (vni) udp-src"
" (udp-src) udp-dst (udp-dst) ip-src (ip-src) ip-dst"
diff --git a/app/test-pmd/cmdline_flow.c b/app/test-pmd/cmdline_flow.c
index 0127d9e7d6..c5381c638b 100644
--- a/app/test-pmd/cmdline_flow.c
+++ b/app/test-pmd/cmdline_flow.c
@@ -54,7 +54,7 @@ enum index {
PORT_ID,
GROUP_ID,
PRIORITY_LEVEL,
- SHARED_ACTION_ID,
+ INDIRECT_ACTION_ID,
/* Top-level command. */
SET,
@@ -68,7 +68,7 @@ enum index {
/* Top-level command. */
FLOW,
/* Sub-level commands. */
- SHARED_ACTION,
+ INDIRECT_ACTION,
VALIDATE,
CREATE,
DESTROY,
@@ -112,21 +112,21 @@ enum index {
DUMP_ALL,
DUMP_ONE,
- /* Shared action arguments */
- SHARED_ACTION_CREATE,
- SHARED_ACTION_UPDATE,
- SHARED_ACTION_DESTROY,
- SHARED_ACTION_QUERY,
+ /* Indirect action arguments */
+ INDIRECT_ACTION_CREATE,
+ INDIRECT_ACTION_UPDATE,
+ INDIRECT_ACTION_DESTROY,
+ INDIRECT_ACTION_QUERY,
- /* Shared action create arguments */
- SHARED_ACTION_CREATE_ID,
- SHARED_ACTION_INGRESS,
- SHARED_ACTION_EGRESS,
- SHARED_ACTION_TRANSFER,
- SHARED_ACTION_SPEC,
+ /* Indirect action create arguments */
+ INDIRECT_ACTION_CREATE_ID,
+ INDIRECT_ACTION_INGRESS,
+ INDIRECT_ACTION_EGRESS,
+ INDIRECT_ACTION_TRANSFER,
+ INDIRECT_ACTION_SPEC,
- /* Shared action destroy arguments */
- SHARED_ACTION_DESTROY_ID,
+ /* Indirect action destroy arguments */
+ INDIRECT_ACTION_DESTROY_ID,
/* Validate/create pattern. */
PATTERN,
@@ -416,8 +416,8 @@ enum index {
ACTION_SAMPLE_RATIO,
ACTION_SAMPLE_INDEX,
ACTION_SAMPLE_INDEX_VALUE,
- ACTION_SHARED,
- SHARED_ACTION_ID2PTR,
+ ACTION_INDIRECT,
+ INDIRECT_ACTION_ID2PTR,
ACTION_MODIFY_FIELD,
ACTION_MODIFY_FIELD_OP,
ACTION_MODIFY_FIELD_OP_VALUE,
@@ -778,10 +778,10 @@ struct buffer {
struct {
uint32_t *action_id;
uint32_t action_id_n;
- } sa_destroy; /**< Shared action destroy arguments. */
+ } ia_destroy; /**< Indirect action destroy arguments. */
struct {
uint32_t action_id;
- } sa; /* Shared action query arguments */
+ } ia; /* Indirect action query arguments */
struct {
struct rte_flow_attr attr;
struct tunnel_ops tunnel_ops;
@@ -841,12 +841,12 @@ struct parse_action_priv {
.size = s, \
})
-static const enum index next_sa_create_attr[] = {
- SHARED_ACTION_CREATE_ID,
- SHARED_ACTION_INGRESS,
- SHARED_ACTION_EGRESS,
- SHARED_ACTION_TRANSFER,
- SHARED_ACTION_SPEC,
+static const enum index next_ia_create_attr[] = {
+ INDIRECT_ACTION_CREATE_ID,
+ INDIRECT_ACTION_INGRESS,
+ INDIRECT_ACTION_EGRESS,
+ INDIRECT_ACTION_TRANSFER,
+ INDIRECT_ACTION_SPEC,
ZERO,
};
@@ -856,11 +856,11 @@ static const enum index next_dump_subcmd[] = {
ZERO,
};
-static const enum index next_sa_subcmd[] = {
- SHARED_ACTION_CREATE,
- SHARED_ACTION_UPDATE,
- SHARED_ACTION_DESTROY,
- SHARED_ACTION_QUERY,
+static const enum index next_ia_subcmd[] = {
+ INDIRECT_ACTION_CREATE,
+ INDIRECT_ACTION_UPDATE,
+ INDIRECT_ACTION_DESTROY,
+ INDIRECT_ACTION_QUERY,
ZERO,
};
@@ -900,8 +900,8 @@ static const enum index next_aged_attr[] = {
ZERO,
};
-static const enum index next_sa_destroy_attr[] = {
- SHARED_ACTION_DESTROY_ID,
+static const enum index next_ia_destroy_attr[] = {
+ INDIRECT_ACTION_DESTROY_ID,
END,
ZERO,
};
@@ -1380,7 +1380,7 @@ static const enum index next_action[] = {
ACTION_SET_IPV6_DSCP,
ACTION_AGE,
ACTION_SAMPLE,
- ACTION_SHARED,
+ ACTION_INDIRECT,
ACTION_MODIFY_FIELD,
ZERO,
};
@@ -1797,13 +1797,13 @@ static int parse_ipv6_addr(struct context *, const struct token *,
static int parse_port(struct context *, const struct token *,
const char *, unsigned int,
void *, unsigned int);
-static int parse_sa(struct context *, const struct token *,
+static int parse_ia(struct context *, const struct token *,
const char *, unsigned int,
void *, unsigned int);
-static int parse_sa_destroy(struct context *ctx, const struct token *token,
+static int parse_ia_destroy(struct context *ctx, const struct token *token,
const char *str, unsigned int len,
void *buf, unsigned int size);
-static int parse_sa_id2ptr(struct context *ctx, const struct token *token,
+static int parse_ia_id2ptr(struct context *ctx, const struct token *token,
const char *str, unsigned int len, void *buf,
unsigned int size);
static int comp_none(struct context *, const struct token *,
@@ -1950,10 +1950,10 @@ static const struct token token_list[] = {
.call = parse_int,
.comp = comp_none,
},
- [SHARED_ACTION_ID] = {
- .name = "{shared_action_id}",
- .type = "SHARED_ACTION_ID",
- .help = "shared action id",
+ [INDIRECT_ACTION_ID] = {
+ .name = "{indirect_action_id}",
+ .type = "INDIRECT_ACTION_ID",
+ .help = "indirect action id",
.call = parse_int,
.comp = comp_none,
},
@@ -1963,7 +1963,7 @@ static const struct token token_list[] = {
.type = "{command} {port_id} [{arg} [...]]",
.help = "manage ingress/egress flow rules",
.next = NEXT(NEXT_ENTRY
- (SHARED_ACTION,
+ (INDIRECT_ACTION,
VALIDATE,
CREATE,
DESTROY,
@@ -1977,42 +1977,42 @@ static const struct token token_list[] = {
.call = parse_init,
},
/* Top-level command. */
- [SHARED_ACTION] = {
- .name = "shared_action",
+ [INDIRECT_ACTION] = {
+ .name = "indirect_action",
.type = "{command} {port_id} [{arg} [...]]",
- .help = "manage shared actions",
- .next = NEXT(next_sa_subcmd, NEXT_ENTRY(PORT_ID)),
+ .help = "manage indirect actions",
+ .next = NEXT(next_ia_subcmd, NEXT_ENTRY(PORT_ID)),
.args = ARGS(ARGS_ENTRY(struct buffer, port)),
- .call = parse_sa,
+ .call = parse_ia,
},
/* Sub-level commands. */
- [SHARED_ACTION_CREATE] = {
+ [INDIRECT_ACTION_CREATE] = {
.name = "create",
- .help = "create shared action",
- .next = NEXT(next_sa_create_attr),
- .call = parse_sa,
+ .help = "create indirect action",
+ .next = NEXT(next_ia_create_attr),
+ .call = parse_ia,
},
- [SHARED_ACTION_UPDATE] = {
+ [INDIRECT_ACTION_UPDATE] = {
.name = "update",
- .help = "update shared action",
- .next = NEXT(NEXT_ENTRY(SHARED_ACTION_SPEC),
- NEXT_ENTRY(SHARED_ACTION_ID)),
+ .help = "update indirect action",
+ .next = NEXT(NEXT_ENTRY(INDIRECT_ACTION_SPEC),
+ NEXT_ENTRY(INDIRECT_ACTION_ID)),
.args = ARGS(ARGS_ENTRY(struct buffer, args.vc.attr.group)),
- .call = parse_sa,
+ .call = parse_ia,
},
- [SHARED_ACTION_DESTROY] = {
+ [INDIRECT_ACTION_DESTROY] = {
.name = "destroy",
- .help = "destroy shared action",
- .next = NEXT(NEXT_ENTRY(SHARED_ACTION_DESTROY_ID)),
+ .help = "destroy indirect action",
+ .next = NEXT(NEXT_ENTRY(INDIRECT_ACTION_DESTROY_ID)),
.args = ARGS(ARGS_ENTRY(struct buffer, port)),
- .call = parse_sa_destroy,
+ .call = parse_ia_destroy,
},
- [SHARED_ACTION_QUERY] = {
+ [INDIRECT_ACTION_QUERY] = {
.name = "query",
- .help = "query shared action",
- .next = NEXT(NEXT_ENTRY(END), NEXT_ENTRY(SHARED_ACTION_ID)),
- .args = ARGS(ARGS_ENTRY(struct buffer, args.sa.action_id)),
- .call = parse_sa,
+ .help = "query indirect action",
+ .next = NEXT(NEXT_ENTRY(END), NEXT_ENTRY(INDIRECT_ACTION_ID)),
+ .args = ARGS(ARGS_ENTRY(struct buffer, args.ia.action_id)),
+ .call = parse_ia,
},
[VALIDATE] = {
.name = "validate",
@@ -4498,61 +4498,61 @@ static const struct token token_list[] = {
.call = parse_vc_action_sample_index,
.comp = comp_set_sample_index,
},
- /* Shared action destroy arguments. */
- [SHARED_ACTION_DESTROY_ID] = {
+ /* Indirect action destroy arguments. */
+ [INDIRECT_ACTION_DESTROY_ID] = {
.name = "action_id",
- .help = "specify a shared action id to destroy",
- .next = NEXT(next_sa_destroy_attr,
- NEXT_ENTRY(SHARED_ACTION_ID)),
+ .help = "specify a indirect action id to destroy",
+ .next = NEXT(next_ia_destroy_attr,
+ NEXT_ENTRY(INDIRECT_ACTION_ID)),
.args = ARGS(ARGS_ENTRY_PTR(struct buffer,
- args.sa_destroy.action_id)),
- .call = parse_sa_destroy,
+ args.ia_destroy.action_id)),
+ .call = parse_ia_destroy,
},
- /* Shared action create arguments. */
- [SHARED_ACTION_CREATE_ID] = {
+ /* Indirect action create arguments. */
+ [INDIRECT_ACTION_CREATE_ID] = {
.name = "action_id",
- .help = "specify a shared action id to create",
- .next = NEXT(next_sa_create_attr,
- NEXT_ENTRY(SHARED_ACTION_ID)),
+ .help = "specify a indirect action id to create",
+ .next = NEXT(next_ia_create_attr,
+ NEXT_ENTRY(INDIRECT_ACTION_ID)),
.args = ARGS(ARGS_ENTRY(struct buffer, args.vc.attr.group)),
},
- [ACTION_SHARED] = {
- .name = "shared",
- .help = "apply shared action by id",
- .priv = PRIV_ACTION(SHARED, 0),
- .next = NEXT(NEXT_ENTRY(SHARED_ACTION_ID2PTR)),
+ [ACTION_INDIRECT] = {
+ .name = "indirect",
+ .help = "apply indirect action by id",
+ .priv = PRIV_ACTION(INDIRECT, 0),
+ .next = NEXT(NEXT_ENTRY(INDIRECT_ACTION_ID2PTR)),
.args = ARGS(ARGS_ENTRY_ARB(0, sizeof(uint32_t))),
.call = parse_vc,
},
- [SHARED_ACTION_ID2PTR] = {
+ [INDIRECT_ACTION_ID2PTR] = {
.name = "{action_id}",
- .type = "SHARED_ACTION_ID",
- .help = "shared action id",
+ .type = "INDIRECT_ACTION_ID",
+ .help = "indirect action id",
.next = NEXT(NEXT_ENTRY(ACTION_NEXT)),
- .call = parse_sa_id2ptr,
+ .call = parse_ia_id2ptr,
.comp = comp_none,
},
- [SHARED_ACTION_INGRESS] = {
+ [INDIRECT_ACTION_INGRESS] = {
.name = "ingress",
.help = "affect rule to ingress",
- .next = NEXT(next_sa_create_attr),
- .call = parse_sa,
+ .next = NEXT(next_ia_create_attr),
+ .call = parse_ia,
},
- [SHARED_ACTION_EGRESS] = {
+ [INDIRECT_ACTION_EGRESS] = {
.name = "egress",
.help = "affect rule to egress",
- .next = NEXT(next_sa_create_attr),
- .call = parse_sa,
+ .next = NEXT(next_ia_create_attr),
+ .call = parse_ia,
},
- [SHARED_ACTION_TRANSFER] = {
+ [INDIRECT_ACTION_TRANSFER] = {
.name = "transfer",
.help = "affect rule to transfer",
- .next = NEXT(next_sa_create_attr),
- .call = parse_sa,
+ .next = NEXT(next_ia_create_attr),
+ .call = parse_ia,
},
- [SHARED_ACTION_SPEC] = {
+ [INDIRECT_ACTION_SPEC] = {
.name = "action",
- .help = "specify action to share",
+ .help = "specify action to create indirect handle",
.next = NEXT(next_action),
},
};
@@ -4739,9 +4739,9 @@ parse_init(struct context *ctx, const struct token *token,
return len;
}
-/** Parse tokens for shared action commands. */
+/** Parse tokens for indirect action commands. */
static int
-parse_sa(struct context *ctx, const struct token *token,
+parse_ia(struct context *ctx, const struct token *token,
const char *str, unsigned int len,
void *buf, unsigned int size)
{
@@ -4754,7 +4754,7 @@ parse_sa(struct context *ctx, const struct token *token,
if (!out)
return len;
if (!out->command) {
- if (ctx->curr != SHARED_ACTION)
+ if (ctx->curr != INDIRECT_ACTION)
return -1;
if (sizeof(*out) > size)
return -1;
@@ -4766,26 +4766,26 @@ parse_sa(struct context *ctx, const struct token *token,
return len;
}
switch (ctx->curr) {
- case SHARED_ACTION_CREATE:
- case SHARED_ACTION_UPDATE:
+ case INDIRECT_ACTION_CREATE:
+ case INDIRECT_ACTION_UPDATE:
out->args.vc.actions =
(void *)RTE_ALIGN_CEIL((uintptr_t)(out + 1),
sizeof(double));
out->args.vc.attr.group = UINT32_MAX;
/* fallthrough */
- case SHARED_ACTION_QUERY:
+ case INDIRECT_ACTION_QUERY:
out->command = ctx->curr;
ctx->objdata = 0;
ctx->object = out;
ctx->objmask = NULL;
return len;
- case SHARED_ACTION_EGRESS:
+ case INDIRECT_ACTION_EGRESS:
out->args.vc.attr.egress = 1;
return len;
- case SHARED_ACTION_INGRESS:
+ case INDIRECT_ACTION_INGRESS:
out->args.vc.attr.ingress = 1;
return len;
- case SHARED_ACTION_TRANSFER:
+ case INDIRECT_ACTION_TRANSFER:
out->args.vc.attr.transfer = 1;
return len;
default:
@@ -4794,9 +4794,9 @@ parse_sa(struct context *ctx, const struct token *token,
}
-/** Parse tokens for shared action destroy command. */
+/** Parse tokens for indirect action destroy command. */
static int
-parse_sa_destroy(struct context *ctx, const struct token *token,
+parse_ia_destroy(struct context *ctx, const struct token *token,
const char *str, unsigned int len,
void *buf, unsigned int size)
{
@@ -4809,8 +4809,8 @@ parse_sa_destroy(struct context *ctx, const struct token *token,
/* Nothing else to do if there is no buffer. */
if (!out)
return len;
- if (!out->command || out->command == SHARED_ACTION) {
- if (ctx->curr != SHARED_ACTION_DESTROY)
+ if (!out->command || out->command == INDIRECT_ACTION) {
+ if (ctx->curr != INDIRECT_ACTION_DESTROY)
return -1;
if (sizeof(*out) > size)
return -1;
@@ -4818,13 +4818,13 @@ parse_sa_destroy(struct context *ctx, const struct token *token,
ctx->objdata = 0;
ctx->object = out;
ctx->objmask = NULL;
- out->args.sa_destroy.action_id =
+ out->args.ia_destroy.action_id =
(void *)RTE_ALIGN_CEIL((uintptr_t)(out + 1),
sizeof(double));
return len;
}
- action_id = out->args.sa_destroy.action_id
- + out->args.sa_destroy.action_id_n++;
+ action_id = out->args.ia_destroy.action_id
+ + out->args.ia_destroy.action_id_n++;
if ((uint8_t *)action_id > (uint8_t *)out + size)
return -1;
ctx->objdata = 0;
@@ -7102,7 +7102,7 @@ parse_port(struct context *ctx, const struct token *token,
}
static int
-parse_sa_id2ptr(struct context *ctx, const struct token *token,
+parse_ia_id2ptr(struct context *ctx, const struct token *token,
const char *str, unsigned int len,
void *buf, unsigned int size)
{
@@ -7119,9 +7119,9 @@ parse_sa_id2ptr(struct context *ctx, const struct token *token,
ctx->object = action;
if (ret != (int)len)
return ret;
- /* set shared action */
+ /* set indirect action */
if (action) {
- action->conf = port_shared_action_get_by_id(ctx->port, id);
+ action->conf = port_action_handle_get_by_id(ctx->port, id);
ret = (action->conf) ? ret : -1;
}
return ret;
@@ -7659,27 +7659,27 @@ static void
cmd_flow_parsed(const struct buffer *in)
{
switch (in->command) {
- case SHARED_ACTION_CREATE:
- port_shared_action_create(
+ case INDIRECT_ACTION_CREATE:
+ port_action_handle_create(
in->port, in->args.vc.attr.group,
- &((const struct rte_flow_shared_action_conf) {
+ &((const struct rte_flow_indir_action_conf) {
.ingress = in->args.vc.attr.ingress,
.egress = in->args.vc.attr.egress,
.transfer = in->args.vc.attr.transfer,
}),
in->args.vc.actions);
break;
- case SHARED_ACTION_DESTROY:
- port_shared_action_destroy(in->port,
- in->args.sa_destroy.action_id_n,
- in->args.sa_destroy.action_id);
+ case INDIRECT_ACTION_DESTROY:
+ port_action_handle_destroy(in->port,
+ in->args.ia_destroy.action_id_n,
+ in->args.ia_destroy.action_id);
break;
- case SHARED_ACTION_UPDATE:
- port_shared_action_update(in->port, in->args.vc.attr.group,
+ case INDIRECT_ACTION_UPDATE:
+ port_action_handle_update(in->port, in->args.vc.attr.group,
in->args.vc.actions);
break;
- case SHARED_ACTION_QUERY:
- port_shared_action_query(in->port, in->args.sa.action_id);
+ case INDIRECT_ACTION_QUERY:
+ port_action_handle_query(in->port, in->args.ia.action_id);
break;
case VALIDATE:
port_flow_validate(in->port, &in->args.vc.attr,
diff --git a/app/test-pmd/config.c b/app/test-pmd/config.c
index d4b0e850f5..868ff3469b 100644
--- a/app/test-pmd/config.c
+++ b/app/test-pmd/config.c
@@ -1391,38 +1391,38 @@ rss_config_display(struct rte_flow_action_rss *rss_conf)
}
}
-static struct port_shared_action *
+static struct port_indirect_action *
action_get_by_id(portid_t port_id, uint32_t id)
{
struct rte_port *port;
- struct port_shared_action **ppsa;
- struct port_shared_action *psa = NULL;
+ struct port_indirect_action **ppia;
+ struct port_indirect_action *pia = NULL;
if (port_id_is_invalid(port_id, ENABLED_WARN) ||
port_id == (portid_t)RTE_PORT_ALL)
return NULL;
port = &ports[port_id];
- ppsa = &port->actions_list;
- while (*ppsa) {
- if ((*ppsa)->id == id) {
- psa = *ppsa;
+ ppia = &port->actions_list;
+ while (*ppia) {
+ if ((*ppia)->id == id) {
+ pia = *ppia;
break;
}
- ppsa = &(*ppsa)->next;
+ ppia = &(*ppia)->next;
}
- if (!psa)
- printf("Failed to find shared action #%u on port %u\n",
+ if (!pia)
+ printf("Failed to find indirect action #%u on port %u\n",
id, port_id);
- return psa;
+ return pia;
}
static int
action_alloc(portid_t port_id, uint32_t id,
- struct port_shared_action **action)
+ struct port_indirect_action **action)
{
struct rte_port *port;
- struct port_shared_action **ppsa;
- struct port_shared_action *psa = NULL;
+ struct port_indirect_action **ppia;
+ struct port_indirect_action *pia = NULL;
*action = NULL;
if (port_id_is_invalid(port_id, ENABLED_WARN) ||
@@ -1433,7 +1433,7 @@ action_alloc(portid_t port_id, uint32_t id,
/* taking first available ID */
if (port->actions_list) {
if (port->actions_list->id == UINT32_MAX - 1) {
- printf("Highest shared action ID is already"
+ printf("Highest indirect action ID is already"
" assigned, delete it first\n");
return -ENOMEM;
}
@@ -1442,70 +1442,70 @@ action_alloc(portid_t port_id, uint32_t id,
id = 0;
}
}
- psa = calloc(1, sizeof(*psa));
- if (!psa) {
- printf("Allocation of port %u shared action failed\n",
+ pia = calloc(1, sizeof(*pia));
+ if (!pia) {
+ printf("Allocation of port %u indirect action failed\n",
port_id);
return -ENOMEM;
}
- ppsa = &port->actions_list;
- while (*ppsa && (*ppsa)->id > id)
- ppsa = &(*ppsa)->next;
- if (*ppsa && (*ppsa)->id == id) {
- printf("Shared action #%u is already assigned,"
+ ppia = &port->actions_list;
+ while (*ppia && (*ppia)->id > id)
+ ppia = &(*ppia)->next;
+ if (*ppia && (*ppia)->id == id) {
+ printf("Indirect action #%u is already assigned,"
" delete it first\n", id);
- free(psa);
+ free(pia);
return -EINVAL;
}
- psa->next = *ppsa;
- psa->id = id;
- *ppsa = psa;
- *action = psa;
+ pia->next = *ppia;
+ pia->id = id;
+ *ppia = pia;
+ *action = pia;
return 0;
}
-/** Create shared action */
+/** Create indirect action */
int
-port_shared_action_create(portid_t port_id, uint32_t id,
- const struct rte_flow_shared_action_conf *conf,
+port_action_handle_create(portid_t port_id, uint32_t id,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action)
{
- struct port_shared_action *psa;
+ struct port_indirect_action *pia;
int ret;
struct rte_flow_error error;
- ret = action_alloc(port_id, id, &psa);
+ ret = action_alloc(port_id, id, &pia);
if (ret)
return ret;
if (action->type == RTE_FLOW_ACTION_TYPE_AGE) {
struct rte_flow_action_age *age =
(struct rte_flow_action_age *)(uintptr_t)(action->conf);
- psa->age_type = ACTION_AGE_CONTEXT_TYPE_SHARED_ACTION;
- age->context = &psa->age_type;
+ pia->age_type = ACTION_AGE_CONTEXT_TYPE_INDIRECT_ACTION;
+ age->context = &pia->age_type;
}
/* Poisoning to make sure PMDs update it in case of error. */
memset(&error, 0x22, sizeof(error));
- psa->action = rte_flow_shared_action_create(port_id, conf, action,
+ pia->handle = rte_flow_action_handle_create(port_id, conf, action,
&error);
- if (!psa->action) {
- uint32_t destroy_id = psa->id;
- port_shared_action_destroy(port_id, 1, &destroy_id);
+ if (!pia->handle) {
+ uint32_t destroy_id = pia->id;
+ port_action_handle_destroy(port_id, 1, &destroy_id);
return port_flow_complain(&error);
}
- psa->type = action->type;
- printf("Shared action #%u created\n", psa->id);
+ pia->type = action->type;
+ printf("Indirect action #%u created\n", pia->id);
return 0;
}
-/** Destroy shared action */
+/** Destroy indirect action */
int
-port_shared_action_destroy(portid_t port_id,
+port_action_handle_destroy(portid_t port_id,
uint32_t n,
const uint32_t *actions)
{
struct rte_port *port;
- struct port_shared_action **tmp;
+ struct port_indirect_action **tmp;
uint32_t c = 0;
int ret = 0;
@@ -1519,9 +1519,9 @@ port_shared_action_destroy(portid_t port_id,
for (i = 0; i != n; ++i) {
struct rte_flow_error error;
- struct port_shared_action *psa = *tmp;
+ struct port_indirect_action *pia = *tmp;
- if (actions[i] != psa->id)
+ if (actions[i] != pia->id)
continue;
/*
* Poisoning to make sure PMDs update it in case
@@ -1529,14 +1529,14 @@ port_shared_action_destroy(portid_t port_id,
*/
memset(&error, 0x33, sizeof(error));
- if (psa->action && rte_flow_shared_action_destroy(
- port_id, psa->action, &error)) {
+ if (pia->handle && rte_flow_action_handle_destroy(
+ port_id, pia->handle, &error)) {
ret = port_flow_complain(&error);
continue;
}
- *tmp = psa->next;
- printf("Shared action #%u destroyed\n", psa->id);
- free(psa);
+ *tmp = pia->next;
+ printf("Indirect action #%u destroyed\n", pia->id);
+ free(pia);
break;
}
if (i == n)
@@ -1547,60 +1547,60 @@ port_shared_action_destroy(portid_t port_id,
}
-/** Get shared action by port + id */
-struct rte_flow_shared_action *
-port_shared_action_get_by_id(portid_t port_id, uint32_t id)
+/** Get indirect action by port + id */
+struct rte_flow_action_handle *
+port_action_handle_get_by_id(portid_t port_id, uint32_t id)
{
- struct port_shared_action *psa = action_get_by_id(port_id, id);
+ struct port_indirect_action *pia = action_get_by_id(port_id, id);
- return (psa) ? psa->action : NULL;
+ return (pia) ? pia->handle : NULL;
}
-/** Update shared action */
+/** Update indirect action */
int
-port_shared_action_update(portid_t port_id, uint32_t id,
+port_action_handle_update(portid_t port_id, uint32_t id,
const struct rte_flow_action *action)
{
struct rte_flow_error error;
- struct rte_flow_shared_action *shared_action;
+ struct rte_flow_action_handle *action_handle;
- shared_action = port_shared_action_get_by_id(port_id, id);
- if (!shared_action)
+ action_handle = port_action_handle_get_by_id(port_id, id);
+ if (!action_handle)
return -EINVAL;
- if (rte_flow_shared_action_update(port_id, shared_action, action,
+ if (rte_flow_action_handle_update(port_id, action_handle, action,
&error)) {
return port_flow_complain(&error);
}
- printf("Shared action #%u updated\n", id);
+ printf("Indirect action #%u updated\n", id);
return 0;
}
int
-port_shared_action_query(portid_t port_id, uint32_t id)
+port_action_handle_query(portid_t port_id, uint32_t id)
{
struct rte_flow_error error;
- struct port_shared_action *psa;
+ struct port_indirect_action *pia;
uint64_t default_data;
void *data = NULL;
int ret = 0;
- psa = action_get_by_id(port_id, id);
- if (!psa)
+ pia = action_get_by_id(port_id, id);
+ if (!pia)
return -EINVAL;
- switch (psa->type) {
+ switch (pia->type) {
case RTE_FLOW_ACTION_TYPE_RSS:
case RTE_FLOW_ACTION_TYPE_AGE:
data = &default_data;
break;
default:
- printf("Shared action %u (type: %d) on port %u doesn't support"
- " query\n", id, psa->type, port_id);
+ printf("Indirect action %u (type: %d) on port %u doesn't"
+ " support query\n", id, pia->type, port_id);
return -1;
}
- if (rte_flow_shared_action_query(port_id, psa->action, data, &error))
+ if (rte_flow_action_handle_query(port_id, pia->handle, data, &error))
ret = port_flow_complain(&error);
- switch (psa->type) {
+ switch (pia->type) {
case RTE_FLOW_ACTION_TYPE_RSS:
if (!ret)
printf("Shared RSS action:\n\trefs:%u\n",
@@ -1622,8 +1622,8 @@ port_shared_action_query(portid_t port_id, uint32_t id)
data = NULL;
break;
default:
- printf("Shared action %u (type: %d) on port %u doesn't support"
- " query\n", id, psa->type, port_id);
+ printf("Indirect action %u (type: %d) on port %u doesn't"
+ " support query\n", id, pia->type, port_id);
ret = -1;
}
return ret;
@@ -2065,7 +2065,7 @@ port_flow_aged(portid_t port_id, uint8_t destroy)
enum age_action_context_type *type;
union {
struct port_flow *pf;
- struct port_shared_action *psa;
+ struct port_indirect_action *pia;
} ctx;
if (port_id_is_invalid(port_id, ENABLED_WARN) ||
@@ -2115,11 +2115,11 @@ port_flow_aged(portid_t port_id, uint8_t destroy)
&ctx.pf->id))
total++;
break;
- case ACTION_AGE_CONTEXT_TYPE_SHARED_ACTION:
- ctx.psa = container_of(type, struct port_shared_action,
- age_type);
- printf("%-20s\t%" PRIu32 "\n", "Shared action",
- ctx.psa->id);
+ case ACTION_AGE_CONTEXT_TYPE_INDIRECT_ACTION:
+ ctx.pia = container_of(type,
+ struct port_indirect_action, age_type);
+ printf("%-20s\t%" PRIu32 "\n", "Indirect action",
+ ctx.pia->id);
break;
default:
printf("Error: invalid context type %u\n", port_id);
diff --git a/app/test-pmd/testpmd.h b/app/test-pmd/testpmd.h
index 36d8535d0c..c314b30f2e 100644
--- a/app/test-pmd/testpmd.h
+++ b/app/test-pmd/testpmd.h
@@ -151,7 +151,7 @@ struct fwd_stream {
*/
enum age_action_context_type {
ACTION_AGE_CONTEXT_TYPE_FLOW,
- ACTION_AGE_CONTEXT_TYPE_SHARED_ACTION,
+ ACTION_AGE_CONTEXT_TYPE_INDIRECT_ACTION,
};
/** Descriptor for a single flow. */
@@ -165,12 +165,12 @@ struct port_flow {
uint8_t data[]; /**< Storage for flow rule description */
};
-/* Descriptor for shared action */
-struct port_shared_action {
- struct port_shared_action *next; /**< Next flow in list. */
- uint32_t id; /**< Shared action ID. */
+/* Descriptor for indirect action */
+struct port_indirect_action {
+ struct port_indirect_action *next; /**< Next flow in list. */
+ uint32_t id; /**< Indirect action ID. */
enum rte_flow_action_type type; /**< Action type. */
- struct rte_flow_shared_action *action; /**< Shared action handle. */
+ struct rte_flow_action_handle *handle; /**< Indirect action handle. */
enum age_action_context_type age_type; /**< Age action context type. */
};
@@ -222,8 +222,8 @@ struct rte_port {
uint32_t mc_addr_nb; /**< nb. of addr. in mc_addr_pool */
uint8_t slave_flag; /**< bonding slave port */
struct port_flow *flow_list; /**< Associated flows. */
- struct port_shared_action *actions_list;
- /**< Associated shared actions. */
+ struct port_indirect_action *actions_list;
+ /**< Associated indirect actions. */
LIST_HEAD(, port_flow_tunnel) flow_tunnel_list;
const struct rte_eth_rxtx_callback *rx_dump_cb[RTE_MAX_QUEUES_PER_PORT+1];
const struct rte_eth_rxtx_callback *tx_dump_cb[RTE_MAX_QUEUES_PER_PORT+1];
@@ -801,14 +801,14 @@ void port_reg_bit_field_set(portid_t port_id, uint32_t reg_off,
uint8_t bit1_pos, uint8_t bit2_pos, uint32_t value);
void port_reg_display(portid_t port_id, uint32_t reg_off);
void port_reg_set(portid_t port_id, uint32_t reg_off, uint32_t value);
-int port_shared_action_create(portid_t port_id, uint32_t id,
- const struct rte_flow_shared_action_conf *conf,
+int port_action_handle_create(portid_t port_id, uint32_t id,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action);
-int port_shared_action_destroy(portid_t port_id,
+int port_action_handle_destroy(portid_t port_id,
uint32_t n, const uint32_t *action);
-struct rte_flow_shared_action *port_shared_action_get_by_id(portid_t port_id,
+struct rte_flow_action_handle *port_action_handle_get_by_id(portid_t port_id,
uint32_t id);
-int port_shared_action_update(portid_t port_id, uint32_t id,
+int port_action_handle_update(portid_t port_id, uint32_t id,
const struct rte_flow_action *action);
int port_flow_validate(portid_t port_id,
const struct rte_flow_attr *attr,
@@ -820,7 +820,7 @@ int port_flow_create(portid_t port_id,
const struct rte_flow_item *pattern,
const struct rte_flow_action *actions,
const struct tunnel_ops *tunnel_ops);
-int port_shared_action_query(portid_t port_id, uint32_t id);
+int port_action_handle_query(portid_t port_id, uint32_t id);
void update_age_action_context(const struct rte_flow_action *actions,
struct port_flow *pf);
int port_flow_destroy(portid_t port_id, uint32_t n, const uint32_t *rule);
diff --git a/doc/guides/prog_guide/rte_flow.rst b/doc/guides/prog_guide/rte_flow.rst
index e1b93ecedf..4b54588995 100644
--- a/doc/guides/prog_guide/rte_flow.rst
+++ b/doc/guides/prog_guide/rte_flow.rst
@@ -1719,7 +1719,7 @@ that counter.
For ports within the same switch domain then the counter id namespace extends
to all ports within that switch domain.
-The shared flag is DEPRECATED and ``SHARED`` ``COUNT`` action should be used
+The shared flag is DEPRECATED and ``INDIRECT`` ``COUNT`` action should be used
to make shared counters.
.. _table_rte_flow_action_count:
@@ -2742,25 +2742,26 @@ packets, and must have a fate action.
| ``actions`` | sub-action list for sampling |
+--------------+---------------------------------+
-Action: ``SHARED``
-^^^^^^^^^^^^^^^^^^
+Action: ``INDIRECT``
+^^^^^^^^^^^^^^^^^^^^
-Flow utilize shared action by handle as returned from
-``rte_flow_shared_action_create()``.
+Flow utilize indirect action by handle as returned from
+``rte_flow_action_handle_create()``.
-The behaviour of the shared action defined by ``action`` argument of type
-``struct rte_flow_action`` passed to ``rte_flow_shared_action_create()``.
+The behaviour of the indirect action defined by ``action`` argument of type
+``struct rte_flow_action`` passed to ``rte_flow_action_handle_create()``.
-Multiple flows can use the same shared action.
-The shared action can be in-place updated by ``rte_flow_shared_action_update()``
-without destroying flow and creating flow again.
+The indirect action can be used by a single flow or shared among multiple flows.
+The indirect action can be in-place updated by ``rte_flow_action_handle_update()``
+without destroying flow and creating flow again. The fields that could be
+updated depend on the type of the ``action`` and different for every type.
-The shared action specified data (e.g. counter) can be queried by
-``rte_flow_shared_action_query()``.
+The indirect action specified data (e.g. counter) can be queried by
+``rte_flow_action_handle_query()``.
-.. _table_rte_flow_shared_action:
+.. _table_rte_flow_action_handle:
-.. table:: SHARED
+.. table:: INDIRECT
+---------------+
| Field |
diff --git a/doc/guides/rel_notes/release_21_05.rst b/doc/guides/rel_notes/release_21_05.rst
index 1c2e093294..8913dd4f9c 100644
--- a/doc/guides/rel_notes/release_21_05.rst
+++ b/doc/guides/rel_notes/release_21_05.rst
@@ -270,6 +270,13 @@ API Changes
``rte_cryptodev_raw_dequeue_burst`` got a new parameter
``max_nb_to_dequeue`` to provide flexible control on dequeue.
+* ethdev: The experimental flow API for shared action has been generalized
+ as a flow action handle used in rules through an indirect action.
+ The functions ``rte_flow_shared_action_*`` manipulating the action object
+ are replaced with ``rte_flow_action_handle_*``.
+ The action ``RTE_FLOW_ACTION_TYPE_SHARED`` is deprecated and can be
+ replaced with ``RTE_FLOW_ACTION_TYPE_INDIRECT``.
+
ABI Changes
-----------
diff --git a/doc/guides/testpmd_app_ug/testpmd_funcs.rst b/doc/guides/testpmd_app_ug/testpmd_funcs.rst
index a736e7d6e5..715e209fd2 100644
--- a/doc/guides/testpmd_app_ug/testpmd_funcs.rst
+++ b/doc/guides/testpmd_app_ug/testpmd_funcs.rst
@@ -4055,10 +4055,10 @@ This section lists supported actions and their attributes, if any.
- ``dscp_value {unsigned}``: The new DSCP value to be set
-- ``shared``: Use shared action created via
- ``flow shared_action {port_id} create``
+- ``indirect``: Use indirect action created via
+ ``flow indirect_action {port_id} create``
- - ``shared_action_id {unsigned}``: Shared action ID to use
+ - ``indirect_action_id {unsigned}``: Indirect action ID to use
Destroying flow rules
~~~~~~~~~~~~~~~~~~~~~
@@ -4349,113 +4349,117 @@ If attach ``destroy`` parameter, the command will destroy all the list aged flow
testpmd> flow aged 0
Port 0 total aged flows: 0
-Creating shared actions
-~~~~~~~~~~~~~~~~~~~~~~~
-``flow shared_action {port_id} create`` creates shared action with optional
-shared action ID. It is bound to ``rte_flow_shared_action_create()``::
+Creating indirect actions
+~~~~~~~~~~~~~~~~~~~~~~~~~
+
+``flow indirect_action {port_id} create`` creates indirect action with optional
+indirect action ID. It is bound to ``rte_flow_action_handle_create()``::
- flow shared_action {port_id} create [action_id {shared_action_id}]
+ flow indirect_action {port_id} create [action_id {indirect_action_id}]
[ingress] [egress] [transfer] action {action} / end
If successful, it will show::
- Shared action #[...] created
+ Indirect action #[...] created
-Otherwise, it will complain either that shared action already exists or that
+Otherwise, it will complain either that indirect action already exists or that
some error occurred::
- Shared action #[...] is already assigned, delete it first
+ Indirect action #[...] is already assigned, delete it first
::
Caught error type [...] ([...]): [...]
-Create shared rss action with id 100 to queues 1 and 2 on port 0::
+Create indirect rss action with id 100 to queues 1 and 2 on port 0::
- testpmd> flow shared_action 0 create action_id 100 \
+ testpmd> flow indirect_action 0 create action_id 100 \
ingress action rss queues 1 2 end / end
-Create shared rss action with id assigned by testpmd to queues 1 and 2 on
+Create indirect rss action with id assigned by testpmd to queues 1 and 2 on
port 0::
- testpmd> flow shared_action 0 create action_id \
+ testpmd> flow indirect_action 0 create action_id \
ingress action rss queues 0 1 end / end
-Updating shared actions
-~~~~~~~~~~~~~~~~~~~~~~~
-``flow shared_action {port_id} update`` updates configuration of the shared
-action from its shared action ID (as returned by
-``flow shared_action {port_id} create``). It is bound to
-``rte_flow_shared_action_update()``::
+Updating indirect actions
+~~~~~~~~~~~~~~~~~~~~~~~~~
+
+``flow indirect_action {port_id} update`` updates configuration of the indirect
+action from its indirect action ID (as returned by
+``flow indirect_action {port_id} create``). It is bound to
+``rte_flow_action_handle_update()``::
- flow shared_action {port_id} update {shared_action_id}
+ flow indirect_action {port_id} update {indirect_action_id}
action {action} / end
If successful, it will show::
- Shared action #[...] updated
+ Indirect action #[...] updated
-Otherwise, it will complain either that shared action not found or that some
+Otherwise, it will complain either that indirect action not found or that some
error occurred::
- Failed to find shared action #[...] on port [...]
+ Failed to find indirect action #[...] on port [...]
::
Caught error type [...] ([...]): [...]
-Update shared rss action having id 100 on port 0 with rss to queues 0 and 3
+Update indirect rss action having id 100 on port 0 with rss to queues 0 and 3
(in create example above rss queues were 1 and 2)::
- testpmd> flow shared_action 0 update 100 action rss queues 0 3 end / end
+ testpmd> flow indirect_action 0 update 100 action rss queues 0 3 end / end
-Destroying shared actions
-~~~~~~~~~~~~~~~~~~~~~~~~~
-``flow shared_action {port_id} update`` destroys one or more shared actions
-from their shared action IDs (as returned by
-``flow shared_action {port_id} create``). It is bound to
-``rte_flow_shared_action_destroy()``::
+Destroying indirect actions
+~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+``flow indirect_action {port_id} destroy`` destroys one or more indirect actions
+from their indirect action IDs (as returned by
+``flow indirect_action {port_id} create``). It is bound to
+``rte_flow_action_handle_destroy()``::
- flow shared_action {port_id} destroy action_id {shared_action_id} [...]
+ flow indirect_action {port_id} destroy action_id {indirect_action_id} [...]
If successful, it will show::
- Shared action #[...] destroyed
+ Indirect action #[...] destroyed
-It does not report anything for shared action IDs that do not exist.
-The usual error message is shown when a shared action cannot be destroyed::
+It does not report anything for indirect action IDs that do not exist.
+The usual error message is shown when a indirect action cannot be destroyed::
Caught error type [...] ([...]): [...]
-Destroy shared actions having id 100 & 101::
+Destroy indirect actions having id 100 & 101::
- testpmd> flow shared_action 0 destroy action_id 100 action_id 101
+ testpmd> flow indirect_action 0 destroy action_id 100 action_id 101
-Query shared actions
-~~~~~~~~~~~~~~~~~~~~
-``flow shared_action {port_id} query`` queries the shared action from its
-shared action ID (as returned by ``flow shared_action {port_id} create``).
-It is bound to ``rte_flow_shared_action_query()``::
+Query indirect actions
+~~~~~~~~~~~~~~~~~~~~~~
+
+``flow indirect_action {port_id} query`` queries the indirect action from its
+indirect action ID (as returned by ``flow indirect_action {port_id} create``).
+It is bound to ``rte_flow_action_handle_query()``::
- flow shared_action {port_id} query {shared_action_id}
+ flow indirect_action {port_id} query {indirect_action_id}
-Currently only rss shared action supported. If successful, it will show::
+Currently only rss indirect action supported. If successful, it will show::
- Shared RSS action:
+ Indirect RSS action:
refs:[...]
-Otherwise, it will complain either that shared action not found or that some
+Otherwise, it will complain either that indirect action not found or that some
error occurred::
- Failed to find shared action #[...] on port [...]
+ Failed to find indirect action #[...] on port [...]
::
Caught error type [...] ([...]): [...]
-Query shared action having id 100::
+Query indirect action having id 100::
- testpmd> flow shared_action 0 query 100
+ testpmd> flow indirect_action 0 query 100
Sample QinQ flow rules
~~~~~~~~~~~~~~~~~~~~~~
diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c
index fcaba2d9c7..7e13b38ee0 100644
--- a/drivers/net/mlx5/mlx5.c
+++ b/drivers/net/mlx5/mlx5.c
@@ -1421,7 +1421,7 @@ mlx5_dev_close(struct rte_eth_dev *dev)
* then this will return directly without any action.
*/
mlx5_flow_list_flush(dev, &priv->flows, true);
- mlx5_shared_action_flush(dev);
+ mlx5_action_handle_flush(dev);
mlx5_flow_meter_flush(dev, NULL);
/* Prevent crashes when queues are still in use. */
dev->rx_pkt_burst = removed_rx_burst;
diff --git a/drivers/net/mlx5/mlx5_defs.h b/drivers/net/mlx5/mlx5_defs.h
index 8f2807dcd9..6e9c4b9cdd 100644
--- a/drivers/net/mlx5/mlx5_defs.h
+++ b/drivers/net/mlx5/mlx5_defs.h
@@ -192,8 +192,8 @@
#define MLX5_HAIRPIN_QUEUE_STRIDE 6
#define MLX5_HAIRPIN_JUMBO_LOG_SIZE (14 + 2)
-/* Maximum number of shared actions supported by rte_flow */
-#define MLX5_MAX_SHARED_ACTIONS 2
+/* Maximum number of indirect actions supported by rte_flow */
+#define MLX5_MAX_INDIRECT_ACTIONS 2
/*
* Linux definition of static_assert is found in /usr/include/assert.h.
diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c
index d8e0bcbd02..bed8f3190b 100644
--- a/drivers/net/mlx5/mlx5_flow.c
+++ b/drivers/net/mlx5/mlx5_flow.c
@@ -567,23 +567,23 @@ static const struct mlx5_flow_expand_node mlx5_support_expansion[] = {
},
};
-static struct rte_flow_shared_action *
-mlx5_shared_action_create(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action_conf *conf,
+static struct rte_flow_action_handle *
+mlx5_action_handle_create(struct rte_eth_dev *dev,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action,
struct rte_flow_error *error);
-static int mlx5_shared_action_destroy
+static int mlx5_action_handle_destroy
(struct rte_eth_dev *dev,
- struct rte_flow_shared_action *shared_action,
+ struct rte_flow_action_handle *handle,
struct rte_flow_error *error);
-static int mlx5_shared_action_update
+static int mlx5_action_handle_update
(struct rte_eth_dev *dev,
- struct rte_flow_shared_action *shared_action,
- const struct rte_flow_action *action,
+ struct rte_flow_action_handle *handle,
+ const void *update,
struct rte_flow_error *error);
-static int mlx5_shared_action_query
+static int mlx5_action_handle_query
(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action *action,
+ const struct rte_flow_action_handle *handle,
void *data,
struct rte_flow_error *error);
static int
@@ -622,10 +622,10 @@ static const struct rte_flow_ops mlx5_flow_ops = {
.query = mlx5_flow_query,
.dev_dump = mlx5_flow_dev_dump,
.get_aged_flows = mlx5_flow_get_aged_flows,
- .shared_action_create = mlx5_shared_action_create,
- .shared_action_destroy = mlx5_shared_action_destroy,
- .shared_action_update = mlx5_shared_action_update,
- .shared_action_query = mlx5_shared_action_query,
+ .action_handle_create = mlx5_action_handle_create,
+ .action_handle_destroy = mlx5_action_handle_destroy,
+ .action_handle_update = mlx5_action_handle_update,
+ .action_handle_query = mlx5_action_handle_query,
.tunnel_decap_set = mlx5_flow_tunnel_decap_set,
.tunnel_match = mlx5_flow_tunnel_match,
.tunnel_action_decap_release = mlx5_flow_tunnel_action_release,
@@ -3402,31 +3402,31 @@ flow_aso_age_get_by_idx(struct rte_eth_dev *dev, uint32_t age_idx)
return &pool->actions[offset - 1];
}
-/* maps shared action to translated non shared in some actions array */
-struct mlx5_translated_shared_action {
- struct rte_flow_shared_action *action; /**< Shared action */
- int index; /**< Index in related array of rte_flow_action */
+/* maps indirect action to translated direct in some actions array */
+struct mlx5_translated_action_handle {
+ struct rte_flow_action_handle *action; /**< Indirect action handle. */
+ int index; /**< Index in related array of rte_flow_action. */
};
/**
- * Translates actions of type RTE_FLOW_ACTION_TYPE_SHARED to related
- * non shared action if translation possible.
- * This functionality used to run same execution path for both shared & non
- * shared actions on flow create. All necessary preparations for shared
- * action handling should be preformed on *shared* actions list returned
+ * Translates actions of type RTE_FLOW_ACTION_TYPE_INDIRECT to related
+ * direct action if translation possible.
+ * This functionality used to run same execution path for both direct and
+ * indirect actions on flow create. All necessary preparations for indirect
+ * action handling should be performed on *handle* actions list returned
* from this call.
*
* @param[in] dev
* Pointer to Ethernet device.
* @param[in] actions
* List of actions to translate.
- * @param[out] shared
- * List to store translated shared actions.
- * @param[in, out] shared_n
- * Size of *shared* array. On return should be updated with number of shared
- * actions retrieved from the *actions* list.
+ * @param[out] handle
+ * List to store translated indirect action object handles.
+ * @param[in, out] indir_n
+ * Size of *handle* array. On return should be updated with number of
+ * indirect actions retrieved from the *actions* list.
* @param[out] translated_actions
- * List of actions where all shared actions were translated to non shared
+ * List of actions where all indirect actions were translated to direct
* if possible. NULL if no translation took place.
* @param[out] error
* Pointer to the error structure.
@@ -3435,10 +3435,10 @@ struct mlx5_translated_shared_action {
* 0 on success, a negative errno value otherwise and rte_errno is set.
*/
static int
-flow_shared_actions_translate(struct rte_eth_dev *dev,
+flow_action_handles_translate(struct rte_eth_dev *dev,
const struct rte_flow_action actions[],
- struct mlx5_translated_shared_action *shared,
- int *shared_n,
+ struct mlx5_translated_action_handle *handle,
+ int *indir_n,
struct rte_flow_action **translated_actions,
struct rte_flow_error *error)
{
@@ -3447,23 +3447,23 @@ flow_shared_actions_translate(struct rte_eth_dev *dev,
size_t actions_size;
int n;
int copied_n = 0;
- struct mlx5_translated_shared_action *shared_end = NULL;
+ struct mlx5_translated_action_handle *handle_end = NULL;
for (n = 0; actions[n].type != RTE_FLOW_ACTION_TYPE_END; n++) {
- if (actions[n].type != RTE_FLOW_ACTION_TYPE_SHARED)
+ if (actions[n].type != RTE_FLOW_ACTION_TYPE_INDIRECT)
continue;
- if (copied_n == *shared_n) {
+ if (copied_n == *indir_n) {
return rte_flow_error_set
(error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_NUM,
NULL, "too many shared actions");
}
- rte_memcpy(&shared[copied_n].action, &actions[n].conf,
+ rte_memcpy(&handle[copied_n].action, &actions[n].conf,
sizeof(actions[n].conf));
- shared[copied_n].index = n;
+ handle[copied_n].index = n;
copied_n++;
}
n++;
- *shared_n = copied_n;
+ *indir_n = copied_n;
if (!copied_n)
return 0;
actions_size = sizeof(struct rte_flow_action) * n;
@@ -3473,28 +3473,28 @@ flow_shared_actions_translate(struct rte_eth_dev *dev,
return -ENOMEM;
}
memcpy(translated, actions, actions_size);
- for (shared_end = shared + copied_n; shared < shared_end; shared++) {
+ for (handle_end = handle + copied_n; handle < handle_end; handle++) {
struct mlx5_shared_action_rss *shared_rss;
- uint32_t act_idx = (uint32_t)(uintptr_t)shared->action;
- uint32_t type = act_idx >> MLX5_SHARED_ACTION_TYPE_OFFSET;
- uint32_t idx = act_idx & ((1u << MLX5_SHARED_ACTION_TYPE_OFFSET)
- - 1);
+ uint32_t act_idx = (uint32_t)(uintptr_t)handle->action;
+ uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
+ uint32_t idx = act_idx &
+ ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
switch (type) {
- case MLX5_SHARED_ACTION_TYPE_RSS:
+ case MLX5_INDIRECT_ACTION_TYPE_RSS:
shared_rss = mlx5_ipool_get
(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
- translated[shared->index].type =
+ translated[handle->index].type =
RTE_FLOW_ACTION_TYPE_RSS;
- translated[shared->index].conf =
+ translated[handle->index].conf =
&shared_rss->origin;
break;
- case MLX5_SHARED_ACTION_TYPE_AGE:
+ case MLX5_INDIRECT_ACTION_TYPE_AGE:
if (priv->sh->flow_hit_aso_en) {
- translated[shared->index].type =
+ translated[handle->index].type =
(enum rte_flow_action_type)
MLX5_RTE_FLOW_ACTION_TYPE_AGE;
- translated[shared->index].conf =
+ translated[handle->index].conf =
(void *)(uintptr_t)idx;
break;
}
@@ -3503,7 +3503,7 @@ flow_shared_actions_translate(struct rte_eth_dev *dev,
mlx5_free(translated);
return rte_flow_error_set
(error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION,
- NULL, "invalid shared action type");
+ NULL, "invalid indirect action type");
}
}
*translated_actions = translated;
@@ -3525,21 +3525,21 @@ flow_shared_actions_translate(struct rte_eth_dev *dev,
*/
static uint32_t
flow_get_shared_rss_action(struct rte_eth_dev *dev,
- struct mlx5_translated_shared_action *shared,
+ struct mlx5_translated_action_handle *handle,
int shared_n)
{
- struct mlx5_translated_shared_action *shared_end;
+ struct mlx5_translated_action_handle *handle_end;
struct mlx5_priv *priv = dev->data->dev_private;
struct mlx5_shared_action_rss *shared_rss;
- for (shared_end = shared + shared_n; shared < shared_end; shared++) {
- uint32_t act_idx = (uint32_t)(uintptr_t)shared->action;
- uint32_t type = act_idx >> MLX5_SHARED_ACTION_TYPE_OFFSET;
+ for (handle_end = handle + shared_n; handle < handle_end; handle++) {
+ uint32_t act_idx = (uint32_t)(uintptr_t)handle->action;
+ uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
uint32_t idx = act_idx &
- ((1u << MLX5_SHARED_ACTION_TYPE_OFFSET) - 1);
+ ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
switch (type) {
- case MLX5_SHARED_ACTION_TYPE_RSS:
+ case MLX5_INDIRECT_ACTION_TYPE_RSS:
shared_rss = mlx5_ipool_get
(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
idx);
@@ -5664,9 +5664,9 @@ flow_list_create(struct rte_eth_dev *dev, uint32_t *list,
struct rte_flow *flow = NULL;
struct mlx5_flow *dev_flow;
const struct rte_flow_action_rss *rss = NULL;
- struct mlx5_translated_shared_action
- shared_actions[MLX5_MAX_SHARED_ACTIONS];
- int shared_actions_n = MLX5_MAX_SHARED_ACTIONS;
+ struct mlx5_translated_action_handle
+ indir_actions[MLX5_MAX_INDIRECT_ACTIONS];
+ int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS;
union {
struct mlx5_flow_expand_rss buf;
uint8_t buffer[2048];
@@ -5707,9 +5707,9 @@ flow_list_create(struct rte_eth_dev *dev, uint32_t *list,
MLX5_ASSERT(wks);
rss_desc = &wks->rss_desc;
- ret = flow_shared_actions_translate(dev, original_actions,
- shared_actions,
- &shared_actions_n,
+ ret = flow_action_handles_translate(dev, original_actions,
+ indir_actions,
+ &indir_actions_n,
&translated_actions, error);
if (ret < 0) {
MLX5_ASSERT(translated_actions == NULL);
@@ -5770,8 +5770,8 @@ flow_list_create(struct rte_eth_dev *dev, uint32_t *list,
buf->entries = 1;
buf->entry[0].pattern = (void *)(uintptr_t)items;
}
- rss_desc->shared_rss = flow_get_shared_rss_action(dev, shared_actions,
- shared_actions_n);
+ rss_desc->shared_rss = flow_get_shared_rss_action(dev, indir_actions,
+ indir_actions_n);
for (i = 0; i < buf->entries; ++i) {
/* Initialize flow split data. */
flow_split_info.prefix_layers = 0;
@@ -5950,14 +5950,14 @@ mlx5_flow_validate(struct rte_eth_dev *dev,
struct rte_flow_error *error)
{
int hairpin_flow;
- struct mlx5_translated_shared_action
- shared_actions[MLX5_MAX_SHARED_ACTIONS];
- int shared_actions_n = MLX5_MAX_SHARED_ACTIONS;
+ struct mlx5_translated_action_handle
+ indir_actions[MLX5_MAX_INDIRECT_ACTIONS];
+ int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS;
const struct rte_flow_action *actions;
struct rte_flow_action *translated_actions = NULL;
- int ret = flow_shared_actions_translate(dev, original_actions,
- shared_actions,
- &shared_actions_n,
+ int ret = flow_action_handles_translate(dev, original_actions,
+ indir_actions,
+ &indir_actions_n,
&translated_actions, error);
if (ret)
@@ -7391,12 +7391,12 @@ mlx5_flow_get_aged_flows(struct rte_eth_dev *dev, void **contexts,
/* Wrapper for driver action_validate op callback */
static int
flow_drv_action_validate(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action_conf *conf,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action,
const struct mlx5_flow_driver_ops *fops,
struct rte_flow_error *error)
{
- static const char err_msg[] = "shared action validation unsupported";
+ static const char err_msg[] = "indirect action validation unsupported";
if (!fops->action_validate) {
DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
@@ -7412,8 +7412,8 @@ flow_drv_action_validate(struct rte_eth_dev *dev,
*
* @param dev
* Pointer to Ethernet device structure.
- * @param[in] action
- * Handle for the shared action to be destroyed.
+ * @param[in] handle
+ * Handle for the indirect action object to be destroyed.
* @param[out] error
* Perform verbose error reporting if not NULL. PMDs initialize this
* structure in case of error only.
@@ -7424,11 +7424,11 @@ flow_drv_action_validate(struct rte_eth_dev *dev,
* @note: wrapper for driver action_create op callback.
*/
static int
-mlx5_shared_action_destroy(struct rte_eth_dev *dev,
- struct rte_flow_shared_action *action,
+mlx5_action_handle_destroy(struct rte_eth_dev *dev,
+ struct rte_flow_action_handle *handle,
struct rte_flow_error *error)
{
- static const char err_msg[] = "shared action destruction unsupported";
+ static const char err_msg[] = "indirect action destruction unsupported";
struct rte_flow_attr attr = { .transfer = 0 };
const struct mlx5_flow_driver_ops *fops =
flow_get_drv_ops(flow_get_drv_type(dev, &attr));
@@ -7439,18 +7439,18 @@ mlx5_shared_action_destroy(struct rte_eth_dev *dev,
NULL, err_msg);
return -rte_errno;
}
- return fops->action_destroy(dev, action, error);
+ return fops->action_destroy(dev, handle, error);
}
/* Wrapper for driver action_destroy op callback */
static int
flow_drv_action_update(struct rte_eth_dev *dev,
- struct rte_flow_shared_action *action,
- const void *action_conf,
+ struct rte_flow_action_handle *handle,
+ const void *update,
const struct mlx5_flow_driver_ops *fops,
struct rte_flow_error *error)
{
- static const char err_msg[] = "shared action update unsupported";
+ static const char err_msg[] = "indirect action update unsupported";
if (!fops->action_update) {
DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
@@ -7458,18 +7458,18 @@ flow_drv_action_update(struct rte_eth_dev *dev,
NULL, err_msg);
return -rte_errno;
}
- return fops->action_update(dev, action, action_conf, error);
+ return fops->action_update(dev, handle, update, error);
}
/* Wrapper for driver action_destroy op callback */
static int
flow_drv_action_query(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action *action,
+ const struct rte_flow_action_handle *handle,
void *data,
const struct mlx5_flow_driver_ops *fops,
struct rte_flow_error *error)
{
- static const char err_msg[] = "shared action query unsupported";
+ static const char err_msg[] = "indirect action query unsupported";
if (!fops->action_query) {
DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
@@ -7477,29 +7477,31 @@ flow_drv_action_query(struct rte_eth_dev *dev,
NULL, err_msg);
return -rte_errno;
}
- return fops->action_query(dev, action, data, error);
+ return fops->action_query(dev, handle, data, error);
}
/**
- * Create shared action for reuse in multiple flow rules.
+ * Create indirect action for reuse in multiple flow rules.
*
* @param dev
* Pointer to Ethernet device structure.
+ * @param conf
+ * Pointer to indirect action object configuration.
* @param[in] action
- * Action configuration for shared action creation.
+ * Action configuration for indirect action object creation.
* @param[out] error
* Perform verbose error reporting if not NULL. PMDs initialize this
* structure in case of error only.
* @return
* A valid handle in case of success, NULL otherwise and rte_errno is set.
*/
-static struct rte_flow_shared_action *
-mlx5_shared_action_create(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action_conf *conf,
+static struct rte_flow_action_handle *
+mlx5_action_handle_create(struct rte_eth_dev *dev,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action,
struct rte_flow_error *error)
{
- static const char err_msg[] = "shared action creation unsupported";
+ static const char err_msg[] = "indirect action creation unsupported";
struct rte_flow_attr attr = { .transfer = 0 };
const struct mlx5_flow_driver_ops *fops =
flow_get_drv_ops(flow_get_drv_type(dev, &attr));
@@ -7516,19 +7518,20 @@ mlx5_shared_action_create(struct rte_eth_dev *dev,
}
/**
- * Updates inplace the shared action configuration pointed by *action* handle
- * with the configuration provided as *action* argument.
- * The update of the shared action configuration effects all flow rules reusing
- * the action via handle.
+ * Updates inplace the indirect action configuration pointed by *handle*
+ * with the configuration provided as *update* argument.
+ * The update of the indirect action configuration effects all flow rules
+ * reusing the action via handle.
*
* @param dev
* Pointer to Ethernet device structure.
- * @param[in] shared_action
- * Handle for the shared action to be updated.
- * @param[in] action
+ * @param[in] handle
+ * Handle for the indirect action to be updated.
+ * @param[in] update
* Action specification used to modify the action pointed by handle.
- * *action* should be of same type with the action pointed by the *action*
- * handle argument, otherwise considered as invalid.
+ * *update* could be of same type with the action pointed by the *handle*
+ * handle argument, or some other structures like a wrapper, depending on
+ * the indirect action type.
* @param[out] error
* Perform verbose error reporting if not NULL. PMDs initialize this
* structure in case of error only.
@@ -7537,9 +7540,9 @@ mlx5_shared_action_create(struct rte_eth_dev *dev,
* 0 on success, a negative errno value otherwise and rte_errno is set.
*/
static int
-mlx5_shared_action_update(struct rte_eth_dev *dev,
- struct rte_flow_shared_action *shared_action,
- const struct rte_flow_action *action,
+mlx5_action_handle_update(struct rte_eth_dev *dev,
+ struct rte_flow_action_handle *handle,
+ const void *update,
struct rte_flow_error *error)
{
struct rte_flow_attr attr = { .transfer = 0 };
@@ -7547,26 +7550,27 @@ mlx5_shared_action_update(struct rte_eth_dev *dev,
flow_get_drv_ops(flow_get_drv_type(dev, &attr));
int ret;
- ret = flow_drv_action_validate(dev, NULL, action, fops, error);
+ ret = flow_drv_action_validate(dev, NULL,
+ (const struct rte_flow_action *)update, fops, error);
if (ret)
return ret;
- return flow_drv_action_update(dev, shared_action, action->conf, fops,
+ return flow_drv_action_update(dev, handle, update, fops,
error);
}
/**
- * Query the shared action by handle.
+ * Query the indirect action by handle.
*
* This function allows retrieving action-specific data such as counters.
* Data is gathered by special action which may be present/referenced in
* more than one flow rule definition.
*
- * \see RTE_FLOW_ACTION_TYPE_COUNT
+ * see @RTE_FLOW_ACTION_TYPE_COUNT
*
* @param dev
* Pointer to Ethernet device structure.
- * @param[in] action
- * Handle for the shared action to query.
+ * @param[in] handle
+ * Handle for the indirect action to query.
* @param[in, out] data
* Pointer to storage for the associated query data type.
* @param[out] error
@@ -7577,8 +7581,8 @@ mlx5_shared_action_update(struct rte_eth_dev *dev,
* 0 on success, a negative errno value otherwise and rte_errno is set.
*/
static int
-mlx5_shared_action_query(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action *action,
+mlx5_action_handle_query(struct rte_eth_dev *dev,
+ const struct rte_flow_action_handle *handle,
void *data,
struct rte_flow_error *error)
{
@@ -7586,11 +7590,11 @@ mlx5_shared_action_query(struct rte_eth_dev *dev,
const struct mlx5_flow_driver_ops *fops =
flow_get_drv_ops(flow_get_drv_type(dev, &attr));
- return flow_drv_action_query(dev, action, data, fops, error);
+ return flow_drv_action_query(dev, handle, data, fops, error);
}
/**
- * Destroy all shared actions.
+ * Destroy all indirect actions (shared RSS).
*
* @param dev
* Pointer to Ethernet device.
@@ -7599,7 +7603,7 @@ mlx5_shared_action_query(struct rte_eth_dev *dev,
* 0 on success, a negative errno value otherwise and rte_errno is set.
*/
int
-mlx5_shared_action_flush(struct rte_eth_dev *dev)
+mlx5_action_handle_flush(struct rte_eth_dev *dev)
{
struct rte_flow_error error;
struct mlx5_priv *priv = dev->data->dev_private;
@@ -7609,8 +7613,8 @@ mlx5_shared_action_flush(struct rte_eth_dev *dev)
ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
priv->rss_shared_actions, idx, shared_rss, next) {
- ret |= mlx5_shared_action_destroy(dev,
- (struct rte_flow_shared_action *)(uintptr_t)idx, &error);
+ ret |= mlx5_action_handle_destroy(dev,
+ (struct rte_flow_action_handle *)(uintptr_t)idx, &error);
}
return ret;
}
diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h
index a5b08024e7..1a74b17aa3 100644
--- a/drivers/net/mlx5/mlx5_flow.h
+++ b/drivers/net/mlx5/mlx5_flow.h
@@ -38,11 +38,11 @@ enum mlx5_rte_flow_action_type {
MLX5_RTE_FLOW_ACTION_TYPE_AGE,
};
-#define MLX5_SHARED_ACTION_TYPE_OFFSET 30
+#define MLX5_INDIRECT_ACTION_TYPE_OFFSET 30
enum {
- MLX5_SHARED_ACTION_TYPE_RSS,
- MLX5_SHARED_ACTION_TYPE_AGE,
+ MLX5_INDIRECT_ACTION_TYPE_RSS,
+ MLX5_INDIRECT_ACTION_TYPE_AGE,
};
/* Matches on selected register. */
@@ -1037,7 +1037,7 @@ struct mlx5_shared_action_rss {
rte_spinlock_t action_rss_sl; /**< Shared RSS action spinlock. */
};
-struct rte_flow_shared_action {
+struct rte_flow_action_handle {
uint32_t id;
};
@@ -1123,26 +1123,26 @@ typedef int (*mlx5_flow_get_aged_flows_t)
struct rte_flow_error *error);
typedef int (*mlx5_flow_action_validate_t)
(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action_conf *conf,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action,
struct rte_flow_error *error);
-typedef struct rte_flow_shared_action *(*mlx5_flow_action_create_t)
+typedef struct rte_flow_action_handle *(*mlx5_flow_action_create_t)
(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action_conf *conf,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action,
struct rte_flow_error *error);
typedef int (*mlx5_flow_action_destroy_t)
(struct rte_eth_dev *dev,
- struct rte_flow_shared_action *action,
+ struct rte_flow_action_handle *action,
struct rte_flow_error *error);
typedef int (*mlx5_flow_action_update_t)
(struct rte_eth_dev *dev,
- struct rte_flow_shared_action *action,
- const void *action_conf,
+ struct rte_flow_action_handle *action,
+ const void *update,
struct rte_flow_error *error);
typedef int (*mlx5_flow_action_query_t)
(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action *action,
+ const struct rte_flow_action_handle *action,
void *data,
struct rte_flow_error *error);
typedef int (*mlx5_flow_sync_domain_t)
@@ -1400,7 +1400,7 @@ int mlx5_flow_destroy_policer_rules(struct rte_eth_dev *dev,
int mlx5_flow_meter_flush(struct rte_eth_dev *dev,
struct rte_mtr_error *error);
int mlx5_flow_dv_discover_counter_offset_support(struct rte_eth_dev *dev);
-int mlx5_shared_action_flush(struct rte_eth_dev *dev);
+int mlx5_action_handle_flush(struct rte_eth_dev *dev);
void mlx5_release_tunnel_hub(struct mlx5_dev_ctx_shared *sh, uint16_t port_id);
int mlx5_alloc_tunnel_hub(struct mlx5_dev_ctx_shared *sh);
diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index b443eb95f7..ffd9f638c7 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -13059,7 +13059,7 @@ __flow_dv_action_rss_setup(struct rte_eth_dev *dev,
*/
static uint32_t
__flow_dv_action_rss_create(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action_conf *conf,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action_rss *rss,
struct rte_flow_error *error)
{
@@ -13082,7 +13082,7 @@ __flow_dv_action_rss_create(struct rte_eth_dev *dev,
"cannot allocate resource memory");
goto error_rss_init;
}
- if (idx > (1u << MLX5_SHARED_ACTION_TYPE_OFFSET)) {
+ if (idx > (1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET)) {
rte_flow_error_set(error, E2BIG,
RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
"rss action number out of range");
@@ -13195,7 +13195,7 @@ __flow_dv_action_rss_release(struct rte_eth_dev *dev, uint32_t idx,
}
/**
- * Create shared action, lock free,
+ * Create indirect action, lock free,
* (mutex should be acquired by caller).
* Dispatcher for action type specific call.
*
@@ -13204,7 +13204,7 @@ __flow_dv_action_rss_release(struct rte_eth_dev *dev, uint32_t idx,
* @param[in] conf
* Shared action configuration.
* @param[in] action
- * Action specification used to create shared action.
+ * Action specification used to create indirect action.
* @param[out] error
* Perform verbose error reporting if not NULL. Initialized in case of
* error only.
@@ -13213,9 +13213,9 @@ __flow_dv_action_rss_release(struct rte_eth_dev *dev, uint32_t idx,
* A valid shared action handle in case of success, NULL otherwise and
* rte_errno is set.
*/
-static struct rte_flow_shared_action *
+static struct rte_flow_action_handle *
flow_dv_action_create(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action_conf *conf,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action,
struct rte_flow_error *err)
{
@@ -13225,13 +13225,13 @@ flow_dv_action_create(struct rte_eth_dev *dev,
switch (action->type) {
case RTE_FLOW_ACTION_TYPE_RSS:
ret = __flow_dv_action_rss_create(dev, conf, action->conf, err);
- idx = (MLX5_SHARED_ACTION_TYPE_RSS <<
- MLX5_SHARED_ACTION_TYPE_OFFSET) | ret;
+ idx = (MLX5_INDIRECT_ACTION_TYPE_RSS <<
+ MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
break;
case RTE_FLOW_ACTION_TYPE_AGE:
ret = flow_dv_translate_create_aso_age(dev, action->conf, err);
- idx = (MLX5_SHARED_ACTION_TYPE_AGE <<
- MLX5_SHARED_ACTION_TYPE_OFFSET) | ret;
+ idx = (MLX5_INDIRECT_ACTION_TYPE_AGE <<
+ MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
if (ret) {
struct mlx5_aso_age_action *aso_age =
flow_aso_age_get_by_idx(dev, ret);
@@ -13246,19 +13246,19 @@ flow_dv_action_create(struct rte_eth_dev *dev,
NULL, "action type not supported");
break;
}
- return ret ? (struct rte_flow_shared_action *)(uintptr_t)idx : NULL;
+ return ret ? (struct rte_flow_action_handle *)(uintptr_t)idx : NULL;
}
/**
- * Destroy the shared action.
+ * Destroy the indirect action.
* Release action related resources on the NIC and the memory.
* Lock free, (mutex should be acquired by caller).
* Dispatcher for action type specific call.
*
* @param[in] dev
* Pointer to the Ethernet device structure.
- * @param[in] action
- * The shared action object to be removed.
+ * @param[in] handle
+ * The indirect action object handle to be removed.
* @param[out] error
* Perform verbose error reporting if not NULL. Initialized in case of
* error only.
@@ -13268,25 +13268,25 @@ flow_dv_action_create(struct rte_eth_dev *dev,
*/
static int
flow_dv_action_destroy(struct rte_eth_dev *dev,
- struct rte_flow_shared_action *action,
+ struct rte_flow_action_handle *handle,
struct rte_flow_error *error)
{
- uint32_t act_idx = (uint32_t)(uintptr_t)action;
- uint32_t type = act_idx >> MLX5_SHARED_ACTION_TYPE_OFFSET;
- uint32_t idx = act_idx & ((1u << MLX5_SHARED_ACTION_TYPE_OFFSET) - 1);
+ uint32_t act_idx = (uint32_t)(uintptr_t)handle;
+ uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
+ uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
int ret;
switch (type) {
- case MLX5_SHARED_ACTION_TYPE_RSS:
+ case MLX5_INDIRECT_ACTION_TYPE_RSS:
return __flow_dv_action_rss_release(dev, idx, error);
- case MLX5_SHARED_ACTION_TYPE_AGE:
+ case MLX5_INDIRECT_ACTION_TYPE_AGE:
ret = flow_dv_aso_age_release(dev, idx);
if (ret)
/*
* In this case, the last flow has a reference will
* actually release the age action.
*/
- DRV_LOG(DEBUG, "Shared age action %" PRIu32 " was"
+ DRV_LOG(DEBUG, "Indirect age action %" PRIu32 " was"
" released with references %d.", idx, ret);
return 0;
default:
@@ -13369,12 +13369,13 @@ __flow_dv_action_rss_update(struct rte_eth_dev *dev, uint32_t idx,
*
* @param[in] dev
* Pointer to the Ethernet device structure.
- * @param[in] action
- * The shared action object to be updated.
- * @param[in] action_conf
- * Action specification used to modify *action*.
- * *action_conf* should be of type correlating with type of the *action*,
- * otherwise considered as invalid.
+ * @param[in] handle
+ * The indirect action object handle to be updated.
+ * @param[in] update
+ * Action specification used to modify the action pointed by *handle*.
+ * *update* could be of same type with the action pointed by the *handle*
+ * handle argument, or some other structures like a wrapper, depending on
+ * the indirect action type.
* @param[out] error
* Perform verbose error reporting if not NULL. Initialized in case of
* error only.
@@ -13384,16 +13385,18 @@ __flow_dv_action_rss_update(struct rte_eth_dev *dev, uint32_t idx,
*/
static int
flow_dv_action_update(struct rte_eth_dev *dev,
- struct rte_flow_shared_action *action,
- const void *action_conf,
+ struct rte_flow_action_handle *handle,
+ const void *update,
struct rte_flow_error *err)
{
- uint32_t act_idx = (uint32_t)(uintptr_t)action;
- uint32_t type = act_idx >> MLX5_SHARED_ACTION_TYPE_OFFSET;
- uint32_t idx = act_idx & ((1u << MLX5_SHARED_ACTION_TYPE_OFFSET) - 1);
+ uint32_t act_idx = (uint32_t)(uintptr_t)handle;
+ uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
+ uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
+ const void *action_conf;
switch (type) {
- case MLX5_SHARED_ACTION_TYPE_RSS:
+ case MLX5_INDIRECT_ACTION_TYPE_RSS:
+ action_conf = ((const struct rte_flow_action *)update)->conf;
return __flow_dv_action_rss_update(dev, idx, action_conf, err);
default:
return rte_flow_error_set(err, ENOTSUP,
@@ -13405,17 +13408,17 @@ flow_dv_action_update(struct rte_eth_dev *dev,
static int
flow_dv_action_query(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action *action, void *data,
+ const struct rte_flow_action_handle *handle, void *data,
struct rte_flow_error *error)
{
struct mlx5_age_param *age_param;
struct rte_flow_query_age *resp;
- uint32_t act_idx = (uint32_t)(uintptr_t)action;
- uint32_t type = act_idx >> MLX5_SHARED_ACTION_TYPE_OFFSET;
- uint32_t idx = act_idx & ((1u << MLX5_SHARED_ACTION_TYPE_OFFSET) - 1);
+ uint32_t act_idx = (uint32_t)(uintptr_t)handle;
+ uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
+ uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
switch (type) {
- case MLX5_SHARED_ACTION_TYPE_AGE:
+ case MLX5_INDIRECT_ACTION_TYPE_AGE:
age_param = &flow_aso_age_get_by_idx(dev, idx)->age_params;
resp = data;
resp->aged = __atomic_load_n(&age_param->state,
@@ -14347,7 +14350,7 @@ flow_dv_counter_allocate(struct rte_eth_dev *dev)
}
/**
- * Validate shared action.
+ * Validate indirect action.
* Dispatcher for action type specific validation.
*
* @param[in] dev
@@ -14355,7 +14358,7 @@ flow_dv_counter_allocate(struct rte_eth_dev *dev)
* @param[in] conf
* Shared action configuration.
* @param[in] action
- * The shared action object to validate.
+ * The indirect action object to validate.
* @param[out] error
* Perform verbose error reporting if not NULL. Initialized in case of
* error only.
@@ -14365,7 +14368,7 @@ flow_dv_counter_allocate(struct rte_eth_dev *dev)
*/
static int
flow_dv_action_validate(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action_conf *conf,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action,
struct rte_flow_error *err)
{
diff --git a/lib/librte_ethdev/rte_flow.c b/lib/librte_ethdev/rte_flow.c
index 7241f00353..0d2610b7c4 100644
--- a/lib/librte_ethdev/rte_flow.c
+++ b/lib/librte_ethdev/rte_flow.c
@@ -180,12 +180,12 @@ static const struct rte_flow_desc_data rte_flow_desc_action[] = {
MK_FLOW_ACTION(MODIFY_FIELD,
sizeof(struct rte_flow_action_modify_field)),
/**
- * Shared action represented as handle of type
- * (struct rte_flow_shared action *) stored in conf field (see
+ * Indirect action represented as handle of type
+ * (struct rte_flow_action_handle *) stored in conf field (see
* struct rte_flow_action); no need for additional structure to * store
- * shared action handle.
+ * indirect action handle.
*/
- MK_FLOW_ACTION(SHARED, 0),
+ MK_FLOW_ACTION(INDIRECT, 0),
};
int
@@ -1068,53 +1068,53 @@ rte_flow_get_aged_flows(uint16_t port_id, void **contexts,
NULL, rte_strerror(ENOTSUP));
}
-struct rte_flow_shared_action *
-rte_flow_shared_action_create(uint16_t port_id,
- const struct rte_flow_shared_action_conf *conf,
+struct rte_flow_action_handle *
+rte_flow_action_handle_create(uint16_t port_id,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action,
struct rte_flow_error *error)
{
- struct rte_flow_shared_action *shared_action;
+ struct rte_flow_action_handle *handle;
const struct rte_flow_ops *ops = rte_flow_ops_get(port_id, error);
if (unlikely(!ops))
return NULL;
- if (unlikely(!ops->shared_action_create)) {
+ if (unlikely(!ops->action_handle_create)) {
rte_flow_error_set(error, ENOSYS,
RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
rte_strerror(ENOSYS));
return NULL;
}
- shared_action = ops->shared_action_create(&rte_eth_devices[port_id],
- conf, action, error);
- if (shared_action == NULL)
+ handle = ops->action_handle_create(&rte_eth_devices[port_id],
+ conf, action, error);
+ if (handle == NULL)
flow_err(port_id, -rte_errno, error);
- return shared_action;
+ return handle;
}
int
-rte_flow_shared_action_destroy(uint16_t port_id,
- struct rte_flow_shared_action *action,
- struct rte_flow_error *error)
+rte_flow_action_handle_destroy(uint16_t port_id,
+ struct rte_flow_action_handle *handle,
+ struct rte_flow_error *error)
{
int ret;
const struct rte_flow_ops *ops = rte_flow_ops_get(port_id, error);
if (unlikely(!ops))
return -rte_errno;
- if (unlikely(!ops->shared_action_destroy))
+ if (unlikely(!ops->action_handle_destroy))
return rte_flow_error_set(error, ENOSYS,
RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
NULL, rte_strerror(ENOSYS));
- ret = ops->shared_action_destroy(&rte_eth_devices[port_id], action,
- error);
+ ret = ops->action_handle_destroy(&rte_eth_devices[port_id],
+ handle, error);
return flow_err(port_id, ret, error);
}
int
-rte_flow_shared_action_update(uint16_t port_id,
- struct rte_flow_shared_action *action,
- const struct rte_flow_action *update,
+rte_flow_action_handle_update(uint16_t port_id,
+ struct rte_flow_action_handle *handle,
+ const void *update,
struct rte_flow_error *error)
{
int ret;
@@ -1122,18 +1122,18 @@ rte_flow_shared_action_update(uint16_t port_id,
if (unlikely(!ops))
return -rte_errno;
- if (unlikely(!ops->shared_action_update))
+ if (unlikely(!ops->action_handle_update))
return rte_flow_error_set(error, ENOSYS,
RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
NULL, rte_strerror(ENOSYS));
- ret = ops->shared_action_update(&rte_eth_devices[port_id], action,
+ ret = ops->action_handle_update(&rte_eth_devices[port_id], handle,
update, error);
return flow_err(port_id, ret, error);
}
int
-rte_flow_shared_action_query(uint16_t port_id,
- const struct rte_flow_shared_action *action,
+rte_flow_action_handle_query(uint16_t port_id,
+ const struct rte_flow_action_handle *handle,
void *data,
struct rte_flow_error *error)
{
@@ -1142,11 +1142,11 @@ rte_flow_shared_action_query(uint16_t port_id,
if (unlikely(!ops))
return -rte_errno;
- if (unlikely(!ops->shared_action_query))
+ if (unlikely(!ops->action_handle_query))
return rte_flow_error_set(error, ENOSYS,
RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
NULL, rte_strerror(ENOSYS));
- ret = ops->shared_action_query(&rte_eth_devices[port_id], action,
+ ret = ops->action_handle_query(&rte_eth_devices[port_id], handle,
data, error);
return flow_err(port_id, ret, error);
}
diff --git a/lib/librte_ethdev/rte_flow.h b/lib/librte_ethdev/rte_flow.h
index 203c4cde9a..0447d36002 100644
--- a/lib/librte_ethdev/rte_flow.h
+++ b/lib/librte_ethdev/rte_flow.h
@@ -1821,7 +1821,7 @@ enum rte_flow_action_type {
* Enables counters for this flow rule.
*
* These counters can be retrieved and reset through rte_flow_query() or
- * rte_flow_shared_action_query() if the action provided via handle,
+ * rte_flow_action_handle_query() if the action provided via handle,
* see struct rte_flow_query_count.
*
* See struct rte_flow_action_count.
@@ -2250,6 +2250,9 @@ enum rte_flow_action_type {
RTE_FLOW_ACTION_TYPE_SAMPLE,
/**
+ * @deprecated
+ * @see RTE_FLOW_ACTION_TYPE_INDIRECT
+ *
* Describe action shared across multiple flow rules.
*
* Allow multiple rules reference the same action by handle (see
@@ -2267,6 +2270,14 @@ enum rte_flow_action_type {
* See struct rte_flow_action_modify_field.
*/
RTE_FLOW_ACTION_TYPE_MODIFY_FIELD,
+
+ /**
+ * An action handle is referenced in a rule through an indirect action.
+ *
+ * The same action handle may be used in multiple rules for the same
+ * or different ethdev ports.
+ */
+ RTE_FLOW_ACTION_TYPE_INDIRECT,
};
/**
@@ -2357,7 +2368,7 @@ struct rte_flow_query_age {
* ``struct rte_flow_query_count``.
*
* @deprecated Shared attribute is deprecated, use generic
- * RTE_FLOW_ACTION_TYPE_SHARED action.
+ * RTE_FLOW_ACTION_TYPE_INDIRECT action.
*
* The shared flag indicates whether the counter is unique to the flow rule the
* action is specified with, or whether it is a shared counter.
@@ -2847,17 +2858,23 @@ struct rte_flow_action_set_dscp {
};
/**
- * RTE_FLOW_ACTION_TYPE_SHARED
+ * @warning
+ * @b EXPERIMENTAL: this structure may change without prior notice
+ *
+ * RTE_FLOW_ACTION_TYPE_INDIRECT
*
- * Opaque type returned after successfully creating a shared action.
+ * Opaque type returned after successfully creating an indirect action object.
+ * The definition of the object handle is different per driver or
+ * per direct action type.
*
- * This handle can be used to manage and query the related action:
- * - share it across multiple flow rules
- * - update action configuration
- * - query action data
- * - destroy action
+ * This handle can be used to manage and query the related direct action:
+ * - referenced in single flow rule or across multiple flow rules
+ * over multiple ports
+ * - update action object configuration
+ * - query action object data
+ * - destroy action object
*/
-struct rte_flow_shared_action;
+struct rte_flow_action_handle;
/**
* Field IDs for MODIFY_FIELD action.
@@ -3631,25 +3648,22 @@ rte_flow_get_aged_flows(uint16_t port_id, void **contexts,
uint32_t nb_contexts, struct rte_flow_error *error);
/**
- * Specify shared action configuration
+ * Specify indirect action object configuration
*/
-struct rte_flow_shared_action_conf {
+struct rte_flow_indir_action_conf {
/**
- * Flow direction for shared action configuration.
+ * Flow direction for the indirect action configuration.
*
- * Shared action should be valid at least for one flow direction,
+ * Action should be valid at least for one flow direction,
* otherwise it is invalid for both ingress and egress rules.
*/
uint32_t ingress:1;
/**< Action valid for rules applied to ingress traffic. */
uint32_t egress:1;
/**< Action valid for rules applied to egress traffic. */
-
/**
* When set to 1, indicates that the action is valid for
* transfer traffic; otherwise, for non-transfer traffic.
- *
- * See struct rte_flow_attr.
*/
uint32_t transfer:1;
};
@@ -3658,16 +3672,17 @@ struct rte_flow_shared_action_conf {
* @warning
* @b EXPERIMENTAL: this API may change without prior notice.
*
- * Create shared action for reuse in multiple flow rules.
- * The created shared action has single state and configuration
- * across all flow rules using it.
+ * Create an indirect action object that can be used in flow rules
+ * via its handle.
+ * The created object handle has single state and configuration
+ * across all the flow rules using it.
*
* @param[in] port_id
* The port identifier of the Ethernet device.
* @param[in] conf
- * Shared action configuration.
+ * Action configuration for the indirect action object creation.
* @param[in] action
- * Action configuration for shared action creation.
+ * Specific configuration of the indirect action object.
* @param[out] error
* Perform verbose error reporting if not NULL. PMDs initialize this
* structure in case of error only.
@@ -3681,9 +3696,9 @@ struct rte_flow_shared_action_conf {
* - (ENOTSUP) if *action* valid but unsupported.
*/
__rte_experimental
-struct rte_flow_shared_action *
-rte_flow_shared_action_create(uint16_t port_id,
- const struct rte_flow_shared_action_conf *conf,
+struct rte_flow_action_handle *
+rte_flow_action_handle_create(uint16_t port_id,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action,
struct rte_flow_error *error);
@@ -3691,12 +3706,12 @@ rte_flow_shared_action_create(uint16_t port_id,
* @warning
* @b EXPERIMENTAL: this API may change without prior notice.
*
- * Destroy the shared action by handle.
+ * Destroy indirect action by handle.
*
* @param[in] port_id
* The port identifier of the Ethernet device.
- * @param[in] action
- * Handle for the shared action to be destroyed.
+ * @param[in] handle
+ * Handle for the indirect action object to be destroyed.
* @param[out] error
* Perform verbose error reporting if not NULL. PMDs initialize this
* structure in case of error only.
@@ -3711,27 +3726,30 @@ rte_flow_shared_action_create(uint16_t port_id,
*/
__rte_experimental
int
-rte_flow_shared_action_destroy(uint16_t port_id,
- struct rte_flow_shared_action *action,
+rte_flow_action_handle_destroy(uint16_t port_id,
+ struct rte_flow_action_handle *handle,
struct rte_flow_error *error);
/**
* @warning
* @b EXPERIMENTAL: this API may change without prior notice.
*
- * Update in-place the shared action configuration pointed by *action* handle
- * with the configuration provided as *update* argument.
- * The update of the shared action configuration effects all flow rules reusing
- * the action via handle.
+ * Update in-place the action configuration and / or state pointed
+ * by action *handle* with the configuration provided as *update* argument.
+ * The update of the action configuration effects all flow rules reusing
+ * the action via *handle*.
+ * The update general pointer provides the ability of partial updating.
*
* @param[in] port_id
* The port identifier of the Ethernet device.
- * @param[in] action
- * Handle for the shared action to be updated.
+ * @param[in] handle
+ * Handle for the indirect action object to be updated.
* @param[in] update
- * Action specification used to modify the action pointed by handle.
- * *update* should be of same type with the action pointed by the *action*
- * handle argument, otherwise considered as invalid.
+ * Update profile specification used to modify the action pointed by handle.
+ * *update* could be with the same type of the immediate action corresponding
+ * to the *handle* argument when creating, or a wrapper structure includes
+ * action configuration to be updated and bit fields to indicate the member
+ * of fields inside the action to update.
* @param[out] error
* Perform verbose error reporting if not NULL. PMDs initialize this
* structure in case of error only.
@@ -3742,32 +3760,32 @@ rte_flow_shared_action_destroy(uint16_t port_id,
* - (-EIO) if underlying device is removed.
* - (-EINVAL) if *update* invalid.
* - (-ENOTSUP) if *update* valid but unsupported.
- * - (-ENOENT) if action pointed by *ctx* was not found.
+ * - (-ENOENT) if indirect action object pointed by *handle* was not found.
* rte_errno is also set.
*/
__rte_experimental
int
-rte_flow_shared_action_update(uint16_t port_id,
- struct rte_flow_shared_action *action,
- const struct rte_flow_action *update,
+rte_flow_action_handle_update(uint16_t port_id,
+ struct rte_flow_action_handle *handle,
+ const void *update,
struct rte_flow_error *error);
/**
* @warning
* @b EXPERIMENTAL: this API may change without prior notice.
*
- * Query the shared action by handle.
+ * Query the direct action by corresponding indirect action object handle.
*
* Retrieve action-specific data such as counters.
* Data is gathered by special action which may be present/referenced in
* more than one flow rule definition.
*
- * \see RTE_FLOW_ACTION_TYPE_COUNT
+ * @see RTE_FLOW_ACTION_TYPE_COUNT
*
* @param port_id
* Port identifier of Ethernet device.
- * @param[in] action
- * Handle for the shared action to query.
+ * @param[in] handle
+ * Handle for the action object to query.
* @param[in, out] data
* Pointer to storage for the associated query data type.
* @param[out] error
@@ -3779,10 +3797,9 @@ rte_flow_shared_action_update(uint16_t port_id,
*/
__rte_experimental
int
-rte_flow_shared_action_query(uint16_t port_id,
- const struct rte_flow_shared_action *action,
- void *data,
- struct rte_flow_error *error);
+rte_flow_action_handle_query(uint16_t port_id,
+ const struct rte_flow_action_handle *handle,
+ void *data, struct rte_flow_error *error);
/* Tunnel has a type and the key information. */
struct rte_flow_tunnel {
diff --git a/lib/librte_ethdev/rte_flow_driver.h b/lib/librte_ethdev/rte_flow_driver.h
index 6ae1f8c264..46f62c2ec2 100644
--- a/lib/librte_ethdev/rte_flow_driver.h
+++ b/lib/librte_ethdev/rte_flow_driver.h
@@ -84,27 +84,27 @@ struct rte_flow_ops {
void **context,
uint32_t nb_contexts,
struct rte_flow_error *err);
- /** See rte_flow_shared_action_create() */
- struct rte_flow_shared_action *(*shared_action_create)
+ /** See rte_flow_action_handle_create() */
+ struct rte_flow_action_handle *(*action_handle_create)
(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action_conf *conf,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action,
struct rte_flow_error *error);
- /** See rte_flow_shared_action_destroy() */
- int (*shared_action_destroy)
+ /** See rte_flow_action_handle_destroy() */
+ int (*action_handle_destroy)
(struct rte_eth_dev *dev,
- struct rte_flow_shared_action *shared_action,
+ struct rte_flow_action_handle *handle,
struct rte_flow_error *error);
- /** See rte_flow_shared_action_update() */
- int (*shared_action_update)
+ /** See rte_flow_action_handle_update() */
+ int (*action_handle_update)
(struct rte_eth_dev *dev,
- struct rte_flow_shared_action *shared_action,
- const struct rte_flow_action *update,
+ struct rte_flow_action_handle *handle,
+ const void *update,
struct rte_flow_error *error);
- /** See rte_flow_shared_action_query() */
- int (*shared_action_query)
+ /** See rte_flow_action_handle_query() */
+ int (*action_handle_query)
(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action *shared_action,
+ const struct rte_flow_action_handle *handle,
void *data,
struct rte_flow_error *error);
/** See rte_flow_tunnel_decap_set() */
diff --git a/lib/librte_ethdev/version.map b/lib/librte_ethdev/version.map
index 93ad388e96..4eb561a89a 100644
--- a/lib/librte_ethdev/version.map
+++ b/lib/librte_ethdev/version.map
@@ -231,10 +231,6 @@ EXPERIMENTAL {
rte_eth_fec_get_capability;
rte_eth_fec_get;
rte_eth_fec_set;
- rte_flow_shared_action_create;
- rte_flow_shared_action_destroy;
- rte_flow_shared_action_query;
- rte_flow_shared_action_update;
rte_flow_tunnel_decap_set;
rte_flow_tunnel_match;
rte_flow_get_restore_info;
@@ -246,6 +242,10 @@ EXPERIMENTAL {
# added in 21.05
rte_eth_representor_info_get;
+ rte_flow_action_handle_create;
+ rte_flow_action_handle_destroy;
+ rte_flow_action_handle_update;
+ rte_flow_action_handle_query;
};
INTERNAL {
--
2.19.0.windows.1
^ permalink raw reply [relevance 1%]
* [dpdk-dev] [PATCH v5] ethdev: introduce indirect action APIs
@ 2021-04-19 14:28 1% ` Bing Zhao
0 siblings, 0 replies; 200+ results
From: Bing Zhao @ 2021-04-19 14:28 UTC (permalink / raw)
To: orika, thomas, ferruh.yigit, andrew.rybchenko, matan, viacheslavo
Cc: dev, ajit.khaparde, getelson, andreyv
Right now, rte_flow_shared_action_* APIs are used for some shared
actions, like RSS, count. The shared action should be created before
using it inside a flow. These shared actions sometimes are not
really shared but just some indirect actions decoupled from a flow.
The new functions rte_flow_action_handle_* are added to replace
the current shared functions rte_flow_shared_action_*.
There are two types of flow actions:
1. the direct (normal) actions that could be created and stored
within a flow rule. Such action is tied to its flow rule and
cannot be reused.
2. the indirect action, in the past, named shared_action. It is
created from a direct actioni, like count or rss, and then used
in the flow rules with an object handle. The PMD will take care
of the retrieve from indirect action to the direct action
when it is referenced.
The indirect action is accessed (update / query) w/o any flow rule,
just via the action object handle. For example, when querying or
resetting a counter, it could be done out of any flow using this
counter, but only the handle of the counter action object is
required.
The indirect action object could be shared by different flows or
used by a single flow, depending on the direct action type and
the real-life requirements.
The handle of an indirect action object is opaque and defined in
each driver and possibly different per direct action type.
The old name "shared" is improper in a sense and should be replaced.
Since the APIs are changed from "rte_flow_shared_action*" to the new
"rte_flow_action_handle*", the testpmd application code and command
line interfaces also need to be updated to do the adaption.
The testpmd application user guide is also updated. All the "shared
action" related parts are replaced with "indirect action" to have a
correct explanation.
The parameter of "update" interface is also changed. A general
pointer will replace the rte_flow_action struct pointer due to the
facts:
1. Some action may not support fields updating. In the example of a
counter, the only "update" supported should be the reset. So
passing a rte_flow_action struct pointer is meaningless and
there is even no such corresponding action struct. What's more,
if more than one operations should be supported, for some other
action, such pointer parameter may not meet the need.
2. Some action may need conditional or partial update, the current
parameter will not provide the ability to indicate which part(s)
to update.
For different types of indirect action objects, the pointer could
either be the same of rte_flow_action* struct - in order not to
break the current driver implementation, or some wrapper
structures with bits as masks to indicate which part to be
updated, depending on real needs of the corresponding direct
action. For different direct actions, the structures of indirect
action objects updating will be different.
All the underlayer PMD callbacks will be moved to these new APIs.
The RTE_FLOW_ACTION_TYPE_SHARED is kept for now in order not to
break the ABI. All the implementations are changed by using
RTE_FLOW_ACTION_TYPE_INDIRECT.
Since the APIs are changed from "rte_flow_shared_action*" to the new
"rte_flow_action_handle*" and the "update" interface's 3rd input
parameter is changed to generic pointer, the mlx5 PMD that uses these
APIs needs to do the adaption to the new APIs as well.
Signed-off-by: Bing Zhao <bingz@nvidia.com>
Acked-by: Andrey Vesnovaty <andreyv@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
---
app/test-pmd/cmdline.c | 24 +--
app/test-pmd/cmdline_flow.c | 252 ++++++++++++++--------------
app/test-pmd/config.c | 160 +++++++++---------
app/test-pmd/testpmd.h | 28 ++--
doc/guides/prog_guide/rte_flow.rst | 29 ++--
doc/guides/rel_notes/release_21_05.rst | 7 +
doc/guides/testpmd_app_ug/testpmd_funcs.rst | 106 ++++++------
drivers/net/mlx5/mlx5.c | 2 +-
drivers/net/mlx5/mlx5_defs.h | 4 +-
drivers/net/mlx5/mlx5_flow.c | 238 +++++++++++++-------------
drivers/net/mlx5/mlx5_flow.h | 24 +--
drivers/net/mlx5/mlx5_flow_dv.c | 85 +++++-----
lib/librte_ethdev/rte_flow.c | 56 +++----
lib/librte_ethdev/rte_flow.h | 119 +++++++------
lib/librte_ethdev/rte_flow_driver.h | 26 +--
lib/librte_ethdev/version.map | 8 +-
16 files changed, 602 insertions(+), 566 deletions(-)
diff --git a/app/test-pmd/cmdline.c b/app/test-pmd/cmdline.c
index 5bf1497..4d9e038 100644
--- a/app/test-pmd/cmdline.c
+++ b/app/test-pmd/cmdline.c
@@ -1002,23 +1002,23 @@ static void cmd_help_long_parsed(void *parsed_result,
" List and destroy aged flows"
" flow rules\n\n"
- "flow shared_action {port_id} create"
- " [action_id {shared_action_id}]"
+ "flow indirect_action {port_id} create"
+ " [action_id {indirect_action_id}]"
" [ingress] [egress]"
" action {action} / end\n"
- " Create shared action.\n\n"
+ " Create indirect action.\n\n"
- "flow shared_action {port_id} update"
- " {shared_action_id} action {action} / end\n"
- " Update shared action.\n\n"
+ "flow indirect_action {port_id} update"
+ " {indirect_action_id} action {action} / end\n"
+ " Update indirect action.\n\n"
- "flow shared_action {port_id} destroy"
- " action_id {shared_action_id} [...]\n"
- " Destroy specific shared actions.\n\n"
+ "flow indirect_action {port_id} destroy"
+ " action_id {indirect_action_id} [...]\n"
+ " Destroy specific indirect actions.\n\n"
- "flow shared_action {port_id} query"
- " {shared_action_id}\n"
- " Query an existing shared action.\n\n"
+ "flow indirect_action {port_id} query"
+ " {indirect_action_id}\n"
+ " Query an existing indirect action.\n\n"
"set vxlan ip-version (ipv4|ipv6) vni (vni) udp-src"
" (udp-src) udp-dst (udp-dst) ip-src (ip-src) ip-dst"
diff --git a/app/test-pmd/cmdline_flow.c b/app/test-pmd/cmdline_flow.c
index 0127d9e..c5381c6 100644
--- a/app/test-pmd/cmdline_flow.c
+++ b/app/test-pmd/cmdline_flow.c
@@ -54,7 +54,7 @@ enum index {
PORT_ID,
GROUP_ID,
PRIORITY_LEVEL,
- SHARED_ACTION_ID,
+ INDIRECT_ACTION_ID,
/* Top-level command. */
SET,
@@ -68,7 +68,7 @@ enum index {
/* Top-level command. */
FLOW,
/* Sub-level commands. */
- SHARED_ACTION,
+ INDIRECT_ACTION,
VALIDATE,
CREATE,
DESTROY,
@@ -112,21 +112,21 @@ enum index {
DUMP_ALL,
DUMP_ONE,
- /* Shared action arguments */
- SHARED_ACTION_CREATE,
- SHARED_ACTION_UPDATE,
- SHARED_ACTION_DESTROY,
- SHARED_ACTION_QUERY,
+ /* Indirect action arguments */
+ INDIRECT_ACTION_CREATE,
+ INDIRECT_ACTION_UPDATE,
+ INDIRECT_ACTION_DESTROY,
+ INDIRECT_ACTION_QUERY,
- /* Shared action create arguments */
- SHARED_ACTION_CREATE_ID,
- SHARED_ACTION_INGRESS,
- SHARED_ACTION_EGRESS,
- SHARED_ACTION_TRANSFER,
- SHARED_ACTION_SPEC,
+ /* Indirect action create arguments */
+ INDIRECT_ACTION_CREATE_ID,
+ INDIRECT_ACTION_INGRESS,
+ INDIRECT_ACTION_EGRESS,
+ INDIRECT_ACTION_TRANSFER,
+ INDIRECT_ACTION_SPEC,
- /* Shared action destroy arguments */
- SHARED_ACTION_DESTROY_ID,
+ /* Indirect action destroy arguments */
+ INDIRECT_ACTION_DESTROY_ID,
/* Validate/create pattern. */
PATTERN,
@@ -416,8 +416,8 @@ enum index {
ACTION_SAMPLE_RATIO,
ACTION_SAMPLE_INDEX,
ACTION_SAMPLE_INDEX_VALUE,
- ACTION_SHARED,
- SHARED_ACTION_ID2PTR,
+ ACTION_INDIRECT,
+ INDIRECT_ACTION_ID2PTR,
ACTION_MODIFY_FIELD,
ACTION_MODIFY_FIELD_OP,
ACTION_MODIFY_FIELD_OP_VALUE,
@@ -778,10 +778,10 @@ struct buffer {
struct {
uint32_t *action_id;
uint32_t action_id_n;
- } sa_destroy; /**< Shared action destroy arguments. */
+ } ia_destroy; /**< Indirect action destroy arguments. */
struct {
uint32_t action_id;
- } sa; /* Shared action query arguments */
+ } ia; /* Indirect action query arguments */
struct {
struct rte_flow_attr attr;
struct tunnel_ops tunnel_ops;
@@ -841,12 +841,12 @@ struct parse_action_priv {
.size = s, \
})
-static const enum index next_sa_create_attr[] = {
- SHARED_ACTION_CREATE_ID,
- SHARED_ACTION_INGRESS,
- SHARED_ACTION_EGRESS,
- SHARED_ACTION_TRANSFER,
- SHARED_ACTION_SPEC,
+static const enum index next_ia_create_attr[] = {
+ INDIRECT_ACTION_CREATE_ID,
+ INDIRECT_ACTION_INGRESS,
+ INDIRECT_ACTION_EGRESS,
+ INDIRECT_ACTION_TRANSFER,
+ INDIRECT_ACTION_SPEC,
ZERO,
};
@@ -856,11 +856,11 @@ static const enum index next_dump_subcmd[] = {
ZERO,
};
-static const enum index next_sa_subcmd[] = {
- SHARED_ACTION_CREATE,
- SHARED_ACTION_UPDATE,
- SHARED_ACTION_DESTROY,
- SHARED_ACTION_QUERY,
+static const enum index next_ia_subcmd[] = {
+ INDIRECT_ACTION_CREATE,
+ INDIRECT_ACTION_UPDATE,
+ INDIRECT_ACTION_DESTROY,
+ INDIRECT_ACTION_QUERY,
ZERO,
};
@@ -900,8 +900,8 @@ static const enum index next_aged_attr[] = {
ZERO,
};
-static const enum index next_sa_destroy_attr[] = {
- SHARED_ACTION_DESTROY_ID,
+static const enum index next_ia_destroy_attr[] = {
+ INDIRECT_ACTION_DESTROY_ID,
END,
ZERO,
};
@@ -1380,7 +1380,7 @@ static const enum index next_action[] = {
ACTION_SET_IPV6_DSCP,
ACTION_AGE,
ACTION_SAMPLE,
- ACTION_SHARED,
+ ACTION_INDIRECT,
ACTION_MODIFY_FIELD,
ZERO,
};
@@ -1797,13 +1797,13 @@ static int parse_ipv6_addr(struct context *, const struct token *,
static int parse_port(struct context *, const struct token *,
const char *, unsigned int,
void *, unsigned int);
-static int parse_sa(struct context *, const struct token *,
+static int parse_ia(struct context *, const struct token *,
const char *, unsigned int,
void *, unsigned int);
-static int parse_sa_destroy(struct context *ctx, const struct token *token,
+static int parse_ia_destroy(struct context *ctx, const struct token *token,
const char *str, unsigned int len,
void *buf, unsigned int size);
-static int parse_sa_id2ptr(struct context *ctx, const struct token *token,
+static int parse_ia_id2ptr(struct context *ctx, const struct token *token,
const char *str, unsigned int len, void *buf,
unsigned int size);
static int comp_none(struct context *, const struct token *,
@@ -1950,10 +1950,10 @@ static const struct token token_list[] = {
.call = parse_int,
.comp = comp_none,
},
- [SHARED_ACTION_ID] = {
- .name = "{shared_action_id}",
- .type = "SHARED_ACTION_ID",
- .help = "shared action id",
+ [INDIRECT_ACTION_ID] = {
+ .name = "{indirect_action_id}",
+ .type = "INDIRECT_ACTION_ID",
+ .help = "indirect action id",
.call = parse_int,
.comp = comp_none,
},
@@ -1963,7 +1963,7 @@ static const struct token token_list[] = {
.type = "{command} {port_id} [{arg} [...]]",
.help = "manage ingress/egress flow rules",
.next = NEXT(NEXT_ENTRY
- (SHARED_ACTION,
+ (INDIRECT_ACTION,
VALIDATE,
CREATE,
DESTROY,
@@ -1977,42 +1977,42 @@ static const struct token token_list[] = {
.call = parse_init,
},
/* Top-level command. */
- [SHARED_ACTION] = {
- .name = "shared_action",
+ [INDIRECT_ACTION] = {
+ .name = "indirect_action",
.type = "{command} {port_id} [{arg} [...]]",
- .help = "manage shared actions",
- .next = NEXT(next_sa_subcmd, NEXT_ENTRY(PORT_ID)),
+ .help = "manage indirect actions",
+ .next = NEXT(next_ia_subcmd, NEXT_ENTRY(PORT_ID)),
.args = ARGS(ARGS_ENTRY(struct buffer, port)),
- .call = parse_sa,
+ .call = parse_ia,
},
/* Sub-level commands. */
- [SHARED_ACTION_CREATE] = {
+ [INDIRECT_ACTION_CREATE] = {
.name = "create",
- .help = "create shared action",
- .next = NEXT(next_sa_create_attr),
- .call = parse_sa,
+ .help = "create indirect action",
+ .next = NEXT(next_ia_create_attr),
+ .call = parse_ia,
},
- [SHARED_ACTION_UPDATE] = {
+ [INDIRECT_ACTION_UPDATE] = {
.name = "update",
- .help = "update shared action",
- .next = NEXT(NEXT_ENTRY(SHARED_ACTION_SPEC),
- NEXT_ENTRY(SHARED_ACTION_ID)),
+ .help = "update indirect action",
+ .next = NEXT(NEXT_ENTRY(INDIRECT_ACTION_SPEC),
+ NEXT_ENTRY(INDIRECT_ACTION_ID)),
.args = ARGS(ARGS_ENTRY(struct buffer, args.vc.attr.group)),
- .call = parse_sa,
+ .call = parse_ia,
},
- [SHARED_ACTION_DESTROY] = {
+ [INDIRECT_ACTION_DESTROY] = {
.name = "destroy",
- .help = "destroy shared action",
- .next = NEXT(NEXT_ENTRY(SHARED_ACTION_DESTROY_ID)),
+ .help = "destroy indirect action",
+ .next = NEXT(NEXT_ENTRY(INDIRECT_ACTION_DESTROY_ID)),
.args = ARGS(ARGS_ENTRY(struct buffer, port)),
- .call = parse_sa_destroy,
+ .call = parse_ia_destroy,
},
- [SHARED_ACTION_QUERY] = {
+ [INDIRECT_ACTION_QUERY] = {
.name = "query",
- .help = "query shared action",
- .next = NEXT(NEXT_ENTRY(END), NEXT_ENTRY(SHARED_ACTION_ID)),
- .args = ARGS(ARGS_ENTRY(struct buffer, args.sa.action_id)),
- .call = parse_sa,
+ .help = "query indirect action",
+ .next = NEXT(NEXT_ENTRY(END), NEXT_ENTRY(INDIRECT_ACTION_ID)),
+ .args = ARGS(ARGS_ENTRY(struct buffer, args.ia.action_id)),
+ .call = parse_ia,
},
[VALIDATE] = {
.name = "validate",
@@ -4498,61 +4498,61 @@ static const struct token token_list[] = {
.call = parse_vc_action_sample_index,
.comp = comp_set_sample_index,
},
- /* Shared action destroy arguments. */
- [SHARED_ACTION_DESTROY_ID] = {
+ /* Indirect action destroy arguments. */
+ [INDIRECT_ACTION_DESTROY_ID] = {
.name = "action_id",
- .help = "specify a shared action id to destroy",
- .next = NEXT(next_sa_destroy_attr,
- NEXT_ENTRY(SHARED_ACTION_ID)),
+ .help = "specify a indirect action id to destroy",
+ .next = NEXT(next_ia_destroy_attr,
+ NEXT_ENTRY(INDIRECT_ACTION_ID)),
.args = ARGS(ARGS_ENTRY_PTR(struct buffer,
- args.sa_destroy.action_id)),
- .call = parse_sa_destroy,
+ args.ia_destroy.action_id)),
+ .call = parse_ia_destroy,
},
- /* Shared action create arguments. */
- [SHARED_ACTION_CREATE_ID] = {
+ /* Indirect action create arguments. */
+ [INDIRECT_ACTION_CREATE_ID] = {
.name = "action_id",
- .help = "specify a shared action id to create",
- .next = NEXT(next_sa_create_attr,
- NEXT_ENTRY(SHARED_ACTION_ID)),
+ .help = "specify a indirect action id to create",
+ .next = NEXT(next_ia_create_attr,
+ NEXT_ENTRY(INDIRECT_ACTION_ID)),
.args = ARGS(ARGS_ENTRY(struct buffer, args.vc.attr.group)),
},
- [ACTION_SHARED] = {
- .name = "shared",
- .help = "apply shared action by id",
- .priv = PRIV_ACTION(SHARED, 0),
- .next = NEXT(NEXT_ENTRY(SHARED_ACTION_ID2PTR)),
+ [ACTION_INDIRECT] = {
+ .name = "indirect",
+ .help = "apply indirect action by id",
+ .priv = PRIV_ACTION(INDIRECT, 0),
+ .next = NEXT(NEXT_ENTRY(INDIRECT_ACTION_ID2PTR)),
.args = ARGS(ARGS_ENTRY_ARB(0, sizeof(uint32_t))),
.call = parse_vc,
},
- [SHARED_ACTION_ID2PTR] = {
+ [INDIRECT_ACTION_ID2PTR] = {
.name = "{action_id}",
- .type = "SHARED_ACTION_ID",
- .help = "shared action id",
+ .type = "INDIRECT_ACTION_ID",
+ .help = "indirect action id",
.next = NEXT(NEXT_ENTRY(ACTION_NEXT)),
- .call = parse_sa_id2ptr,
+ .call = parse_ia_id2ptr,
.comp = comp_none,
},
- [SHARED_ACTION_INGRESS] = {
+ [INDIRECT_ACTION_INGRESS] = {
.name = "ingress",
.help = "affect rule to ingress",
- .next = NEXT(next_sa_create_attr),
- .call = parse_sa,
+ .next = NEXT(next_ia_create_attr),
+ .call = parse_ia,
},
- [SHARED_ACTION_EGRESS] = {
+ [INDIRECT_ACTION_EGRESS] = {
.name = "egress",
.help = "affect rule to egress",
- .next = NEXT(next_sa_create_attr),
- .call = parse_sa,
+ .next = NEXT(next_ia_create_attr),
+ .call = parse_ia,
},
- [SHARED_ACTION_TRANSFER] = {
+ [INDIRECT_ACTION_TRANSFER] = {
.name = "transfer",
.help = "affect rule to transfer",
- .next = NEXT(next_sa_create_attr),
- .call = parse_sa,
+ .next = NEXT(next_ia_create_attr),
+ .call = parse_ia,
},
- [SHARED_ACTION_SPEC] = {
+ [INDIRECT_ACTION_SPEC] = {
.name = "action",
- .help = "specify action to share",
+ .help = "specify action to create indirect handle",
.next = NEXT(next_action),
},
};
@@ -4739,9 +4739,9 @@ parse_init(struct context *ctx, const struct token *token,
return len;
}
-/** Parse tokens for shared action commands. */
+/** Parse tokens for indirect action commands. */
static int
-parse_sa(struct context *ctx, const struct token *token,
+parse_ia(struct context *ctx, const struct token *token,
const char *str, unsigned int len,
void *buf, unsigned int size)
{
@@ -4754,7 +4754,7 @@ parse_sa(struct context *ctx, const struct token *token,
if (!out)
return len;
if (!out->command) {
- if (ctx->curr != SHARED_ACTION)
+ if (ctx->curr != INDIRECT_ACTION)
return -1;
if (sizeof(*out) > size)
return -1;
@@ -4766,26 +4766,26 @@ parse_sa(struct context *ctx, const struct token *token,
return len;
}
switch (ctx->curr) {
- case SHARED_ACTION_CREATE:
- case SHARED_ACTION_UPDATE:
+ case INDIRECT_ACTION_CREATE:
+ case INDIRECT_ACTION_UPDATE:
out->args.vc.actions =
(void *)RTE_ALIGN_CEIL((uintptr_t)(out + 1),
sizeof(double));
out->args.vc.attr.group = UINT32_MAX;
/* fallthrough */
- case SHARED_ACTION_QUERY:
+ case INDIRECT_ACTION_QUERY:
out->command = ctx->curr;
ctx->objdata = 0;
ctx->object = out;
ctx->objmask = NULL;
return len;
- case SHARED_ACTION_EGRESS:
+ case INDIRECT_ACTION_EGRESS:
out->args.vc.attr.egress = 1;
return len;
- case SHARED_ACTION_INGRESS:
+ case INDIRECT_ACTION_INGRESS:
out->args.vc.attr.ingress = 1;
return len;
- case SHARED_ACTION_TRANSFER:
+ case INDIRECT_ACTION_TRANSFER:
out->args.vc.attr.transfer = 1;
return len;
default:
@@ -4794,9 +4794,9 @@ parse_sa(struct context *ctx, const struct token *token,
}
-/** Parse tokens for shared action destroy command. */
+/** Parse tokens for indirect action destroy command. */
static int
-parse_sa_destroy(struct context *ctx, const struct token *token,
+parse_ia_destroy(struct context *ctx, const struct token *token,
const char *str, unsigned int len,
void *buf, unsigned int size)
{
@@ -4809,8 +4809,8 @@ parse_sa_destroy(struct context *ctx, const struct token *token,
/* Nothing else to do if there is no buffer. */
if (!out)
return len;
- if (!out->command || out->command == SHARED_ACTION) {
- if (ctx->curr != SHARED_ACTION_DESTROY)
+ if (!out->command || out->command == INDIRECT_ACTION) {
+ if (ctx->curr != INDIRECT_ACTION_DESTROY)
return -1;
if (sizeof(*out) > size)
return -1;
@@ -4818,13 +4818,13 @@ parse_sa_destroy(struct context *ctx, const struct token *token,
ctx->objdata = 0;
ctx->object = out;
ctx->objmask = NULL;
- out->args.sa_destroy.action_id =
+ out->args.ia_destroy.action_id =
(void *)RTE_ALIGN_CEIL((uintptr_t)(out + 1),
sizeof(double));
return len;
}
- action_id = out->args.sa_destroy.action_id
- + out->args.sa_destroy.action_id_n++;
+ action_id = out->args.ia_destroy.action_id
+ + out->args.ia_destroy.action_id_n++;
if ((uint8_t *)action_id > (uint8_t *)out + size)
return -1;
ctx->objdata = 0;
@@ -7102,7 +7102,7 @@ parse_port(struct context *ctx, const struct token *token,
}
static int
-parse_sa_id2ptr(struct context *ctx, const struct token *token,
+parse_ia_id2ptr(struct context *ctx, const struct token *token,
const char *str, unsigned int len,
void *buf, unsigned int size)
{
@@ -7119,9 +7119,9 @@ parse_sa_id2ptr(struct context *ctx, const struct token *token,
ctx->object = action;
if (ret != (int)len)
return ret;
- /* set shared action */
+ /* set indirect action */
if (action) {
- action->conf = port_shared_action_get_by_id(ctx->port, id);
+ action->conf = port_action_handle_get_by_id(ctx->port, id);
ret = (action->conf) ? ret : -1;
}
return ret;
@@ -7659,27 +7659,27 @@ static void
cmd_flow_parsed(const struct buffer *in)
{
switch (in->command) {
- case SHARED_ACTION_CREATE:
- port_shared_action_create(
+ case INDIRECT_ACTION_CREATE:
+ port_action_handle_create(
in->port, in->args.vc.attr.group,
- &((const struct rte_flow_shared_action_conf) {
+ &((const struct rte_flow_indir_action_conf) {
.ingress = in->args.vc.attr.ingress,
.egress = in->args.vc.attr.egress,
.transfer = in->args.vc.attr.transfer,
}),
in->args.vc.actions);
break;
- case SHARED_ACTION_DESTROY:
- port_shared_action_destroy(in->port,
- in->args.sa_destroy.action_id_n,
- in->args.sa_destroy.action_id);
+ case INDIRECT_ACTION_DESTROY:
+ port_action_handle_destroy(in->port,
+ in->args.ia_destroy.action_id_n,
+ in->args.ia_destroy.action_id);
break;
- case SHARED_ACTION_UPDATE:
- port_shared_action_update(in->port, in->args.vc.attr.group,
+ case INDIRECT_ACTION_UPDATE:
+ port_action_handle_update(in->port, in->args.vc.attr.group,
in->args.vc.actions);
break;
- case SHARED_ACTION_QUERY:
- port_shared_action_query(in->port, in->args.sa.action_id);
+ case INDIRECT_ACTION_QUERY:
+ port_action_handle_query(in->port, in->args.ia.action_id);
break;
case VALIDATE:
port_flow_validate(in->port, &in->args.vc.attr,
diff --git a/app/test-pmd/config.c b/app/test-pmd/config.c
index d4b0e85..868ff34 100644
--- a/app/test-pmd/config.c
+++ b/app/test-pmd/config.c
@@ -1391,38 +1391,38 @@ rss_config_display(struct rte_flow_action_rss *rss_conf)
}
}
-static struct port_shared_action *
+static struct port_indirect_action *
action_get_by_id(portid_t port_id, uint32_t id)
{
struct rte_port *port;
- struct port_shared_action **ppsa;
- struct port_shared_action *psa = NULL;
+ struct port_indirect_action **ppia;
+ struct port_indirect_action *pia = NULL;
if (port_id_is_invalid(port_id, ENABLED_WARN) ||
port_id == (portid_t)RTE_PORT_ALL)
return NULL;
port = &ports[port_id];
- ppsa = &port->actions_list;
- while (*ppsa) {
- if ((*ppsa)->id == id) {
- psa = *ppsa;
+ ppia = &port->actions_list;
+ while (*ppia) {
+ if ((*ppia)->id == id) {
+ pia = *ppia;
break;
}
- ppsa = &(*ppsa)->next;
+ ppia = &(*ppia)->next;
}
- if (!psa)
- printf("Failed to find shared action #%u on port %u\n",
+ if (!pia)
+ printf("Failed to find indirect action #%u on port %u\n",
id, port_id);
- return psa;
+ return pia;
}
static int
action_alloc(portid_t port_id, uint32_t id,
- struct port_shared_action **action)
+ struct port_indirect_action **action)
{
struct rte_port *port;
- struct port_shared_action **ppsa;
- struct port_shared_action *psa = NULL;
+ struct port_indirect_action **ppia;
+ struct port_indirect_action *pia = NULL;
*action = NULL;
if (port_id_is_invalid(port_id, ENABLED_WARN) ||
@@ -1433,7 +1433,7 @@ action_alloc(portid_t port_id, uint32_t id,
/* taking first available ID */
if (port->actions_list) {
if (port->actions_list->id == UINT32_MAX - 1) {
- printf("Highest shared action ID is already"
+ printf("Highest indirect action ID is already"
" assigned, delete it first\n");
return -ENOMEM;
}
@@ -1442,70 +1442,70 @@ action_alloc(portid_t port_id, uint32_t id,
id = 0;
}
}
- psa = calloc(1, sizeof(*psa));
- if (!psa) {
- printf("Allocation of port %u shared action failed\n",
+ pia = calloc(1, sizeof(*pia));
+ if (!pia) {
+ printf("Allocation of port %u indirect action failed\n",
port_id);
return -ENOMEM;
}
- ppsa = &port->actions_list;
- while (*ppsa && (*ppsa)->id > id)
- ppsa = &(*ppsa)->next;
- if (*ppsa && (*ppsa)->id == id) {
- printf("Shared action #%u is already assigned,"
+ ppia = &port->actions_list;
+ while (*ppia && (*ppia)->id > id)
+ ppia = &(*ppia)->next;
+ if (*ppia && (*ppia)->id == id) {
+ printf("Indirect action #%u is already assigned,"
" delete it first\n", id);
- free(psa);
+ free(pia);
return -EINVAL;
}
- psa->next = *ppsa;
- psa->id = id;
- *ppsa = psa;
- *action = psa;
+ pia->next = *ppia;
+ pia->id = id;
+ *ppia = pia;
+ *action = pia;
return 0;
}
-/** Create shared action */
+/** Create indirect action */
int
-port_shared_action_create(portid_t port_id, uint32_t id,
- const struct rte_flow_shared_action_conf *conf,
+port_action_handle_create(portid_t port_id, uint32_t id,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action)
{
- struct port_shared_action *psa;
+ struct port_indirect_action *pia;
int ret;
struct rte_flow_error error;
- ret = action_alloc(port_id, id, &psa);
+ ret = action_alloc(port_id, id, &pia);
if (ret)
return ret;
if (action->type == RTE_FLOW_ACTION_TYPE_AGE) {
struct rte_flow_action_age *age =
(struct rte_flow_action_age *)(uintptr_t)(action->conf);
- psa->age_type = ACTION_AGE_CONTEXT_TYPE_SHARED_ACTION;
- age->context = &psa->age_type;
+ pia->age_type = ACTION_AGE_CONTEXT_TYPE_INDIRECT_ACTION;
+ age->context = &pia->age_type;
}
/* Poisoning to make sure PMDs update it in case of error. */
memset(&error, 0x22, sizeof(error));
- psa->action = rte_flow_shared_action_create(port_id, conf, action,
+ pia->handle = rte_flow_action_handle_create(port_id, conf, action,
&error);
- if (!psa->action) {
- uint32_t destroy_id = psa->id;
- port_shared_action_destroy(port_id, 1, &destroy_id);
+ if (!pia->handle) {
+ uint32_t destroy_id = pia->id;
+ port_action_handle_destroy(port_id, 1, &destroy_id);
return port_flow_complain(&error);
}
- psa->type = action->type;
- printf("Shared action #%u created\n", psa->id);
+ pia->type = action->type;
+ printf("Indirect action #%u created\n", pia->id);
return 0;
}
-/** Destroy shared action */
+/** Destroy indirect action */
int
-port_shared_action_destroy(portid_t port_id,
+port_action_handle_destroy(portid_t port_id,
uint32_t n,
const uint32_t *actions)
{
struct rte_port *port;
- struct port_shared_action **tmp;
+ struct port_indirect_action **tmp;
uint32_t c = 0;
int ret = 0;
@@ -1519,9 +1519,9 @@ port_shared_action_destroy(portid_t port_id,
for (i = 0; i != n; ++i) {
struct rte_flow_error error;
- struct port_shared_action *psa = *tmp;
+ struct port_indirect_action *pia = *tmp;
- if (actions[i] != psa->id)
+ if (actions[i] != pia->id)
continue;
/*
* Poisoning to make sure PMDs update it in case
@@ -1529,14 +1529,14 @@ port_shared_action_destroy(portid_t port_id,
*/
memset(&error, 0x33, sizeof(error));
- if (psa->action && rte_flow_shared_action_destroy(
- port_id, psa->action, &error)) {
+ if (pia->handle && rte_flow_action_handle_destroy(
+ port_id, pia->handle, &error)) {
ret = port_flow_complain(&error);
continue;
}
- *tmp = psa->next;
- printf("Shared action #%u destroyed\n", psa->id);
- free(psa);
+ *tmp = pia->next;
+ printf("Indirect action #%u destroyed\n", pia->id);
+ free(pia);
break;
}
if (i == n)
@@ -1547,60 +1547,60 @@ port_shared_action_destroy(portid_t port_id,
}
-/** Get shared action by port + id */
-struct rte_flow_shared_action *
-port_shared_action_get_by_id(portid_t port_id, uint32_t id)
+/** Get indirect action by port + id */
+struct rte_flow_action_handle *
+port_action_handle_get_by_id(portid_t port_id, uint32_t id)
{
- struct port_shared_action *psa = action_get_by_id(port_id, id);
+ struct port_indirect_action *pia = action_get_by_id(port_id, id);
- return (psa) ? psa->action : NULL;
+ return (pia) ? pia->handle : NULL;
}
-/** Update shared action */
+/** Update indirect action */
int
-port_shared_action_update(portid_t port_id, uint32_t id,
+port_action_handle_update(portid_t port_id, uint32_t id,
const struct rte_flow_action *action)
{
struct rte_flow_error error;
- struct rte_flow_shared_action *shared_action;
+ struct rte_flow_action_handle *action_handle;
- shared_action = port_shared_action_get_by_id(port_id, id);
- if (!shared_action)
+ action_handle = port_action_handle_get_by_id(port_id, id);
+ if (!action_handle)
return -EINVAL;
- if (rte_flow_shared_action_update(port_id, shared_action, action,
+ if (rte_flow_action_handle_update(port_id, action_handle, action,
&error)) {
return port_flow_complain(&error);
}
- printf("Shared action #%u updated\n", id);
+ printf("Indirect action #%u updated\n", id);
return 0;
}
int
-port_shared_action_query(portid_t port_id, uint32_t id)
+port_action_handle_query(portid_t port_id, uint32_t id)
{
struct rte_flow_error error;
- struct port_shared_action *psa;
+ struct port_indirect_action *pia;
uint64_t default_data;
void *data = NULL;
int ret = 0;
- psa = action_get_by_id(port_id, id);
- if (!psa)
+ pia = action_get_by_id(port_id, id);
+ if (!pia)
return -EINVAL;
- switch (psa->type) {
+ switch (pia->type) {
case RTE_FLOW_ACTION_TYPE_RSS:
case RTE_FLOW_ACTION_TYPE_AGE:
data = &default_data;
break;
default:
- printf("Shared action %u (type: %d) on port %u doesn't support"
- " query\n", id, psa->type, port_id);
+ printf("Indirect action %u (type: %d) on port %u doesn't"
+ " support query\n", id, pia->type, port_id);
return -1;
}
- if (rte_flow_shared_action_query(port_id, psa->action, data, &error))
+ if (rte_flow_action_handle_query(port_id, pia->handle, data, &error))
ret = port_flow_complain(&error);
- switch (psa->type) {
+ switch (pia->type) {
case RTE_FLOW_ACTION_TYPE_RSS:
if (!ret)
printf("Shared RSS action:\n\trefs:%u\n",
@@ -1622,8 +1622,8 @@ port_shared_action_query(portid_t port_id, uint32_t id)
data = NULL;
break;
default:
- printf("Shared action %u (type: %d) on port %u doesn't support"
- " query\n", id, psa->type, port_id);
+ printf("Indirect action %u (type: %d) on port %u doesn't"
+ " support query\n", id, pia->type, port_id);
ret = -1;
}
return ret;
@@ -2065,7 +2065,7 @@ port_flow_aged(portid_t port_id, uint8_t destroy)
enum age_action_context_type *type;
union {
struct port_flow *pf;
- struct port_shared_action *psa;
+ struct port_indirect_action *pia;
} ctx;
if (port_id_is_invalid(port_id, ENABLED_WARN) ||
@@ -2115,11 +2115,11 @@ port_flow_aged(portid_t port_id, uint8_t destroy)
&ctx.pf->id))
total++;
break;
- case ACTION_AGE_CONTEXT_TYPE_SHARED_ACTION:
- ctx.psa = container_of(type, struct port_shared_action,
- age_type);
- printf("%-20s\t%" PRIu32 "\n", "Shared action",
- ctx.psa->id);
+ case ACTION_AGE_CONTEXT_TYPE_INDIRECT_ACTION:
+ ctx.pia = container_of(type,
+ struct port_indirect_action, age_type);
+ printf("%-20s\t%" PRIu32 "\n", "Indirect action",
+ ctx.pia->id);
break;
default:
printf("Error: invalid context type %u\n", port_id);
diff --git a/app/test-pmd/testpmd.h b/app/test-pmd/testpmd.h
index 36d8535..c314b30 100644
--- a/app/test-pmd/testpmd.h
+++ b/app/test-pmd/testpmd.h
@@ -151,7 +151,7 @@ struct fwd_stream {
*/
enum age_action_context_type {
ACTION_AGE_CONTEXT_TYPE_FLOW,
- ACTION_AGE_CONTEXT_TYPE_SHARED_ACTION,
+ ACTION_AGE_CONTEXT_TYPE_INDIRECT_ACTION,
};
/** Descriptor for a single flow. */
@@ -165,12 +165,12 @@ struct port_flow {
uint8_t data[]; /**< Storage for flow rule description */
};
-/* Descriptor for shared action */
-struct port_shared_action {
- struct port_shared_action *next; /**< Next flow in list. */
- uint32_t id; /**< Shared action ID. */
+/* Descriptor for indirect action */
+struct port_indirect_action {
+ struct port_indirect_action *next; /**< Next flow in list. */
+ uint32_t id; /**< Indirect action ID. */
enum rte_flow_action_type type; /**< Action type. */
- struct rte_flow_shared_action *action; /**< Shared action handle. */
+ struct rte_flow_action_handle *handle; /**< Indirect action handle. */
enum age_action_context_type age_type; /**< Age action context type. */
};
@@ -222,8 +222,8 @@ struct rte_port {
uint32_t mc_addr_nb; /**< nb. of addr. in mc_addr_pool */
uint8_t slave_flag; /**< bonding slave port */
struct port_flow *flow_list; /**< Associated flows. */
- struct port_shared_action *actions_list;
- /**< Associated shared actions. */
+ struct port_indirect_action *actions_list;
+ /**< Associated indirect actions. */
LIST_HEAD(, port_flow_tunnel) flow_tunnel_list;
const struct rte_eth_rxtx_callback *rx_dump_cb[RTE_MAX_QUEUES_PER_PORT+1];
const struct rte_eth_rxtx_callback *tx_dump_cb[RTE_MAX_QUEUES_PER_PORT+1];
@@ -801,14 +801,14 @@ void port_reg_bit_field_set(portid_t port_id, uint32_t reg_off,
uint8_t bit1_pos, uint8_t bit2_pos, uint32_t value);
void port_reg_display(portid_t port_id, uint32_t reg_off);
void port_reg_set(portid_t port_id, uint32_t reg_off, uint32_t value);
-int port_shared_action_create(portid_t port_id, uint32_t id,
- const struct rte_flow_shared_action_conf *conf,
+int port_action_handle_create(portid_t port_id, uint32_t id,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action);
-int port_shared_action_destroy(portid_t port_id,
+int port_action_handle_destroy(portid_t port_id,
uint32_t n, const uint32_t *action);
-struct rte_flow_shared_action *port_shared_action_get_by_id(portid_t port_id,
+struct rte_flow_action_handle *port_action_handle_get_by_id(portid_t port_id,
uint32_t id);
-int port_shared_action_update(portid_t port_id, uint32_t id,
+int port_action_handle_update(portid_t port_id, uint32_t id,
const struct rte_flow_action *action);
int port_flow_validate(portid_t port_id,
const struct rte_flow_attr *attr,
@@ -820,7 +820,7 @@ int port_flow_create(portid_t port_id,
const struct rte_flow_item *pattern,
const struct rte_flow_action *actions,
const struct tunnel_ops *tunnel_ops);
-int port_shared_action_query(portid_t port_id, uint32_t id);
+int port_action_handle_query(portid_t port_id, uint32_t id);
void update_age_action_context(const struct rte_flow_action *actions,
struct port_flow *pf);
int port_flow_destroy(portid_t port_id, uint32_t n, const uint32_t *rule);
diff --git a/doc/guides/prog_guide/rte_flow.rst b/doc/guides/prog_guide/rte_flow.rst
index e1b93ec..4b54588 100644
--- a/doc/guides/prog_guide/rte_flow.rst
+++ b/doc/guides/prog_guide/rte_flow.rst
@@ -1719,7 +1719,7 @@ that counter.
For ports within the same switch domain then the counter id namespace extends
to all ports within that switch domain.
-The shared flag is DEPRECATED and ``SHARED`` ``COUNT`` action should be used
+The shared flag is DEPRECATED and ``INDIRECT`` ``COUNT`` action should be used
to make shared counters.
.. _table_rte_flow_action_count:
@@ -2742,25 +2742,26 @@ packets, and must have a fate action.
| ``actions`` | sub-action list for sampling |
+--------------+---------------------------------+
-Action: ``SHARED``
-^^^^^^^^^^^^^^^^^^
+Action: ``INDIRECT``
+^^^^^^^^^^^^^^^^^^^^
-Flow utilize shared action by handle as returned from
-``rte_flow_shared_action_create()``.
+Flow utilize indirect action by handle as returned from
+``rte_flow_action_handle_create()``.
-The behaviour of the shared action defined by ``action`` argument of type
-``struct rte_flow_action`` passed to ``rte_flow_shared_action_create()``.
+The behaviour of the indirect action defined by ``action`` argument of type
+``struct rte_flow_action`` passed to ``rte_flow_action_handle_create()``.
-Multiple flows can use the same shared action.
-The shared action can be in-place updated by ``rte_flow_shared_action_update()``
-without destroying flow and creating flow again.
+The indirect action can be used by a single flow or shared among multiple flows.
+The indirect action can be in-place updated by ``rte_flow_action_handle_update()``
+without destroying flow and creating flow again. The fields that could be
+updated depend on the type of the ``action`` and different for every type.
-The shared action specified data (e.g. counter) can be queried by
-``rte_flow_shared_action_query()``.
+The indirect action specified data (e.g. counter) can be queried by
+``rte_flow_action_handle_query()``.
-.. _table_rte_flow_shared_action:
+.. _table_rte_flow_action_handle:
-.. table:: SHARED
+.. table:: INDIRECT
+---------------+
| Field |
diff --git a/doc/guides/rel_notes/release_21_05.rst b/doc/guides/rel_notes/release_21_05.rst
index 1c2e093..8913dd4 100644
--- a/doc/guides/rel_notes/release_21_05.rst
+++ b/doc/guides/rel_notes/release_21_05.rst
@@ -270,6 +270,13 @@ API Changes
``rte_cryptodev_raw_dequeue_burst`` got a new parameter
``max_nb_to_dequeue`` to provide flexible control on dequeue.
+* ethdev: The experimental flow API for shared action has been generalized
+ as a flow action handle used in rules through an indirect action.
+ The functions ``rte_flow_shared_action_*`` manipulating the action object
+ are replaced with ``rte_flow_action_handle_*``.
+ The action ``RTE_FLOW_ACTION_TYPE_SHARED`` is deprecated and can be
+ replaced with ``RTE_FLOW_ACTION_TYPE_INDIRECT``.
+
ABI Changes
-----------
diff --git a/doc/guides/testpmd_app_ug/testpmd_funcs.rst b/doc/guides/testpmd_app_ug/testpmd_funcs.rst
index a736e7d..715e209 100644
--- a/doc/guides/testpmd_app_ug/testpmd_funcs.rst
+++ b/doc/guides/testpmd_app_ug/testpmd_funcs.rst
@@ -4055,10 +4055,10 @@ This section lists supported actions and their attributes, if any.
- ``dscp_value {unsigned}``: The new DSCP value to be set
-- ``shared``: Use shared action created via
- ``flow shared_action {port_id} create``
+- ``indirect``: Use indirect action created via
+ ``flow indirect_action {port_id} create``
- - ``shared_action_id {unsigned}``: Shared action ID to use
+ - ``indirect_action_id {unsigned}``: Indirect action ID to use
Destroying flow rules
~~~~~~~~~~~~~~~~~~~~~
@@ -4349,113 +4349,117 @@ If attach ``destroy`` parameter, the command will destroy all the list aged flow
testpmd> flow aged 0
Port 0 total aged flows: 0
-Creating shared actions
-~~~~~~~~~~~~~~~~~~~~~~~
-``flow shared_action {port_id} create`` creates shared action with optional
-shared action ID. It is bound to ``rte_flow_shared_action_create()``::
+Creating indirect actions
+~~~~~~~~~~~~~~~~~~~~~~~~~
+
+``flow indirect_action {port_id} create`` creates indirect action with optional
+indirect action ID. It is bound to ``rte_flow_action_handle_create()``::
- flow shared_action {port_id} create [action_id {shared_action_id}]
+ flow indirect_action {port_id} create [action_id {indirect_action_id}]
[ingress] [egress] [transfer] action {action} / end
If successful, it will show::
- Shared action #[...] created
+ Indirect action #[...] created
-Otherwise, it will complain either that shared action already exists or that
+Otherwise, it will complain either that indirect action already exists or that
some error occurred::
- Shared action #[...] is already assigned, delete it first
+ Indirect action #[...] is already assigned, delete it first
::
Caught error type [...] ([...]): [...]
-Create shared rss action with id 100 to queues 1 and 2 on port 0::
+Create indirect rss action with id 100 to queues 1 and 2 on port 0::
- testpmd> flow shared_action 0 create action_id 100 \
+ testpmd> flow indirect_action 0 create action_id 100 \
ingress action rss queues 1 2 end / end
-Create shared rss action with id assigned by testpmd to queues 1 and 2 on
+Create indirect rss action with id assigned by testpmd to queues 1 and 2 on
port 0::
- testpmd> flow shared_action 0 create action_id \
+ testpmd> flow indirect_action 0 create action_id \
ingress action rss queues 0 1 end / end
-Updating shared actions
-~~~~~~~~~~~~~~~~~~~~~~~
-``flow shared_action {port_id} update`` updates configuration of the shared
-action from its shared action ID (as returned by
-``flow shared_action {port_id} create``). It is bound to
-``rte_flow_shared_action_update()``::
+Updating indirect actions
+~~~~~~~~~~~~~~~~~~~~~~~~~
+
+``flow indirect_action {port_id} update`` updates configuration of the indirect
+action from its indirect action ID (as returned by
+``flow indirect_action {port_id} create``). It is bound to
+``rte_flow_action_handle_update()``::
- flow shared_action {port_id} update {shared_action_id}
+ flow indirect_action {port_id} update {indirect_action_id}
action {action} / end
If successful, it will show::
- Shared action #[...] updated
+ Indirect action #[...] updated
-Otherwise, it will complain either that shared action not found or that some
+Otherwise, it will complain either that indirect action not found or that some
error occurred::
- Failed to find shared action #[...] on port [...]
+ Failed to find indirect action #[...] on port [...]
::
Caught error type [...] ([...]): [...]
-Update shared rss action having id 100 on port 0 with rss to queues 0 and 3
+Update indirect rss action having id 100 on port 0 with rss to queues 0 and 3
(in create example above rss queues were 1 and 2)::
- testpmd> flow shared_action 0 update 100 action rss queues 0 3 end / end
+ testpmd> flow indirect_action 0 update 100 action rss queues 0 3 end / end
-Destroying shared actions
-~~~~~~~~~~~~~~~~~~~~~~~~~
-``flow shared_action {port_id} update`` destroys one or more shared actions
-from their shared action IDs (as returned by
-``flow shared_action {port_id} create``). It is bound to
-``rte_flow_shared_action_destroy()``::
+Destroying indirect actions
+~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+``flow indirect_action {port_id} destroy`` destroys one or more indirect actions
+from their indirect action IDs (as returned by
+``flow indirect_action {port_id} create``). It is bound to
+``rte_flow_action_handle_destroy()``::
- flow shared_action {port_id} destroy action_id {shared_action_id} [...]
+ flow indirect_action {port_id} destroy action_id {indirect_action_id} [...]
If successful, it will show::
- Shared action #[...] destroyed
+ Indirect action #[...] destroyed
-It does not report anything for shared action IDs that do not exist.
-The usual error message is shown when a shared action cannot be destroyed::
+It does not report anything for indirect action IDs that do not exist.
+The usual error message is shown when a indirect action cannot be destroyed::
Caught error type [...] ([...]): [...]
-Destroy shared actions having id 100 & 101::
+Destroy indirect actions having id 100 & 101::
- testpmd> flow shared_action 0 destroy action_id 100 action_id 101
+ testpmd> flow indirect_action 0 destroy action_id 100 action_id 101
-Query shared actions
-~~~~~~~~~~~~~~~~~~~~
-``flow shared_action {port_id} query`` queries the shared action from its
-shared action ID (as returned by ``flow shared_action {port_id} create``).
-It is bound to ``rte_flow_shared_action_query()``::
+Query indirect actions
+~~~~~~~~~~~~~~~~~~~~~~
+
+``flow indirect_action {port_id} query`` queries the indirect action from its
+indirect action ID (as returned by ``flow indirect_action {port_id} create``).
+It is bound to ``rte_flow_action_handle_query()``::
- flow shared_action {port_id} query {shared_action_id}
+ flow indirect_action {port_id} query {indirect_action_id}
-Currently only rss shared action supported. If successful, it will show::
+Currently only rss indirect action supported. If successful, it will show::
- Shared RSS action:
+ Indirect RSS action:
refs:[...]
-Otherwise, it will complain either that shared action not found or that some
+Otherwise, it will complain either that indirect action not found or that some
error occurred::
- Failed to find shared action #[...] on port [...]
+ Failed to find indirect action #[...] on port [...]
::
Caught error type [...] ([...]): [...]
-Query shared action having id 100::
+Query indirect action having id 100::
- testpmd> flow shared_action 0 query 100
+ testpmd> flow indirect_action 0 query 100
Sample QinQ flow rules
~~~~~~~~~~~~~~~~~~~~~~
diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c
index fcaba2d..7e13b38 100644
--- a/drivers/net/mlx5/mlx5.c
+++ b/drivers/net/mlx5/mlx5.c
@@ -1421,7 +1421,7 @@ mlx5_dev_close(struct rte_eth_dev *dev)
* then this will return directly without any action.
*/
mlx5_flow_list_flush(dev, &priv->flows, true);
- mlx5_shared_action_flush(dev);
+ mlx5_action_handle_flush(dev);
mlx5_flow_meter_flush(dev, NULL);
/* Prevent crashes when queues are still in use. */
dev->rx_pkt_burst = removed_rx_burst;
diff --git a/drivers/net/mlx5/mlx5_defs.h b/drivers/net/mlx5/mlx5_defs.h
index 8f2807d..6e9c4b9 100644
--- a/drivers/net/mlx5/mlx5_defs.h
+++ b/drivers/net/mlx5/mlx5_defs.h
@@ -192,8 +192,8 @@
#define MLX5_HAIRPIN_QUEUE_STRIDE 6
#define MLX5_HAIRPIN_JUMBO_LOG_SIZE (14 + 2)
-/* Maximum number of shared actions supported by rte_flow */
-#define MLX5_MAX_SHARED_ACTIONS 2
+/* Maximum number of indirect actions supported by rte_flow */
+#define MLX5_MAX_INDIRECT_ACTIONS 2
/*
* Linux definition of static_assert is found in /usr/include/assert.h.
diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c
index d8e0bcb..bed8f31 100644
--- a/drivers/net/mlx5/mlx5_flow.c
+++ b/drivers/net/mlx5/mlx5_flow.c
@@ -567,23 +567,23 @@ static const struct mlx5_flow_expand_node mlx5_support_expansion[] = {
},
};
-static struct rte_flow_shared_action *
-mlx5_shared_action_create(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action_conf *conf,
+static struct rte_flow_action_handle *
+mlx5_action_handle_create(struct rte_eth_dev *dev,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action,
struct rte_flow_error *error);
-static int mlx5_shared_action_destroy
+static int mlx5_action_handle_destroy
(struct rte_eth_dev *dev,
- struct rte_flow_shared_action *shared_action,
+ struct rte_flow_action_handle *handle,
struct rte_flow_error *error);
-static int mlx5_shared_action_update
+static int mlx5_action_handle_update
(struct rte_eth_dev *dev,
- struct rte_flow_shared_action *shared_action,
- const struct rte_flow_action *action,
+ struct rte_flow_action_handle *handle,
+ const void *update,
struct rte_flow_error *error);
-static int mlx5_shared_action_query
+static int mlx5_action_handle_query
(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action *action,
+ const struct rte_flow_action_handle *handle,
void *data,
struct rte_flow_error *error);
static int
@@ -622,10 +622,10 @@ static const struct rte_flow_ops mlx5_flow_ops = {
.query = mlx5_flow_query,
.dev_dump = mlx5_flow_dev_dump,
.get_aged_flows = mlx5_flow_get_aged_flows,
- .shared_action_create = mlx5_shared_action_create,
- .shared_action_destroy = mlx5_shared_action_destroy,
- .shared_action_update = mlx5_shared_action_update,
- .shared_action_query = mlx5_shared_action_query,
+ .action_handle_create = mlx5_action_handle_create,
+ .action_handle_destroy = mlx5_action_handle_destroy,
+ .action_handle_update = mlx5_action_handle_update,
+ .action_handle_query = mlx5_action_handle_query,
.tunnel_decap_set = mlx5_flow_tunnel_decap_set,
.tunnel_match = mlx5_flow_tunnel_match,
.tunnel_action_decap_release = mlx5_flow_tunnel_action_release,
@@ -3402,31 +3402,31 @@ flow_aso_age_get_by_idx(struct rte_eth_dev *dev, uint32_t age_idx)
return &pool->actions[offset - 1];
}
-/* maps shared action to translated non shared in some actions array */
-struct mlx5_translated_shared_action {
- struct rte_flow_shared_action *action; /**< Shared action */
- int index; /**< Index in related array of rte_flow_action */
+/* maps indirect action to translated direct in some actions array */
+struct mlx5_translated_action_handle {
+ struct rte_flow_action_handle *action; /**< Indirect action handle. */
+ int index; /**< Index in related array of rte_flow_action. */
};
/**
- * Translates actions of type RTE_FLOW_ACTION_TYPE_SHARED to related
- * non shared action if translation possible.
- * This functionality used to run same execution path for both shared & non
- * shared actions on flow create. All necessary preparations for shared
- * action handling should be preformed on *shared* actions list returned
+ * Translates actions of type RTE_FLOW_ACTION_TYPE_INDIRECT to related
+ * direct action if translation possible.
+ * This functionality used to run same execution path for both direct and
+ * indirect actions on flow create. All necessary preparations for indirect
+ * action handling should be performed on *handle* actions list returned
* from this call.
*
* @param[in] dev
* Pointer to Ethernet device.
* @param[in] actions
* List of actions to translate.
- * @param[out] shared
- * List to store translated shared actions.
- * @param[in, out] shared_n
- * Size of *shared* array. On return should be updated with number of shared
- * actions retrieved from the *actions* list.
+ * @param[out] handle
+ * List to store translated indirect action object handles.
+ * @param[in, out] indir_n
+ * Size of *handle* array. On return should be updated with number of
+ * indirect actions retrieved from the *actions* list.
* @param[out] translated_actions
- * List of actions where all shared actions were translated to non shared
+ * List of actions where all indirect actions were translated to direct
* if possible. NULL if no translation took place.
* @param[out] error
* Pointer to the error structure.
@@ -3435,10 +3435,10 @@ struct mlx5_translated_shared_action {
* 0 on success, a negative errno value otherwise and rte_errno is set.
*/
static int
-flow_shared_actions_translate(struct rte_eth_dev *dev,
+flow_action_handles_translate(struct rte_eth_dev *dev,
const struct rte_flow_action actions[],
- struct mlx5_translated_shared_action *shared,
- int *shared_n,
+ struct mlx5_translated_action_handle *handle,
+ int *indir_n,
struct rte_flow_action **translated_actions,
struct rte_flow_error *error)
{
@@ -3447,23 +3447,23 @@ flow_shared_actions_translate(struct rte_eth_dev *dev,
size_t actions_size;
int n;
int copied_n = 0;
- struct mlx5_translated_shared_action *shared_end = NULL;
+ struct mlx5_translated_action_handle *handle_end = NULL;
for (n = 0; actions[n].type != RTE_FLOW_ACTION_TYPE_END; n++) {
- if (actions[n].type != RTE_FLOW_ACTION_TYPE_SHARED)
+ if (actions[n].type != RTE_FLOW_ACTION_TYPE_INDIRECT)
continue;
- if (copied_n == *shared_n) {
+ if (copied_n == *indir_n) {
return rte_flow_error_set
(error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_NUM,
NULL, "too many shared actions");
}
- rte_memcpy(&shared[copied_n].action, &actions[n].conf,
+ rte_memcpy(&handle[copied_n].action, &actions[n].conf,
sizeof(actions[n].conf));
- shared[copied_n].index = n;
+ handle[copied_n].index = n;
copied_n++;
}
n++;
- *shared_n = copied_n;
+ *indir_n = copied_n;
if (!copied_n)
return 0;
actions_size = sizeof(struct rte_flow_action) * n;
@@ -3473,28 +3473,28 @@ flow_shared_actions_translate(struct rte_eth_dev *dev,
return -ENOMEM;
}
memcpy(translated, actions, actions_size);
- for (shared_end = shared + copied_n; shared < shared_end; shared++) {
+ for (handle_end = handle + copied_n; handle < handle_end; handle++) {
struct mlx5_shared_action_rss *shared_rss;
- uint32_t act_idx = (uint32_t)(uintptr_t)shared->action;
- uint32_t type = act_idx >> MLX5_SHARED_ACTION_TYPE_OFFSET;
- uint32_t idx = act_idx & ((1u << MLX5_SHARED_ACTION_TYPE_OFFSET)
- - 1);
+ uint32_t act_idx = (uint32_t)(uintptr_t)handle->action;
+ uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
+ uint32_t idx = act_idx &
+ ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
switch (type) {
- case MLX5_SHARED_ACTION_TYPE_RSS:
+ case MLX5_INDIRECT_ACTION_TYPE_RSS:
shared_rss = mlx5_ipool_get
(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
- translated[shared->index].type =
+ translated[handle->index].type =
RTE_FLOW_ACTION_TYPE_RSS;
- translated[shared->index].conf =
+ translated[handle->index].conf =
&shared_rss->origin;
break;
- case MLX5_SHARED_ACTION_TYPE_AGE:
+ case MLX5_INDIRECT_ACTION_TYPE_AGE:
if (priv->sh->flow_hit_aso_en) {
- translated[shared->index].type =
+ translated[handle->index].type =
(enum rte_flow_action_type)
MLX5_RTE_FLOW_ACTION_TYPE_AGE;
- translated[shared->index].conf =
+ translated[handle->index].conf =
(void *)(uintptr_t)idx;
break;
}
@@ -3503,7 +3503,7 @@ flow_shared_actions_translate(struct rte_eth_dev *dev,
mlx5_free(translated);
return rte_flow_error_set
(error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION,
- NULL, "invalid shared action type");
+ NULL, "invalid indirect action type");
}
}
*translated_actions = translated;
@@ -3525,21 +3525,21 @@ flow_shared_actions_translate(struct rte_eth_dev *dev,
*/
static uint32_t
flow_get_shared_rss_action(struct rte_eth_dev *dev,
- struct mlx5_translated_shared_action *shared,
+ struct mlx5_translated_action_handle *handle,
int shared_n)
{
- struct mlx5_translated_shared_action *shared_end;
+ struct mlx5_translated_action_handle *handle_end;
struct mlx5_priv *priv = dev->data->dev_private;
struct mlx5_shared_action_rss *shared_rss;
- for (shared_end = shared + shared_n; shared < shared_end; shared++) {
- uint32_t act_idx = (uint32_t)(uintptr_t)shared->action;
- uint32_t type = act_idx >> MLX5_SHARED_ACTION_TYPE_OFFSET;
+ for (handle_end = handle + shared_n; handle < handle_end; handle++) {
+ uint32_t act_idx = (uint32_t)(uintptr_t)handle->action;
+ uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
uint32_t idx = act_idx &
- ((1u << MLX5_SHARED_ACTION_TYPE_OFFSET) - 1);
+ ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
switch (type) {
- case MLX5_SHARED_ACTION_TYPE_RSS:
+ case MLX5_INDIRECT_ACTION_TYPE_RSS:
shared_rss = mlx5_ipool_get
(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
idx);
@@ -5664,9 +5664,9 @@ flow_list_create(struct rte_eth_dev *dev, uint32_t *list,
struct rte_flow *flow = NULL;
struct mlx5_flow *dev_flow;
const struct rte_flow_action_rss *rss = NULL;
- struct mlx5_translated_shared_action
- shared_actions[MLX5_MAX_SHARED_ACTIONS];
- int shared_actions_n = MLX5_MAX_SHARED_ACTIONS;
+ struct mlx5_translated_action_handle
+ indir_actions[MLX5_MAX_INDIRECT_ACTIONS];
+ int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS;
union {
struct mlx5_flow_expand_rss buf;
uint8_t buffer[2048];
@@ -5707,9 +5707,9 @@ flow_list_create(struct rte_eth_dev *dev, uint32_t *list,
MLX5_ASSERT(wks);
rss_desc = &wks->rss_desc;
- ret = flow_shared_actions_translate(dev, original_actions,
- shared_actions,
- &shared_actions_n,
+ ret = flow_action_handles_translate(dev, original_actions,
+ indir_actions,
+ &indir_actions_n,
&translated_actions, error);
if (ret < 0) {
MLX5_ASSERT(translated_actions == NULL);
@@ -5770,8 +5770,8 @@ flow_list_create(struct rte_eth_dev *dev, uint32_t *list,
buf->entries = 1;
buf->entry[0].pattern = (void *)(uintptr_t)items;
}
- rss_desc->shared_rss = flow_get_shared_rss_action(dev, shared_actions,
- shared_actions_n);
+ rss_desc->shared_rss = flow_get_shared_rss_action(dev, indir_actions,
+ indir_actions_n);
for (i = 0; i < buf->entries; ++i) {
/* Initialize flow split data. */
flow_split_info.prefix_layers = 0;
@@ -5950,14 +5950,14 @@ mlx5_flow_validate(struct rte_eth_dev *dev,
struct rte_flow_error *error)
{
int hairpin_flow;
- struct mlx5_translated_shared_action
- shared_actions[MLX5_MAX_SHARED_ACTIONS];
- int shared_actions_n = MLX5_MAX_SHARED_ACTIONS;
+ struct mlx5_translated_action_handle
+ indir_actions[MLX5_MAX_INDIRECT_ACTIONS];
+ int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS;
const struct rte_flow_action *actions;
struct rte_flow_action *translated_actions = NULL;
- int ret = flow_shared_actions_translate(dev, original_actions,
- shared_actions,
- &shared_actions_n,
+ int ret = flow_action_handles_translate(dev, original_actions,
+ indir_actions,
+ &indir_actions_n,
&translated_actions, error);
if (ret)
@@ -7391,12 +7391,12 @@ mlx5_flow_get_aged_flows(struct rte_eth_dev *dev, void **contexts,
/* Wrapper for driver action_validate op callback */
static int
flow_drv_action_validate(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action_conf *conf,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action,
const struct mlx5_flow_driver_ops *fops,
struct rte_flow_error *error)
{
- static const char err_msg[] = "shared action validation unsupported";
+ static const char err_msg[] = "indirect action validation unsupported";
if (!fops->action_validate) {
DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
@@ -7412,8 +7412,8 @@ flow_drv_action_validate(struct rte_eth_dev *dev,
*
* @param dev
* Pointer to Ethernet device structure.
- * @param[in] action
- * Handle for the shared action to be destroyed.
+ * @param[in] handle
+ * Handle for the indirect action object to be destroyed.
* @param[out] error
* Perform verbose error reporting if not NULL. PMDs initialize this
* structure in case of error only.
@@ -7424,11 +7424,11 @@ flow_drv_action_validate(struct rte_eth_dev *dev,
* @note: wrapper for driver action_create op callback.
*/
static int
-mlx5_shared_action_destroy(struct rte_eth_dev *dev,
- struct rte_flow_shared_action *action,
+mlx5_action_handle_destroy(struct rte_eth_dev *dev,
+ struct rte_flow_action_handle *handle,
struct rte_flow_error *error)
{
- static const char err_msg[] = "shared action destruction unsupported";
+ static const char err_msg[] = "indirect action destruction unsupported";
struct rte_flow_attr attr = { .transfer = 0 };
const struct mlx5_flow_driver_ops *fops =
flow_get_drv_ops(flow_get_drv_type(dev, &attr));
@@ -7439,18 +7439,18 @@ mlx5_shared_action_destroy(struct rte_eth_dev *dev,
NULL, err_msg);
return -rte_errno;
}
- return fops->action_destroy(dev, action, error);
+ return fops->action_destroy(dev, handle, error);
}
/* Wrapper for driver action_destroy op callback */
static int
flow_drv_action_update(struct rte_eth_dev *dev,
- struct rte_flow_shared_action *action,
- const void *action_conf,
+ struct rte_flow_action_handle *handle,
+ const void *update,
const struct mlx5_flow_driver_ops *fops,
struct rte_flow_error *error)
{
- static const char err_msg[] = "shared action update unsupported";
+ static const char err_msg[] = "indirect action update unsupported";
if (!fops->action_update) {
DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
@@ -7458,18 +7458,18 @@ flow_drv_action_update(struct rte_eth_dev *dev,
NULL, err_msg);
return -rte_errno;
}
- return fops->action_update(dev, action, action_conf, error);
+ return fops->action_update(dev, handle, update, error);
}
/* Wrapper for driver action_destroy op callback */
static int
flow_drv_action_query(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action *action,
+ const struct rte_flow_action_handle *handle,
void *data,
const struct mlx5_flow_driver_ops *fops,
struct rte_flow_error *error)
{
- static const char err_msg[] = "shared action query unsupported";
+ static const char err_msg[] = "indirect action query unsupported";
if (!fops->action_query) {
DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
@@ -7477,29 +7477,31 @@ flow_drv_action_query(struct rte_eth_dev *dev,
NULL, err_msg);
return -rte_errno;
}
- return fops->action_query(dev, action, data, error);
+ return fops->action_query(dev, handle, data, error);
}
/**
- * Create shared action for reuse in multiple flow rules.
+ * Create indirect action for reuse in multiple flow rules.
*
* @param dev
* Pointer to Ethernet device structure.
+ * @param conf
+ * Pointer to indirect action object configuration.
* @param[in] action
- * Action configuration for shared action creation.
+ * Action configuration for indirect action object creation.
* @param[out] error
* Perform verbose error reporting if not NULL. PMDs initialize this
* structure in case of error only.
* @return
* A valid handle in case of success, NULL otherwise and rte_errno is set.
*/
-static struct rte_flow_shared_action *
-mlx5_shared_action_create(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action_conf *conf,
+static struct rte_flow_action_handle *
+mlx5_action_handle_create(struct rte_eth_dev *dev,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action,
struct rte_flow_error *error)
{
- static const char err_msg[] = "shared action creation unsupported";
+ static const char err_msg[] = "indirect action creation unsupported";
struct rte_flow_attr attr = { .transfer = 0 };
const struct mlx5_flow_driver_ops *fops =
flow_get_drv_ops(flow_get_drv_type(dev, &attr));
@@ -7516,19 +7518,20 @@ mlx5_shared_action_create(struct rte_eth_dev *dev,
}
/**
- * Updates inplace the shared action configuration pointed by *action* handle
- * with the configuration provided as *action* argument.
- * The update of the shared action configuration effects all flow rules reusing
- * the action via handle.
+ * Updates inplace the indirect action configuration pointed by *handle*
+ * with the configuration provided as *update* argument.
+ * The update of the indirect action configuration effects all flow rules
+ * reusing the action via handle.
*
* @param dev
* Pointer to Ethernet device structure.
- * @param[in] shared_action
- * Handle for the shared action to be updated.
- * @param[in] action
+ * @param[in] handle
+ * Handle for the indirect action to be updated.
+ * @param[in] update
* Action specification used to modify the action pointed by handle.
- * *action* should be of same type with the action pointed by the *action*
- * handle argument, otherwise considered as invalid.
+ * *update* could be of same type with the action pointed by the *handle*
+ * handle argument, or some other structures like a wrapper, depending on
+ * the indirect action type.
* @param[out] error
* Perform verbose error reporting if not NULL. PMDs initialize this
* structure in case of error only.
@@ -7537,9 +7540,9 @@ mlx5_shared_action_create(struct rte_eth_dev *dev,
* 0 on success, a negative errno value otherwise and rte_errno is set.
*/
static int
-mlx5_shared_action_update(struct rte_eth_dev *dev,
- struct rte_flow_shared_action *shared_action,
- const struct rte_flow_action *action,
+mlx5_action_handle_update(struct rte_eth_dev *dev,
+ struct rte_flow_action_handle *handle,
+ const void *update,
struct rte_flow_error *error)
{
struct rte_flow_attr attr = { .transfer = 0 };
@@ -7547,26 +7550,27 @@ mlx5_shared_action_update(struct rte_eth_dev *dev,
flow_get_drv_ops(flow_get_drv_type(dev, &attr));
int ret;
- ret = flow_drv_action_validate(dev, NULL, action, fops, error);
+ ret = flow_drv_action_validate(dev, NULL,
+ (const struct rte_flow_action *)update, fops, error);
if (ret)
return ret;
- return flow_drv_action_update(dev, shared_action, action->conf, fops,
+ return flow_drv_action_update(dev, handle, update, fops,
error);
}
/**
- * Query the shared action by handle.
+ * Query the indirect action by handle.
*
* This function allows retrieving action-specific data such as counters.
* Data is gathered by special action which may be present/referenced in
* more than one flow rule definition.
*
- * \see RTE_FLOW_ACTION_TYPE_COUNT
+ * see @RTE_FLOW_ACTION_TYPE_COUNT
*
* @param dev
* Pointer to Ethernet device structure.
- * @param[in] action
- * Handle for the shared action to query.
+ * @param[in] handle
+ * Handle for the indirect action to query.
* @param[in, out] data
* Pointer to storage for the associated query data type.
* @param[out] error
@@ -7577,8 +7581,8 @@ mlx5_shared_action_update(struct rte_eth_dev *dev,
* 0 on success, a negative errno value otherwise and rte_errno is set.
*/
static int
-mlx5_shared_action_query(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action *action,
+mlx5_action_handle_query(struct rte_eth_dev *dev,
+ const struct rte_flow_action_handle *handle,
void *data,
struct rte_flow_error *error)
{
@@ -7586,11 +7590,11 @@ mlx5_shared_action_query(struct rte_eth_dev *dev,
const struct mlx5_flow_driver_ops *fops =
flow_get_drv_ops(flow_get_drv_type(dev, &attr));
- return flow_drv_action_query(dev, action, data, fops, error);
+ return flow_drv_action_query(dev, handle, data, fops, error);
}
/**
- * Destroy all shared actions.
+ * Destroy all indirect actions (shared RSS).
*
* @param dev
* Pointer to Ethernet device.
@@ -7599,7 +7603,7 @@ mlx5_shared_action_query(struct rte_eth_dev *dev,
* 0 on success, a negative errno value otherwise and rte_errno is set.
*/
int
-mlx5_shared_action_flush(struct rte_eth_dev *dev)
+mlx5_action_handle_flush(struct rte_eth_dev *dev)
{
struct rte_flow_error error;
struct mlx5_priv *priv = dev->data->dev_private;
@@ -7609,8 +7613,8 @@ mlx5_shared_action_flush(struct rte_eth_dev *dev)
ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
priv->rss_shared_actions, idx, shared_rss, next) {
- ret |= mlx5_shared_action_destroy(dev,
- (struct rte_flow_shared_action *)(uintptr_t)idx, &error);
+ ret |= mlx5_action_handle_destroy(dev,
+ (struct rte_flow_action_handle *)(uintptr_t)idx, &error);
}
return ret;
}
diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h
index a5b0802..1a74b17 100644
--- a/drivers/net/mlx5/mlx5_flow.h
+++ b/drivers/net/mlx5/mlx5_flow.h
@@ -38,11 +38,11 @@ enum mlx5_rte_flow_action_type {
MLX5_RTE_FLOW_ACTION_TYPE_AGE,
};
-#define MLX5_SHARED_ACTION_TYPE_OFFSET 30
+#define MLX5_INDIRECT_ACTION_TYPE_OFFSET 30
enum {
- MLX5_SHARED_ACTION_TYPE_RSS,
- MLX5_SHARED_ACTION_TYPE_AGE,
+ MLX5_INDIRECT_ACTION_TYPE_RSS,
+ MLX5_INDIRECT_ACTION_TYPE_AGE,
};
/* Matches on selected register. */
@@ -1037,7 +1037,7 @@ struct mlx5_shared_action_rss {
rte_spinlock_t action_rss_sl; /**< Shared RSS action spinlock. */
};
-struct rte_flow_shared_action {
+struct rte_flow_action_handle {
uint32_t id;
};
@@ -1123,26 +1123,26 @@ typedef int (*mlx5_flow_get_aged_flows_t)
struct rte_flow_error *error);
typedef int (*mlx5_flow_action_validate_t)
(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action_conf *conf,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action,
struct rte_flow_error *error);
-typedef struct rte_flow_shared_action *(*mlx5_flow_action_create_t)
+typedef struct rte_flow_action_handle *(*mlx5_flow_action_create_t)
(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action_conf *conf,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action,
struct rte_flow_error *error);
typedef int (*mlx5_flow_action_destroy_t)
(struct rte_eth_dev *dev,
- struct rte_flow_shared_action *action,
+ struct rte_flow_action_handle *action,
struct rte_flow_error *error);
typedef int (*mlx5_flow_action_update_t)
(struct rte_eth_dev *dev,
- struct rte_flow_shared_action *action,
- const void *action_conf,
+ struct rte_flow_action_handle *action,
+ const void *update,
struct rte_flow_error *error);
typedef int (*mlx5_flow_action_query_t)
(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action *action,
+ const struct rte_flow_action_handle *action,
void *data,
struct rte_flow_error *error);
typedef int (*mlx5_flow_sync_domain_t)
@@ -1400,7 +1400,7 @@ int mlx5_flow_destroy_policer_rules(struct rte_eth_dev *dev,
int mlx5_flow_meter_flush(struct rte_eth_dev *dev,
struct rte_mtr_error *error);
int mlx5_flow_dv_discover_counter_offset_support(struct rte_eth_dev *dev);
-int mlx5_shared_action_flush(struct rte_eth_dev *dev);
+int mlx5_action_handle_flush(struct rte_eth_dev *dev);
void mlx5_release_tunnel_hub(struct mlx5_dev_ctx_shared *sh, uint16_t port_id);
int mlx5_alloc_tunnel_hub(struct mlx5_dev_ctx_shared *sh);
diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index b443eb9..ffd9f63 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -13059,7 +13059,7 @@ __flow_dv_action_rss_setup(struct rte_eth_dev *dev,
*/
static uint32_t
__flow_dv_action_rss_create(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action_conf *conf,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action_rss *rss,
struct rte_flow_error *error)
{
@@ -13082,7 +13082,7 @@ __flow_dv_action_rss_create(struct rte_eth_dev *dev,
"cannot allocate resource memory");
goto error_rss_init;
}
- if (idx > (1u << MLX5_SHARED_ACTION_TYPE_OFFSET)) {
+ if (idx > (1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET)) {
rte_flow_error_set(error, E2BIG,
RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
"rss action number out of range");
@@ -13195,7 +13195,7 @@ __flow_dv_action_rss_release(struct rte_eth_dev *dev, uint32_t idx,
}
/**
- * Create shared action, lock free,
+ * Create indirect action, lock free,
* (mutex should be acquired by caller).
* Dispatcher for action type specific call.
*
@@ -13204,7 +13204,7 @@ __flow_dv_action_rss_release(struct rte_eth_dev *dev, uint32_t idx,
* @param[in] conf
* Shared action configuration.
* @param[in] action
- * Action specification used to create shared action.
+ * Action specification used to create indirect action.
* @param[out] error
* Perform verbose error reporting if not NULL. Initialized in case of
* error only.
@@ -13213,9 +13213,9 @@ __flow_dv_action_rss_release(struct rte_eth_dev *dev, uint32_t idx,
* A valid shared action handle in case of success, NULL otherwise and
* rte_errno is set.
*/
-static struct rte_flow_shared_action *
+static struct rte_flow_action_handle *
flow_dv_action_create(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action_conf *conf,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action,
struct rte_flow_error *err)
{
@@ -13225,13 +13225,13 @@ flow_dv_action_create(struct rte_eth_dev *dev,
switch (action->type) {
case RTE_FLOW_ACTION_TYPE_RSS:
ret = __flow_dv_action_rss_create(dev, conf, action->conf, err);
- idx = (MLX5_SHARED_ACTION_TYPE_RSS <<
- MLX5_SHARED_ACTION_TYPE_OFFSET) | ret;
+ idx = (MLX5_INDIRECT_ACTION_TYPE_RSS <<
+ MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
break;
case RTE_FLOW_ACTION_TYPE_AGE:
ret = flow_dv_translate_create_aso_age(dev, action->conf, err);
- idx = (MLX5_SHARED_ACTION_TYPE_AGE <<
- MLX5_SHARED_ACTION_TYPE_OFFSET) | ret;
+ idx = (MLX5_INDIRECT_ACTION_TYPE_AGE <<
+ MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
if (ret) {
struct mlx5_aso_age_action *aso_age =
flow_aso_age_get_by_idx(dev, ret);
@@ -13246,19 +13246,19 @@ flow_dv_action_create(struct rte_eth_dev *dev,
NULL, "action type not supported");
break;
}
- return ret ? (struct rte_flow_shared_action *)(uintptr_t)idx : NULL;
+ return ret ? (struct rte_flow_action_handle *)(uintptr_t)idx : NULL;
}
/**
- * Destroy the shared action.
+ * Destroy the indirect action.
* Release action related resources on the NIC and the memory.
* Lock free, (mutex should be acquired by caller).
* Dispatcher for action type specific call.
*
* @param[in] dev
* Pointer to the Ethernet device structure.
- * @param[in] action
- * The shared action object to be removed.
+ * @param[in] handle
+ * The indirect action object handle to be removed.
* @param[out] error
* Perform verbose error reporting if not NULL. Initialized in case of
* error only.
@@ -13268,25 +13268,25 @@ flow_dv_action_create(struct rte_eth_dev *dev,
*/
static int
flow_dv_action_destroy(struct rte_eth_dev *dev,
- struct rte_flow_shared_action *action,
+ struct rte_flow_action_handle *handle,
struct rte_flow_error *error)
{
- uint32_t act_idx = (uint32_t)(uintptr_t)action;
- uint32_t type = act_idx >> MLX5_SHARED_ACTION_TYPE_OFFSET;
- uint32_t idx = act_idx & ((1u << MLX5_SHARED_ACTION_TYPE_OFFSET) - 1);
+ uint32_t act_idx = (uint32_t)(uintptr_t)handle;
+ uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
+ uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
int ret;
switch (type) {
- case MLX5_SHARED_ACTION_TYPE_RSS:
+ case MLX5_INDIRECT_ACTION_TYPE_RSS:
return __flow_dv_action_rss_release(dev, idx, error);
- case MLX5_SHARED_ACTION_TYPE_AGE:
+ case MLX5_INDIRECT_ACTION_TYPE_AGE:
ret = flow_dv_aso_age_release(dev, idx);
if (ret)
/*
* In this case, the last flow has a reference will
* actually release the age action.
*/
- DRV_LOG(DEBUG, "Shared age action %" PRIu32 " was"
+ DRV_LOG(DEBUG, "Indirect age action %" PRIu32 " was"
" released with references %d.", idx, ret);
return 0;
default:
@@ -13369,12 +13369,13 @@ __flow_dv_action_rss_update(struct rte_eth_dev *dev, uint32_t idx,
*
* @param[in] dev
* Pointer to the Ethernet device structure.
- * @param[in] action
- * The shared action object to be updated.
- * @param[in] action_conf
- * Action specification used to modify *action*.
- * *action_conf* should be of type correlating with type of the *action*,
- * otherwise considered as invalid.
+ * @param[in] handle
+ * The indirect action object handle to be updated.
+ * @param[in] update
+ * Action specification used to modify the action pointed by *handle*.
+ * *update* could be of same type with the action pointed by the *handle*
+ * handle argument, or some other structures like a wrapper, depending on
+ * the indirect action type.
* @param[out] error
* Perform verbose error reporting if not NULL. Initialized in case of
* error only.
@@ -13384,16 +13385,18 @@ __flow_dv_action_rss_update(struct rte_eth_dev *dev, uint32_t idx,
*/
static int
flow_dv_action_update(struct rte_eth_dev *dev,
- struct rte_flow_shared_action *action,
- const void *action_conf,
+ struct rte_flow_action_handle *handle,
+ const void *update,
struct rte_flow_error *err)
{
- uint32_t act_idx = (uint32_t)(uintptr_t)action;
- uint32_t type = act_idx >> MLX5_SHARED_ACTION_TYPE_OFFSET;
- uint32_t idx = act_idx & ((1u << MLX5_SHARED_ACTION_TYPE_OFFSET) - 1);
+ uint32_t act_idx = (uint32_t)(uintptr_t)handle;
+ uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
+ uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
+ const void *action_conf;
switch (type) {
- case MLX5_SHARED_ACTION_TYPE_RSS:
+ case MLX5_INDIRECT_ACTION_TYPE_RSS:
+ action_conf = ((const struct rte_flow_action *)update)->conf;
return __flow_dv_action_rss_update(dev, idx, action_conf, err);
default:
return rte_flow_error_set(err, ENOTSUP,
@@ -13405,17 +13408,17 @@ flow_dv_action_update(struct rte_eth_dev *dev,
static int
flow_dv_action_query(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action *action, void *data,
+ const struct rte_flow_action_handle *handle, void *data,
struct rte_flow_error *error)
{
struct mlx5_age_param *age_param;
struct rte_flow_query_age *resp;
- uint32_t act_idx = (uint32_t)(uintptr_t)action;
- uint32_t type = act_idx >> MLX5_SHARED_ACTION_TYPE_OFFSET;
- uint32_t idx = act_idx & ((1u << MLX5_SHARED_ACTION_TYPE_OFFSET) - 1);
+ uint32_t act_idx = (uint32_t)(uintptr_t)handle;
+ uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
+ uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
switch (type) {
- case MLX5_SHARED_ACTION_TYPE_AGE:
+ case MLX5_INDIRECT_ACTION_TYPE_AGE:
age_param = &flow_aso_age_get_by_idx(dev, idx)->age_params;
resp = data;
resp->aged = __atomic_load_n(&age_param->state,
@@ -14347,7 +14350,7 @@ flow_dv_counter_allocate(struct rte_eth_dev *dev)
}
/**
- * Validate shared action.
+ * Validate indirect action.
* Dispatcher for action type specific validation.
*
* @param[in] dev
@@ -14355,7 +14358,7 @@ flow_dv_counter_allocate(struct rte_eth_dev *dev)
* @param[in] conf
* Shared action configuration.
* @param[in] action
- * The shared action object to validate.
+ * The indirect action object to validate.
* @param[out] error
* Perform verbose error reporting if not NULL. Initialized in case of
* error only.
@@ -14365,7 +14368,7 @@ flow_dv_counter_allocate(struct rte_eth_dev *dev)
*/
static int
flow_dv_action_validate(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action_conf *conf,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action,
struct rte_flow_error *err)
{
diff --git a/lib/librte_ethdev/rte_flow.c b/lib/librte_ethdev/rte_flow.c
index 7241f00..0d2610b 100644
--- a/lib/librte_ethdev/rte_flow.c
+++ b/lib/librte_ethdev/rte_flow.c
@@ -180,12 +180,12 @@ static const struct rte_flow_desc_data rte_flow_desc_action[] = {
MK_FLOW_ACTION(MODIFY_FIELD,
sizeof(struct rte_flow_action_modify_field)),
/**
- * Shared action represented as handle of type
- * (struct rte_flow_shared action *) stored in conf field (see
+ * Indirect action represented as handle of type
+ * (struct rte_flow_action_handle *) stored in conf field (see
* struct rte_flow_action); no need for additional structure to * store
- * shared action handle.
+ * indirect action handle.
*/
- MK_FLOW_ACTION(SHARED, 0),
+ MK_FLOW_ACTION(INDIRECT, 0),
};
int
@@ -1068,53 +1068,53 @@ rte_flow_get_aged_flows(uint16_t port_id, void **contexts,
NULL, rte_strerror(ENOTSUP));
}
-struct rte_flow_shared_action *
-rte_flow_shared_action_create(uint16_t port_id,
- const struct rte_flow_shared_action_conf *conf,
+struct rte_flow_action_handle *
+rte_flow_action_handle_create(uint16_t port_id,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action,
struct rte_flow_error *error)
{
- struct rte_flow_shared_action *shared_action;
+ struct rte_flow_action_handle *handle;
const struct rte_flow_ops *ops = rte_flow_ops_get(port_id, error);
if (unlikely(!ops))
return NULL;
- if (unlikely(!ops->shared_action_create)) {
+ if (unlikely(!ops->action_handle_create)) {
rte_flow_error_set(error, ENOSYS,
RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
rte_strerror(ENOSYS));
return NULL;
}
- shared_action = ops->shared_action_create(&rte_eth_devices[port_id],
- conf, action, error);
- if (shared_action == NULL)
+ handle = ops->action_handle_create(&rte_eth_devices[port_id],
+ conf, action, error);
+ if (handle == NULL)
flow_err(port_id, -rte_errno, error);
- return shared_action;
+ return handle;
}
int
-rte_flow_shared_action_destroy(uint16_t port_id,
- struct rte_flow_shared_action *action,
- struct rte_flow_error *error)
+rte_flow_action_handle_destroy(uint16_t port_id,
+ struct rte_flow_action_handle *handle,
+ struct rte_flow_error *error)
{
int ret;
const struct rte_flow_ops *ops = rte_flow_ops_get(port_id, error);
if (unlikely(!ops))
return -rte_errno;
- if (unlikely(!ops->shared_action_destroy))
+ if (unlikely(!ops->action_handle_destroy))
return rte_flow_error_set(error, ENOSYS,
RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
NULL, rte_strerror(ENOSYS));
- ret = ops->shared_action_destroy(&rte_eth_devices[port_id], action,
- error);
+ ret = ops->action_handle_destroy(&rte_eth_devices[port_id],
+ handle, error);
return flow_err(port_id, ret, error);
}
int
-rte_flow_shared_action_update(uint16_t port_id,
- struct rte_flow_shared_action *action,
- const struct rte_flow_action *update,
+rte_flow_action_handle_update(uint16_t port_id,
+ struct rte_flow_action_handle *handle,
+ const void *update,
struct rte_flow_error *error)
{
int ret;
@@ -1122,18 +1122,18 @@ rte_flow_shared_action_update(uint16_t port_id,
if (unlikely(!ops))
return -rte_errno;
- if (unlikely(!ops->shared_action_update))
+ if (unlikely(!ops->action_handle_update))
return rte_flow_error_set(error, ENOSYS,
RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
NULL, rte_strerror(ENOSYS));
- ret = ops->shared_action_update(&rte_eth_devices[port_id], action,
+ ret = ops->action_handle_update(&rte_eth_devices[port_id], handle,
update, error);
return flow_err(port_id, ret, error);
}
int
-rte_flow_shared_action_query(uint16_t port_id,
- const struct rte_flow_shared_action *action,
+rte_flow_action_handle_query(uint16_t port_id,
+ const struct rte_flow_action_handle *handle,
void *data,
struct rte_flow_error *error)
{
@@ -1142,11 +1142,11 @@ rte_flow_shared_action_query(uint16_t port_id,
if (unlikely(!ops))
return -rte_errno;
- if (unlikely(!ops->shared_action_query))
+ if (unlikely(!ops->action_handle_query))
return rte_flow_error_set(error, ENOSYS,
RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
NULL, rte_strerror(ENOSYS));
- ret = ops->shared_action_query(&rte_eth_devices[port_id], action,
+ ret = ops->action_handle_query(&rte_eth_devices[port_id], handle,
data, error);
return flow_err(port_id, ret, error);
}
diff --git a/lib/librte_ethdev/rte_flow.h b/lib/librte_ethdev/rte_flow.h
index 203c4cd..0447d36 100644
--- a/lib/librte_ethdev/rte_flow.h
+++ b/lib/librte_ethdev/rte_flow.h
@@ -1821,7 +1821,7 @@ enum rte_flow_action_type {
* Enables counters for this flow rule.
*
* These counters can be retrieved and reset through rte_flow_query() or
- * rte_flow_shared_action_query() if the action provided via handle,
+ * rte_flow_action_handle_query() if the action provided via handle,
* see struct rte_flow_query_count.
*
* See struct rte_flow_action_count.
@@ -2250,6 +2250,9 @@ enum rte_flow_action_type {
RTE_FLOW_ACTION_TYPE_SAMPLE,
/**
+ * @deprecated
+ * @see RTE_FLOW_ACTION_TYPE_INDIRECT
+ *
* Describe action shared across multiple flow rules.
*
* Allow multiple rules reference the same action by handle (see
@@ -2267,6 +2270,14 @@ enum rte_flow_action_type {
* See struct rte_flow_action_modify_field.
*/
RTE_FLOW_ACTION_TYPE_MODIFY_FIELD,
+
+ /**
+ * An action handle is referenced in a rule through an indirect action.
+ *
+ * The same action handle may be used in multiple rules for the same
+ * or different ethdev ports.
+ */
+ RTE_FLOW_ACTION_TYPE_INDIRECT,
};
/**
@@ -2357,7 +2368,7 @@ struct rte_flow_query_age {
* ``struct rte_flow_query_count``.
*
* @deprecated Shared attribute is deprecated, use generic
- * RTE_FLOW_ACTION_TYPE_SHARED action.
+ * RTE_FLOW_ACTION_TYPE_INDIRECT action.
*
* The shared flag indicates whether the counter is unique to the flow rule the
* action is specified with, or whether it is a shared counter.
@@ -2847,17 +2858,23 @@ struct rte_flow_action_set_dscp {
};
/**
- * RTE_FLOW_ACTION_TYPE_SHARED
+ * @warning
+ * @b EXPERIMENTAL: this structure may change without prior notice
+ *
+ * RTE_FLOW_ACTION_TYPE_INDIRECT
*
- * Opaque type returned after successfully creating a shared action.
+ * Opaque type returned after successfully creating an indirect action object.
+ * The definition of the object handle is different per driver or
+ * per direct action type.
*
- * This handle can be used to manage and query the related action:
- * - share it across multiple flow rules
- * - update action configuration
- * - query action data
- * - destroy action
+ * This handle can be used to manage and query the related direct action:
+ * - referenced in single flow rule or across multiple flow rules
+ * over multiple ports
+ * - update action object configuration
+ * - query action object data
+ * - destroy action object
*/
-struct rte_flow_shared_action;
+struct rte_flow_action_handle;
/**
* Field IDs for MODIFY_FIELD action.
@@ -3631,25 +3648,22 @@ rte_flow_get_aged_flows(uint16_t port_id, void **contexts,
uint32_t nb_contexts, struct rte_flow_error *error);
/**
- * Specify shared action configuration
+ * Specify indirect action object configuration
*/
-struct rte_flow_shared_action_conf {
+struct rte_flow_indir_action_conf {
/**
- * Flow direction for shared action configuration.
+ * Flow direction for the indirect action configuration.
*
- * Shared action should be valid at least for one flow direction,
+ * Action should be valid at least for one flow direction,
* otherwise it is invalid for both ingress and egress rules.
*/
uint32_t ingress:1;
/**< Action valid for rules applied to ingress traffic. */
uint32_t egress:1;
/**< Action valid for rules applied to egress traffic. */
-
/**
* When set to 1, indicates that the action is valid for
* transfer traffic; otherwise, for non-transfer traffic.
- *
- * See struct rte_flow_attr.
*/
uint32_t transfer:1;
};
@@ -3658,16 +3672,17 @@ struct rte_flow_shared_action_conf {
* @warning
* @b EXPERIMENTAL: this API may change without prior notice.
*
- * Create shared action for reuse in multiple flow rules.
- * The created shared action has single state and configuration
- * across all flow rules using it.
+ * Create an indirect action object that can be used in flow rules
+ * via its handle.
+ * The created object handle has single state and configuration
+ * across all the flow rules using it.
*
* @param[in] port_id
* The port identifier of the Ethernet device.
* @param[in] conf
- * Shared action configuration.
+ * Action configuration for the indirect action object creation.
* @param[in] action
- * Action configuration for shared action creation.
+ * Specific configuration of the indirect action object.
* @param[out] error
* Perform verbose error reporting if not NULL. PMDs initialize this
* structure in case of error only.
@@ -3681,9 +3696,9 @@ struct rte_flow_shared_action_conf {
* - (ENOTSUP) if *action* valid but unsupported.
*/
__rte_experimental
-struct rte_flow_shared_action *
-rte_flow_shared_action_create(uint16_t port_id,
- const struct rte_flow_shared_action_conf *conf,
+struct rte_flow_action_handle *
+rte_flow_action_handle_create(uint16_t port_id,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action,
struct rte_flow_error *error);
@@ -3691,12 +3706,12 @@ rte_flow_shared_action_create(uint16_t port_id,
* @warning
* @b EXPERIMENTAL: this API may change without prior notice.
*
- * Destroy the shared action by handle.
+ * Destroy indirect action by handle.
*
* @param[in] port_id
* The port identifier of the Ethernet device.
- * @param[in] action
- * Handle for the shared action to be destroyed.
+ * @param[in] handle
+ * Handle for the indirect action object to be destroyed.
* @param[out] error
* Perform verbose error reporting if not NULL. PMDs initialize this
* structure in case of error only.
@@ -3711,27 +3726,30 @@ rte_flow_shared_action_create(uint16_t port_id,
*/
__rte_experimental
int
-rte_flow_shared_action_destroy(uint16_t port_id,
- struct rte_flow_shared_action *action,
+rte_flow_action_handle_destroy(uint16_t port_id,
+ struct rte_flow_action_handle *handle,
struct rte_flow_error *error);
/**
* @warning
* @b EXPERIMENTAL: this API may change without prior notice.
*
- * Update in-place the shared action configuration pointed by *action* handle
- * with the configuration provided as *update* argument.
- * The update of the shared action configuration effects all flow rules reusing
- * the action via handle.
+ * Update in-place the action configuration and / or state pointed
+ * by action *handle* with the configuration provided as *update* argument.
+ * The update of the action configuration effects all flow rules reusing
+ * the action via *handle*.
+ * The update general pointer provides the ability of partial updating.
*
* @param[in] port_id
* The port identifier of the Ethernet device.
- * @param[in] action
- * Handle for the shared action to be updated.
+ * @param[in] handle
+ * Handle for the indirect action object to be updated.
* @param[in] update
- * Action specification used to modify the action pointed by handle.
- * *update* should be of same type with the action pointed by the *action*
- * handle argument, otherwise considered as invalid.
+ * Update profile specification used to modify the action pointed by handle.
+ * *update* could be with the same type of the immediate action corresponding
+ * to the *handle* argument when creating, or a wrapper structure includes
+ * action configuration to be updated and bit fields to indicate the member
+ * of fields inside the action to update.
* @param[out] error
* Perform verbose error reporting if not NULL. PMDs initialize this
* structure in case of error only.
@@ -3742,32 +3760,32 @@ rte_flow_shared_action_destroy(uint16_t port_id,
* - (-EIO) if underlying device is removed.
* - (-EINVAL) if *update* invalid.
* - (-ENOTSUP) if *update* valid but unsupported.
- * - (-ENOENT) if action pointed by *ctx* was not found.
+ * - (-ENOENT) if indirect action object pointed by *handle* was not found.
* rte_errno is also set.
*/
__rte_experimental
int
-rte_flow_shared_action_update(uint16_t port_id,
- struct rte_flow_shared_action *action,
- const struct rte_flow_action *update,
+rte_flow_action_handle_update(uint16_t port_id,
+ struct rte_flow_action_handle *handle,
+ const void *update,
struct rte_flow_error *error);
/**
* @warning
* @b EXPERIMENTAL: this API may change without prior notice.
*
- * Query the shared action by handle.
+ * Query the direct action by corresponding indirect action object handle.
*
* Retrieve action-specific data such as counters.
* Data is gathered by special action which may be present/referenced in
* more than one flow rule definition.
*
- * \see RTE_FLOW_ACTION_TYPE_COUNT
+ * @see RTE_FLOW_ACTION_TYPE_COUNT
*
* @param port_id
* Port identifier of Ethernet device.
- * @param[in] action
- * Handle for the shared action to query.
+ * @param[in] handle
+ * Handle for the action object to query.
* @param[in, out] data
* Pointer to storage for the associated query data type.
* @param[out] error
@@ -3779,10 +3797,9 @@ rte_flow_shared_action_update(uint16_t port_id,
*/
__rte_experimental
int
-rte_flow_shared_action_query(uint16_t port_id,
- const struct rte_flow_shared_action *action,
- void *data,
- struct rte_flow_error *error);
+rte_flow_action_handle_query(uint16_t port_id,
+ const struct rte_flow_action_handle *handle,
+ void *data, struct rte_flow_error *error);
/* Tunnel has a type and the key information. */
struct rte_flow_tunnel {
diff --git a/lib/librte_ethdev/rte_flow_driver.h b/lib/librte_ethdev/rte_flow_driver.h
index 6ae1f8c..46f62c2 100644
--- a/lib/librte_ethdev/rte_flow_driver.h
+++ b/lib/librte_ethdev/rte_flow_driver.h
@@ -84,27 +84,27 @@ struct rte_flow_ops {
void **context,
uint32_t nb_contexts,
struct rte_flow_error *err);
- /** See rte_flow_shared_action_create() */
- struct rte_flow_shared_action *(*shared_action_create)
+ /** See rte_flow_action_handle_create() */
+ struct rte_flow_action_handle *(*action_handle_create)
(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action_conf *conf,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action,
struct rte_flow_error *error);
- /** See rte_flow_shared_action_destroy() */
- int (*shared_action_destroy)
+ /** See rte_flow_action_handle_destroy() */
+ int (*action_handle_destroy)
(struct rte_eth_dev *dev,
- struct rte_flow_shared_action *shared_action,
+ struct rte_flow_action_handle *handle,
struct rte_flow_error *error);
- /** See rte_flow_shared_action_update() */
- int (*shared_action_update)
+ /** See rte_flow_action_handle_update() */
+ int (*action_handle_update)
(struct rte_eth_dev *dev,
- struct rte_flow_shared_action *shared_action,
- const struct rte_flow_action *update,
+ struct rte_flow_action_handle *handle,
+ const void *update,
struct rte_flow_error *error);
- /** See rte_flow_shared_action_query() */
- int (*shared_action_query)
+ /** See rte_flow_action_handle_query() */
+ int (*action_handle_query)
(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action *shared_action,
+ const struct rte_flow_action_handle *handle,
void *data,
struct rte_flow_error *error);
/** See rte_flow_tunnel_decap_set() */
diff --git a/lib/librte_ethdev/version.map b/lib/librte_ethdev/version.map
index 93ad388..4eb561a 100644
--- a/lib/librte_ethdev/version.map
+++ b/lib/librte_ethdev/version.map
@@ -231,10 +231,6 @@ EXPERIMENTAL {
rte_eth_fec_get_capability;
rte_eth_fec_get;
rte_eth_fec_set;
- rte_flow_shared_action_create;
- rte_flow_shared_action_destroy;
- rte_flow_shared_action_query;
- rte_flow_shared_action_update;
rte_flow_tunnel_decap_set;
rte_flow_tunnel_match;
rte_flow_get_restore_info;
@@ -246,6 +242,10 @@ EXPERIMENTAL {
# added in 21.05
rte_eth_representor_info_get;
+ rte_flow_action_handle_create;
+ rte_flow_action_handle_destroy;
+ rte_flow_action_handle_update;
+ rte_flow_action_handle_query;
};
INTERNAL {
--
2.5.5
^ permalink raw reply [relevance 1%]
* Re: [dpdk-dev] [PATCH v7] ethdev: add queue state when retrieve queue information
2021-04-19 9:03 0% ` Thomas Monjalon
@ 2021-04-19 10:48 0% ` Ferruh Yigit
0 siblings, 0 replies; 200+ results
From: Ferruh Yigit @ 2021-04-19 10:48 UTC (permalink / raw)
To: Thomas Monjalon, Lijun Ou; +Cc: dev, linuxarm
On 4/19/2021 10:03 AM, Thomas Monjalon wrote:
> 19/04/2021 10:57, Lijun Ou:
>> Currently, upper-layer application could get queue state only
>> through pointers such as dev->data->tx_queue_state[queue_id],
>> this is not the recommended way to access it. So this patch
>> add get queue state when call rte_eth_rx_queue_info_get and
>> rte_eth_tx_queue_info_get API.
>>
>> Note: After add queue_state field, the 'struct rte_eth_rxq_info' size
>> remains 128B, and the 'struct rte_eth_txq_info' size remains 64B, so
>> it could be ABI compatible.
>>
>> Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
>> Signed-off-by: Lijun Ou <oulijun@huawei.com>
>> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
>
> Acked-by: Thomas Monjalon <thomas@monjalon.net>
>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Applied to dpdk-next-net/main, thanks.
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH v7] ethdev: add queue state when retrieve queue information
2021-04-19 8:57 3% ` [dpdk-dev] [PATCH v7] " Lijun Ou
@ 2021-04-19 9:03 0% ` Thomas Monjalon
2021-04-19 10:48 0% ` Ferruh Yigit
0 siblings, 1 reply; 200+ results
From: Thomas Monjalon @ 2021-04-19 9:03 UTC (permalink / raw)
To: Lijun Ou; +Cc: ferruh.yigit, dev, linuxarm
19/04/2021 10:57, Lijun Ou:
> Currently, upper-layer application could get queue state only
> through pointers such as dev->data->tx_queue_state[queue_id],
> this is not the recommended way to access it. So this patch
> add get queue state when call rte_eth_rx_queue_info_get and
> rte_eth_tx_queue_info_get API.
>
> Note: After add queue_state field, the 'struct rte_eth_rxq_info' size
> remains 128B, and the 'struct rte_eth_txq_info' size remains 64B, so
> it could be ABI compatible.
>
> Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
> Signed-off-by: Lijun Ou <oulijun@huawei.com>
> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH V6] ethdev: add queue state when retrieve queue information
2021-04-19 8:41 0% ` Thomas Monjalon
@ 2021-04-19 8:58 0% ` oulijun
0 siblings, 0 replies; 200+ results
From: oulijun @ 2021-04-19 8:58 UTC (permalink / raw)
To: Thomas Monjalon; +Cc: ferruh.yigit, dev, linuxarm
在 2021/4/19 16:41, Thomas Monjalon 写道:
> 19/04/2021 04:03, Lijun Ou:
>> --- a/doc/guides/rel_notes/release_21_05.rst
>> +++ b/doc/guides/rel_notes/release_21_05.rst
>> +* **Enhanced function for getting rxq/txq info ABI.**
>
> Reword: Added queue state in queried Rx/Tx queue info
>
>> + * Added new field ``queue_state`` to ``rte_eth_rxq_info`` structure to
>> + provide indicated rxq queue state.
>
> s/rxq queue/Rx queue/
>
>> + * Added new field ``queue_state`` to ``rte_eth_txq_info`` structure to
>> + provide indicated txq queue state.
>
> s/txq queue/Tx queue/
>
> Thanks
OK，I will fix it in the next version.
>
>
> .
>
^ permalink raw reply [relevance 0%]
* [dpdk-dev] [PATCH v7] ethdev: add queue state when retrieve queue information
2021-04-19 2:03 7% ` [dpdk-dev] [PATCH V6] " Lijun Ou
2021-04-19 8:41 0% ` Thomas Monjalon
@ 2021-04-19 8:57 3% ` Lijun Ou
2021-04-19 9:03 0% ` Thomas Monjalon
1 sibling, 1 reply; 200+ results
From: Lijun Ou @ 2021-04-19 8:57 UTC (permalink / raw)
To: thomas, ferruh.yigit; +Cc: dev, linuxarm
Currently, upper-layer application could get queue state only
through pointers such as dev->data->tx_queue_state[queue_id],
this is not the recommended way to access it. So this patch
add get queue state when call rte_eth_rx_queue_info_get and
rte_eth_tx_queue_info_get API.
Note: After add queue_state field, the 'struct rte_eth_rxq_info' size
remains 128B, and the 'struct rte_eth_txq_info' size remains 64B, so
it could be ABI compatible.
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Lijun Ou <oulijun@huawei.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
---
V6->V7:
- reword the note title for "New Feature"
- use Rx/Tx queue instead of rxq/txq queue
V5->V6:
- add updated update libabigail.abignore
V4->V5:
- add acked-by
- add a note to the "New features" section to annouce the new feature.
V3->V4:
- update libabigail.abignore for removing the CI warnings
V2->V3:
- rewrite the commit log and delete the part Note
- rewrite tht comments for queue state
- move the queue_state definition locations
V1->V2:
- move queue state defines to public file
---
devtools/libabigail.abignore | 12 +++++++++++-
doc/guides/rel_notes/release_21_05.rst | 6 ++++++
lib/librte_ethdev/ethdev_driver.h | 7 -------
lib/librte_ethdev/rte_ethdev.c | 3 +++
lib/librte_ethdev/rte_ethdev.h | 9 +++++++++
5 files changed, 29 insertions(+), 8 deletions(-)
diff --git a/devtools/libabigail.abignore b/devtools/libabigail.abignore
index 6c0b389..d8082cf 100644
--- a/devtools/libabigail.abignore
+++ b/devtools/libabigail.abignore
@@ -19,4 +19,14 @@
; Ignore fields inserted in cacheline boundary of rte_cryptodev
[suppress_type]
name = rte_cryptodev
- has_data_member_inserted_between = {offset_after(attached), end}
\ No newline at end of file
+ has_data_member_inserted_between = {offset_after(attached), end}
+
+; Ignore fields inserted in alignment hole of rte_eth_rxq_info
+[suppress_type]
+ name = rte_eth_rxq_info
+ has_data_member_inserted_at = offset_after(scattered_rx)
+
+; Ignore fields inserted in cacheline boundary of rte_eth_txq_info
+[suppress_type]
+ name = rte_eth_txq_info
+ has_data_member_inserted_between = {offset_after(nb_desc), end}
diff --git a/doc/guides/rel_notes/release_21_05.rst b/doc/guides/rel_notes/release_21_05.rst
index 58272e1..05b2f0c 100644
--- a/doc/guides/rel_notes/release_21_05.rst
+++ b/doc/guides/rel_notes/release_21_05.rst
@@ -81,6 +81,12 @@ New Features
representor=[[c#]pf#]sf# sf[0,2-1023] /* 1023 SFs. */
representor=[c#]pf# c2pf[0,1] /* 2 PFs on controller 2. */
+* **Added queue state in queried Rx/Tx queue info.**
+ * Added new field ``queue_state`` to ``rte_eth_rxq_info`` structure to
+ provide indicated Rx queue state.
+ * Added new field ``queue_state`` to ``rte_eth_txq_info`` structure to
+ provide indicated Tx queue state.
+
* **Added support for meter PPS profile.**
Currently meter algorithms only supports bytes per second(BPS).
diff --git a/lib/librte_ethdev/ethdev_driver.h b/lib/librte_ethdev/ethdev_driver.h
index 113129d..40e474a 100644
--- a/lib/librte_ethdev/ethdev_driver.h
+++ b/lib/librte_ethdev/ethdev_driver.h
@@ -952,13 +952,6 @@ struct eth_dev_ops {
};
/**
- * RX/TX queue states
- */
-#define RTE_ETH_QUEUE_STATE_STOPPED 0
-#define RTE_ETH_QUEUE_STATE_STARTED 1
-#define RTE_ETH_QUEUE_STATE_HAIRPIN 2
-
-/**
* @internal
* Check if the selected Rx queue is hairpin queue.
*
diff --git a/lib/librte_ethdev/rte_ethdev.c b/lib/librte_ethdev/rte_ethdev.c
index c73d263..d5adf4f 100644
--- a/lib/librte_ethdev/rte_ethdev.c
+++ b/lib/librte_ethdev/rte_ethdev.c
@@ -5038,6 +5038,8 @@ rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
memset(qinfo, 0, sizeof(*qinfo));
dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
+ qinfo->queue_state = dev->data->rx_queue_state[queue_id];
+
return 0;
}
@@ -5078,6 +5080,7 @@ rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
memset(qinfo, 0, sizeof(*qinfo));
dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
+ qinfo->queue_state = dev->data->tx_queue_state[queue_id];
return 0;
}
diff --git a/lib/librte_ethdev/rte_ethdev.h b/lib/librte_ethdev/rte_ethdev.h
index 3b773b6..a0d01d2 100644
--- a/lib/librte_ethdev/rte_ethdev.h
+++ b/lib/librte_ethdev/rte_ethdev.h
@@ -1588,6 +1588,13 @@ struct rte_eth_dev_info {
};
/**
+ * RX/TX queue states
+ */
+#define RTE_ETH_QUEUE_STATE_STOPPED 0
+#define RTE_ETH_QUEUE_STATE_STARTED 1
+#define RTE_ETH_QUEUE_STATE_HAIRPIN 2
+
+/**
* Ethernet device RX queue information structure.
* Used to retrieve information about configured queue.
*/
@@ -1595,6 +1602,7 @@ struct rte_eth_rxq_info {
struct rte_mempool *mp; /**< mempool used by that queue. */
struct rte_eth_rxconf conf; /**< queue config parameters. */
uint8_t scattered_rx; /**< scattered packets RX supported. */
+ uint8_t queue_state; /**< one of RTE_ETH_QUEUE_STATE_*. */
uint16_t nb_desc; /**< configured number of RXDs. */
uint16_t rx_buf_size; /**< hardware receive buffer size. */
} __rte_cache_min_aligned;
@@ -1606,6 +1614,7 @@ struct rte_eth_rxq_info {
struct rte_eth_txq_info {
struct rte_eth_txconf conf; /**< queue config parameters. */
uint16_t nb_desc; /**< configured number of TXDs. */
+ uint8_t queue_state; /**< one of RTE_ETH_QUEUE_STATE_*. */
} __rte_cache_min_aligned;
/* Generic Burst mode flag definition, values can be ORed. */
--
2.7.4
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [PATCH V6] ethdev: add queue state when retrieve queue information
2021-04-19 2:03 7% ` [dpdk-dev] [PATCH V6] " Lijun Ou
@ 2021-04-19 8:41 0% ` Thomas Monjalon
2021-04-19 8:58 0% ` oulijun
2021-04-19 8:57 3% ` [dpdk-dev] [PATCH v7] " Lijun Ou
1 sibling, 1 reply; 200+ results
From: Thomas Monjalon @ 2021-04-19 8:41 UTC (permalink / raw)
To: Lijun Ou; +Cc: ferruh.yigit, dev, linuxarm
19/04/2021 04:03, Lijun Ou:
> --- a/doc/guides/rel_notes/release_21_05.rst
> +++ b/doc/guides/rel_notes/release_21_05.rst
> +* **Enhanced function for getting rxq/txq info ABI.**
Reword: Added queue state in queried Rx/Tx queue info
> + * Added new field ``queue_state`` to ``rte_eth_rxq_info`` structure to
> + provide indicated rxq queue state.
s/rxq queue/Rx queue/
> + * Added new field ``queue_state`` to ``rte_eth_txq_info`` structure to
> + provide indicated txq queue state.
s/txq queue/Tx queue/
Thanks
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH V5] ethdev: add queue state when retrieve queue information
2021-04-17 22:00 0% ` Ferruh Yigit
2021-04-19 1:39 0% ` oulijun
@ 2021-04-19 2:04 0% ` oulijun
1 sibling, 0 replies; 200+ results
From: oulijun @ 2021-04-19 2:04 UTC (permalink / raw)
To: Ferruh Yigit, thomas; +Cc: dev, linuxarm
在 2021/4/18 6:00, Ferruh Yigit 写道:
> On 4/17/2021 4:09 AM, Lijun Ou wrote:
>> Currently, upper-layer application could get queue state only
>> through pointers such as dev->data->tx_queue_state[queue_id],
>> this is not the recommended way to access it. So this patch
>> add get queue state when call rte_eth_rx_queue_info_get and
>> rte_eth_tx_queue_info_get API.
>>
>> Note: After add queue_state field, the 'struct rte_eth_rxq_info' size
>> remains 128B, and the 'struct rte_eth_txq_info' size remains 64B, so
>> it could be ABI compatible.
>>
>> Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
>> Signed-off-by: Lijun Ou <oulijun@huawei.com>
>> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
>> ---
>> V4->V5:
>> - Add acked-by
>> - add a note to the "New features" section to annouce the new feature.
>>
>> V3->V4:
>> - update libabigail.abignore for removing the CI warnings
>>
>> V2->V3:
>> - rewrite the commit log and delete the part Note
>> - rewrite tht comments for queue state
>> - move the queue_state definition locations
>>
>> V1->V2:
>> - move queue state defines to public file
>> ---
>> doc/guides/rel_notes/release_21_05.rst | 6 ++++++
>> lib/librte_ethdev/ethdev_driver.h | 7 -------
>> lib/librte_ethdev/rte_ethdev.c | 3 +++
>> lib/librte_ethdev/rte_ethdev.h | 9 +++++++++
>> 4 files changed, 18 insertions(+), 7 deletions(-)
>
> missing 'libabigail.abignore' that was in v4?
> .
Sorry. thanks. I have sent the new version for V6.
>
^ permalink raw reply [relevance 0%]
* [dpdk-dev] [PATCH V6] ethdev: add queue state when retrieve queue information
2021-04-17 3:09 8% ` [dpdk-dev] [PATCH V5] " Lijun Ou
2021-04-17 22:00 0% ` Ferruh Yigit
@ 2021-04-19 2:03 7% ` Lijun Ou
2021-04-19 8:41 0% ` Thomas Monjalon
2021-04-19 8:57 3% ` [dpdk-dev] [PATCH v7] " Lijun Ou
2021-04-23 11:17 0% ` [dpdk-dev] [PATCH V5] " Kinsella, Ray
2 siblings, 2 replies; 200+ results
From: Lijun Ou @ 2021-04-19 2:03 UTC (permalink / raw)
To: thomas, ferruh.yigit; +Cc: dev, linuxarm
Currently, upper-layer application could get queue state only
through pointers such as dev->data->tx_queue_state[queue_id],
this is not the recommended way to access it. So this patch
add get queue state when call rte_eth_rx_queue_info_get and
rte_eth_tx_queue_info_get API.
Note: After add queue_state field, the 'struct rte_eth_rxq_info' size
remains 128B, and the 'struct rte_eth_txq_info' size remains 64B, so
it could be ABI compatible.
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Lijun Ou <oulijun@huawei.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
---
V5->V6:
- add updated update libabigail.abignore
V4->V5:
- add acked-by
- add a note to the "New features" section to annouce the new feature.
V3->V4:
- update libabigail.abignore for removing the CI warnings
V2->V3:
- rewrite the commit log and delete the part Note
- rewrite tht comments for queue state
- move the queue_state definition locations
V1->V2:
- move queue state defines to public file
---
devtools/libabigail.abignore | 12 +++++++++++-
doc/guides/rel_notes/release_21_05.rst | 6 ++++++
lib/librte_ethdev/ethdev_driver.h | 7 -------
lib/librte_ethdev/rte_ethdev.c | 3 +++
lib/librte_ethdev/rte_ethdev.h | 9 +++++++++
5 files changed, 29 insertions(+), 8 deletions(-)
diff --git a/devtools/libabigail.abignore b/devtools/libabigail.abignore
index 6c0b389..d8082cf 100644
--- a/devtools/libabigail.abignore
+++ b/devtools/libabigail.abignore
@@ -19,4 +19,14 @@
; Ignore fields inserted in cacheline boundary of rte_cryptodev
[suppress_type]
name = rte_cryptodev
- has_data_member_inserted_between = {offset_after(attached), end}
\ No newline at end of file
+ has_data_member_inserted_between = {offset_after(attached), end}
+
+; Ignore fields inserted in alignment hole of rte_eth_rxq_info
+[suppress_type]
+ name = rte_eth_rxq_info
+ has_data_member_inserted_at = offset_after(scattered_rx)
+
+; Ignore fields inserted in cacheline boundary of rte_eth_txq_info
+[suppress_type]
+ name = rte_eth_txq_info
+ has_data_member_inserted_between = {offset_after(nb_desc), end}
diff --git a/doc/guides/rel_notes/release_21_05.rst b/doc/guides/rel_notes/release_21_05.rst
index 58272e1..1ab3681 100644
--- a/doc/guides/rel_notes/release_21_05.rst
+++ b/doc/guides/rel_notes/release_21_05.rst
@@ -81,6 +81,12 @@ New Features
representor=[[c#]pf#]sf# sf[0,2-1023] /* 1023 SFs. */
representor=[c#]pf# c2pf[0,1] /* 2 PFs on controller 2. */
+* **Enhanced function for getting rxq/txq info ABI.**
+ * Added new field ``queue_state`` to ``rte_eth_rxq_info`` structure to
+ provide indicated rxq queue state.
+ * Added new field ``queue_state`` to ``rte_eth_txq_info`` structure to
+ provide indicated txq queue state.
+
* **Added support for meter PPS profile.**
Currently meter algorithms only supports bytes per second(BPS).
diff --git a/lib/librte_ethdev/ethdev_driver.h b/lib/librte_ethdev/ethdev_driver.h
index 113129d..40e474a 100644
--- a/lib/librte_ethdev/ethdev_driver.h
+++ b/lib/librte_ethdev/ethdev_driver.h
@@ -952,13 +952,6 @@ struct eth_dev_ops {
};
/**
- * RX/TX queue states
- */
-#define RTE_ETH_QUEUE_STATE_STOPPED 0
-#define RTE_ETH_QUEUE_STATE_STARTED 1
-#define RTE_ETH_QUEUE_STATE_HAIRPIN 2
-
-/**
* @internal
* Check if the selected Rx queue is hairpin queue.
*
diff --git a/lib/librte_ethdev/rte_ethdev.c b/lib/librte_ethdev/rte_ethdev.c
index c73d263..d5adf4f 100644
--- a/lib/librte_ethdev/rte_ethdev.c
+++ b/lib/librte_ethdev/rte_ethdev.c
@@ -5038,6 +5038,8 @@ rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
memset(qinfo, 0, sizeof(*qinfo));
dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
+ qinfo->queue_state = dev->data->rx_queue_state[queue_id];
+
return 0;
}
@@ -5078,6 +5080,7 @@ rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
memset(qinfo, 0, sizeof(*qinfo));
dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
+ qinfo->queue_state = dev->data->tx_queue_state[queue_id];
return 0;
}
diff --git a/lib/librte_ethdev/rte_ethdev.h b/lib/librte_ethdev/rte_ethdev.h
index 3b773b6..a0d01d2 100644
--- a/lib/librte_ethdev/rte_ethdev.h
+++ b/lib/librte_ethdev/rte_ethdev.h
@@ -1588,6 +1588,13 @@ struct rte_eth_dev_info {
};
/**
+ * RX/TX queue states
+ */
+#define RTE_ETH_QUEUE_STATE_STOPPED 0
+#define RTE_ETH_QUEUE_STATE_STARTED 1
+#define RTE_ETH_QUEUE_STATE_HAIRPIN 2
+
+/**
* Ethernet device RX queue information structure.
* Used to retrieve information about configured queue.
*/
@@ -1595,6 +1602,7 @@ struct rte_eth_rxq_info {
struct rte_mempool *mp; /**< mempool used by that queue. */
struct rte_eth_rxconf conf; /**< queue config parameters. */
uint8_t scattered_rx; /**< scattered packets RX supported. */
+ uint8_t queue_state; /**< one of RTE_ETH_QUEUE_STATE_*. */
uint16_t nb_desc; /**< configured number of RXDs. */
uint16_t rx_buf_size; /**< hardware receive buffer size. */
} __rte_cache_min_aligned;
@@ -1606,6 +1614,7 @@ struct rte_eth_rxq_info {
struct rte_eth_txq_info {
struct rte_eth_txconf conf; /**< queue config parameters. */
uint16_t nb_desc; /**< configured number of TXDs. */
+ uint8_t queue_state; /**< one of RTE_ETH_QUEUE_STATE_*. */
} __rte_cache_min_aligned;
/* Generic Burst mode flag definition, values can be ORed. */
--
2.7.4
^ permalink raw reply [relevance 7%]
* Re: [dpdk-dev] [PATCH V5] ethdev: add queue state when retrieve queue information
2021-04-17 22:00 0% ` Ferruh Yigit
@ 2021-04-19 1:39 0% ` oulijun
2021-04-19 2:04 0% ` oulijun
1 sibling, 0 replies; 200+ results
From: oulijun @ 2021-04-19 1:39 UTC (permalink / raw)
To: Ferruh Yigit, thomas; +Cc: dev, linuxarm
在 2021/4/18 6:00, Ferruh Yigit 写道:
> On 4/17/2021 4:09 AM, Lijun Ou wrote:
>> Currently, upper-layer application could get queue state only
>> through pointers such as dev->data->tx_queue_state[queue_id],
>> this is not the recommended way to access it. So this patch
>> add get queue state when call rte_eth_rx_queue_info_get and
>> rte_eth_tx_queue_info_get API.
>>
>> Note: After add queue_state field, the 'struct rte_eth_rxq_info' size
>> remains 128B, and the 'struct rte_eth_txq_info' size remains 64B, so
>> it could be ABI compatible.
>>
>> Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
>> Signed-off-by: Lijun Ou <oulijun@huawei.com>
>> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
>> ---
>> V4->V5:
>> - Add acked-by
>> - add a note to the "New features" section to annouce the new feature.
>>
>> V3->V4:
>> - update libabigail.abignore for removing the CI warnings
>>
>> V2->V3:
>> - rewrite the commit log and delete the part Note
>> - rewrite tht comments for queue state
>> - move the queue_state definition locations
>>
>> V1->V2:
>> - move queue state defines to public file
>> ---
>> doc/guides/rel_notes/release_21_05.rst | 6 ++++++
>> lib/librte_ethdev/ethdev_driver.h | 7 -------
>> lib/librte_ethdev/rte_ethdev.c | 3 +++
>> lib/librte_ethdev/rte_ethdev.h | 9 +++++++++
>> 4 files changed, 18 insertions(+), 7 deletions(-)
>
> missing 'libabigail.abignore' that was in v4?
> .
Yes. the CI is warning after I send the V3 with fix some comments.
Then I update liabigail.bignore, taking into account your comments with
thomas and send the V4.
>
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH] doc: announce modification in eventdev structure
2021-04-15 9:08 3% [dpdk-dev] [PATCH] doc: announce modification in eventdev structure gakhil
@ 2021-04-18 9:11 0% ` Jerin Jacob
2021-04-23 10:53 3% ` Kinsella, Ray
1 sibling, 0 replies; 200+ results
From: Jerin Jacob @ 2021-04-18 9:11 UTC (permalink / raw)
To: Akhil Goyal
Cc: Jerin Jacob, Thomas Monjalon, dpdk-dev, Ray Kinsella,
David Marchand, Gujjar, Abhinandan S, Hemant Agrawal,
Nipun Gupta, sachin.saxena, Anoob Joseph, Matan Azrad, Zhang,
Roy Fan, Gagandeep Singh, Erik Gabriel Carrillo, Jayatheerthan,
Jay, Pavan Nikhilesh, Van Haaren, Harry, Shijith Thotton
On Thu, Apr 15, 2021 at 2:39 PM <gakhil@marvell.com> wrote:
>
> From: Akhil Goyal <gakhil@marvell.com>
>
> A new field ``ca_enqueue`` is added in ``rte_eventdev``
> in the end to maintain ABI. It needs to be moved above
> in the structure to align with other enqueue callbacks.
>
> Signed-off-by: Akhil Goyal <gakhil@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
> ---
> doc/guides/rel_notes/deprecation.rst | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/doc/guides/rel_notes/deprecation.rst b/doc/guides/rel_notes/deprecation.rst
> index 2afc84c39..a973de4a9 100644
> --- a/doc/guides/rel_notes/deprecation.rst
> +++ b/doc/guides/rel_notes/deprecation.rst
> @@ -127,6 +127,10 @@ Deprecation Notices
> values to the function ``rte_event_eth_rx_adapter_queue_add`` using
> the structure ``rte_event_eth_rx_adapter_queue_add``.
>
> +* eventdev: The function pointer ``ca_enqueue`` in structure ``rte_eventdev``
> + will be moved after ``txa_enqueue`` so that all enqueue/dequeue
> + function pointers are adjacent to each other.
> +
> * sched: To allow more traffic classes, flexible mapping of pipe queues to
> traffic classes, and subport level configuration of pipes and queues
> changes will be made to macros, data structures and API functions defined
> --
> 2.25.1
>
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH V5] ethdev: add queue state when retrieve queue information
2021-04-17 3:09 8% ` [dpdk-dev] [PATCH V5] " Lijun Ou
@ 2021-04-17 22:00 0% ` Ferruh Yigit
2021-04-19 1:39 0% ` oulijun
2021-04-19 2:04 0% ` oulijun
2021-04-19 2:03 7% ` [dpdk-dev] [PATCH V6] " Lijun Ou
2021-04-23 11:17 0% ` [dpdk-dev] [PATCH V5] " Kinsella, Ray
2 siblings, 2 replies; 200+ results
From: Ferruh Yigit @ 2021-04-17 22:00 UTC (permalink / raw)
To: Lijun Ou, thomas; +Cc: dev, linuxarm
On 4/17/2021 4:09 AM, Lijun Ou wrote:
> Currently, upper-layer application could get queue state only
> through pointers such as dev->data->tx_queue_state[queue_id],
> this is not the recommended way to access it. So this patch
> add get queue state when call rte_eth_rx_queue_info_get and
> rte_eth_tx_queue_info_get API.
>
> Note: After add queue_state field, the 'struct rte_eth_rxq_info' size
> remains 128B, and the 'struct rte_eth_txq_info' size remains 64B, so
> it could be ABI compatible.
>
> Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
> Signed-off-by: Lijun Ou <oulijun@huawei.com>
> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
> ---
> V4->V5:
> - Add acked-by
> - add a note to the "New features" section to annouce the new feature.
>
> V3->V4:
> - update libabigail.abignore for removing the CI warnings
>
> V2->V3:
> - rewrite the commit log and delete the part Note
> - rewrite tht comments for queue state
> - move the queue_state definition locations
>
> V1->V2:
> - move queue state defines to public file
> ---
> doc/guides/rel_notes/release_21_05.rst | 6 ++++++
> lib/librte_ethdev/ethdev_driver.h | 7 -------
> lib/librte_ethdev/rte_ethdev.c | 3 +++
> lib/librte_ethdev/rte_ethdev.h | 9 +++++++++
> 4 files changed, 18 insertions(+), 7 deletions(-)
missing 'libabigail.abignore' that was in v4?
^ permalink raw reply [relevance 0%]
* [dpdk-dev] [PATCH V5] ethdev: add queue state when retrieve queue information
2021-04-16 8:46 8% ` [dpdk-dev] [PATCH V4] " Lijun Ou
2021-04-16 8:58 3% ` Thomas Monjalon
2021-04-16 9:19 0% ` Ananyev, Konstantin
@ 2021-04-17 3:09 8% ` Lijun Ou
2021-04-17 22:00 0% ` Ferruh Yigit
` (2 more replies)
2 siblings, 3 replies; 200+ results
From: Lijun Ou @ 2021-04-17 3:09 UTC (permalink / raw)
To: thomas, ferruh.yigit; +Cc: dev, linuxarm
Currently, upper-layer application could get queue state only
through pointers such as dev->data->tx_queue_state[queue_id],
this is not the recommended way to access it. So this patch
add get queue state when call rte_eth_rx_queue_info_get and
rte_eth_tx_queue_info_get API.
Note: After add queue_state field, the 'struct rte_eth_rxq_info' size
remains 128B, and the 'struct rte_eth_txq_info' size remains 64B, so
it could be ABI compatible.
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Lijun Ou <oulijun@huawei.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
---
V4->V5:
- Add acked-by
- add a note to the "New features" section to annouce the new feature.
V3->V4:
- update libabigail.abignore for removing the CI warnings
V2->V3:
- rewrite the commit log and delete the part Note
- rewrite tht comments for queue state
- move the queue_state definition locations
V1->V2:
- move queue state defines to public file
---
doc/guides/rel_notes/release_21_05.rst | 6 ++++++
lib/librte_ethdev/ethdev_driver.h | 7 -------
lib/librte_ethdev/rte_ethdev.c | 3 +++
lib/librte_ethdev/rte_ethdev.h | 9 +++++++++
4 files changed, 18 insertions(+), 7 deletions(-)
diff --git a/doc/guides/rel_notes/release_21_05.rst b/doc/guides/rel_notes/release_21_05.rst
index 58272e1..1ab3681 100644
--- a/doc/guides/rel_notes/release_21_05.rst
+++ b/doc/guides/rel_notes/release_21_05.rst
@@ -81,6 +81,12 @@ New Features
representor=[[c#]pf#]sf# sf[0,2-1023] /* 1023 SFs. */
representor=[c#]pf# c2pf[0,1] /* 2 PFs on controller 2. */
+* **Enhanced function for getting rxq/txq info ABI.**
+ * Added new field ``queue_state`` to ``rte_eth_rxq_info`` structure to
+ provide indicated rxq queue state.
+ * Added new field ``queue_state`` to ``rte_eth_txq_info`` structure to
+ provide indicated txq queue state.
+
* **Added support for meter PPS profile.**
Currently meter algorithms only supports bytes per second(BPS).
diff --git a/lib/librte_ethdev/ethdev_driver.h b/lib/librte_ethdev/ethdev_driver.h
index 113129d..40e474a 100644
--- a/lib/librte_ethdev/ethdev_driver.h
+++ b/lib/librte_ethdev/ethdev_driver.h
@@ -952,13 +952,6 @@ struct eth_dev_ops {
};
/**
- * RX/TX queue states
- */
-#define RTE_ETH_QUEUE_STATE_STOPPED 0
-#define RTE_ETH_QUEUE_STATE_STARTED 1
-#define RTE_ETH_QUEUE_STATE_HAIRPIN 2
-
-/**
* @internal
* Check if the selected Rx queue is hairpin queue.
*
diff --git a/lib/librte_ethdev/rte_ethdev.c b/lib/librte_ethdev/rte_ethdev.c
index c73d263..d5adf4f 100644
--- a/lib/librte_ethdev/rte_ethdev.c
+++ b/lib/librte_ethdev/rte_ethdev.c
@@ -5038,6 +5038,8 @@ rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
memset(qinfo, 0, sizeof(*qinfo));
dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
+ qinfo->queue_state = dev->data->rx_queue_state[queue_id];
+
return 0;
}
@@ -5078,6 +5080,7 @@ rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
memset(qinfo, 0, sizeof(*qinfo));
dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
+ qinfo->queue_state = dev->data->tx_queue_state[queue_id];
return 0;
}
diff --git a/lib/librte_ethdev/rte_ethdev.h b/lib/librte_ethdev/rte_ethdev.h
index 3b773b6..a0d01d2 100644
--- a/lib/librte_ethdev/rte_ethdev.h
+++ b/lib/librte_ethdev/rte_ethdev.h
@@ -1588,6 +1588,13 @@ struct rte_eth_dev_info {
};
/**
+ * RX/TX queue states
+ */
+#define RTE_ETH_QUEUE_STATE_STOPPED 0
+#define RTE_ETH_QUEUE_STATE_STARTED 1
+#define RTE_ETH_QUEUE_STATE_HAIRPIN 2
+
+/**
* Ethernet device RX queue information structure.
* Used to retrieve information about configured queue.
*/
@@ -1595,6 +1602,7 @@ struct rte_eth_rxq_info {
struct rte_mempool *mp; /**< mempool used by that queue. */
struct rte_eth_rxconf conf; /**< queue config parameters. */
uint8_t scattered_rx; /**< scattered packets RX supported. */
+ uint8_t queue_state; /**< one of RTE_ETH_QUEUE_STATE_*. */
uint16_t nb_desc; /**< configured number of RXDs. */
uint16_t rx_buf_size; /**< hardware receive buffer size. */
} __rte_cache_min_aligned;
@@ -1606,6 +1614,7 @@ struct rte_eth_rxq_info {
struct rte_eth_txq_info {
struct rte_eth_txconf conf; /**< queue config parameters. */
uint16_t nb_desc; /**< configured number of TXDs. */
+ uint8_t queue_state; /**< one of RTE_ETH_QUEUE_STATE_*. */
} __rte_cache_min_aligned;
/* Generic Burst mode flag definition, values can be ORed. */
--
2.7.4
^ permalink raw reply [relevance 8%]
* [dpdk-dev] [PATCH v4 1/1] ethdev: introduce indirect action APIs
@ 2021-04-16 17:33 1% ` Bing Zhao
0 siblings, 0 replies; 200+ results
From: Bing Zhao @ 2021-04-16 17:33 UTC (permalink / raw)
To: orika, thomas, ferruh.yigit, andrew.rybchenko, matan, viacheslavo
Cc: dev, ajit.khaparde, getelson, andreyv
Right now, rte_flow_shared_action_* APIs are used for some shared
actions, like RSS, count. The shared action should be created before
using it inside a flow. These shared actions sometimes are not
really shared but just some indirect actions decoupled from a flow.
The new functions rte_flow_action_handle_* are added to replace
the current shared functions rte_flow_shared_action_*.
There are two types of flow actions:
1. the direct (normal) actions that could be created and stored
within a flow rule. Such action is tied to its flow rule and
cannot be reused.
2. the indirect action, in the past, named shared_action. It is
created from a direct actioni, like count or rss, and then used
in the flow rules with an object handle. The PMD will take care
of the retrieve from indirect action to the direct action
when it is referenced.
The indirect action is accessed (update / query) w/o any flow rule,
just via the action object handle. For example, when querying or
resetting a counter, it could be done out of any flow using this
counter, but only the handle of the counter action object is
required.
The indirect action object could be shared by different flows or
used by a single flow, depending on the direct action type and
the real-life requirements.
The handle of an indirect action object is opaque and defined in
each driver and possibly different per direct action type.
The old name "shared" is improper in a sense and should be replaced.
Since the APIs are changed from "rte_flow_shared_action*" to the new
"rte_flow_action_handle*", the testpmd application code and command
line interfaces also need to be updated to do the adaption.
The testpmd application user guide is also updated. All the "shared
action" related parts are replaced with "indirect action" to have a
correct explanation.
The parameter of "update" interface is also changed. A general
pointer will replace the rte_flow_action struct pointer due to the
facts:
1. Some action may not support fields updating. In the example of a
counter, the only "update" supported should be the reset. So
passing a rte_flow_action struct pointer is meaningless and
there is even no such corresponding action struct. What's more,
if more than one operations should be supported, for some other
action, such pointer parameter may not meet the need.
2. Some action may need conditional or partial update, the current
parameter will not provide the ability to indicate which part(s)
to update.
For different types of indirect action objects, the pointer could
either be the same of rte_flow_action* struct - in order not to
break the current driver implementation, or some wrapper
structures with bits as masks to indicate which part to be
updated, depending on real needs of the corresponding direct
action. For different direct actions, the structures of indirect
action objects updating will be different.
All the underlayer PMD callbacks will be moved to these new APIs.
The RTE_FLOW_ACTION_TYPE_SHARED is kept for now in order not to
break the ABI. All the implementations are changed by using
RTE_FLOW_ACTION_TYPE_INDIRECT.
Since the APIs are changed from "rte_flow_shared_action*" to the new
"rte_flow_action_handle*" and the "update" interface's 3rd input
parameter is changed to generic pointer, the mlx5 PMD that uses these
APIs needs to do the adaption to the new APIs as well.
Signed-off-by: Bing Zhao <bingz@nvidia.com>
Acked-by: Andrey Vesnovaty <andreyv@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
---
app/test-pmd/cmdline.c | 24 +-
app/test-pmd/cmdline_flow.c | 252 ++++++++++----------
app/test-pmd/config.c | 160 ++++++-------
app/test-pmd/testpmd.h | 28 +--
doc/guides/prog_guide/rte_flow.rst | 29 +--
doc/guides/rel_notes/release_21_05.rst | 3 +
doc/guides/testpmd_app_ug/testpmd_funcs.rst | 102 ++++----
drivers/net/mlx5/mlx5.c | 2 +-
drivers/net/mlx5/mlx5_defs.h | 4 +-
drivers/net/mlx5/mlx5_flow.c | 238 +++++++++---------
drivers/net/mlx5/mlx5_flow.h | 24 +-
drivers/net/mlx5/mlx5_flow_dv.c | 85 +++----
lib/librte_ethdev/rte_flow.c | 56 ++---
lib/librte_ethdev/rte_flow.h | 118 +++++----
lib/librte_ethdev/rte_flow_driver.h | 26 +-
lib/librte_ethdev/version.map | 8 +-
16 files changed, 593 insertions(+), 566 deletions(-)
diff --git a/app/test-pmd/cmdline.c b/app/test-pmd/cmdline.c
index 5bf1497f2b..4d9e038ce8 100644
--- a/app/test-pmd/cmdline.c
+++ b/app/test-pmd/cmdline.c
@@ -1002,23 +1002,23 @@ static void cmd_help_long_parsed(void *parsed_result,
" List and destroy aged flows"
" flow rules\n\n"
- "flow shared_action {port_id} create"
- " [action_id {shared_action_id}]"
+ "flow indirect_action {port_id} create"
+ " [action_id {indirect_action_id}]"
" [ingress] [egress]"
" action {action} / end\n"
- " Create shared action.\n\n"
+ " Create indirect action.\n\n"
- "flow shared_action {port_id} update"
- " {shared_action_id} action {action} / end\n"
- " Update shared action.\n\n"
+ "flow indirect_action {port_id} update"
+ " {indirect_action_id} action {action} / end\n"
+ " Update indirect action.\n\n"
- "flow shared_action {port_id} destroy"
- " action_id {shared_action_id} [...]\n"
- " Destroy specific shared actions.\n\n"
+ "flow indirect_action {port_id} destroy"
+ " action_id {indirect_action_id} [...]\n"
+ " Destroy specific indirect actions.\n\n"
- "flow shared_action {port_id} query"
- " {shared_action_id}\n"
- " Query an existing shared action.\n\n"
+ "flow indirect_action {port_id} query"
+ " {indirect_action_id}\n"
+ " Query an existing indirect action.\n\n"
"set vxlan ip-version (ipv4|ipv6) vni (vni) udp-src"
" (udp-src) udp-dst (udp-dst) ip-src (ip-src) ip-dst"
diff --git a/app/test-pmd/cmdline_flow.c b/app/test-pmd/cmdline_flow.c
index 0127d9e7d6..c5381c638b 100644
--- a/app/test-pmd/cmdline_flow.c
+++ b/app/test-pmd/cmdline_flow.c
@@ -54,7 +54,7 @@ enum index {
PORT_ID,
GROUP_ID,
PRIORITY_LEVEL,
- SHARED_ACTION_ID,
+ INDIRECT_ACTION_ID,
/* Top-level command. */
SET,
@@ -68,7 +68,7 @@ enum index {
/* Top-level command. */
FLOW,
/* Sub-level commands. */
- SHARED_ACTION,
+ INDIRECT_ACTION,
VALIDATE,
CREATE,
DESTROY,
@@ -112,21 +112,21 @@ enum index {
DUMP_ALL,
DUMP_ONE,
- /* Shared action arguments */
- SHARED_ACTION_CREATE,
- SHARED_ACTION_UPDATE,
- SHARED_ACTION_DESTROY,
- SHARED_ACTION_QUERY,
+ /* Indirect action arguments */
+ INDIRECT_ACTION_CREATE,
+ INDIRECT_ACTION_UPDATE,
+ INDIRECT_ACTION_DESTROY,
+ INDIRECT_ACTION_QUERY,
- /* Shared action create arguments */
- SHARED_ACTION_CREATE_ID,
- SHARED_ACTION_INGRESS,
- SHARED_ACTION_EGRESS,
- SHARED_ACTION_TRANSFER,
- SHARED_ACTION_SPEC,
+ /* Indirect action create arguments */
+ INDIRECT_ACTION_CREATE_ID,
+ INDIRECT_ACTION_INGRESS,
+ INDIRECT_ACTION_EGRESS,
+ INDIRECT_ACTION_TRANSFER,
+ INDIRECT_ACTION_SPEC,
- /* Shared action destroy arguments */
- SHARED_ACTION_DESTROY_ID,
+ /* Indirect action destroy arguments */
+ INDIRECT_ACTION_DESTROY_ID,
/* Validate/create pattern. */
PATTERN,
@@ -416,8 +416,8 @@ enum index {
ACTION_SAMPLE_RATIO,
ACTION_SAMPLE_INDEX,
ACTION_SAMPLE_INDEX_VALUE,
- ACTION_SHARED,
- SHARED_ACTION_ID2PTR,
+ ACTION_INDIRECT,
+ INDIRECT_ACTION_ID2PTR,
ACTION_MODIFY_FIELD,
ACTION_MODIFY_FIELD_OP,
ACTION_MODIFY_FIELD_OP_VALUE,
@@ -778,10 +778,10 @@ struct buffer {
struct {
uint32_t *action_id;
uint32_t action_id_n;
- } sa_destroy; /**< Shared action destroy arguments. */
+ } ia_destroy; /**< Indirect action destroy arguments. */
struct {
uint32_t action_id;
- } sa; /* Shared action query arguments */
+ } ia; /* Indirect action query arguments */
struct {
struct rte_flow_attr attr;
struct tunnel_ops tunnel_ops;
@@ -841,12 +841,12 @@ struct parse_action_priv {
.size = s, \
})
-static const enum index next_sa_create_attr[] = {
- SHARED_ACTION_CREATE_ID,
- SHARED_ACTION_INGRESS,
- SHARED_ACTION_EGRESS,
- SHARED_ACTION_TRANSFER,
- SHARED_ACTION_SPEC,
+static const enum index next_ia_create_attr[] = {
+ INDIRECT_ACTION_CREATE_ID,
+ INDIRECT_ACTION_INGRESS,
+ INDIRECT_ACTION_EGRESS,
+ INDIRECT_ACTION_TRANSFER,
+ INDIRECT_ACTION_SPEC,
ZERO,
};
@@ -856,11 +856,11 @@ static const enum index next_dump_subcmd[] = {
ZERO,
};
-static const enum index next_sa_subcmd[] = {
- SHARED_ACTION_CREATE,
- SHARED_ACTION_UPDATE,
- SHARED_ACTION_DESTROY,
- SHARED_ACTION_QUERY,
+static const enum index next_ia_subcmd[] = {
+ INDIRECT_ACTION_CREATE,
+ INDIRECT_ACTION_UPDATE,
+ INDIRECT_ACTION_DESTROY,
+ INDIRECT_ACTION_QUERY,
ZERO,
};
@@ -900,8 +900,8 @@ static const enum index next_aged_attr[] = {
ZERO,
};
-static const enum index next_sa_destroy_attr[] = {
- SHARED_ACTION_DESTROY_ID,
+static const enum index next_ia_destroy_attr[] = {
+ INDIRECT_ACTION_DESTROY_ID,
END,
ZERO,
};
@@ -1380,7 +1380,7 @@ static const enum index next_action[] = {
ACTION_SET_IPV6_DSCP,
ACTION_AGE,
ACTION_SAMPLE,
- ACTION_SHARED,
+ ACTION_INDIRECT,
ACTION_MODIFY_FIELD,
ZERO,
};
@@ -1797,13 +1797,13 @@ static int parse_ipv6_addr(struct context *, const struct token *,
static int parse_port(struct context *, const struct token *,
const char *, unsigned int,
void *, unsigned int);
-static int parse_sa(struct context *, const struct token *,
+static int parse_ia(struct context *, const struct token *,
const char *, unsigned int,
void *, unsigned int);
-static int parse_sa_destroy(struct context *ctx, const struct token *token,
+static int parse_ia_destroy(struct context *ctx, const struct token *token,
const char *str, unsigned int len,
void *buf, unsigned int size);
-static int parse_sa_id2ptr(struct context *ctx, const struct token *token,
+static int parse_ia_id2ptr(struct context *ctx, const struct token *token,
const char *str, unsigned int len, void *buf,
unsigned int size);
static int comp_none(struct context *, const struct token *,
@@ -1950,10 +1950,10 @@ static const struct token token_list[] = {
.call = parse_int,
.comp = comp_none,
},
- [SHARED_ACTION_ID] = {
- .name = "{shared_action_id}",
- .type = "SHARED_ACTION_ID",
- .help = "shared action id",
+ [INDIRECT_ACTION_ID] = {
+ .name = "{indirect_action_id}",
+ .type = "INDIRECT_ACTION_ID",
+ .help = "indirect action id",
.call = parse_int,
.comp = comp_none,
},
@@ -1963,7 +1963,7 @@ static const struct token token_list[] = {
.type = "{command} {port_id} [{arg} [...]]",
.help = "manage ingress/egress flow rules",
.next = NEXT(NEXT_ENTRY
- (SHARED_ACTION,
+ (INDIRECT_ACTION,
VALIDATE,
CREATE,
DESTROY,
@@ -1977,42 +1977,42 @@ static const struct token token_list[] = {
.call = parse_init,
},
/* Top-level command. */
- [SHARED_ACTION] = {
- .name = "shared_action",
+ [INDIRECT_ACTION] = {
+ .name = "indirect_action",
.type = "{command} {port_id} [{arg} [...]]",
- .help = "manage shared actions",
- .next = NEXT(next_sa_subcmd, NEXT_ENTRY(PORT_ID)),
+ .help = "manage indirect actions",
+ .next = NEXT(next_ia_subcmd, NEXT_ENTRY(PORT_ID)),
.args = ARGS(ARGS_ENTRY(struct buffer, port)),
- .call = parse_sa,
+ .call = parse_ia,
},
/* Sub-level commands. */
- [SHARED_ACTION_CREATE] = {
+ [INDIRECT_ACTION_CREATE] = {
.name = "create",
- .help = "create shared action",
- .next = NEXT(next_sa_create_attr),
- .call = parse_sa,
+ .help = "create indirect action",
+ .next = NEXT(next_ia_create_attr),
+ .call = parse_ia,
},
- [SHARED_ACTION_UPDATE] = {
+ [INDIRECT_ACTION_UPDATE] = {
.name = "update",
- .help = "update shared action",
- .next = NEXT(NEXT_ENTRY(SHARED_ACTION_SPEC),
- NEXT_ENTRY(SHARED_ACTION_ID)),
+ .help = "update indirect action",
+ .next = NEXT(NEXT_ENTRY(INDIRECT_ACTION_SPEC),
+ NEXT_ENTRY(INDIRECT_ACTION_ID)),
.args = ARGS(ARGS_ENTRY(struct buffer, args.vc.attr.group)),
- .call = parse_sa,
+ .call = parse_ia,
},
- [SHARED_ACTION_DESTROY] = {
+ [INDIRECT_ACTION_DESTROY] = {
.name = "destroy",
- .help = "destroy shared action",
- .next = NEXT(NEXT_ENTRY(SHARED_ACTION_DESTROY_ID)),
+ .help = "destroy indirect action",
+ .next = NEXT(NEXT_ENTRY(INDIRECT_ACTION_DESTROY_ID)),
.args = ARGS(ARGS_ENTRY(struct buffer, port)),
- .call = parse_sa_destroy,
+ .call = parse_ia_destroy,
},
- [SHARED_ACTION_QUERY] = {
+ [INDIRECT_ACTION_QUERY] = {
.name = "query",
- .help = "query shared action",
- .next = NEXT(NEXT_ENTRY(END), NEXT_ENTRY(SHARED_ACTION_ID)),
- .args = ARGS(ARGS_ENTRY(struct buffer, args.sa.action_id)),
- .call = parse_sa,
+ .help = "query indirect action",
+ .next = NEXT(NEXT_ENTRY(END), NEXT_ENTRY(INDIRECT_ACTION_ID)),
+ .args = ARGS(ARGS_ENTRY(struct buffer, args.ia.action_id)),
+ .call = parse_ia,
},
[VALIDATE] = {
.name = "validate",
@@ -4498,61 +4498,61 @@ static const struct token token_list[] = {
.call = parse_vc_action_sample_index,
.comp = comp_set_sample_index,
},
- /* Shared action destroy arguments. */
- [SHARED_ACTION_DESTROY_ID] = {
+ /* Indirect action destroy arguments. */
+ [INDIRECT_ACTION_DESTROY_ID] = {
.name = "action_id",
- .help = "specify a shared action id to destroy",
- .next = NEXT(next_sa_destroy_attr,
- NEXT_ENTRY(SHARED_ACTION_ID)),
+ .help = "specify a indirect action id to destroy",
+ .next = NEXT(next_ia_destroy_attr,
+ NEXT_ENTRY(INDIRECT_ACTION_ID)),
.args = ARGS(ARGS_ENTRY_PTR(struct buffer,
- args.sa_destroy.action_id)),
- .call = parse_sa_destroy,
+ args.ia_destroy.action_id)),
+ .call = parse_ia_destroy,
},
- /* Shared action create arguments. */
- [SHARED_ACTION_CREATE_ID] = {
+ /* Indirect action create arguments. */
+ [INDIRECT_ACTION_CREATE_ID] = {
.name = "action_id",
- .help = "specify a shared action id to create",
- .next = NEXT(next_sa_create_attr,
- NEXT_ENTRY(SHARED_ACTION_ID)),
+ .help = "specify a indirect action id to create",
+ .next = NEXT(next_ia_create_attr,
+ NEXT_ENTRY(INDIRECT_ACTION_ID)),
.args = ARGS(ARGS_ENTRY(struct buffer, args.vc.attr.group)),
},
- [ACTION_SHARED] = {
- .name = "shared",
- .help = "apply shared action by id",
- .priv = PRIV_ACTION(SHARED, 0),
- .next = NEXT(NEXT_ENTRY(SHARED_ACTION_ID2PTR)),
+ [ACTION_INDIRECT] = {
+ .name = "indirect",
+ .help = "apply indirect action by id",
+ .priv = PRIV_ACTION(INDIRECT, 0),
+ .next = NEXT(NEXT_ENTRY(INDIRECT_ACTION_ID2PTR)),
.args = ARGS(ARGS_ENTRY_ARB(0, sizeof(uint32_t))),
.call = parse_vc,
},
- [SHARED_ACTION_ID2PTR] = {
+ [INDIRECT_ACTION_ID2PTR] = {
.name = "{action_id}",
- .type = "SHARED_ACTION_ID",
- .help = "shared action id",
+ .type = "INDIRECT_ACTION_ID",
+ .help = "indirect action id",
.next = NEXT(NEXT_ENTRY(ACTION_NEXT)),
- .call = parse_sa_id2ptr,
+ .call = parse_ia_id2ptr,
.comp = comp_none,
},
- [SHARED_ACTION_INGRESS] = {
+ [INDIRECT_ACTION_INGRESS] = {
.name = "ingress",
.help = "affect rule to ingress",
- .next = NEXT(next_sa_create_attr),
- .call = parse_sa,
+ .next = NEXT(next_ia_create_attr),
+ .call = parse_ia,
},
- [SHARED_ACTION_EGRESS] = {
+ [INDIRECT_ACTION_EGRESS] = {
.name = "egress",
.help = "affect rule to egress",
- .next = NEXT(next_sa_create_attr),
- .call = parse_sa,
+ .next = NEXT(next_ia_create_attr),
+ .call = parse_ia,
},
- [SHARED_ACTION_TRANSFER] = {
+ [INDIRECT_ACTION_TRANSFER] = {
.name = "transfer",
.help = "affect rule to transfer",
- .next = NEXT(next_sa_create_attr),
- .call = parse_sa,
+ .next = NEXT(next_ia_create_attr),
+ .call = parse_ia,
},
- [SHARED_ACTION_SPEC] = {
+ [INDIRECT_ACTION_SPEC] = {
.name = "action",
- .help = "specify action to share",
+ .help = "specify action to create indirect handle",
.next = NEXT(next_action),
},
};
@@ -4739,9 +4739,9 @@ parse_init(struct context *ctx, const struct token *token,
return len;
}
-/** Parse tokens for shared action commands. */
+/** Parse tokens for indirect action commands. */
static int
-parse_sa(struct context *ctx, const struct token *token,
+parse_ia(struct context *ctx, const struct token *token,
const char *str, unsigned int len,
void *buf, unsigned int size)
{
@@ -4754,7 +4754,7 @@ parse_sa(struct context *ctx, const struct token *token,
if (!out)
return len;
if (!out->command) {
- if (ctx->curr != SHARED_ACTION)
+ if (ctx->curr != INDIRECT_ACTION)
return -1;
if (sizeof(*out) > size)
return -1;
@@ -4766,26 +4766,26 @@ parse_sa(struct context *ctx, const struct token *token,
return len;
}
switch (ctx->curr) {
- case SHARED_ACTION_CREATE:
- case SHARED_ACTION_UPDATE:
+ case INDIRECT_ACTION_CREATE:
+ case INDIRECT_ACTION_UPDATE:
out->args.vc.actions =
(void *)RTE_ALIGN_CEIL((uintptr_t)(out + 1),
sizeof(double));
out->args.vc.attr.group = UINT32_MAX;
/* fallthrough */
- case SHARED_ACTION_QUERY:
+ case INDIRECT_ACTION_QUERY:
out->command = ctx->curr;
ctx->objdata = 0;
ctx->object = out;
ctx->objmask = NULL;
return len;
- case SHARED_ACTION_EGRESS:
+ case INDIRECT_ACTION_EGRESS:
out->args.vc.attr.egress = 1;
return len;
- case SHARED_ACTION_INGRESS:
+ case INDIRECT_ACTION_INGRESS:
out->args.vc.attr.ingress = 1;
return len;
- case SHARED_ACTION_TRANSFER:
+ case INDIRECT_ACTION_TRANSFER:
out->args.vc.attr.transfer = 1;
return len;
default:
@@ -4794,9 +4794,9 @@ parse_sa(struct context *ctx, const struct token *token,
}
-/** Parse tokens for shared action destroy command. */
+/** Parse tokens for indirect action destroy command. */
static int
-parse_sa_destroy(struct context *ctx, const struct token *token,
+parse_ia_destroy(struct context *ctx, const struct token *token,
const char *str, unsigned int len,
void *buf, unsigned int size)
{
@@ -4809,8 +4809,8 @@ parse_sa_destroy(struct context *ctx, const struct token *token,
/* Nothing else to do if there is no buffer. */
if (!out)
return len;
- if (!out->command || out->command == SHARED_ACTION) {
- if (ctx->curr != SHARED_ACTION_DESTROY)
+ if (!out->command || out->command == INDIRECT_ACTION) {
+ if (ctx->curr != INDIRECT_ACTION_DESTROY)
return -1;
if (sizeof(*out) > size)
return -1;
@@ -4818,13 +4818,13 @@ parse_sa_destroy(struct context *ctx, const struct token *token,
ctx->objdata = 0;
ctx->object = out;
ctx->objmask = NULL;
- out->args.sa_destroy.action_id =
+ out->args.ia_destroy.action_id =
(void *)RTE_ALIGN_CEIL((uintptr_t)(out + 1),
sizeof(double));
return len;
}
- action_id = out->args.sa_destroy.action_id
- + out->args.sa_destroy.action_id_n++;
+ action_id = out->args.ia_destroy.action_id
+ + out->args.ia_destroy.action_id_n++;
if ((uint8_t *)action_id > (uint8_t *)out + size)
return -1;
ctx->objdata = 0;
@@ -7102,7 +7102,7 @@ parse_port(struct context *ctx, const struct token *token,
}
static int
-parse_sa_id2ptr(struct context *ctx, const struct token *token,
+parse_ia_id2ptr(struct context *ctx, const struct token *token,
const char *str, unsigned int len,
void *buf, unsigned int size)
{
@@ -7119,9 +7119,9 @@ parse_sa_id2ptr(struct context *ctx, const struct token *token,
ctx->object = action;
if (ret != (int)len)
return ret;
- /* set shared action */
+ /* set indirect action */
if (action) {
- action->conf = port_shared_action_get_by_id(ctx->port, id);
+ action->conf = port_action_handle_get_by_id(ctx->port, id);
ret = (action->conf) ? ret : -1;
}
return ret;
@@ -7659,27 +7659,27 @@ static void
cmd_flow_parsed(const struct buffer *in)
{
switch (in->command) {
- case SHARED_ACTION_CREATE:
- port_shared_action_create(
+ case INDIRECT_ACTION_CREATE:
+ port_action_handle_create(
in->port, in->args.vc.attr.group,
- &((const struct rte_flow_shared_action_conf) {
+ &((const struct rte_flow_indir_action_conf) {
.ingress = in->args.vc.attr.ingress,
.egress = in->args.vc.attr.egress,
.transfer = in->args.vc.attr.transfer,
}),
in->args.vc.actions);
break;
- case SHARED_ACTION_DESTROY:
- port_shared_action_destroy(in->port,
- in->args.sa_destroy.action_id_n,
- in->args.sa_destroy.action_id);
+ case INDIRECT_ACTION_DESTROY:
+ port_action_handle_destroy(in->port,
+ in->args.ia_destroy.action_id_n,
+ in->args.ia_destroy.action_id);
break;
- case SHARED_ACTION_UPDATE:
- port_shared_action_update(in->port, in->args.vc.attr.group,
+ case INDIRECT_ACTION_UPDATE:
+ port_action_handle_update(in->port, in->args.vc.attr.group,
in->args.vc.actions);
break;
- case SHARED_ACTION_QUERY:
- port_shared_action_query(in->port, in->args.sa.action_id);
+ case INDIRECT_ACTION_QUERY:
+ port_action_handle_query(in->port, in->args.ia.action_id);
break;
case VALIDATE:
port_flow_validate(in->port, &in->args.vc.attr,
diff --git a/app/test-pmd/config.c b/app/test-pmd/config.c
index 40b2b29725..c219ef25f7 100644
--- a/app/test-pmd/config.c
+++ b/app/test-pmd/config.c
@@ -1392,38 +1392,38 @@ rss_config_display(struct rte_flow_action_rss *rss_conf)
}
}
-static struct port_shared_action *
+static struct port_indirect_action *
action_get_by_id(portid_t port_id, uint32_t id)
{
struct rte_port *port;
- struct port_shared_action **ppsa;
- struct port_shared_action *psa = NULL;
+ struct port_indirect_action **ppia;
+ struct port_indirect_action *pia = NULL;
if (port_id_is_invalid(port_id, ENABLED_WARN) ||
port_id == (portid_t)RTE_PORT_ALL)
return NULL;
port = &ports[port_id];
- ppsa = &port->actions_list;
- while (*ppsa) {
- if ((*ppsa)->id == id) {
- psa = *ppsa;
+ ppia = &port->actions_list;
+ while (*ppia) {
+ if ((*ppia)->id == id) {
+ pia = *ppia;
break;
}
- ppsa = &(*ppsa)->next;
+ ppia = &(*ppia)->next;
}
- if (!psa)
- printf("Failed to find shared action #%u on port %u\n",
+ if (!pia)
+ printf("Failed to find indirect action #%u on port %u\n",
id, port_id);
- return psa;
+ return pia;
}
static int
action_alloc(portid_t port_id, uint32_t id,
- struct port_shared_action **action)
+ struct port_indirect_action **action)
{
struct rte_port *port;
- struct port_shared_action **ppsa;
- struct port_shared_action *psa = NULL;
+ struct port_indirect_action **ppia;
+ struct port_indirect_action *pia = NULL;
*action = NULL;
if (port_id_is_invalid(port_id, ENABLED_WARN) ||
@@ -1434,7 +1434,7 @@ action_alloc(portid_t port_id, uint32_t id,
/* taking first available ID */
if (port->actions_list) {
if (port->actions_list->id == UINT32_MAX - 1) {
- printf("Highest shared action ID is already"
+ printf("Highest indirect action ID is already"
" assigned, delete it first\n");
return -ENOMEM;
}
@@ -1443,70 +1443,70 @@ action_alloc(portid_t port_id, uint32_t id,
id = 0;
}
}
- psa = calloc(1, sizeof(*psa));
- if (!psa) {
- printf("Allocation of port %u shared action failed\n",
+ pia = calloc(1, sizeof(*pia));
+ if (!pia) {
+ printf("Allocation of port %u indirect action failed\n",
port_id);
return -ENOMEM;
}
- ppsa = &port->actions_list;
- while (*ppsa && (*ppsa)->id > id)
- ppsa = &(*ppsa)->next;
- if (*ppsa && (*ppsa)->id == id) {
- printf("Shared action #%u is already assigned,"
+ ppia = &port->actions_list;
+ while (*ppia && (*ppia)->id > id)
+ ppia = &(*ppia)->next;
+ if (*ppia && (*ppia)->id == id) {
+ printf("Indirect action #%u is already assigned,"
" delete it first\n", id);
- free(psa);
+ free(pia);
return -EINVAL;
}
- psa->next = *ppsa;
- psa->id = id;
- *ppsa = psa;
- *action = psa;
+ pia->next = *ppia;
+ pia->id = id;
+ *ppia = pia;
+ *action = pia;
return 0;
}
-/** Create shared action */
+/** Create indirect action */
int
-port_shared_action_create(portid_t port_id, uint32_t id,
- const struct rte_flow_shared_action_conf *conf,
+port_action_handle_create(portid_t port_id, uint32_t id,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action)
{
- struct port_shared_action *psa;
+ struct port_indirect_action *pia;
int ret;
struct rte_flow_error error;
- ret = action_alloc(port_id, id, &psa);
+ ret = action_alloc(port_id, id, &pia);
if (ret)
return ret;
if (action->type == RTE_FLOW_ACTION_TYPE_AGE) {
struct rte_flow_action_age *age =
(struct rte_flow_action_age *)(uintptr_t)(action->conf);
- psa->age_type = ACTION_AGE_CONTEXT_TYPE_SHARED_ACTION;
- age->context = &psa->age_type;
+ pia->age_type = ACTION_AGE_CONTEXT_TYPE_INDIRECT_ACTION;
+ age->context = &pia->age_type;
}
/* Poisoning to make sure PMDs update it in case of error. */
memset(&error, 0x22, sizeof(error));
- psa->action = rte_flow_shared_action_create(port_id, conf, action,
+ pia->handle = rte_flow_action_handle_create(port_id, conf, action,
&error);
- if (!psa->action) {
- uint32_t destroy_id = psa->id;
- port_shared_action_destroy(port_id, 1, &destroy_id);
+ if (!pia->handle) {
+ uint32_t destroy_id = pia->id;
+ port_action_handle_destroy(port_id, 1, &destroy_id);
return port_flow_complain(&error);
}
- psa->type = action->type;
- printf("Shared action #%u created\n", psa->id);
+ pia->type = action->type;
+ printf("Indirect action #%u created\n", pia->id);
return 0;
}
-/** Destroy shared action */
+/** Destroy indirect action */
int
-port_shared_action_destroy(portid_t port_id,
+port_action_handle_destroy(portid_t port_id,
uint32_t n,
const uint32_t *actions)
{
struct rte_port *port;
- struct port_shared_action **tmp;
+ struct port_indirect_action **tmp;
uint32_t c = 0;
int ret = 0;
@@ -1520,9 +1520,9 @@ port_shared_action_destroy(portid_t port_id,
for (i = 0; i != n; ++i) {
struct rte_flow_error error;
- struct port_shared_action *psa = *tmp;
+ struct port_indirect_action *pia = *tmp;
- if (actions[i] != psa->id)
+ if (actions[i] != pia->id)
continue;
/*
* Poisoning to make sure PMDs update it in case
@@ -1530,14 +1530,14 @@ port_shared_action_destroy(portid_t port_id,
*/
memset(&error, 0x33, sizeof(error));
- if (psa->action && rte_flow_shared_action_destroy(
- port_id, psa->action, &error)) {
+ if (pia->handle && rte_flow_action_handle_destroy(
+ port_id, pia->handle, &error)) {
ret = port_flow_complain(&error);
continue;
}
- *tmp = psa->next;
- printf("Shared action #%u destroyed\n", psa->id);
- free(psa);
+ *tmp = pia->next;
+ printf("Indirect action #%u destroyed\n", pia->id);
+ free(pia);
break;
}
if (i == n)
@@ -1548,60 +1548,60 @@ port_shared_action_destroy(portid_t port_id,
}
-/** Get shared action by port + id */
-struct rte_flow_shared_action *
-port_shared_action_get_by_id(portid_t port_id, uint32_t id)
+/** Get indirect action by port + id */
+struct rte_flow_action_handle *
+port_action_handle_get_by_id(portid_t port_id, uint32_t id)
{
- struct port_shared_action *psa = action_get_by_id(port_id, id);
+ struct port_indirect_action *pia = action_get_by_id(port_id, id);
- return (psa) ? psa->action : NULL;
+ return (pia) ? pia->handle : NULL;
}
-/** Update shared action */
+/** Update indirect action */
int
-port_shared_action_update(portid_t port_id, uint32_t id,
+port_action_handle_update(portid_t port_id, uint32_t id,
const struct rte_flow_action *action)
{
struct rte_flow_error error;
- struct rte_flow_shared_action *shared_action;
+ struct rte_flow_action_handle *action_handle;
- shared_action = port_shared_action_get_by_id(port_id, id);
- if (!shared_action)
+ action_handle = port_action_handle_get_by_id(port_id, id);
+ if (!action_handle)
return -EINVAL;
- if (rte_flow_shared_action_update(port_id, shared_action, action,
+ if (rte_flow_action_handle_update(port_id, action_handle, action,
&error)) {
return port_flow_complain(&error);
}
- printf("Shared action #%u updated\n", id);
+ printf("Indirect action #%u updated\n", id);
return 0;
}
int
-port_shared_action_query(portid_t port_id, uint32_t id)
+port_action_handle_query(portid_t port_id, uint32_t id)
{
struct rte_flow_error error;
- struct port_shared_action *psa;
+ struct port_indirect_action *pia;
uint64_t default_data;
void *data = NULL;
int ret = 0;
- psa = action_get_by_id(port_id, id);
- if (!psa)
+ pia = action_get_by_id(port_id, id);
+ if (!pia)
return -EINVAL;
- switch (psa->type) {
+ switch (pia->type) {
case RTE_FLOW_ACTION_TYPE_RSS:
case RTE_FLOW_ACTION_TYPE_AGE:
data = &default_data;
break;
default:
- printf("Shared action %u (type: %d) on port %u doesn't support"
- " query\n", id, psa->type, port_id);
+ printf("Indirect action %u (type: %d) on port %u doesn't"
+ " support query\n", id, pia->type, port_id);
return -1;
}
- if (rte_flow_shared_action_query(port_id, psa->action, data, &error))
+ if (rte_flow_action_handle_query(port_id, pia->handle, data, &error))
ret = port_flow_complain(&error);
- switch (psa->type) {
+ switch (pia->type) {
case RTE_FLOW_ACTION_TYPE_RSS:
if (!ret)
printf("Shared RSS action:\n\trefs:%u\n",
@@ -1623,8 +1623,8 @@ port_shared_action_query(portid_t port_id, uint32_t id)
data = NULL;
break;
default:
- printf("Shared action %u (type: %d) on port %u doesn't support"
- " query\n", id, psa->type, port_id);
+ printf("Indirect action %u (type: %d) on port %u doesn't"
+ " support query\n", id, pia->type, port_id);
ret = -1;
}
return ret;
@@ -2066,7 +2066,7 @@ port_flow_aged(portid_t port_id, uint8_t destroy)
enum age_action_context_type *type;
union {
struct port_flow *pf;
- struct port_shared_action *psa;
+ struct port_indirect_action *pia;
} ctx;
if (port_id_is_invalid(port_id, ENABLED_WARN) ||
@@ -2116,11 +2116,11 @@ port_flow_aged(portid_t port_id, uint8_t destroy)
&ctx.pf->id))
total++;
break;
- case ACTION_AGE_CONTEXT_TYPE_SHARED_ACTION:
- ctx.psa = container_of(type, struct port_shared_action,
- age_type);
- printf("%-20s\t%" PRIu32 "\n", "Shared action",
- ctx.psa->id);
+ case ACTION_AGE_CONTEXT_TYPE_INDIRECT_ACTION:
+ ctx.pia = container_of(type,
+ struct port_indirect_action, age_type);
+ printf("%-20s\t%" PRIu32 "\n", "Indirect action",
+ ctx.pia->id);
break;
default:
printf("Error: invalid context type %u\n", port_id);
diff --git a/app/test-pmd/testpmd.h b/app/test-pmd/testpmd.h
index 36d8535d0c..c314b30f2e 100644
--- a/app/test-pmd/testpmd.h
+++ b/app/test-pmd/testpmd.h
@@ -151,7 +151,7 @@ struct fwd_stream {
*/
enum age_action_context_type {
ACTION_AGE_CONTEXT_TYPE_FLOW,
- ACTION_AGE_CONTEXT_TYPE_SHARED_ACTION,
+ ACTION_AGE_CONTEXT_TYPE_INDIRECT_ACTION,
};
/** Descriptor for a single flow. */
@@ -165,12 +165,12 @@ struct port_flow {
uint8_t data[]; /**< Storage for flow rule description */
};
-/* Descriptor for shared action */
-struct port_shared_action {
- struct port_shared_action *next; /**< Next flow in list. */
- uint32_t id; /**< Shared action ID. */
+/* Descriptor for indirect action */
+struct port_indirect_action {
+ struct port_indirect_action *next; /**< Next flow in list. */
+ uint32_t id; /**< Indirect action ID. */
enum rte_flow_action_type type; /**< Action type. */
- struct rte_flow_shared_action *action; /**< Shared action handle. */
+ struct rte_flow_action_handle *handle; /**< Indirect action handle. */
enum age_action_context_type age_type; /**< Age action context type. */
};
@@ -222,8 +222,8 @@ struct rte_port {
uint32_t mc_addr_nb; /**< nb. of addr. in mc_addr_pool */
uint8_t slave_flag; /**< bonding slave port */
struct port_flow *flow_list; /**< Associated flows. */
- struct port_shared_action *actions_list;
- /**< Associated shared actions. */
+ struct port_indirect_action *actions_list;
+ /**< Associated indirect actions. */
LIST_HEAD(, port_flow_tunnel) flow_tunnel_list;
const struct rte_eth_rxtx_callback *rx_dump_cb[RTE_MAX_QUEUES_PER_PORT+1];
const struct rte_eth_rxtx_callback *tx_dump_cb[RTE_MAX_QUEUES_PER_PORT+1];
@@ -801,14 +801,14 @@ void port_reg_bit_field_set(portid_t port_id, uint32_t reg_off,
uint8_t bit1_pos, uint8_t bit2_pos, uint32_t value);
void port_reg_display(portid_t port_id, uint32_t reg_off);
void port_reg_set(portid_t port_id, uint32_t reg_off, uint32_t value);
-int port_shared_action_create(portid_t port_id, uint32_t id,
- const struct rte_flow_shared_action_conf *conf,
+int port_action_handle_create(portid_t port_id, uint32_t id,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action);
-int port_shared_action_destroy(portid_t port_id,
+int port_action_handle_destroy(portid_t port_id,
uint32_t n, const uint32_t *action);
-struct rte_flow_shared_action *port_shared_action_get_by_id(portid_t port_id,
+struct rte_flow_action_handle *port_action_handle_get_by_id(portid_t port_id,
uint32_t id);
-int port_shared_action_update(portid_t port_id, uint32_t id,
+int port_action_handle_update(portid_t port_id, uint32_t id,
const struct rte_flow_action *action);
int port_flow_validate(portid_t port_id,
const struct rte_flow_attr *attr,
@@ -820,7 +820,7 @@ int port_flow_create(portid_t port_id,
const struct rte_flow_item *pattern,
const struct rte_flow_action *actions,
const struct tunnel_ops *tunnel_ops);
-int port_shared_action_query(portid_t port_id, uint32_t id);
+int port_action_handle_query(portid_t port_id, uint32_t id);
void update_age_action_context(const struct rte_flow_action *actions,
struct port_flow *pf);
int port_flow_destroy(portid_t port_id, uint32_t n, const uint32_t *rule);
diff --git a/doc/guides/prog_guide/rte_flow.rst b/doc/guides/prog_guide/rte_flow.rst
index e1b93ecedf..4b54588995 100644
--- a/doc/guides/prog_guide/rte_flow.rst
+++ b/doc/guides/prog_guide/rte_flow.rst
@@ -1719,7 +1719,7 @@ that counter.
For ports within the same switch domain then the counter id namespace extends
to all ports within that switch domain.
-The shared flag is DEPRECATED and ``SHARED`` ``COUNT`` action should be used
+The shared flag is DEPRECATED and ``INDIRECT`` ``COUNT`` action should be used
to make shared counters.
.. _table_rte_flow_action_count:
@@ -2742,25 +2742,26 @@ packets, and must have a fate action.
| ``actions`` | sub-action list for sampling |
+--------------+---------------------------------+
-Action: ``SHARED``
-^^^^^^^^^^^^^^^^^^
+Action: ``INDIRECT``
+^^^^^^^^^^^^^^^^^^^^
-Flow utilize shared action by handle as returned from
-``rte_flow_shared_action_create()``.
+Flow utilize indirect action by handle as returned from
+``rte_flow_action_handle_create()``.
-The behaviour of the shared action defined by ``action`` argument of type
-``struct rte_flow_action`` passed to ``rte_flow_shared_action_create()``.
+The behaviour of the indirect action defined by ``action`` argument of type
+``struct rte_flow_action`` passed to ``rte_flow_action_handle_create()``.
-Multiple flows can use the same shared action.
-The shared action can be in-place updated by ``rte_flow_shared_action_update()``
-without destroying flow and creating flow again.
+The indirect action can be used by a single flow or shared among multiple flows.
+The indirect action can be in-place updated by ``rte_flow_action_handle_update()``
+without destroying flow and creating flow again. The fields that could be
+updated depend on the type of the ``action`` and different for every type.
-The shared action specified data (e.g. counter) can be queried by
-``rte_flow_shared_action_query()``.
+The indirect action specified data (e.g. counter) can be queried by
+``rte_flow_action_handle_query()``.
-.. _table_rte_flow_shared_action:
+.. _table_rte_flow_action_handle:
-.. table:: SHARED
+.. table:: INDIRECT
+---------------+
| Field |
diff --git a/doc/guides/rel_notes/release_21_05.rst b/doc/guides/rel_notes/release_21_05.rst
index 82ee71152f..e6f99350af 100644
--- a/doc/guides/rel_notes/release_21_05.rst
+++ b/doc/guides/rel_notes/release_21_05.rst
@@ -234,6 +234,9 @@ API Changes
* pci: The value ``PCI_ANY_ID`` is marked as deprecated
and can be replaced with ``RTE_PCI_ANY_ID``.
+* ethdev: The experimental shared action APIs in ``rte_flow.h`` has been
+ replaced from ``rte_flow_shared_action_*`` to indirect action APIs named
+ ``rte_flow_action_handle_*``.
ABI Changes
-----------
diff --git a/doc/guides/testpmd_app_ug/testpmd_funcs.rst b/doc/guides/testpmd_app_ug/testpmd_funcs.rst
index e3bfed566d..3397a61074 100644
--- a/doc/guides/testpmd_app_ug/testpmd_funcs.rst
+++ b/doc/guides/testpmd_app_ug/testpmd_funcs.rst
@@ -4057,10 +4057,10 @@ This section lists supported actions and their attributes, if any.
- ``dscp_value {unsigned}``: The new DSCP value to be set
-- ``shared``: Use shared action created via
- ``flow shared_action {port_id} create``
+- ``indirect``: Use indirect action created via
+ ``flow indirect_action {port_id} create``
- - ``shared_action_id {unsigned}``: Shared action ID to use
+ - ``indirect_action_id {unsigned}``: Indirect action ID to use
Destroying flow rules
~~~~~~~~~~~~~~~~~~~~~
@@ -4351,113 +4351,113 @@ If attach ``destroy`` parameter, the command will destroy all the list aged flow
testpmd> flow aged 0
Port 0 total aged flows: 0
-Creating shared actions
-~~~~~~~~~~~~~~~~~~~~~~~
-``flow shared_action {port_id} create`` creates shared action with optional
-shared action ID. It is bound to ``rte_flow_shared_action_create()``::
+Creating indirect actions
+~~~~~~~~~~~~~~~~~~~~~~~~~
+``flow indirect_action {port_id} create`` creates indirect action with optional
+indirect action ID. It is bound to ``rte_flow_action_handle_create()``::
- flow shared_action {port_id} create [action_id {shared_action_id}]
+ flow indirect_action {port_id} create [action_id {indirect_action_id}]
[ingress] [egress] [transfer] action {action} / end
If successful, it will show::
- Shared action #[...] created
+ Indirect action #[...] created
-Otherwise, it will complain either that shared action already exists or that
+Otherwise, it will complain either that indirect action already exists or that
some error occurred::
- Shared action #[...] is already assigned, delete it first
+ Indirect action #[...] is already assigned, delete it first
::
Caught error type [...] ([...]): [...]
-Create shared rss action with id 100 to queues 1 and 2 on port 0::
+Create indirect rss action with id 100 to queues 1 and 2 on port 0::
- testpmd> flow shared_action 0 create action_id 100 \
+ testpmd> flow indirect_action 0 create action_id 100 \
ingress action rss queues 1 2 end / end
-Create shared rss action with id assigned by testpmd to queues 1 and 2 on
+Create indirect rss action with id assigned by testpmd to queues 1 and 2 on
port 0::
- testpmd> flow shared_action 0 create action_id \
+ testpmd> flow indirect_action 0 create action_id \
ingress action rss queues 0 1 end / end
-Updating shared actions
-~~~~~~~~~~~~~~~~~~~~~~~
-``flow shared_action {port_id} update`` updates configuration of the shared
-action from its shared action ID (as returned by
-``flow shared_action {port_id} create``). It is bound to
-``rte_flow_shared_action_update()``::
+Updating indirect actions
+~~~~~~~~~~~~~~~~~~~~~~~~~
+``flow indirect_action {port_id} update`` updates configuration of the indirect
+action from its indirect action ID (as returned by
+``flow indirect_action {port_id} create``). It is bound to
+``rte_flow_action_handle_update()``::
- flow shared_action {port_id} update {shared_action_id}
+ flow indirect_action {port_id} update {indirect_action_id}
action {action} / end
If successful, it will show::
- Shared action #[...] updated
+ Indirect action #[...] updated
-Otherwise, it will complain either that shared action not found or that some
+Otherwise, it will complain either that indirect action not found or that some
error occurred::
- Failed to find shared action #[...] on port [...]
+ Failed to find indirect action #[...] on port [...]
::
Caught error type [...] ([...]): [...]
-Update shared rss action having id 100 on port 0 with rss to queues 0 and 3
+Update indirect rss action having id 100 on port 0 with rss to queues 0 and 3
(in create example above rss queues were 1 and 2)::
- testpmd> flow shared_action 0 update 100 action rss queues 0 3 end / end
+ testpmd> flow indirect_action 0 update 100 action rss queues 0 3 end / end
-Destroying shared actions
-~~~~~~~~~~~~~~~~~~~~~~~~~
-``flow shared_action {port_id} update`` destroys one or more shared actions
-from their shared action IDs (as returned by
-``flow shared_action {port_id} create``). It is bound to
-``rte_flow_shared_action_destroy()``::
+Destroying indirect actions
+~~~~~~~~~~~~~~~~~~~~~~~~~~~
+``flow indirect_action {port_id} destroy`` destroys one or more indirect actions
+from their indirect action IDs (as returned by
+``flow indirect_action {port_id} create``). It is bound to
+``rte_flow_action_handle_destroy()``::
- flow shared_action {port_id} destroy action_id {shared_action_id} [...]
+ flow indirect_action {port_id} destroy action_id {indirect_action_id} [...]
If successful, it will show::
- Shared action #[...] destroyed
+ Indirect action #[...] destroyed
-It does not report anything for shared action IDs that do not exist.
-The usual error message is shown when a shared action cannot be destroyed::
+It does not report anything for indirect action IDs that do not exist.
+The usual error message is shown when a indirect action cannot be destroyed::
Caught error type [...] ([...]): [...]
-Destroy shared actions having id 100 & 101::
+Destroy indirect actions having id 100 & 101::
- testpmd> flow shared_action 0 destroy action_id 100 action_id 101
+ testpmd> flow indirect_action 0 destroy action_id 100 action_id 101
-Query shared actions
-~~~~~~~~~~~~~~~~~~~~
-``flow shared_action {port_id} query`` queries the shared action from its
-shared action ID (as returned by ``flow shared_action {port_id} create``).
-It is bound to ``rte_flow_shared_action_query()``::
+Query indirect actions
+~~~~~~~~~~~~~~~~~~~~~~
+``flow indirect_action {port_id} query`` queries the indirect action from its
+indirect action ID (as returned by ``flow indirect_action {port_id} create``).
+It is bound to ``rte_flow_action_handle_query()``::
- flow shared_action {port_id} query {shared_action_id}
+ flow indirect_action {port_id} query {indirect_action_id}
-Currently only rss shared action supported. If successful, it will show::
+Currently only rss indirect action supported. If successful, it will show::
- Shared RSS action:
+ Indirect RSS action:
refs:[...]
-Otherwise, it will complain either that shared action not found or that some
+Otherwise, it will complain either that indirect action not found or that some
error occurred::
- Failed to find shared action #[...] on port [...]
+ Failed to find indirect action #[...] on port [...]
::
Caught error type [...] ([...]): [...]
-Query shared action having id 100::
+Query indirect action having id 100::
- testpmd> flow shared_action 0 query 100
+ testpmd> flow indirect_action 0 query 100
Sample QinQ flow rules
~~~~~~~~~~~~~~~~~~~~~~
diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c
index 02cc2c781e..3bf224c559 100644
--- a/drivers/net/mlx5/mlx5.c
+++ b/drivers/net/mlx5/mlx5.c
@@ -1341,7 +1341,7 @@ mlx5_dev_close(struct rte_eth_dev *dev)
* then this will return directly without any action.
*/
mlx5_flow_list_flush(dev, &priv->flows, true);
- mlx5_shared_action_flush(dev);
+ mlx5_action_handle_flush(dev);
mlx5_flow_meter_flush(dev, NULL);
/* Prevent crashes when queues are still in use. */
dev->rx_pkt_burst = removed_rx_burst;
diff --git a/drivers/net/mlx5/mlx5_defs.h b/drivers/net/mlx5/mlx5_defs.h
index 8f2807dcd9..6e9c4b9cdd 100644
--- a/drivers/net/mlx5/mlx5_defs.h
+++ b/drivers/net/mlx5/mlx5_defs.h
@@ -192,8 +192,8 @@
#define MLX5_HAIRPIN_QUEUE_STRIDE 6
#define MLX5_HAIRPIN_JUMBO_LOG_SIZE (14 + 2)
-/* Maximum number of shared actions supported by rte_flow */
-#define MLX5_MAX_SHARED_ACTIONS 2
+/* Maximum number of indirect actions supported by rte_flow */
+#define MLX5_MAX_INDIRECT_ACTIONS 2
/*
* Linux definition of static_assert is found in /usr/include/assert.h.
diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c
index 84463074a5..68e1ffda9c 100644
--- a/drivers/net/mlx5/mlx5_flow.c
+++ b/drivers/net/mlx5/mlx5_flow.c
@@ -568,23 +568,23 @@ static const struct mlx5_flow_expand_node mlx5_support_expansion[] = {
},
};
-static struct rte_flow_shared_action *
-mlx5_shared_action_create(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action_conf *conf,
+static struct rte_flow_action_handle *
+mlx5_action_handle_create(struct rte_eth_dev *dev,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action,
struct rte_flow_error *error);
-static int mlx5_shared_action_destroy
+static int mlx5_action_handle_destroy
(struct rte_eth_dev *dev,
- struct rte_flow_shared_action *shared_action,
+ struct rte_flow_action_handle *handle,
struct rte_flow_error *error);
-static int mlx5_shared_action_update
+static int mlx5_action_handle_update
(struct rte_eth_dev *dev,
- struct rte_flow_shared_action *shared_action,
- const struct rte_flow_action *action,
+ struct rte_flow_action_handle *handle,
+ const void *update,
struct rte_flow_error *error);
-static int mlx5_shared_action_query
+static int mlx5_action_handle_query
(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action *action,
+ const struct rte_flow_action_handle *handle,
void *data,
struct rte_flow_error *error);
static int
@@ -623,10 +623,10 @@ static const struct rte_flow_ops mlx5_flow_ops = {
.query = mlx5_flow_query,
.dev_dump = mlx5_flow_dev_dump,
.get_aged_flows = mlx5_flow_get_aged_flows,
- .shared_action_create = mlx5_shared_action_create,
- .shared_action_destroy = mlx5_shared_action_destroy,
- .shared_action_update = mlx5_shared_action_update,
- .shared_action_query = mlx5_shared_action_query,
+ .action_handle_create = mlx5_action_handle_create,
+ .action_handle_destroy = mlx5_action_handle_destroy,
+ .action_handle_update = mlx5_action_handle_update,
+ .action_handle_query = mlx5_action_handle_query,
.tunnel_decap_set = mlx5_flow_tunnel_decap_set,
.tunnel_match = mlx5_flow_tunnel_match,
.tunnel_action_decap_release = mlx5_flow_tunnel_action_release,
@@ -3402,31 +3402,31 @@ flow_aso_age_get_by_idx(struct rte_eth_dev *dev, uint32_t age_idx)
return &pool->actions[offset - 1];
}
-/* maps shared action to translated non shared in some actions array */
-struct mlx5_translated_shared_action {
- struct rte_flow_shared_action *action; /**< Shared action */
- int index; /**< Index in related array of rte_flow_action */
+/* maps indirect action to translated direct in some actions array */
+struct mlx5_translated_action_handle {
+ struct rte_flow_action_handle *action; /**< Indirect action handle. */
+ int index; /**< Index in related array of rte_flow_action. */
};
/**
- * Translates actions of type RTE_FLOW_ACTION_TYPE_SHARED to related
- * non shared action if translation possible.
- * This functionality used to run same execution path for both shared & non
- * shared actions on flow create. All necessary preparations for shared
- * action handling should be preformed on *shared* actions list returned
+ * Translates actions of type RTE_FLOW_ACTION_TYPE_INDIRECT to related
+ * direct action if translation possible.
+ * This functionality used to run same execution path for both direct and
+ * indirect actions on flow create. All necessary preparations for indirect
+ * action handling should be performed on *handle* actions list returned
* from this call.
*
* @param[in] dev
* Pointer to Ethernet device.
* @param[in] actions
* List of actions to translate.
- * @param[out] shared
- * List to store translated shared actions.
- * @param[in, out] shared_n
- * Size of *shared* array. On return should be updated with number of shared
- * actions retrieved from the *actions* list.
+ * @param[out] handle
+ * List to store translated indirect action object handles.
+ * @param[in, out] indir_n
+ * Size of *handle* array. On return should be updated with number of
+ * indirect actions retrieved from the *actions* list.
* @param[out] translated_actions
- * List of actions where all shared actions were translated to non shared
+ * List of actions where all indirect actions were translated to direct
* if possible. NULL if no translation took place.
* @param[out] error
* Pointer to the error structure.
@@ -3435,10 +3435,10 @@ struct mlx5_translated_shared_action {
* 0 on success, a negative errno value otherwise and rte_errno is set.
*/
static int
-flow_shared_actions_translate(struct rte_eth_dev *dev,
+flow_action_handles_translate(struct rte_eth_dev *dev,
const struct rte_flow_action actions[],
- struct mlx5_translated_shared_action *shared,
- int *shared_n,
+ struct mlx5_translated_action_handle *handle,
+ int *indir_n,
struct rte_flow_action **translated_actions,
struct rte_flow_error *error)
{
@@ -3447,23 +3447,23 @@ flow_shared_actions_translate(struct rte_eth_dev *dev,
size_t actions_size;
int n;
int copied_n = 0;
- struct mlx5_translated_shared_action *shared_end = NULL;
+ struct mlx5_translated_action_handle *handle_end = NULL;
for (n = 0; actions[n].type != RTE_FLOW_ACTION_TYPE_END; n++) {
- if (actions[n].type != RTE_FLOW_ACTION_TYPE_SHARED)
+ if (actions[n].type != RTE_FLOW_ACTION_TYPE_INDIRECT)
continue;
- if (copied_n == *shared_n) {
+ if (copied_n == *indir_n) {
return rte_flow_error_set
(error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_NUM,
NULL, "too many shared actions");
}
- rte_memcpy(&shared[copied_n].action, &actions[n].conf,
+ rte_memcpy(&handle[copied_n].action, &actions[n].conf,
sizeof(actions[n].conf));
- shared[copied_n].index = n;
+ handle[copied_n].index = n;
copied_n++;
}
n++;
- *shared_n = copied_n;
+ *indir_n = copied_n;
if (!copied_n)
return 0;
actions_size = sizeof(struct rte_flow_action) * n;
@@ -3473,28 +3473,28 @@ flow_shared_actions_translate(struct rte_eth_dev *dev,
return -ENOMEM;
}
memcpy(translated, actions, actions_size);
- for (shared_end = shared + copied_n; shared < shared_end; shared++) {
+ for (handle_end = handle + copied_n; handle < handle_end; handle++) {
struct mlx5_shared_action_rss *shared_rss;
- uint32_t act_idx = (uint32_t)(uintptr_t)shared->action;
- uint32_t type = act_idx >> MLX5_SHARED_ACTION_TYPE_OFFSET;
- uint32_t idx = act_idx & ((1u << MLX5_SHARED_ACTION_TYPE_OFFSET)
- - 1);
+ uint32_t act_idx = (uint32_t)(uintptr_t)handle->action;
+ uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
+ uint32_t idx = act_idx &
+ ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
switch (type) {
- case MLX5_SHARED_ACTION_TYPE_RSS:
+ case MLX5_INDIRECT_ACTION_TYPE_RSS:
shared_rss = mlx5_ipool_get
(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
- translated[shared->index].type =
+ translated[handle->index].type =
RTE_FLOW_ACTION_TYPE_RSS;
- translated[shared->index].conf =
+ translated[handle->index].conf =
&shared_rss->origin;
break;
- case MLX5_SHARED_ACTION_TYPE_AGE:
+ case MLX5_INDIRECT_ACTION_TYPE_AGE:
if (priv->sh->flow_hit_aso_en) {
- translated[shared->index].type =
+ translated[handle->index].type =
(enum rte_flow_action_type)
MLX5_RTE_FLOW_ACTION_TYPE_AGE;
- translated[shared->index].conf =
+ translated[handle->index].conf =
(void *)(uintptr_t)idx;
break;
}
@@ -3503,7 +3503,7 @@ flow_shared_actions_translate(struct rte_eth_dev *dev,
mlx5_free(translated);
return rte_flow_error_set
(error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION,
- NULL, "invalid shared action type");
+ NULL, "invalid indirect action type");
}
}
*translated_actions = translated;
@@ -3525,21 +3525,21 @@ flow_shared_actions_translate(struct rte_eth_dev *dev,
*/
static uint32_t
flow_get_shared_rss_action(struct rte_eth_dev *dev,
- struct mlx5_translated_shared_action *shared,
+ struct mlx5_translated_action_handle *handle,
int shared_n)
{
- struct mlx5_translated_shared_action *shared_end;
+ struct mlx5_translated_action_handle *handle_end;
struct mlx5_priv *priv = dev->data->dev_private;
struct mlx5_shared_action_rss *shared_rss;
- for (shared_end = shared + shared_n; shared < shared_end; shared++) {
- uint32_t act_idx = (uint32_t)(uintptr_t)shared->action;
- uint32_t type = act_idx >> MLX5_SHARED_ACTION_TYPE_OFFSET;
+ for (handle_end = handle + shared_n; handle < handle_end; handle++) {
+ uint32_t act_idx = (uint32_t)(uintptr_t)handle->action;
+ uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
uint32_t idx = act_idx &
- ((1u << MLX5_SHARED_ACTION_TYPE_OFFSET) - 1);
+ ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
switch (type) {
- case MLX5_SHARED_ACTION_TYPE_RSS:
+ case MLX5_INDIRECT_ACTION_TYPE_RSS:
shared_rss = mlx5_ipool_get
(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
idx);
@@ -5549,9 +5549,9 @@ flow_list_create(struct rte_eth_dev *dev, uint32_t *list,
struct rte_flow *flow = NULL;
struct mlx5_flow *dev_flow;
const struct rte_flow_action_rss *rss = NULL;
- struct mlx5_translated_shared_action
- shared_actions[MLX5_MAX_SHARED_ACTIONS];
- int shared_actions_n = MLX5_MAX_SHARED_ACTIONS;
+ struct mlx5_translated_action_handle
+ indir_actions[MLX5_MAX_INDIRECT_ACTIONS];
+ int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS;
union {
struct mlx5_flow_expand_rss buf;
uint8_t buffer[2048];
@@ -5591,9 +5591,9 @@ flow_list_create(struct rte_eth_dev *dev, uint32_t *list,
MLX5_ASSERT(wks);
rss_desc = &wks->rss_desc;
- ret = flow_shared_actions_translate(dev, original_actions,
- shared_actions,
- &shared_actions_n,
+ ret = flow_action_handles_translate(dev, original_actions,
+ indir_actions,
+ &indir_actions_n,
&translated_actions, error);
if (ret < 0) {
MLX5_ASSERT(translated_actions == NULL);
@@ -5654,8 +5654,8 @@ flow_list_create(struct rte_eth_dev *dev, uint32_t *list,
buf->entries = 1;
buf->entry[0].pattern = (void *)(uintptr_t)items;
}
- rss_desc->shared_rss = flow_get_shared_rss_action(dev, shared_actions,
- shared_actions_n);
+ rss_desc->shared_rss = flow_get_shared_rss_action(dev, indir_actions,
+ indir_actions_n);
for (i = 0; i < buf->entries; ++i) {
/* Initialize flow split data. */
flow_split_info.prefix_layers = 0;
@@ -5834,14 +5834,14 @@ mlx5_flow_validate(struct rte_eth_dev *dev,
struct rte_flow_error *error)
{
int hairpin_flow;
- struct mlx5_translated_shared_action
- shared_actions[MLX5_MAX_SHARED_ACTIONS];
- int shared_actions_n = MLX5_MAX_SHARED_ACTIONS;
+ struct mlx5_translated_action_handle
+ indir_actions[MLX5_MAX_INDIRECT_ACTIONS];
+ int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS;
const struct rte_flow_action *actions;
struct rte_flow_action *translated_actions = NULL;
- int ret = flow_shared_actions_translate(dev, original_actions,
- shared_actions,
- &shared_actions_n,
+ int ret = flow_action_handles_translate(dev, original_actions,
+ indir_actions,
+ &indir_actions_n,
&translated_actions, error);
if (ret)
@@ -7214,12 +7214,12 @@ mlx5_flow_get_aged_flows(struct rte_eth_dev *dev, void **contexts,
/* Wrapper for driver action_validate op callback */
static int
flow_drv_action_validate(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action_conf *conf,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action,
const struct mlx5_flow_driver_ops *fops,
struct rte_flow_error *error)
{
- static const char err_msg[] = "shared action validation unsupported";
+ static const char err_msg[] = "indirect action validation unsupported";
if (!fops->action_validate) {
DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
@@ -7235,8 +7235,8 @@ flow_drv_action_validate(struct rte_eth_dev *dev,
*
* @param dev
* Pointer to Ethernet device structure.
- * @param[in] action
- * Handle for the shared action to be destroyed.
+ * @param[in] handle
+ * Handle for the indirect action object to be destroyed.
* @param[out] error
* Perform verbose error reporting if not NULL. PMDs initialize this
* structure in case of error only.
@@ -7247,11 +7247,11 @@ flow_drv_action_validate(struct rte_eth_dev *dev,
* @note: wrapper for driver action_create op callback.
*/
static int
-mlx5_shared_action_destroy(struct rte_eth_dev *dev,
- struct rte_flow_shared_action *action,
+mlx5_action_handle_destroy(struct rte_eth_dev *dev,
+ struct rte_flow_action_handle *handle,
struct rte_flow_error *error)
{
- static const char err_msg[] = "shared action destruction unsupported";
+ static const char err_msg[] = "indirect action destruction unsupported";
struct rte_flow_attr attr = { .transfer = 0 };
const struct mlx5_flow_driver_ops *fops =
flow_get_drv_ops(flow_get_drv_type(dev, &attr));
@@ -7262,18 +7262,18 @@ mlx5_shared_action_destroy(struct rte_eth_dev *dev,
NULL, err_msg);
return -rte_errno;
}
- return fops->action_destroy(dev, action, error);
+ return fops->action_destroy(dev, handle, error);
}
/* Wrapper for driver action_destroy op callback */
static int
flow_drv_action_update(struct rte_eth_dev *dev,
- struct rte_flow_shared_action *action,
- const void *action_conf,
+ struct rte_flow_action_handle *handle,
+ const void *update,
const struct mlx5_flow_driver_ops *fops,
struct rte_flow_error *error)
{
- static const char err_msg[] = "shared action update unsupported";
+ static const char err_msg[] = "indirect action update unsupported";
if (!fops->action_update) {
DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
@@ -7281,18 +7281,18 @@ flow_drv_action_update(struct rte_eth_dev *dev,
NULL, err_msg);
return -rte_errno;
}
- return fops->action_update(dev, action, action_conf, error);
+ return fops->action_update(dev, handle, update, error);
}
/* Wrapper for driver action_destroy op callback */
static int
flow_drv_action_query(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action *action,
+ const struct rte_flow_action_handle *handle,
void *data,
const struct mlx5_flow_driver_ops *fops,
struct rte_flow_error *error)
{
- static const char err_msg[] = "shared action query unsupported";
+ static const char err_msg[] = "indirect action query unsupported";
if (!fops->action_query) {
DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
@@ -7300,29 +7300,31 @@ flow_drv_action_query(struct rte_eth_dev *dev,
NULL, err_msg);
return -rte_errno;
}
- return fops->action_query(dev, action, data, error);
+ return fops->action_query(dev, handle, data, error);
}
/**
- * Create shared action for reuse in multiple flow rules.
+ * Create indirect action for reuse in multiple flow rules.
*
* @param dev
* Pointer to Ethernet device structure.
+ * @param conf
+ * Pointer to indirect action object configuration.
* @param[in] action
- * Action configuration for shared action creation.
+ * Action configuration for indirect action object creation.
* @param[out] error
* Perform verbose error reporting if not NULL. PMDs initialize this
* structure in case of error only.
* @return
* A valid handle in case of success, NULL otherwise and rte_errno is set.
*/
-static struct rte_flow_shared_action *
-mlx5_shared_action_create(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action_conf *conf,
+static struct rte_flow_action_handle *
+mlx5_action_handle_create(struct rte_eth_dev *dev,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action,
struct rte_flow_error *error)
{
- static const char err_msg[] = "shared action creation unsupported";
+ static const char err_msg[] = "indirect action creation unsupported";
struct rte_flow_attr attr = { .transfer = 0 };
const struct mlx5_flow_driver_ops *fops =
flow_get_drv_ops(flow_get_drv_type(dev, &attr));
@@ -7339,19 +7341,20 @@ mlx5_shared_action_create(struct rte_eth_dev *dev,
}
/**
- * Updates inplace the shared action configuration pointed by *action* handle
- * with the configuration provided as *action* argument.
- * The update of the shared action configuration effects all flow rules reusing
- * the action via handle.
+ * Updates inplace the indirect action configuration pointed by *handle*
+ * with the configuration provided as *update* argument.
+ * The update of the indirect action configuration effects all flow rules
+ * reusing the action via handle.
*
* @param dev
* Pointer to Ethernet device structure.
- * @param[in] shared_action
- * Handle for the shared action to be updated.
- * @param[in] action
+ * @param[in] handle
+ * Handle for the indirect action to be updated.
+ * @param[in] update
* Action specification used to modify the action pointed by handle.
- * *action* should be of same type with the action pointed by the *action*
- * handle argument, otherwise considered as invalid.
+ * *update* could be of same type with the action pointed by the *handle*
+ * handle argument, or some other structures like a wrapper, depending on
+ * the indirect action type.
* @param[out] error
* Perform verbose error reporting if not NULL. PMDs initialize this
* structure in case of error only.
@@ -7360,9 +7363,9 @@ mlx5_shared_action_create(struct rte_eth_dev *dev,
* 0 on success, a negative errno value otherwise and rte_errno is set.
*/
static int
-mlx5_shared_action_update(struct rte_eth_dev *dev,
- struct rte_flow_shared_action *shared_action,
- const struct rte_flow_action *action,
+mlx5_action_handle_update(struct rte_eth_dev *dev,
+ struct rte_flow_action_handle *handle,
+ const void *update,
struct rte_flow_error *error)
{
struct rte_flow_attr attr = { .transfer = 0 };
@@ -7370,26 +7373,27 @@ mlx5_shared_action_update(struct rte_eth_dev *dev,
flow_get_drv_ops(flow_get_drv_type(dev, &attr));
int ret;
- ret = flow_drv_action_validate(dev, NULL, action, fops, error);
+ ret = flow_drv_action_validate(dev, NULL,
+ (const struct rte_flow_action *)update, fops, error);
if (ret)
return ret;
- return flow_drv_action_update(dev, shared_action, action->conf, fops,
+ return flow_drv_action_update(dev, handle, update, fops,
error);
}
/**
- * Query the shared action by handle.
+ * Query the indirect action by handle.
*
* This function allows retrieving action-specific data such as counters.
* Data is gathered by special action which may be present/referenced in
* more than one flow rule definition.
*
- * \see RTE_FLOW_ACTION_TYPE_COUNT
+ * see @RTE_FLOW_ACTION_TYPE_COUNT
*
* @param dev
* Pointer to Ethernet device structure.
- * @param[in] action
- * Handle for the shared action to query.
+ * @param[in] handle
+ * Handle for the indirect action to query.
* @param[in, out] data
* Pointer to storage for the associated query data type.
* @param[out] error
@@ -7400,8 +7404,8 @@ mlx5_shared_action_update(struct rte_eth_dev *dev,
* 0 on success, a negative errno value otherwise and rte_errno is set.
*/
static int
-mlx5_shared_action_query(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action *action,
+mlx5_action_handle_query(struct rte_eth_dev *dev,
+ const struct rte_flow_action_handle *handle,
void *data,
struct rte_flow_error *error)
{
@@ -7409,11 +7413,11 @@ mlx5_shared_action_query(struct rte_eth_dev *dev,
const struct mlx5_flow_driver_ops *fops =
flow_get_drv_ops(flow_get_drv_type(dev, &attr));
- return flow_drv_action_query(dev, action, data, fops, error);
+ return flow_drv_action_query(dev, handle, data, fops, error);
}
/**
- * Destroy all shared actions.
+ * Destroy all indirect actions (shared RSS).
*
* @param dev
* Pointer to Ethernet device.
@@ -7422,7 +7426,7 @@ mlx5_shared_action_query(struct rte_eth_dev *dev,
* 0 on success, a negative errno value otherwise and rte_errno is set.
*/
int
-mlx5_shared_action_flush(struct rte_eth_dev *dev)
+mlx5_action_handle_flush(struct rte_eth_dev *dev)
{
struct rte_flow_error error;
struct mlx5_priv *priv = dev->data->dev_private;
@@ -7432,8 +7436,8 @@ mlx5_shared_action_flush(struct rte_eth_dev *dev)
ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
priv->rss_shared_actions, idx, shared_rss, next) {
- ret |= mlx5_shared_action_destroy(dev,
- (struct rte_flow_shared_action *)(uintptr_t)idx, &error);
+ ret |= mlx5_action_handle_destroy(dev,
+ (struct rte_flow_action_handle *)(uintptr_t)idx, &error);
}
return ret;
}
diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h
index ec673c29ab..56674eb0d2 100644
--- a/drivers/net/mlx5/mlx5_flow.h
+++ b/drivers/net/mlx5/mlx5_flow.h
@@ -39,11 +39,11 @@ enum mlx5_rte_flow_action_type {
MLX5_RTE_FLOW_ACTION_TYPE_AGE,
};
-#define MLX5_SHARED_ACTION_TYPE_OFFSET 30
+#define MLX5_INDIRECT_ACTION_TYPE_OFFSET 30
enum {
- MLX5_SHARED_ACTION_TYPE_RSS,
- MLX5_SHARED_ACTION_TYPE_AGE,
+ MLX5_INDIRECT_ACTION_TYPE_RSS,
+ MLX5_INDIRECT_ACTION_TYPE_AGE,
};
/* Matches on selected register. */
@@ -1152,7 +1152,7 @@ struct mlx5_shared_action_rss {
rte_spinlock_t action_rss_sl; /**< Shared RSS action spinlock. */
};
-struct rte_flow_shared_action {
+struct rte_flow_action_handle {
uint32_t id;
};
@@ -1233,26 +1233,26 @@ typedef int (*mlx5_flow_get_aged_flows_t)
struct rte_flow_error *error);
typedef int (*mlx5_flow_action_validate_t)
(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action_conf *conf,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action,
struct rte_flow_error *error);
-typedef struct rte_flow_shared_action *(*mlx5_flow_action_create_t)
+typedef struct rte_flow_action_handle *(*mlx5_flow_action_create_t)
(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action_conf *conf,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action,
struct rte_flow_error *error);
typedef int (*mlx5_flow_action_destroy_t)
(struct rte_eth_dev *dev,
- struct rte_flow_shared_action *action,
+ struct rte_flow_action_handle *action,
struct rte_flow_error *error);
typedef int (*mlx5_flow_action_update_t)
(struct rte_eth_dev *dev,
- struct rte_flow_shared_action *action,
- const void *action_conf,
+ struct rte_flow_action_handle *action,
+ const void *update,
struct rte_flow_error *error);
typedef int (*mlx5_flow_action_query_t)
(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action *action,
+ const struct rte_flow_action_handle *action,
void *data,
struct rte_flow_error *error);
typedef int (*mlx5_flow_sync_domain_t)
@@ -1483,7 +1483,7 @@ int mlx5_flow_destroy_policer_rules(struct rte_eth_dev *dev,
int mlx5_flow_meter_flush(struct rte_eth_dev *dev,
struct rte_mtr_error *error);
int mlx5_flow_dv_discover_counter_offset_support(struct rte_eth_dev *dev);
-int mlx5_shared_action_flush(struct rte_eth_dev *dev);
+int mlx5_action_handle_flush(struct rte_eth_dev *dev);
void mlx5_release_tunnel_hub(struct mlx5_dev_ctx_shared *sh, uint16_t port_id);
int mlx5_alloc_tunnel_hub(struct mlx5_dev_ctx_shared *sh);
diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index e65cc13bd6..d02e97b3f4 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -12870,7 +12870,7 @@ __flow_dv_action_rss_setup(struct rte_eth_dev *dev,
*/
static uint32_t
__flow_dv_action_rss_create(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action_conf *conf,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action_rss *rss,
struct rte_flow_error *error)
{
@@ -12893,7 +12893,7 @@ __flow_dv_action_rss_create(struct rte_eth_dev *dev,
"cannot allocate resource memory");
goto error_rss_init;
}
- if (idx > (1u << MLX5_SHARED_ACTION_TYPE_OFFSET)) {
+ if (idx > (1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET)) {
rte_flow_error_set(error, E2BIG,
RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
"rss action number out of range");
@@ -13006,7 +13006,7 @@ __flow_dv_action_rss_release(struct rte_eth_dev *dev, uint32_t idx,
}
/**
- * Create shared action, lock free,
+ * Create indirect action, lock free,
* (mutex should be acquired by caller).
* Dispatcher for action type specific call.
*
@@ -13015,7 +13015,7 @@ __flow_dv_action_rss_release(struct rte_eth_dev *dev, uint32_t idx,
* @param[in] conf
* Shared action configuration.
* @param[in] action
- * Action specification used to create shared action.
+ * Action specification used to create indirect action.
* @param[out] error
* Perform verbose error reporting if not NULL. Initialized in case of
* error only.
@@ -13024,9 +13024,9 @@ __flow_dv_action_rss_release(struct rte_eth_dev *dev, uint32_t idx,
* A valid shared action handle in case of success, NULL otherwise and
* rte_errno is set.
*/
-static struct rte_flow_shared_action *
+static struct rte_flow_action_handle *
flow_dv_action_create(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action_conf *conf,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action,
struct rte_flow_error *err)
{
@@ -13036,13 +13036,13 @@ flow_dv_action_create(struct rte_eth_dev *dev,
switch (action->type) {
case RTE_FLOW_ACTION_TYPE_RSS:
ret = __flow_dv_action_rss_create(dev, conf, action->conf, err);
- idx = (MLX5_SHARED_ACTION_TYPE_RSS <<
- MLX5_SHARED_ACTION_TYPE_OFFSET) | ret;
+ idx = (MLX5_INDIRECT_ACTION_TYPE_RSS <<
+ MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
break;
case RTE_FLOW_ACTION_TYPE_AGE:
ret = flow_dv_translate_create_aso_age(dev, action->conf, err);
- idx = (MLX5_SHARED_ACTION_TYPE_AGE <<
- MLX5_SHARED_ACTION_TYPE_OFFSET) | ret;
+ idx = (MLX5_INDIRECT_ACTION_TYPE_AGE <<
+ MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
if (ret) {
struct mlx5_aso_age_action *aso_age =
flow_aso_age_get_by_idx(dev, ret);
@@ -13057,19 +13057,19 @@ flow_dv_action_create(struct rte_eth_dev *dev,
NULL, "action type not supported");
break;
}
- return ret ? (struct rte_flow_shared_action *)(uintptr_t)idx : NULL;
+ return ret ? (struct rte_flow_action_handle *)(uintptr_t)idx : NULL;
}
/**
- * Destroy the shared action.
+ * Destroy the indirect action.
* Release action related resources on the NIC and the memory.
* Lock free, (mutex should be acquired by caller).
* Dispatcher for action type specific call.
*
* @param[in] dev
* Pointer to the Ethernet device structure.
- * @param[in] action
- * The shared action object to be removed.
+ * @param[in] handle
+ * The indirect action object handle to be removed.
* @param[out] error
* Perform verbose error reporting if not NULL. Initialized in case of
* error only.
@@ -13079,25 +13079,25 @@ flow_dv_action_create(struct rte_eth_dev *dev,
*/
static int
flow_dv_action_destroy(struct rte_eth_dev *dev,
- struct rte_flow_shared_action *action,
+ struct rte_flow_action_handle *handle,
struct rte_flow_error *error)
{
- uint32_t act_idx = (uint32_t)(uintptr_t)action;
- uint32_t type = act_idx >> MLX5_SHARED_ACTION_TYPE_OFFSET;
- uint32_t idx = act_idx & ((1u << MLX5_SHARED_ACTION_TYPE_OFFSET) - 1);
+ uint32_t act_idx = (uint32_t)(uintptr_t)handle;
+ uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
+ uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
int ret;
switch (type) {
- case MLX5_SHARED_ACTION_TYPE_RSS:
+ case MLX5_INDIRECT_ACTION_TYPE_RSS:
return __flow_dv_action_rss_release(dev, idx, error);
- case MLX5_SHARED_ACTION_TYPE_AGE:
+ case MLX5_INDIRECT_ACTION_TYPE_AGE:
ret = flow_dv_aso_age_release(dev, idx);
if (ret)
/*
* In this case, the last flow has a reference will
* actually release the age action.
*/
- DRV_LOG(DEBUG, "Shared age action %" PRIu32 " was"
+ DRV_LOG(DEBUG, "Indirect age action %" PRIu32 " was"
" released with references %d.", idx, ret);
return 0;
default:
@@ -13180,12 +13180,13 @@ __flow_dv_action_rss_update(struct rte_eth_dev *dev, uint32_t idx,
*
* @param[in] dev
* Pointer to the Ethernet device structure.
- * @param[in] action
- * The shared action object to be updated.
- * @param[in] action_conf
- * Action specification used to modify *action*.
- * *action_conf* should be of type correlating with type of the *action*,
- * otherwise considered as invalid.
+ * @param[in] handle
+ * The indirect action object handle to be updated.
+ * @param[in] update
+ * Action specification used to modify the action pointed by *handle*.
+ * *update* could be of same type with the action pointed by the *handle*
+ * handle argument, or some other structures like a wrapper, depending on
+ * the indirect action type.
* @param[out] error
* Perform verbose error reporting if not NULL. Initialized in case of
* error only.
@@ -13195,16 +13196,18 @@ __flow_dv_action_rss_update(struct rte_eth_dev *dev, uint32_t idx,
*/
static int
flow_dv_action_update(struct rte_eth_dev *dev,
- struct rte_flow_shared_action *action,
- const void *action_conf,
+ struct rte_flow_action_handle *handle,
+ const void *update,
struct rte_flow_error *err)
{
- uint32_t act_idx = (uint32_t)(uintptr_t)action;
- uint32_t type = act_idx >> MLX5_SHARED_ACTION_TYPE_OFFSET;
- uint32_t idx = act_idx & ((1u << MLX5_SHARED_ACTION_TYPE_OFFSET) - 1);
+ uint32_t act_idx = (uint32_t)(uintptr_t)handle;
+ uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
+ uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
+ const void *action_conf;
switch (type) {
- case MLX5_SHARED_ACTION_TYPE_RSS:
+ case MLX5_INDIRECT_ACTION_TYPE_RSS:
+ action_conf = ((const struct rte_flow_action *)update)->conf;
return __flow_dv_action_rss_update(dev, idx, action_conf, err);
default:
return rte_flow_error_set(err, ENOTSUP,
@@ -13216,17 +13219,17 @@ flow_dv_action_update(struct rte_eth_dev *dev,
static int
flow_dv_action_query(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action *action, void *data,
+ const struct rte_flow_action_handle *handle, void *data,
struct rte_flow_error *error)
{
struct mlx5_age_param *age_param;
struct rte_flow_query_age *resp;
- uint32_t act_idx = (uint32_t)(uintptr_t)action;
- uint32_t type = act_idx >> MLX5_SHARED_ACTION_TYPE_OFFSET;
- uint32_t idx = act_idx & ((1u << MLX5_SHARED_ACTION_TYPE_OFFSET) - 1);
+ uint32_t act_idx = (uint32_t)(uintptr_t)handle;
+ uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
+ uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
switch (type) {
- case MLX5_SHARED_ACTION_TYPE_AGE:
+ case MLX5_INDIRECT_ACTION_TYPE_AGE:
age_param = &flow_aso_age_get_by_idx(dev, idx)->age_params;
resp = data;
resp->aged = __atomic_load_n(&age_param->state,
@@ -14002,7 +14005,7 @@ flow_dv_counter_allocate(struct rte_eth_dev *dev)
}
/**
- * Validate shared action.
+ * Validate indirect action.
* Dispatcher for action type specific validation.
*
* @param[in] dev
@@ -14010,7 +14013,7 @@ flow_dv_counter_allocate(struct rte_eth_dev *dev)
* @param[in] conf
* Shared action configuration.
* @param[in] action
- * The shared action object to validate.
+ * The indirect action object to validate.
* @param[out] error
* Perform verbose error reporting if not NULL. Initialized in case of
* error only.
@@ -14020,7 +14023,7 @@ flow_dv_counter_allocate(struct rte_eth_dev *dev)
*/
static int
flow_dv_action_validate(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action_conf *conf,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action,
struct rte_flow_error *err)
{
diff --git a/lib/librte_ethdev/rte_flow.c b/lib/librte_ethdev/rte_flow.c
index 7241f00353..0d2610b7c4 100644
--- a/lib/librte_ethdev/rte_flow.c
+++ b/lib/librte_ethdev/rte_flow.c
@@ -180,12 +180,12 @@ static const struct rte_flow_desc_data rte_flow_desc_action[] = {
MK_FLOW_ACTION(MODIFY_FIELD,
sizeof(struct rte_flow_action_modify_field)),
/**
- * Shared action represented as handle of type
- * (struct rte_flow_shared action *) stored in conf field (see
+ * Indirect action represented as handle of type
+ * (struct rte_flow_action_handle *) stored in conf field (see
* struct rte_flow_action); no need for additional structure to * store
- * shared action handle.
+ * indirect action handle.
*/
- MK_FLOW_ACTION(SHARED, 0),
+ MK_FLOW_ACTION(INDIRECT, 0),
};
int
@@ -1068,53 +1068,53 @@ rte_flow_get_aged_flows(uint16_t port_id, void **contexts,
NULL, rte_strerror(ENOTSUP));
}
-struct rte_flow_shared_action *
-rte_flow_shared_action_create(uint16_t port_id,
- const struct rte_flow_shared_action_conf *conf,
+struct rte_flow_action_handle *
+rte_flow_action_handle_create(uint16_t port_id,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action,
struct rte_flow_error *error)
{
- struct rte_flow_shared_action *shared_action;
+ struct rte_flow_action_handle *handle;
const struct rte_flow_ops *ops = rte_flow_ops_get(port_id, error);
if (unlikely(!ops))
return NULL;
- if (unlikely(!ops->shared_action_create)) {
+ if (unlikely(!ops->action_handle_create)) {
rte_flow_error_set(error, ENOSYS,
RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
rte_strerror(ENOSYS));
return NULL;
}
- shared_action = ops->shared_action_create(&rte_eth_devices[port_id],
- conf, action, error);
- if (shared_action == NULL)
+ handle = ops->action_handle_create(&rte_eth_devices[port_id],
+ conf, action, error);
+ if (handle == NULL)
flow_err(port_id, -rte_errno, error);
- return shared_action;
+ return handle;
}
int
-rte_flow_shared_action_destroy(uint16_t port_id,
- struct rte_flow_shared_action *action,
- struct rte_flow_error *error)
+rte_flow_action_handle_destroy(uint16_t port_id,
+ struct rte_flow_action_handle *handle,
+ struct rte_flow_error *error)
{
int ret;
const struct rte_flow_ops *ops = rte_flow_ops_get(port_id, error);
if (unlikely(!ops))
return -rte_errno;
- if (unlikely(!ops->shared_action_destroy))
+ if (unlikely(!ops->action_handle_destroy))
return rte_flow_error_set(error, ENOSYS,
RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
NULL, rte_strerror(ENOSYS));
- ret = ops->shared_action_destroy(&rte_eth_devices[port_id], action,
- error);
+ ret = ops->action_handle_destroy(&rte_eth_devices[port_id],
+ handle, error);
return flow_err(port_id, ret, error);
}
int
-rte_flow_shared_action_update(uint16_t port_id,
- struct rte_flow_shared_action *action,
- const struct rte_flow_action *update,
+rte_flow_action_handle_update(uint16_t port_id,
+ struct rte_flow_action_handle *handle,
+ const void *update,
struct rte_flow_error *error)
{
int ret;
@@ -1122,18 +1122,18 @@ rte_flow_shared_action_update(uint16_t port_id,
if (unlikely(!ops))
return -rte_errno;
- if (unlikely(!ops->shared_action_update))
+ if (unlikely(!ops->action_handle_update))
return rte_flow_error_set(error, ENOSYS,
RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
NULL, rte_strerror(ENOSYS));
- ret = ops->shared_action_update(&rte_eth_devices[port_id], action,
+ ret = ops->action_handle_update(&rte_eth_devices[port_id], handle,
update, error);
return flow_err(port_id, ret, error);
}
int
-rte_flow_shared_action_query(uint16_t port_id,
- const struct rte_flow_shared_action *action,
+rte_flow_action_handle_query(uint16_t port_id,
+ const struct rte_flow_action_handle *handle,
void *data,
struct rte_flow_error *error)
{
@@ -1142,11 +1142,11 @@ rte_flow_shared_action_query(uint16_t port_id,
if (unlikely(!ops))
return -rte_errno;
- if (unlikely(!ops->shared_action_query))
+ if (unlikely(!ops->action_handle_query))
return rte_flow_error_set(error, ENOSYS,
RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
NULL, rte_strerror(ENOSYS));
- ret = ops->shared_action_query(&rte_eth_devices[port_id], action,
+ ret = ops->action_handle_query(&rte_eth_devices[port_id], handle,
data, error);
return flow_err(port_id, ret, error);
}
diff --git a/lib/librte_ethdev/rte_flow.h b/lib/librte_ethdev/rte_flow.h
index 203c4cde9a..324d00abdc 100644
--- a/lib/librte_ethdev/rte_flow.h
+++ b/lib/librte_ethdev/rte_flow.h
@@ -1821,7 +1821,7 @@ enum rte_flow_action_type {
* Enables counters for this flow rule.
*
* These counters can be retrieved and reset through rte_flow_query() or
- * rte_flow_shared_action_query() if the action provided via handle,
+ * rte_flow_action_handle_query() if the action provided via handle,
* see struct rte_flow_query_count.
*
* See struct rte_flow_action_count.
@@ -2267,6 +2267,16 @@ enum rte_flow_action_type {
* See struct rte_flow_action_modify_field.
*/
RTE_FLOW_ACTION_TYPE_MODIFY_FIELD,
+
+ /**
+ * Describe indirect action that could be used by a single flow rule
+ * or multiple flow rules.
+ *
+ * Allow flow rule(s) reference the same action by the indirect action
+ * handle (see struct rte_flow_action_handle), rules could be on the
+ * same port or across different ports.
+ */
+ RTE_FLOW_ACTION_TYPE_INDIRECT,
};
/**
@@ -2357,7 +2367,7 @@ struct rte_flow_query_age {
* ``struct rte_flow_query_count``.
*
* @deprecated Shared attribute is deprecated, use generic
- * RTE_FLOW_ACTION_TYPE_SHARED action.
+ * RTE_FLOW_ACTION_TYPE_INDIRECT action.
*
* The shared flag indicates whether the counter is unique to the flow rule the
* action is specified with, or whether it is a shared counter.
@@ -2847,17 +2857,23 @@ struct rte_flow_action_set_dscp {
};
/**
- * RTE_FLOW_ACTION_TYPE_SHARED
+ * @warning
+ * @b EXPERIMENTAL: this structure may change without prior notice
+ *
+ * RTE_FLOW_ACTION_TYPE_INDIRECT
*
- * Opaque type returned after successfully creating a shared action.
+ * Opaque type returned after successfully creating an indirect action object.
+ * The definition of the object handle will be different per driver or
+ * per immediate action type.
*
- * This handle can be used to manage and query the related action:
- * - share it across multiple flow rules
- * - update action configuration
- * - query action data
- * - destroy action
+ * This handle can be used to manage and query the related immediate action:
+ * - referenced in single flow rule or across multiple flow rules
+ * over multiple ports
+ * - update action object configuration
+ * - query action object data
+ * - destroy action object
*/
-struct rte_flow_shared_action;
+struct rte_flow_action_handle;
/**
* Field IDs for MODIFY_FIELD action.
@@ -3631,25 +3647,22 @@ rte_flow_get_aged_flows(uint16_t port_id, void **contexts,
uint32_t nb_contexts, struct rte_flow_error *error);
/**
- * Specify shared action configuration
+ * Specify indirect action object configuration
*/
-struct rte_flow_shared_action_conf {
+struct rte_flow_indir_action_conf {
/**
- * Flow direction for shared action configuration.
+ * Flow direction for the indirect action configuration.
*
- * Shared action should be valid at least for one flow direction,
+ * Action should be valid at least for one flow direction,
* otherwise it is invalid for both ingress and egress rules.
*/
uint32_t ingress:1;
/**< Action valid for rules applied to ingress traffic. */
uint32_t egress:1;
/**< Action valid for rules applied to egress traffic. */
-
/**
* When set to 1, indicates that the action is valid for
* transfer traffic; otherwise, for non-transfer traffic.
- *
- * See struct rte_flow_attr.
*/
uint32_t transfer:1;
};
@@ -3658,16 +3671,17 @@ struct rte_flow_shared_action_conf {
* @warning
* @b EXPERIMENTAL: this API may change without prior notice.
*
- * Create shared action for reuse in multiple flow rules.
- * The created shared action has single state and configuration
- * across all flow rules using it.
+ * Create an indirect action object that can be used by flow create, and
+ * could also be shared by different flows.
+ * The created object handle has single state and configuration
+ * across all the flow rules using it.
*
* @param[in] port_id
* The port identifier of the Ethernet device.
* @param[in] conf
- * Shared action configuration.
+ * Action configuration for the indirect action object creation.
* @param[in] action
- * Action configuration for shared action creation.
+ * Specific configuration of the indirect action object.
* @param[out] error
* Perform verbose error reporting if not NULL. PMDs initialize this
* structure in case of error only.
@@ -3681,9 +3695,9 @@ struct rte_flow_shared_action_conf {
* - (ENOTSUP) if *action* valid but unsupported.
*/
__rte_experimental
-struct rte_flow_shared_action *
-rte_flow_shared_action_create(uint16_t port_id,
- const struct rte_flow_shared_action_conf *conf,
+struct rte_flow_action_handle *
+rte_flow_action_handle_create(uint16_t port_id,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action,
struct rte_flow_error *error);
@@ -3691,12 +3705,12 @@ rte_flow_shared_action_create(uint16_t port_id,
* @warning
* @b EXPERIMENTAL: this API may change without prior notice.
*
- * Destroy the shared action by handle.
+ * Destroy indirect action by handle.
*
* @param[in] port_id
* The port identifier of the Ethernet device.
- * @param[in] action
- * Handle for the shared action to be destroyed.
+ * @param[in] handle
+ * Handle for the indirect action object to be destroyed.
* @param[out] error
* Perform verbose error reporting if not NULL. PMDs initialize this
* structure in case of error only.
@@ -3711,27 +3725,30 @@ rte_flow_shared_action_create(uint16_t port_id,
*/
__rte_experimental
int
-rte_flow_shared_action_destroy(uint16_t port_id,
- struct rte_flow_shared_action *action,
+rte_flow_action_handle_destroy(uint16_t port_id,
+ struct rte_flow_action_handle *handle,
struct rte_flow_error *error);
/**
* @warning
* @b EXPERIMENTAL: this API may change without prior notice.
*
- * Update in-place the shared action configuration pointed by *action* handle
- * with the configuration provided as *update* argument.
- * The update of the shared action configuration effects all flow rules reusing
- * the action via handle.
+ * Update in-place the action configuration and / or state pointed
+ * by action *handle* with the configuration provided as *update* argument.
+ * The update of the action configuration effects all flow rules reusing
+ * the action via *handle*.
+ * The update general pointer provides the ability of partial updating.
*
* @param[in] port_id
* The port identifier of the Ethernet device.
- * @param[in] action
- * Handle for the shared action to be updated.
+ * @param[in] handle
+ * Handle for the indirect action object to be updated.
* @param[in] update
- * Action specification used to modify the action pointed by handle.
- * *update* should be of same type with the action pointed by the *action*
- * handle argument, otherwise considered as invalid.
+ * Update profile specification used to modify the action pointed by handle.
+ * *update* could be with the same type of the immediate action corresponding
+ * to the *handle* argument when creating, or a wrapper structure includes
+ * action configuration to be updated and bit fields to indicate the member
+ * of fields inside the action to update.
* @param[out] error
* Perform verbose error reporting if not NULL. PMDs initialize this
* structure in case of error only.
@@ -3742,32 +3759,32 @@ rte_flow_shared_action_destroy(uint16_t port_id,
* - (-EIO) if underlying device is removed.
* - (-EINVAL) if *update* invalid.
* - (-ENOTSUP) if *update* valid but unsupported.
- * - (-ENOENT) if action pointed by *ctx* was not found.
+ * - (-ENOENT) if indirect action object pointed by *handle* was not found.
* rte_errno is also set.
*/
__rte_experimental
int
-rte_flow_shared_action_update(uint16_t port_id,
- struct rte_flow_shared_action *action,
- const struct rte_flow_action *update,
+rte_flow_action_handle_update(uint16_t port_id,
+ struct rte_flow_action_handle *handle,
+ const void *update,
struct rte_flow_error *error);
/**
* @warning
* @b EXPERIMENTAL: this API may change without prior notice.
*
- * Query the shared action by handle.
+ * Query the direct action by corresponding indirect action object handle.
*
* Retrieve action-specific data such as counters.
* Data is gathered by special action which may be present/referenced in
* more than one flow rule definition.
*
- * \see RTE_FLOW_ACTION_TYPE_COUNT
+ * @see RTE_FLOW_ACTION_TYPE_COUNT
*
* @param port_id
* Port identifier of Ethernet device.
- * @param[in] action
- * Handle for the shared action to query.
+ * @param[in] handle
+ * Handle for the action object to query.
* @param[in, out] data
* Pointer to storage for the associated query data type.
* @param[out] error
@@ -3779,10 +3796,9 @@ rte_flow_shared_action_update(uint16_t port_id,
*/
__rte_experimental
int
-rte_flow_shared_action_query(uint16_t port_id,
- const struct rte_flow_shared_action *action,
- void *data,
- struct rte_flow_error *error);
+rte_flow_action_handle_query(uint16_t port_id,
+ const struct rte_flow_action_handle *handle,
+ void *data, struct rte_flow_error *error);
/* Tunnel has a type and the key information. */
struct rte_flow_tunnel {
diff --git a/lib/librte_ethdev/rte_flow_driver.h b/lib/librte_ethdev/rte_flow_driver.h
index 6ae1f8c264..46f62c2ec2 100644
--- a/lib/librte_ethdev/rte_flow_driver.h
+++ b/lib/librte_ethdev/rte_flow_driver.h
@@ -84,27 +84,27 @@ struct rte_flow_ops {
void **context,
uint32_t nb_contexts,
struct rte_flow_error *err);
- /** See rte_flow_shared_action_create() */
- struct rte_flow_shared_action *(*shared_action_create)
+ /** See rte_flow_action_handle_create() */
+ struct rte_flow_action_handle *(*action_handle_create)
(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action_conf *conf,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action,
struct rte_flow_error *error);
- /** See rte_flow_shared_action_destroy() */
- int (*shared_action_destroy)
+ /** See rte_flow_action_handle_destroy() */
+ int (*action_handle_destroy)
(struct rte_eth_dev *dev,
- struct rte_flow_shared_action *shared_action,
+ struct rte_flow_action_handle *handle,
struct rte_flow_error *error);
- /** See rte_flow_shared_action_update() */
- int (*shared_action_update)
+ /** See rte_flow_action_handle_update() */
+ int (*action_handle_update)
(struct rte_eth_dev *dev,
- struct rte_flow_shared_action *shared_action,
- const struct rte_flow_action *update,
+ struct rte_flow_action_handle *handle,
+ const void *update,
struct rte_flow_error *error);
- /** See rte_flow_shared_action_query() */
- int (*shared_action_query)
+ /** See rte_flow_action_handle_query() */
+ int (*action_handle_query)
(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action *shared_action,
+ const struct rte_flow_action_handle *handle,
void *data,
struct rte_flow_error *error);
/** See rte_flow_tunnel_decap_set() */
diff --git a/lib/librte_ethdev/version.map b/lib/librte_ethdev/version.map
index 93ad388e96..4eb561a89a 100644
--- a/lib/librte_ethdev/version.map
+++ b/lib/librte_ethdev/version.map
@@ -231,10 +231,6 @@ EXPERIMENTAL {
rte_eth_fec_get_capability;
rte_eth_fec_get;
rte_eth_fec_set;
- rte_flow_shared_action_create;
- rte_flow_shared_action_destroy;
- rte_flow_shared_action_query;
- rte_flow_shared_action_update;
rte_flow_tunnel_decap_set;
rte_flow_tunnel_match;
rte_flow_get_restore_info;
@@ -246,6 +242,10 @@ EXPERIMENTAL {
# added in 21.05
rte_eth_representor_info_get;
+ rte_flow_action_handle_create;
+ rte_flow_action_handle_destroy;
+ rte_flow_action_handle_update;
+ rte_flow_action_handle_query;
};
INTERNAL {
--
2.19.0.windows.1
^ permalink raw reply [relevance 1%]
* [dpdk-dev] [PATCH 13/14] lib: remove librte_ prefix from directory names
@ 2021-04-16 17:04 1% ` Bruce Richardson
0 siblings, 0 replies; 200+ results
From: Bruce Richardson @ 2021-04-16 17:04 UTC (permalink / raw)
To: dev; +Cc: Bruce Richardson
There is no reason for the DPDK libraries to all have 'librte_' prefix on
the directory names. This prefix makes the directory names longer and also
makes it awkward to add features referring to individual libraries in the
build - should the lib names be specified with or without the prefix.
Therefore, we can just remove the library prefix and use the library's
unique name as the directory name, i.e. 'eal' rather than 'librte_eal'
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
---
MAINTAINERS | 210 +++++++++---------
app/test/test_eal_fs.c | 2 +-
app/test/test_memzone.c | 2 +-
app/test/test_telemetry_json.c | 2 +-
config/arm/meson.build | 2 +-
devtools/build-tags.sh | 14 +-
doc/api/doxy-api.conf.in | 104 ++++-----
doc/guides/contributing/abi_versioning.rst | 12 +-
doc/guides/contributing/coding_style.rst | 4 +-
doc/guides/contributing/documentation.rst | 10 +-
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lib/{librte_ethdev => ethdev}/rte_mtr.c | 0
lib/{librte_ethdev => ethdev}/rte_mtr.h | 0
.../rte_mtr_driver.h | 0
lib/{librte_ethdev => ethdev}/rte_tm.c | 0
lib/{librte_ethdev => ethdev}/rte_tm.h | 0
lib/{librte_ethdev => ethdev}/rte_tm_driver.h | 0
lib/{librte_ethdev => ethdev}/version.map | 0
.../eventdev_pmd.h | 0
.../eventdev_pmd_pci.h | 0
.../eventdev_pmd_vdev.h | 0
.../eventdev_trace_points.c | 0
lib/{librte_eventdev => eventdev}/meson.build | 0
.../rte_event_crypto_adapter.c | 0
.../rte_event_crypto_adapter.h | 0
.../rte_event_eth_rx_adapter.c | 0
.../rte_event_eth_rx_adapter.h | 0
.../rte_event_eth_tx_adapter.c | 0
.../rte_event_eth_tx_adapter.h | 0
.../rte_event_ring.c | 0
.../rte_event_ring.h | 0
.../rte_event_timer_adapter.c | 0
.../rte_event_timer_adapter.h | 0
.../rte_event_timer_adapter_pmd.h | 0
.../rte_eventdev.c | 0
.../rte_eventdev.h | 0
.../rte_eventdev_trace.h | 0
.../rte_eventdev_trace_fp.h | 0
lib/{librte_eventdev => eventdev}/version.map | 0
lib/{librte_fib => fib}/dir24_8.c | 0
lib/{librte_fib => fib}/dir24_8.h | 0
lib/{librte_fib => fib}/dir24_8_avx512.c | 0
lib/{librte_fib => fib}/dir24_8_avx512.h | 0
lib/{librte_fib => fib}/meson.build | 0
lib/{librte_fib => fib}/rte_fib.c | 0
lib/{librte_fib => fib}/rte_fib.h | 0
lib/{librte_fib => fib}/rte_fib6.c | 0
lib/{librte_fib => fib}/rte_fib6.h | 0
lib/{librte_fib => fib}/trie.c | 0
lib/{librte_fib => fib}/trie.h | 0
lib/{librte_fib => fib}/trie_avx512.c | 0
lib/{librte_fib => fib}/trie_avx512.h | 0
lib/{librte_fib => fib}/version.map | 0
.../meson.build | 0
.../rte_flow_classify.c | 0
.../rte_flow_classify.h | 0
.../rte_flow_classify_parse.c | 0
.../rte_flow_classify_parse.h | 0
.../version.map | 0
lib/{librte_graph => graph}/graph.c | 0
lib/{librte_graph => graph}/graph_debug.c | 0
lib/{librte_graph => graph}/graph_ops.c | 0
lib/{librte_graph => graph}/graph_populate.c | 0
lib/{librte_graph => graph}/graph_private.h | 0
lib/{librte_graph => graph}/graph_stats.c | 0
lib/{librte_graph => graph}/meson.build | 0
lib/{librte_graph => graph}/node.c | 0
lib/{librte_graph => graph}/rte_graph.h | 0
.../rte_graph_worker.h | 0
lib/{librte_graph => graph}/version.map | 0
lib/{librte_gro => gro}/gro_tcp4.c | 0
lib/{librte_gro => gro}/gro_tcp4.h | 0
lib/{librte_gro => gro}/gro_udp4.c | 0
lib/{librte_gro => gro}/gro_udp4.h | 0
lib/{librte_gro => gro}/gro_vxlan_tcp4.c | 0
lib/{librte_gro => gro}/gro_vxlan_tcp4.h | 0
lib/{librte_gro => gro}/gro_vxlan_udp4.c | 0
lib/{librte_gro => gro}/gro_vxlan_udp4.h | 0
lib/{librte_gro => gro}/meson.build | 0
lib/{librte_gro => gro}/rte_gro.c | 0
lib/{librte_gro => gro}/rte_gro.h | 0
lib/{librte_gro => gro}/version.map | 0
lib/{librte_gso => gso}/gso_common.c | 0
lib/{librte_gso => gso}/gso_common.h | 0
lib/{librte_gso => gso}/gso_tcp4.c | 0
lib/{librte_gso => gso}/gso_tcp4.h | 0
lib/{librte_gso => gso}/gso_tunnel_tcp4.c | 0
lib/{librte_gso => gso}/gso_tunnel_tcp4.h | 0
lib/{librte_gso => gso}/gso_tunnel_udp4.c | 0
lib/{librte_gso => gso}/gso_tunnel_udp4.h | 0
lib/{librte_gso => gso}/gso_udp4.c | 0
lib/{librte_gso => gso}/gso_udp4.h | 0
lib/{librte_gso => gso}/meson.build | 0
lib/{librte_gso => gso}/rte_gso.c | 0
lib/{librte_gso => gso}/rte_gso.h | 0
lib/{librte_gso => gso}/version.map | 0
lib/{librte_hash => hash}/meson.build | 0
lib/{librte_hash => hash}/rte_cmp_arm64.h | 0
lib/{librte_hash => hash}/rte_cmp_x86.h | 0
lib/{librte_hash => hash}/rte_crc_arm64.h | 0
lib/{librte_hash => hash}/rte_cuckoo_hash.c | 0
lib/{librte_hash => hash}/rte_cuckoo_hash.h | 0
lib/{librte_hash => hash}/rte_fbk_hash.c | 0
lib/{librte_hash => hash}/rte_fbk_hash.h | 0
lib/{librte_hash => hash}/rte_hash.h | 0
lib/{librte_hash => hash}/rte_hash_crc.h | 0
lib/{librte_hash => hash}/rte_jhash.h | 0
lib/{librte_hash => hash}/rte_thash.h | 0
lib/{librte_hash => hash}/version.map | 0
.../ip_frag_common.h | 0
.../ip_frag_internal.c | 0
lib/{librte_ip_frag => ip_frag}/meson.build | 0
lib/{librte_ip_frag => ip_frag}/rte_ip_frag.h | 0
.../rte_ip_frag_common.c | 0
.../rte_ipv4_fragmentation.c | 0
.../rte_ipv4_reassembly.c | 0
.../rte_ipv6_fragmentation.c | 0
.../rte_ipv6_reassembly.c | 0
lib/{librte_ip_frag => ip_frag}/version.map | 0
lib/{librte_ipsec => ipsec}/crypto.h | 0
lib/{librte_ipsec => ipsec}/esp_inb.c | 0
lib/{librte_ipsec => ipsec}/esp_outb.c | 0
lib/{librte_ipsec => ipsec}/iph.h | 0
lib/{librte_ipsec => ipsec}/ipsec_sad.c | 0
lib/{librte_ipsec => ipsec}/ipsec_sqn.h | 0
lib/{librte_ipsec => ipsec}/meson.build | 0
lib/{librte_ipsec => ipsec}/misc.h | 0
lib/{librte_ipsec => ipsec}/pad.h | 0
lib/{librte_ipsec => ipsec}/rte_ipsec.h | 0
lib/{librte_ipsec => ipsec}/rte_ipsec_group.h | 0
lib/{librte_ipsec => ipsec}/rte_ipsec_sa.h | 0
lib/{librte_ipsec => ipsec}/rte_ipsec_sad.h | 0
lib/{librte_ipsec => ipsec}/sa.c | 0
lib/{librte_ipsec => ipsec}/sa.h | 0
lib/{librte_ipsec => ipsec}/ses.c | 0
lib/{librte_ipsec => ipsec}/version.map | 0
lib/{librte_jobstats => jobstats}/meson.build | 0
.../rte_jobstats.c | 0
.../rte_jobstats.h | 0
lib/{librte_jobstats => jobstats}/version.map | 0
lib/{librte_kni => kni}/meson.build | 0
lib/{librte_kni => kni}/rte_kni.c | 0
lib/{librte_kni => kni}/rte_kni.h | 0
lib/{librte_kni => kni}/rte_kni_common.h | 0
lib/{librte_kni => kni}/rte_kni_fifo.h | 0
lib/{librte_kni => kni}/version.map | 0
lib/{librte_kvargs => kvargs}/meson.build | 0
lib/{librte_kvargs => kvargs}/rte_kvargs.c | 0
lib/{librte_kvargs => kvargs}/rte_kvargs.h | 0
lib/{librte_kvargs => kvargs}/version.map | 0
.../meson.build | 0
.../rte_latencystats.c | 0
.../rte_latencystats.h | 0
.../version.map | 0
lib/{librte_lpm => lpm}/meson.build | 0
lib/{librte_lpm => lpm}/rte_lpm.c | 0
lib/{librte_lpm => lpm}/rte_lpm.h | 0
lib/{librte_lpm => lpm}/rte_lpm6.c | 0
lib/{librte_lpm => lpm}/rte_lpm6.h | 0
lib/{librte_lpm => lpm}/rte_lpm_altivec.h | 0
lib/{librte_lpm => lpm}/rte_lpm_neon.h | 0
lib/{librte_lpm => lpm}/rte_lpm_sse.h | 0
lib/{librte_lpm => lpm}/rte_lpm_sve.h | 0
lib/{librte_lpm => lpm}/version.map | 0
lib/{librte_mbuf => mbuf}/meson.build | 0
lib/{librte_mbuf => mbuf}/rte_mbuf.c | 0
lib/{librte_mbuf => mbuf}/rte_mbuf.h | 0
lib/{librte_mbuf => mbuf}/rte_mbuf_core.h | 0
lib/{librte_mbuf => mbuf}/rte_mbuf_dyn.c | 0
lib/{librte_mbuf => mbuf}/rte_mbuf_dyn.h | 0
lib/{librte_mbuf => mbuf}/rte_mbuf_pool_ops.c | 0
lib/{librte_mbuf => mbuf}/rte_mbuf_pool_ops.h | 0
lib/{librte_mbuf => mbuf}/rte_mbuf_ptype.c | 0
lib/{librte_mbuf => mbuf}/rte_mbuf_ptype.h | 0
lib/{librte_mbuf => mbuf}/version.map | 0
lib/{librte_member => member}/meson.build | 0
lib/{librte_member => member}/rte_member.c | 0
lib/{librte_member => member}/rte_member.h | 0
lib/{librte_member => member}/rte_member_ht.c | 0
lib/{librte_member => member}/rte_member_ht.h | 0
.../rte_member_vbf.c | 0
.../rte_member_vbf.h | 0
.../rte_member_x86.h | 0
lib/{librte_member => member}/version.map | 0
.../mempool_trace_points.c | 0
lib/{librte_mempool => mempool}/meson.build | 0
lib/{librte_mempool => mempool}/rte_mempool.c | 0
lib/{librte_mempool => mempool}/rte_mempool.h | 0
.../rte_mempool_ops.c | 0
.../rte_mempool_ops_default.c | 0
.../rte_mempool_trace.h | 0
.../rte_mempool_trace_fp.h | 0
lib/{librte_mempool => mempool}/version.map | 0
lib/meson.build | 16 +-
lib/{librte_meter => meter}/meson.build | 0
lib/{librte_meter => meter}/rte_meter.c | 0
lib/{librte_meter => meter}/rte_meter.h | 0
lib/{librte_meter => meter}/version.map | 0
lib/{librte_metrics => metrics}/meson.build | 0
lib/{librte_metrics => metrics}/rte_metrics.c | 0
lib/{librte_metrics => metrics}/rte_metrics.h | 0
.../rte_metrics_telemetry.c | 0
.../rte_metrics_telemetry.h | 0
lib/{librte_metrics => metrics}/version.map | 0
lib/{librte_net => net}/meson.build | 0
lib/{librte_net => net}/net_crc.h | 0
lib/{librte_net => net}/net_crc_avx512.c | 0
lib/{librte_net => net}/net_crc_neon.c | 0
lib/{librte_net => net}/net_crc_sse.c | 0
lib/{librte_net => net}/rte_arp.c | 0
lib/{librte_net => net}/rte_arp.h | 0
lib/{librte_net => net}/rte_ecpri.h | 0
lib/{librte_net => net}/rte_esp.h | 0
lib/{librte_net => net}/rte_ether.c | 0
lib/{librte_net => net}/rte_ether.h | 0
lib/{librte_net => net}/rte_geneve.h | 0
lib/{librte_net => net}/rte_gre.h | 0
lib/{librte_net => net}/rte_gtp.h | 0
lib/{librte_net => net}/rte_higig.h | 0
lib/{librte_net => net}/rte_icmp.h | 0
lib/{librte_net => net}/rte_ip.h | 0
lib/{librte_net => net}/rte_mpls.h | 0
lib/{librte_net => net}/rte_net.c | 0
lib/{librte_net => net}/rte_net.h | 0
lib/{librte_net => net}/rte_net_crc.c | 0
lib/{librte_net => net}/rte_net_crc.h | 0
lib/{librte_net => net}/rte_sctp.h | 0
lib/{librte_net => net}/rte_tcp.h | 0
lib/{librte_net => net}/rte_udp.h | 0
lib/{librte_net => net}/rte_vxlan.h | 0
lib/{librte_net => net}/version.map | 0
lib/{librte_node => node}/ethdev_ctrl.c | 0
lib/{librte_node => node}/ethdev_rx.c | 0
lib/{librte_node => node}/ethdev_rx_priv.h | 0
lib/{librte_node => node}/ethdev_tx.c | 0
lib/{librte_node => node}/ethdev_tx_priv.h | 0
lib/{librte_node => node}/ip4_lookup.c | 0
lib/{librte_node => node}/ip4_lookup_neon.h | 0
lib/{librte_node => node}/ip4_lookup_sse.h | 0
lib/{librte_node => node}/ip4_rewrite.c | 0
lib/{librte_node => node}/ip4_rewrite_priv.h | 0
lib/{librte_node => node}/log.c | 0
lib/{librte_node => node}/meson.build | 0
lib/{librte_node => node}/node_private.h | 0
lib/{librte_node => node}/null.c | 0
lib/{librte_node => node}/pkt_cls.c | 0
lib/{librte_node => node}/pkt_cls_priv.h | 0
lib/{librte_node => node}/pkt_drop.c | 0
lib/{librte_node => node}/rte_node_eth_api.h | 0
lib/{librte_node => node}/rte_node_ip4_api.h | 0
lib/{librte_node => node}/version.map | 0
lib/{librte_pci => pci}/meson.build | 0
lib/{librte_pci => pci}/rte_pci.c | 0
lib/{librte_pci => pci}/rte_pci.h | 0
lib/{librte_pci => pci}/version.map | 0
lib/{librte_pdump => pdump}/meson.build | 0
lib/{librte_pdump => pdump}/rte_pdump.c | 0
lib/{librte_pdump => pdump}/rte_pdump.h | 0
lib/{librte_pdump => pdump}/version.map | 0
lib/{librte_pipeline => pipeline}/meson.build | 0
.../rte_pipeline.c | 0
.../rte_pipeline.h | 0
.../rte_port_in_action.c | 0
.../rte_port_in_action.h | 0
.../rte_swx_ctl.c | 0
.../rte_swx_ctl.h | 0
.../rte_swx_extern.h | 0
.../rte_swx_pipeline.c | 0
.../rte_swx_pipeline.h | 0
.../rte_swx_pipeline_spec.c | 0
.../rte_table_action.c | 0
.../rte_table_action.h | 0
lib/{librte_pipeline => pipeline}/version.map | 0
lib/{librte_port => port}/meson.build | 0
lib/{librte_port => port}/rte_port.h | 0
lib/{librte_port => port}/rte_port_ethdev.c | 0
lib/{librte_port => port}/rte_port_ethdev.h | 0
lib/{librte_port => port}/rte_port_eventdev.c | 0
lib/{librte_port => port}/rte_port_eventdev.h | 0
lib/{librte_port => port}/rte_port_fd.c | 0
lib/{librte_port => port}/rte_port_fd.h | 0
lib/{librte_port => port}/rte_port_frag.c | 0
lib/{librte_port => port}/rte_port_frag.h | 0
lib/{librte_port => port}/rte_port_kni.c | 0
lib/{librte_port => port}/rte_port_kni.h | 0
lib/{librte_port => port}/rte_port_ras.c | 0
lib/{librte_port => port}/rte_port_ras.h | 0
lib/{librte_port => port}/rte_port_ring.c | 0
lib/{librte_port => port}/rte_port_ring.h | 0
lib/{librte_port => port}/rte_port_sched.c | 0
lib/{librte_port => port}/rte_port_sched.h | 0
.../rte_port_source_sink.c | 0
.../rte_port_source_sink.h | 0
.../rte_port_sym_crypto.c | 0
.../rte_port_sym_crypto.h | 0
lib/{librte_port => port}/rte_swx_port.h | 0
.../rte_swx_port_ethdev.c | 0
.../rte_swx_port_ethdev.h | 0
lib/{librte_port => port}/rte_swx_port_fd.c | 0
lib/{librte_port => port}/rte_swx_port_fd.h | 0
lib/{librte_port => port}/rte_swx_port_ring.c | 0
lib/{librte_port => port}/rte_swx_port_ring.h | 0
.../rte_swx_port_source_sink.c | 0
.../rte_swx_port_source_sink.h | 0
lib/{librte_port => port}/version.map | 0
lib/{librte_power => power}/guest_channel.c | 0
lib/{librte_power => power}/guest_channel.h | 0
lib/{librte_power => power}/meson.build | 0
.../power_acpi_cpufreq.c | 0
.../power_acpi_cpufreq.h | 0
lib/{librte_power => power}/power_common.c | 0
lib/{librte_power => power}/power_common.h | 0
lib/{librte_power => power}/power_kvm_vm.c | 0
lib/{librte_power => power}/power_kvm_vm.h | 0
.../power_pstate_cpufreq.c | 0
.../power_pstate_cpufreq.h | 0
lib/{librte_power => power}/rte_power.c | 0
lib/{librte_power => power}/rte_power.h | 0
.../rte_power_empty_poll.c | 0
.../rte_power_empty_poll.h | 0
.../rte_power_guest_channel.h | 0
.../rte_power_pmd_mgmt.c | 0
.../rte_power_pmd_mgmt.h | 0
lib/{librte_power => power}/version.map | 0
lib/{librte_rawdev => rawdev}/meson.build | 0
lib/{librte_rawdev => rawdev}/rte_rawdev.c | 0
lib/{librte_rawdev => rawdev}/rte_rawdev.h | 0
.../rte_rawdev_pmd.h | 0
lib/{librte_rawdev => rawdev}/version.map | 0
lib/{librte_rcu => rcu}/meson.build | 0
lib/{librte_rcu => rcu}/rcu_qsbr_pvt.h | 0
lib/{librte_rcu => rcu}/rte_rcu_qsbr.c | 0
lib/{librte_rcu => rcu}/rte_rcu_qsbr.h | 0
lib/{librte_rcu => rcu}/version.map | 0
lib/{librte_regexdev => regexdev}/meson.build | 0
.../rte_regexdev.c | 0
.../rte_regexdev.h | 0
.../rte_regexdev_core.h | 0
.../rte_regexdev_driver.h | 0
lib/{librte_regexdev => regexdev}/version.map | 0
lib/{librte_reorder => reorder}/meson.build | 0
lib/{librte_reorder => reorder}/rte_reorder.c | 0
lib/{librte_reorder => reorder}/rte_reorder.h | 0
lib/{librte_reorder => reorder}/version.map | 0
lib/{librte_rib => rib}/meson.build | 0
lib/{librte_rib => rib}/rte_rib.c | 0
lib/{librte_rib => rib}/rte_rib.h | 0
lib/{librte_rib => rib}/rte_rib6.c | 0
lib/{librte_rib => rib}/rte_rib6.h | 0
lib/{librte_rib => rib}/version.map | 0
lib/{librte_ring => ring}/meson.build | 0
lib/{librte_ring => ring}/rte_ring.c | 0
lib/{librte_ring => ring}/rte_ring.h | 0
lib/{librte_ring => ring}/rte_ring_c11_pvt.h | 0
lib/{librte_ring => ring}/rte_ring_core.h | 0
lib/{librte_ring => ring}/rte_ring_elem.h | 0
lib/{librte_ring => ring}/rte_ring_elem_pvt.h | 0
.../rte_ring_generic_pvt.h | 0
lib/{librte_ring => ring}/rte_ring_hts.h | 0
.../rte_ring_hts_elem_pvt.h | 0
lib/{librte_ring => ring}/rte_ring_peek.h | 0
.../rte_ring_peek_elem_pvt.h | 0
lib/{librte_ring => ring}/rte_ring_peek_zc.h | 0
lib/{librte_ring => ring}/rte_ring_rts.h | 0
.../rte_ring_rts_elem_pvt.h | 0
lib/{librte_ring => ring}/version.map | 0
lib/{librte_sched => sched}/meson.build | 0
lib/{librte_sched => sched}/rte_approx.c | 0
lib/{librte_sched => sched}/rte_approx.h | 0
lib/{librte_sched => sched}/rte_red.c | 0
lib/{librte_sched => sched}/rte_red.h | 0
lib/{librte_sched => sched}/rte_sched.c | 0
lib/{librte_sched => sched}/rte_sched.h | 0
.../rte_sched_common.h | 0
lib/{librte_sched => sched}/version.map | 0
lib/{librte_security => security}/meson.build | 0
.../rte_security.c | 0
.../rte_security.h | 0
.../rte_security_driver.h | 0
lib/{librte_security => security}/version.map | 0
lib/{librte_stack => stack}/meson.build | 0
lib/{librte_stack => stack}/rte_stack.c | 0
lib/{librte_stack => stack}/rte_stack.h | 0
lib/{librte_stack => stack}/rte_stack_lf.c | 0
lib/{librte_stack => stack}/rte_stack_lf.h | 0
.../rte_stack_lf_c11.h | 0
.../rte_stack_lf_generic.h | 0
.../rte_stack_lf_stubs.h | 0
lib/{librte_stack => stack}/rte_stack_std.c | 0
lib/{librte_stack => stack}/rte_stack_std.h | 0
lib/{librte_stack => stack}/stack_pvt.h | 0
lib/{librte_stack => stack}/version.map | 0
lib/{librte_table => table}/meson.build | 0
lib/{librte_table => table}/rte_lru.h | 0
lib/{librte_table => table}/rte_lru_arm64.h | 0
lib/{librte_table => table}/rte_lru_x86.h | 0
lib/{librte_table => table}/rte_swx_table.h | 0
.../rte_swx_table_em.c | 0
.../rte_swx_table_em.h | 0
.../rte_swx_table_wm.c | 0
.../rte_swx_table_wm.h | 0
lib/{librte_table => table}/rte_table.h | 0
lib/{librte_table => table}/rte_table_acl.c | 0
lib/{librte_table => table}/rte_table_acl.h | 0
lib/{librte_table => table}/rte_table_array.c | 0
lib/{librte_table => table}/rte_table_array.h | 0
lib/{librte_table => table}/rte_table_hash.h | 0
.../rte_table_hash_cuckoo.c | 0
.../rte_table_hash_cuckoo.h | 0
.../rte_table_hash_ext.c | 0
.../rte_table_hash_func.h | 0
.../rte_table_hash_func_arm64.h | 0
.../rte_table_hash_key16.c | 0
.../rte_table_hash_key32.c | 0
.../rte_table_hash_key8.c | 0
.../rte_table_hash_lru.c | 0
lib/{librte_table => table}/rte_table_lpm.c | 0
lib/{librte_table => table}/rte_table_lpm.h | 0
.../rte_table_lpm_ipv6.c | 0
.../rte_table_lpm_ipv6.h | 0
lib/{librte_table => table}/rte_table_stub.c | 0
lib/{librte_table => table}/rte_table_stub.h | 0
lib/{librte_table => table}/version.map | 0
.../meson.build | 2 +-
.../rte_telemetry.h | 0
.../telemetry.c | 0
.../telemetry_data.c | 0
.../telemetry_data.h | 0
.../telemetry_internal.h | 0
.../telemetry_json.h | 0
.../telemetry_legacy.c | 0
.../version.map | 0
lib/{librte_timer => timer}/meson.build | 0
lib/{librte_timer => timer}/rte_timer.c | 0
lib/{librte_timer => timer}/rte_timer.h | 0
lib/{librte_timer => timer}/version.map | 0
lib/{librte_vhost => vhost}/fd_man.c | 0
lib/{librte_vhost => vhost}/fd_man.h | 0
lib/{librte_vhost => vhost}/iotlb.c | 0
lib/{librte_vhost => vhost}/iotlb.h | 0
lib/{librte_vhost => vhost}/meson.build | 0
lib/{librte_vhost => vhost}/rte_vdpa.h | 0
lib/{librte_vhost => vhost}/rte_vdpa_dev.h | 0
lib/{librte_vhost => vhost}/rte_vhost.h | 0
lib/{librte_vhost => vhost}/rte_vhost_async.h | 0
.../rte_vhost_crypto.h | 0
lib/{librte_vhost => vhost}/socket.c | 0
lib/{librte_vhost => vhost}/vdpa.c | 0
lib/{librte_vhost => vhost}/version.map | 0
lib/{librte_vhost => vhost}/vhost.c | 0
lib/{librte_vhost => vhost}/vhost.h | 0
lib/{librte_vhost => vhost}/vhost_crypto.c | 0
lib/{librte_vhost => vhost}/vhost_user.c | 0
lib/{librte_vhost => vhost}/vhost_user.h | 0
lib/{librte_vhost => vhost}/virtio_crypto.h | 0
lib/{librte_vhost => vhost}/virtio_net.c | 0
license/exceptions.txt | 6 +-
meson.build | 6 +-
877 files changed, 206 insertions(+), 204 deletions(-)
rename lib/{librte_acl => acl}/acl.h (100%)
rename lib/{librte_acl => acl}/acl_bld.c (100%)
rename lib/{librte_acl => acl}/acl_gen.c (100%)
rename lib/{librte_acl => acl}/acl_run.h (100%)
rename lib/{librte_acl => acl}/acl_run_altivec.c (100%)
rename lib/{librte_acl => acl}/acl_run_altivec.h (100%)
rename lib/{librte_acl => acl}/acl_run_avx2.c (100%)
rename lib/{librte_acl => acl}/acl_run_avx2.h (100%)
rename lib/{librte_acl => acl}/acl_run_avx512.c (100%)
rename lib/{librte_acl => acl}/acl_run_avx512_common.h (100%)
rename lib/{librte_acl => acl}/acl_run_avx512x16.h (100%)
rename lib/{librte_acl => acl}/acl_run_avx512x8.h (100%)
rename lib/{librte_acl => acl}/acl_run_neon.c (100%)
rename lib/{librte_acl => acl}/acl_run_neon.h (100%)
rename lib/{librte_acl => acl}/acl_run_scalar.c (100%)
rename lib/{librte_acl => acl}/acl_run_sse.c (100%)
rename lib/{librte_acl => acl}/acl_run_sse.h (100%)
rename lib/{librte_acl => acl}/acl_vect.h (100%)
rename lib/{librte_acl => acl}/meson.build (100%)
rename lib/{librte_acl => acl}/rte_acl.c (100%)
rename lib/{librte_acl => acl}/rte_acl.h (100%)
rename lib/{librte_acl => acl}/rte_acl_osdep.h (100%)
rename lib/{librte_acl => acl}/tb_mem.c (100%)
rename lib/{librte_acl => acl}/tb_mem.h (100%)
rename lib/{librte_acl => acl}/version.map (100%)
rename lib/{librte_bbdev => bbdev}/meson.build (100%)
rename lib/{librte_bbdev => bbdev}/rte_bbdev.c (100%)
rename lib/{librte_bbdev => bbdev}/rte_bbdev.h (100%)
rename lib/{librte_bbdev => bbdev}/rte_bbdev_op.h (100%)
rename lib/{librte_bbdev => bbdev}/rte_bbdev_pmd.h (100%)
rename lib/{librte_bbdev => bbdev}/version.map (100%)
rename lib/{librte_bitratestats => bitratestats}/meson.build (100%)
rename lib/{librte_bitratestats => bitratestats}/rte_bitrate.c (100%)
rename lib/{librte_bitratestats => bitratestats}/rte_bitrate.h (100%)
rename lib/{librte_bitratestats => bitratestats}/version.map (100%)
rename lib/{librte_bpf => bpf}/bpf.c (100%)
rename lib/{librte_bpf => bpf}/bpf_def.h (100%)
rename lib/{librte_bpf => bpf}/bpf_exec.c (100%)
rename lib/{librte_bpf => bpf}/bpf_impl.h (100%)
rename lib/{librte_bpf => bpf}/bpf_jit_arm64.c (100%)
rename lib/{librte_bpf => bpf}/bpf_jit_x86.c (100%)
rename lib/{librte_bpf => bpf}/bpf_load.c (100%)
rename lib/{librte_bpf => bpf}/bpf_load_elf.c (100%)
rename lib/{librte_bpf => bpf}/bpf_pkt.c (100%)
rename lib/{librte_bpf => bpf}/bpf_validate.c (100%)
rename lib/{librte_bpf => bpf}/meson.build (100%)
rename lib/{librte_bpf => bpf}/rte_bpf.h (100%)
rename lib/{librte_bpf => bpf}/rte_bpf_ethdev.h (100%)
rename lib/{librte_bpf => bpf}/version.map (100%)
rename lib/{librte_cfgfile => cfgfile}/meson.build (100%)
rename lib/{librte_cfgfile => cfgfile}/rte_cfgfile.c (100%)
rename lib/{librte_cfgfile => cfgfile}/rte_cfgfile.h (100%)
rename lib/{librte_cfgfile => cfgfile}/version.map (100%)
rename lib/{librte_cmdline => cmdline}/cmdline.c (100%)
rename lib/{librte_cmdline => cmdline}/cmdline.h (100%)
rename lib/{librte_cmdline => cmdline}/cmdline_cirbuf.c (100%)
rename lib/{librte_cmdline => cmdline}/cmdline_cirbuf.h (100%)
rename lib/{librte_cmdline => cmdline}/cmdline_os_unix.c (100%)
rename lib/{librte_cmdline => cmdline}/cmdline_os_windows.c (100%)
rename lib/{librte_cmdline => cmdline}/cmdline_parse.c (100%)
rename lib/{librte_cmdline => cmdline}/cmdline_parse.h (100%)
rename lib/{librte_cmdline => cmdline}/cmdline_parse_etheraddr.c (100%)
rename lib/{librte_cmdline => cmdline}/cmdline_parse_etheraddr.h (100%)
rename lib/{librte_cmdline => cmdline}/cmdline_parse_ipaddr.c (100%)
rename lib/{librte_cmdline => cmdline}/cmdline_parse_ipaddr.h (100%)
rename lib/{librte_cmdline => cmdline}/cmdline_parse_num.c (100%)
rename lib/{librte_cmdline => cmdline}/cmdline_parse_num.h (100%)
rename lib/{librte_cmdline => cmdline}/cmdline_parse_portlist.c (100%)
rename lib/{librte_cmdline => cmdline}/cmdline_parse_portlist.h (100%)
rename lib/{librte_cmdline => cmdline}/cmdline_parse_string.c (100%)
rename lib/{librte_cmdline => cmdline}/cmdline_parse_string.h (100%)
rename lib/{librte_cmdline => cmdline}/cmdline_private.h (100%)
rename lib/{librte_cmdline => cmdline}/cmdline_rdline.c (100%)
rename lib/{librte_cmdline => cmdline}/cmdline_rdline.h (100%)
rename lib/{librte_cmdline => cmdline}/cmdline_socket.c (100%)
rename lib/{librte_cmdline => cmdline}/cmdline_socket.h (100%)
rename lib/{librte_cmdline => cmdline}/cmdline_vt100.c (100%)
rename lib/{librte_cmdline => cmdline}/cmdline_vt100.h (100%)
rename lib/{librte_cmdline => cmdline}/meson.build (100%)
rename lib/{librte_cmdline => cmdline}/version.map (100%)
rename lib/{librte_compressdev => compressdev}/meson.build (100%)
rename lib/{librte_compressdev => compressdev}/rte_comp.c (100%)
rename lib/{librte_compressdev => compressdev}/rte_comp.h (100%)
rename lib/{librte_compressdev => compressdev}/rte_compressdev.c (100%)
rename lib/{librte_compressdev => compressdev}/rte_compressdev.h (100%)
rename lib/{librte_compressdev => compressdev}/rte_compressdev_internal.h (100%)
rename lib/{librte_compressdev => compressdev}/rte_compressdev_pmd.c (100%)
rename lib/{librte_compressdev => compressdev}/rte_compressdev_pmd.h (100%)
rename lib/{librte_compressdev => compressdev}/version.map (100%)
rename lib/{librte_cryptodev => cryptodev}/cryptodev_trace_points.c (100%)
rename lib/{librte_cryptodev => cryptodev}/meson.build (100%)
rename lib/{librte_cryptodev => cryptodev}/rte_crypto.h (100%)
rename lib/{librte_cryptodev => cryptodev}/rte_crypto_asym.h (100%)
rename lib/{librte_cryptodev => cryptodev}/rte_crypto_sym.h (100%)
rename lib/{librte_cryptodev => cryptodev}/rte_cryptodev.c (100%)
rename lib/{librte_cryptodev => cryptodev}/rte_cryptodev.h (100%)
rename lib/{librte_cryptodev => cryptodev}/rte_cryptodev_pmd.c (100%)
rename lib/{librte_cryptodev => cryptodev}/rte_cryptodev_pmd.h (100%)
rename lib/{librte_cryptodev => cryptodev}/rte_cryptodev_trace.h (100%)
rename lib/{librte_cryptodev => cryptodev}/rte_cryptodev_trace_fp.h (100%)
rename lib/{librte_cryptodev => cryptodev}/version.map (100%)
rename lib/{librte_distributor => distributor}/distributor_private.h (100%)
rename lib/{librte_distributor => distributor}/meson.build (100%)
rename lib/{librte_distributor => distributor}/rte_distributor.c (100%)
rename lib/{librte_distributor => distributor}/rte_distributor.h (100%)
rename lib/{librte_distributor => distributor}/rte_distributor_match_generic.c (100%)
rename lib/{librte_distributor => distributor}/rte_distributor_match_sse.c (100%)
rename lib/{librte_distributor => distributor}/rte_distributor_single.c (100%)
rename lib/{librte_distributor => distributor}/rte_distributor_single.h (100%)
rename lib/{librte_distributor => distributor}/version.map (100%)
rename lib/{librte_eal => eal}/arm/include/meson.build (100%)
rename lib/{librte_eal => eal}/arm/include/rte_atomic.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_atomic_32.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_atomic_64.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_byteorder.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_cpuflags.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_cpuflags_32.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_cpuflags_64.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_cycles.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_cycles_32.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_cycles_64.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_io.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_io_64.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_mcslock.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_memcpy.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_memcpy_32.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_memcpy_64.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_pause.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_pause_32.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_pause_64.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_pflock.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_power_intrinsics.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_prefetch.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_prefetch_32.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_prefetch_64.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_rwlock.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_spinlock.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_ticketlock.h (100%)
rename lib/{librte_eal => eal}/arm/include/rte_vect.h (100%)
rename lib/{librte_eal => eal}/arm/meson.build (100%)
rename lib/{librte_eal => eal}/arm/rte_cpuflags.c (100%)
rename lib/{librte_eal => eal}/arm/rte_cycles.c (100%)
rename lib/{librte_eal => eal}/arm/rte_hypervisor.c (100%)
rename lib/{librte_eal => eal}/arm/rte_power_intrinsics.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_bus.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_class.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_config.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_cpuflags.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_debug.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_dev.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_devargs.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_dynmem.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_errno.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_fbarray.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_hexdump.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_hypervisor.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_launch.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_lcore.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_log.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_mcfg.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_memalloc.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_memory.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_memzone.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_options.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_proc.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_string_fns.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_tailqs.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_thread.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_timer.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_trace.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_trace_ctf.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_trace_points.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_trace_utils.c (100%)
rename lib/{librte_eal => eal}/common/eal_common_uuid.c (100%)
rename lib/{librte_eal => eal}/common/eal_filesystem.h (100%)
rename lib/{librte_eal => eal}/common/eal_hugepages.h (100%)
rename lib/{librte_eal => eal}/common/eal_internal_cfg.h (100%)
rename lib/{librte_eal => eal}/common/eal_log.h (100%)
rename lib/{librte_eal => eal}/common/eal_memalloc.h (100%)
rename lib/{librte_eal => eal}/common/eal_memcfg.h (100%)
rename lib/{librte_eal => eal}/common/eal_options.h (100%)
rename lib/{librte_eal => eal}/common/eal_private.h (100%)
rename lib/{librte_eal => eal}/common/eal_thread.h (100%)
rename lib/{librte_eal => eal}/common/eal_trace.h (100%)
rename lib/{librte_eal => eal}/common/hotplug_mp.c (100%)
rename lib/{librte_eal => eal}/common/hotplug_mp.h (100%)
rename lib/{librte_eal => eal}/common/malloc_elem.c (100%)
rename lib/{librte_eal => eal}/common/malloc_elem.h (100%)
rename lib/{librte_eal => eal}/common/malloc_heap.c (100%)
rename lib/{librte_eal => eal}/common/malloc_heap.h (100%)
rename lib/{librte_eal => eal}/common/malloc_mp.c (100%)
rename lib/{librte_eal => eal}/common/malloc_mp.h (100%)
rename lib/{librte_eal => eal}/common/meson.build (100%)
rename lib/{librte_eal => eal}/common/rte_keepalive.c (100%)
rename lib/{librte_eal => eal}/common/rte_malloc.c (100%)
rename lib/{librte_eal => eal}/common/rte_random.c (100%)
rename lib/{librte_eal => eal}/common/rte_reciprocal.c (100%)
rename lib/{librte_eal => eal}/common/rte_service.c (100%)
rename lib/{librte_eal => eal}/common/rte_version.c (100%)
rename lib/{librte_eal => eal}/freebsd/eal.c (100%)
rename lib/{librte_eal => eal}/freebsd/eal_alarm.c (100%)
rename lib/{librte_eal => eal}/freebsd/eal_alarm_private.h (100%)
rename lib/{librte_eal => eal}/freebsd/eal_cpuflags.c (100%)
rename lib/{librte_eal => eal}/freebsd/eal_debug.c (100%)
rename lib/{librte_eal => eal}/freebsd/eal_dev.c (100%)
rename lib/{librte_eal => eal}/freebsd/eal_hugepage_info.c (100%)
rename lib/{librte_eal => eal}/freebsd/eal_interrupts.c (100%)
rename lib/{librte_eal => eal}/freebsd/eal_lcore.c (100%)
rename lib/{librte_eal => eal}/freebsd/eal_memalloc.c (100%)
rename lib/{librte_eal => eal}/freebsd/eal_memory.c (100%)
rename lib/{librte_eal => eal}/freebsd/eal_thread.c (100%)
rename lib/{librte_eal => eal}/freebsd/eal_timer.c (100%)
rename lib/{librte_eal => eal}/freebsd/include/meson.build (100%)
rename lib/{librte_eal => eal}/freebsd/include/rte_os.h (100%)
rename lib/{librte_eal => eal}/freebsd/include/rte_os_shim.h (100%)
rename lib/{librte_eal => eal}/freebsd/meson.build (100%)
rename lib/{librte_eal => eal}/include/generic/rte_atomic.h (100%)
rename lib/{librte_eal => eal}/include/generic/rte_byteorder.h (100%)
rename lib/{librte_eal => eal}/include/generic/rte_cpuflags.h (100%)
rename lib/{librte_eal => eal}/include/generic/rte_cycles.h (100%)
rename lib/{librte_eal => eal}/include/generic/rte_io.h (100%)
rename lib/{librte_eal => eal}/include/generic/rte_mcslock.h (100%)
rename lib/{librte_eal => eal}/include/generic/rte_memcpy.h (100%)
rename lib/{librte_eal => eal}/include/generic/rte_pause.h (100%)
rename lib/{librte_eal => eal}/include/generic/rte_pflock.h (100%)
rename lib/{librte_eal => eal}/include/generic/rte_power_intrinsics.h (100%)
rename lib/{librte_eal => eal}/include/generic/rte_prefetch.h (100%)
rename lib/{librte_eal => eal}/include/generic/rte_rwlock.h (100%)
rename lib/{librte_eal => eal}/include/generic/rte_spinlock.h (100%)
rename lib/{librte_eal => eal}/include/generic/rte_ticketlock.h (100%)
rename lib/{librte_eal => eal}/include/generic/rte_vect.h (100%)
rename lib/{librte_eal => eal}/include/meson.build (100%)
rename lib/{librte_eal => eal}/include/rte_alarm.h (100%)
rename lib/{librte_eal => eal}/include/rte_bitmap.h (100%)
rename lib/{librte_eal => eal}/include/rte_bitops.h (100%)
rename lib/{librte_eal => eal}/include/rte_branch_prediction.h (100%)
rename lib/{librte_eal => eal}/include/rte_bus.h (100%)
rename lib/{librte_eal => eal}/include/rte_class.h (100%)
rename lib/{librte_eal => eal}/include/rte_common.h (100%)
rename lib/{librte_eal => eal}/include/rte_compat.h (100%)
rename lib/{librte_eal => eal}/include/rte_debug.h (100%)
rename lib/{librte_eal => eal}/include/rte_dev.h (100%)
rename lib/{librte_eal => eal}/include/rte_devargs.h (100%)
rename lib/{librte_eal => eal}/include/rte_eal.h (100%)
rename lib/{librte_eal => eal}/include/rte_eal_interrupts.h (100%)
rename lib/{librte_eal => eal}/include/rte_eal_memconfig.h (100%)
rename lib/{librte_eal => eal}/include/rte_eal_paging.h (100%)
rename lib/{librte_eal => eal}/include/rte_eal_trace.h (100%)
rename lib/{librte_eal => eal}/include/rte_errno.h (100%)
rename lib/{librte_eal => eal}/include/rte_fbarray.h (100%)
rename lib/{librte_eal => eal}/include/rte_function_versioning.h (100%)
rename lib/{librte_eal => eal}/include/rte_hexdump.h (100%)
rename lib/{librte_eal => eal}/include/rte_hypervisor.h (100%)
rename lib/{librte_eal => eal}/include/rte_interrupts.h (100%)
rename lib/{librte_eal => eal}/include/rte_keepalive.h (100%)
rename lib/{librte_eal => eal}/include/rte_launch.h (100%)
rename lib/{librte_eal => eal}/include/rte_lcore.h (100%)
rename lib/{librte_eal => eal}/include/rte_log.h (100%)
rename lib/{librte_eal => eal}/include/rte_malloc.h (100%)
rename lib/{librte_eal => eal}/include/rte_memory.h (100%)
rename lib/{librte_eal => eal}/include/rte_memzone.h (100%)
rename lib/{librte_eal => eal}/include/rte_pci_dev_feature_defs.h (100%)
rename lib/{librte_eal => eal}/include/rte_pci_dev_features.h (100%)
rename lib/{librte_eal => eal}/include/rte_per_lcore.h (100%)
rename lib/{librte_eal => eal}/include/rte_random.h (100%)
rename lib/{librte_eal => eal}/include/rte_reciprocal.h (100%)
rename lib/{librte_eal => eal}/include/rte_service.h (100%)
rename lib/{librte_eal => eal}/include/rte_service_component.h (100%)
rename lib/{librte_eal => eal}/include/rte_string_fns.h (100%)
rename lib/{librte_eal => eal}/include/rte_tailq.h (100%)
rename lib/{librte_eal => eal}/include/rte_test.h (100%)
rename lib/{librte_eal => eal}/include/rte_thread.h (100%)
rename lib/{librte_eal => eal}/include/rte_time.h (100%)
rename lib/{librte_eal => eal}/include/rte_trace.h (100%)
rename lib/{librte_eal => eal}/include/rte_trace_point.h (100%)
rename lib/{librte_eal => eal}/include/rte_trace_point_register.h (100%)
rename lib/{librte_eal => eal}/include/rte_uuid.h (100%)
rename lib/{librte_eal => eal}/include/rte_version.h (100%)
rename lib/{librte_eal => eal}/include/rte_vfio.h (100%)
rename lib/{librte_eal => eal}/linux/eal.c (100%)
rename lib/{librte_eal => eal}/linux/eal_alarm.c (100%)
rename lib/{librte_eal => eal}/linux/eal_cpuflags.c (100%)
rename lib/{librte_eal => eal}/linux/eal_debug.c (100%)
rename lib/{librte_eal => eal}/linux/eal_dev.c (100%)
rename lib/{librte_eal => eal}/linux/eal_hugepage_info.c (100%)
rename lib/{librte_eal => eal}/linux/eal_interrupts.c (100%)
rename lib/{librte_eal => eal}/linux/eal_lcore.c (100%)
rename lib/{librte_eal => eal}/linux/eal_log.c (100%)
rename lib/{librte_eal => eal}/linux/eal_memalloc.c (100%)
rename lib/{librte_eal => eal}/linux/eal_memory.c (100%)
rename lib/{librte_eal => eal}/linux/eal_thread.c (100%)
rename lib/{librte_eal => eal}/linux/eal_timer.c (100%)
rename lib/{librte_eal => eal}/linux/eal_vfio.c (100%)
rename lib/{librte_eal => eal}/linux/eal_vfio.h (100%)
rename lib/{librte_eal => eal}/linux/eal_vfio_mp_sync.c (100%)
rename lib/{librte_eal => eal}/linux/include/meson.build (100%)
rename lib/{librte_eal => eal}/linux/include/rte_os.h (100%)
rename lib/{librte_eal => eal}/linux/include/rte_os_shim.h (100%)
rename lib/{librte_eal => eal}/linux/meson.build (100%)
rename lib/{librte_eal => eal}/meson.build (100%)
rename lib/{librte_eal => eal}/ppc/include/meson.build (100%)
rename lib/{librte_eal => eal}/ppc/include/rte_altivec.h (100%)
rename lib/{librte_eal => eal}/ppc/include/rte_atomic.h (100%)
rename lib/{librte_eal => eal}/ppc/include/rte_byteorder.h (100%)
rename lib/{librte_eal => eal}/ppc/include/rte_cpuflags.h (100%)
rename lib/{librte_eal => eal}/ppc/include/rte_cycles.h (100%)
rename lib/{librte_eal => eal}/ppc/include/rte_io.h (100%)
rename lib/{librte_eal => eal}/ppc/include/rte_mcslock.h (100%)
rename lib/{librte_eal => eal}/ppc/include/rte_memcpy.h (100%)
rename lib/{librte_eal => eal}/ppc/include/rte_pause.h (100%)
rename lib/{librte_eal => eal}/ppc/include/rte_pflock.h (100%)
rename lib/{librte_eal => eal}/ppc/include/rte_power_intrinsics.h (100%)
rename lib/{librte_eal => eal}/ppc/include/rte_prefetch.h (100%)
rename lib/{librte_eal => eal}/ppc/include/rte_rwlock.h (100%)
rename lib/{librte_eal => eal}/ppc/include/rte_spinlock.h (100%)
rename lib/{librte_eal => eal}/ppc/include/rte_ticketlock.h (100%)
rename lib/{librte_eal => eal}/ppc/include/rte_vect.h (100%)
rename lib/{librte_eal => eal}/ppc/meson.build (100%)
rename lib/{librte_eal => eal}/ppc/rte_cpuflags.c (100%)
rename lib/{librte_eal => eal}/ppc/rte_cycles.c (100%)
rename lib/{librte_eal => eal}/ppc/rte_hypervisor.c (100%)
rename lib/{librte_eal => eal}/ppc/rte_power_intrinsics.c (100%)
rename lib/{librte_eal => eal}/unix/eal_file.c (100%)
rename lib/{librte_eal => eal}/unix/eal_unix_memory.c (100%)
rename lib/{librte_eal => eal}/unix/eal_unix_timer.c (100%)
rename lib/{librte_eal => eal}/unix/meson.build (100%)
rename lib/{librte_eal => eal}/unix/rte_thread.c (100%)
rename lib/{librte_eal => eal}/version.map (100%)
rename lib/{librte_eal => eal}/windows/eal.c (100%)
rename lib/{librte_eal => eal}/windows/eal_alarm.c (100%)
rename lib/{librte_eal => eal}/windows/eal_debug.c (100%)
rename lib/{librte_eal => eal}/windows/eal_file.c (100%)
rename lib/{librte_eal => eal}/windows/eal_hugepages.c (100%)
rename lib/{librte_eal => eal}/windows/eal_interrupts.c (100%)
rename lib/{librte_eal => eal}/windows/eal_lcore.c (100%)
rename lib/{librte_eal => eal}/windows/eal_log.c (100%)
rename lib/{librte_eal => eal}/windows/eal_memalloc.c (100%)
rename lib/{librte_eal => eal}/windows/eal_memory.c (100%)
rename lib/{librte_eal => eal}/windows/eal_mp.c (100%)
rename lib/{librte_eal => eal}/windows/eal_thread.c (100%)
rename lib/{librte_eal => eal}/windows/eal_timer.c (100%)
rename lib/{librte_eal => eal}/windows/eal_windows.h (100%)
rename lib/{librte_eal => eal}/windows/fnmatch.c (100%)
rename lib/{librte_eal => eal}/windows/getopt.c (100%)
rename lib/{librte_eal => eal}/windows/include/dirent.h (100%)
rename lib/{librte_eal => eal}/windows/include/fnmatch.h (100%)
rename lib/{librte_eal => eal}/windows/include/getopt.h (100%)
rename lib/{librte_eal => eal}/windows/include/meson.build (100%)
rename lib/{librte_eal => eal}/windows/include/pthread.h (100%)
rename lib/{librte_eal => eal}/windows/include/regex.h (100%)
rename lib/{librte_eal => eal}/windows/include/rte_os.h (100%)
rename lib/{librte_eal => eal}/windows/include/rte_os_shim.h (100%)
rename lib/{librte_eal => eal}/windows/include/rte_virt2phys.h (100%)
rename lib/{librte_eal => eal}/windows/include/rte_windows.h (100%)
rename lib/{librte_eal => eal}/windows/include/sched.h (100%)
rename lib/{librte_eal => eal}/windows/include/sys/queue.h (100%)
rename lib/{librte_eal => eal}/windows/include/unistd.h (100%)
rename lib/{librte_eal => eal}/windows/meson.build (100%)
rename lib/{librte_eal => eal}/windows/rte_thread.c (100%)
rename lib/{librte_eal => eal}/x86/include/meson.build (100%)
rename lib/{librte_eal => eal}/x86/include/rte_atomic.h (100%)
rename lib/{librte_eal => eal}/x86/include/rte_atomic_32.h (100%)
rename lib/{librte_eal => eal}/x86/include/rte_atomic_64.h (100%)
rename lib/{librte_eal => eal}/x86/include/rte_byteorder.h (100%)
rename lib/{librte_eal => eal}/x86/include/rte_byteorder_32.h (100%)
rename lib/{librte_eal => eal}/x86/include/rte_byteorder_64.h (100%)
rename lib/{librte_eal => eal}/x86/include/rte_cpuflags.h (100%)
rename lib/{librte_eal => eal}/x86/include/rte_cycles.h (100%)
rename lib/{librte_eal => eal}/x86/include/rte_io.h (100%)
rename lib/{librte_eal => eal}/x86/include/rte_mcslock.h (100%)
rename lib/{librte_eal => eal}/x86/include/rte_memcpy.h (100%)
rename lib/{librte_eal => eal}/x86/include/rte_pause.h (100%)
rename lib/{librte_eal => eal}/x86/include/rte_pflock.h (100%)
rename lib/{librte_eal => eal}/x86/include/rte_power_intrinsics.h (100%)
rename lib/{librte_eal => eal}/x86/include/rte_prefetch.h (100%)
rename lib/{librte_eal => eal}/x86/include/rte_rtm.h (100%)
rename lib/{librte_eal => eal}/x86/include/rte_rwlock.h (100%)
rename lib/{librte_eal => eal}/x86/include/rte_spinlock.h (100%)
rename lib/{librte_eal => eal}/x86/include/rte_ticketlock.h (100%)
rename lib/{librte_eal => eal}/x86/include/rte_vect.h (100%)
rename lib/{librte_eal => eal}/x86/meson.build (100%)
rename lib/{librte_eal => eal}/x86/rte_cpuflags.c (100%)
rename lib/{librte_eal => eal}/x86/rte_cpuid.h (100%)
rename lib/{librte_eal => eal}/x86/rte_cycles.c (100%)
rename lib/{librte_eal => eal}/x86/rte_hypervisor.c (100%)
rename lib/{librte_eal => eal}/x86/rte_power_intrinsics.c (100%)
rename lib/{librte_eal => eal}/x86/rte_spinlock.c (100%)
rename lib/{librte_efd => efd}/meson.build (100%)
rename lib/{librte_efd => efd}/rte_efd.c (100%)
rename lib/{librte_efd => efd}/rte_efd.h (100%)
rename lib/{librte_efd => efd}/rte_efd_arm64.h (100%)
rename lib/{librte_efd => efd}/rte_efd_x86.h (100%)
rename lib/{librte_efd => efd}/version.map (100%)
rename lib/{librte_ethdev => ethdev}/ethdev_driver.h (100%)
rename lib/{librte_ethdev => ethdev}/ethdev_pci.h (100%)
rename lib/{librte_ethdev => ethdev}/ethdev_private.c (100%)
rename lib/{librte_ethdev => ethdev}/ethdev_private.h (100%)
rename lib/{librte_ethdev => ethdev}/ethdev_profile.c (100%)
rename lib/{librte_ethdev => ethdev}/ethdev_profile.h (100%)
rename lib/{librte_ethdev => ethdev}/ethdev_trace_points.c (100%)
rename lib/{librte_ethdev => ethdev}/ethdev_vdev.h (100%)
rename lib/{librte_ethdev => ethdev}/meson.build (100%)
rename lib/{librte_ethdev => ethdev}/rte_class_eth.c (100%)
rename lib/{librte_ethdev => ethdev}/rte_dev_info.h (100%)
rename lib/{librte_ethdev => ethdev}/rte_eth_ctrl.h (100%)
rename lib/{librte_ethdev => ethdev}/rte_ethdev.c (100%)
rename lib/{librte_ethdev => ethdev}/rte_ethdev.h (100%)
rename lib/{librte_ethdev => ethdev}/rte_ethdev_core.h (100%)
rename lib/{librte_ethdev => ethdev}/rte_ethdev_trace.h (100%)
rename lib/{librte_ethdev => ethdev}/rte_ethdev_trace_fp.h (100%)
rename lib/{librte_ethdev => ethdev}/rte_flow.c (100%)
rename lib/{librte_ethdev => ethdev}/rte_flow.h (100%)
rename lib/{librte_ethdev => ethdev}/rte_flow_driver.h (100%)
rename lib/{librte_ethdev => ethdev}/rte_mtr.c (100%)
rename lib/{librte_ethdev => ethdev}/rte_mtr.h (100%)
rename lib/{librte_ethdev => ethdev}/rte_mtr_driver.h (100%)
rename lib/{librte_ethdev => ethdev}/rte_tm.c (100%)
rename lib/{librte_ethdev => ethdev}/rte_tm.h (100%)
rename lib/{librte_ethdev => ethdev}/rte_tm_driver.h (100%)
rename lib/{librte_ethdev => ethdev}/version.map (100%)
rename lib/{librte_eventdev => eventdev}/eventdev_pmd.h (100%)
rename lib/{librte_eventdev => eventdev}/eventdev_pmd_pci.h (100%)
rename lib/{librte_eventdev => eventdev}/eventdev_pmd_vdev.h (100%)
rename lib/{librte_eventdev => eventdev}/eventdev_trace_points.c (100%)
rename lib/{librte_eventdev => eventdev}/meson.build (100%)
rename lib/{librte_eventdev => eventdev}/rte_event_crypto_adapter.c (100%)
rename lib/{librte_eventdev => eventdev}/rte_event_crypto_adapter.h (100%)
rename lib/{librte_eventdev => eventdev}/rte_event_eth_rx_adapter.c (100%)
rename lib/{librte_eventdev => eventdev}/rte_event_eth_rx_adapter.h (100%)
rename lib/{librte_eventdev => eventdev}/rte_event_eth_tx_adapter.c (100%)
rename lib/{librte_eventdev => eventdev}/rte_event_eth_tx_adapter.h (100%)
rename lib/{librte_eventdev => eventdev}/rte_event_ring.c (100%)
rename lib/{librte_eventdev => eventdev}/rte_event_ring.h (100%)
rename lib/{librte_eventdev => eventdev}/rte_event_timer_adapter.c (100%)
rename lib/{librte_eventdev => eventdev}/rte_event_timer_adapter.h (100%)
rename lib/{librte_eventdev => eventdev}/rte_event_timer_adapter_pmd.h (100%)
rename lib/{librte_eventdev => eventdev}/rte_eventdev.c (100%)
rename lib/{librte_eventdev => eventdev}/rte_eventdev.h (100%)
rename lib/{librte_eventdev => eventdev}/rte_eventdev_trace.h (100%)
rename lib/{librte_eventdev => eventdev}/rte_eventdev_trace_fp.h (100%)
rename lib/{librte_eventdev => eventdev}/version.map (100%)
rename lib/{librte_fib => fib}/dir24_8.c (100%)
rename lib/{librte_fib => fib}/dir24_8.h (100%)
rename lib/{librte_fib => fib}/dir24_8_avx512.c (100%)
rename lib/{librte_fib => fib}/dir24_8_avx512.h (100%)
rename lib/{librte_fib => fib}/meson.build (100%)
rename lib/{librte_fib => fib}/rte_fib.c (100%)
rename lib/{librte_fib => fib}/rte_fib.h (100%)
rename lib/{librte_fib => fib}/rte_fib6.c (100%)
rename lib/{librte_fib => fib}/rte_fib6.h (100%)
rename lib/{librte_fib => fib}/trie.c (100%)
rename lib/{librte_fib => fib}/trie.h (100%)
rename lib/{librte_fib => fib}/trie_avx512.c (100%)
rename lib/{librte_fib => fib}/trie_avx512.h (100%)
rename lib/{librte_fib => fib}/version.map (100%)
rename lib/{librte_flow_classify => flow_classify}/meson.build (100%)
rename lib/{librte_flow_classify => flow_classify}/rte_flow_classify.c (100%)
rename lib/{librte_flow_classify => flow_classify}/rte_flow_classify.h (100%)
rename lib/{librte_flow_classify => flow_classify}/rte_flow_classify_parse.c (100%)
rename lib/{librte_flow_classify => flow_classify}/rte_flow_classify_parse.h (100%)
rename lib/{librte_flow_classify => flow_classify}/version.map (100%)
rename lib/{librte_graph => graph}/graph.c (100%)
rename lib/{librte_graph => graph}/graph_debug.c (100%)
rename lib/{librte_graph => graph}/graph_ops.c (100%)
rename lib/{librte_graph => graph}/graph_populate.c (100%)
rename lib/{librte_graph => graph}/graph_private.h (100%)
rename lib/{librte_graph => graph}/graph_stats.c (100%)
rename lib/{librte_graph => graph}/meson.build (100%)
rename lib/{librte_graph => graph}/node.c (100%)
rename lib/{librte_graph => graph}/rte_graph.h (100%)
rename lib/{librte_graph => graph}/rte_graph_worker.h (100%)
rename lib/{librte_graph => graph}/version.map (100%)
rename lib/{librte_gro => gro}/gro_tcp4.c (100%)
rename lib/{librte_gro => gro}/gro_tcp4.h (100%)
rename lib/{librte_gro => gro}/gro_udp4.c (100%)
rename lib/{librte_gro => gro}/gro_udp4.h (100%)
rename lib/{librte_gro => gro}/gro_vxlan_tcp4.c (100%)
rename lib/{librte_gro => gro}/gro_vxlan_tcp4.h (100%)
rename lib/{librte_gro => gro}/gro_vxlan_udp4.c (100%)
rename lib/{librte_gro => gro}/gro_vxlan_udp4.h (100%)
rename lib/{librte_gro => gro}/meson.build (100%)
rename lib/{librte_gro => gro}/rte_gro.c (100%)
rename lib/{librte_gro => gro}/rte_gro.h (100%)
rename lib/{librte_gro => gro}/version.map (100%)
rename lib/{librte_gso => gso}/gso_common.c (100%)
rename lib/{librte_gso => gso}/gso_common.h (100%)
rename lib/{librte_gso => gso}/gso_tcp4.c (100%)
rename lib/{librte_gso => gso}/gso_tcp4.h (100%)
rename lib/{librte_gso => gso}/gso_tunnel_tcp4.c (100%)
rename lib/{librte_gso => gso}/gso_tunnel_tcp4.h (100%)
rename lib/{librte_gso => gso}/gso_tunnel_udp4.c (100%)
rename lib/{librte_gso => gso}/gso_tunnel_udp4.h (100%)
rename lib/{librte_gso => gso}/gso_udp4.c (100%)
rename lib/{librte_gso => gso}/gso_udp4.h (100%)
rename lib/{librte_gso => gso}/meson.build (100%)
rename lib/{librte_gso => gso}/rte_gso.c (100%)
rename lib/{librte_gso => gso}/rte_gso.h (100%)
rename lib/{librte_gso => gso}/version.map (100%)
rename lib/{librte_hash => hash}/meson.build (100%)
rename lib/{librte_hash => hash}/rte_cmp_arm64.h (100%)
rename lib/{librte_hash => hash}/rte_cmp_x86.h (100%)
rename lib/{librte_hash => hash}/rte_crc_arm64.h (100%)
rename lib/{librte_hash => hash}/rte_cuckoo_hash.c (100%)
rename lib/{librte_hash => hash}/rte_cuckoo_hash.h (100%)
rename lib/{librte_hash => hash}/rte_fbk_hash.c (100%)
rename lib/{librte_hash => hash}/rte_fbk_hash.h (100%)
rename lib/{librte_hash => hash}/rte_hash.h (100%)
rename lib/{librte_hash => hash}/rte_hash_crc.h (100%)
rename lib/{librte_hash => hash}/rte_jhash.h (100%)
rename lib/{librte_hash => hash}/rte_thash.h (100%)
rename lib/{librte_hash => hash}/version.map (100%)
rename lib/{librte_ip_frag => ip_frag}/ip_frag_common.h (100%)
rename lib/{librte_ip_frag => ip_frag}/ip_frag_internal.c (100%)
rename lib/{librte_ip_frag => ip_frag}/meson.build (100%)
rename lib/{librte_ip_frag => ip_frag}/rte_ip_frag.h (100%)
rename lib/{librte_ip_frag => ip_frag}/rte_ip_frag_common.c (100%)
rename lib/{librte_ip_frag => ip_frag}/rte_ipv4_fragmentation.c (100%)
rename lib/{librte_ip_frag => ip_frag}/rte_ipv4_reassembly.c (100%)
rename lib/{librte_ip_frag => ip_frag}/rte_ipv6_fragmentation.c (100%)
rename lib/{librte_ip_frag => ip_frag}/rte_ipv6_reassembly.c (100%)
rename lib/{librte_ip_frag => ip_frag}/version.map (100%)
rename lib/{librte_ipsec => ipsec}/crypto.h (100%)
rename lib/{librte_ipsec => ipsec}/esp_inb.c (100%)
rename lib/{librte_ipsec => ipsec}/esp_outb.c (100%)
rename lib/{librte_ipsec => ipsec}/iph.h (100%)
rename lib/{librte_ipsec => ipsec}/ipsec_sad.c (100%)
rename lib/{librte_ipsec => ipsec}/ipsec_sqn.h (100%)
rename lib/{librte_ipsec => ipsec}/meson.build (100%)
rename lib/{librte_ipsec => ipsec}/misc.h (100%)
rename lib/{librte_ipsec => ipsec}/pad.h (100%)
rename lib/{librte_ipsec => ipsec}/rte_ipsec.h (100%)
rename lib/{librte_ipsec => ipsec}/rte_ipsec_group.h (100%)
rename lib/{librte_ipsec => ipsec}/rte_ipsec_sa.h (100%)
rename lib/{librte_ipsec => ipsec}/rte_ipsec_sad.h (100%)
rename lib/{librte_ipsec => ipsec}/sa.c (100%)
rename lib/{librte_ipsec => ipsec}/sa.h (100%)
rename lib/{librte_ipsec => ipsec}/ses.c (100%)
rename lib/{librte_ipsec => ipsec}/version.map (100%)
rename lib/{librte_jobstats => jobstats}/meson.build (100%)
rename lib/{librte_jobstats => jobstats}/rte_jobstats.c (100%)
rename lib/{librte_jobstats => jobstats}/rte_jobstats.h (100%)
rename lib/{librte_jobstats => jobstats}/version.map (100%)
rename lib/{librte_kni => kni}/meson.build (100%)
rename lib/{librte_kni => kni}/rte_kni.c (100%)
rename lib/{librte_kni => kni}/rte_kni.h (100%)
rename lib/{librte_kni => kni}/rte_kni_common.h (100%)
rename lib/{librte_kni => kni}/rte_kni_fifo.h (100%)
rename lib/{librte_kni => kni}/version.map (100%)
rename lib/{librte_kvargs => kvargs}/meson.build (100%)
rename lib/{librte_kvargs => kvargs}/rte_kvargs.c (100%)
rename lib/{librte_kvargs => kvargs}/rte_kvargs.h (100%)
rename lib/{librte_kvargs => kvargs}/version.map (100%)
rename lib/{librte_latencystats => latencystats}/meson.build (100%)
rename lib/{librte_latencystats => latencystats}/rte_latencystats.c (100%)
rename lib/{librte_latencystats => latencystats}/rte_latencystats.h (100%)
rename lib/{librte_latencystats => latencystats}/version.map (100%)
rename lib/{librte_lpm => lpm}/meson.build (100%)
rename lib/{librte_lpm => lpm}/rte_lpm.c (100%)
rename lib/{librte_lpm => lpm}/rte_lpm.h (100%)
rename lib/{librte_lpm => lpm}/rte_lpm6.c (100%)
rename lib/{librte_lpm => lpm}/rte_lpm6.h (100%)
rename lib/{librte_lpm => lpm}/rte_lpm_altivec.h (100%)
rename lib/{librte_lpm => lpm}/rte_lpm_neon.h (100%)
rename lib/{librte_lpm => lpm}/rte_lpm_sse.h (100%)
rename lib/{librte_lpm => lpm}/rte_lpm_sve.h (100%)
rename lib/{librte_lpm => lpm}/version.map (100%)
rename lib/{librte_mbuf => mbuf}/meson.build (100%)
rename lib/{librte_mbuf => mbuf}/rte_mbuf.c (100%)
rename lib/{librte_mbuf => mbuf}/rte_mbuf.h (100%)
rename lib/{librte_mbuf => mbuf}/rte_mbuf_core.h (100%)
rename lib/{librte_mbuf => mbuf}/rte_mbuf_dyn.c (100%)
rename lib/{librte_mbuf => mbuf}/rte_mbuf_dyn.h (100%)
rename lib/{librte_mbuf => mbuf}/rte_mbuf_pool_ops.c (100%)
rename lib/{librte_mbuf => mbuf}/rte_mbuf_pool_ops.h (100%)
rename lib/{librte_mbuf => mbuf}/rte_mbuf_ptype.c (100%)
rename lib/{librte_mbuf => mbuf}/rte_mbuf_ptype.h (100%)
rename lib/{librte_mbuf => mbuf}/version.map (100%)
rename lib/{librte_member => member}/meson.build (100%)
rename lib/{librte_member => member}/rte_member.c (100%)
rename lib/{librte_member => member}/rte_member.h (100%)
rename lib/{librte_member => member}/rte_member_ht.c (100%)
rename lib/{librte_member => member}/rte_member_ht.h (100%)
rename lib/{librte_member => member}/rte_member_vbf.c (100%)
rename lib/{librte_member => member}/rte_member_vbf.h (100%)
rename lib/{librte_member => member}/rte_member_x86.h (100%)
rename lib/{librte_member => member}/version.map (100%)
rename lib/{librte_mempool => mempool}/mempool_trace_points.c (100%)
rename lib/{librte_mempool => mempool}/meson.build (100%)
rename lib/{librte_mempool => mempool}/rte_mempool.c (100%)
rename lib/{librte_mempool => mempool}/rte_mempool.h (100%)
rename lib/{librte_mempool => mempool}/rte_mempool_ops.c (100%)
rename lib/{librte_mempool => mempool}/rte_mempool_ops_default.c (100%)
rename lib/{librte_mempool => mempool}/rte_mempool_trace.h (100%)
rename lib/{librte_mempool => mempool}/rte_mempool_trace_fp.h (100%)
rename lib/{librte_mempool => mempool}/version.map (100%)
rename lib/{librte_meter => meter}/meson.build (100%)
rename lib/{librte_meter => meter}/rte_meter.c (100%)
rename lib/{librte_meter => meter}/rte_meter.h (100%)
rename lib/{librte_meter => meter}/version.map (100%)
rename lib/{librte_metrics => metrics}/meson.build (100%)
rename lib/{librte_metrics => metrics}/rte_metrics.c (100%)
rename lib/{librte_metrics => metrics}/rte_metrics.h (100%)
rename lib/{librte_metrics => metrics}/rte_metrics_telemetry.c (100%)
rename lib/{librte_metrics => metrics}/rte_metrics_telemetry.h (100%)
rename lib/{librte_metrics => metrics}/version.map (100%)
rename lib/{librte_net => net}/meson.build (100%)
rename lib/{librte_net => net}/net_crc.h (100%)
rename lib/{librte_net => net}/net_crc_avx512.c (100%)
rename lib/{librte_net => net}/net_crc_neon.c (100%)
rename lib/{librte_net => net}/net_crc_sse.c (100%)
rename lib/{librte_net => net}/rte_arp.c (100%)
rename lib/{librte_net => net}/rte_arp.h (100%)
rename lib/{librte_net => net}/rte_ecpri.h (100%)
rename lib/{librte_net => net}/rte_esp.h (100%)
rename lib/{librte_net => net}/rte_ether.c (100%)
rename lib/{librte_net => net}/rte_ether.h (100%)
rename lib/{librte_net => net}/rte_geneve.h (100%)
rename lib/{librte_net => net}/rte_gre.h (100%)
rename lib/{librte_net => net}/rte_gtp.h (100%)
rename lib/{librte_net => net}/rte_higig.h (100%)
rename lib/{librte_net => net}/rte_icmp.h (100%)
rename lib/{librte_net => net}/rte_ip.h (100%)
rename lib/{librte_net => net}/rte_mpls.h (100%)
rename lib/{librte_net => net}/rte_net.c (100%)
rename lib/{librte_net => net}/rte_net.h (100%)
rename lib/{librte_net => net}/rte_net_crc.c (100%)
rename lib/{librte_net => net}/rte_net_crc.h (100%)
rename lib/{librte_net => net}/rte_sctp.h (100%)
rename lib/{librte_net => net}/rte_tcp.h (100%)
rename lib/{librte_net => net}/rte_udp.h (100%)
rename lib/{librte_net => net}/rte_vxlan.h (100%)
rename lib/{librte_net => net}/version.map (100%)
rename lib/{librte_node => node}/ethdev_ctrl.c (100%)
rename lib/{librte_node => node}/ethdev_rx.c (100%)
rename lib/{librte_node => node}/ethdev_rx_priv.h (100%)
rename lib/{librte_node => node}/ethdev_tx.c (100%)
rename lib/{librte_node => node}/ethdev_tx_priv.h (100%)
rename lib/{librte_node => node}/ip4_lookup.c (100%)
rename lib/{librte_node => node}/ip4_lookup_neon.h (100%)
rename lib/{librte_node => node}/ip4_lookup_sse.h (100%)
rename lib/{librte_node => node}/ip4_rewrite.c (100%)
rename lib/{librte_node => node}/ip4_rewrite_priv.h (100%)
rename lib/{librte_node => node}/log.c (100%)
rename lib/{librte_node => node}/meson.build (100%)
rename lib/{librte_node => node}/node_private.h (100%)
rename lib/{librte_node => node}/null.c (100%)
rename lib/{librte_node => node}/pkt_cls.c (100%)
rename lib/{librte_node => node}/pkt_cls_priv.h (100%)
rename lib/{librte_node => node}/pkt_drop.c (100%)
rename lib/{librte_node => node}/rte_node_eth_api.h (100%)
rename lib/{librte_node => node}/rte_node_ip4_api.h (100%)
rename lib/{librte_node => node}/version.map (100%)
rename lib/{librte_pci => pci}/meson.build (100%)
rename lib/{librte_pci => pci}/rte_pci.c (100%)
rename lib/{librte_pci => pci}/rte_pci.h (100%)
rename lib/{librte_pci => pci}/version.map (100%)
rename lib/{librte_pdump => pdump}/meson.build (100%)
rename lib/{librte_pdump => pdump}/rte_pdump.c (100%)
rename lib/{librte_pdump => pdump}/rte_pdump.h (100%)
rename lib/{librte_pdump => pdump}/version.map (100%)
rename lib/{librte_pipeline => pipeline}/meson.build (100%)
rename lib/{librte_pipeline => pipeline}/rte_pipeline.c (100%)
rename lib/{librte_pipeline => pipeline}/rte_pipeline.h (100%)
rename lib/{librte_pipeline => pipeline}/rte_port_in_action.c (100%)
rename lib/{librte_pipeline => pipeline}/rte_port_in_action.h (100%)
rename lib/{librte_pipeline => pipeline}/rte_swx_ctl.c (100%)
rename lib/{librte_pipeline => pipeline}/rte_swx_ctl.h (100%)
rename lib/{librte_pipeline => pipeline}/rte_swx_extern.h (100%)
rename lib/{librte_pipeline => pipeline}/rte_swx_pipeline.c (100%)
rename lib/{librte_pipeline => pipeline}/rte_swx_pipeline.h (100%)
rename lib/{librte_pipeline => pipeline}/rte_swx_pipeline_spec.c (100%)
rename lib/{librte_pipeline => pipeline}/rte_table_action.c (100%)
rename lib/{librte_pipeline => pipeline}/rte_table_action.h (100%)
rename lib/{librte_pipeline => pipeline}/version.map (100%)
rename lib/{librte_port => port}/meson.build (100%)
rename lib/{librte_port => port}/rte_port.h (100%)
rename lib/{librte_port => port}/rte_port_ethdev.c (100%)
rename lib/{librte_port => port}/rte_port_ethdev.h (100%)
rename lib/{librte_port => port}/rte_port_eventdev.c (100%)
rename lib/{librte_port => port}/rte_port_eventdev.h (100%)
rename lib/{librte_port => port}/rte_port_fd.c (100%)
rename lib/{librte_port => port}/rte_port_fd.h (100%)
rename lib/{librte_port => port}/rte_port_frag.c (100%)
rename lib/{librte_port => port}/rte_port_frag.h (100%)
rename lib/{librte_port => port}/rte_port_kni.c (100%)
rename lib/{librte_port => port}/rte_port_kni.h (100%)
rename lib/{librte_port => port}/rte_port_ras.c (100%)
rename lib/{librte_port => port}/rte_port_ras.h (100%)
rename lib/{librte_port => port}/rte_port_ring.c (100%)
rename lib/{librte_port => port}/rte_port_ring.h (100%)
rename lib/{librte_port => port}/rte_port_sched.c (100%)
rename lib/{librte_port => port}/rte_port_sched.h (100%)
rename lib/{librte_port => port}/rte_port_source_sink.c (100%)
rename lib/{librte_port => port}/rte_port_source_sink.h (100%)
rename lib/{librte_port => port}/rte_port_sym_crypto.c (100%)
rename lib/{librte_port => port}/rte_port_sym_crypto.h (100%)
rename lib/{librte_port => port}/rte_swx_port.h (100%)
rename lib/{librte_port => port}/rte_swx_port_ethdev.c (100%)
rename lib/{librte_port => port}/rte_swx_port_ethdev.h (100%)
rename lib/{librte_port => port}/rte_swx_port_fd.c (100%)
rename lib/{librte_port => port}/rte_swx_port_fd.h (100%)
rename lib/{librte_port => port}/rte_swx_port_ring.c (100%)
rename lib/{librte_port => port}/rte_swx_port_ring.h (100%)
rename lib/{librte_port => port}/rte_swx_port_source_sink.c (100%)
rename lib/{librte_port => port}/rte_swx_port_source_sink.h (100%)
rename lib/{librte_port => port}/version.map (100%)
rename lib/{librte_power => power}/guest_channel.c (100%)
rename lib/{librte_power => power}/guest_channel.h (100%)
rename lib/{librte_power => power}/meson.build (100%)
rename lib/{librte_power => power}/power_acpi_cpufreq.c (100%)
rename lib/{librte_power => power}/power_acpi_cpufreq.h (100%)
rename lib/{librte_power => power}/power_common.c (100%)
rename lib/{librte_power => power}/power_common.h (100%)
rename lib/{librte_power => power}/power_kvm_vm.c (100%)
rename lib/{librte_power => power}/power_kvm_vm.h (100%)
rename lib/{librte_power => power}/power_pstate_cpufreq.c (100%)
rename lib/{librte_power => power}/power_pstate_cpufreq.h (100%)
rename lib/{librte_power => power}/rte_power.c (100%)
rename lib/{librte_power => power}/rte_power.h (100%)
rename lib/{librte_power => power}/rte_power_empty_poll.c (100%)
rename lib/{librte_power => power}/rte_power_empty_poll.h (100%)
rename lib/{librte_power => power}/rte_power_guest_channel.h (100%)
rename lib/{librte_power => power}/rte_power_pmd_mgmt.c (100%)
rename lib/{librte_power => power}/rte_power_pmd_mgmt.h (100%)
rename lib/{librte_power => power}/version.map (100%)
rename lib/{librte_rawdev => rawdev}/meson.build (100%)
rename lib/{librte_rawdev => rawdev}/rte_rawdev.c (100%)
rename lib/{librte_rawdev => rawdev}/rte_rawdev.h (100%)
rename lib/{librte_rawdev => rawdev}/rte_rawdev_pmd.h (100%)
rename lib/{librte_rawdev => rawdev}/version.map (100%)
rename lib/{librte_rcu => rcu}/meson.build (100%)
rename lib/{librte_rcu => rcu}/rcu_qsbr_pvt.h (100%)
rename lib/{librte_rcu => rcu}/rte_rcu_qsbr.c (100%)
rename lib/{librte_rcu => rcu}/rte_rcu_qsbr.h (100%)
rename lib/{librte_rcu => rcu}/version.map (100%)
rename lib/{librte_regexdev => regexdev}/meson.build (100%)
rename lib/{librte_regexdev => regexdev}/rte_regexdev.c (100%)
rename lib/{librte_regexdev => regexdev}/rte_regexdev.h (100%)
rename lib/{librte_regexdev => regexdev}/rte_regexdev_core.h (100%)
rename lib/{librte_regexdev => regexdev}/rte_regexdev_driver.h (100%)
rename lib/{librte_regexdev => regexdev}/version.map (100%)
rename lib/{librte_reorder => reorder}/meson.build (100%)
rename lib/{librte_reorder => reorder}/rte_reorder.c (100%)
rename lib/{librte_reorder => reorder}/rte_reorder.h (100%)
rename lib/{librte_reorder => reorder}/version.map (100%)
rename lib/{librte_rib => rib}/meson.build (100%)
rename lib/{librte_rib => rib}/rte_rib.c (100%)
rename lib/{librte_rib => rib}/rte_rib.h (100%)
rename lib/{librte_rib => rib}/rte_rib6.c (100%)
rename lib/{librte_rib => rib}/rte_rib6.h (100%)
rename lib/{librte_rib => rib}/version.map (100%)
rename lib/{librte_ring => ring}/meson.build (100%)
rename lib/{librte_ring => ring}/rte_ring.c (100%)
rename lib/{librte_ring => ring}/rte_ring.h (100%)
rename lib/{librte_ring => ring}/rte_ring_c11_pvt.h (100%)
rename lib/{librte_ring => ring}/rte_ring_core.h (100%)
rename lib/{librte_ring => ring}/rte_ring_elem.h (100%)
rename lib/{librte_ring => ring}/rte_ring_elem_pvt.h (100%)
rename lib/{librte_ring => ring}/rte_ring_generic_pvt.h (100%)
rename lib/{librte_ring => ring}/rte_ring_hts.h (100%)
rename lib/{librte_ring => ring}/rte_ring_hts_elem_pvt.h (100%)
rename lib/{librte_ring => ring}/rte_ring_peek.h (100%)
rename lib/{librte_ring => ring}/rte_ring_peek_elem_pvt.h (100%)
rename lib/{librte_ring => ring}/rte_ring_peek_zc.h (100%)
rename lib/{librte_ring => ring}/rte_ring_rts.h (100%)
rename lib/{librte_ring => ring}/rte_ring_rts_elem_pvt.h (100%)
rename lib/{librte_ring => ring}/version.map (100%)
rename lib/{librte_sched => sched}/meson.build (100%)
rename lib/{librte_sched => sched}/rte_approx.c (100%)
rename lib/{librte_sched => sched}/rte_approx.h (100%)
rename lib/{librte_sched => sched}/rte_red.c (100%)
rename lib/{librte_sched => sched}/rte_red.h (100%)
rename lib/{librte_sched => sched}/rte_sched.c (100%)
rename lib/{librte_sched => sched}/rte_sched.h (100%)
rename lib/{librte_sched => sched}/rte_sched_common.h (100%)
rename lib/{librte_sched => sched}/version.map (100%)
rename lib/{librte_security => security}/meson.build (100%)
rename lib/{librte_security => security}/rte_security.c (100%)
rename lib/{librte_security => security}/rte_security.h (100%)
rename lib/{librte_security => security}/rte_security_driver.h (100%)
rename lib/{librte_security => security}/version.map (100%)
rename lib/{librte_stack => stack}/meson.build (100%)
rename lib/{librte_stack => stack}/rte_stack.c (100%)
rename lib/{librte_stack => stack}/rte_stack.h (100%)
rename lib/{librte_stack => stack}/rte_stack_lf.c (100%)
rename lib/{librte_stack => stack}/rte_stack_lf.h (100%)
rename lib/{librte_stack => stack}/rte_stack_lf_c11.h (100%)
rename lib/{librte_stack => stack}/rte_stack_lf_generic.h (100%)
rename lib/{librte_stack => stack}/rte_stack_lf_stubs.h (100%)
rename lib/{librte_stack => stack}/rte_stack_std.c (100%)
rename lib/{librte_stack => stack}/rte_stack_std.h (100%)
rename lib/{librte_stack => stack}/stack_pvt.h (100%)
rename lib/{librte_stack => stack}/version.map (100%)
rename lib/{librte_table => table}/meson.build (100%)
rename lib/{librte_table => table}/rte_lru.h (100%)
rename lib/{librte_table => table}/rte_lru_arm64.h (100%)
rename lib/{librte_table => table}/rte_lru_x86.h (100%)
rename lib/{librte_table => table}/rte_swx_table.h (100%)
rename lib/{librte_table => table}/rte_swx_table_em.c (100%)
rename lib/{librte_table => table}/rte_swx_table_em.h (100%)
rename lib/{librte_table => table}/rte_swx_table_wm.c (100%)
rename lib/{librte_table => table}/rte_swx_table_wm.h (100%)
rename lib/{librte_table => table}/rte_table.h (100%)
rename lib/{librte_table => table}/rte_table_acl.c (100%)
rename lib/{librte_table => table}/rte_table_acl.h (100%)
rename lib/{librte_table => table}/rte_table_array.c (100%)
rename lib/{librte_table => table}/rte_table_array.h (100%)
rename lib/{librte_table => table}/rte_table_hash.h (100%)
rename lib/{librte_table => table}/rte_table_hash_cuckoo.c (100%)
rename lib/{librte_table => table}/rte_table_hash_cuckoo.h (100%)
rename lib/{librte_table => table}/rte_table_hash_ext.c (100%)
rename lib/{librte_table => table}/rte_table_hash_func.h (100%)
rename lib/{librte_table => table}/rte_table_hash_func_arm64.h (100%)
rename lib/{librte_table => table}/rte_table_hash_key16.c (100%)
rename lib/{librte_table => table}/rte_table_hash_key32.c (100%)
rename lib/{librte_table => table}/rte_table_hash_key8.c (100%)
rename lib/{librte_table => table}/rte_table_hash_lru.c (100%)
rename lib/{librte_table => table}/rte_table_lpm.c (100%)
rename lib/{librte_table => table}/rte_table_lpm.h (100%)
rename lib/{librte_table => table}/rte_table_lpm_ipv6.c (100%)
rename lib/{librte_table => table}/rte_table_lpm_ipv6.h (100%)
rename lib/{librte_table => table}/rte_table_stub.c (100%)
rename lib/{librte_table => table}/rte_table_stub.h (100%)
rename lib/{librte_table => table}/version.map (100%)
rename lib/{librte_telemetry => telemetry}/meson.build (80%)
rename lib/{librte_telemetry => telemetry}/rte_telemetry.h (100%)
rename lib/{librte_telemetry => telemetry}/telemetry.c (100%)
rename lib/{librte_telemetry => telemetry}/telemetry_data.c (100%)
rename lib/{librte_telemetry => telemetry}/telemetry_data.h (100%)
rename lib/{librte_telemetry => telemetry}/telemetry_internal.h (100%)
rename lib/{librte_telemetry => telemetry}/telemetry_json.h (100%)
rename lib/{librte_telemetry => telemetry}/telemetry_legacy.c (100%)
rename lib/{librte_telemetry => telemetry}/version.map (100%)
rename lib/{librte_timer => timer}/meson.build (100%)
rename lib/{librte_timer => timer}/rte_timer.c (100%)
rename lib/{librte_timer => timer}/rte_timer.h (100%)
rename lib/{librte_timer => timer}/version.map (100%)
rename lib/{librte_vhost => vhost}/fd_man.c (100%)
rename lib/{librte_vhost => vhost}/fd_man.h (100%)
rename lib/{librte_vhost => vhost}/iotlb.c (100%)
rename lib/{librte_vhost => vhost}/iotlb.h (100%)
rename lib/{librte_vhost => vhost}/meson.build (100%)
rename lib/{librte_vhost => vhost}/rte_vdpa.h (100%)
rename lib/{librte_vhost => vhost}/rte_vdpa_dev.h (100%)
rename lib/{librte_vhost => vhost}/rte_vhost.h (100%)
rename lib/{librte_vhost => vhost}/rte_vhost_async.h (100%)
rename lib/{librte_vhost => vhost}/rte_vhost_crypto.h (100%)
rename lib/{librte_vhost => vhost}/socket.c (100%)
rename lib/{librte_vhost => vhost}/vdpa.c (100%)
rename lib/{librte_vhost => vhost}/version.map (100%)
rename lib/{librte_vhost => vhost}/vhost.c (100%)
rename lib/{librte_vhost => vhost}/vhost.h (100%)
rename lib/{librte_vhost => vhost}/vhost_crypto.c (100%)
rename lib/{librte_vhost => vhost}/vhost_user.c (100%)
rename lib/{librte_vhost => vhost}/vhost_user.h (100%)
rename lib/{librte_vhost => vhost}/virtio_crypto.h (100%)
rename lib/{librte_vhost => vhost}/virtio_net.c (100%)
diff --git a/MAINTAINERS b/MAINTAINERS
index 2550d950d..6a80ef7fa 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -114,8 +114,8 @@ F: .ci/
ABI Policy & Versioning
M: Ray Kinsella <mdr@ashroe.eu>
M: Neil Horman <nhorman@tuxdriver.com>
-F: lib/librte_eal/include/rte_compat.h
-F: lib/librte_eal/include/rte_function_versioning.h
+F: lib/eal/include/rte_compat.h
+F: lib/eal/include/rte_function_versioning.h
F: doc/guides/contributing/abi_*.rst
F: doc/guides/rel_notes/deprecation.rst
F: devtools/check-abi.sh
@@ -145,10 +145,10 @@ Environment Abstraction Layer
T: git://dpdk.org/dpdk
EAL API and common code
-F: lib/librte_eal/common/
-F: lib/librte_eal/unix/
-F: lib/librte_eal/include/
-F: lib/librte_eal/version.map
+F: lib/eal/common/
+F: lib/eal/unix/
+F: lib/eal/include/
+F: lib/eal/version.map
F: doc/guides/prog_guide/env_abstraction_layer.rst
F: app/test/test_alarm.c
F: app/test/test_atomic.c
@@ -176,24 +176,24 @@ F: app/test/test_version.c
Trace - EXPERIMENTAL
M: Jerin Jacob <jerinj@marvell.com>
M: Sunil Kumar Kori <skori@marvell.com>
-F: lib/librte_eal/include/rte_trace*.h
-F: lib/librte_eal/common/eal_common_trace*.c
-F: lib/librte_eal/common/eal_trace.h
+F: lib/eal/include/rte_trace*.h
+F: lib/eal/common/eal_common_trace*.c
+F: lib/eal/common/eal_trace.h
F: doc/guides/prog_guide/trace_lib.rst
F: app/test/test_trace*
Memory Allocation
M: Anatoly Burakov <anatoly.burakov@intel.com>
-F: lib/librte_eal/include/rte_fbarray.h
-F: lib/librte_eal/include/rte_mem*
-F: lib/librte_eal/include/rte_malloc.h
-F: lib/librte_eal/common/*malloc*
-F: lib/librte_eal/common/eal_common_dynmem.c
-F: lib/librte_eal/common/eal_common_fbarray.c
-F: lib/librte_eal/common/eal_common_mem*
-F: lib/librte_eal/common/eal_hugepages.h
-F: lib/librte_eal/linux/eal_mem*
-F: lib/librte_eal/freebsd/eal_mem*
+F: lib/eal/include/rte_fbarray.h
+F: lib/eal/include/rte_mem*
+F: lib/eal/include/rte_malloc.h
+F: lib/eal/common/*malloc*
+F: lib/eal/common/eal_common_dynmem.c
+F: lib/eal/common/eal_common_fbarray.c
+F: lib/eal/common/eal_common_mem*
+F: lib/eal/common/eal_hugepages.h
+F: lib/eal/linux/eal_mem*
+F: lib/eal/freebsd/eal_mem*
F: doc/guides/prog_guide/env_abstraction_layer.rst
F: app/test/test_external_mem.c
F: app/test/test_func_reentrancy.c
@@ -204,19 +204,19 @@ F: app/test/test_memzone.c
Interrupt Subsystem
M: Harman Kalra <hkalra@marvell.com>
-F: lib/librte_eal/*/*interrupts.*
+F: lib/eal/*/*interrupts.*
F: app/test/test_interrupts.c
Keep alive
-F: lib/librte_eal/include/rte_keepalive.h
-F: lib/librte_eal/common/rte_keepalive.c
+F: lib/eal/include/rte_keepalive.h
+F: lib/eal/common/rte_keepalive.c
F: examples/l2fwd-keepalive/
F: doc/guides/sample_app_ug/keep_alive.rst
Secondary process
M: Anatoly Burakov <anatoly.burakov@intel.com>
K: RTE_PROC_
-F: lib/librte_eal/common/eal_common_proc.c
+F: lib/eal/common/eal_common_proc.c
F: doc/guides/prog_guide/multi_proc_support.rst
F: app/test/test_mp_secondary.c
F: examples/multi_process/
@@ -224,52 +224,52 @@ F: doc/guides/sample_app_ug/multi_process.rst
Service Cores
M: Harry van Haaren <harry.van.haaren@intel.com>
-F: lib/librte_eal/include/rte_service.h
-F: lib/librte_eal/include/rte_service_component.h
-F: lib/librte_eal/common/rte_service.c
+F: lib/eal/include/rte_service.h
+F: lib/eal/include/rte_service_component.h
+F: lib/eal/common/rte_service.c
F: doc/guides/prog_guide/service_cores.rst
F: app/test/test_service_cores.c
Bitops
M: Joyce Kong <joyce.kong@arm.com>
-F: lib/librte_eal/include/rte_bitops.h
+F: lib/eal/include/rte_bitops.h
F: app/test/test_bitops.c
Bitmap
M: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
-F: lib/librte_eal/include/rte_bitmap.h
+F: lib/eal/include/rte_bitmap.h
F: app/test/test_bitmap.c
MCSlock
M: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
-F: lib/librte_eal/include/generic/rte_mcslock.h
+F: lib/eal/include/generic/rte_mcslock.h
F: app/test/test_mcslock.c
Ticketlock
M: Joyce Kong <joyce.kong@arm.com>
-F: lib/librte_eal/include/generic/rte_ticketlock.h
+F: lib/eal/include/generic/rte_ticketlock.h
F: app/test/test_ticketlock.c
Pseudo-random Number Generation
M: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
-F: lib/librte_eal/include/rte_random.h
-F: lib/librte_eal/common/rte_random.c
+F: lib/eal/include/rte_random.h
+F: lib/eal/common/rte_random.c
F: app/test/test_rand_perf.c
ARM v7
M: Jan Viktorin <viktorin@rehivetech.com>
M: Ruifeng Wang <ruifeng.wang@arm.com>
F: config/arm/
-F: lib/librte_eal/arm/
-X: lib/librte_eal/arm/include/*_64.h
+F: lib/eal/arm/
+X: lib/eal/arm/include/*_64.h
ARM v8
M: Jerin Jacob <jerinj@marvell.com>
M: Ruifeng Wang <ruifeng.wang@arm.com>
F: config/arm/
F: doc/guides/linux_gsg/cross_build_dpdk_for_arm64.rst
-F: lib/librte_eal/arm/
-X: lib/librte_eal/arm/include/*_32.h
+F: lib/eal/arm/
+X: lib/eal/arm/include/*_32.h
F: lib/*/*_arm64.*
F: lib/*/*_neon.*
F: drivers/*/*/*_neon.*
@@ -279,7 +279,7 @@ F: examples/*/*_neon.*
IBM POWER (alpha)
M: David Christensen <drc@linux.vnet.ibm.com>
F: config/ppc/
-F: lib/librte_eal/ppc/
+F: lib/eal/ppc/
F: lib/*/*_altivec*
F: drivers/*/*/*_altivec.*
F: app/*/*_altivec.*
@@ -292,7 +292,7 @@ F: config/x86/
F: doc/guides/linux_gsg/nic_perf_intel_platform.rst
F: buildtools/binutils-avx512-check.sh
F: doc/guides/howto/avx512.rst
-F: lib/librte_eal/x86/
+F: lib/eal/x86/
F: lib/*/*_sse*
F: lib/*/*_avx*
F: drivers/*/*/*_sse*
@@ -303,7 +303,7 @@ F: examples/*/*_sse*
F: examples/*/*_avx*
Linux EAL (with overlaps)
-F: lib/librte_eal/linux/
+F: lib/eal/linux/
F: doc/guides/linux_gsg/
Linux UIO
@@ -312,12 +312,12 @@ F: drivers/bus/pci/linux/*uio*
Linux VFIO
M: Anatoly Burakov <anatoly.burakov@intel.com>
-F: lib/librte_eal/linux/*vfio*
+F: lib/eal/linux/*vfio*
F: drivers/bus/pci/linux/*vfio*
FreeBSD EAL (with overlaps)
M: Bruce Richardson <bruce.richardson@intel.com>
-F: lib/librte_eal/freebsd/
+F: lib/eal/freebsd/
F: doc/guides/freebsd_gsg/
FreeBSD contigmem
@@ -333,14 +333,14 @@ M: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
M: Narcisa Ana Maria Vasile <navasile@linux.microsoft.com>
M: Dmitry Malloy <dmitrym@microsoft.com>
M: Pallavi Kadam <pallavi.kadam@intel.com>
-F: lib/librte_eal/windows/
+F: lib/eal/windows/
F: buildtools/map_to_win.py
F: doc/guides/windows_gsg/
Windows memory allocation
M: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
-F: lib/librte_eal/windows/eal_hugepages.c
-F: lib/librte_eal/windows/eal_mem*
+F: lib/eal/windows/eal_hugepages.c
+F: lib/eal/windows/eal_mem*
Core Libraries
@@ -350,7 +350,7 @@ T: git://dpdk.org/dpdk
Memory pool
M: Olivier Matz <olivier.matz@6wind.com>
M: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
-F: lib/librte_mempool/
+F: lib/mempool/
F: drivers/mempool/ring/
F: doc/guides/prog_guide/mempool_lib.rst
F: app/test/test_mempool*
@@ -359,21 +359,21 @@ F: app/test/test_func_reentrancy.c
Ring queue
M: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
M: Konstantin Ananyev <konstantin.ananyev@intel.com>
-F: lib/librte_ring/
+F: lib/ring/
F: doc/guides/prog_guide/ring_lib.rst
F: app/test/test_ring*
F: app/test/test_func_reentrancy.c
Stack
M: Olivier Matz <olivier.matz@6wind.com>
-F: lib/librte_stack/
+F: lib/stack/
F: drivers/mempool/stack/
F: app/test/test_stack*
F: doc/guides/prog_guide/stack_lib.rst
Packet buffer
M: Olivier Matz <olivier.matz@6wind.com>
-F: lib/librte_mbuf/
+F: lib/mbuf/
F: doc/guides/prog_guide/mbuf_lib.rst
F: app/test/test_mbuf.c
@@ -382,7 +382,7 @@ M: Thomas Monjalon <thomas@monjalon.net>
M: Ferruh Yigit <ferruh.yigit@intel.com>
M: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
T: git://dpdk.org/next/dpdk-next-net
-F: lib/librte_ethdev/
+F: lib/ethdev/
F: app/test/test_ethdev*
F: devtools/test-null.sh
F: doc/guides/prog_guide/switch_representation.rst
@@ -392,22 +392,22 @@ M: Ori Kam <orika@nvidia.com>
T: git://dpdk.org/next/dpdk-next-net
F: app/test-pmd/cmdline_flow.c
F: doc/guides/prog_guide/rte_flow.rst
-F: lib/librte_ethdev/rte_flow*
+F: lib/ethdev/rte_flow*
Traffic Management API - EXPERIMENTAL
M: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
T: git://dpdk.org/next/dpdk-next-net
-F: lib/librte_ethdev/rte_tm*
+F: lib/ethdev/rte_tm*
Traffic Metering and Policing API - EXPERIMENTAL
M: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
T: git://dpdk.org/next/dpdk-next-net
-F: lib/librte_ethdev/rte_mtr*
+F: lib/ethdev/rte_mtr*
Baseband API - EXPERIMENTAL
M: Nicolas Chautru <nicolas.chautru@intel.com>
T: git://dpdk.org/next/dpdk-next-crypto
-F: lib/librte_bbdev/
+F: lib/bbdev/
F: doc/guides/prog_guide/bbdev.rst
F: drivers/baseband/
F: doc/guides/bbdevs/
@@ -419,7 +419,7 @@ F: doc/guides/sample_app_ug/bbdev_app.rst
Crypto API
M: Declan Doherty <declan.doherty@intel.com>
T: git://dpdk.org/next/dpdk-next-crypto
-F: lib/librte_cryptodev/
+F: lib/cryptodev/
F: app/test/test_cryptodev*
F: examples/l2fwd-crypto/
@@ -427,7 +427,7 @@ Security API
M: Akhil Goyal <gakhil@marvell.com>
M: Declan Doherty <declan.doherty@intel.com>
T: git://dpdk.org/next/dpdk-next-crypto
-F: lib/librte_security/
+F: lib/security/
F: doc/guides/prog_guide/rte_security.rst
F: app/test/test_security.c
@@ -435,7 +435,7 @@ Compression API - EXPERIMENTAL
M: Fiona Trahe <fiona.trahe@intel.com>
M: Ashish Gupta <ashish.gupta@marvell.com>
T: git://dpdk.org/next/dpdk-next-crypto
-F: lib/librte_compressdev/
+F: lib/compressdev/
F: drivers/compress/
F: app/test/test_compressdev*
F: doc/guides/prog_guide/compressdev.rst
@@ -443,7 +443,7 @@ F: doc/guides/compressdevs/features/default.ini
RegEx API - EXPERIMENTAL
M: Ori Kam <orika@nvidia.com>
-F: lib/librte_regexdev/
+F: lib/regexdev/
F: app/test-regex/
F: doc/guides/prog_guide/regexdev.rst
F: doc/guides/regexdevs/features/default.ini
@@ -451,7 +451,7 @@ F: doc/guides/regexdevs/features/default.ini
Eventdev API
M: Jerin Jacob <jerinj@marvell.com>
T: git://dpdk.org/next/dpdk-next-eventdev
-F: lib/librte_eventdev/
+F: lib/eventdev/
F: drivers/event/skeleton/
F: app/test/test_eventdev.c
F: examples/l3fwd/l3fwd_event*
@@ -459,35 +459,35 @@ F: examples/l3fwd/l3fwd_event*
Eventdev Ethdev Rx Adapter API
M: Jay Jayatheerthan <jay.jayatheerthan@intel.com>
T: git://dpdk.org/next/dpdk-next-eventdev
-F: lib/librte_eventdev/*eth_rx_adapter*
+F: lib/eventdev/*eth_rx_adapter*
F: app/test/test_event_eth_rx_adapter.c
F: doc/guides/prog_guide/event_ethernet_rx_adapter.rst
Eventdev Ethdev Tx Adapter API
M: Jay Jayatheerthan <jay.jayatheerthan@intel.com>
T: git://dpdk.org/next/dpdk-next-eventdev
-F: lib/librte_eventdev/*eth_tx_adapter*
+F: lib/eventdev/*eth_tx_adapter*
F: app/test/test_event_eth_tx_adapter.c
F: doc/guides/prog_guide/event_ethernet_tx_adapter.rst
Eventdev Timer Adapter API
M: Erik Gabriel Carrillo <erik.g.carrillo@intel.com>
T: git://dpdk.org/next/dpdk-next-eventdev
-F: lib/librte_eventdev/*timer_adapter*
+F: lib/eventdev/*timer_adapter*
F: app/test/test_event_timer_adapter.c
F: doc/guides/prog_guide/event_timer_adapter.rst
Eventdev Crypto Adapter API
M: Abhinandan Gujjar <abhinandan.gujjar@intel.com>
T: git://dpdk.org/next/dpdk-next-eventdev
-F: lib/librte_eventdev/*crypto_adapter*
+F: lib/eventdev/*crypto_adapter*
F: app/test/test_event_crypto_adapter.c
F: doc/guides/prog_guide/event_crypto_adapter.rst
Raw device API
M: Nipun Gupta <nipun.gupta@nxp.com>
M: Hemant Agrawal <hemant.agrawal@nxp.com>
-F: lib/librte_rawdev/
+F: lib/rawdev/
F: drivers/raw/skeleton/
F: app/test/test_rawdev.c
F: doc/guides/prog_guide/rawdev.rst
@@ -561,7 +561,7 @@ F: examples/bond/
Linux KNI
M: Ferruh Yigit <ferruh.yigit@intel.com>
F: kernel/linux/kni/
-F: lib/librte_kni/
+F: lib/kni/
F: doc/guides/prog_guide/kernel_nic_interface.rst
F: app/test/test_kni.c
F: examples/kni/
@@ -913,7 +913,7 @@ Vhost-user
M: Maxime Coquelin <maxime.coquelin@redhat.com>
M: Chenbo Xia <chenbo.xia@intel.com>
T: git://dpdk.org/next/dpdk-next-virtio
-F: lib/librte_vhost/
+F: lib/vhost/
F: doc/guides/prog_guide/vhost_lib.rst
F: examples/vhost/
F: doc/guides/sample_app_ug/vhost.rst
@@ -1307,19 +1307,19 @@ Packet processing
Network headers
M: Olivier Matz <olivier.matz@6wind.com>
-F: lib/librte_net/
+F: lib/net/
Packet CRC
M: Jasvinder Singh <jasvinder.singh@intel.com>
-F: lib/librte_net/net_crc.h
-F: lib/librte_net/rte_net_crc*
-F: lib/librte_net/net_crc_avx512.c
-F: lib/librte_net/net_crc_sse.c
+F: lib/net/net_crc.h
+F: lib/net/rte_net_crc*
+F: lib/net/net_crc_avx512.c
+F: lib/net/net_crc_sse.c
F: app/test/test_crc.c
IP fragmentation & reassembly
M: Konstantin Ananyev <konstantin.ananyev@intel.com>
-F: lib/librte_ip_frag/
+F: lib/ip_frag/
F: doc/guides/prog_guide/ip_fragment_reassembly_lib.rst
F: app/test/test_ipfrag.c
F: examples/ip_fragmentation/
@@ -1329,18 +1329,18 @@ F: doc/guides/sample_app_ug/ip_reassembly.rst
Generic Receive Offload - EXPERIMENTAL
M: Jiayu Hu <jiayu.hu@intel.com>
-F: lib/librte_gro/
+F: lib/gro/
F: doc/guides/prog_guide/generic_receive_offload_lib.rst
Generic Segmentation Offload
M: Jiayu Hu <jiayu.hu@intel.com>
-F: lib/librte_gso/
+F: lib/gso/
F: doc/guides/prog_guide/generic_segmentation_offload_lib.rst
IPsec
M: Konstantin Ananyev <konstantin.ananyev@intel.com>
T: git://dpdk.org/next/dpdk-next-crypto
-F: lib/librte_ipsec/
+F: lib/ipsec/
M: Bernard Iremonger <bernard.iremonger@intel.com>
F: app/test/test_ipsec*
F: doc/guides/prog_guide/ipsec_lib.rst
@@ -1349,7 +1349,7 @@ F: app/test-sad/
Flow Classify - EXPERIMENTAL
M: Bernard Iremonger <bernard.iremonger@intel.com>
-F: lib/librte_flow_classify/
+F: lib/flow_classify/
F: app/test/test_flow_classify*
F: doc/guides/prog_guide/flow_classify_lib.rst
F: examples/flow_classify/
@@ -1357,7 +1357,7 @@ F: doc/guides/sample_app_ug/flow_classify.rst
Distributor
M: David Hunt <david.hunt@intel.com>
-F: lib/librte_distributor/
+F: lib/distributor/
F: doc/guides/prog_guide/packet_distrib_lib.rst
F: app/test/test_distributor*
F: examples/distributor/
@@ -1365,7 +1365,7 @@ F: doc/guides/sample_app_ug/dist_app.rst
Reorder
M: Reshma Pattan <reshma.pattan@intel.com>
-F: lib/librte_reorder/
+F: lib/reorder/
F: doc/guides/prog_guide/reorder_lib.rst
F: app/test/test_reorder*
F: examples/packet_ordering/
@@ -1374,7 +1374,7 @@ F: doc/guides/sample_app_ug/packet_ordering.rst
Hierarchical scheduler
M: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
M: Jasvinder Singh <jasvinder.singh@intel.com>
-F: lib/librte_sched/
+F: lib/sched/
F: doc/guides/prog_guide/qos_framework.rst
F: app/test/test_red.c
F: app/test/test_sched.c
@@ -1383,7 +1383,7 @@ F: doc/guides/sample_app_ug/qos_scheduler.rst
Packet capture
M: Reshma Pattan <reshma.pattan@intel.com>
-F: lib/librte_pdump/
+F: lib/pdump/
F: doc/guides/prog_guide/pdump_lib.rst
F: app/test/test_pdump.*
F: app/pdump/
@@ -1393,9 +1393,9 @@ F: doc/guides/tools/pdump.rst
Packet Framework
----------------
M: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
-F: lib/librte_pipeline/
-F: lib/librte_port/
-F: lib/librte_table/
+F: lib/pipeline/
+F: lib/port/
+F: lib/table/
F: doc/guides/prog_guide/packet_framework.rst
F: app/test/test_table*
F: app/test-pipeline/
@@ -1410,7 +1410,7 @@ Algorithms
ACL
M: Konstantin Ananyev <konstantin.ananyev@intel.com>
-F: lib/librte_acl/
+F: lib/acl/
F: doc/guides/prog_guide/packet_classif_access_ctrl.rst
F: app/test-acl/
F: app/test/test_acl.*
@@ -1420,7 +1420,7 @@ F: doc/guides/sample_app_ug/l3_forward_access_ctrl.rst
EFD
M: Byron Marohn <byron.marohn@intel.com>
M: Yipeng Wang <yipeng1.wang@intel.com>
-F: lib/librte_efd/
+F: lib/efd/
F: doc/guides/prog_guide/efd_lib.rst
F: app/test/test_efd*
F: examples/server_node_efd/
@@ -1430,7 +1430,7 @@ Hashes
M: Yipeng Wang <yipeng1.wang@intel.com>
M: Sameh Gobriel <sameh.gobriel@intel.com>
M: Bruce Richardson <bruce.richardson@intel.com>
-F: lib/librte_hash/
+F: lib/hash/
F: doc/guides/prog_guide/hash_lib.rst
F: app/test/test_*hash*
F: app/test/test_func_reentrancy.c
@@ -1438,7 +1438,7 @@ F: app/test/test_func_reentrancy.c
LPM
M: Bruce Richardson <bruce.richardson@intel.com>
M: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
-F: lib/librte_lpm/
+F: lib/lpm/
F: doc/guides/prog_guide/lpm*
F: app/test/test_lpm*
F: app/test/test_func_reentrancy.c
@@ -1447,21 +1447,21 @@ F: app/test/test_xmmt_ops.h
Membership - EXPERIMENTAL
M: Yipeng Wang <yipeng1.wang@intel.com>
M: Sameh Gobriel <sameh.gobriel@intel.com>
-F: lib/librte_member/
+F: lib/member/
F: doc/guides/prog_guide/member_lib.rst
F: app/test/test_member*
RIB/FIB - EXPERIMENTAL
M: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
-F: lib/librte_rib/
+F: lib/rib/
F: app/test/test_rib*
-F: lib/librte_fib/
+F: lib/fib/
F: app/test/test_fib*
F: app/test-fib/
Traffic metering
M: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
-F: lib/librte_meter/
+F: lib/meter/
F: doc/guides/sample_app_ug/qos_scheduler.rst
F: app/test/test_meter.c
F: examples/qos_meter/
@@ -1473,13 +1473,13 @@ Other libraries
Configuration file
M: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
-F: lib/librte_cfgfile/
+F: lib/cfgfile/
F: app/test/test_cfgfile.c
F: app/test/test_cfgfiles/
Interactive command line
M: Olivier Matz <olivier.matz@6wind.com>
-F: lib/librte_cmdline/
+F: lib/cmdline/
F: app/test-cmdline/
F: app/test/test_cmdline*
F: examples/cmdline/
@@ -1487,22 +1487,22 @@ F: doc/guides/sample_app_ug/cmd_line.rst
Key/Value parsing
M: Olivier Matz <olivier.matz@6wind.com>
-F: lib/librte_kvargs/
+F: lib/kvargs/
F: app/test/test_kvargs.c
RCU
M: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
-F: lib/librte_rcu/
+F: lib/rcu/
F: app/test/test_rcu*
F: doc/guides/prog_guide/rcu_lib.rst
PCI
M: Gaetan Rivet <grive@u256.net>
-F: lib/librte_pci/
+F: lib/pci/
Power management
M: David Hunt <david.hunt@intel.com>
-F: lib/librte_power/
+F: lib/power/
F: doc/guides/prog_guide/power_man.rst
F: app/test/test_power*
F: examples/l3fwd-power/
@@ -1513,40 +1513,40 @@ F: doc/guides/sample_app_ug/vm_power_management.rst
Timers
M: Robert Sanford <rsanford@akamai.com>
M: Erik Gabriel Carrillo <erik.g.carrillo@intel.com>
-F: lib/librte_timer/
+F: lib/timer/
F: doc/guides/prog_guide/timer_lib.rst
F: app/test/test_timer*
F: examples/timer/
F: doc/guides/sample_app_ug/timer.rst
Job statistics
-F: lib/librte_jobstats/
+F: lib/jobstats/
F: examples/l2fwd-jobstats/
F: doc/guides/sample_app_ug/l2_forward_job_stats.rst
Metrics
-F: lib/librte_metrics/
+F: lib/metrics/
F: app/test/test_metrics.c
Bit-rate statistics
-F: lib/librte_bitratestats/
+F: lib/bitratestats/
F: app/test/test_bitratestats.c
Latency statistics
M: Reshma Pattan <reshma.pattan@intel.com>
-F: lib/librte_latencystats/
+F: lib/latencystats/
F: app/test/test_latencystats.c
Telemetry - EXPERIMENTAL
M: Ciara Power <ciara.power@intel.com>
-F: lib/librte_telemetry/
+F: lib/telemetry/
F: app/test/test_telemetry*
F: usertools/dpdk-telemetry*
F: doc/guides/howto/telemetry.rst
BPF
M: Konstantin Ananyev <konstantin.ananyev@intel.com>
-F: lib/librte_bpf/
+F: lib/bpf/
F: examples/bpf/
F: app/test/test_bpf.c
F: doc/guides/prog_guide/bpf_lib.rst
@@ -1554,7 +1554,7 @@ F: doc/guides/prog_guide/bpf_lib.rst
Graph - EXPERIMENTAL
M: Jerin Jacob <jerinj@marvell.com>
M: Kiran Kumar K <kirankumark@marvell.com>
-F: lib/librte_graph/
+F: lib/graph/
F: doc/guides/prog_guide/graph_lib.rst
F: app/test/test_graph*
M: Nithin Dabilpuram <ndabilpuram@marvell.com>
@@ -1564,7 +1564,7 @@ F: doc/guides/sample_app_ug/l3_forward_graph.rst
Nodes - EXPERIMENTAL
M: Nithin Dabilpuram <ndabilpuram@marvell.com>
M: Pavan Nikhilesh <pbhagavatula@marvell.com>
-F: lib/librte_node/
+F: lib/node/
Test Applications
diff --git a/app/test/test_eal_fs.c b/app/test/test_eal_fs.c
index cae624f82..bb93b82a4 100644
--- a/app/test/test_eal_fs.c
+++ b/app/test/test_eal_fs.c
@@ -9,7 +9,7 @@
#include <errno.h>
/* eal_filesystem.h is not a public header file, so use relative path */
-#include "../../lib/librte_eal/common/eal_filesystem.h"
+#include "../../lib/eal/common/eal_filesystem.h"
static int
test_parse_sysfs_value(void)
diff --git a/app/test/test_memzone.c b/app/test/test_memzone.c
index 0343b0326..03a9d1d3b 100644
--- a/app/test/test_memzone.c
+++ b/app/test/test_memzone.c
@@ -18,7 +18,7 @@
#include <rte_string_fns.h>
#include <rte_errno.h>
#include <rte_malloc.h>
-#include "../../lib/librte_eal/common/malloc_elem.h"
+#include "../../lib/eal/common/malloc_elem.h"
#include "test.h"
diff --git a/app/test/test_telemetry_json.c b/app/test/test_telemetry_json.c
index 7a91490f4..3171ab12e 100644
--- a/app/test/test_telemetry_json.c
+++ b/app/test/test_telemetry_json.c
@@ -4,7 +4,7 @@
#include <string.h>
-#include "../../lib/librte_telemetry/telemetry_json.h"
+#include "../../lib/telemetry/telemetry_json.h"
#include "test.h"
static int
diff --git a/config/arm/meson.build b/config/arm/meson.build
index 3a1c1a598..e6e07aaf9 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -7,7 +7,7 @@
flags_common = [
# Accelerate rte_memcpy. Be sure to run unit test (memcpy_perf_autotest)
# to determine the best threshold in code. Refer to notes in source file
- # (lib/librte_eal/arm/include/rte_memcpy_64.h) for more info.
+ # (lib/eal/arm/include/rte_memcpy_64.h) for more info.
['RTE_ARCH_ARM64_MEMCPY', false],
# ['RTE_ARM64_MEMCPY_ALIGNED_THRESHOLD', 2048],
# ['RTE_ARM64_MEMCPY_UNALIGNED_THRESHOLD', 512],
diff --git a/devtools/build-tags.sh b/devtools/build-tags.sh
index 8fa01ad17..0361135d6 100755
--- a/devtools/build-tags.sh
+++ b/devtools/build-tags.sh
@@ -67,13 +67,13 @@ common_sources()
linux_sources()
{
- find_sources "lib/librte_eal/linux" '*.[chS]'
+ find_sources "lib/eal/linux" '*.[chS]'
find_sources "kernel/linux" '*.[chS]'
}
bsd_sources()
{
- find_sources "lib/librte_eal/freebsd" '*.[chS]'
+ find_sources "lib/eal/freebsd" '*.[chS]'
find_sources "kernel/freebsd" '*.[chS]'
}
@@ -85,14 +85,14 @@ arm_common()
arm_32_sources()
{
arm_common
- find_sources "lib/librte_eal/arm" '*.[chS]' \
+ find_sources "lib/eal/arm" '*.[chS]' \
"$skip_64b_files"
}
arm_64_sources()
{
arm_common
- find_sources "lib/librte_eal/arm" '*.[chS]' \
+ find_sources "lib/eal/arm" '*.[chS]' \
"$skip_32b_files"
find_sources "$source_dirs" '*arm64.[chS]'
}
@@ -108,20 +108,20 @@ x86_common()
x86_32_sources()
{
x86_common
- find_sources "lib/librte_eal/x86" '*.[chS]' \
+ find_sources "lib/eal/x86" '*.[chS]' \
"$skip_64b_files"
}
x86_64_sources()
{
x86_common
- find_sources "lib/librte_eal/x86" '*.[chS]' \
+ find_sources "lib/eal/x86" '*.[chS]' \
"$skip_32b_files"
}
ppc_64_sources()
{
- find_sources "lib/librte_eal/ppc" '*.[chS]'
+ find_sources "lib/eal/ppc" '*.[chS]'
find_sources "$source_dirs" '*altivec*.[chS]'
}
diff --git a/doc/api/doxy-api.conf.in b/doc/api/doxy-api.conf.in
index 3c7ee4608..325a0195c 100644
--- a/doc/api/doxy-api.conf.in
+++ b/doc/api/doxy-api.conf.in
@@ -24,58 +24,58 @@ INPUT = @TOPDIR@/doc/api/doxy-api-index.md \
@TOPDIR@/drivers/raw/dpaa2_qdma \
@TOPDIR@/drivers/raw/ifpga \
@TOPDIR@/drivers/raw/ioat \
- @TOPDIR@/lib/librte_eal/include \
- @TOPDIR@/lib/librte_eal/include/generic \
- @TOPDIR@/lib/librte_acl \
- @TOPDIR@/lib/librte_bbdev \
- @TOPDIR@/lib/librte_bitratestats \
- @TOPDIR@/lib/librte_bpf \
- @TOPDIR@/lib/librte_cfgfile \
- @TOPDIR@/lib/librte_cmdline \
- @TOPDIR@/lib/librte_compressdev \
- @TOPDIR@/lib/librte_cryptodev \
- @TOPDIR@/lib/librte_distributor \
- @TOPDIR@/lib/librte_efd \
- @TOPDIR@/lib/librte_ethdev \
- @TOPDIR@/lib/librte_eventdev \
- @TOPDIR@/lib/librte_fib \
- @TOPDIR@/lib/librte_flow_classify \
- @TOPDIR@/lib/librte_graph \
- @TOPDIR@/lib/librte_gro \
- @TOPDIR@/lib/librte_gso \
- @TOPDIR@/lib/librte_hash \
- @TOPDIR@/lib/librte_ip_frag \
- @TOPDIR@/lib/librte_ipsec \
- @TOPDIR@/lib/librte_jobstats \
- @TOPDIR@/lib/librte_kni \
- @TOPDIR@/lib/librte_kvargs \
- @TOPDIR@/lib/librte_latencystats \
- @TOPDIR@/lib/librte_lpm \
- @TOPDIR@/lib/librte_mbuf \
- @TOPDIR@/lib/librte_member \
- @TOPDIR@/lib/librte_mempool \
- @TOPDIR@/lib/librte_meter \
- @TOPDIR@/lib/librte_metrics \
- @TOPDIR@/lib/librte_node \
- @TOPDIR@/lib/librte_net \
- @TOPDIR@/lib/librte_pci \
- @TOPDIR@/lib/librte_pdump \
- @TOPDIR@/lib/librte_pipeline \
- @TOPDIR@/lib/librte_port \
- @TOPDIR@/lib/librte_power \
- @TOPDIR@/lib/librte_rawdev \
- @TOPDIR@/lib/librte_rcu \
- @TOPDIR@/lib/librte_regexdev \
- @TOPDIR@/lib/librte_reorder \
- @TOPDIR@/lib/librte_rib \
- @TOPDIR@/lib/librte_ring \
- @TOPDIR@/lib/librte_sched \
- @TOPDIR@/lib/librte_security \
- @TOPDIR@/lib/librte_stack \
- @TOPDIR@/lib/librte_table \
- @TOPDIR@/lib/librte_telemetry \
- @TOPDIR@/lib/librte_timer \
- @TOPDIR@/lib/librte_vhost
+ @TOPDIR@/lib/eal/include \
+ @TOPDIR@/lib/eal/include/generic \
+ @TOPDIR@/lib/acl \
+ @TOPDIR@/lib/bbdev \
+ @TOPDIR@/lib/bitratestats \
+ @TOPDIR@/lib/bpf \
+ @TOPDIR@/lib/cfgfile \
+ @TOPDIR@/lib/cmdline \
+ @TOPDIR@/lib/compressdev \
+ @TOPDIR@/lib/cryptodev \
+ @TOPDIR@/lib/distributor \
+ @TOPDIR@/lib/efd \
+ @TOPDIR@/lib/ethdev \
+ @TOPDIR@/lib/eventdev \
+ @TOPDIR@/lib/fib \
+ @TOPDIR@/lib/flow_classify \
+ @TOPDIR@/lib/graph \
+ @TOPDIR@/lib/gro \
+ @TOPDIR@/lib/gso \
+ @TOPDIR@/lib/hash \
+ @TOPDIR@/lib/ip_frag \
+ @TOPDIR@/lib/ipsec \
+ @TOPDIR@/lib/jobstats \
+ @TOPDIR@/lib/kni \
+ @TOPDIR@/lib/kvargs \
+ @TOPDIR@/lib/latencystats \
+ @TOPDIR@/lib/lpm \
+ @TOPDIR@/lib/mbuf \
+ @TOPDIR@/lib/member \
+ @TOPDIR@/lib/mempool \
+ @TOPDIR@/lib/meter \
+ @TOPDIR@/lib/metrics \
+ @TOPDIR@/lib/node \
+ @TOPDIR@/lib/net \
+ @TOPDIR@/lib/pci \
+ @TOPDIR@/lib/pdump \
+ @TOPDIR@/lib/pipeline \
+ @TOPDIR@/lib/port \
+ @TOPDIR@/lib/power \
+ @TOPDIR@/lib/rawdev \
+ @TOPDIR@/lib/rcu \
+ @TOPDIR@/lib/regexdev \
+ @TOPDIR@/lib/reorder \
+ @TOPDIR@/lib/rib \
+ @TOPDIR@/lib/ring \
+ @TOPDIR@/lib/sched \
+ @TOPDIR@/lib/security \
+ @TOPDIR@/lib/stack \
+ @TOPDIR@/lib/table \
+ @TOPDIR@/lib/telemetry \
+ @TOPDIR@/lib/timer \
+ @TOPDIR@/lib/vhost
INPUT += @API_EXAMPLES@
FILE_PATTERNS = rte_*.h \
cmdline.h
diff --git a/doc/guides/contributing/abi_versioning.rst b/doc/guides/contributing/abi_versioning.rst
index 91ada18dd..7ff18f4f7 100644
--- a/doc/guides/contributing/abi_versioning.rst
+++ b/doc/guides/contributing/abi_versioning.rst
@@ -58,12 +58,12 @@ persists over multiple releases.
.. code-block:: none
- $ head ./lib/librte_acl/version.map
+ $ head ./lib/acl/version.map
DPDK_21 {
global:
...
- $ head ./lib/librte_eal/version.map
+ $ head ./lib/eal/version.map
DPDK_21 {
global:
...
@@ -77,7 +77,7 @@ that library.
.. code-block:: none
- $ head ./lib/librte_acl/version.map
+ $ head ./lib/acl/version.map
DPDK_21 {
global:
...
@@ -88,7 +88,7 @@ that library.
} DPDK_21;
...
- $ head ./lib/librte_eal/version.map
+ $ head ./lib/eal/version.map
DPDK_21 {
global:
...
@@ -100,12 +100,12 @@ how this may be done.
.. code-block:: none
- $ head ./lib/librte_acl/version.map
+ $ head ./lib/acl/version.map
DPDK_22 {
global:
...
- $ head ./lib/librte_eal/version.map
+ $ head ./lib/eal/version.map
DPDK_22 {
global:
...
diff --git a/doc/guides/contributing/coding_style.rst b/doc/guides/contributing/coding_style.rst
index fdcd21861..ba69c82fb 100644
--- a/doc/guides/contributing/coding_style.rst
+++ b/doc/guides/contributing/coding_style.rst
@@ -759,7 +759,7 @@ Examples:
* The virtio network PMD in ``drivers/net/virtio`` uses ``pmd.net.virtio``
* The eventdev software poll mode driver in ``drivers/event/sw`` uses ``pmd.event.sw``
* The octeontx mempool driver in ``drivers/mempool/octeontx`` uses ``pmd.mempool.octeontx``
- * The DPDK hash library in ``lib/librte_hash`` uses ``lib.hash``
+ * The DPDK hash library in ``lib/hash`` uses ``lib.hash``
Specializations
~~~~~~~~~~~~~~~
@@ -926,7 +926,7 @@ name
If a library's .so or .a file differs from that given in the directory
name, the name should be specified using this variable. In practice,
since the convention is that for a library called ``librte_xyz.so``, the
- sources are stored in a directory ``lib/librte_xyz``, this value should
+ sources are stored in a directory ``lib/xyz``, this value should
never be needed for new libraries.
.. note::
diff --git a/doc/guides/contributing/documentation.rst b/doc/guides/contributing/documentation.rst
index a4e6be6ac..842549a4c 100644
--- a/doc/guides/contributing/documentation.rst
+++ b/doc/guides/contributing/documentation.rst
@@ -19,10 +19,10 @@ The DPDK source code repository contains input files to build the API documentat
The main directories that contain files related to documentation are shown below::
lib
- |-- librte_acl
- |-- librte_cfgfile
- |-- librte_cmdline
- |-- librte_eal
+ |-- acl
+ |-- cfgfile
+ |-- cmdline
+ |-- eal
| |-- ...
...
doc
@@ -40,7 +40,7 @@ The main directories that contain files related to documentation are shown below
The API documentation is built from `Doxygen <http://www.doxygen.nl>`_ comments in the header files.
-These files are mainly in the ``lib/librte_*`` directories although some of the Poll Mode Drivers in ``drivers/net``
+These files are mainly in the ``lib/*`` directories although some of the Poll Mode Drivers in ``drivers/net``
are also documented with Doxygen.
The configuration files that are used to control the Doxygen output are in the ``doc/api`` directory.
diff --git a/doc/guides/prog_guide/event_timer_adapter.rst b/doc/guides/prog_guide/event_timer_adapter.rst
index 8b18cd169..7547059a0 100644
--- a/doc/guides/prog_guide/event_timer_adapter.rst
+++ b/doc/guides/prog_guide/event_timer_adapter.rst
@@ -35,7 +35,7 @@ device upon timer expiration.
The Event Timer Adapter API represents each event timer with a generic struct,
which contains an event and user metadata. The ``rte_event_timer`` struct is
-defined in ``lib/librte_event/librte_event_timer_adapter.h``.
+defined in ``lib/event/librte_event_timer_adapter.h``.
.. _timer_expiry_event:
diff --git a/doc/guides/prog_guide/qos_framework.rst b/doc/guides/prog_guide/qos_framework.rst
index 4e4ea33cc..7d410d3cc 100644
--- a/doc/guides/prog_guide/qos_framework.rst
+++ b/doc/guides/prog_guide/qos_framework.rst
@@ -1517,9 +1517,9 @@ Source Files Location
The source files for the DPDK dropper are located at:
-* DPDK/lib/librte_sched/rte_red.h
+* DPDK/lib/sched/rte_red.h
-* DPDK/lib/librte_sched/rte_red.c
+* DPDK/lib/sched/rte_red.c
Integration with the DPDK QoS Scheduler
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
diff --git a/doc/guides/prog_guide/rawdev.rst b/doc/guides/prog_guide/rawdev.rst
index a712c7fa9..488e0a7ef 100644
--- a/doc/guides/prog_guide/rawdev.rst
+++ b/doc/guides/prog_guide/rawdev.rst
@@ -13,7 +13,7 @@ In terms of device flavor (type) support, DPDK currently has ethernet
For a new type of device, for example an accelerator, there are not many
options except:
-1. create another lib/librte_MySpecialDev, driver/MySpecialDrv and use it
+1. create another lib/MySpecialDev, driver/MySpecialDrv and use it
through Bus/PMD model.
2. Or, create a vdev and implement necessary custom APIs which are directly
exposed from driver layer. However this may still require changes in bus code
diff --git a/doc/guides/rel_notes/known_issues.rst b/doc/guides/rel_notes/known_issues.rst
index ee3ed1e65..43323e1a4 100644
--- a/doc/guides/rel_notes/known_issues.rst
+++ b/doc/guides/rel_notes/known_issues.rst
@@ -127,7 +127,7 @@ HPET timers do not work on the Osage customer reference platform
work correctly, provided the BIOS supports HPET.
**Driver/Module**:
- ``lib/librte_eal/include/rte_cycles.h``
+ ``lib/eal/include/rte_cycles.h``
Not all variants of supported NIC types have been used in testing
diff --git a/drivers/common/mlx5/linux/meson.build b/drivers/common/mlx5/linux/meson.build
index 36ceab30e..5d1fe80f1 100644
--- a/drivers/common/mlx5/linux/meson.build
+++ b/drivers/common/mlx5/linux/meson.build
@@ -206,7 +206,7 @@ if dlopen_ibverbs
dlopen_sources = files('mlx5_glue.c')
dlopen_install_dir = [ eal_pmd_path + '-glue' ]
dlopen_includes = [global_inc]
- dlopen_includes += include_directories('../../../../lib/librte_eal/include/generic')
+ dlopen_includes += include_directories('../../../../lib/eal/include/generic')
shared_lib = shared_library(
dlopen_lib_name,
dlopen_sources,
diff --git a/drivers/crypto/virtio/meson.build b/drivers/crypto/virtio/meson.build
index 950f41132..7ecf3aa33 100644
--- a/drivers/crypto/virtio/meson.build
+++ b/drivers/crypto/virtio/meson.build
@@ -1,7 +1,7 @@
# SPDX-License-Identifier: BSD-3-Clause
# Copyright(c) 2018 HUAWEI TECHNOLOGIES CO., LTD.
-includes += include_directories('../../../lib/librte_vhost')
+includes += include_directories('../../../lib/vhost')
deps += 'bus_pci'
sources = files('virtio_cryptodev.c', 'virtio_pci.c',
'virtio_rxtx.c', 'virtqueue.c')
diff --git a/kernel/linux/kni/meson.build b/kernel/linux/kni/meson.build
index f43860bcb..c15c78b0b 100644
--- a/kernel/linux/kni/meson.build
+++ b/kernel/linux/kni/meson.build
@@ -18,8 +18,8 @@ custom_target('rte_kni',
'M=' + meson.current_build_dir(),
'src=' + meson.current_source_dir(),
'MODULE_CFLAGS=-include ' + meson.source_root() + '/config/rte_config.h' +
- ' -I' + meson.source_root() + '/lib/librte_eal/include' +
- ' -I' + meson.source_root() + '/lib/librte_kni' +
+ ' -I' + meson.source_root() + '/lib/eal/include' +
+ ' -I' + meson.source_root() + '/lib/kni' +
' -I' + meson.build_root() +
' -I' + meson.current_source_dir(),
'modules'] + cross_args,
diff --git a/lib/librte_acl/acl.h b/lib/acl/acl.h
similarity index 100%
rename from lib/librte_acl/acl.h
rename to lib/acl/acl.h
diff --git a/lib/librte_acl/acl_bld.c b/lib/acl/acl_bld.c
similarity index 100%
rename from lib/librte_acl/acl_bld.c
rename to lib/acl/acl_bld.c
diff --git a/lib/librte_acl/acl_gen.c b/lib/acl/acl_gen.c
similarity index 100%
rename from lib/librte_acl/acl_gen.c
rename to lib/acl/acl_gen.c
diff --git a/lib/librte_acl/acl_run.h b/lib/acl/acl_run.h
similarity index 100%
rename from lib/librte_acl/acl_run.h
rename to lib/acl/acl_run.h
diff --git a/lib/librte_acl/acl_run_altivec.c b/lib/acl/acl_run_altivec.c
similarity index 100%
rename from lib/librte_acl/acl_run_altivec.c
rename to lib/acl/acl_run_altivec.c
diff --git a/lib/librte_acl/acl_run_altivec.h b/lib/acl/acl_run_altivec.h
similarity index 100%
rename from lib/librte_acl/acl_run_altivec.h
rename to lib/acl/acl_run_altivec.h
diff --git a/lib/librte_acl/acl_run_avx2.c b/lib/acl/acl_run_avx2.c
similarity index 100%
rename from lib/librte_acl/acl_run_avx2.c
rename to lib/acl/acl_run_avx2.c
diff --git a/lib/librte_acl/acl_run_avx2.h b/lib/acl/acl_run_avx2.h
similarity index 100%
rename from lib/librte_acl/acl_run_avx2.h
rename to lib/acl/acl_run_avx2.h
diff --git a/lib/librte_acl/acl_run_avx512.c b/lib/acl/acl_run_avx512.c
similarity index 100%
rename from lib/librte_acl/acl_run_avx512.c
rename to lib/acl/acl_run_avx512.c
diff --git a/lib/librte_acl/acl_run_avx512_common.h b/lib/acl/acl_run_avx512_common.h
similarity index 100%
rename from lib/librte_acl/acl_run_avx512_common.h
rename to lib/acl/acl_run_avx512_common.h
diff --git a/lib/librte_acl/acl_run_avx512x16.h b/lib/acl/acl_run_avx512x16.h
similarity index 100%
rename from lib/librte_acl/acl_run_avx512x16.h
rename to lib/acl/acl_run_avx512x16.h
diff --git a/lib/librte_acl/acl_run_avx512x8.h b/lib/acl/acl_run_avx512x8.h
similarity index 100%
rename from lib/librte_acl/acl_run_avx512x8.h
rename to lib/acl/acl_run_avx512x8.h
diff --git a/lib/librte_acl/acl_run_neon.c b/lib/acl/acl_run_neon.c
similarity index 100%
rename from lib/librte_acl/acl_run_neon.c
rename to lib/acl/acl_run_neon.c
diff --git a/lib/librte_acl/acl_run_neon.h b/lib/acl/acl_run_neon.h
similarity index 100%
rename from lib/librte_acl/acl_run_neon.h
rename to lib/acl/acl_run_neon.h
diff --git a/lib/librte_acl/acl_run_scalar.c b/lib/acl/acl_run_scalar.c
similarity index 100%
rename from lib/librte_acl/acl_run_scalar.c
rename to lib/acl/acl_run_scalar.c
diff --git a/lib/librte_acl/acl_run_sse.c b/lib/acl/acl_run_sse.c
similarity index 100%
rename from lib/librte_acl/acl_run_sse.c
rename to lib/acl/acl_run_sse.c
diff --git a/lib/librte_acl/acl_run_sse.h b/lib/acl/acl_run_sse.h
similarity index 100%
rename from lib/librte_acl/acl_run_sse.h
rename to lib/acl/acl_run_sse.h
diff --git a/lib/librte_acl/acl_vect.h b/lib/acl/acl_vect.h
similarity index 100%
rename from lib/librte_acl/acl_vect.h
rename to lib/acl/acl_vect.h
diff --git a/lib/librte_acl/meson.build b/lib/acl/meson.build
similarity index 100%
rename from lib/librte_acl/meson.build
rename to lib/acl/meson.build
diff --git a/lib/librte_acl/rte_acl.c b/lib/acl/rte_acl.c
similarity index 100%
rename from lib/librte_acl/rte_acl.c
rename to lib/acl/rte_acl.c
diff --git a/lib/librte_acl/rte_acl.h b/lib/acl/rte_acl.h
similarity index 100%
rename from lib/librte_acl/rte_acl.h
rename to lib/acl/rte_acl.h
diff --git a/lib/librte_acl/rte_acl_osdep.h b/lib/acl/rte_acl_osdep.h
similarity index 100%
rename from lib/librte_acl/rte_acl_osdep.h
rename to lib/acl/rte_acl_osdep.h
diff --git a/lib/librte_acl/tb_mem.c b/lib/acl/tb_mem.c
similarity index 100%
rename from lib/librte_acl/tb_mem.c
rename to lib/acl/tb_mem.c
diff --git a/lib/librte_acl/tb_mem.h b/lib/acl/tb_mem.h
similarity index 100%
rename from lib/librte_acl/tb_mem.h
rename to lib/acl/tb_mem.h
diff --git a/lib/librte_acl/version.map b/lib/acl/version.map
similarity index 100%
rename from lib/librte_acl/version.map
rename to lib/acl/version.map
diff --git a/lib/librte_bbdev/meson.build b/lib/bbdev/meson.build
similarity index 100%
rename from lib/librte_bbdev/meson.build
rename to lib/bbdev/meson.build
diff --git a/lib/librte_bbdev/rte_bbdev.c b/lib/bbdev/rte_bbdev.c
similarity index 100%
rename from lib/librte_bbdev/rte_bbdev.c
rename to lib/bbdev/rte_bbdev.c
diff --git a/lib/librte_bbdev/rte_bbdev.h b/lib/bbdev/rte_bbdev.h
similarity index 100%
rename from lib/librte_bbdev/rte_bbdev.h
rename to lib/bbdev/rte_bbdev.h
diff --git a/lib/librte_bbdev/rte_bbdev_op.h b/lib/bbdev/rte_bbdev_op.h
similarity index 100%
rename from lib/librte_bbdev/rte_bbdev_op.h
rename to lib/bbdev/rte_bbdev_op.h
diff --git a/lib/librte_bbdev/rte_bbdev_pmd.h b/lib/bbdev/rte_bbdev_pmd.h
similarity index 100%
rename from lib/librte_bbdev/rte_bbdev_pmd.h
rename to lib/bbdev/rte_bbdev_pmd.h
diff --git a/lib/librte_bbdev/version.map b/lib/bbdev/version.map
similarity index 100%
rename from lib/librte_bbdev/version.map
rename to lib/bbdev/version.map
diff --git a/lib/librte_bitratestats/meson.build b/lib/bitratestats/meson.build
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rename from lib/librte_bitratestats/meson.build
rename to lib/bitratestats/meson.build
diff --git a/lib/librte_bitratestats/rte_bitrate.c b/lib/bitratestats/rte_bitrate.c
similarity index 100%
rename from lib/librte_bitratestats/rte_bitrate.c
rename to lib/bitratestats/rte_bitrate.c
diff --git a/lib/librte_bitratestats/rte_bitrate.h b/lib/bitratestats/rte_bitrate.h
similarity index 100%
rename from lib/librte_bitratestats/rte_bitrate.h
rename to lib/bitratestats/rte_bitrate.h
diff --git a/lib/librte_bitratestats/version.map b/lib/bitratestats/version.map
similarity index 100%
rename from lib/librte_bitratestats/version.map
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diff --git a/lib/librte_bpf/bpf.c b/lib/bpf/bpf.c
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rename from lib/librte_bpf/bpf.c
rename to lib/bpf/bpf.c
diff --git a/lib/librte_bpf/bpf_def.h b/lib/bpf/bpf_def.h
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rename from lib/librte_bpf/bpf_def.h
rename to lib/bpf/bpf_def.h
diff --git a/lib/librte_bpf/bpf_exec.c b/lib/bpf/bpf_exec.c
similarity index 100%
rename from lib/librte_bpf/bpf_exec.c
rename to lib/bpf/bpf_exec.c
diff --git a/lib/librte_bpf/bpf_impl.h b/lib/bpf/bpf_impl.h
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rename from lib/librte_bpf/bpf_impl.h
rename to lib/bpf/bpf_impl.h
diff --git a/lib/librte_bpf/bpf_jit_arm64.c b/lib/bpf/bpf_jit_arm64.c
similarity index 100%
rename from lib/librte_bpf/bpf_jit_arm64.c
rename to lib/bpf/bpf_jit_arm64.c
diff --git a/lib/librte_bpf/bpf_jit_x86.c b/lib/bpf/bpf_jit_x86.c
similarity index 100%
rename from lib/librte_bpf/bpf_jit_x86.c
rename to lib/bpf/bpf_jit_x86.c
diff --git a/lib/librte_bpf/bpf_load.c b/lib/bpf/bpf_load.c
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rename from lib/librte_bpf/bpf_load.c
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diff --git a/lib/librte_bpf/bpf_load_elf.c b/lib/bpf/bpf_load_elf.c
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rename from lib/librte_bpf/bpf_load_elf.c
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diff --git a/lib/librte_bpf/bpf_pkt.c b/lib/bpf/bpf_pkt.c
similarity index 100%
rename from lib/librte_bpf/bpf_pkt.c
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diff --git a/lib/librte_bpf/bpf_validate.c b/lib/bpf/bpf_validate.c
similarity index 100%
rename from lib/librte_bpf/bpf_validate.c
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diff --git a/lib/librte_bpf/meson.build b/lib/bpf/meson.build
similarity index 100%
rename from lib/librte_bpf/meson.build
rename to lib/bpf/meson.build
diff --git a/lib/librte_bpf/rte_bpf.h b/lib/bpf/rte_bpf.h
similarity index 100%
rename from lib/librte_bpf/rte_bpf.h
rename to lib/bpf/rte_bpf.h
diff --git a/lib/librte_bpf/rte_bpf_ethdev.h b/lib/bpf/rte_bpf_ethdev.h
similarity index 100%
rename from lib/librte_bpf/rte_bpf_ethdev.h
rename to lib/bpf/rte_bpf_ethdev.h
diff --git a/lib/librte_bpf/version.map b/lib/bpf/version.map
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rename from lib/librte_bpf/version.map
rename to lib/bpf/version.map
diff --git a/lib/librte_cfgfile/meson.build b/lib/cfgfile/meson.build
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rename to lib/cfgfile/meson.build
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rename to lib/cfgfile/rte_cfgfile.c
diff --git a/lib/librte_cfgfile/rte_cfgfile.h b/lib/cfgfile/rte_cfgfile.h
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rename from lib/librte_cfgfile/rte_cfgfile.h
rename to lib/cfgfile/rte_cfgfile.h
diff --git a/lib/librte_cfgfile/version.map b/lib/cfgfile/version.map
similarity index 100%
rename from lib/librte_cfgfile/version.map
rename to lib/cfgfile/version.map
diff --git a/lib/librte_cmdline/cmdline.c b/lib/cmdline/cmdline.c
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rename from lib/librte_cmdline/cmdline.h
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rename to lib/cmdline/cmdline_cirbuf.c
diff --git a/lib/librte_cmdline/cmdline_cirbuf.h b/lib/cmdline/cmdline_cirbuf.h
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rename from lib/librte_cmdline/cmdline_cirbuf.h
rename to lib/cmdline/cmdline_cirbuf.h
diff --git a/lib/librte_cmdline/cmdline_os_unix.c b/lib/cmdline/cmdline_os_unix.c
similarity index 100%
rename from lib/librte_cmdline/cmdline_os_unix.c
rename to lib/cmdline/cmdline_os_unix.c
diff --git a/lib/librte_cmdline/cmdline_os_windows.c b/lib/cmdline/cmdline_os_windows.c
similarity index 100%
rename from lib/librte_cmdline/cmdline_os_windows.c
rename to lib/cmdline/cmdline_os_windows.c
diff --git a/lib/librte_cmdline/cmdline_parse.c b/lib/cmdline/cmdline_parse.c
similarity index 100%
rename from lib/librte_cmdline/cmdline_parse.c
rename to lib/cmdline/cmdline_parse.c
diff --git a/lib/librte_cmdline/cmdline_parse.h b/lib/cmdline/cmdline_parse.h
similarity index 100%
rename from lib/librte_cmdline/cmdline_parse.h
rename to lib/cmdline/cmdline_parse.h
diff --git a/lib/librte_cmdline/cmdline_parse_etheraddr.c b/lib/cmdline/cmdline_parse_etheraddr.c
similarity index 100%
rename from lib/librte_cmdline/cmdline_parse_etheraddr.c
rename to lib/cmdline/cmdline_parse_etheraddr.c
diff --git a/lib/librte_cmdline/cmdline_parse_etheraddr.h b/lib/cmdline/cmdline_parse_etheraddr.h
similarity index 100%
rename from lib/librte_cmdline/cmdline_parse_etheraddr.h
rename to lib/cmdline/cmdline_parse_etheraddr.h
diff --git a/lib/librte_cmdline/cmdline_parse_ipaddr.c b/lib/cmdline/cmdline_parse_ipaddr.c
similarity index 100%
rename from lib/librte_cmdline/cmdline_parse_ipaddr.c
rename to lib/cmdline/cmdline_parse_ipaddr.c
diff --git a/lib/librte_cmdline/cmdline_parse_ipaddr.h b/lib/cmdline/cmdline_parse_ipaddr.h
similarity index 100%
rename from lib/librte_cmdline/cmdline_parse_ipaddr.h
rename to lib/cmdline/cmdline_parse_ipaddr.h
diff --git a/lib/librte_cmdline/cmdline_parse_num.c b/lib/cmdline/cmdline_parse_num.c
similarity index 100%
rename from lib/librte_cmdline/cmdline_parse_num.c
rename to lib/cmdline/cmdline_parse_num.c
diff --git a/lib/librte_cmdline/cmdline_parse_num.h b/lib/cmdline/cmdline_parse_num.h
similarity index 100%
rename from lib/librte_cmdline/cmdline_parse_num.h
rename to lib/cmdline/cmdline_parse_num.h
diff --git a/lib/librte_cmdline/cmdline_parse_portlist.c b/lib/cmdline/cmdline_parse_portlist.c
similarity index 100%
rename from lib/librte_cmdline/cmdline_parse_portlist.c
rename to lib/cmdline/cmdline_parse_portlist.c
diff --git a/lib/librte_cmdline/cmdline_parse_portlist.h b/lib/cmdline/cmdline_parse_portlist.h
similarity index 100%
rename from lib/librte_cmdline/cmdline_parse_portlist.h
rename to lib/cmdline/cmdline_parse_portlist.h
diff --git a/lib/librte_cmdline/cmdline_parse_string.c b/lib/cmdline/cmdline_parse_string.c
similarity index 100%
rename from lib/librte_cmdline/cmdline_parse_string.c
rename to lib/cmdline/cmdline_parse_string.c
diff --git a/lib/librte_cmdline/cmdline_parse_string.h b/lib/cmdline/cmdline_parse_string.h
similarity index 100%
rename from lib/librte_cmdline/cmdline_parse_string.h
rename to lib/cmdline/cmdline_parse_string.h
diff --git a/lib/librte_cmdline/cmdline_private.h b/lib/cmdline/cmdline_private.h
similarity index 100%
rename from lib/librte_cmdline/cmdline_private.h
rename to lib/cmdline/cmdline_private.h
diff --git a/lib/librte_cmdline/cmdline_rdline.c b/lib/cmdline/cmdline_rdline.c
similarity index 100%
rename from lib/librte_cmdline/cmdline_rdline.c
rename to lib/cmdline/cmdline_rdline.c
diff --git a/lib/librte_cmdline/cmdline_rdline.h b/lib/cmdline/cmdline_rdline.h
similarity index 100%
rename from lib/librte_cmdline/cmdline_rdline.h
rename to lib/cmdline/cmdline_rdline.h
diff --git a/lib/librte_cmdline/cmdline_socket.c b/lib/cmdline/cmdline_socket.c
similarity index 100%
rename from lib/librte_cmdline/cmdline_socket.c
rename to lib/cmdline/cmdline_socket.c
diff --git a/lib/librte_cmdline/cmdline_socket.h b/lib/cmdline/cmdline_socket.h
similarity index 100%
rename from lib/librte_cmdline/cmdline_socket.h
rename to lib/cmdline/cmdline_socket.h
diff --git a/lib/librte_cmdline/cmdline_vt100.c b/lib/cmdline/cmdline_vt100.c
similarity index 100%
rename from lib/librte_cmdline/cmdline_vt100.c
rename to lib/cmdline/cmdline_vt100.c
diff --git a/lib/librte_cmdline/cmdline_vt100.h b/lib/cmdline/cmdline_vt100.h
similarity index 100%
rename from lib/librte_cmdline/cmdline_vt100.h
rename to lib/cmdline/cmdline_vt100.h
diff --git a/lib/librte_cmdline/meson.build b/lib/cmdline/meson.build
similarity index 100%
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rename to lib/cmdline/meson.build
diff --git a/lib/librte_cmdline/version.map b/lib/cmdline/version.map
similarity index 100%
rename from lib/librte_cmdline/version.map
rename to lib/cmdline/version.map
diff --git a/lib/librte_compressdev/meson.build b/lib/compressdev/meson.build
similarity index 100%
rename from lib/librte_compressdev/meson.build
rename to lib/compressdev/meson.build
diff --git a/lib/librte_compressdev/rte_comp.c b/lib/compressdev/rte_comp.c
similarity index 100%
rename from lib/librte_compressdev/rte_comp.c
rename to lib/compressdev/rte_comp.c
diff --git a/lib/librte_compressdev/rte_comp.h b/lib/compressdev/rte_comp.h
similarity index 100%
rename from lib/librte_compressdev/rte_comp.h
rename to lib/compressdev/rte_comp.h
diff --git a/lib/librte_compressdev/rte_compressdev.c b/lib/compressdev/rte_compressdev.c
similarity index 100%
rename from lib/librte_compressdev/rte_compressdev.c
rename to lib/compressdev/rte_compressdev.c
diff --git a/lib/librte_compressdev/rte_compressdev.h b/lib/compressdev/rte_compressdev.h
similarity index 100%
rename from lib/librte_compressdev/rte_compressdev.h
rename to lib/compressdev/rte_compressdev.h
diff --git a/lib/librte_compressdev/rte_compressdev_internal.h b/lib/compressdev/rte_compressdev_internal.h
similarity index 100%
rename from lib/librte_compressdev/rte_compressdev_internal.h
rename to lib/compressdev/rte_compressdev_internal.h
diff --git a/lib/librte_compressdev/rte_compressdev_pmd.c b/lib/compressdev/rte_compressdev_pmd.c
similarity index 100%
rename from lib/librte_compressdev/rte_compressdev_pmd.c
rename to lib/compressdev/rte_compressdev_pmd.c
diff --git a/lib/librte_compressdev/rte_compressdev_pmd.h b/lib/compressdev/rte_compressdev_pmd.h
similarity index 100%
rename from lib/librte_compressdev/rte_compressdev_pmd.h
rename to lib/compressdev/rte_compressdev_pmd.h
diff --git a/lib/librte_compressdev/version.map b/lib/compressdev/version.map
similarity index 100%
rename from lib/librte_compressdev/version.map
rename to lib/compressdev/version.map
diff --git a/lib/librte_cryptodev/cryptodev_trace_points.c b/lib/cryptodev/cryptodev_trace_points.c
similarity index 100%
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rename to lib/cryptodev/cryptodev_trace_points.c
diff --git a/lib/librte_cryptodev/meson.build b/lib/cryptodev/meson.build
similarity index 100%
rename from lib/librte_cryptodev/meson.build
rename to lib/cryptodev/meson.build
diff --git a/lib/librte_cryptodev/rte_crypto.h b/lib/cryptodev/rte_crypto.h
similarity index 100%
rename from lib/librte_cryptodev/rte_crypto.h
rename to lib/cryptodev/rte_crypto.h
diff --git a/lib/librte_cryptodev/rte_crypto_asym.h b/lib/cryptodev/rte_crypto_asym.h
similarity index 100%
rename from lib/librte_cryptodev/rte_crypto_asym.h
rename to lib/cryptodev/rte_crypto_asym.h
diff --git a/lib/librte_cryptodev/rte_crypto_sym.h b/lib/cryptodev/rte_crypto_sym.h
similarity index 100%
rename from lib/librte_cryptodev/rte_crypto_sym.h
rename to lib/cryptodev/rte_crypto_sym.h
diff --git a/lib/librte_cryptodev/rte_cryptodev.c b/lib/cryptodev/rte_cryptodev.c
similarity index 100%
rename from lib/librte_cryptodev/rte_cryptodev.c
rename to lib/cryptodev/rte_cryptodev.c
diff --git a/lib/librte_cryptodev/rte_cryptodev.h b/lib/cryptodev/rte_cryptodev.h
similarity index 100%
rename from lib/librte_cryptodev/rte_cryptodev.h
rename to lib/cryptodev/rte_cryptodev.h
diff --git a/lib/librte_cryptodev/rte_cryptodev_pmd.c b/lib/cryptodev/rte_cryptodev_pmd.c
similarity index 100%
rename from lib/librte_cryptodev/rte_cryptodev_pmd.c
rename to lib/cryptodev/rte_cryptodev_pmd.c
diff --git a/lib/librte_cryptodev/rte_cryptodev_pmd.h b/lib/cryptodev/rte_cryptodev_pmd.h
similarity index 100%
rename from lib/librte_cryptodev/rte_cryptodev_pmd.h
rename to lib/cryptodev/rte_cryptodev_pmd.h
diff --git a/lib/librte_cryptodev/rte_cryptodev_trace.h b/lib/cryptodev/rte_cryptodev_trace.h
similarity index 100%
rename from lib/librte_cryptodev/rte_cryptodev_trace.h
rename to lib/cryptodev/rte_cryptodev_trace.h
diff --git a/lib/librte_cryptodev/rte_cryptodev_trace_fp.h b/lib/cryptodev/rte_cryptodev_trace_fp.h
similarity index 100%
rename from lib/librte_cryptodev/rte_cryptodev_trace_fp.h
rename to lib/cryptodev/rte_cryptodev_trace_fp.h
diff --git a/lib/librte_cryptodev/version.map b/lib/cryptodev/version.map
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rename from lib/librte_cryptodev/version.map
rename to lib/cryptodev/version.map
diff --git a/lib/librte_distributor/distributor_private.h b/lib/distributor/distributor_private.h
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rename from lib/librte_distributor/distributor_private.h
rename to lib/distributor/distributor_private.h
diff --git a/lib/librte_distributor/meson.build b/lib/distributor/meson.build
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rename from lib/librte_distributor/meson.build
rename to lib/distributor/meson.build
diff --git a/lib/librte_distributor/rte_distributor.c b/lib/distributor/rte_distributor.c
similarity index 100%
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rename to lib/distributor/rte_distributor.c
diff --git a/lib/librte_distributor/rte_distributor.h b/lib/distributor/rte_distributor.h
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rename from lib/librte_distributor/rte_distributor.h
rename to lib/distributor/rte_distributor.h
diff --git a/lib/librte_distributor/rte_distributor_match_generic.c b/lib/distributor/rte_distributor_match_generic.c
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rename to lib/distributor/rte_distributor_match_generic.c
diff --git a/lib/librte_distributor/rte_distributor_match_sse.c b/lib/distributor/rte_distributor_match_sse.c
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rename to lib/distributor/rte_distributor_match_sse.c
diff --git a/lib/librte_distributor/rte_distributor_single.c b/lib/distributor/rte_distributor_single.c
similarity index 100%
rename from lib/librte_distributor/rte_distributor_single.c
rename to lib/distributor/rte_distributor_single.c
diff --git a/lib/librte_distributor/rte_distributor_single.h b/lib/distributor/rte_distributor_single.h
similarity index 100%
rename from lib/librte_distributor/rte_distributor_single.h
rename to lib/distributor/rte_distributor_single.h
diff --git a/lib/librte_distributor/version.map b/lib/distributor/version.map
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rename from lib/librte_distributor/version.map
rename to lib/distributor/version.map
diff --git a/lib/librte_eal/arm/include/meson.build b/lib/eal/arm/include/meson.build
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rename from lib/librte_eal/arm/include/meson.build
rename to lib/eal/arm/include/meson.build
diff --git a/lib/librte_eal/arm/include/rte_atomic.h b/lib/eal/arm/include/rte_atomic.h
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rename from lib/librte_eal/arm/include/rte_atomic.h
rename to lib/eal/arm/include/rte_atomic.h
diff --git a/lib/librte_eal/arm/include/rte_atomic_32.h b/lib/eal/arm/include/rte_atomic_32.h
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rename from lib/librte_eal/arm/include/rte_atomic_32.h
rename to lib/eal/arm/include/rte_atomic_32.h
diff --git a/lib/librte_eal/arm/include/rte_atomic_64.h b/lib/eal/arm/include/rte_atomic_64.h
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rename to lib/eal/arm/include/rte_atomic_64.h
diff --git a/lib/librte_eal/arm/include/rte_byteorder.h b/lib/eal/arm/include/rte_byteorder.h
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rename from lib/librte_eal/arm/include/rte_byteorder.h
rename to lib/eal/arm/include/rte_byteorder.h
diff --git a/lib/librte_eal/arm/include/rte_cpuflags.h b/lib/eal/arm/include/rte_cpuflags.h
similarity index 100%
rename from lib/librte_eal/arm/include/rte_cpuflags.h
rename to lib/eal/arm/include/rte_cpuflags.h
diff --git a/lib/librte_eal/arm/include/rte_cpuflags_32.h b/lib/eal/arm/include/rte_cpuflags_32.h
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rename from lib/librte_eal/arm/include/rte_cpuflags_32.h
rename to lib/eal/arm/include/rte_cpuflags_32.h
diff --git a/lib/librte_eal/arm/include/rte_cpuflags_64.h b/lib/eal/arm/include/rte_cpuflags_64.h
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rename from lib/librte_eal/arm/include/rte_cpuflags_64.h
rename to lib/eal/arm/include/rte_cpuflags_64.h
diff --git a/lib/librte_eal/arm/include/rte_cycles.h b/lib/eal/arm/include/rte_cycles.h
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diff --git a/lib/librte_eal/arm/include/rte_power_intrinsics.h b/lib/eal/arm/include/rte_power_intrinsics.h
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diff --git a/lib/librte_eal/freebsd/eal_dev.c b/lib/eal/freebsd/eal_dev.c
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rename from lib/librte_eal/freebsd/eal_dev.c
rename to lib/eal/freebsd/eal_dev.c
diff --git a/lib/librte_eal/freebsd/eal_hugepage_info.c b/lib/eal/freebsd/eal_hugepage_info.c
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rename from lib/librte_eal/freebsd/eal_hugepage_info.c
rename to lib/eal/freebsd/eal_hugepage_info.c
diff --git a/lib/librte_eal/freebsd/eal_interrupts.c b/lib/eal/freebsd/eal_interrupts.c
similarity index 100%
rename from lib/librte_eal/freebsd/eal_interrupts.c
rename to lib/eal/freebsd/eal_interrupts.c
diff --git a/lib/librte_eal/freebsd/eal_lcore.c b/lib/eal/freebsd/eal_lcore.c
similarity index 100%
rename from lib/librte_eal/freebsd/eal_lcore.c
rename to lib/eal/freebsd/eal_lcore.c
diff --git a/lib/librte_eal/freebsd/eal_memalloc.c b/lib/eal/freebsd/eal_memalloc.c
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rename from lib/librte_eal/freebsd/eal_memalloc.c
rename to lib/eal/freebsd/eal_memalloc.c
diff --git a/lib/librte_eal/freebsd/eal_memory.c b/lib/eal/freebsd/eal_memory.c
similarity index 100%
rename from lib/librte_eal/freebsd/eal_memory.c
rename to lib/eal/freebsd/eal_memory.c
diff --git a/lib/librte_eal/freebsd/eal_thread.c b/lib/eal/freebsd/eal_thread.c
similarity index 100%
rename from lib/librte_eal/freebsd/eal_thread.c
rename to lib/eal/freebsd/eal_thread.c
diff --git a/lib/librte_eal/freebsd/eal_timer.c b/lib/eal/freebsd/eal_timer.c
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rename from lib/librte_eal/freebsd/eal_timer.c
rename to lib/eal/freebsd/eal_timer.c
diff --git a/lib/librte_eal/freebsd/include/meson.build b/lib/eal/freebsd/include/meson.build
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rename from lib/librte_eal/freebsd/include/meson.build
rename to lib/eal/freebsd/include/meson.build
diff --git a/lib/librte_eal/freebsd/include/rte_os.h b/lib/eal/freebsd/include/rte_os.h
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rename from lib/librte_eal/freebsd/include/rte_os.h
rename to lib/eal/freebsd/include/rte_os.h
diff --git a/lib/librte_eal/freebsd/include/rte_os_shim.h b/lib/eal/freebsd/include/rte_os_shim.h
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rename from lib/librte_eal/freebsd/include/rte_os_shim.h
rename to lib/eal/freebsd/include/rte_os_shim.h
diff --git a/lib/librte_eal/freebsd/meson.build b/lib/eal/freebsd/meson.build
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rename from lib/librte_eal/freebsd/meson.build
rename to lib/eal/freebsd/meson.build
diff --git a/lib/librte_eal/include/generic/rte_atomic.h b/lib/eal/include/generic/rte_atomic.h
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rename from lib/librte_eal/include/generic/rte_atomic.h
rename to lib/eal/include/generic/rte_atomic.h
diff --git a/lib/librte_eal/include/generic/rte_byteorder.h b/lib/eal/include/generic/rte_byteorder.h
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rename from lib/librte_eal/include/generic/rte_byteorder.h
rename to lib/eal/include/generic/rte_byteorder.h
diff --git a/lib/librte_eal/include/generic/rte_cpuflags.h b/lib/eal/include/generic/rte_cpuflags.h
similarity index 100%
rename from lib/librte_eal/include/generic/rte_cpuflags.h
rename to lib/eal/include/generic/rte_cpuflags.h
diff --git a/lib/librte_eal/include/generic/rte_cycles.h b/lib/eal/include/generic/rte_cycles.h
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rename from lib/librte_eal/include/generic/rte_cycles.h
rename to lib/eal/include/generic/rte_cycles.h
diff --git a/lib/librte_eal/include/generic/rte_io.h b/lib/eal/include/generic/rte_io.h
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rename from lib/librte_eal/include/generic/rte_io.h
rename to lib/eal/include/generic/rte_io.h
diff --git a/lib/librte_eal/include/generic/rte_mcslock.h b/lib/eal/include/generic/rte_mcslock.h
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rename from lib/librte_eal/include/generic/rte_mcslock.h
rename to lib/eal/include/generic/rte_mcslock.h
diff --git a/lib/librte_eal/include/generic/rte_memcpy.h b/lib/eal/include/generic/rte_memcpy.h
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rename from lib/librte_eal/include/generic/rte_memcpy.h
rename to lib/eal/include/generic/rte_memcpy.h
diff --git a/lib/librte_eal/include/generic/rte_pause.h b/lib/eal/include/generic/rte_pause.h
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rename from lib/librte_eal/include/generic/rte_pause.h
rename to lib/eal/include/generic/rte_pause.h
diff --git a/lib/librte_eal/include/generic/rte_pflock.h b/lib/eal/include/generic/rte_pflock.h
similarity index 100%
rename from lib/librte_eal/include/generic/rte_pflock.h
rename to lib/eal/include/generic/rte_pflock.h
diff --git a/lib/librte_eal/include/generic/rte_power_intrinsics.h b/lib/eal/include/generic/rte_power_intrinsics.h
similarity index 100%
rename from lib/librte_eal/include/generic/rte_power_intrinsics.h
rename to lib/eal/include/generic/rte_power_intrinsics.h
diff --git a/lib/librte_eal/include/generic/rte_prefetch.h b/lib/eal/include/generic/rte_prefetch.h
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rename from lib/librte_eal/include/generic/rte_prefetch.h
rename to lib/eal/include/generic/rte_prefetch.h
diff --git a/lib/librte_eal/include/generic/rte_rwlock.h b/lib/eal/include/generic/rte_rwlock.h
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rename from lib/librte_eal/include/generic/rte_rwlock.h
rename to lib/eal/include/generic/rte_rwlock.h
diff --git a/lib/librte_eal/include/generic/rte_spinlock.h b/lib/eal/include/generic/rte_spinlock.h
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rename from lib/librte_eal/include/generic/rte_spinlock.h
rename to lib/eal/include/generic/rte_spinlock.h
diff --git a/lib/librte_eal/include/generic/rte_ticketlock.h b/lib/eal/include/generic/rte_ticketlock.h
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rename from lib/librte_eal/include/generic/rte_ticketlock.h
rename to lib/eal/include/generic/rte_ticketlock.h
diff --git a/lib/librte_eal/include/generic/rte_vect.h b/lib/eal/include/generic/rte_vect.h
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rename from lib/librte_eal/include/generic/rte_vect.h
rename to lib/eal/include/generic/rte_vect.h
diff --git a/lib/librte_eal/include/meson.build b/lib/eal/include/meson.build
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rename from lib/librte_eal/include/meson.build
rename to lib/eal/include/meson.build
diff --git a/lib/librte_eal/include/rte_alarm.h b/lib/eal/include/rte_alarm.h
similarity index 100%
rename from lib/librte_eal/include/rte_alarm.h
rename to lib/eal/include/rte_alarm.h
diff --git a/lib/librte_eal/include/rte_bitmap.h b/lib/eal/include/rte_bitmap.h
similarity index 100%
rename from lib/librte_eal/include/rte_bitmap.h
rename to lib/eal/include/rte_bitmap.h
diff --git a/lib/librte_eal/include/rte_bitops.h b/lib/eal/include/rte_bitops.h
similarity index 100%
rename from lib/librte_eal/include/rte_bitops.h
rename to lib/eal/include/rte_bitops.h
diff --git a/lib/librte_eal/include/rte_branch_prediction.h b/lib/eal/include/rte_branch_prediction.h
similarity index 100%
rename from lib/librte_eal/include/rte_branch_prediction.h
rename to lib/eal/include/rte_branch_prediction.h
diff --git a/lib/librte_eal/include/rte_bus.h b/lib/eal/include/rte_bus.h
similarity index 100%
rename from lib/librte_eal/include/rte_bus.h
rename to lib/eal/include/rte_bus.h
diff --git a/lib/librte_eal/include/rte_class.h b/lib/eal/include/rte_class.h
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rename from lib/librte_eal/include/rte_class.h
rename to lib/eal/include/rte_class.h
diff --git a/lib/librte_eal/include/rte_common.h b/lib/eal/include/rte_common.h
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rename from lib/librte_eal/include/rte_common.h
rename to lib/eal/include/rte_common.h
diff --git a/lib/librte_eal/include/rte_compat.h b/lib/eal/include/rte_compat.h
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rename from lib/librte_eal/include/rte_compat.h
rename to lib/eal/include/rte_compat.h
diff --git a/lib/librte_eal/include/rte_debug.h b/lib/eal/include/rte_debug.h
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rename from lib/librte_eal/include/rte_debug.h
rename to lib/eal/include/rte_debug.h
diff --git a/lib/librte_eal/include/rte_dev.h b/lib/eal/include/rte_dev.h
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rename from lib/librte_eal/include/rte_dev.h
rename to lib/eal/include/rte_dev.h
diff --git a/lib/librte_eal/include/rte_devargs.h b/lib/eal/include/rte_devargs.h
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rename from lib/librte_eal/include/rte_devargs.h
rename to lib/eal/include/rte_devargs.h
diff --git a/lib/librte_eal/include/rte_eal.h b/lib/eal/include/rte_eal.h
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rename from lib/librte_eal/include/rte_eal.h
rename to lib/eal/include/rte_eal.h
diff --git a/lib/librte_eal/include/rte_eal_interrupts.h b/lib/eal/include/rte_eal_interrupts.h
similarity index 100%
rename from lib/librte_eal/include/rte_eal_interrupts.h
rename to lib/eal/include/rte_eal_interrupts.h
diff --git a/lib/librte_eal/include/rte_eal_memconfig.h b/lib/eal/include/rte_eal_memconfig.h
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rename from lib/librte_eal/include/rte_eal_memconfig.h
rename to lib/eal/include/rte_eal_memconfig.h
diff --git a/lib/librte_eal/include/rte_eal_paging.h b/lib/eal/include/rte_eal_paging.h
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rename from lib/librte_eal/include/rte_eal_paging.h
rename to lib/eal/include/rte_eal_paging.h
diff --git a/lib/librte_eal/include/rte_eal_trace.h b/lib/eal/include/rte_eal_trace.h
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rename from lib/librte_eal/include/rte_eal_trace.h
rename to lib/eal/include/rte_eal_trace.h
diff --git a/lib/librte_eal/include/rte_errno.h b/lib/eal/include/rte_errno.h
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rename from lib/librte_eal/include/rte_errno.h
rename to lib/eal/include/rte_errno.h
diff --git a/lib/librte_eal/include/rte_fbarray.h b/lib/eal/include/rte_fbarray.h
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rename from lib/librte_eal/include/rte_fbarray.h
rename to lib/eal/include/rte_fbarray.h
diff --git a/lib/librte_eal/include/rte_function_versioning.h b/lib/eal/include/rte_function_versioning.h
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rename from lib/librte_eal/include/rte_function_versioning.h
rename to lib/eal/include/rte_function_versioning.h
diff --git a/lib/librte_eal/include/rte_hexdump.h b/lib/eal/include/rte_hexdump.h
similarity index 100%
rename from lib/librte_eal/include/rte_hexdump.h
rename to lib/eal/include/rte_hexdump.h
diff --git a/lib/librte_eal/include/rte_hypervisor.h b/lib/eal/include/rte_hypervisor.h
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rename from lib/librte_eal/include/rte_hypervisor.h
rename to lib/eal/include/rte_hypervisor.h
diff --git a/lib/librte_eal/include/rte_interrupts.h b/lib/eal/include/rte_interrupts.h
similarity index 100%
rename from lib/librte_eal/include/rte_interrupts.h
rename to lib/eal/include/rte_interrupts.h
diff --git a/lib/librte_eal/include/rte_keepalive.h b/lib/eal/include/rte_keepalive.h
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rename from lib/librte_eal/include/rte_keepalive.h
rename to lib/eal/include/rte_keepalive.h
diff --git a/lib/librte_eal/include/rte_launch.h b/lib/eal/include/rte_launch.h
similarity index 100%
rename from lib/librte_eal/include/rte_launch.h
rename to lib/eal/include/rte_launch.h
diff --git a/lib/librte_eal/include/rte_lcore.h b/lib/eal/include/rte_lcore.h
similarity index 100%
rename from lib/librte_eal/include/rte_lcore.h
rename to lib/eal/include/rte_lcore.h
diff --git a/lib/librte_eal/include/rte_log.h b/lib/eal/include/rte_log.h
similarity index 100%
rename from lib/librte_eal/include/rte_log.h
rename to lib/eal/include/rte_log.h
diff --git a/lib/librte_eal/include/rte_malloc.h b/lib/eal/include/rte_malloc.h
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rename from lib/librte_eal/include/rte_malloc.h
rename to lib/eal/include/rte_malloc.h
diff --git a/lib/librte_eal/include/rte_memory.h b/lib/eal/include/rte_memory.h
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rename from lib/librte_eal/include/rte_memory.h
rename to lib/eal/include/rte_memory.h
diff --git a/lib/librte_eal/include/rte_memzone.h b/lib/eal/include/rte_memzone.h
similarity index 100%
rename from lib/librte_eal/include/rte_memzone.h
rename to lib/eal/include/rte_memzone.h
diff --git a/lib/librte_eal/include/rte_pci_dev_feature_defs.h b/lib/eal/include/rte_pci_dev_feature_defs.h
similarity index 100%
rename from lib/librte_eal/include/rte_pci_dev_feature_defs.h
rename to lib/eal/include/rte_pci_dev_feature_defs.h
diff --git a/lib/librte_eal/include/rte_pci_dev_features.h b/lib/eal/include/rte_pci_dev_features.h
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rename from lib/librte_eal/include/rte_pci_dev_features.h
rename to lib/eal/include/rte_pci_dev_features.h
diff --git a/lib/librte_eal/include/rte_per_lcore.h b/lib/eal/include/rte_per_lcore.h
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rename from lib/librte_eal/include/rte_per_lcore.h
rename to lib/eal/include/rte_per_lcore.h
diff --git a/lib/librte_eal/include/rte_random.h b/lib/eal/include/rte_random.h
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rename from lib/librte_eal/include/rte_random.h
rename to lib/eal/include/rte_random.h
diff --git a/lib/librte_eal/include/rte_reciprocal.h b/lib/eal/include/rte_reciprocal.h
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rename from lib/librte_eal/include/rte_reciprocal.h
rename to lib/eal/include/rte_reciprocal.h
diff --git a/lib/librte_eal/include/rte_service.h b/lib/eal/include/rte_service.h
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rename from lib/librte_eal/include/rte_service.h
rename to lib/eal/include/rte_service.h
diff --git a/lib/librte_eal/include/rte_service_component.h b/lib/eal/include/rte_service_component.h
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rename from lib/librte_eal/include/rte_service_component.h
rename to lib/eal/include/rte_service_component.h
diff --git a/lib/librte_eal/include/rte_string_fns.h b/lib/eal/include/rte_string_fns.h
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rename from lib/librte_eal/include/rte_string_fns.h
rename to lib/eal/include/rte_string_fns.h
diff --git a/lib/librte_eal/include/rte_tailq.h b/lib/eal/include/rte_tailq.h
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rename from lib/librte_eal/include/rte_tailq.h
rename to lib/eal/include/rte_tailq.h
diff --git a/lib/librte_eal/include/rte_test.h b/lib/eal/include/rte_test.h
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rename from lib/librte_eal/include/rte_test.h
rename to lib/eal/include/rte_test.h
diff --git a/lib/librte_eal/include/rte_thread.h b/lib/eal/include/rte_thread.h
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rename from lib/librte_eal/include/rte_thread.h
rename to lib/eal/include/rte_thread.h
diff --git a/lib/librte_eal/include/rte_time.h b/lib/eal/include/rte_time.h
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rename from lib/librte_eal/include/rte_time.h
rename to lib/eal/include/rte_time.h
diff --git a/lib/librte_eal/include/rte_trace.h b/lib/eal/include/rte_trace.h
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rename from lib/librte_eal/include/rte_trace.h
rename to lib/eal/include/rte_trace.h
diff --git a/lib/librte_eal/include/rte_trace_point.h b/lib/eal/include/rte_trace_point.h
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rename from lib/librte_eal/include/rte_trace_point.h
rename to lib/eal/include/rte_trace_point.h
diff --git a/lib/librte_eal/include/rte_trace_point_register.h b/lib/eal/include/rte_trace_point_register.h
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rename from lib/librte_eal/include/rte_trace_point_register.h
rename to lib/eal/include/rte_trace_point_register.h
diff --git a/lib/librte_eal/include/rte_uuid.h b/lib/eal/include/rte_uuid.h
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rename from lib/librte_eal/include/rte_uuid.h
rename to lib/eal/include/rte_uuid.h
diff --git a/lib/librte_eal/include/rte_version.h b/lib/eal/include/rte_version.h
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rename from lib/librte_eal/include/rte_version.h
rename to lib/eal/include/rte_version.h
diff --git a/lib/librte_eal/include/rte_vfio.h b/lib/eal/include/rte_vfio.h
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rename from lib/librte_eal/include/rte_vfio.h
rename to lib/eal/include/rte_vfio.h
diff --git a/lib/librte_eal/linux/eal.c b/lib/eal/linux/eal.c
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rename from lib/librte_eal/linux/eal.c
rename to lib/eal/linux/eal.c
diff --git a/lib/librte_eal/linux/eal_alarm.c b/lib/eal/linux/eal_alarm.c
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rename from lib/librte_eal/linux/eal_alarm.c
rename to lib/eal/linux/eal_alarm.c
diff --git a/lib/librte_eal/linux/eal_cpuflags.c b/lib/eal/linux/eal_cpuflags.c
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rename from lib/librte_eal/linux/eal_cpuflags.c
rename to lib/eal/linux/eal_cpuflags.c
diff --git a/lib/librte_eal/linux/eal_debug.c b/lib/eal/linux/eal_debug.c
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rename from lib/librte_eal/linux/eal_debug.c
rename to lib/eal/linux/eal_debug.c
diff --git a/lib/librte_eal/linux/eal_dev.c b/lib/eal/linux/eal_dev.c
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rename from lib/librte_eal/linux/eal_dev.c
rename to lib/eal/linux/eal_dev.c
diff --git a/lib/librte_eal/linux/eal_hugepage_info.c b/lib/eal/linux/eal_hugepage_info.c
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rename from lib/librte_eal/linux/eal_hugepage_info.c
rename to lib/eal/linux/eal_hugepage_info.c
diff --git a/lib/librte_eal/linux/eal_interrupts.c b/lib/eal/linux/eal_interrupts.c
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rename from lib/librte_eal/linux/eal_interrupts.c
rename to lib/eal/linux/eal_interrupts.c
diff --git a/lib/librte_eal/linux/eal_lcore.c b/lib/eal/linux/eal_lcore.c
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rename from lib/librte_eal/linux/eal_lcore.c
rename to lib/eal/linux/eal_lcore.c
diff --git a/lib/librte_eal/linux/eal_log.c b/lib/eal/linux/eal_log.c
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rename from lib/librte_eal/linux/eal_log.c
rename to lib/eal/linux/eal_log.c
diff --git a/lib/librte_eal/linux/eal_memalloc.c b/lib/eal/linux/eal_memalloc.c
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rename from lib/librte_eal/linux/eal_memalloc.c
rename to lib/eal/linux/eal_memalloc.c
diff --git a/lib/librte_eal/linux/eal_memory.c b/lib/eal/linux/eal_memory.c
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rename from lib/librte_eal/linux/eal_memory.c
rename to lib/eal/linux/eal_memory.c
diff --git a/lib/librte_eal/linux/eal_thread.c b/lib/eal/linux/eal_thread.c
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rename from lib/librte_eal/linux/eal_thread.c
rename to lib/eal/linux/eal_thread.c
diff --git a/lib/librte_eal/linux/eal_timer.c b/lib/eal/linux/eal_timer.c
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rename from lib/librte_eal/linux/eal_timer.c
rename to lib/eal/linux/eal_timer.c
diff --git a/lib/librte_eal/linux/eal_vfio.c b/lib/eal/linux/eal_vfio.c
similarity index 100%
rename from lib/librte_eal/linux/eal_vfio.c
rename to lib/eal/linux/eal_vfio.c
diff --git a/lib/librte_eal/linux/eal_vfio.h b/lib/eal/linux/eal_vfio.h
similarity index 100%
rename from lib/librte_eal/linux/eal_vfio.h
rename to lib/eal/linux/eal_vfio.h
diff --git a/lib/librte_eal/linux/eal_vfio_mp_sync.c b/lib/eal/linux/eal_vfio_mp_sync.c
similarity index 100%
rename from lib/librte_eal/linux/eal_vfio_mp_sync.c
rename to lib/eal/linux/eal_vfio_mp_sync.c
diff --git a/lib/librte_eal/linux/include/meson.build b/lib/eal/linux/include/meson.build
similarity index 100%
rename from lib/librte_eal/linux/include/meson.build
rename to lib/eal/linux/include/meson.build
diff --git a/lib/librte_eal/linux/include/rte_os.h b/lib/eal/linux/include/rte_os.h
similarity index 100%
rename from lib/librte_eal/linux/include/rte_os.h
rename to lib/eal/linux/include/rte_os.h
diff --git a/lib/librte_eal/linux/include/rte_os_shim.h b/lib/eal/linux/include/rte_os_shim.h
similarity index 100%
rename from lib/librte_eal/linux/include/rte_os_shim.h
rename to lib/eal/linux/include/rte_os_shim.h
diff --git a/lib/librte_eal/linux/meson.build b/lib/eal/linux/meson.build
similarity index 100%
rename from lib/librte_eal/linux/meson.build
rename to lib/eal/linux/meson.build
diff --git a/lib/librte_eal/meson.build b/lib/eal/meson.build
similarity index 100%
rename from lib/librte_eal/meson.build
rename to lib/eal/meson.build
diff --git a/lib/librte_eal/ppc/include/meson.build b/lib/eal/ppc/include/meson.build
similarity index 100%
rename from lib/librte_eal/ppc/include/meson.build
rename to lib/eal/ppc/include/meson.build
diff --git a/lib/librte_eal/ppc/include/rte_altivec.h b/lib/eal/ppc/include/rte_altivec.h
similarity index 100%
rename from lib/librte_eal/ppc/include/rte_altivec.h
rename to lib/eal/ppc/include/rte_altivec.h
diff --git a/lib/librte_eal/ppc/include/rte_atomic.h b/lib/eal/ppc/include/rte_atomic.h
similarity index 100%
rename from lib/librte_eal/ppc/include/rte_atomic.h
rename to lib/eal/ppc/include/rte_atomic.h
diff --git a/lib/librte_eal/ppc/include/rte_byteorder.h b/lib/eal/ppc/include/rte_byteorder.h
similarity index 100%
rename from lib/librte_eal/ppc/include/rte_byteorder.h
rename to lib/eal/ppc/include/rte_byteorder.h
diff --git a/lib/librte_eal/ppc/include/rte_cpuflags.h b/lib/eal/ppc/include/rte_cpuflags.h
similarity index 100%
rename from lib/librte_eal/ppc/include/rte_cpuflags.h
rename to lib/eal/ppc/include/rte_cpuflags.h
diff --git a/lib/librte_eal/ppc/include/rte_cycles.h b/lib/eal/ppc/include/rte_cycles.h
similarity index 100%
rename from lib/librte_eal/ppc/include/rte_cycles.h
rename to lib/eal/ppc/include/rte_cycles.h
diff --git a/lib/librte_eal/ppc/include/rte_io.h b/lib/eal/ppc/include/rte_io.h
similarity index 100%
rename from lib/librte_eal/ppc/include/rte_io.h
rename to lib/eal/ppc/include/rte_io.h
diff --git a/lib/librte_eal/ppc/include/rte_mcslock.h b/lib/eal/ppc/include/rte_mcslock.h
similarity index 100%
rename from lib/librte_eal/ppc/include/rte_mcslock.h
rename to lib/eal/ppc/include/rte_mcslock.h
diff --git a/lib/librte_eal/ppc/include/rte_memcpy.h b/lib/eal/ppc/include/rte_memcpy.h
similarity index 100%
rename from lib/librte_eal/ppc/include/rte_memcpy.h
rename to lib/eal/ppc/include/rte_memcpy.h
diff --git a/lib/librte_eal/ppc/include/rte_pause.h b/lib/eal/ppc/include/rte_pause.h
similarity index 100%
rename from lib/librte_eal/ppc/include/rte_pause.h
rename to lib/eal/ppc/include/rte_pause.h
diff --git a/lib/librte_eal/ppc/include/rte_pflock.h b/lib/eal/ppc/include/rte_pflock.h
similarity index 100%
rename from lib/librte_eal/ppc/include/rte_pflock.h
rename to lib/eal/ppc/include/rte_pflock.h
diff --git a/lib/librte_eal/ppc/include/rte_power_intrinsics.h b/lib/eal/ppc/include/rte_power_intrinsics.h
similarity index 100%
rename from lib/librte_eal/ppc/include/rte_power_intrinsics.h
rename to lib/eal/ppc/include/rte_power_intrinsics.h
diff --git a/lib/librte_eal/ppc/include/rte_prefetch.h b/lib/eal/ppc/include/rte_prefetch.h
similarity index 100%
rename from lib/librte_eal/ppc/include/rte_prefetch.h
rename to lib/eal/ppc/include/rte_prefetch.h
diff --git a/lib/librte_eal/ppc/include/rte_rwlock.h b/lib/eal/ppc/include/rte_rwlock.h
similarity index 100%
rename from lib/librte_eal/ppc/include/rte_rwlock.h
rename to lib/eal/ppc/include/rte_rwlock.h
diff --git a/lib/librte_eal/ppc/include/rte_spinlock.h b/lib/eal/ppc/include/rte_spinlock.h
similarity index 100%
rename from lib/librte_eal/ppc/include/rte_spinlock.h
rename to lib/eal/ppc/include/rte_spinlock.h
diff --git a/lib/librte_eal/ppc/include/rte_ticketlock.h b/lib/eal/ppc/include/rte_ticketlock.h
similarity index 100%
rename from lib/librte_eal/ppc/include/rte_ticketlock.h
rename to lib/eal/ppc/include/rte_ticketlock.h
diff --git a/lib/librte_eal/ppc/include/rte_vect.h b/lib/eal/ppc/include/rte_vect.h
similarity index 100%
rename from lib/librte_eal/ppc/include/rte_vect.h
rename to lib/eal/ppc/include/rte_vect.h
diff --git a/lib/librte_eal/ppc/meson.build b/lib/eal/ppc/meson.build
similarity index 100%
rename from lib/librte_eal/ppc/meson.build
rename to lib/eal/ppc/meson.build
diff --git a/lib/librte_eal/ppc/rte_cpuflags.c b/lib/eal/ppc/rte_cpuflags.c
similarity index 100%
rename from lib/librte_eal/ppc/rte_cpuflags.c
rename to lib/eal/ppc/rte_cpuflags.c
diff --git a/lib/librte_eal/ppc/rte_cycles.c b/lib/eal/ppc/rte_cycles.c
similarity index 100%
rename from lib/librte_eal/ppc/rte_cycles.c
rename to lib/eal/ppc/rte_cycles.c
diff --git a/lib/librte_eal/ppc/rte_hypervisor.c b/lib/eal/ppc/rte_hypervisor.c
similarity index 100%
rename from lib/librte_eal/ppc/rte_hypervisor.c
rename to lib/eal/ppc/rte_hypervisor.c
diff --git a/lib/librte_eal/ppc/rte_power_intrinsics.c b/lib/eal/ppc/rte_power_intrinsics.c
similarity index 100%
rename from lib/librte_eal/ppc/rte_power_intrinsics.c
rename to lib/eal/ppc/rte_power_intrinsics.c
diff --git a/lib/librte_eal/unix/eal_file.c b/lib/eal/unix/eal_file.c
similarity index 100%
rename from lib/librte_eal/unix/eal_file.c
rename to lib/eal/unix/eal_file.c
diff --git a/lib/librte_eal/unix/eal_unix_memory.c b/lib/eal/unix/eal_unix_memory.c
similarity index 100%
rename from lib/librte_eal/unix/eal_unix_memory.c
rename to lib/eal/unix/eal_unix_memory.c
diff --git a/lib/librte_eal/unix/eal_unix_timer.c b/lib/eal/unix/eal_unix_timer.c
similarity index 100%
rename from lib/librte_eal/unix/eal_unix_timer.c
rename to lib/eal/unix/eal_unix_timer.c
diff --git a/lib/librte_eal/unix/meson.build b/lib/eal/unix/meson.build
similarity index 100%
rename from lib/librte_eal/unix/meson.build
rename to lib/eal/unix/meson.build
diff --git a/lib/librte_eal/unix/rte_thread.c b/lib/eal/unix/rte_thread.c
similarity index 100%
rename from lib/librte_eal/unix/rte_thread.c
rename to lib/eal/unix/rte_thread.c
diff --git a/lib/librte_eal/version.map b/lib/eal/version.map
similarity index 100%
rename from lib/librte_eal/version.map
rename to lib/eal/version.map
diff --git a/lib/librte_eal/windows/eal.c b/lib/eal/windows/eal.c
similarity index 100%
rename from lib/librte_eal/windows/eal.c
rename to lib/eal/windows/eal.c
diff --git a/lib/librte_eal/windows/eal_alarm.c b/lib/eal/windows/eal_alarm.c
similarity index 100%
rename from lib/librte_eal/windows/eal_alarm.c
rename to lib/eal/windows/eal_alarm.c
diff --git a/lib/librte_eal/windows/eal_debug.c b/lib/eal/windows/eal_debug.c
similarity index 100%
rename from lib/librte_eal/windows/eal_debug.c
rename to lib/eal/windows/eal_debug.c
diff --git a/lib/librte_eal/windows/eal_file.c b/lib/eal/windows/eal_file.c
similarity index 100%
rename from lib/librte_eal/windows/eal_file.c
rename to lib/eal/windows/eal_file.c
diff --git a/lib/librte_eal/windows/eal_hugepages.c b/lib/eal/windows/eal_hugepages.c
similarity index 100%
rename from lib/librte_eal/windows/eal_hugepages.c
rename to lib/eal/windows/eal_hugepages.c
diff --git a/lib/librte_eal/windows/eal_interrupts.c b/lib/eal/windows/eal_interrupts.c
similarity index 100%
rename from lib/librte_eal/windows/eal_interrupts.c
rename to lib/eal/windows/eal_interrupts.c
diff --git a/lib/librte_eal/windows/eal_lcore.c b/lib/eal/windows/eal_lcore.c
similarity index 100%
rename from lib/librte_eal/windows/eal_lcore.c
rename to lib/eal/windows/eal_lcore.c
diff --git a/lib/librte_eal/windows/eal_log.c b/lib/eal/windows/eal_log.c
similarity index 100%
rename from lib/librte_eal/windows/eal_log.c
rename to lib/eal/windows/eal_log.c
diff --git a/lib/librte_eal/windows/eal_memalloc.c b/lib/eal/windows/eal_memalloc.c
similarity index 100%
rename from lib/librte_eal/windows/eal_memalloc.c
rename to lib/eal/windows/eal_memalloc.c
diff --git a/lib/librte_eal/windows/eal_memory.c b/lib/eal/windows/eal_memory.c
similarity index 100%
rename from lib/librte_eal/windows/eal_memory.c
rename to lib/eal/windows/eal_memory.c
diff --git a/lib/librte_eal/windows/eal_mp.c b/lib/eal/windows/eal_mp.c
similarity index 100%
rename from lib/librte_eal/windows/eal_mp.c
rename to lib/eal/windows/eal_mp.c
diff --git a/lib/librte_eal/windows/eal_thread.c b/lib/eal/windows/eal_thread.c
similarity index 100%
rename from lib/librte_eal/windows/eal_thread.c
rename to lib/eal/windows/eal_thread.c
diff --git a/lib/librte_eal/windows/eal_timer.c b/lib/eal/windows/eal_timer.c
similarity index 100%
rename from lib/librte_eal/windows/eal_timer.c
rename to lib/eal/windows/eal_timer.c
diff --git a/lib/librte_eal/windows/eal_windows.h b/lib/eal/windows/eal_windows.h
similarity index 100%
rename from lib/librte_eal/windows/eal_windows.h
rename to lib/eal/windows/eal_windows.h
diff --git a/lib/librte_eal/windows/fnmatch.c b/lib/eal/windows/fnmatch.c
similarity index 100%
rename from lib/librte_eal/windows/fnmatch.c
rename to lib/eal/windows/fnmatch.c
diff --git a/lib/librte_eal/windows/getopt.c b/lib/eal/windows/getopt.c
similarity index 100%
rename from lib/librte_eal/windows/getopt.c
rename to lib/eal/windows/getopt.c
diff --git a/lib/librte_eal/windows/include/dirent.h b/lib/eal/windows/include/dirent.h
similarity index 100%
rename from lib/librte_eal/windows/include/dirent.h
rename to lib/eal/windows/include/dirent.h
diff --git a/lib/librte_eal/windows/include/fnmatch.h b/lib/eal/windows/include/fnmatch.h
similarity index 100%
rename from lib/librte_eal/windows/include/fnmatch.h
rename to lib/eal/windows/include/fnmatch.h
diff --git a/lib/librte_eal/windows/include/getopt.h b/lib/eal/windows/include/getopt.h
similarity index 100%
rename from lib/librte_eal/windows/include/getopt.h
rename to lib/eal/windows/include/getopt.h
diff --git a/lib/librte_eal/windows/include/meson.build b/lib/eal/windows/include/meson.build
similarity index 100%
rename from lib/librte_eal/windows/include/meson.build
rename to lib/eal/windows/include/meson.build
diff --git a/lib/librte_eal/windows/include/pthread.h b/lib/eal/windows/include/pthread.h
similarity index 100%
rename from lib/librte_eal/windows/include/pthread.h
rename to lib/eal/windows/include/pthread.h
diff --git a/lib/librte_eal/windows/include/regex.h b/lib/eal/windows/include/regex.h
similarity index 100%
rename from lib/librte_eal/windows/include/regex.h
rename to lib/eal/windows/include/regex.h
diff --git a/lib/librte_eal/windows/include/rte_os.h b/lib/eal/windows/include/rte_os.h
similarity index 100%
rename from lib/librte_eal/windows/include/rte_os.h
rename to lib/eal/windows/include/rte_os.h
diff --git a/lib/librte_eal/windows/include/rte_os_shim.h b/lib/eal/windows/include/rte_os_shim.h
similarity index 100%
rename from lib/librte_eal/windows/include/rte_os_shim.h
rename to lib/eal/windows/include/rte_os_shim.h
diff --git a/lib/librte_eal/windows/include/rte_virt2phys.h b/lib/eal/windows/include/rte_virt2phys.h
similarity index 100%
rename from lib/librte_eal/windows/include/rte_virt2phys.h
rename to lib/eal/windows/include/rte_virt2phys.h
diff --git a/lib/librte_eal/windows/include/rte_windows.h b/lib/eal/windows/include/rte_windows.h
similarity index 100%
rename from lib/librte_eal/windows/include/rte_windows.h
rename to lib/eal/windows/include/rte_windows.h
diff --git a/lib/librte_eal/windows/include/sched.h b/lib/eal/windows/include/sched.h
similarity index 100%
rename from lib/librte_eal/windows/include/sched.h
rename to lib/eal/windows/include/sched.h
diff --git a/lib/librte_eal/windows/include/sys/queue.h b/lib/eal/windows/include/sys/queue.h
similarity index 100%
rename from lib/librte_eal/windows/include/sys/queue.h
rename to lib/eal/windows/include/sys/queue.h
diff --git a/lib/librte_eal/windows/include/unistd.h b/lib/eal/windows/include/unistd.h
similarity index 100%
rename from lib/librte_eal/windows/include/unistd.h
rename to lib/eal/windows/include/unistd.h
diff --git a/lib/librte_eal/windows/meson.build b/lib/eal/windows/meson.build
similarity index 100%
rename from lib/librte_eal/windows/meson.build
rename to lib/eal/windows/meson.build
diff --git a/lib/librte_eal/windows/rte_thread.c b/lib/eal/windows/rte_thread.c
similarity index 100%
rename from lib/librte_eal/windows/rte_thread.c
rename to lib/eal/windows/rte_thread.c
diff --git a/lib/librte_eal/x86/include/meson.build b/lib/eal/x86/include/meson.build
similarity index 100%
rename from lib/librte_eal/x86/include/meson.build
rename to lib/eal/x86/include/meson.build
diff --git a/lib/librte_eal/x86/include/rte_atomic.h b/lib/eal/x86/include/rte_atomic.h
similarity index 100%
rename from lib/librte_eal/x86/include/rte_atomic.h
rename to lib/eal/x86/include/rte_atomic.h
diff --git a/lib/librte_eal/x86/include/rte_atomic_32.h b/lib/eal/x86/include/rte_atomic_32.h
similarity index 100%
rename from lib/librte_eal/x86/include/rte_atomic_32.h
rename to lib/eal/x86/include/rte_atomic_32.h
diff --git a/lib/librte_eal/x86/include/rte_atomic_64.h b/lib/eal/x86/include/rte_atomic_64.h
similarity index 100%
rename from lib/librte_eal/x86/include/rte_atomic_64.h
rename to lib/eal/x86/include/rte_atomic_64.h
diff --git a/lib/librte_eal/x86/include/rte_byteorder.h b/lib/eal/x86/include/rte_byteorder.h
similarity index 100%
rename from lib/librte_eal/x86/include/rte_byteorder.h
rename to lib/eal/x86/include/rte_byteorder.h
diff --git a/lib/librte_eal/x86/include/rte_byteorder_32.h b/lib/eal/x86/include/rte_byteorder_32.h
similarity index 100%
rename from lib/librte_eal/x86/include/rte_byteorder_32.h
rename to lib/eal/x86/include/rte_byteorder_32.h
diff --git a/lib/librte_eal/x86/include/rte_byteorder_64.h b/lib/eal/x86/include/rte_byteorder_64.h
similarity index 100%
rename from lib/librte_eal/x86/include/rte_byteorder_64.h
rename to lib/eal/x86/include/rte_byteorder_64.h
diff --git a/lib/librte_eal/x86/include/rte_cpuflags.h b/lib/eal/x86/include/rte_cpuflags.h
similarity index 100%
rename from lib/librte_eal/x86/include/rte_cpuflags.h
rename to lib/eal/x86/include/rte_cpuflags.h
diff --git a/lib/librte_eal/x86/include/rte_cycles.h b/lib/eal/x86/include/rte_cycles.h
similarity index 100%
rename from lib/librte_eal/x86/include/rte_cycles.h
rename to lib/eal/x86/include/rte_cycles.h
diff --git a/lib/librte_eal/x86/include/rte_io.h b/lib/eal/x86/include/rte_io.h
similarity index 100%
rename from lib/librte_eal/x86/include/rte_io.h
rename to lib/eal/x86/include/rte_io.h
diff --git a/lib/librte_eal/x86/include/rte_mcslock.h b/lib/eal/x86/include/rte_mcslock.h
similarity index 100%
rename from lib/librte_eal/x86/include/rte_mcslock.h
rename to lib/eal/x86/include/rte_mcslock.h
diff --git a/lib/librte_eal/x86/include/rte_memcpy.h b/lib/eal/x86/include/rte_memcpy.h
similarity index 100%
rename from lib/librte_eal/x86/include/rte_memcpy.h
rename to lib/eal/x86/include/rte_memcpy.h
diff --git a/lib/librte_eal/x86/include/rte_pause.h b/lib/eal/x86/include/rte_pause.h
similarity index 100%
rename from lib/librte_eal/x86/include/rte_pause.h
rename to lib/eal/x86/include/rte_pause.h
diff --git a/lib/librte_eal/x86/include/rte_pflock.h b/lib/eal/x86/include/rte_pflock.h
similarity index 100%
rename from lib/librte_eal/x86/include/rte_pflock.h
rename to lib/eal/x86/include/rte_pflock.h
diff --git a/lib/librte_eal/x86/include/rte_power_intrinsics.h b/lib/eal/x86/include/rte_power_intrinsics.h
similarity index 100%
rename from lib/librte_eal/x86/include/rte_power_intrinsics.h
rename to lib/eal/x86/include/rte_power_intrinsics.h
diff --git a/lib/librte_eal/x86/include/rte_prefetch.h b/lib/eal/x86/include/rte_prefetch.h
similarity index 100%
rename from lib/librte_eal/x86/include/rte_prefetch.h
rename to lib/eal/x86/include/rte_prefetch.h
diff --git a/lib/librte_eal/x86/include/rte_rtm.h b/lib/eal/x86/include/rte_rtm.h
similarity index 100%
rename from lib/librte_eal/x86/include/rte_rtm.h
rename to lib/eal/x86/include/rte_rtm.h
diff --git a/lib/librte_eal/x86/include/rte_rwlock.h b/lib/eal/x86/include/rte_rwlock.h
similarity index 100%
rename from lib/librte_eal/x86/include/rte_rwlock.h
rename to lib/eal/x86/include/rte_rwlock.h
diff --git a/lib/librte_eal/x86/include/rte_spinlock.h b/lib/eal/x86/include/rte_spinlock.h
similarity index 100%
rename from lib/librte_eal/x86/include/rte_spinlock.h
rename to lib/eal/x86/include/rte_spinlock.h
diff --git a/lib/librte_eal/x86/include/rte_ticketlock.h b/lib/eal/x86/include/rte_ticketlock.h
similarity index 100%
rename from lib/librte_eal/x86/include/rte_ticketlock.h
rename to lib/eal/x86/include/rte_ticketlock.h
diff --git a/lib/librte_eal/x86/include/rte_vect.h b/lib/eal/x86/include/rte_vect.h
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diff --git a/lib/librte_eventdev/rte_event_timer_adapter.c b/lib/eventdev/rte_event_timer_adapter.c
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diff --git a/lib/librte_mbuf/version.map b/lib/mbuf/version.map
similarity index 100%
rename from lib/librte_mbuf/version.map
rename to lib/mbuf/version.map
diff --git a/lib/librte_member/meson.build b/lib/member/meson.build
similarity index 100%
rename from lib/librte_member/meson.build
rename to lib/member/meson.build
diff --git a/lib/librte_member/rte_member.c b/lib/member/rte_member.c
similarity index 100%
rename from lib/librte_member/rte_member.c
rename to lib/member/rte_member.c
diff --git a/lib/librte_member/rte_member.h b/lib/member/rte_member.h
similarity index 100%
rename from lib/librte_member/rte_member.h
rename to lib/member/rte_member.h
diff --git a/lib/librte_member/rte_member_ht.c b/lib/member/rte_member_ht.c
similarity index 100%
rename from lib/librte_member/rte_member_ht.c
rename to lib/member/rte_member_ht.c
diff --git a/lib/librte_member/rte_member_ht.h b/lib/member/rte_member_ht.h
similarity index 100%
rename from lib/librte_member/rte_member_ht.h
rename to lib/member/rte_member_ht.h
diff --git a/lib/librte_member/rte_member_vbf.c b/lib/member/rte_member_vbf.c
similarity index 100%
rename from lib/librte_member/rte_member_vbf.c
rename to lib/member/rte_member_vbf.c
diff --git a/lib/librte_member/rte_member_vbf.h b/lib/member/rte_member_vbf.h
similarity index 100%
rename from lib/librte_member/rte_member_vbf.h
rename to lib/member/rte_member_vbf.h
diff --git a/lib/librte_member/rte_member_x86.h b/lib/member/rte_member_x86.h
similarity index 100%
rename from lib/librte_member/rte_member_x86.h
rename to lib/member/rte_member_x86.h
diff --git a/lib/librte_member/version.map b/lib/member/version.map
similarity index 100%
rename from lib/librte_member/version.map
rename to lib/member/version.map
diff --git a/lib/librte_mempool/mempool_trace_points.c b/lib/mempool/mempool_trace_points.c
similarity index 100%
rename from lib/librte_mempool/mempool_trace_points.c
rename to lib/mempool/mempool_trace_points.c
diff --git a/lib/librte_mempool/meson.build b/lib/mempool/meson.build
similarity index 100%
rename from lib/librte_mempool/meson.build
rename to lib/mempool/meson.build
diff --git a/lib/librte_mempool/rte_mempool.c b/lib/mempool/rte_mempool.c
similarity index 100%
rename from lib/librte_mempool/rte_mempool.c
rename to lib/mempool/rte_mempool.c
diff --git a/lib/librte_mempool/rte_mempool.h b/lib/mempool/rte_mempool.h
similarity index 100%
rename from lib/librte_mempool/rte_mempool.h
rename to lib/mempool/rte_mempool.h
diff --git a/lib/librte_mempool/rte_mempool_ops.c b/lib/mempool/rte_mempool_ops.c
similarity index 100%
rename from lib/librte_mempool/rte_mempool_ops.c
rename to lib/mempool/rte_mempool_ops.c
diff --git a/lib/librte_mempool/rte_mempool_ops_default.c b/lib/mempool/rte_mempool_ops_default.c
similarity index 100%
rename from lib/librte_mempool/rte_mempool_ops_default.c
rename to lib/mempool/rte_mempool_ops_default.c
diff --git a/lib/librte_mempool/rte_mempool_trace.h b/lib/mempool/rte_mempool_trace.h
similarity index 100%
rename from lib/librte_mempool/rte_mempool_trace.h
rename to lib/mempool/rte_mempool_trace.h
diff --git a/lib/librte_mempool/rte_mempool_trace_fp.h b/lib/mempool/rte_mempool_trace_fp.h
similarity index 100%
rename from lib/librte_mempool/rte_mempool_trace_fp.h
rename to lib/mempool/rte_mempool_trace_fp.h
diff --git a/lib/librte_mempool/version.map b/lib/mempool/version.map
similarity index 100%
rename from lib/librte_mempool/version.map
rename to lib/mempool/version.map
diff --git a/lib/meson.build b/lib/meson.build
index 9b99aa0be..3a9a6c3be 100644
--- a/lib/meson.build
+++ b/lib/meson.build
@@ -114,8 +114,10 @@ foreach l:libraries
deps += ['eal']
endif
- dir_name = 'librte_' + l
- subdir(dir_name)
+ subdir(l)
+ if name != l
+ warning('Library name, "@0@", and directory name, "@1@", do not match'.format(name, l))
+ endif
if not build
dpdk_libs_disabled += name
@@ -128,7 +130,7 @@ foreach l:libraries
foreach d:deps
if not is_variable('shared_rte_' + d)
error('Missing internal dependency "@0@" for @1@ [@2@]'
- .format(d, name, 'lib/' + dir_name))
+ .format(d, name, 'lib/' + l))
endif
shared_deps += [get_variable('shared_rte_' + d)]
static_deps += [get_variable('static_rte_' + d)]
@@ -144,7 +146,7 @@ foreach l:libraries
dpdk_chkinc_headers += headers
libname = 'rte_' + name
- includes += include_directories(dir_name)
+ includes += include_directories(l)
if is_windows and use_function_versioning
message('@0@: Function versioning is not supported by Windows.'.format(name))
@@ -176,8 +178,8 @@ foreach l:libraries
cflags += '-DRTE_BUILD_SHARED_LIB'
endif
version_map = '@0@/@1@/version.map'.format(
- meson.current_source_dir(), dir_name)
- implib = dir_name + '.dll.a'
+ meson.current_source_dir(), l)
+ implib = 'librte_' + l + '.dll.a'
def_file = custom_target(libname + '_def',
command: [map_to_win_cmd, '@INPUT@', '@OUTPUT@'],
@@ -236,6 +238,6 @@ foreach l:libraries
set_variable('shared_rte_' + name, shared_dep)
set_variable('static_rte_' + name, static_dep)
if developer_mode
- message('lib/@0@: Defining dependency "@1@"'.format(dir_name, name))
+ message('lib/@0@: Defining dependency "@1@"'.format(l, name))
endif
endforeach
diff --git a/lib/librte_meter/meson.build b/lib/meter/meson.build
similarity index 100%
rename from lib/librte_meter/meson.build
rename to lib/meter/meson.build
diff --git a/lib/librte_meter/rte_meter.c b/lib/meter/rte_meter.c
similarity index 100%
rename from lib/librte_meter/rte_meter.c
rename to lib/meter/rte_meter.c
diff --git a/lib/librte_meter/rte_meter.h b/lib/meter/rte_meter.h
similarity index 100%
rename from lib/librte_meter/rte_meter.h
rename to lib/meter/rte_meter.h
diff --git a/lib/librte_meter/version.map b/lib/meter/version.map
similarity index 100%
rename from lib/librte_meter/version.map
rename to lib/meter/version.map
diff --git a/lib/librte_metrics/meson.build b/lib/metrics/meson.build
similarity index 100%
rename from lib/librte_metrics/meson.build
rename to lib/metrics/meson.build
diff --git a/lib/librte_metrics/rte_metrics.c b/lib/metrics/rte_metrics.c
similarity index 100%
rename from lib/librte_metrics/rte_metrics.c
rename to lib/metrics/rte_metrics.c
diff --git a/lib/librte_metrics/rte_metrics.h b/lib/metrics/rte_metrics.h
similarity index 100%
rename from lib/librte_metrics/rte_metrics.h
rename to lib/metrics/rte_metrics.h
diff --git a/lib/librte_metrics/rte_metrics_telemetry.c b/lib/metrics/rte_metrics_telemetry.c
similarity index 100%
rename from lib/librte_metrics/rte_metrics_telemetry.c
rename to lib/metrics/rte_metrics_telemetry.c
diff --git a/lib/librte_metrics/rte_metrics_telemetry.h b/lib/metrics/rte_metrics_telemetry.h
similarity index 100%
rename from lib/librte_metrics/rte_metrics_telemetry.h
rename to lib/metrics/rte_metrics_telemetry.h
diff --git a/lib/librte_metrics/version.map b/lib/metrics/version.map
similarity index 100%
rename from lib/librte_metrics/version.map
rename to lib/metrics/version.map
diff --git a/lib/librte_net/meson.build b/lib/net/meson.build
similarity index 100%
rename from lib/librte_net/meson.build
rename to lib/net/meson.build
diff --git a/lib/librte_net/net_crc.h b/lib/net/net_crc.h
similarity index 100%
rename from lib/librte_net/net_crc.h
rename to lib/net/net_crc.h
diff --git a/lib/librte_net/net_crc_avx512.c b/lib/net/net_crc_avx512.c
similarity index 100%
rename from lib/librte_net/net_crc_avx512.c
rename to lib/net/net_crc_avx512.c
diff --git a/lib/librte_net/net_crc_neon.c b/lib/net/net_crc_neon.c
similarity index 100%
rename from lib/librte_net/net_crc_neon.c
rename to lib/net/net_crc_neon.c
diff --git a/lib/librte_net/net_crc_sse.c b/lib/net/net_crc_sse.c
similarity index 100%
rename from lib/librte_net/net_crc_sse.c
rename to lib/net/net_crc_sse.c
diff --git a/lib/librte_net/rte_arp.c b/lib/net/rte_arp.c
similarity index 100%
rename from lib/librte_net/rte_arp.c
rename to lib/net/rte_arp.c
diff --git a/lib/librte_net/rte_arp.h b/lib/net/rte_arp.h
similarity index 100%
rename from lib/librte_net/rte_arp.h
rename to lib/net/rte_arp.h
diff --git a/lib/librte_net/rte_ecpri.h b/lib/net/rte_ecpri.h
similarity index 100%
rename from lib/librte_net/rte_ecpri.h
rename to lib/net/rte_ecpri.h
diff --git a/lib/librte_net/rte_esp.h b/lib/net/rte_esp.h
similarity index 100%
rename from lib/librte_net/rte_esp.h
rename to lib/net/rte_esp.h
diff --git a/lib/librte_net/rte_ether.c b/lib/net/rte_ether.c
similarity index 100%
rename from lib/librte_net/rte_ether.c
rename to lib/net/rte_ether.c
diff --git a/lib/librte_net/rte_ether.h b/lib/net/rte_ether.h
similarity index 100%
rename from lib/librte_net/rte_ether.h
rename to lib/net/rte_ether.h
diff --git a/lib/librte_net/rte_geneve.h b/lib/net/rte_geneve.h
similarity index 100%
rename from lib/librte_net/rte_geneve.h
rename to lib/net/rte_geneve.h
diff --git a/lib/librte_net/rte_gre.h b/lib/net/rte_gre.h
similarity index 100%
rename from lib/librte_net/rte_gre.h
rename to lib/net/rte_gre.h
diff --git a/lib/librte_net/rte_gtp.h b/lib/net/rte_gtp.h
similarity index 100%
rename from lib/librte_net/rte_gtp.h
rename to lib/net/rte_gtp.h
diff --git a/lib/librte_net/rte_higig.h b/lib/net/rte_higig.h
similarity index 100%
rename from lib/librte_net/rte_higig.h
rename to lib/net/rte_higig.h
diff --git a/lib/librte_net/rte_icmp.h b/lib/net/rte_icmp.h
similarity index 100%
rename from lib/librte_net/rte_icmp.h
rename to lib/net/rte_icmp.h
diff --git a/lib/librte_net/rte_ip.h b/lib/net/rte_ip.h
similarity index 100%
rename from lib/librte_net/rte_ip.h
rename to lib/net/rte_ip.h
diff --git a/lib/librte_net/rte_mpls.h b/lib/net/rte_mpls.h
similarity index 100%
rename from lib/librte_net/rte_mpls.h
rename to lib/net/rte_mpls.h
diff --git a/lib/librte_net/rte_net.c b/lib/net/rte_net.c
similarity index 100%
rename from lib/librte_net/rte_net.c
rename to lib/net/rte_net.c
diff --git a/lib/librte_net/rte_net.h b/lib/net/rte_net.h
similarity index 100%
rename from lib/librte_net/rte_net.h
rename to lib/net/rte_net.h
diff --git a/lib/librte_net/rte_net_crc.c b/lib/net/rte_net_crc.c
similarity index 100%
rename from lib/librte_net/rte_net_crc.c
rename to lib/net/rte_net_crc.c
diff --git a/lib/librte_net/rte_net_crc.h b/lib/net/rte_net_crc.h
similarity index 100%
rename from lib/librte_net/rte_net_crc.h
rename to lib/net/rte_net_crc.h
diff --git a/lib/librte_net/rte_sctp.h b/lib/net/rte_sctp.h
similarity index 100%
rename from lib/librte_net/rte_sctp.h
rename to lib/net/rte_sctp.h
diff --git a/lib/librte_net/rte_tcp.h b/lib/net/rte_tcp.h
similarity index 100%
rename from lib/librte_net/rte_tcp.h
rename to lib/net/rte_tcp.h
diff --git a/lib/librte_net/rte_udp.h b/lib/net/rte_udp.h
similarity index 100%
rename from lib/librte_net/rte_udp.h
rename to lib/net/rte_udp.h
diff --git a/lib/librte_net/rte_vxlan.h b/lib/net/rte_vxlan.h
similarity index 100%
rename from lib/librte_net/rte_vxlan.h
rename to lib/net/rte_vxlan.h
diff --git a/lib/librte_net/version.map b/lib/net/version.map
similarity index 100%
rename from lib/librte_net/version.map
rename to lib/net/version.map
diff --git a/lib/librte_node/ethdev_ctrl.c b/lib/node/ethdev_ctrl.c
similarity index 100%
rename from lib/librte_node/ethdev_ctrl.c
rename to lib/node/ethdev_ctrl.c
diff --git a/lib/librte_node/ethdev_rx.c b/lib/node/ethdev_rx.c
similarity index 100%
rename from lib/librte_node/ethdev_rx.c
rename to lib/node/ethdev_rx.c
diff --git a/lib/librte_node/ethdev_rx_priv.h b/lib/node/ethdev_rx_priv.h
similarity index 100%
rename from lib/librte_node/ethdev_rx_priv.h
rename to lib/node/ethdev_rx_priv.h
diff --git a/lib/librte_node/ethdev_tx.c b/lib/node/ethdev_tx.c
similarity index 100%
rename from lib/librte_node/ethdev_tx.c
rename to lib/node/ethdev_tx.c
diff --git a/lib/librte_node/ethdev_tx_priv.h b/lib/node/ethdev_tx_priv.h
similarity index 100%
rename from lib/librte_node/ethdev_tx_priv.h
rename to lib/node/ethdev_tx_priv.h
diff --git a/lib/librte_node/ip4_lookup.c b/lib/node/ip4_lookup.c
similarity index 100%
rename from lib/librte_node/ip4_lookup.c
rename to lib/node/ip4_lookup.c
diff --git a/lib/librte_node/ip4_lookup_neon.h b/lib/node/ip4_lookup_neon.h
similarity index 100%
rename from lib/librte_node/ip4_lookup_neon.h
rename to lib/node/ip4_lookup_neon.h
diff --git a/lib/librte_node/ip4_lookup_sse.h b/lib/node/ip4_lookup_sse.h
similarity index 100%
rename from lib/librte_node/ip4_lookup_sse.h
rename to lib/node/ip4_lookup_sse.h
diff --git a/lib/librte_node/ip4_rewrite.c b/lib/node/ip4_rewrite.c
similarity index 100%
rename from lib/librte_node/ip4_rewrite.c
rename to lib/node/ip4_rewrite.c
diff --git a/lib/librte_node/ip4_rewrite_priv.h b/lib/node/ip4_rewrite_priv.h
similarity index 100%
rename from lib/librte_node/ip4_rewrite_priv.h
rename to lib/node/ip4_rewrite_priv.h
diff --git a/lib/librte_node/log.c b/lib/node/log.c
similarity index 100%
rename from lib/librte_node/log.c
rename to lib/node/log.c
diff --git a/lib/librte_node/meson.build b/lib/node/meson.build
similarity index 100%
rename from lib/librte_node/meson.build
rename to lib/node/meson.build
diff --git a/lib/librte_node/node_private.h b/lib/node/node_private.h
similarity index 100%
rename from lib/librte_node/node_private.h
rename to lib/node/node_private.h
diff --git a/lib/librte_node/null.c b/lib/node/null.c
similarity index 100%
rename from lib/librte_node/null.c
rename to lib/node/null.c
diff --git a/lib/librte_node/pkt_cls.c b/lib/node/pkt_cls.c
similarity index 100%
rename from lib/librte_node/pkt_cls.c
rename to lib/node/pkt_cls.c
diff --git a/lib/librte_node/pkt_cls_priv.h b/lib/node/pkt_cls_priv.h
similarity index 100%
rename from lib/librte_node/pkt_cls_priv.h
rename to lib/node/pkt_cls_priv.h
diff --git a/lib/librte_node/pkt_drop.c b/lib/node/pkt_drop.c
similarity index 100%
rename from lib/librte_node/pkt_drop.c
rename to lib/node/pkt_drop.c
diff --git a/lib/librte_node/rte_node_eth_api.h b/lib/node/rte_node_eth_api.h
similarity index 100%
rename from lib/librte_node/rte_node_eth_api.h
rename to lib/node/rte_node_eth_api.h
diff --git a/lib/librte_node/rte_node_ip4_api.h b/lib/node/rte_node_ip4_api.h
similarity index 100%
rename from lib/librte_node/rte_node_ip4_api.h
rename to lib/node/rte_node_ip4_api.h
diff --git a/lib/librte_node/version.map b/lib/node/version.map
similarity index 100%
rename from lib/librte_node/version.map
rename to lib/node/version.map
diff --git a/lib/librte_pci/meson.build b/lib/pci/meson.build
similarity index 100%
rename from lib/librte_pci/meson.build
rename to lib/pci/meson.build
diff --git a/lib/librte_pci/rte_pci.c b/lib/pci/rte_pci.c
similarity index 100%
rename from lib/librte_pci/rte_pci.c
rename to lib/pci/rte_pci.c
diff --git a/lib/librte_pci/rte_pci.h b/lib/pci/rte_pci.h
similarity index 100%
rename from lib/librte_pci/rte_pci.h
rename to lib/pci/rte_pci.h
diff --git a/lib/librte_pci/version.map b/lib/pci/version.map
similarity index 100%
rename from lib/librte_pci/version.map
rename to lib/pci/version.map
diff --git a/lib/librte_pdump/meson.build b/lib/pdump/meson.build
similarity index 100%
rename from lib/librte_pdump/meson.build
rename to lib/pdump/meson.build
diff --git a/lib/librte_pdump/rte_pdump.c b/lib/pdump/rte_pdump.c
similarity index 100%
rename from lib/librte_pdump/rte_pdump.c
rename to lib/pdump/rte_pdump.c
diff --git a/lib/librte_pdump/rte_pdump.h b/lib/pdump/rte_pdump.h
similarity index 100%
rename from lib/librte_pdump/rte_pdump.h
rename to lib/pdump/rte_pdump.h
diff --git a/lib/librte_pdump/version.map b/lib/pdump/version.map
similarity index 100%
rename from lib/librte_pdump/version.map
rename to lib/pdump/version.map
diff --git a/lib/librte_pipeline/meson.build b/lib/pipeline/meson.build
similarity index 100%
rename from lib/librte_pipeline/meson.build
rename to lib/pipeline/meson.build
diff --git a/lib/librte_pipeline/rte_pipeline.c b/lib/pipeline/rte_pipeline.c
similarity index 100%
rename from lib/librte_pipeline/rte_pipeline.c
rename to lib/pipeline/rte_pipeline.c
diff --git a/lib/librte_pipeline/rte_pipeline.h b/lib/pipeline/rte_pipeline.h
similarity index 100%
rename from lib/librte_pipeline/rte_pipeline.h
rename to lib/pipeline/rte_pipeline.h
diff --git a/lib/librte_pipeline/rte_port_in_action.c b/lib/pipeline/rte_port_in_action.c
similarity index 100%
rename from lib/librte_pipeline/rte_port_in_action.c
rename to lib/pipeline/rte_port_in_action.c
diff --git a/lib/librte_pipeline/rte_port_in_action.h b/lib/pipeline/rte_port_in_action.h
similarity index 100%
rename from lib/librte_pipeline/rte_port_in_action.h
rename to lib/pipeline/rte_port_in_action.h
diff --git a/lib/librte_pipeline/rte_swx_ctl.c b/lib/pipeline/rte_swx_ctl.c
similarity index 100%
rename from lib/librte_pipeline/rte_swx_ctl.c
rename to lib/pipeline/rte_swx_ctl.c
diff --git a/lib/librte_pipeline/rte_swx_ctl.h b/lib/pipeline/rte_swx_ctl.h
similarity index 100%
rename from lib/librte_pipeline/rte_swx_ctl.h
rename to lib/pipeline/rte_swx_ctl.h
diff --git a/lib/librte_pipeline/rte_swx_extern.h b/lib/pipeline/rte_swx_extern.h
similarity index 100%
rename from lib/librte_pipeline/rte_swx_extern.h
rename to lib/pipeline/rte_swx_extern.h
diff --git a/lib/librte_pipeline/rte_swx_pipeline.c b/lib/pipeline/rte_swx_pipeline.c
similarity index 100%
rename from lib/librte_pipeline/rte_swx_pipeline.c
rename to lib/pipeline/rte_swx_pipeline.c
diff --git a/lib/librte_pipeline/rte_swx_pipeline.h b/lib/pipeline/rte_swx_pipeline.h
similarity index 100%
rename from lib/librte_pipeline/rte_swx_pipeline.h
rename to lib/pipeline/rte_swx_pipeline.h
diff --git a/lib/librte_pipeline/rte_swx_pipeline_spec.c b/lib/pipeline/rte_swx_pipeline_spec.c
similarity index 100%
rename from lib/librte_pipeline/rte_swx_pipeline_spec.c
rename to lib/pipeline/rte_swx_pipeline_spec.c
diff --git a/lib/librte_pipeline/rte_table_action.c b/lib/pipeline/rte_table_action.c
similarity index 100%
rename from lib/librte_pipeline/rte_table_action.c
rename to lib/pipeline/rte_table_action.c
diff --git a/lib/librte_pipeline/rte_table_action.h b/lib/pipeline/rte_table_action.h
similarity index 100%
rename from lib/librte_pipeline/rte_table_action.h
rename to lib/pipeline/rte_table_action.h
diff --git a/lib/librte_pipeline/version.map b/lib/pipeline/version.map
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rename from lib/librte_pipeline/version.map
rename to lib/pipeline/version.map
diff --git a/lib/librte_port/meson.build b/lib/port/meson.build
similarity index 100%
rename from lib/librte_port/meson.build
rename to lib/port/meson.build
diff --git a/lib/librte_port/rte_port.h b/lib/port/rte_port.h
similarity index 100%
rename from lib/librte_port/rte_port.h
rename to lib/port/rte_port.h
diff --git a/lib/librte_port/rte_port_ethdev.c b/lib/port/rte_port_ethdev.c
similarity index 100%
rename from lib/librte_port/rte_port_ethdev.c
rename to lib/port/rte_port_ethdev.c
diff --git a/lib/librte_port/rte_port_ethdev.h b/lib/port/rte_port_ethdev.h
similarity index 100%
rename from lib/librte_port/rte_port_ethdev.h
rename to lib/port/rte_port_ethdev.h
diff --git a/lib/librte_port/rte_port_eventdev.c b/lib/port/rte_port_eventdev.c
similarity index 100%
rename from lib/librte_port/rte_port_eventdev.c
rename to lib/port/rte_port_eventdev.c
diff --git a/lib/librte_port/rte_port_eventdev.h b/lib/port/rte_port_eventdev.h
similarity index 100%
rename from lib/librte_port/rte_port_eventdev.h
rename to lib/port/rte_port_eventdev.h
diff --git a/lib/librte_port/rte_port_fd.c b/lib/port/rte_port_fd.c
similarity index 100%
rename from lib/librte_port/rte_port_fd.c
rename to lib/port/rte_port_fd.c
diff --git a/lib/librte_port/rte_port_fd.h b/lib/port/rte_port_fd.h
similarity index 100%
rename from lib/librte_port/rte_port_fd.h
rename to lib/port/rte_port_fd.h
diff --git a/lib/librte_port/rte_port_frag.c b/lib/port/rte_port_frag.c
similarity index 100%
rename from lib/librte_port/rte_port_frag.c
rename to lib/port/rte_port_frag.c
diff --git a/lib/librte_port/rte_port_frag.h b/lib/port/rte_port_frag.h
similarity index 100%
rename from lib/librte_port/rte_port_frag.h
rename to lib/port/rte_port_frag.h
diff --git a/lib/librte_port/rte_port_kni.c b/lib/port/rte_port_kni.c
similarity index 100%
rename from lib/librte_port/rte_port_kni.c
rename to lib/port/rte_port_kni.c
diff --git a/lib/librte_port/rte_port_kni.h b/lib/port/rte_port_kni.h
similarity index 100%
rename from lib/librte_port/rte_port_kni.h
rename to lib/port/rte_port_kni.h
diff --git a/lib/librte_port/rte_port_ras.c b/lib/port/rte_port_ras.c
similarity index 100%
rename from lib/librte_port/rte_port_ras.c
rename to lib/port/rte_port_ras.c
diff --git a/lib/librte_port/rte_port_ras.h b/lib/port/rte_port_ras.h
similarity index 100%
rename from lib/librte_port/rte_port_ras.h
rename to lib/port/rte_port_ras.h
diff --git a/lib/librte_port/rte_port_ring.c b/lib/port/rte_port_ring.c
similarity index 100%
rename from lib/librte_port/rte_port_ring.c
rename to lib/port/rte_port_ring.c
diff --git a/lib/librte_port/rte_port_ring.h b/lib/port/rte_port_ring.h
similarity index 100%
rename from lib/librte_port/rte_port_ring.h
rename to lib/port/rte_port_ring.h
diff --git a/lib/librte_port/rte_port_sched.c b/lib/port/rte_port_sched.c
similarity index 100%
rename from lib/librte_port/rte_port_sched.c
rename to lib/port/rte_port_sched.c
diff --git a/lib/librte_port/rte_port_sched.h b/lib/port/rte_port_sched.h
similarity index 100%
rename from lib/librte_port/rte_port_sched.h
rename to lib/port/rte_port_sched.h
diff --git a/lib/librte_port/rte_port_source_sink.c b/lib/port/rte_port_source_sink.c
similarity index 100%
rename from lib/librte_port/rte_port_source_sink.c
rename to lib/port/rte_port_source_sink.c
diff --git a/lib/librte_port/rte_port_source_sink.h b/lib/port/rte_port_source_sink.h
similarity index 100%
rename from lib/librte_port/rte_port_source_sink.h
rename to lib/port/rte_port_source_sink.h
diff --git a/lib/librte_port/rte_port_sym_crypto.c b/lib/port/rte_port_sym_crypto.c
similarity index 100%
rename from lib/librte_port/rte_port_sym_crypto.c
rename to lib/port/rte_port_sym_crypto.c
diff --git a/lib/librte_port/rte_port_sym_crypto.h b/lib/port/rte_port_sym_crypto.h
similarity index 100%
rename from lib/librte_port/rte_port_sym_crypto.h
rename to lib/port/rte_port_sym_crypto.h
diff --git a/lib/librte_port/rte_swx_port.h b/lib/port/rte_swx_port.h
similarity index 100%
rename from lib/librte_port/rte_swx_port.h
rename to lib/port/rte_swx_port.h
diff --git a/lib/librte_port/rte_swx_port_ethdev.c b/lib/port/rte_swx_port_ethdev.c
similarity index 100%
rename from lib/librte_port/rte_swx_port_ethdev.c
rename to lib/port/rte_swx_port_ethdev.c
diff --git a/lib/librte_port/rte_swx_port_ethdev.h b/lib/port/rte_swx_port_ethdev.h
similarity index 100%
rename from lib/librte_port/rte_swx_port_ethdev.h
rename to lib/port/rte_swx_port_ethdev.h
diff --git a/lib/librte_port/rte_swx_port_fd.c b/lib/port/rte_swx_port_fd.c
similarity index 100%
rename from lib/librte_port/rte_swx_port_fd.c
rename to lib/port/rte_swx_port_fd.c
diff --git a/lib/librte_port/rte_swx_port_fd.h b/lib/port/rte_swx_port_fd.h
similarity index 100%
rename from lib/librte_port/rte_swx_port_fd.h
rename to lib/port/rte_swx_port_fd.h
diff --git a/lib/librte_port/rte_swx_port_ring.c b/lib/port/rte_swx_port_ring.c
similarity index 100%
rename from lib/librte_port/rte_swx_port_ring.c
rename to lib/port/rte_swx_port_ring.c
diff --git a/lib/librte_port/rte_swx_port_ring.h b/lib/port/rte_swx_port_ring.h
similarity index 100%
rename from lib/librte_port/rte_swx_port_ring.h
rename to lib/port/rte_swx_port_ring.h
diff --git a/lib/librte_port/rte_swx_port_source_sink.c b/lib/port/rte_swx_port_source_sink.c
similarity index 100%
rename from lib/librte_port/rte_swx_port_source_sink.c
rename to lib/port/rte_swx_port_source_sink.c
diff --git a/lib/librte_port/rte_swx_port_source_sink.h b/lib/port/rte_swx_port_source_sink.h
similarity index 100%
rename from lib/librte_port/rte_swx_port_source_sink.h
rename to lib/port/rte_swx_port_source_sink.h
diff --git a/lib/librte_port/version.map b/lib/port/version.map
similarity index 100%
rename from lib/librte_port/version.map
rename to lib/port/version.map
diff --git a/lib/librte_power/guest_channel.c b/lib/power/guest_channel.c
similarity index 100%
rename from lib/librte_power/guest_channel.c
rename to lib/power/guest_channel.c
diff --git a/lib/librte_power/guest_channel.h b/lib/power/guest_channel.h
similarity index 100%
rename from lib/librte_power/guest_channel.h
rename to lib/power/guest_channel.h
diff --git a/lib/librte_power/meson.build b/lib/power/meson.build
similarity index 100%
rename from lib/librte_power/meson.build
rename to lib/power/meson.build
diff --git a/lib/librte_power/power_acpi_cpufreq.c b/lib/power/power_acpi_cpufreq.c
similarity index 100%
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rename to lib/power/power_acpi_cpufreq.c
diff --git a/lib/librte_power/power_acpi_cpufreq.h b/lib/power/power_acpi_cpufreq.h
similarity index 100%
rename from lib/librte_power/power_acpi_cpufreq.h
rename to lib/power/power_acpi_cpufreq.h
diff --git a/lib/librte_power/power_common.c b/lib/power/power_common.c
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rename from lib/librte_power/power_common.c
rename to lib/power/power_common.c
diff --git a/lib/librte_power/power_common.h b/lib/power/power_common.h
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rename from lib/librte_power/power_common.h
rename to lib/power/power_common.h
diff --git a/lib/librte_power/power_kvm_vm.c b/lib/power/power_kvm_vm.c
similarity index 100%
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rename to lib/power/power_kvm_vm.c
diff --git a/lib/librte_power/power_kvm_vm.h b/lib/power/power_kvm_vm.h
similarity index 100%
rename from lib/librte_power/power_kvm_vm.h
rename to lib/power/power_kvm_vm.h
diff --git a/lib/librte_power/power_pstate_cpufreq.c b/lib/power/power_pstate_cpufreq.c
similarity index 100%
rename from lib/librte_power/power_pstate_cpufreq.c
rename to lib/power/power_pstate_cpufreq.c
diff --git a/lib/librte_power/power_pstate_cpufreq.h b/lib/power/power_pstate_cpufreq.h
similarity index 100%
rename from lib/librte_power/power_pstate_cpufreq.h
rename to lib/power/power_pstate_cpufreq.h
diff --git a/lib/librte_power/rte_power.c b/lib/power/rte_power.c
similarity index 100%
rename from lib/librte_power/rte_power.c
rename to lib/power/rte_power.c
diff --git a/lib/librte_power/rte_power.h b/lib/power/rte_power.h
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rename from lib/librte_power/rte_power.h
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diff --git a/lib/librte_power/rte_power_empty_poll.c b/lib/power/rte_power_empty_poll.c
similarity index 100%
rename from lib/librte_power/rte_power_empty_poll.c
rename to lib/power/rte_power_empty_poll.c
diff --git a/lib/librte_power/rte_power_empty_poll.h b/lib/power/rte_power_empty_poll.h
similarity index 100%
rename from lib/librte_power/rte_power_empty_poll.h
rename to lib/power/rte_power_empty_poll.h
diff --git a/lib/librte_power/rte_power_guest_channel.h b/lib/power/rte_power_guest_channel.h
similarity index 100%
rename from lib/librte_power/rte_power_guest_channel.h
rename to lib/power/rte_power_guest_channel.h
diff --git a/lib/librte_power/rte_power_pmd_mgmt.c b/lib/power/rte_power_pmd_mgmt.c
similarity index 100%
rename from lib/librte_power/rte_power_pmd_mgmt.c
rename to lib/power/rte_power_pmd_mgmt.c
diff --git a/lib/librte_power/rte_power_pmd_mgmt.h b/lib/power/rte_power_pmd_mgmt.h
similarity index 100%
rename from lib/librte_power/rte_power_pmd_mgmt.h
rename to lib/power/rte_power_pmd_mgmt.h
diff --git a/lib/librte_power/version.map b/lib/power/version.map
similarity index 100%
rename from lib/librte_power/version.map
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diff --git a/lib/librte_rawdev/meson.build b/lib/rawdev/meson.build
similarity index 100%
rename from lib/librte_rawdev/meson.build
rename to lib/rawdev/meson.build
diff --git a/lib/librte_rawdev/rte_rawdev.c b/lib/rawdev/rte_rawdev.c
similarity index 100%
rename from lib/librte_rawdev/rte_rawdev.c
rename to lib/rawdev/rte_rawdev.c
diff --git a/lib/librte_rawdev/rte_rawdev.h b/lib/rawdev/rte_rawdev.h
similarity index 100%
rename from lib/librte_rawdev/rte_rawdev.h
rename to lib/rawdev/rte_rawdev.h
diff --git a/lib/librte_rawdev/rte_rawdev_pmd.h b/lib/rawdev/rte_rawdev_pmd.h
similarity index 100%
rename from lib/librte_rawdev/rte_rawdev_pmd.h
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diff --git a/lib/librte_rawdev/version.map b/lib/rawdev/version.map
similarity index 100%
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rename to lib/rawdev/version.map
diff --git a/lib/librte_rcu/meson.build b/lib/rcu/meson.build
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rename from lib/librte_rcu/meson.build
rename to lib/rcu/meson.build
diff --git a/lib/librte_rcu/rcu_qsbr_pvt.h b/lib/rcu/rcu_qsbr_pvt.h
similarity index 100%
rename from lib/librte_rcu/rcu_qsbr_pvt.h
rename to lib/rcu/rcu_qsbr_pvt.h
diff --git a/lib/librte_rcu/rte_rcu_qsbr.c b/lib/rcu/rte_rcu_qsbr.c
similarity index 100%
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rename to lib/rcu/rte_rcu_qsbr.c
diff --git a/lib/librte_rcu/rte_rcu_qsbr.h b/lib/rcu/rte_rcu_qsbr.h
similarity index 100%
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diff --git a/lib/librte_rcu/version.map b/lib/rcu/version.map
similarity index 100%
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diff --git a/lib/librte_regexdev/meson.build b/lib/regexdev/meson.build
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rename from lib/librte_regexdev/meson.build
rename to lib/regexdev/meson.build
diff --git a/lib/librte_regexdev/rte_regexdev.c b/lib/regexdev/rte_regexdev.c
similarity index 100%
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rename to lib/regexdev/rte_regexdev.c
diff --git a/lib/librte_regexdev/rte_regexdev.h b/lib/regexdev/rte_regexdev.h
similarity index 100%
rename from lib/librte_regexdev/rte_regexdev.h
rename to lib/regexdev/rte_regexdev.h
diff --git a/lib/librte_regexdev/rte_regexdev_core.h b/lib/regexdev/rte_regexdev_core.h
similarity index 100%
rename from lib/librte_regexdev/rte_regexdev_core.h
rename to lib/regexdev/rte_regexdev_core.h
diff --git a/lib/librte_regexdev/rte_regexdev_driver.h b/lib/regexdev/rte_regexdev_driver.h
similarity index 100%
rename from lib/librte_regexdev/rte_regexdev_driver.h
rename to lib/regexdev/rte_regexdev_driver.h
diff --git a/lib/librte_regexdev/version.map b/lib/regexdev/version.map
similarity index 100%
rename from lib/librte_regexdev/version.map
rename to lib/regexdev/version.map
diff --git a/lib/librte_reorder/meson.build b/lib/reorder/meson.build
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rename from lib/librte_reorder/meson.build
rename to lib/reorder/meson.build
diff --git a/lib/librte_reorder/rte_reorder.c b/lib/reorder/rte_reorder.c
similarity index 100%
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rename to lib/reorder/rte_reorder.c
diff --git a/lib/librte_reorder/rte_reorder.h b/lib/reorder/rte_reorder.h
similarity index 100%
rename from lib/librte_reorder/rte_reorder.h
rename to lib/reorder/rte_reorder.h
diff --git a/lib/librte_reorder/version.map b/lib/reorder/version.map
similarity index 100%
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diff --git a/lib/librte_rib/meson.build b/lib/rib/meson.build
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rename to lib/rib/meson.build
diff --git a/lib/librte_rib/rte_rib.c b/lib/rib/rte_rib.c
similarity index 100%
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rename to lib/rib/rte_rib.c
diff --git a/lib/librte_rib/rte_rib.h b/lib/rib/rte_rib.h
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rename from lib/librte_rib/rte_rib.h
rename to lib/rib/rte_rib.h
diff --git a/lib/librte_rib/rte_rib6.c b/lib/rib/rte_rib6.c
similarity index 100%
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diff --git a/lib/librte_rib/rte_rib6.h b/lib/rib/rte_rib6.h
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diff --git a/lib/librte_rib/version.map b/lib/rib/version.map
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diff --git a/lib/librte_ring/meson.build b/lib/ring/meson.build
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rename from lib/librte_ring/meson.build
rename to lib/ring/meson.build
diff --git a/lib/librte_ring/rte_ring.c b/lib/ring/rte_ring.c
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rename to lib/ring/rte_ring.c
diff --git a/lib/librte_ring/rte_ring.h b/lib/ring/rte_ring.h
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rename from lib/librte_ring/rte_ring.h
rename to lib/ring/rte_ring.h
diff --git a/lib/librte_ring/rte_ring_c11_pvt.h b/lib/ring/rte_ring_c11_pvt.h
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rename from lib/librte_ring/rte_ring_c11_pvt.h
rename to lib/ring/rte_ring_c11_pvt.h
diff --git a/lib/librte_ring/rte_ring_core.h b/lib/ring/rte_ring_core.h
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rename from lib/librte_ring/rte_ring_core.h
rename to lib/ring/rte_ring_core.h
diff --git a/lib/librte_ring/rte_ring_elem.h b/lib/ring/rte_ring_elem.h
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rename from lib/librte_ring/rte_ring_elem.h
rename to lib/ring/rte_ring_elem.h
diff --git a/lib/librte_ring/rte_ring_elem_pvt.h b/lib/ring/rte_ring_elem_pvt.h
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rename to lib/ring/rte_ring_elem_pvt.h
diff --git a/lib/librte_ring/rte_ring_generic_pvt.h b/lib/ring/rte_ring_generic_pvt.h
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rename from lib/librte_ring/rte_ring_generic_pvt.h
rename to lib/ring/rte_ring_generic_pvt.h
diff --git a/lib/librte_ring/rte_ring_hts.h b/lib/ring/rte_ring_hts.h
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rename from lib/librte_ring/rte_ring_hts.h
rename to lib/ring/rte_ring_hts.h
diff --git a/lib/librte_ring/rte_ring_hts_elem_pvt.h b/lib/ring/rte_ring_hts_elem_pvt.h
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rename from lib/librte_ring/rte_ring_hts_elem_pvt.h
rename to lib/ring/rte_ring_hts_elem_pvt.h
diff --git a/lib/librte_ring/rte_ring_peek.h b/lib/ring/rte_ring_peek.h
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rename from lib/librte_ring/rte_ring_peek.h
rename to lib/ring/rte_ring_peek.h
diff --git a/lib/librte_ring/rte_ring_peek_elem_pvt.h b/lib/ring/rte_ring_peek_elem_pvt.h
similarity index 100%
rename from lib/librte_ring/rte_ring_peek_elem_pvt.h
rename to lib/ring/rte_ring_peek_elem_pvt.h
diff --git a/lib/librte_ring/rte_ring_peek_zc.h b/lib/ring/rte_ring_peek_zc.h
similarity index 100%
rename from lib/librte_ring/rte_ring_peek_zc.h
rename to lib/ring/rte_ring_peek_zc.h
diff --git a/lib/librte_ring/rte_ring_rts.h b/lib/ring/rte_ring_rts.h
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rename from lib/librte_ring/rte_ring_rts.h
rename to lib/ring/rte_ring_rts.h
diff --git a/lib/librte_ring/rte_ring_rts_elem_pvt.h b/lib/ring/rte_ring_rts_elem_pvt.h
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rename from lib/librte_ring/rte_ring_rts_elem_pvt.h
rename to lib/ring/rte_ring_rts_elem_pvt.h
diff --git a/lib/librte_ring/version.map b/lib/ring/version.map
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diff --git a/lib/librte_sched/meson.build b/lib/sched/meson.build
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rename to lib/sched/meson.build
diff --git a/lib/librte_sched/rte_approx.c b/lib/sched/rte_approx.c
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diff --git a/lib/librte_sched/rte_approx.h b/lib/sched/rte_approx.h
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rename from lib/librte_sched/rte_approx.h
rename to lib/sched/rte_approx.h
diff --git a/lib/librte_sched/rte_red.c b/lib/sched/rte_red.c
similarity index 100%
rename from lib/librte_sched/rte_red.c
rename to lib/sched/rte_red.c
diff --git a/lib/librte_sched/rte_red.h b/lib/sched/rte_red.h
similarity index 100%
rename from lib/librte_sched/rte_red.h
rename to lib/sched/rte_red.h
diff --git a/lib/librte_sched/rte_sched.c b/lib/sched/rte_sched.c
similarity index 100%
rename from lib/librte_sched/rte_sched.c
rename to lib/sched/rte_sched.c
diff --git a/lib/librte_sched/rte_sched.h b/lib/sched/rte_sched.h
similarity index 100%
rename from lib/librte_sched/rte_sched.h
rename to lib/sched/rte_sched.h
diff --git a/lib/librte_sched/rte_sched_common.h b/lib/sched/rte_sched_common.h
similarity index 100%
rename from lib/librte_sched/rte_sched_common.h
rename to lib/sched/rte_sched_common.h
diff --git a/lib/librte_sched/version.map b/lib/sched/version.map
similarity index 100%
rename from lib/librte_sched/version.map
rename to lib/sched/version.map
diff --git a/lib/librte_security/meson.build b/lib/security/meson.build
similarity index 100%
rename from lib/librte_security/meson.build
rename to lib/security/meson.build
diff --git a/lib/librte_security/rte_security.c b/lib/security/rte_security.c
similarity index 100%
rename from lib/librte_security/rte_security.c
rename to lib/security/rte_security.c
diff --git a/lib/librte_security/rte_security.h b/lib/security/rte_security.h
similarity index 100%
rename from lib/librte_security/rte_security.h
rename to lib/security/rte_security.h
diff --git a/lib/librte_security/rte_security_driver.h b/lib/security/rte_security_driver.h
similarity index 100%
rename from lib/librte_security/rte_security_driver.h
rename to lib/security/rte_security_driver.h
diff --git a/lib/librte_security/version.map b/lib/security/version.map
similarity index 100%
rename from lib/librte_security/version.map
rename to lib/security/version.map
diff --git a/lib/librte_stack/meson.build b/lib/stack/meson.build
similarity index 100%
rename from lib/librte_stack/meson.build
rename to lib/stack/meson.build
diff --git a/lib/librte_stack/rte_stack.c b/lib/stack/rte_stack.c
similarity index 100%
rename from lib/librte_stack/rte_stack.c
rename to lib/stack/rte_stack.c
diff --git a/lib/librte_stack/rte_stack.h b/lib/stack/rte_stack.h
similarity index 100%
rename from lib/librte_stack/rte_stack.h
rename to lib/stack/rte_stack.h
diff --git a/lib/librte_stack/rte_stack_lf.c b/lib/stack/rte_stack_lf.c
similarity index 100%
rename from lib/librte_stack/rte_stack_lf.c
rename to lib/stack/rte_stack_lf.c
diff --git a/lib/librte_stack/rte_stack_lf.h b/lib/stack/rte_stack_lf.h
similarity index 100%
rename from lib/librte_stack/rte_stack_lf.h
rename to lib/stack/rte_stack_lf.h
diff --git a/lib/librte_stack/rte_stack_lf_c11.h b/lib/stack/rte_stack_lf_c11.h
similarity index 100%
rename from lib/librte_stack/rte_stack_lf_c11.h
rename to lib/stack/rte_stack_lf_c11.h
diff --git a/lib/librte_stack/rte_stack_lf_generic.h b/lib/stack/rte_stack_lf_generic.h
similarity index 100%
rename from lib/librte_stack/rte_stack_lf_generic.h
rename to lib/stack/rte_stack_lf_generic.h
diff --git a/lib/librte_stack/rte_stack_lf_stubs.h b/lib/stack/rte_stack_lf_stubs.h
similarity index 100%
rename from lib/librte_stack/rte_stack_lf_stubs.h
rename to lib/stack/rte_stack_lf_stubs.h
diff --git a/lib/librte_stack/rte_stack_std.c b/lib/stack/rte_stack_std.c
similarity index 100%
rename from lib/librte_stack/rte_stack_std.c
rename to lib/stack/rte_stack_std.c
diff --git a/lib/librte_stack/rte_stack_std.h b/lib/stack/rte_stack_std.h
similarity index 100%
rename from lib/librte_stack/rte_stack_std.h
rename to lib/stack/rte_stack_std.h
diff --git a/lib/librte_stack/stack_pvt.h b/lib/stack/stack_pvt.h
similarity index 100%
rename from lib/librte_stack/stack_pvt.h
rename to lib/stack/stack_pvt.h
diff --git a/lib/librte_stack/version.map b/lib/stack/version.map
similarity index 100%
rename from lib/librte_stack/version.map
rename to lib/stack/version.map
diff --git a/lib/librte_table/meson.build b/lib/table/meson.build
similarity index 100%
rename from lib/librte_table/meson.build
rename to lib/table/meson.build
diff --git a/lib/librte_table/rte_lru.h b/lib/table/rte_lru.h
similarity index 100%
rename from lib/librte_table/rte_lru.h
rename to lib/table/rte_lru.h
diff --git a/lib/librte_table/rte_lru_arm64.h b/lib/table/rte_lru_arm64.h
similarity index 100%
rename from lib/librte_table/rte_lru_arm64.h
rename to lib/table/rte_lru_arm64.h
diff --git a/lib/librte_table/rte_lru_x86.h b/lib/table/rte_lru_x86.h
similarity index 100%
rename from lib/librte_table/rte_lru_x86.h
rename to lib/table/rte_lru_x86.h
diff --git a/lib/librte_table/rte_swx_table.h b/lib/table/rte_swx_table.h
similarity index 100%
rename from lib/librte_table/rte_swx_table.h
rename to lib/table/rte_swx_table.h
diff --git a/lib/librte_table/rte_swx_table_em.c b/lib/table/rte_swx_table_em.c
similarity index 100%
rename from lib/librte_table/rte_swx_table_em.c
rename to lib/table/rte_swx_table_em.c
diff --git a/lib/librte_table/rte_swx_table_em.h b/lib/table/rte_swx_table_em.h
similarity index 100%
rename from lib/librte_table/rte_swx_table_em.h
rename to lib/table/rte_swx_table_em.h
diff --git a/lib/librte_table/rte_swx_table_wm.c b/lib/table/rte_swx_table_wm.c
similarity index 100%
rename from lib/librte_table/rte_swx_table_wm.c
rename to lib/table/rte_swx_table_wm.c
diff --git a/lib/librte_table/rte_swx_table_wm.h b/lib/table/rte_swx_table_wm.h
similarity index 100%
rename from lib/librte_table/rte_swx_table_wm.h
rename to lib/table/rte_swx_table_wm.h
diff --git a/lib/librte_table/rte_table.h b/lib/table/rte_table.h
similarity index 100%
rename from lib/librte_table/rte_table.h
rename to lib/table/rte_table.h
diff --git a/lib/librte_table/rte_table_acl.c b/lib/table/rte_table_acl.c
similarity index 100%
rename from lib/librte_table/rte_table_acl.c
rename to lib/table/rte_table_acl.c
diff --git a/lib/librte_table/rte_table_acl.h b/lib/table/rte_table_acl.h
similarity index 100%
rename from lib/librte_table/rte_table_acl.h
rename to lib/table/rte_table_acl.h
diff --git a/lib/librte_table/rte_table_array.c b/lib/table/rte_table_array.c
similarity index 100%
rename from lib/librte_table/rte_table_array.c
rename to lib/table/rte_table_array.c
diff --git a/lib/librte_table/rte_table_array.h b/lib/table/rte_table_array.h
similarity index 100%
rename from lib/librte_table/rte_table_array.h
rename to lib/table/rte_table_array.h
diff --git a/lib/librte_table/rte_table_hash.h b/lib/table/rte_table_hash.h
similarity index 100%
rename from lib/librte_table/rte_table_hash.h
rename to lib/table/rte_table_hash.h
diff --git a/lib/librte_table/rte_table_hash_cuckoo.c b/lib/table/rte_table_hash_cuckoo.c
similarity index 100%
rename from lib/librte_table/rte_table_hash_cuckoo.c
rename to lib/table/rte_table_hash_cuckoo.c
diff --git a/lib/librte_table/rte_table_hash_cuckoo.h b/lib/table/rte_table_hash_cuckoo.h
similarity index 100%
rename from lib/librte_table/rte_table_hash_cuckoo.h
rename to lib/table/rte_table_hash_cuckoo.h
diff --git a/lib/librte_table/rte_table_hash_ext.c b/lib/table/rte_table_hash_ext.c
similarity index 100%
rename from lib/librte_table/rte_table_hash_ext.c
rename to lib/table/rte_table_hash_ext.c
diff --git a/lib/librte_table/rte_table_hash_func.h b/lib/table/rte_table_hash_func.h
similarity index 100%
rename from lib/librte_table/rte_table_hash_func.h
rename to lib/table/rte_table_hash_func.h
diff --git a/lib/librte_table/rte_table_hash_func_arm64.h b/lib/table/rte_table_hash_func_arm64.h
similarity index 100%
rename from lib/librte_table/rte_table_hash_func_arm64.h
rename to lib/table/rte_table_hash_func_arm64.h
diff --git a/lib/librte_table/rte_table_hash_key16.c b/lib/table/rte_table_hash_key16.c
similarity index 100%
rename from lib/librte_table/rte_table_hash_key16.c
rename to lib/table/rte_table_hash_key16.c
diff --git a/lib/librte_table/rte_table_hash_key32.c b/lib/table/rte_table_hash_key32.c
similarity index 100%
rename from lib/librte_table/rte_table_hash_key32.c
rename to lib/table/rte_table_hash_key32.c
diff --git a/lib/librte_table/rte_table_hash_key8.c b/lib/table/rte_table_hash_key8.c
similarity index 100%
rename from lib/librte_table/rte_table_hash_key8.c
rename to lib/table/rte_table_hash_key8.c
diff --git a/lib/librte_table/rte_table_hash_lru.c b/lib/table/rte_table_hash_lru.c
similarity index 100%
rename from lib/librte_table/rte_table_hash_lru.c
rename to lib/table/rte_table_hash_lru.c
diff --git a/lib/librte_table/rte_table_lpm.c b/lib/table/rte_table_lpm.c
similarity index 100%
rename from lib/librte_table/rte_table_lpm.c
rename to lib/table/rte_table_lpm.c
diff --git a/lib/librte_table/rte_table_lpm.h b/lib/table/rte_table_lpm.h
similarity index 100%
rename from lib/librte_table/rte_table_lpm.h
rename to lib/table/rte_table_lpm.h
diff --git a/lib/librte_table/rte_table_lpm_ipv6.c b/lib/table/rte_table_lpm_ipv6.c
similarity index 100%
rename from lib/librte_table/rte_table_lpm_ipv6.c
rename to lib/table/rte_table_lpm_ipv6.c
diff --git a/lib/librte_table/rte_table_lpm_ipv6.h b/lib/table/rte_table_lpm_ipv6.h
similarity index 100%
rename from lib/librte_table/rte_table_lpm_ipv6.h
rename to lib/table/rte_table_lpm_ipv6.h
diff --git a/lib/librte_table/rte_table_stub.c b/lib/table/rte_table_stub.c
similarity index 100%
rename from lib/librte_table/rte_table_stub.c
rename to lib/table/rte_table_stub.c
diff --git a/lib/librte_table/rte_table_stub.h b/lib/table/rte_table_stub.h
similarity index 100%
rename from lib/librte_table/rte_table_stub.h
rename to lib/table/rte_table_stub.h
diff --git a/lib/librte_table/version.map b/lib/table/version.map
similarity index 100%
rename from lib/librte_table/version.map
rename to lib/table/version.map
diff --git a/lib/librte_telemetry/meson.build b/lib/telemetry/meson.build
similarity index 80%
rename from lib/librte_telemetry/meson.build
rename to lib/telemetry/meson.build
index 719973ff9..f84c9aa3b 100644
--- a/lib/librte_telemetry/meson.build
+++ b/lib/telemetry/meson.build
@@ -5,4 +5,4 @@ includes = [global_inc]
sources = files('telemetry.c', 'telemetry_data.c', 'telemetry_legacy.c')
headers = files('rte_telemetry.h')
-includes += include_directories('../librte_metrics')
+includes += include_directories('../metrics')
diff --git a/lib/librte_telemetry/rte_telemetry.h b/lib/telemetry/rte_telemetry.h
similarity index 100%
rename from lib/librte_telemetry/rte_telemetry.h
rename to lib/telemetry/rte_telemetry.h
diff --git a/lib/librte_telemetry/telemetry.c b/lib/telemetry/telemetry.c
similarity index 100%
rename from lib/librte_telemetry/telemetry.c
rename to lib/telemetry/telemetry.c
diff --git a/lib/librte_telemetry/telemetry_data.c b/lib/telemetry/telemetry_data.c
similarity index 100%
rename from lib/librte_telemetry/telemetry_data.c
rename to lib/telemetry/telemetry_data.c
diff --git a/lib/librte_telemetry/telemetry_data.h b/lib/telemetry/telemetry_data.h
similarity index 100%
rename from lib/librte_telemetry/telemetry_data.h
rename to lib/telemetry/telemetry_data.h
diff --git a/lib/librte_telemetry/telemetry_internal.h b/lib/telemetry/telemetry_internal.h
similarity index 100%
rename from lib/librte_telemetry/telemetry_internal.h
rename to lib/telemetry/telemetry_internal.h
diff --git a/lib/librte_telemetry/telemetry_json.h b/lib/telemetry/telemetry_json.h
similarity index 100%
rename from lib/librte_telemetry/telemetry_json.h
rename to lib/telemetry/telemetry_json.h
diff --git a/lib/librte_telemetry/telemetry_legacy.c b/lib/telemetry/telemetry_legacy.c
similarity index 100%
rename from lib/librte_telemetry/telemetry_legacy.c
rename to lib/telemetry/telemetry_legacy.c
diff --git a/lib/librte_telemetry/version.map b/lib/telemetry/version.map
similarity index 100%
rename from lib/librte_telemetry/version.map
rename to lib/telemetry/version.map
diff --git a/lib/librte_timer/meson.build b/lib/timer/meson.build
similarity index 100%
rename from lib/librte_timer/meson.build
rename to lib/timer/meson.build
diff --git a/lib/librte_timer/rte_timer.c b/lib/timer/rte_timer.c
similarity index 100%
rename from lib/librte_timer/rte_timer.c
rename to lib/timer/rte_timer.c
diff --git a/lib/librte_timer/rte_timer.h b/lib/timer/rte_timer.h
similarity index 100%
rename from lib/librte_timer/rte_timer.h
rename to lib/timer/rte_timer.h
diff --git a/lib/librte_timer/version.map b/lib/timer/version.map
similarity index 100%
rename from lib/librte_timer/version.map
rename to lib/timer/version.map
diff --git a/lib/librte_vhost/fd_man.c b/lib/vhost/fd_man.c
similarity index 100%
rename from lib/librte_vhost/fd_man.c
rename to lib/vhost/fd_man.c
diff --git a/lib/librte_vhost/fd_man.h b/lib/vhost/fd_man.h
similarity index 100%
rename from lib/librte_vhost/fd_man.h
rename to lib/vhost/fd_man.h
diff --git a/lib/librte_vhost/iotlb.c b/lib/vhost/iotlb.c
similarity index 100%
rename from lib/librte_vhost/iotlb.c
rename to lib/vhost/iotlb.c
diff --git a/lib/librte_vhost/iotlb.h b/lib/vhost/iotlb.h
similarity index 100%
rename from lib/librte_vhost/iotlb.h
rename to lib/vhost/iotlb.h
diff --git a/lib/librte_vhost/meson.build b/lib/vhost/meson.build
similarity index 100%
rename from lib/librte_vhost/meson.build
rename to lib/vhost/meson.build
diff --git a/lib/librte_vhost/rte_vdpa.h b/lib/vhost/rte_vdpa.h
similarity index 100%
rename from lib/librte_vhost/rte_vdpa.h
rename to lib/vhost/rte_vdpa.h
diff --git a/lib/librte_vhost/rte_vdpa_dev.h b/lib/vhost/rte_vdpa_dev.h
similarity index 100%
rename from lib/librte_vhost/rte_vdpa_dev.h
rename to lib/vhost/rte_vdpa_dev.h
diff --git a/lib/librte_vhost/rte_vhost.h b/lib/vhost/rte_vhost.h
similarity index 100%
rename from lib/librte_vhost/rte_vhost.h
rename to lib/vhost/rte_vhost.h
diff --git a/lib/librte_vhost/rte_vhost_async.h b/lib/vhost/rte_vhost_async.h
similarity index 100%
rename from lib/librte_vhost/rte_vhost_async.h
rename to lib/vhost/rte_vhost_async.h
diff --git a/lib/librte_vhost/rte_vhost_crypto.h b/lib/vhost/rte_vhost_crypto.h
similarity index 100%
rename from lib/librte_vhost/rte_vhost_crypto.h
rename to lib/vhost/rte_vhost_crypto.h
diff --git a/lib/librte_vhost/socket.c b/lib/vhost/socket.c
similarity index 100%
rename from lib/librte_vhost/socket.c
rename to lib/vhost/socket.c
diff --git a/lib/librte_vhost/vdpa.c b/lib/vhost/vdpa.c
similarity index 100%
rename from lib/librte_vhost/vdpa.c
rename to lib/vhost/vdpa.c
diff --git a/lib/librte_vhost/version.map b/lib/vhost/version.map
similarity index 100%
rename from lib/librte_vhost/version.map
rename to lib/vhost/version.map
diff --git a/lib/librte_vhost/vhost.c b/lib/vhost/vhost.c
similarity index 100%
rename from lib/librte_vhost/vhost.c
rename to lib/vhost/vhost.c
diff --git a/lib/librte_vhost/vhost.h b/lib/vhost/vhost.h
similarity index 100%
rename from lib/librte_vhost/vhost.h
rename to lib/vhost/vhost.h
diff --git a/lib/librte_vhost/vhost_crypto.c b/lib/vhost/vhost_crypto.c
similarity index 100%
rename from lib/librte_vhost/vhost_crypto.c
rename to lib/vhost/vhost_crypto.c
diff --git a/lib/librte_vhost/vhost_user.c b/lib/vhost/vhost_user.c
similarity index 100%
rename from lib/librte_vhost/vhost_user.c
rename to lib/vhost/vhost_user.c
diff --git a/lib/librte_vhost/vhost_user.h b/lib/vhost/vhost_user.h
similarity index 100%
rename from lib/librte_vhost/vhost_user.h
rename to lib/vhost/vhost_user.h
diff --git a/lib/librte_vhost/virtio_crypto.h b/lib/vhost/virtio_crypto.h
similarity index 100%
rename from lib/librte_vhost/virtio_crypto.h
rename to lib/vhost/virtio_crypto.h
diff --git a/lib/librte_vhost/virtio_net.c b/lib/vhost/virtio_net.c
similarity index 100%
rename from lib/librte_vhost/virtio_net.c
rename to lib/vhost/virtio_net.c
diff --git a/license/exceptions.txt b/license/exceptions.txt
index 636c69b9b..1bd4dbf8f 100644
--- a/license/exceptions.txt
+++ b/license/exceptions.txt
@@ -12,8 +12,8 @@ Note that following licenses are not exceptions:-
---------------------------------------------------------------------------------------------------
SPDX Identifier TB Approval Date GB Approval Date File name
---------------------------------------------------------------------------------------------------
-1.MIT 10/23/2019 02/10/2020 lib/librte_eal/windows/include/dirent.h
-2.BSD-2-Clause 10/23/2019 12/18/2019 lib/librte_eal/windows/include/getopt.h
+1.MIT 10/23/2019 02/10/2020 lib/eal/windows/include/dirent.h
+2.BSD-2-Clause 10/23/2019 12/18/2019 lib/eal/windows/include/getopt.h
3.ISC AND
- BSD-2-Clause 10/23/2019 12/18/2019 lib/librte_eal/windows/getopt.c
+ BSD-2-Clause 10/23/2019 12/18/2019 lib/eal/windows/getopt.c
---------------------------------------------------------------------------------------------------
diff --git a/meson.build b/meson.build
index 6d7f8c501..001a1230c 100644
--- a/meson.build
+++ b/meson.build
@@ -50,9 +50,9 @@ endif
# able to be included in any file. We also store a global array of include dirs
# for passing to pmdinfogen scripts
global_inc = include_directories('.', 'config',
- 'lib/librte_eal/include',
- 'lib/librte_eal/@0@/include'.format(host_machine.system()),
- 'lib/librte_eal/@0@/include'.format(arch_subdir),
+ 'lib/eal/include',
+ 'lib/eal/@0@/include'.format(host_machine.system()),
+ 'lib/eal/@0@/include'.format(arch_subdir),
)
# do configuration and get tool paths
--
2.27.0
^ permalink raw reply [relevance 1%]
* Re: [dpdk-dev] [PATCH v3 1/1] ethdev: introduce indirect action APIs
2021-04-16 7:03 0% ` Thomas Monjalon
@ 2021-04-16 15:00 0% ` Ajit Khaparde
0 siblings, 0 replies; 200+ results
From: Ajit Khaparde @ 2021-04-16 15:00 UTC (permalink / raw)
To: Thomas Monjalon
Cc: Bing Zhao, Ori Kam, Ferruh Yigit, Andrew Rybchenko, Matan Azrad,
Slava Ovsiienko, dpdk-dev, Gregory Etelson, Andrey Vesnovaty
[-- Attachment #1: Type: text/plain, Size: 1390 bytes --]
On Fri, Apr 16, 2021 at 12:03 AM Thomas Monjalon <thomas@monjalon.net> wrote:
>
> 15/04/2021 19:59, Ajit Khaparde:
> > On Thu, Apr 15, 2021 at 8:52 AM Bing Zhao <bingz@nvidia.com> wrote:
> > > There are two types of flow actions:
> > > 1. the direct (normal) actions that could be created and stored
> > > within a flow rule. Such action is tied to its flow rule and
> > > cannot be reused.
> > > 2. the indirect action, in the past, named shared_action. It is
> > > created from a direct actioni, like count or rss, and then used
> > > in the flow rules with an object handle. The PMD will take care
> > > of the retrieve from indirect action to the direct action
> > > when it is referenced.
> [...]
> > > The RTE_FLOW_ACTION_TYPE_SHARED is kept for now in order not to
> > > break the ABI. All the implementations are changed by using
> > > RTE_FLOW_ACTION_TYPE_INDIRECT.
> >
> > When I read this somehow indirect did not feel right.
> > But I don't have a strong suggestion either.
> > Since it is a context of action or actions maybe we use action_context?
>
> This is an action which is not directly described in the flow rule,
> but in another object referenced by its handle.
> It creates a level of indirection in the rule description.
> I think the word "indirect" is accurate.
Ok. Let's go with that.
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
>
>
>
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [dpdklab] Re: [PATCH v5 1/5] devargs: unify scratch buffer storage
2021-04-16 12:58 0% ` Thomas Monjalon
@ 2021-04-16 13:14 0% ` Lincoln Lavoie
0 siblings, 0 replies; 200+ results
From: Lincoln Lavoie @ 2021-04-16 13:14 UTC (permalink / raw)
To: Thomas Monjalon
Cc: Aaron Conole, David Marchand, dpdklab, Gaetan Rivet, dev,
Xueming(Steven) Li, Asaf Penso, Wenzhuo Lu, Beilei Xing,
Bernard Iremonger, Gaetan Rivet, Anatoly Burakov, Ray Kinsella,
Neil Horman, Ferruh Yigit, Andrew Rybchenko, Dodji Seketeli, ci,
Owen Hilyard
We can look into that, but that now will need to be tested to work across
all the different OS distros in the containers.
For now, we can install the update on the ubuntu 18.04 worker that is
running the production and remake the reference cache.
Cheers,
Lincoln
On Fri, Apr 16, 2021 at 8:58 AM Thomas Monjalon <thomas@monjalon.net> wrote:
> 16/04/2021 14:43, Lincoln Lavoie:
> > All of the UNH ABI testing is moving info containers, so it can be run on
> > top of each OS, alongside the other compile and unit testing. This is
> > actually ready now, but hasn't been pushed live this week, because of the
> > backlog in the system because of the DTS failure. The additional compile
> > jobs are already online now, it's just ABI that hasn't been pushed live.
> >
> > This means the current ABI (what is reporting right now) is running on
> > 18.04 for x86 and 20.04 for aarch64. The aarch64 one will continue
> > forward, because we're not going to moving to emulated environments for
> > testing on that architecture.
> >
> > This has two implications, first, the scripts for running ABI (and the
> > other tests) become part of the container definition, and at the last
> > meeting we talked about moving those definitions into the dpdk-ci repo,
> > which I think makes sense. Second, there isn't an operating system to
> > "maintain" since it's what's inside the container images, which are
> > periodically rebuilt, but pretty much treated as ephemeral. Assuming the
> > container bases / distros have the updated libabigail version packaged
> with
> > them.
>
> No, the version packaged in the OS is not recent enough.
> Please check what is done in Travis and GitHub CI
> in the shell function install_libabigail():
> https://git.dpdk.org/dpdk/tree/.ci/linux-build.sh#n22
>
>
> > On Fri, Apr 16, 2021 at 8:32 AM Aaron Conole <aconole@redhat.com> wrote:
> > > David Marchand <david.marchand@redhat.com> writes:
> > >
> > > > On Tue, Apr 13, 2021 at 5:15 AM Xueming Li <xuemingl@nvidia.com>
> wrote:
> > > >> diff --git a/lib/librte_eal/include/rte_devargs.h
> > > b/lib/librte_eal/include/rte_devargs.h
> > > >> index 296f19324f..134b44a887 100644
> > > >> --- a/lib/librte_eal/include/rte_devargs.h
> > > >> +++ b/lib/librte_eal/include/rte_devargs.h
> > > >> @@ -60,16 +60,16 @@ struct rte_devargs {
> > > >> /** Name of the device. */
> > > >> char name[RTE_DEV_NAME_MAX_LEN];
> > > >> RTE_STD_C11
> > > >> - union {
> > > >> - /** Arguments string as given by user or "" for no
> argument. */
> > > >> - char *args;
> > > >> + union { /**< driver-related part of device string. */
> > > >> + const char *args; /**< legacy name. */
> > > >> const char *drv_str;
> > > >> };
> > > >> struct rte_bus *bus; /**< bus handle. */
> > > >> struct rte_class *cls; /**< class handle. */
> > > >> const char *bus_str; /**< bus-related part of device
> string. */
> > > >> const char *cls_str; /**< class-related part of device
> string.
> > > */
> > > >> - const char *data; /**< Device string storage. */
> > > >> + char *data;
> > > >> + /**< Raw string including bus, class and driver arguments.
> */
> > > >> };
> > > >>
> > > >> /**
> > > >
> > > > - Flagging this patch for info and its impact on UNH jobs.
> > > >
> > > > This change is fine, but older libabigail versions could not deal
> with
> > > > such changes (anonymous union, changes of const fields).
> > > > This results in an ABI check failure in the UNH x86 job on Ubuntu
> > > > 18.04 (and for some people not using recent libabigail).
> > > > I can see the ARM job passes fine, so I suppose it is using a more
> > > > recent libabigail (running Ubuntu 20.04 maybe?).
> > > >
> > > > We either need to disable this x86 job or update its libabigail
> > > > package (maybe aligning with what we have for public CI which is
> > > > libabigail 1.8 manually compiled).
> > > >
> > > >
> > > > - For the longer term, what do you think of using/extending the .ci/
> > > > scripts for use by UNH jobs?
> > >
> > > I think it would be great if we had some of the scripts shared as a
> > > common resource. That would also help us to look at fixes / changes
> > > when needed.
> > >
> > >
> >
> >
>
>
>
>
>
>
--
*Lincoln Lavoie*
Principal Engineer, Broadband Technologies
21 Madbury Rd., Ste. 100, Durham, NH 03824
lylavoie@iol.unh.edu
https://www.iol.unh.edu
+1-603-674-2755 (m)
<https://www.iol.unh.edu>
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [dpdklab] Re: [PATCH v5 1/5] devargs: unify scratch buffer storage
2021-04-16 12:43 5% ` [dpdk-dev] [dpdklab] " Lincoln Lavoie
@ 2021-04-16 12:58 0% ` Thomas Monjalon
2021-04-16 13:14 0% ` Lincoln Lavoie
0 siblings, 1 reply; 200+ results
From: Thomas Monjalon @ 2021-04-16 12:58 UTC (permalink / raw)
To: Lincoln Lavoie
Cc: Aaron Conole, David Marchand, dpdklab, Gaetan Rivet, dev,
Xueming(Steven) Li, Asaf Penso, Wenzhuo Lu, Beilei Xing,
Bernard Iremonger, Gaetan Rivet, Anatoly Burakov, Ray Kinsella,
Neil Horman, Ferruh Yigit, Andrew Rybchenko, Dodji Seketeli, ci,
Owen Hilyard
16/04/2021 14:43, Lincoln Lavoie:
> All of the UNH ABI testing is moving info containers, so it can be run on
> top of each OS, alongside the other compile and unit testing. This is
> actually ready now, but hasn't been pushed live this week, because of the
> backlog in the system because of the DTS failure. The additional compile
> jobs are already online now, it's just ABI that hasn't been pushed live.
>
> This means the current ABI (what is reporting right now) is running on
> 18.04 for x86 and 20.04 for aarch64. The aarch64 one will continue
> forward, because we're not going to moving to emulated environments for
> testing on that architecture.
>
> This has two implications, first, the scripts for running ABI (and the
> other tests) become part of the container definition, and at the last
> meeting we talked about moving those definitions into the dpdk-ci repo,
> which I think makes sense. Second, there isn't an operating system to
> "maintain" since it's what's inside the container images, which are
> periodically rebuilt, but pretty much treated as ephemeral. Assuming the
> container bases / distros have the updated libabigail version packaged with
> them.
No, the version packaged in the OS is not recent enough.
Please check what is done in Travis and GitHub CI
in the shell function install_libabigail():
https://git.dpdk.org/dpdk/tree/.ci/linux-build.sh#n22
> On Fri, Apr 16, 2021 at 8:32 AM Aaron Conole <aconole@redhat.com> wrote:
> > David Marchand <david.marchand@redhat.com> writes:
> >
> > > On Tue, Apr 13, 2021 at 5:15 AM Xueming Li <xuemingl@nvidia.com> wrote:
> > >> diff --git a/lib/librte_eal/include/rte_devargs.h
> > b/lib/librte_eal/include/rte_devargs.h
> > >> index 296f19324f..134b44a887 100644
> > >> --- a/lib/librte_eal/include/rte_devargs.h
> > >> +++ b/lib/librte_eal/include/rte_devargs.h
> > >> @@ -60,16 +60,16 @@ struct rte_devargs {
> > >> /** Name of the device. */
> > >> char name[RTE_DEV_NAME_MAX_LEN];
> > >> RTE_STD_C11
> > >> - union {
> > >> - /** Arguments string as given by user or "" for no argument. */
> > >> - char *args;
> > >> + union { /**< driver-related part of device string. */
> > >> + const char *args; /**< legacy name. */
> > >> const char *drv_str;
> > >> };
> > >> struct rte_bus *bus; /**< bus handle. */
> > >> struct rte_class *cls; /**< class handle. */
> > >> const char *bus_str; /**< bus-related part of device string. */
> > >> const char *cls_str; /**< class-related part of device string.
> > */
> > >> - const char *data; /**< Device string storage. */
> > >> + char *data;
> > >> + /**< Raw string including bus, class and driver arguments. */
> > >> };
> > >>
> > >> /**
> > >
> > > - Flagging this patch for info and its impact on UNH jobs.
> > >
> > > This change is fine, but older libabigail versions could not deal with
> > > such changes (anonymous union, changes of const fields).
> > > This results in an ABI check failure in the UNH x86 job on Ubuntu
> > > 18.04 (and for some people not using recent libabigail).
> > > I can see the ARM job passes fine, so I suppose it is using a more
> > > recent libabigail (running Ubuntu 20.04 maybe?).
> > >
> > > We either need to disable this x86 job or update its libabigail
> > > package (maybe aligning with what we have for public CI which is
> > > libabigail 1.8 manually compiled).
> > >
> > >
> > > - For the longer term, what do you think of using/extending the .ci/
> > > scripts for use by UNH jobs?
> >
> > I think it would be great if we had some of the scripts shared as a
> > common resource. That would also help us to look at fixes / changes
> > when needed.
> >
> >
>
>
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [dpdklab] Re: [PATCH v5 1/5] devargs: unify scratch buffer storage
2021-04-16 12:32 0% ` Aaron Conole
@ 2021-04-16 12:43 5% ` Lincoln Lavoie
2021-04-16 12:58 0% ` Thomas Monjalon
0 siblings, 1 reply; 200+ results
From: Lincoln Lavoie @ 2021-04-16 12:43 UTC (permalink / raw)
To: Aaron Conole
Cc: David Marchand, dpdklab, Thomas Monjalon, Gaetan Rivet, dev,
Xueming(Steven) Li, Asaf Penso, Wenzhuo Lu, Beilei Xing,
Bernard Iremonger, Gaetan Rivet, Anatoly Burakov, Ray Kinsella,
Neil Horman, Ferruh Yigit, Andrew Rybchenko, Dodji Seketeli, ci,
Owen Hilyard
All of the UNH ABI testing is moving info containers, so it can be run on
top of each OS, alongside the other compile and unit testing. This is
actually ready now, but hasn't been pushed live this week, because of the
backlog in the system because of the DTS failure. The additional compile
jobs are already online now, it's just ABI that hasn't been pushed live.
This means the current ABI (what is reporting right now) is running on
18.04 for x86 and 20.04 for aarch64. The aarch64 one will continue
forward, because we're not going to moving to emulated environments for
testing on that architecture.
This has two implications, first, the scripts for running ABI (and the
other tests) become part of the container definition, and at the last
meeting we talked about moving those definitions into the dpdk-ci repo,
which I think makes sense. Second, there isn't an operating system to
"maintain" since it's what's inside the container images, which are
periodically rebuilt, but pretty much treated as ephemeral. Assuming the
container bases / distros have the updated libabigail version packaged with
them.
Cheers,
Lincoln
On Fri, Apr 16, 2021 at 8:32 AM Aaron Conole <aconole@redhat.com> wrote:
> David Marchand <david.marchand@redhat.com> writes:
>
> > On Tue, Apr 13, 2021 at 5:15 AM Xueming Li <xuemingl@nvidia.com> wrote:
> >> diff --git a/lib/librte_eal/include/rte_devargs.h
> b/lib/librte_eal/include/rte_devargs.h
> >> index 296f19324f..134b44a887 100644
> >> --- a/lib/librte_eal/include/rte_devargs.h
> >> +++ b/lib/librte_eal/include/rte_devargs.h
> >> @@ -60,16 +60,16 @@ struct rte_devargs {
> >> /** Name of the device. */
> >> char name[RTE_DEV_NAME_MAX_LEN];
> >> RTE_STD_C11
> >> - union {
> >> - /** Arguments string as given by user or "" for no argument. */
> >> - char *args;
> >> + union { /**< driver-related part of device string. */
> >> + const char *args; /**< legacy name. */
> >> const char *drv_str;
> >> };
> >> struct rte_bus *bus; /**< bus handle. */
> >> struct rte_class *cls; /**< class handle. */
> >> const char *bus_str; /**< bus-related part of device string. */
> >> const char *cls_str; /**< class-related part of device string.
> */
> >> - const char *data; /**< Device string storage. */
> >> + char *data;
> >> + /**< Raw string including bus, class and driver arguments. */
> >> };
> >>
> >> /**
> >
> > - Flagging this patch for info and its impact on UNH jobs.
> >
> > This change is fine, but older libabigail versions could not deal with
> > such changes (anonymous union, changes of const fields).
> > This results in an ABI check failure in the UNH x86 job on Ubuntu
> > 18.04 (and for some people not using recent libabigail).
> > I can see the ARM job passes fine, so I suppose it is using a more
> > recent libabigail (running Ubuntu 20.04 maybe?).
> >
> > We either need to disable this x86 job or update its libabigail
> > package (maybe aligning with what we have for public CI which is
> > libabigail 1.8 manually compiled).
> >
> >
> > - For the longer term, what do you think of using/extending the .ci/
> > scripts for use by UNH jobs?
>
> I think it would be great if we had some of the scripts shared as a
> common resource. That would also help us to look at fixes / changes
> when needed.
>
>
--
*Lincoln Lavoie*
Principal Engineer, Broadband Technologies
21 Madbury Rd., Ste. 100, Durham, NH 03824
lylavoie@iol.unh.edu
https://www.iol.unh.edu
+1-603-674-2755 (m)
<https://www.iol.unh.edu>
^ permalink raw reply [relevance 5%]
* Re: [dpdk-dev] [PATCH v5 1/5] devargs: unify scratch buffer storage
2021-04-16 7:00 3% ` David Marchand
@ 2021-04-16 12:32 0% ` Aaron Conole
2021-04-16 12:43 5% ` [dpdk-dev] [dpdklab] " Lincoln Lavoie
0 siblings, 1 reply; 200+ results
From: Aaron Conole @ 2021-04-16 12:32 UTC (permalink / raw)
To: David Marchand
Cc: dpdklab, Thomas Monjalon, Gaetan Rivet, dev, Xueming(Steven) Li,
Asaf Penso, Wenzhuo Lu, Beilei Xing, Bernard Iremonger,
Gaetan Rivet, Anatoly Burakov, Ray Kinsella, Neil Horman,
Ferruh Yigit, Andrew Rybchenko, Dodji Seketeli, ci, Owen Hilyard
David Marchand <david.marchand@redhat.com> writes:
> On Tue, Apr 13, 2021 at 5:15 AM Xueming Li <xuemingl@nvidia.com> wrote:
>> diff --git a/lib/librte_eal/include/rte_devargs.h b/lib/librte_eal/include/rte_devargs.h
>> index 296f19324f..134b44a887 100644
>> --- a/lib/librte_eal/include/rte_devargs.h
>> +++ b/lib/librte_eal/include/rte_devargs.h
>> @@ -60,16 +60,16 @@ struct rte_devargs {
>> /** Name of the device. */
>> char name[RTE_DEV_NAME_MAX_LEN];
>> RTE_STD_C11
>> - union {
>> - /** Arguments string as given by user or "" for no argument. */
>> - char *args;
>> + union { /**< driver-related part of device string. */
>> + const char *args; /**< legacy name. */
>> const char *drv_str;
>> };
>> struct rte_bus *bus; /**< bus handle. */
>> struct rte_class *cls; /**< class handle. */
>> const char *bus_str; /**< bus-related part of device string. */
>> const char *cls_str; /**< class-related part of device string. */
>> - const char *data; /**< Device string storage. */
>> + char *data;
>> + /**< Raw string including bus, class and driver arguments. */
>> };
>>
>> /**
>
> - Flagging this patch for info and its impact on UNH jobs.
>
> This change is fine, but older libabigail versions could not deal with
> such changes (anonymous union, changes of const fields).
> This results in an ABI check failure in the UNH x86 job on Ubuntu
> 18.04 (and for some people not using recent libabigail).
> I can see the ARM job passes fine, so I suppose it is using a more
> recent libabigail (running Ubuntu 20.04 maybe?).
>
> We either need to disable this x86 job or update its libabigail
> package (maybe aligning with what we have for public CI which is
> libabigail 1.8 manually compiled).
>
>
> - For the longer term, what do you think of using/extending the .ci/
> scripts for use by UNH jobs?
I think it would be great if we had some of the scripts shared as a
common resource. That would also help us to look at fixes / changes
when needed.
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH v2 2/2] ci: bump ABI reference version
2021-04-15 19:43 7% ` [dpdk-dev] [PATCH v2 2/2] ci: bump ABI reference version David Marchand
@ 2021-04-16 12:11 4% ` David Marchand
0 siblings, 0 replies; 200+ results
From: David Marchand @ 2021-04-16 12:11 UTC (permalink / raw)
To: dev
Cc: Thomas Monjalon, Ray Kinsella, Aaron Conole, Michael Santana,
Juraj Linkeš
On Thu, Apr 15, 2021 at 9:43 PM David Marchand
<david.marchand@redhat.com> wrote:
>
> When bumping DPDK version, we should have bumped the ABI reference too.
>
> Fixes: 442155f70c6b ("version: 21.05-rc0")
>
> Signed-off-by: David Marchand <david.marchand@redhat.com>
> Acked-by: Thomas Monjalon <thomas@monjalon.net>
Series applied, thanks.
--
David Marchand
^ permalink raw reply [relevance 4%]
* Re: [dpdk-dev] [PATCH V4] ethdev: add queue state when retrieve queue information
2021-04-16 9:41 0% ` Ferruh Yigit
@ 2021-04-16 9:57 3% ` Thomas Monjalon
2021-04-23 11:08 3% ` Kinsella, Ray
0 siblings, 1 reply; 200+ results
From: Thomas Monjalon @ 2021-04-16 9:57 UTC (permalink / raw)
To: Lijun Ou, Ferruh Yigit; +Cc: dev, linuxarm, mdr
16/04/2021 11:41, Ferruh Yigit:
> On 4/16/2021 9:58 AM, Thomas Monjalon wrote:
> > 16/04/2021 10:46, Lijun Ou:
> >> Currently, upper-layer application could get queue state only
> >> through pointers such as dev->data->tx_queue_state[queue_id],
> >> this is not the recommended way to access it. So this patch
> >> add get queue state when call rte_eth_rx_queue_info_get and
> >> rte_eth_tx_queue_info_get API.
> >>
> >> Note: After add queue_state field, the 'struct rte_eth_rxq_info' size
> >> remains 128B, and the 'struct rte_eth_txq_info' size remains 64B, so
> >> it could be ABI compatible.
> > [...]
> >> --- a/doc/guides/rel_notes/release_21_05.rst
> >> +++ b/doc/guides/rel_notes/release_21_05.rst
> >> @@ -251,6 +251,12 @@ ABI Changes
> >> function was already marked as internal in the API documentation for it,
> >> and was not for use by external applications.
> >>
> >> +* Added new field ``queue_state`` to ``rte_eth_rxq_info`` structure
> >> + to provide indicated rxq queue state.
> >> +
> >> +* Added new field ``queue_state`` to ``rte_eth_txq_info`` structure
> >> + to provide indicated txq queue state.
> >
> > Not sure we should add a note here for additions which
> > do not break ABI compatibility.
> > It may be confusing.
> >
>
> Hi Thomas,
>
> What do about adding the documentation to "API Changes" section?
> Since 'rte_eth_rx_queue_info_get()'/'rte_eth_tx_queue_info_get()' can get
> 'queue_state' now, which may taken as API change.
That's an addition.
The users have nothing to change in their existing code,
so I think we don't need a note in API or ABI change.
The only required note would be in the "New Features".
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [PATCH v2 1/2] ci: fix ABI reference generation
2021-04-16 9:49 4% ` David Marchand
@ 2021-04-16 9:55 4% ` Thomas Monjalon
0 siblings, 0 replies; 200+ results
From: Thomas Monjalon @ 2021-04-16 9:55 UTC (permalink / raw)
To: David Marchand
Cc: Juraj Linkeš,
dev, mdr, Aaron Conole, Michael Santana, Honnappa Nagarahalli,
Bruce Richardson
16/04/2021 11:49, David Marchand:
> On Fri, Apr 16, 2021 at 11:20 AM Thomas Monjalon <thomas@monjalon.net> wrote:
> > 16/04/2021 11:17, David Marchand:
> > > On Fri, Apr 16, 2021 at 8:39 AM Juraj Linkeš <juraj.linkes@pantheon.tech> wrote:
> > > > >
> > > > > Stick to a compatible configuration passing -Dmachine=default.
> > > > >
> > > > > Note: the breakage was not seen earlier this week as I guess the CI workers are
> > > > > using a cached ABI reference for v20.11.
> > > > >
> > > > > Fixes: 5b3a6ca6fd28 ("build: alias default build as generic")
> > > > >
> > > > > Signed-off-by: David Marchand <david.marchand@redhat.com>
> > > >
> > > > Reviewed-by: Juraj Linkeš <juraj.linkes@pantheon.tech>
> > > >
> > > > Do we want to change this back to -Dmachine=generic after next release?
> > >
> > > This seems fine to me.
> >
> > If we change back in 21.08, we won't be able to test 21.08
> > against 20.11 or 21.02, right?
> > Wouldn't be better to wait 21.11?
>
> I considered this too, but here, in Travis/GHA, we test only against
> the n-1 release.
Yes. If we don't plan to change our CI test, that's fine.
^ permalink raw reply [relevance 4%]
* Re: [dpdk-dev] [PATCH V4] ethdev: add queue state when retrieve queue information
2021-04-16 8:58 3% ` Thomas Monjalon
2021-04-16 9:41 0% ` Ferruh Yigit
@ 2021-04-16 9:55 0% ` oulijun
1 sibling, 0 replies; 200+ results
From: oulijun @ 2021-04-16 9:55 UTC (permalink / raw)
To: Thomas Monjalon, ferruh.yigit; +Cc: dev, linuxarm, mdr
在 2021/4/16 16:58, Thomas Monjalon 写道:
> 16/04/2021 10:46, Lijun Ou:
>> Currently, upper-layer application could get queue state only
>> through pointers such as dev->data->tx_queue_state[queue_id],
>> this is not the recommended way to access it. So this patch
>> add get queue state when call rte_eth_rx_queue_info_get and
>> rte_eth_tx_queue_info_get API.
>>
>> Note: After add queue_state field, the 'struct rte_eth_rxq_info' size
>> remains 128B, and the 'struct rte_eth_txq_info' size remains 64B, so
>> it could be ABI compatible.
> [...]
>> --- a/doc/guides/rel_notes/release_21_05.rst
>> +++ b/doc/guides/rel_notes/release_21_05.rst
>> @@ -251,6 +251,12 @@ ABI Changes
>> function was already marked as internal in the API documentation for it,
>> and was not for use by external applications.
>>
>> +* Added new field ``queue_state`` to ``rte_eth_rxq_info`` structure
>> + to provide indicated rxq queue state.
>> +
>> +* Added new field ``queue_state`` to ``rte_eth_txq_info`` structure
>> + to provide indicated txq queue state.
>
> Not sure we should add a note here for additions which
> do not break ABI compatibility.
> It may be confusing.
>
Hi，Thmas&Ferruh
Do you want to delete it?
>
> .
>
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH v2 1/2] ci: fix ABI reference generation
2021-04-16 9:20 4% ` Thomas Monjalon
@ 2021-04-16 9:49 4% ` David Marchand
2021-04-16 9:55 4% ` Thomas Monjalon
0 siblings, 1 reply; 200+ results
From: David Marchand @ 2021-04-16 9:49 UTC (permalink / raw)
To: Thomas Monjalon
Cc: Juraj Linkeš,
dev, mdr, Aaron Conole, Michael Santana, Honnappa Nagarahalli,
Bruce Richardson
On Fri, Apr 16, 2021 at 11:20 AM Thomas Monjalon <thomas@monjalon.net> wrote:
>
> 16/04/2021 11:17, David Marchand:
> > On Fri, Apr 16, 2021 at 8:39 AM Juraj Linkeš <juraj.linkes@pantheon.tech> wrote:
> > > >
> > > > Stick to a compatible configuration passing -Dmachine=default.
> > > >
> > > > Note: the breakage was not seen earlier this week as I guess the CI workers are
> > > > using a cached ABI reference for v20.11.
> > > >
> > > > Fixes: 5b3a6ca6fd28 ("build: alias default build as generic")
> > > >
> > > > Signed-off-by: David Marchand <david.marchand@redhat.com>
> > >
> > > Reviewed-by: Juraj Linkeš <juraj.linkes@pantheon.tech>
> > >
> > > Do we want to change this back to -Dmachine=generic after next release?
> >
> > This seems fine to me.
>
> If we change back in 21.08, we won't be able to test 21.08
> against 20.11 or 21.02, right?
> Wouldn't be better to wait 21.11?
I considered this too, but here, in Travis/GHA, we test only against
the n-1 release.
--
David Marchand
^ permalink raw reply [relevance 4%]
* Re: [dpdk-dev] [PATCH V4] ethdev: add queue state when retrieve queue information
2021-04-16 8:58 3% ` Thomas Monjalon
@ 2021-04-16 9:41 0% ` Ferruh Yigit
2021-04-16 9:57 3% ` Thomas Monjalon
2021-04-16 9:55 0% ` oulijun
1 sibling, 1 reply; 200+ results
From: Ferruh Yigit @ 2021-04-16 9:41 UTC (permalink / raw)
To: Thomas Monjalon, Lijun Ou; +Cc: dev, linuxarm, mdr
On 4/16/2021 9:58 AM, Thomas Monjalon wrote:
> 16/04/2021 10:46, Lijun Ou:
>> Currently, upper-layer application could get queue state only
>> through pointers such as dev->data->tx_queue_state[queue_id],
>> this is not the recommended way to access it. So this patch
>> add get queue state when call rte_eth_rx_queue_info_get and
>> rte_eth_tx_queue_info_get API.
>>
>> Note: After add queue_state field, the 'struct rte_eth_rxq_info' size
>> remains 128B, and the 'struct rte_eth_txq_info' size remains 64B, so
>> it could be ABI compatible.
> [...]
>> --- a/doc/guides/rel_notes/release_21_05.rst
>> +++ b/doc/guides/rel_notes/release_21_05.rst
>> @@ -251,6 +251,12 @@ ABI Changes
>> function was already marked as internal in the API documentation for it,
>> and was not for use by external applications.
>>
>> +* Added new field ``queue_state`` to ``rte_eth_rxq_info`` structure
>> + to provide indicated rxq queue state.
>> +
>> +* Added new field ``queue_state`` to ``rte_eth_txq_info`` structure
>> + to provide indicated txq queue state.
>
> Not sure we should add a note here for additions which
> do not break ABI compatibility.
> It may be confusing.
>
Hi Thomas,
What do about adding the documentation to "API Changes" section?
Since 'rte_eth_rx_queue_info_get()'/'rte_eth_tx_queue_info_get()' can get
'queue_state' now, which may taken as API change.
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH v2 1/2] ci: fix ABI reference generation
2021-04-16 9:17 4% ` David Marchand
@ 2021-04-16 9:20 4% ` Thomas Monjalon
2021-04-16 9:49 4% ` David Marchand
0 siblings, 1 reply; 200+ results
From: Thomas Monjalon @ 2021-04-16 9:20 UTC (permalink / raw)
To: Juraj Linkeš, David Marchand
Cc: dev, mdr, Aaron Conole, Michael Santana, Honnappa Nagarahalli,
Bruce Richardson
16/04/2021 11:17, David Marchand:
> On Fri, Apr 16, 2021 at 8:39 AM Juraj Linkeš <juraj.linkes@pantheon.tech> wrote:
> > >
> > > Stick to a compatible configuration passing -Dmachine=default.
> > >
> > > Note: the breakage was not seen earlier this week as I guess the CI workers are
> > > using a cached ABI reference for v20.11.
> > >
> > > Fixes: 5b3a6ca6fd28 ("build: alias default build as generic")
> > >
> > > Signed-off-by: David Marchand <david.marchand@redhat.com>
> >
> > Reviewed-by: Juraj Linkeš <juraj.linkes@pantheon.tech>
> >
> > Do we want to change this back to -Dmachine=generic after next release?
>
> This seems fine to me.
If we change back in 21.08, we won't be able to test 21.08
against 20.11 or 21.02, right?
Wouldn't be better to wait 21.11?
^ permalink raw reply [relevance 4%]
* Re: [dpdk-dev] [PATCH V4] ethdev: add queue state when retrieve queue information
2021-04-16 8:46 8% ` [dpdk-dev] [PATCH V4] " Lijun Ou
2021-04-16 8:58 3% ` Thomas Monjalon
@ 2021-04-16 9:19 0% ` Ananyev, Konstantin
2021-04-17 3:09 8% ` [dpdk-dev] [PATCH V5] " Lijun Ou
2 siblings, 0 replies; 200+ results
From: Ananyev, Konstantin @ 2021-04-16 9:19 UTC (permalink / raw)
To: Lijun Ou, thomas, Yigit, Ferruh; +Cc: dev, linuxarm
> Currently, upper-layer application could get queue state only
> through pointers such as dev->data->tx_queue_state[queue_id],
> this is not the recommended way to access it. So this patch
> add get queue state when call rte_eth_rx_queue_info_get and
> rte_eth_tx_queue_info_get API.
>
> Note: After add queue_state field, the 'struct rte_eth_rxq_info' size
> remains 128B, and the 'struct rte_eth_txq_info' size remains 64B, so
> it could be ABI compatible.
>
> Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
> Signed-off-by: Lijun Ou <oulijun@huawei.com>
> ---
> devtools/libabigail.abignore | 12 +++++++++++-
> doc/guides/rel_notes/release_21_05.rst | 6 ++++++
> lib/librte_ethdev/ethdev_driver.h | 7 -------
> lib/librte_ethdev/rte_ethdev.c | 3 +++
> lib/librte_ethdev/rte_ethdev.h | 9 +++++++++
> 5 files changed, 29 insertions(+), 8 deletions(-)
>
> diff --git a/devtools/libabigail.abignore b/devtools/libabigail.abignore
> index 6c0b389..54542a8 100644
> --- a/devtools/libabigail.abignore
> +++ b/devtools/libabigail.abignore
> @@ -19,4 +19,14 @@
> ; Ignore fields inserted in cacheline boundary of rte_cryptodev
> [suppress_type]
> name = rte_cryptodev
> - has_data_member_inserted_between = {offset_after(attached), end}
> \ No newline at end of file
> + has_data_member_inserted_between = {offset_after(attached), end}
> +
> +; Ignore fields inserted in alignment hole of rte_eth_rxq_info
> +[suppress_type]
> + name = rte_eth_rxq_info
> + has_data_member_inserted_at = offset_after(scattered_rx)
> +
> +; Ignore fields inserted in cacheline boundary of rte_eth_txq_info
> +[suppress_type]
> + name = rte_eth_txq_info
> + has_data_member_inserted_between = {offset_after(nb_desc), end}
> diff --git a/doc/guides/rel_notes/release_21_05.rst b/doc/guides/rel_notes/release_21_05.rst
> index 3bd7757..c6e45e2 100644
> --- a/doc/guides/rel_notes/release_21_05.rst
> +++ b/doc/guides/rel_notes/release_21_05.rst
> @@ -251,6 +251,12 @@ ABI Changes
> function was already marked as internal in the API documentation for it,
> and was not for use by external applications.
>
> +* Added new field ``queue_state`` to ``rte_eth_rxq_info`` structure
> + to provide indicated rxq queue state.
> +
> +* Added new field ``queue_state`` to ``rte_eth_txq_info`` structure
> + to provide indicated txq queue state.
> +
>
> Known Issues
> ------------
> diff --git a/lib/librte_ethdev/ethdev_driver.h b/lib/librte_ethdev/ethdev_driver.h
> index 113129d..40e474a 100644
> --- a/lib/librte_ethdev/ethdev_driver.h
> +++ b/lib/librte_ethdev/ethdev_driver.h
> @@ -952,13 +952,6 @@ struct eth_dev_ops {
> };
>
> /**
> - * RX/TX queue states
> - */
> -#define RTE_ETH_QUEUE_STATE_STOPPED 0
> -#define RTE_ETH_QUEUE_STATE_STARTED 1
> -#define RTE_ETH_QUEUE_STATE_HAIRPIN 2
> -
> -/**
> * @internal
> * Check if the selected Rx queue is hairpin queue.
> *
> diff --git a/lib/librte_ethdev/rte_ethdev.c b/lib/librte_ethdev/rte_ethdev.c
> index 6b5cfd6..ab188ec 100644
> --- a/lib/librte_ethdev/rte_ethdev.c
> +++ b/lib/librte_ethdev/rte_ethdev.c
> @@ -5042,6 +5042,8 @@ rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
>
> memset(qinfo, 0, sizeof(*qinfo));
> dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
> + qinfo->queue_state = dev->data->rx_queue_state[queue_id];
> +
> return 0;
> }
>
> @@ -5082,6 +5084,7 @@ rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
>
> memset(qinfo, 0, sizeof(*qinfo));
> dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
> + qinfo->queue_state = dev->data->tx_queue_state[queue_id];
>
> return 0;
> }
> diff --git a/lib/librte_ethdev/rte_ethdev.h b/lib/librte_ethdev/rte_ethdev.h
> index 3b773b6..a0d01d2 100644
> --- a/lib/librte_ethdev/rte_ethdev.h
> +++ b/lib/librte_ethdev/rte_ethdev.h
> @@ -1588,6 +1588,13 @@ struct rte_eth_dev_info {
> };
>
> /**
> + * RX/TX queue states
> + */
> +#define RTE_ETH_QUEUE_STATE_STOPPED 0
> +#define RTE_ETH_QUEUE_STATE_STARTED 1
> +#define RTE_ETH_QUEUE_STATE_HAIRPIN 2
> +
> +/**
> * Ethernet device RX queue information structure.
> * Used to retrieve information about configured queue.
> */
> @@ -1595,6 +1602,7 @@ struct rte_eth_rxq_info {
> struct rte_mempool *mp; /**< mempool used by that queue. */
> struct rte_eth_rxconf conf; /**< queue config parameters. */
> uint8_t scattered_rx; /**< scattered packets RX supported. */
> + uint8_t queue_state; /**< one of RTE_ETH_QUEUE_STATE_*. */
> uint16_t nb_desc; /**< configured number of RXDs. */
> uint16_t rx_buf_size; /**< hardware receive buffer size. */
> } __rte_cache_min_aligned;
> @@ -1606,6 +1614,7 @@ struct rte_eth_rxq_info {
> struct rte_eth_txq_info {
> struct rte_eth_txconf conf; /**< queue config parameters. */
> uint16_t nb_desc; /**< configured number of TXDs. */
> + uint8_t queue_state; /**< one of RTE_ETH_QUEUE_STATE_*. */
> } __rte_cache_min_aligned;
>
> /* Generic Burst mode flag definition, values can be ORed. */
> --
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
> 2.7.4
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH v2 1/2] ci: fix ABI reference generation
2021-04-16 6:39 4% ` [dpdk-dev] [PATCH v2 1/2] ci: fix ABI reference generation Juraj Linkeš
@ 2021-04-16 9:17 4% ` David Marchand
2021-04-16 9:20 4% ` Thomas Monjalon
0 siblings, 1 reply; 200+ results
From: David Marchand @ 2021-04-16 9:17 UTC (permalink / raw)
To: Juraj Linkeš
Cc: dev, thomas, mdr, Aaron Conole, Michael Santana,
Honnappa Nagarahalli, Bruce Richardson
On Fri, Apr 16, 2021 at 8:39 AM Juraj Linkeš <juraj.linkes@pantheon.tech> wrote:
> >
> > Stick to a compatible configuration passing -Dmachine=default.
> >
> > Note: the breakage was not seen earlier this week as I guess the CI workers are
> > using a cached ABI reference for v20.11.
> >
> > Fixes: 5b3a6ca6fd28 ("build: alias default build as generic")
> >
> > Signed-off-by: David Marchand <david.marchand@redhat.com>
>
> Reviewed-by: Juraj Linkeš <juraj.linkes@pantheon.tech>
>
> Do we want to change this back to -Dmachine=generic after next release?
This seems fine to me.
--
David Marchand
^ permalink raw reply [relevance 4%]
* Re: [dpdk-dev] [PATCH V4] ethdev: add queue state when retrieve queue information
2021-04-16 8:46 8% ` [dpdk-dev] [PATCH V4] " Lijun Ou
@ 2021-04-16 8:58 3% ` Thomas Monjalon
2021-04-16 9:41 0% ` Ferruh Yigit
2021-04-16 9:55 0% ` oulijun
2021-04-16 9:19 0% ` Ananyev, Konstantin
2021-04-17 3:09 8% ` [dpdk-dev] [PATCH V5] " Lijun Ou
2 siblings, 2 replies; 200+ results
From: Thomas Monjalon @ 2021-04-16 8:58 UTC (permalink / raw)
To: ferruh.yigit, Lijun Ou; +Cc: dev, linuxarm, mdr
16/04/2021 10:46, Lijun Ou:
> Currently, upper-layer application could get queue state only
> through pointers such as dev->data->tx_queue_state[queue_id],
> this is not the recommended way to access it. So this patch
> add get queue state when call rte_eth_rx_queue_info_get and
> rte_eth_tx_queue_info_get API.
>
> Note: After add queue_state field, the 'struct rte_eth_rxq_info' size
> remains 128B, and the 'struct rte_eth_txq_info' size remains 64B, so
> it could be ABI compatible.
[...]
> --- a/doc/guides/rel_notes/release_21_05.rst
> +++ b/doc/guides/rel_notes/release_21_05.rst
> @@ -251,6 +251,12 @@ ABI Changes
> function was already marked as internal in the API documentation for it,
> and was not for use by external applications.
>
> +* Added new field ``queue_state`` to ``rte_eth_rxq_info`` structure
> + to provide indicated rxq queue state.
> +
> +* Added new field ``queue_state`` to ``rte_eth_txq_info`` structure
> + to provide indicated txq queue state.
Not sure we should add a note here for additions which
do not break ABI compatibility.
It may be confusing.
^ permalink raw reply [relevance 3%]
* [dpdk-dev] [PATCH V4] ethdev: add queue state when retrieve queue information
2021-04-15 2:40 8% ` [dpdk-dev] [PATCH V3] " Lijun Ou
2021-04-15 12:33 3% ` Ferruh Yigit
@ 2021-04-16 8:46 8% ` Lijun Ou
2021-04-16 8:58 3% ` Thomas Monjalon
` (2 more replies)
1 sibling, 3 replies; 200+ results
From: Lijun Ou @ 2021-04-16 8:46 UTC (permalink / raw)
To: thomas, ferruh.yigit; +Cc: dev, linuxarm
Currently, upper-layer application could get queue state only
through pointers such as dev->data->tx_queue_state[queue_id],
this is not the recommended way to access it. So this patch
add get queue state when call rte_eth_rx_queue_info_get and
rte_eth_tx_queue_info_get API.
Note: After add queue_state field, the 'struct rte_eth_rxq_info' size
remains 128B, and the 'struct rte_eth_txq_info' size remains 64B, so
it could be ABI compatible.
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Lijun Ou <oulijun@huawei.com>
---
devtools/libabigail.abignore | 12 +++++++++++-
doc/guides/rel_notes/release_21_05.rst | 6 ++++++
lib/librte_ethdev/ethdev_driver.h | 7 -------
lib/librte_ethdev/rte_ethdev.c | 3 +++
lib/librte_ethdev/rte_ethdev.h | 9 +++++++++
5 files changed, 29 insertions(+), 8 deletions(-)
diff --git a/devtools/libabigail.abignore b/devtools/libabigail.abignore
index 6c0b389..54542a8 100644
--- a/devtools/libabigail.abignore
+++ b/devtools/libabigail.abignore
@@ -19,4 +19,14 @@
; Ignore fields inserted in cacheline boundary of rte_cryptodev
[suppress_type]
name = rte_cryptodev
- has_data_member_inserted_between = {offset_after(attached), end}
\ No newline at end of file
+ has_data_member_inserted_between = {offset_after(attached), end}
+
+; Ignore fields inserted in alignment hole of rte_eth_rxq_info
+[suppress_type]
+ name = rte_eth_rxq_info
+ has_data_member_inserted_at = offset_after(scattered_rx)
+
+; Ignore fields inserted in cacheline boundary of rte_eth_txq_info
+[suppress_type]
+ name = rte_eth_txq_info
+ has_data_member_inserted_between = {offset_after(nb_desc), end}
diff --git a/doc/guides/rel_notes/release_21_05.rst b/doc/guides/rel_notes/release_21_05.rst
index 3bd7757..c6e45e2 100644
--- a/doc/guides/rel_notes/release_21_05.rst
+++ b/doc/guides/rel_notes/release_21_05.rst
@@ -251,6 +251,12 @@ ABI Changes
function was already marked as internal in the API documentation for it,
and was not for use by external applications.
+* Added new field ``queue_state`` to ``rte_eth_rxq_info`` structure
+ to provide indicated rxq queue state.
+
+* Added new field ``queue_state`` to ``rte_eth_txq_info`` structure
+ to provide indicated txq queue state.
+
Known Issues
------------
diff --git a/lib/librte_ethdev/ethdev_driver.h b/lib/librte_ethdev/ethdev_driver.h
index 113129d..40e474a 100644
--- a/lib/librte_ethdev/ethdev_driver.h
+++ b/lib/librte_ethdev/ethdev_driver.h
@@ -952,13 +952,6 @@ struct eth_dev_ops {
};
/**
- * RX/TX queue states
- */
-#define RTE_ETH_QUEUE_STATE_STOPPED 0
-#define RTE_ETH_QUEUE_STATE_STARTED 1
-#define RTE_ETH_QUEUE_STATE_HAIRPIN 2
-
-/**
* @internal
* Check if the selected Rx queue is hairpin queue.
*
diff --git a/lib/librte_ethdev/rte_ethdev.c b/lib/librte_ethdev/rte_ethdev.c
index 6b5cfd6..ab188ec 100644
--- a/lib/librte_ethdev/rte_ethdev.c
+++ b/lib/librte_ethdev/rte_ethdev.c
@@ -5042,6 +5042,8 @@ rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
memset(qinfo, 0, sizeof(*qinfo));
dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
+ qinfo->queue_state = dev->data->rx_queue_state[queue_id];
+
return 0;
}
@@ -5082,6 +5084,7 @@ rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
memset(qinfo, 0, sizeof(*qinfo));
dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
+ qinfo->queue_state = dev->data->tx_queue_state[queue_id];
return 0;
}
diff --git a/lib/librte_ethdev/rte_ethdev.h b/lib/librte_ethdev/rte_ethdev.h
index 3b773b6..a0d01d2 100644
--- a/lib/librte_ethdev/rte_ethdev.h
+++ b/lib/librte_ethdev/rte_ethdev.h
@@ -1588,6 +1588,13 @@ struct rte_eth_dev_info {
};
/**
+ * RX/TX queue states
+ */
+#define RTE_ETH_QUEUE_STATE_STOPPED 0
+#define RTE_ETH_QUEUE_STATE_STARTED 1
+#define RTE_ETH_QUEUE_STATE_HAIRPIN 2
+
+/**
* Ethernet device RX queue information structure.
* Used to retrieve information about configured queue.
*/
@@ -1595,6 +1602,7 @@ struct rte_eth_rxq_info {
struct rte_mempool *mp; /**< mempool used by that queue. */
struct rte_eth_rxconf conf; /**< queue config parameters. */
uint8_t scattered_rx; /**< scattered packets RX supported. */
+ uint8_t queue_state; /**< one of RTE_ETH_QUEUE_STATE_*. */
uint16_t nb_desc; /**< configured number of RXDs. */
uint16_t rx_buf_size; /**< hardware receive buffer size. */
} __rte_cache_min_aligned;
@@ -1606,6 +1614,7 @@ struct rte_eth_rxq_info {
struct rte_eth_txq_info {
struct rte_eth_txconf conf; /**< queue config parameters. */
uint16_t nb_desc; /**< configured number of TXDs. */
+ uint8_t queue_state; /**< one of RTE_ETH_QUEUE_STATE_*. */
} __rte_cache_min_aligned;
/* Generic Burst mode flag definition, values can be ORed. */
--
2.7.4
^ permalink raw reply [relevance 8%]
* Re: [dpdk-dev] [Linuxarm] Re: [PATCH V3] ethdev: add queue state when retrieve queue information
2021-04-16 0:58 0% ` [dpdk-dev] [Linuxarm] " oulijun
@ 2021-04-16 7:31 0% ` Ferruh Yigit
0 siblings, 0 replies; 200+ results
From: Ferruh Yigit @ 2021-04-16 7:31 UTC (permalink / raw)
To: oulijun, linuxarm, dev; +Cc: David Marchand, Ray Kinsella
On 4/16/2021 1:58 AM, oulijun wrote:
>
>
> 在 2021/4/15 20:45, Ferruh Yigit 写道:
>> On 4/15/2021 1:36 PM, Thomas Monjalon wrote:
>>> 15/04/2021 14:33, Ferruh Yigit:
>>>> On 4/15/2021 3:40 AM, Lijun Ou wrote:
>>>>> Currently, upper-layer application could get queue state only
>>>>> through pointers such as dev->data->tx_queue_state[queue_id],
>>>>> this is not the recommended way to access it. So this patch
>>>>> add get queue state when call rte_eth_rx_queue_info_get and
>>>>> rte_eth_tx_queue_info_get API.
>>>>>
>>>>> Note: After add queue_state field, the 'struct rte_eth_rxq_info' size
>>>>> remains 128B, and the 'struct rte_eth_txq_info' size remains 64B, so
>>>>> it could be ABI compatible.
>>>>>
>>>>> Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
>>>>> Signed-off-by: Lijun Ou <oulijun@huawei.com>
>>>>
>>>> Looks good to me, but it is causing an ABI error as we already discussed before
>>>> as that is false positive.
>>>>
>>>>
>>>> Ray, David,
>>>>
>>>> Should we add any exception to libabigail.abignore for this?
>>>
>>> We do not tolerate any ABI warning.
>>> If we are sure the ABI change is false positive,
>>> it must be suppressed in libabigail.abignore in the same patch.
>>>
>>
>> A new field is added to public structs, but struct size or the location of the
>> existing fields are not changing (struct is cache aligned).
>>
>> Can you please support how this can be added to 'libabigail.abignore'?
>>
>> Lijun can you please send a new version with 'libabigail.abignore' update?
>>
> Yes, I can do that. But at the moment I don't know how to update
> libabigil.abinore. I don't know where to modify
> Is there any relevant documentation?
Please check Thomas' response, he already described what needs to be changed.
And for documentation David & Ray may know better.
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH v3 1/1] ethdev: introduce indirect action APIs
2021-04-15 17:59 0% ` Ajit Khaparde
2021-04-16 6:58 0% ` Bing Zhao
@ 2021-04-16 7:03 0% ` Thomas Monjalon
2021-04-16 15:00 0% ` Ajit Khaparde
1 sibling, 1 reply; 200+ results
From: Thomas Monjalon @ 2021-04-16 7:03 UTC (permalink / raw)
To: Ajit Khaparde
Cc: Bing Zhao, dev, Ori Kam, Ferruh Yigit, Andrew Rybchenko,
Matan Azrad, Slava Ovsiienko, dpdk-dev, Gregory Etelson,
Andrey Vesnovaty
15/04/2021 19:59, Ajit Khaparde:
> On Thu, Apr 15, 2021 at 8:52 AM Bing Zhao <bingz@nvidia.com> wrote:
> > There are two types of flow actions:
> > 1. the direct (normal) actions that could be created and stored
> > within a flow rule. Such action is tied to its flow rule and
> > cannot be reused.
> > 2. the indirect action, in the past, named shared_action. It is
> > created from a direct actioni, like count or rss, and then used
> > in the flow rules with an object handle. The PMD will take care
> > of the retrieve from indirect action to the direct action
> > when it is referenced.
[...]
> > The RTE_FLOW_ACTION_TYPE_SHARED is kept for now in order not to
> > break the ABI. All the implementations are changed by using
> > RTE_FLOW_ACTION_TYPE_INDIRECT.
>
> When I read this somehow indirect did not feel right.
> But I don't have a strong suggestion either.
> Since it is a context of action or actions maybe we use action_context?
This is an action which is not directly described in the flow rule,
but in another object referenced by its handle.
It creates a level of indirection in the rule description.
I think the word "indirect" is accurate.
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH v5 1/5] devargs: unify scratch buffer storage
@ 2021-04-16 7:00 3% ` David Marchand
2021-04-16 12:32 0% ` Aaron Conole
0 siblings, 1 reply; 200+ results
From: David Marchand @ 2021-04-16 7:00 UTC (permalink / raw)
To: Aaron Conole, dpdklab
Cc: Thomas Monjalon, Gaetan Rivet, dev, Xueming(Steven) Li,
Asaf Penso, Wenzhuo Lu, Beilei Xing, Bernard Iremonger,
Gaetan Rivet, Anatoly Burakov, Ray Kinsella, Neil Horman,
Ferruh Yigit, Andrew Rybchenko, Dodji Seketeli, ci
On Tue, Apr 13, 2021 at 5:15 AM Xueming Li <xuemingl@nvidia.com> wrote:
> diff --git a/lib/librte_eal/include/rte_devargs.h b/lib/librte_eal/include/rte_devargs.h
> index 296f19324f..134b44a887 100644
> --- a/lib/librte_eal/include/rte_devargs.h
> +++ b/lib/librte_eal/include/rte_devargs.h
> @@ -60,16 +60,16 @@ struct rte_devargs {
> /** Name of the device. */
> char name[RTE_DEV_NAME_MAX_LEN];
> RTE_STD_C11
> - union {
> - /** Arguments string as given by user or "" for no argument. */
> - char *args;
> + union { /**< driver-related part of device string. */
> + const char *args; /**< legacy name. */
> const char *drv_str;
> };
> struct rte_bus *bus; /**< bus handle. */
> struct rte_class *cls; /**< class handle. */
> const char *bus_str; /**< bus-related part of device string. */
> const char *cls_str; /**< class-related part of device string. */
> - const char *data; /**< Device string storage. */
> + char *data;
> + /**< Raw string including bus, class and driver arguments. */
> };
>
> /**
- Flagging this patch for info and its impact on UNH jobs.
This change is fine, but older libabigail versions could not deal with
such changes (anonymous union, changes of const fields).
This results in an ABI check failure in the UNH x86 job on Ubuntu
18.04 (and for some people not using recent libabigail).
I can see the ARM job passes fine, so I suppose it is using a more
recent libabigail (running Ubuntu 20.04 maybe?).
We either need to disable this x86 job or update its libabigail
package (maybe aligning with what we have for public CI which is
libabigail 1.8 manually compiled).
- For the longer term, what do you think of using/extending the .ci/
scripts for use by UNH jobs?
--
David Marchand
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [PATCH v3 1/1] ethdev: introduce indirect action APIs
2021-04-15 17:59 0% ` Ajit Khaparde
@ 2021-04-16 6:58 0% ` Bing Zhao
2021-04-16 7:03 0% ` Thomas Monjalon
1 sibling, 0 replies; 200+ results
From: Bing Zhao @ 2021-04-16 6:58 UTC (permalink / raw)
To: Ajit Khaparde
Cc: Ori Kam, NBU-Contact-Thomas Monjalon, Ferruh Yigit,
Andrew Rybchenko, Matan Azrad, Slava Ovsiienko, dpdk-dev,
Gregory Etelson, Andrey Vesnovaty
Hi Ajit,
> -----Original Message-----
> From: Ajit Khaparde <ajit.khaparde@broadcom.com>
> Sent: Friday, April 16, 2021 2:00 AM
> To: Bing Zhao <bingz@nvidia.com>
> Cc: Ori Kam <orika@nvidia.com>; NBU-Contact-Thomas Monjalon
> <thomas@monjalon.net>; Ferruh Yigit <ferruh.yigit@intel.com>; Andrew
> Rybchenko <andrew.rybchenko@oktetlabs.ru>; Matan Azrad
> <matan@nvidia.com>; Slava Ovsiienko <viacheslavo@nvidia.com>; dpdk-
> dev <dev@dpdk.org>; Gregory Etelson <getelson@nvidia.com>; Andrey
> Vesnovaty <andreyv@nvidia.com>
> Subject: Re: [PATCH v3 1/1] ethdev: introduce indirect action APIs
>
> On Thu, Apr 15, 2021 at 8:52 AM Bing Zhao <bingz@nvidia.com> wrote:
> >
> > Right now, rte_flow_shared_action_* APIs are used for some shared
> > actions, like RSS, count. The shared action should be created
> before
> > using it inside a flow. These shared actions sometimes are not
> > really shared but just some indirect actions decoupled from a flow.
> >
> > The new functions rte_flow_action_handle_* are added to replace
> > the current shared functions rte_flow_shared_action_*.
> >
> > There are two types of flow actions:
> > 1. the direct (normal) actions that could be created and stored
> > within a flow rule. Such action is tied to its flow rule and
> > cannot be reused.
> > 2. the indirect action, in the past, named shared_action. It is
> > created from a direct actioni, like count or rss, and then used
> > in the flow rules with an object handle. The PMD will take care
> > of the retrieve from indirect action to the direct action
> > when it is referenced.
> >
> > The indirect action is accessed (update / query) w/o any flow rule,
> > just via the action object handle. For example, when querying or
> > resetting a counter, it could be done out of any flow using this
> > counter, but only the handle of the counter action object is
> > required.
> > The indirect action object could be shared by different flows or
> > used by a single flow, depending on the direct action type and
> > the real-life requirements.
> > The handle of an indirect action object is opaque and defined in
> > each driver and possibly different per direct action type.
> >
> > The old name "shared" is improper in a sense and should be
> replaced.
> >
> > Since the APIs are changed from "rte_flow_shared_action*" to the
> new
> > "rte_flow_action_handle*", the testpmd application code and
> command
> > line interfaces also need to be updated to do the adaption.
> > The testpmd application user guide is also updated. All the
> "shared
> > action" related parts are replaced with "indirect action" to have
> a
> > correct explanation.
> >
> > The parameter of "update" interface is also changed. A general
> > pointer will replace the rte_flow_action struct pointer due to the
> > facts:
> > 1. Some action may not support fields updating. In the example of
> a
> > counter, the only "update" supported should be the reset. So
> > passing a rte_flow_action struct pointer is meaningless and
> > there is even no such corresponding action struct. What's more,
> > if more than one operations should be supported, for some other
> > action, such pointer parameter may not meet the need.
> > 2. Some action may need conditional or partial update, the current
> > parameter will not provide the ability to indicate which part(s)
> > to update.
> > For different types of indirect action objects, the pointer
> could
> > either be the same of rte_flow_action* struct - in order not to
> > break the current driver implementation, or some wrapper
> > structures with bits as masks to indicate which part to be
> > updated, depending on real needs of the corresponding direct
> > action. For different direct actions, the structures of
> indirect
> > action objects updating will be different.
> >
> > All the underlayer PMD callbacks will be moved to these new APIs.
> >
> > The RTE_FLOW_ACTION_TYPE_SHARED is kept for now in order not to
> > break the ABI. All the implementations are changed by using
> > RTE_FLOW_ACTION_TYPE_INDIRECT.
> When I read this somehow indirect did not feel right.
> But I don't have a strong suggestion either.
> Since it is a context of action or actions maybe we use
> action_context?
>
The original RFC use the naming proposal "action_context", then there were some comments that it was not as good as "shared action".
The "indirect action" may describe the behavior of the action better than "shared" to my understanding.
In the email from Thomas, the comments may explain it better than mine:
" The difference is that indirect action is not only for sharing.
It allows manipulating an action as an object.
Action object is inserted in flow rules through the indirect action.
Does it make it clearer?"
What do you think?
> >
> > Since the APIs are changed from "rte_flow_shared_action*" to the
> new
> > "rte_flow_action_handle*" and the "update" interface's 3rd input
> > parameter is changed to generic pointer, the mlx5 PMD that uses
> these
> > APIs needs to do the adaption to the new APIs as well.
> >
> > Signed-off-by: Bing Zhao <bingz@nvidia.com>
> > Acked-by: Andrey Vesnovaty <andreyv@nvidia.com>
BR. Bing
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH v2 1/2] ci: fix ABI reference generation
2021-04-15 19:43 8% ` [dpdk-dev] [PATCH v2 1/2] ci: fix ABI reference generation David Marchand
2021-04-15 19:43 7% ` [dpdk-dev] [PATCH v2 2/2] ci: bump ABI reference version David Marchand
@ 2021-04-16 6:39 4% ` Juraj Linkeš
2021-04-16 9:17 4% ` David Marchand
1 sibling, 1 reply; 200+ results
From: Juraj Linkeš @ 2021-04-16 6:39 UTC (permalink / raw)
To: David Marchand, dev
Cc: thomas, mdr, Aaron Conole, Michael Santana, Honnappa Nagarahalli,
Bruce Richardson
> -----Original Message-----
> From: David Marchand <david.marchand@redhat.com>
> Sent: Thursday, April 15, 2021 9:43 PM
> To: dev@dpdk.org
> Cc: thomas@monjalon.net; mdr@ashroe.eu; Aaron Conole
> <aconole@redhat.com>; Michael Santana <maicolgabriel@hotmail.com>; Juraj
> Linkeš <juraj.linkes@pantheon.tech>; Honnappa Nagarahalli
> <honnappa.nagarahalli@arm.com>; Bruce Richardson
> <bruce.richardson@intel.com>
> Subject: [PATCH v2 1/2] ci: fix ABI reference generation
>
> The machine=generic is not understood by older version of dpdk.
> It is directly passed to gcc as -march=generic.
>
> Since DPDK requires SSE 4.2, this results in an error when configuring
> v21.02 sources for generating the reference ABI.
>
> From GHA [1] logs:
>
> """
> Compiler for C supports arguments -Wundef: YES Compiler for C supports
> arguments -Wwrite-strings: YES Compiler for C supports arguments -Wno-
> address-of-packed-member
> -Waddress-of-packed-member: NO
> Compiler for C supports arguments -Wno-packed-not-aligned
> -Wpacked-not-aligned: NO
> Compiler for C supports arguments -Wno-missing-field-initializers
> -Wmissing-field-initializers: YES
>
> config/x86/meson.build:14:6: ERROR: Could not get define '__SSE4_2__'
>
> A full log can be found at
> /home/runner/work/dpdk/dpdk-v21.02/build/meson-logs/meson-log.txt
> Error: Process completed with exit code 1.
> """
>
> 1: https://github.com/ovsrobot/dpdk/runs/2355005702
>
> Stick to a compatible configuration passing -Dmachine=default.
>
> Note: the breakage was not seen earlier this week as I guess the CI workers are
> using a cached ABI reference for v20.11.
>
> Fixes: 5b3a6ca6fd28 ("build: alias default build as generic")
>
> Signed-off-by: David Marchand <david.marchand@redhat.com>
Reviewed-by: Juraj Linkeš <juraj.linkes@pantheon.tech>
Do we want to change this back to -Dmachine=generic after next release?
> ---
> .ci/linux-build.sh | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/.ci/linux-build.sh b/.ci/linux-build.sh index 3cbeb193a1..91e43a975b
> 100755
> --- a/.ci/linux-build.sh
> +++ b/.ci/linux-build.sh
> @@ -77,7 +77,7 @@ else
> OPTS="$OPTS -Dexamples=all"
> fi
>
> -OPTS="$OPTS -Dmachine=generic"
> +OPTS="$OPTS -Dmachine=default"
> OPTS="$OPTS --default-library=$DEF_LIB"
> OPTS="$OPTS --buildtype=debugoptimized"
> OPTS="$OPTS -Dcheck_includes=true"
> --
> 2.23.0
>
^ permalink raw reply [relevance 4%]
* Re: [dpdk-dev] [Linuxarm] Re: [PATCH V3] ethdev: add queue state when retrieve queue information
2021-04-15 12:45 0% ` Ferruh Yigit
2021-04-15 13:34 3% ` Thomas Monjalon
@ 2021-04-16 0:58 0% ` oulijun
2021-04-16 7:31 0% ` Ferruh Yigit
1 sibling, 1 reply; 200+ results
From: oulijun @ 2021-04-16 0:58 UTC (permalink / raw)
To: linuxarm, dev, Ferruh Yigit
在 2021/4/15 20:45, Ferruh Yigit 写道:
> On 4/15/2021 1:36 PM, Thomas Monjalon wrote:
>> 15/04/2021 14:33, Ferruh Yigit:
>>> On 4/15/2021 3:40 AM, Lijun Ou wrote:
>>>> Currently, upper-layer application could get queue state only
>>>> through pointers such as dev->data->tx_queue_state[queue_id],
>>>> this is not the recommended way to access it. So this patch
>>>> add get queue state when call rte_eth_rx_queue_info_get and
>>>> rte_eth_tx_queue_info_get API.
>>>>
>>>> Note: After add queue_state field, the 'struct rte_eth_rxq_info' size
>>>> remains 128B, and the 'struct rte_eth_txq_info' size remains 64B, so
>>>> it could be ABI compatible.
>>>>
>>>> Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
>>>> Signed-off-by: Lijun Ou <oulijun@huawei.com>
>>>
>>> Looks good to me, but it is causing an ABI error as we already
>>> discussed before
>>> as that is false positive.
>>>
>>>
>>> Ray, David,
>>>
>>> Should we add any exception to libabigail.abignore for this?
>>
>> We do not tolerate any ABI warning.
>> If we are sure the ABI change is false positive,
>> it must be suppressed in libabigail.abignore in the same patch.
>>
>
> A new field is added to public structs, but struct size or the location
> of the existing fields are not changing (struct is cache aligned).
>
> Can you please support how this can be added to 'libabigail.abignore'?
>
> Lijun can you please send a new version with 'libabigail.abignore' update?
>
Yes, I can do that. But at the moment I don't know how to update
libabigil.abinore. I don't know where to modify
Is there any relevant documentation?
> Thanks,
> ferruh
> _______________________________________________
> Linuxarm mailing list -- linuxarm@openeuler.org
> To unsubscribe send an email to linuxarm-leave@openeuler.org
^ permalink raw reply [relevance 0%]
* [dpdk-dev] [PATCH v2 2/2] ci: bump ABI reference version
2021-04-15 19:43 8% ` [dpdk-dev] [PATCH v2 1/2] ci: fix ABI reference generation David Marchand
@ 2021-04-15 19:43 7% ` David Marchand
2021-04-16 12:11 4% ` David Marchand
2021-04-16 6:39 4% ` [dpdk-dev] [PATCH v2 1/2] ci: fix ABI reference generation Juraj Linkeš
1 sibling, 1 reply; 200+ results
From: David Marchand @ 2021-04-15 19:43 UTC (permalink / raw)
To: dev; +Cc: thomas, mdr, Aaron Conole, Michael Santana
When bumping DPDK version, we should have bumped the ABI reference too.
Fixes: 442155f70c6b ("version: 21.05-rc0")
Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
---
.github/workflows/build.yml | 2 +-
.travis.yml | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml
index 9175ec43d3..d38feace69 100644
--- a/.github/workflows/build.yml
+++ b/.github/workflows/build.yml
@@ -21,7 +21,7 @@ jobs:
CC: ccache ${{ matrix.config.compiler }}
DEF_LIB: ${{ matrix.config.library }}
LIBABIGAIL_VERSION: libabigail-1.8
- REF_GIT_TAG: v20.11
+ REF_GIT_TAG: v21.02
RUN_TESTS: ${{ contains(matrix.config.checks, 'tests') }}
strategy:
diff --git a/.travis.yml b/.travis.yml
index 7ed982ac07..898cffd998 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -41,7 +41,7 @@ script: ./.ci/${TRAVIS_OS_NAME}-build.sh
env:
global:
- LIBABIGAIL_VERSION=libabigail-1.8
- - REF_GIT_TAG=v20.11
+ - REF_GIT_TAG=v21.02
jobs:
include:
--
2.23.0
^ permalink raw reply [relevance 7%]
* [dpdk-dev] [PATCH v2 1/2] ci: fix ABI reference generation
2021-04-15 16:32 7% [dpdk-dev] [PATCH] ci: bump ABI reference version David Marchand
` (2 preceding siblings ...)
2021-04-15 19:40 7% ` [dpdk-dev] [PATCH v2 2/2] ci: bump ABI reference version David Marchand
@ 2021-04-15 19:43 8% ` David Marchand
2021-04-15 19:43 7% ` [dpdk-dev] [PATCH v2 2/2] ci: bump ABI reference version David Marchand
2021-04-16 6:39 4% ` [dpdk-dev] [PATCH v2 1/2] ci: fix ABI reference generation Juraj Linkeš
3 siblings, 2 replies; 200+ results
From: David Marchand @ 2021-04-15 19:43 UTC (permalink / raw)
To: dev
Cc: thomas, mdr, Aaron Conole, Michael Santana, Juraj Linkeš,
Honnappa Nagarahalli, Bruce Richardson
The machine=generic is not understood by older version of dpdk.
It is directly passed to gcc as -march=generic.
Since DPDK requires SSE 4.2, this results in an error when configuring
v21.02 sources for generating the reference ABI.
From GHA [1] logs:
"""
Compiler for C supports arguments -Wundef: YES
Compiler for C supports arguments -Wwrite-strings: YES
Compiler for C supports arguments -Wno-address-of-packed-member
-Waddress-of-packed-member: NO
Compiler for C supports arguments -Wno-packed-not-aligned
-Wpacked-not-aligned: NO
Compiler for C supports arguments -Wno-missing-field-initializers
-Wmissing-field-initializers: YES
config/x86/meson.build:14:6: ERROR: Could not get define '__SSE4_2__'
A full log can be found at
/home/runner/work/dpdk/dpdk-v21.02/build/meson-logs/meson-log.txt
Error: Process completed with exit code 1.
"""
1: https://github.com/ovsrobot/dpdk/runs/2355005702
Stick to a compatible configuration passing -Dmachine=default.
Note: the breakage was not seen earlier this week as I guess the CI
workers are using a cached ABI reference for v20.11.
Fixes: 5b3a6ca6fd28 ("build: alias default build as generic")
Signed-off-by: David Marchand <david.marchand@redhat.com>
---
.ci/linux-build.sh | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/.ci/linux-build.sh b/.ci/linux-build.sh
index 3cbeb193a1..91e43a975b 100755
--- a/.ci/linux-build.sh
+++ b/.ci/linux-build.sh
@@ -77,7 +77,7 @@ else
OPTS="$OPTS -Dexamples=all"
fi
-OPTS="$OPTS -Dmachine=generic"
+OPTS="$OPTS -Dmachine=default"
OPTS="$OPTS --default-library=$DEF_LIB"
OPTS="$OPTS --buildtype=debugoptimized"
OPTS="$OPTS -Dcheck_includes=true"
--
2.23.0
^ permalink raw reply [relevance 8%]
* [dpdk-dev] [PATCH v2 2/2] ci: bump ABI reference version
2021-04-15 16:32 7% [dpdk-dev] [PATCH] ci: bump ABI reference version David Marchand
2021-04-15 16:57 7% ` Thomas Monjalon
2021-04-15 19:38 8% ` [dpdk-dev] [PATCH v2 1/2] ci: fix ABI reference generation David Marchand
@ 2021-04-15 19:40 7% ` David Marchand
2021-04-15 19:43 8% ` [dpdk-dev] [PATCH v2 1/2] ci: fix ABI reference generation David Marchand
3 siblings, 0 replies; 200+ results
From: David Marchand @ 2021-04-15 19:40 UTC (permalink / raw)
To: dev; +Cc: thomas, mdr, Aaron Conole, Michael Santana
When bumping DPDK version, we should have bumped the ABI reference too.
Fixes: 442155f70c6b ("version: 21.05-rc0")
Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
---
.github/workflows/build.yml | 2 +-
.travis.yml | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml
index 9175ec43d3..d38feace69 100644
--- a/.github/workflows/build.yml
+++ b/.github/workflows/build.yml
@@ -21,7 +21,7 @@ jobs:
CC: ccache ${{ matrix.config.compiler }}
DEF_LIB: ${{ matrix.config.library }}
LIBABIGAIL_VERSION: libabigail-1.8
- REF_GIT_TAG: v20.11
+ REF_GIT_TAG: v21.02
RUN_TESTS: ${{ contains(matrix.config.checks, 'tests') }}
strategy:
diff --git a/.travis.yml b/.travis.yml
index 7ed982ac07..898cffd998 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -41,7 +41,7 @@ script: ./.ci/${TRAVIS_OS_NAME}-build.sh
env:
global:
- LIBABIGAIL_VERSION=libabigail-1.8
- - REF_GIT_TAG=v20.11
+ - REF_GIT_TAG=v21.02
jobs:
include:
--
2.23.0
^ permalink raw reply [relevance 7%]
* [dpdk-dev] [PATCH v2 1/2] ci: fix ABI reference generation
2021-04-15 16:32 7% [dpdk-dev] [PATCH] ci: bump ABI reference version David Marchand
2021-04-15 16:57 7% ` Thomas Monjalon
@ 2021-04-15 19:38 8% ` David Marchand
2021-04-15 19:40 7% ` [dpdk-dev] [PATCH v2 2/2] ci: bump ABI reference version David Marchand
2021-04-15 19:43 8% ` [dpdk-dev] [PATCH v2 1/2] ci: fix ABI reference generation David Marchand
3 siblings, 0 replies; 200+ results
From: David Marchand @ 2021-04-15 19:38 UTC (permalink / raw)
To: dev
Cc: thomas, mdr, Aaron Conole, Michael Santana, Juraj Linkeš,
Honnappa Nagarahalli, Bruce Richardson
The machine=generic is not understood by older version of dpdk.
It is directly passed to gcc as -march=generic.
Since DPDK requires SSE 4.2, this results in an error when configuring
v21.02 sources for generating the reference ABI.
From GHA [1] logs:
"""
Compiler for C supports arguments -Wundef: YES
Compiler for C supports arguments -Wwrite-strings: YES
Compiler for C supports arguments -Wno-address-of-packed-member
-Waddress-of-packed-member: NO
Compiler for C supports arguments -Wno-packed-not-aligned
-Wpacked-not-aligned: NO
Compiler for C supports arguments -Wno-missing-field-initializers
-Wmissing-field-initializers: YES
config/x86/meson.build:14:6: ERROR: Could not get define '__SSE4_2__'
A full log can be found at
/home/runner/work/dpdk/dpdk-v21.02/build/meson-logs/meson-log.txt
Error: Process completed with exit code 1.
"""
1: https://github.com/ovsrobot/dpdk/runs/2355005702
Stick to a compatible configuration passing -Dmachine=default.
Note: the breakage was not seen earlier this week as I guess the CI
workers are using a cached ABI reference for v20.11.
Fixes: 5b3a6ca6fd28 ("build: alias default build as generic")
Signed-off-by: David Marchand <david.marchand@redhat.com>
---
.ci/linux-build.sh | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/.ci/linux-build.sh b/.ci/linux-build.sh
index 3cbeb193a1..91e43a975b 100755
--- a/.ci/linux-build.sh
+++ b/.ci/linux-build.sh
@@ -77,7 +77,7 @@ else
OPTS="$OPTS -Dexamples=all"
fi
-OPTS="$OPTS -Dmachine=generic"
+OPTS="$OPTS -Dmachine=default"
OPTS="$OPTS --default-library=$DEF_LIB"
OPTS="$OPTS --buildtype=debugoptimized"
OPTS="$OPTS -Dcheck_includes=true"
--
2.23.0
^ permalink raw reply [relevance 8%]
* Re: [dpdk-dev] [EXT] [PATCH v5] cryptodev: support multiple cipher data-units
2021-04-15 19:01 3% ` Akhil Goyal
@ 2021-04-15 19:31 0% ` David Marchand
0 siblings, 0 replies; 200+ results
From: David Marchand @ 2021-04-15 19:31 UTC (permalink / raw)
To: Akhil Goyal
Cc: Thomas Monjalon, dev, matan, Ray Kinsella, Neil Horman,
Declan Doherty, Aaron Conole, Dodji Seketeli, Yigit, Ferruh
On Thu, Apr 15, 2021 at 9:01 PM Akhil Goyal <gakhil@marvell.com> wrote:
> This patch is causing ABI breakage at my end, but since CI is passing, I am applying this patch.
> I believe my libabigail version is older than what CI is using.
I discussed this earlier with Thomas.
This is likely the use of anonymous struct/union that was not
understood by libabigail until recently.
The public CI (Travis and GHA) uses libabigail 1.8.
--
David Marchand
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH] ci: bump ABI reference version
2021-04-15 16:57 7% ` Thomas Monjalon
@ 2021-04-15 19:28 7% ` David Marchand
0 siblings, 0 replies; 200+ results
From: David Marchand @ 2021-04-15 19:28 UTC (permalink / raw)
To: Thomas Monjalon; +Cc: dev, Ray Kinsella, Aaron Conole, Michael Santana
On Thu, Apr 15, 2021 at 6:57 PM Thomas Monjalon <thomas@monjalon.net> wrote:
>
> 15/04/2021 18:32, David Marchand:
> > When bumping DPDK version, we should have bumped the ABI reference too.
> >
> > Fixes: 442155f70c6b ("version: 21.05-rc0")
> >
> > Signed-off-by: David Marchand <david.marchand@redhat.com>
> > ---
> > - REF_GIT_TAG: v20.11
> > + REF_GIT_TAG: v21.02
>
> Yes, checking against 21.02 may catch breakage of ABI
> added in 21.02.
>
> Acked-by: Thomas Monjalon <thomas@monjalon.net>
Unfortunately, we have a regression when (re)generating a ABI
reference in the CI script (compat issue with -Dmachine=generic that
is not understood by v21.02).
Testing the fix, will post later.
--
David Marchand
^ permalink raw reply [relevance 7%]
* Re: [dpdk-dev] [EXT] [PATCH v5] cryptodev: support multiple cipher data-units
2021-04-15 8:35 0% ` [dpdk-dev] [EXT] " Akhil Goyal
@ 2021-04-15 19:01 3% ` Akhil Goyal
2021-04-15 19:31 0% ` David Marchand
0 siblings, 1 reply; 200+ results
From: Akhil Goyal @ 2021-04-15 19:01 UTC (permalink / raw)
To: Akhil Goyal, Thomas Monjalon, dev, matan
Cc: Ray Kinsella, Neil Horman, Declan Doherty
> > From: Matan Azrad <matan@nvidia.com>
> >
> > In cryptography, a block cipher is a deterministic algorithm operating
> > on fixed-length groups of bits, called blocks.
> >
> > A block cipher consists of two paired algorithms, one for encryption
> > and the other for decryption. Both algorithms accept two inputs:
> > an input block of size n bits and a key of size k bits; and both yield
> > an n-bit output block. The decryption algorithm is defined to be the
> > inverse function of the encryption.
> >
> > For AES standard the block size is 16 bytes.
> > For AES in XTS mode, the data to be encrypted\decrypted does not have to
> > be multiple of 16B size, the unit of data is called data-unit.
> > The data-unit size can be any size in range [16B, 2^24B], so, in this
> > case, a data stream is divided into N amount of equal data-units and
> > must be encrypted\decrypted in the same data-unit resolution.
> >
> > For ABI compatibility reason, the size is limited to 64K (16-bit field).
> > The new field dataunit_len is inserted in a struct padding hole,
> > which is only 2 bytes long in 32-bit build.
> > It could be moved and extended later during an ABI-breakage window.
> >
> > The current cryptodev API doesn't allow the user to select a specific
> > data-unit length supported by the devices.
> > In addition, there is no definition how the IV is detected per data-unit
> > when single operation includes more than one data-unit.
> >
> > That causes applications to use single operation per data-unit even though
> > all the data is continuous in memory what reduces datapath performance.
> >
> > Add a new feature flag to support multiple data-unit sizes, called
> > RTE_CRYPTODEV_FF_CIPHER_MULTIPLE_DATA_UNITS.
> > Add a new field in cipher capability, called dataunit_set,
> > where the devices can report the range of the supported data-unit sizes.
> > Add a new cipher transformation field, called dataunit_len, where the user
> > can select the data-unit length for all the operations.
> >
> > All the new fields do not change the size of their structures,
> > by filling some struct padding holes.
> > They are added as exceptions in the ABI check file libabigail.abignore.
> >
> > Using a bitmap to report the supported data-unit sizes capability allows
> > the devices to report a range simply as same as the user to read it
> > simply. also, thus sizes are usually common and probably will be shared
> > among different devices.
> >
> > Signed-off-by: Matan Azrad <matan@nvidia.com>
> > Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
> > ---
> Acked-by: Akhil Goyal <gakhil@marvell.com>
Applied to dpdk-next-crypto
This patch is causing ABI breakage at my end, but since CI is passing, I am applying this patch.
I believe my libabigail version is older than what CI is using.
@thomas : Please pull crypto tree to main and send the dependent patches again so that CI can run on them.
Regards,
Akhil
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [PATCH v3 1/1] ethdev: introduce indirect action APIs
2021-04-15 15:51 1% ` [dpdk-dev] [PATCH v3 1/1] ethdev: introduce indirect action APIs Bing Zhao
2021-04-15 15:56 0% ` Ori Kam
@ 2021-04-15 17:59 0% ` Ajit Khaparde
2021-04-16 6:58 0% ` Bing Zhao
2021-04-16 7:03 0% ` Thomas Monjalon
1 sibling, 2 replies; 200+ results
From: Ajit Khaparde @ 2021-04-15 17:59 UTC (permalink / raw)
To: Bing Zhao
Cc: Ori Kam, Thomas Monjalon, Ferruh Yigit, Andrew Rybchenko,
Matan Azrad, Slava Ovsiienko, dpdk-dev, Gregory Etelson,
Andrey Vesnovaty
[-- Attachment #1: Type: text/plain, Size: 3892 bytes --]
On Thu, Apr 15, 2021 at 8:52 AM Bing Zhao <bingz@nvidia.com> wrote:
>
> Right now, rte_flow_shared_action_* APIs are used for some shared
> actions, like RSS, count. The shared action should be created before
> using it inside a flow. These shared actions sometimes are not
> really shared but just some indirect actions decoupled from a flow.
>
> The new functions rte_flow_action_handle_* are added to replace
> the current shared functions rte_flow_shared_action_*.
>
> There are two types of flow actions:
> 1. the direct (normal) actions that could be created and stored
> within a flow rule. Such action is tied to its flow rule and
> cannot be reused.
> 2. the indirect action, in the past, named shared_action. It is
> created from a direct actioni, like count or rss, and then used
> in the flow rules with an object handle. The PMD will take care
> of the retrieve from indirect action to the direct action
> when it is referenced.
>
> The indirect action is accessed (update / query) w/o any flow rule,
> just via the action object handle. For example, when querying or
> resetting a counter, it could be done out of any flow using this
> counter, but only the handle of the counter action object is
> required.
> The indirect action object could be shared by different flows or
> used by a single flow, depending on the direct action type and
> the real-life requirements.
> The handle of an indirect action object is opaque and defined in
> each driver and possibly different per direct action type.
>
> The old name "shared" is improper in a sense and should be replaced.
>
> Since the APIs are changed from "rte_flow_shared_action*" to the new
> "rte_flow_action_handle*", the testpmd application code and command
> line interfaces also need to be updated to do the adaption.
> The testpmd application user guide is also updated. All the "shared
> action" related parts are replaced with "indirect action" to have a
> correct explanation.
>
> The parameter of "update" interface is also changed. A general
> pointer will replace the rte_flow_action struct pointer due to the
> facts:
> 1. Some action may not support fields updating. In the example of a
> counter, the only "update" supported should be the reset. So
> passing a rte_flow_action struct pointer is meaningless and
> there is even no such corresponding action struct. What's more,
> if more than one operations should be supported, for some other
> action, such pointer parameter may not meet the need.
> 2. Some action may need conditional or partial update, the current
> parameter will not provide the ability to indicate which part(s)
> to update.
> For different types of indirect action objects, the pointer could
> either be the same of rte_flow_action* struct - in order not to
> break the current driver implementation, or some wrapper
> structures with bits as masks to indicate which part to be
> updated, depending on real needs of the corresponding direct
> action. For different direct actions, the structures of indirect
> action objects updating will be different.
>
> All the underlayer PMD callbacks will be moved to these new APIs.
>
> The RTE_FLOW_ACTION_TYPE_SHARED is kept for now in order not to
> break the ABI. All the implementations are changed by using
> RTE_FLOW_ACTION_TYPE_INDIRECT.
When I read this somehow indirect did not feel right.
But I don't have a strong suggestion either.
Since it is a context of action or actions maybe we use action_context?
>
> Since the APIs are changed from "rte_flow_shared_action*" to the new
> "rte_flow_action_handle*" and the "update" interface's 3rd input
> parameter is changed to generic pointer, the mlx5 PMD that uses these
> APIs needs to do the adaption to the new APIs as well.
>
> Signed-off-by: Bing Zhao <bingz@nvidia.com>
> Acked-by: Andrey Vesnovaty <andreyv@nvidia.com>
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH] ci: bump ABI reference version
2021-04-15 16:32 7% [dpdk-dev] [PATCH] ci: bump ABI reference version David Marchand
@ 2021-04-15 16:57 7% ` Thomas Monjalon
2021-04-15 19:28 7% ` David Marchand
2021-04-15 19:38 8% ` [dpdk-dev] [PATCH v2 1/2] ci: fix ABI reference generation David Marchand
` (2 subsequent siblings)
3 siblings, 1 reply; 200+ results
From: Thomas Monjalon @ 2021-04-15 16:57 UTC (permalink / raw)
To: David Marchand; +Cc: dev, mdr, Aaron Conole, Michael Santana
15/04/2021 18:32, David Marchand:
> When bumping DPDK version, we should have bumped the ABI reference too.
>
> Fixes: 442155f70c6b ("version: 21.05-rc0")
>
> Signed-off-by: David Marchand <david.marchand@redhat.com>
> ---
> - REF_GIT_TAG: v20.11
> + REF_GIT_TAG: v21.02
Yes, checking against 21.02 may catch breakage of ABI
added in 21.02.
Acked-by: Thomas Monjalon <thomas@monjalon.net>
^ permalink raw reply [relevance 7%]
* [dpdk-dev] [PATCH] ci: bump ABI reference version
@ 2021-04-15 16:32 7% David Marchand
2021-04-15 16:57 7% ` Thomas Monjalon
` (3 more replies)
0 siblings, 4 replies; 200+ results
From: David Marchand @ 2021-04-15 16:32 UTC (permalink / raw)
To: dev; +Cc: thomas, mdr, Aaron Conole, Michael Santana
When bumping DPDK version, we should have bumped the ABI reference too.
Fixes: 442155f70c6b ("version: 21.05-rc0")
Signed-off-by: David Marchand <david.marchand@redhat.com>
---
.github/workflows/build.yml | 2 +-
.travis.yml | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml
index 9175ec43d3..d38feace69 100644
--- a/.github/workflows/build.yml
+++ b/.github/workflows/build.yml
@@ -21,7 +21,7 @@ jobs:
CC: ccache ${{ matrix.config.compiler }}
DEF_LIB: ${{ matrix.config.library }}
LIBABIGAIL_VERSION: libabigail-1.8
- REF_GIT_TAG: v20.11
+ REF_GIT_TAG: v21.02
RUN_TESTS: ${{ contains(matrix.config.checks, 'tests') }}
strategy:
diff --git a/.travis.yml b/.travis.yml
index 7ed982ac07..898cffd998 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -41,7 +41,7 @@ script: ./.ci/${TRAVIS_OS_NAME}-build.sh
env:
global:
- LIBABIGAIL_VERSION=libabigail-1.8
- - REF_GIT_TAG=v20.11
+ - REF_GIT_TAG=v21.02
jobs:
include:
--
2.23.0
^ permalink raw reply [relevance 7%]
* Re: [dpdk-dev] [PATCH v2 1/4] ethdev: introduce indirect action APIs
2021-04-15 14:10 0% ` Thomas Monjalon
@ 2021-04-15 16:02 0% ` Andrew Rybchenko
0 siblings, 0 replies; 200+ results
From: Andrew Rybchenko @ 2021-04-15 16:02 UTC (permalink / raw)
To: Thomas Monjalon, Bing Zhao
Cc: orika, ferruh.yigit, matan, viacheslavo, dev, ajit.khaparde,
getelson, andreyv
On 4/15/21 5:10 PM, Thomas Monjalon wrote:
> 15/04/2021 15:55, Andrew Rybchenko:
>> On 4/10/21 5:03 PM, Bing Zhao wrote:
>>> Right now, rte_flow_shared_action_* APIs are used for some shared
>>> actions, like RSS, count. The shared action should be created before
>>> using it inside a flow. These shared actions sometimes are not
>>> really shared but just some indirect actions decoupled from a flow.
>>>
>>> The new functions rte_flow_action_handle_* are added to replace
>>> the current shared functions rte_flow_shared_action_*.
>>>
>>> There are two types of flow actions:
>>> 1. the direct (normal) actions that could be created and stored
>>> within a flow rule. Such action is tied to its flow rule and
>>> cannot be reused.
>>> 2. the indirect action, in the past, named shared_action. It is
>>> created from a direct actioni, like count or rss, and then used
>>> in the flow rules with an object handle. The PMD will take care
>>> of the retrieve from indirect action to the direct action
>>> when it is referenced.
>>>
>>> The indirect action is accessed (update / query) w/o any flow rule,
>>> just via the action object handle. For example, when querying or
>>> resetting a counter, it could be done out of any flow using this
>>> counter, but only the handle of the counter action object is
>>> required.
>>> The indirect action object could be shared by different flows or
>>> used by a single flow, depending on the direct action type and
>>> the real-life requirements.
>>> The handle of an indirect action object is opaque and defined in
>>> each driver and possibly different per direct action type.
>>>
>>> The old name "shared" is improper in a sense and should be replaced.
>>>
>>> All the command lines in testpmd application with "shared_action*"
>>> are replaced with "indirect_action*".
>>>
>>> The parameter of "update" interface is also changed. A general
>>> pointer will replace the rte_flow_action struct pointer due to the
>>> facts:
>>> 1. Some action may not support fields updating. In the example of a
>>> counter, the only "update" supported should be the reset. So
>>> passing a rte_flow_action struct pointer is meaningless and
>>> there is even no such corresponding action struct. What's more,
>>> if more than one operations should be supported, for some other
>>> action, such pointer parameter may not meet the need.
>>> 2. Some action may need conditional or partial update, the current
>>> parameter will not provide the ability to indicate which part(s)
>>> to update.
>>> For different types of indirect action objects, the pointer could
>>> either be the same of rte_flow_action* struct - in order not to
>>> break the current driver implementation, or some wrapper
>>> structures with bits as masks to indicate which part to be
>>> updated, depending on real needs of the corresponding direct
>>> action. For different direct actions, the structures of indirect
>>> action objects updating will be different.
>>>
>>> All the underlayer PMD callbacks will be moved to these new APIs.
>>>
>>> The RTE_FLOW_ACTION_TYPE_SHARED is kept for now in order not to
>>> break the ABI. All the implementations are changed by using
>>> RTE_FLOW_ACTION_TYPE_INDIRECT.
>>>
>>> Signed-off-by: Bing Zhao <bingz@nvidia.com>
>>
>> Just for the record. I still dislike renaming since "shared" highlights
>> purpose (what is definitely better), but "indirect" is just a technical
>> detail on how it is done.
>
> The difference is that indirect action is not only for sharing.
> It allows manipulating an action as an object.
> Action object is inserted in flow rules through the indirect action.
> Does it make it clearer?
>
Yes, I see thanks.
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH v3 1/1] ethdev: introduce indirect action APIs
2021-04-15 15:51 1% ` [dpdk-dev] [PATCH v3 1/1] ethdev: introduce indirect action APIs Bing Zhao
@ 2021-04-15 15:56 0% ` Ori Kam
2021-04-15 17:59 0% ` Ajit Khaparde
1 sibling, 0 replies; 200+ results
From: Ori Kam @ 2021-04-15 15:56 UTC (permalink / raw)
To: Bing Zhao, NBU-Contact-Thomas Monjalon, ferruh.yigit,
andrew.rybchenko, Matan Azrad, Slava Ovsiienko
Cc: dev, ajit.khaparde, Gregory Etelson, Andrey Vesnovaty
Hi Bing
> -----Original Message-----
> From: Bing Zhao <bingz@nvidia.com>
> Sent: Thursday, April 15, 2021 6:52 PM
> Subject: [PATCH v3 1/1] ethdev: introduce indirect action APIs
>
> Right now, rte_flow_shared_action_* APIs are used for some shared
> actions, like RSS, count. The shared action should be created before
> using it inside a flow. These shared actions sometimes are not
> really shared but just some indirect actions decoupled from a flow.
>
> The new functions rte_flow_action_handle_* are added to replace
> the current shared functions rte_flow_shared_action_*.
>
> There are two types of flow actions:
> 1. the direct (normal) actions that could be created and stored
> within a flow rule. Such action is tied to its flow rule and
> cannot be reused.
> 2. the indirect action, in the past, named shared_action. It is
> created from a direct actioni, like count or rss, and then used
> in the flow rules with an object handle. The PMD will take care
> of the retrieve from indirect action to the direct action
> when it is referenced.
>
> The indirect action is accessed (update / query) w/o any flow rule,
> just via the action object handle. For example, when querying or
> resetting a counter, it could be done out of any flow using this
> counter, but only the handle of the counter action object is
> required.
> The indirect action object could be shared by different flows or
> used by a single flow, depending on the direct action type and
> the real-life requirements.
> The handle of an indirect action object is opaque and defined in
> each driver and possibly different per direct action type.
>
> The old name "shared" is improper in a sense and should be replaced.
>
> Since the APIs are changed from "rte_flow_shared_action*" to the new
> "rte_flow_action_handle*", the testpmd application code and command
> line interfaces also need to be updated to do the adaption.
> The testpmd application user guide is also updated. All the "shared
> action" related parts are replaced with "indirect action" to have a
> correct explanation.
>
> The parameter of "update" interface is also changed. A general
> pointer will replace the rte_flow_action struct pointer due to the
> facts:
> 1. Some action may not support fields updating. In the example of a
> counter, the only "update" supported should be the reset. So
> passing a rte_flow_action struct pointer is meaningless and
> there is even no such corresponding action struct. What's more,
> if more than one operations should be supported, for some other
> action, such pointer parameter may not meet the need.
> 2. Some action may need conditional or partial update, the current
> parameter will not provide the ability to indicate which part(s)
> to update.
> For different types of indirect action objects, the pointer could
> either be the same of rte_flow_action* struct - in order not to
> break the current driver implementation, or some wrapper
> structures with bits as masks to indicate which part to be
> updated, depending on real needs of the corresponding direct
> action. For different direct actions, the structures of indirect
> action objects updating will be different.
>
> All the underlayer PMD callbacks will be moved to these new APIs.
>
> The RTE_FLOW_ACTION_TYPE_SHARED is kept for now in order not to
> break the ABI. All the implementations are changed by using
> RTE_FLOW_ACTION_TYPE_INDIRECT.
>
> Since the APIs are changed from "rte_flow_shared_action*" to the new
> "rte_flow_action_handle*" and the "update" interface's 3rd input
> parameter is changed to generic pointer, the mlx5 PMD that uses these
> APIs needs to do the adaption to the new APIs as well.
>
> Signed-off-by: Bing Zhao <bingz@nvidia.com>
> Acked-by: Andrey Vesnovaty <andreyv@nvidia.com>
> ---
Acked-by: Ori Kam <orika@nvidia.com>
Thanks,
Ori
^ permalink raw reply [relevance 0%]
* [dpdk-dev] [PATCH v3 1/1] ethdev: introduce indirect action APIs
@ 2021-04-15 15:51 1% ` Bing Zhao
2021-04-15 15:56 0% ` Ori Kam
2021-04-15 17:59 0% ` Ajit Khaparde
0 siblings, 2 replies; 200+ results
From: Bing Zhao @ 2021-04-15 15:51 UTC (permalink / raw)
To: orika, thomas, ferruh.yigit, andrew.rybchenko, matan, viacheslavo
Cc: dev, ajit.khaparde, getelson, andreyv
Right now, rte_flow_shared_action_* APIs are used for some shared
actions, like RSS, count. The shared action should be created before
using it inside a flow. These shared actions sometimes are not
really shared but just some indirect actions decoupled from a flow.
The new functions rte_flow_action_handle_* are added to replace
the current shared functions rte_flow_shared_action_*.
There are two types of flow actions:
1. the direct (normal) actions that could be created and stored
within a flow rule. Such action is tied to its flow rule and
cannot be reused.
2. the indirect action, in the past, named shared_action. It is
created from a direct actioni, like count or rss, and then used
in the flow rules with an object handle. The PMD will take care
of the retrieve from indirect action to the direct action
when it is referenced.
The indirect action is accessed (update / query) w/o any flow rule,
just via the action object handle. For example, when querying or
resetting a counter, it could be done out of any flow using this
counter, but only the handle of the counter action object is
required.
The indirect action object could be shared by different flows or
used by a single flow, depending on the direct action type and
the real-life requirements.
The handle of an indirect action object is opaque and defined in
each driver and possibly different per direct action type.
The old name "shared" is improper in a sense and should be replaced.
Since the APIs are changed from "rte_flow_shared_action*" to the new
"rte_flow_action_handle*", the testpmd application code and command
line interfaces also need to be updated to do the adaption.
The testpmd application user guide is also updated. All the "shared
action" related parts are replaced with "indirect action" to have a
correct explanation.
The parameter of "update" interface is also changed. A general
pointer will replace the rte_flow_action struct pointer due to the
facts:
1. Some action may not support fields updating. In the example of a
counter, the only "update" supported should be the reset. So
passing a rte_flow_action struct pointer is meaningless and
there is even no such corresponding action struct. What's more,
if more than one operations should be supported, for some other
action, such pointer parameter may not meet the need.
2. Some action may need conditional or partial update, the current
parameter will not provide the ability to indicate which part(s)
to update.
For different types of indirect action objects, the pointer could
either be the same of rte_flow_action* struct - in order not to
break the current driver implementation, or some wrapper
structures with bits as masks to indicate which part to be
updated, depending on real needs of the corresponding direct
action. For different direct actions, the structures of indirect
action objects updating will be different.
All the underlayer PMD callbacks will be moved to these new APIs.
The RTE_FLOW_ACTION_TYPE_SHARED is kept for now in order not to
break the ABI. All the implementations are changed by using
RTE_FLOW_ACTION_TYPE_INDIRECT.
Since the APIs are changed from "rte_flow_shared_action*" to the new
"rte_flow_action_handle*" and the "update" interface's 3rd input
parameter is changed to generic pointer, the mlx5 PMD that uses these
APIs needs to do the adaption to the new APIs as well.
Signed-off-by: Bing Zhao <bingz@nvidia.com>
Acked-by: Andrey Vesnovaty <andreyv@nvidia.com>
---
app/test-pmd/cmdline.c | 24 +-
app/test-pmd/cmdline_flow.c | 252 ++++++++++----------
app/test-pmd/config.c | 160 ++++++-------
app/test-pmd/testpmd.h | 28 +--
doc/guides/prog_guide/rte_flow.rst | 27 ++-
doc/guides/rel_notes/release_21_05.rst | 3 +
doc/guides/testpmd_app_ug/testpmd_funcs.rst | 94 ++++----
drivers/net/mlx5/mlx5.c | 2 +-
drivers/net/mlx5/mlx5_defs.h | 4 +-
drivers/net/mlx5/mlx5_flow.c | 238 +++++++++---------
drivers/net/mlx5/mlx5_flow.h | 24 +-
drivers/net/mlx5/mlx5_flow_dv.c | 85 +++----
lib/librte_ethdev/rte_flow.c | 56 ++---
lib/librte_ethdev/rte_flow.h | 118 +++++----
lib/librte_ethdev/rte_flow_driver.h | 26 +-
lib/librte_ethdev/version.map | 8 +-
16 files changed, 588 insertions(+), 561 deletions(-)
diff --git a/app/test-pmd/cmdline.c b/app/test-pmd/cmdline.c
index 5bf1497f2b..4d9e038ce8 100644
--- a/app/test-pmd/cmdline.c
+++ b/app/test-pmd/cmdline.c
@@ -1002,23 +1002,23 @@ static void cmd_help_long_parsed(void *parsed_result,
" List and destroy aged flows"
" flow rules\n\n"
- "flow shared_action {port_id} create"
- " [action_id {shared_action_id}]"
+ "flow indirect_action {port_id} create"
+ " [action_id {indirect_action_id}]"
" [ingress] [egress]"
" action {action} / end\n"
- " Create shared action.\n\n"
+ " Create indirect action.\n\n"
- "flow shared_action {port_id} update"
- " {shared_action_id} action {action} / end\n"
- " Update shared action.\n\n"
+ "flow indirect_action {port_id} update"
+ " {indirect_action_id} action {action} / end\n"
+ " Update indirect action.\n\n"
- "flow shared_action {port_id} destroy"
- " action_id {shared_action_id} [...]\n"
- " Destroy specific shared actions.\n\n"
+ "flow indirect_action {port_id} destroy"
+ " action_id {indirect_action_id} [...]\n"
+ " Destroy specific indirect actions.\n\n"
- "flow shared_action {port_id} query"
- " {shared_action_id}\n"
- " Query an existing shared action.\n\n"
+ "flow indirect_action {port_id} query"
+ " {indirect_action_id}\n"
+ " Query an existing indirect action.\n\n"
"set vxlan ip-version (ipv4|ipv6) vni (vni) udp-src"
" (udp-src) udp-dst (udp-dst) ip-src (ip-src) ip-dst"
diff --git a/app/test-pmd/cmdline_flow.c b/app/test-pmd/cmdline_flow.c
index 0127d9e7d6..c5381c638b 100644
--- a/app/test-pmd/cmdline_flow.c
+++ b/app/test-pmd/cmdline_flow.c
@@ -54,7 +54,7 @@ enum index {
PORT_ID,
GROUP_ID,
PRIORITY_LEVEL,
- SHARED_ACTION_ID,
+ INDIRECT_ACTION_ID,
/* Top-level command. */
SET,
@@ -68,7 +68,7 @@ enum index {
/* Top-level command. */
FLOW,
/* Sub-level commands. */
- SHARED_ACTION,
+ INDIRECT_ACTION,
VALIDATE,
CREATE,
DESTROY,
@@ -112,21 +112,21 @@ enum index {
DUMP_ALL,
DUMP_ONE,
- /* Shared action arguments */
- SHARED_ACTION_CREATE,
- SHARED_ACTION_UPDATE,
- SHARED_ACTION_DESTROY,
- SHARED_ACTION_QUERY,
+ /* Indirect action arguments */
+ INDIRECT_ACTION_CREATE,
+ INDIRECT_ACTION_UPDATE,
+ INDIRECT_ACTION_DESTROY,
+ INDIRECT_ACTION_QUERY,
- /* Shared action create arguments */
- SHARED_ACTION_CREATE_ID,
- SHARED_ACTION_INGRESS,
- SHARED_ACTION_EGRESS,
- SHARED_ACTION_TRANSFER,
- SHARED_ACTION_SPEC,
+ /* Indirect action create arguments */
+ INDIRECT_ACTION_CREATE_ID,
+ INDIRECT_ACTION_INGRESS,
+ INDIRECT_ACTION_EGRESS,
+ INDIRECT_ACTION_TRANSFER,
+ INDIRECT_ACTION_SPEC,
- /* Shared action destroy arguments */
- SHARED_ACTION_DESTROY_ID,
+ /* Indirect action destroy arguments */
+ INDIRECT_ACTION_DESTROY_ID,
/* Validate/create pattern. */
PATTERN,
@@ -416,8 +416,8 @@ enum index {
ACTION_SAMPLE_RATIO,
ACTION_SAMPLE_INDEX,
ACTION_SAMPLE_INDEX_VALUE,
- ACTION_SHARED,
- SHARED_ACTION_ID2PTR,
+ ACTION_INDIRECT,
+ INDIRECT_ACTION_ID2PTR,
ACTION_MODIFY_FIELD,
ACTION_MODIFY_FIELD_OP,
ACTION_MODIFY_FIELD_OP_VALUE,
@@ -778,10 +778,10 @@ struct buffer {
struct {
uint32_t *action_id;
uint32_t action_id_n;
- } sa_destroy; /**< Shared action destroy arguments. */
+ } ia_destroy; /**< Indirect action destroy arguments. */
struct {
uint32_t action_id;
- } sa; /* Shared action query arguments */
+ } ia; /* Indirect action query arguments */
struct {
struct rte_flow_attr attr;
struct tunnel_ops tunnel_ops;
@@ -841,12 +841,12 @@ struct parse_action_priv {
.size = s, \
})
-static const enum index next_sa_create_attr[] = {
- SHARED_ACTION_CREATE_ID,
- SHARED_ACTION_INGRESS,
- SHARED_ACTION_EGRESS,
- SHARED_ACTION_TRANSFER,
- SHARED_ACTION_SPEC,
+static const enum index next_ia_create_attr[] = {
+ INDIRECT_ACTION_CREATE_ID,
+ INDIRECT_ACTION_INGRESS,
+ INDIRECT_ACTION_EGRESS,
+ INDIRECT_ACTION_TRANSFER,
+ INDIRECT_ACTION_SPEC,
ZERO,
};
@@ -856,11 +856,11 @@ static const enum index next_dump_subcmd[] = {
ZERO,
};
-static const enum index next_sa_subcmd[] = {
- SHARED_ACTION_CREATE,
- SHARED_ACTION_UPDATE,
- SHARED_ACTION_DESTROY,
- SHARED_ACTION_QUERY,
+static const enum index next_ia_subcmd[] = {
+ INDIRECT_ACTION_CREATE,
+ INDIRECT_ACTION_UPDATE,
+ INDIRECT_ACTION_DESTROY,
+ INDIRECT_ACTION_QUERY,
ZERO,
};
@@ -900,8 +900,8 @@ static const enum index next_aged_attr[] = {
ZERO,
};
-static const enum index next_sa_destroy_attr[] = {
- SHARED_ACTION_DESTROY_ID,
+static const enum index next_ia_destroy_attr[] = {
+ INDIRECT_ACTION_DESTROY_ID,
END,
ZERO,
};
@@ -1380,7 +1380,7 @@ static const enum index next_action[] = {
ACTION_SET_IPV6_DSCP,
ACTION_AGE,
ACTION_SAMPLE,
- ACTION_SHARED,
+ ACTION_INDIRECT,
ACTION_MODIFY_FIELD,
ZERO,
};
@@ -1797,13 +1797,13 @@ static int parse_ipv6_addr(struct context *, const struct token *,
static int parse_port(struct context *, const struct token *,
const char *, unsigned int,
void *, unsigned int);
-static int parse_sa(struct context *, const struct token *,
+static int parse_ia(struct context *, const struct token *,
const char *, unsigned int,
void *, unsigned int);
-static int parse_sa_destroy(struct context *ctx, const struct token *token,
+static int parse_ia_destroy(struct context *ctx, const struct token *token,
const char *str, unsigned int len,
void *buf, unsigned int size);
-static int parse_sa_id2ptr(struct context *ctx, const struct token *token,
+static int parse_ia_id2ptr(struct context *ctx, const struct token *token,
const char *str, unsigned int len, void *buf,
unsigned int size);
static int comp_none(struct context *, const struct token *,
@@ -1950,10 +1950,10 @@ static const struct token token_list[] = {
.call = parse_int,
.comp = comp_none,
},
- [SHARED_ACTION_ID] = {
- .name = "{shared_action_id}",
- .type = "SHARED_ACTION_ID",
- .help = "shared action id",
+ [INDIRECT_ACTION_ID] = {
+ .name = "{indirect_action_id}",
+ .type = "INDIRECT_ACTION_ID",
+ .help = "indirect action id",
.call = parse_int,
.comp = comp_none,
},
@@ -1963,7 +1963,7 @@ static const struct token token_list[] = {
.type = "{command} {port_id} [{arg} [...]]",
.help = "manage ingress/egress flow rules",
.next = NEXT(NEXT_ENTRY
- (SHARED_ACTION,
+ (INDIRECT_ACTION,
VALIDATE,
CREATE,
DESTROY,
@@ -1977,42 +1977,42 @@ static const struct token token_list[] = {
.call = parse_init,
},
/* Top-level command. */
- [SHARED_ACTION] = {
- .name = "shared_action",
+ [INDIRECT_ACTION] = {
+ .name = "indirect_action",
.type = "{command} {port_id} [{arg} [...]]",
- .help = "manage shared actions",
- .next = NEXT(next_sa_subcmd, NEXT_ENTRY(PORT_ID)),
+ .help = "manage indirect actions",
+ .next = NEXT(next_ia_subcmd, NEXT_ENTRY(PORT_ID)),
.args = ARGS(ARGS_ENTRY(struct buffer, port)),
- .call = parse_sa,
+ .call = parse_ia,
},
/* Sub-level commands. */
- [SHARED_ACTION_CREATE] = {
+ [INDIRECT_ACTION_CREATE] = {
.name = "create",
- .help = "create shared action",
- .next = NEXT(next_sa_create_attr),
- .call = parse_sa,
+ .help = "create indirect action",
+ .next = NEXT(next_ia_create_attr),
+ .call = parse_ia,
},
- [SHARED_ACTION_UPDATE] = {
+ [INDIRECT_ACTION_UPDATE] = {
.name = "update",
- .help = "update shared action",
- .next = NEXT(NEXT_ENTRY(SHARED_ACTION_SPEC),
- NEXT_ENTRY(SHARED_ACTION_ID)),
+ .help = "update indirect action",
+ .next = NEXT(NEXT_ENTRY(INDIRECT_ACTION_SPEC),
+ NEXT_ENTRY(INDIRECT_ACTION_ID)),
.args = ARGS(ARGS_ENTRY(struct buffer, args.vc.attr.group)),
- .call = parse_sa,
+ .call = parse_ia,
},
- [SHARED_ACTION_DESTROY] = {
+ [INDIRECT_ACTION_DESTROY] = {
.name = "destroy",
- .help = "destroy shared action",
- .next = NEXT(NEXT_ENTRY(SHARED_ACTION_DESTROY_ID)),
+ .help = "destroy indirect action",
+ .next = NEXT(NEXT_ENTRY(INDIRECT_ACTION_DESTROY_ID)),
.args = ARGS(ARGS_ENTRY(struct buffer, port)),
- .call = parse_sa_destroy,
+ .call = parse_ia_destroy,
},
- [SHARED_ACTION_QUERY] = {
+ [INDIRECT_ACTION_QUERY] = {
.name = "query",
- .help = "query shared action",
- .next = NEXT(NEXT_ENTRY(END), NEXT_ENTRY(SHARED_ACTION_ID)),
- .args = ARGS(ARGS_ENTRY(struct buffer, args.sa.action_id)),
- .call = parse_sa,
+ .help = "query indirect action",
+ .next = NEXT(NEXT_ENTRY(END), NEXT_ENTRY(INDIRECT_ACTION_ID)),
+ .args = ARGS(ARGS_ENTRY(struct buffer, args.ia.action_id)),
+ .call = parse_ia,
},
[VALIDATE] = {
.name = "validate",
@@ -4498,61 +4498,61 @@ static const struct token token_list[] = {
.call = parse_vc_action_sample_index,
.comp = comp_set_sample_index,
},
- /* Shared action destroy arguments. */
- [SHARED_ACTION_DESTROY_ID] = {
+ /* Indirect action destroy arguments. */
+ [INDIRECT_ACTION_DESTROY_ID] = {
.name = "action_id",
- .help = "specify a shared action id to destroy",
- .next = NEXT(next_sa_destroy_attr,
- NEXT_ENTRY(SHARED_ACTION_ID)),
+ .help = "specify a indirect action id to destroy",
+ .next = NEXT(next_ia_destroy_attr,
+ NEXT_ENTRY(INDIRECT_ACTION_ID)),
.args = ARGS(ARGS_ENTRY_PTR(struct buffer,
- args.sa_destroy.action_id)),
- .call = parse_sa_destroy,
+ args.ia_destroy.action_id)),
+ .call = parse_ia_destroy,
},
- /* Shared action create arguments. */
- [SHARED_ACTION_CREATE_ID] = {
+ /* Indirect action create arguments. */
+ [INDIRECT_ACTION_CREATE_ID] = {
.name = "action_id",
- .help = "specify a shared action id to create",
- .next = NEXT(next_sa_create_attr,
- NEXT_ENTRY(SHARED_ACTION_ID)),
+ .help = "specify a indirect action id to create",
+ .next = NEXT(next_ia_create_attr,
+ NEXT_ENTRY(INDIRECT_ACTION_ID)),
.args = ARGS(ARGS_ENTRY(struct buffer, args.vc.attr.group)),
},
- [ACTION_SHARED] = {
- .name = "shared",
- .help = "apply shared action by id",
- .priv = PRIV_ACTION(SHARED, 0),
- .next = NEXT(NEXT_ENTRY(SHARED_ACTION_ID2PTR)),
+ [ACTION_INDIRECT] = {
+ .name = "indirect",
+ .help = "apply indirect action by id",
+ .priv = PRIV_ACTION(INDIRECT, 0),
+ .next = NEXT(NEXT_ENTRY(INDIRECT_ACTION_ID2PTR)),
.args = ARGS(ARGS_ENTRY_ARB(0, sizeof(uint32_t))),
.call = parse_vc,
},
- [SHARED_ACTION_ID2PTR] = {
+ [INDIRECT_ACTION_ID2PTR] = {
.name = "{action_id}",
- .type = "SHARED_ACTION_ID",
- .help = "shared action id",
+ .type = "INDIRECT_ACTION_ID",
+ .help = "indirect action id",
.next = NEXT(NEXT_ENTRY(ACTION_NEXT)),
- .call = parse_sa_id2ptr,
+ .call = parse_ia_id2ptr,
.comp = comp_none,
},
- [SHARED_ACTION_INGRESS] = {
+ [INDIRECT_ACTION_INGRESS] = {
.name = "ingress",
.help = "affect rule to ingress",
- .next = NEXT(next_sa_create_attr),
- .call = parse_sa,
+ .next = NEXT(next_ia_create_attr),
+ .call = parse_ia,
},
- [SHARED_ACTION_EGRESS] = {
+ [INDIRECT_ACTION_EGRESS] = {
.name = "egress",
.help = "affect rule to egress",
- .next = NEXT(next_sa_create_attr),
- .call = parse_sa,
+ .next = NEXT(next_ia_create_attr),
+ .call = parse_ia,
},
- [SHARED_ACTION_TRANSFER] = {
+ [INDIRECT_ACTION_TRANSFER] = {
.name = "transfer",
.help = "affect rule to transfer",
- .next = NEXT(next_sa_create_attr),
- .call = parse_sa,
+ .next = NEXT(next_ia_create_attr),
+ .call = parse_ia,
},
- [SHARED_ACTION_SPEC] = {
+ [INDIRECT_ACTION_SPEC] = {
.name = "action",
- .help = "specify action to share",
+ .help = "specify action to create indirect handle",
.next = NEXT(next_action),
},
};
@@ -4739,9 +4739,9 @@ parse_init(struct context *ctx, const struct token *token,
return len;
}
-/** Parse tokens for shared action commands. */
+/** Parse tokens for indirect action commands. */
static int
-parse_sa(struct context *ctx, const struct token *token,
+parse_ia(struct context *ctx, const struct token *token,
const char *str, unsigned int len,
void *buf, unsigned int size)
{
@@ -4754,7 +4754,7 @@ parse_sa(struct context *ctx, const struct token *token,
if (!out)
return len;
if (!out->command) {
- if (ctx->curr != SHARED_ACTION)
+ if (ctx->curr != INDIRECT_ACTION)
return -1;
if (sizeof(*out) > size)
return -1;
@@ -4766,26 +4766,26 @@ parse_sa(struct context *ctx, const struct token *token,
return len;
}
switch (ctx->curr) {
- case SHARED_ACTION_CREATE:
- case SHARED_ACTION_UPDATE:
+ case INDIRECT_ACTION_CREATE:
+ case INDIRECT_ACTION_UPDATE:
out->args.vc.actions =
(void *)RTE_ALIGN_CEIL((uintptr_t)(out + 1),
sizeof(double));
out->args.vc.attr.group = UINT32_MAX;
/* fallthrough */
- case SHARED_ACTION_QUERY:
+ case INDIRECT_ACTION_QUERY:
out->command = ctx->curr;
ctx->objdata = 0;
ctx->object = out;
ctx->objmask = NULL;
return len;
- case SHARED_ACTION_EGRESS:
+ case INDIRECT_ACTION_EGRESS:
out->args.vc.attr.egress = 1;
return len;
- case SHARED_ACTION_INGRESS:
+ case INDIRECT_ACTION_INGRESS:
out->args.vc.attr.ingress = 1;
return len;
- case SHARED_ACTION_TRANSFER:
+ case INDIRECT_ACTION_TRANSFER:
out->args.vc.attr.transfer = 1;
return len;
default:
@@ -4794,9 +4794,9 @@ parse_sa(struct context *ctx, const struct token *token,
}
-/** Parse tokens for shared action destroy command. */
+/** Parse tokens for indirect action destroy command. */
static int
-parse_sa_destroy(struct context *ctx, const struct token *token,
+parse_ia_destroy(struct context *ctx, const struct token *token,
const char *str, unsigned int len,
void *buf, unsigned int size)
{
@@ -4809,8 +4809,8 @@ parse_sa_destroy(struct context *ctx, const struct token *token,
/* Nothing else to do if there is no buffer. */
if (!out)
return len;
- if (!out->command || out->command == SHARED_ACTION) {
- if (ctx->curr != SHARED_ACTION_DESTROY)
+ if (!out->command || out->command == INDIRECT_ACTION) {
+ if (ctx->curr != INDIRECT_ACTION_DESTROY)
return -1;
if (sizeof(*out) > size)
return -1;
@@ -4818,13 +4818,13 @@ parse_sa_destroy(struct context *ctx, const struct token *token,
ctx->objdata = 0;
ctx->object = out;
ctx->objmask = NULL;
- out->args.sa_destroy.action_id =
+ out->args.ia_destroy.action_id =
(void *)RTE_ALIGN_CEIL((uintptr_t)(out + 1),
sizeof(double));
return len;
}
- action_id = out->args.sa_destroy.action_id
- + out->args.sa_destroy.action_id_n++;
+ action_id = out->args.ia_destroy.action_id
+ + out->args.ia_destroy.action_id_n++;
if ((uint8_t *)action_id > (uint8_t *)out + size)
return -1;
ctx->objdata = 0;
@@ -7102,7 +7102,7 @@ parse_port(struct context *ctx, const struct token *token,
}
static int
-parse_sa_id2ptr(struct context *ctx, const struct token *token,
+parse_ia_id2ptr(struct context *ctx, const struct token *token,
const char *str, unsigned int len,
void *buf, unsigned int size)
{
@@ -7119,9 +7119,9 @@ parse_sa_id2ptr(struct context *ctx, const struct token *token,
ctx->object = action;
if (ret != (int)len)
return ret;
- /* set shared action */
+ /* set indirect action */
if (action) {
- action->conf = port_shared_action_get_by_id(ctx->port, id);
+ action->conf = port_action_handle_get_by_id(ctx->port, id);
ret = (action->conf) ? ret : -1;
}
return ret;
@@ -7659,27 +7659,27 @@ static void
cmd_flow_parsed(const struct buffer *in)
{
switch (in->command) {
- case SHARED_ACTION_CREATE:
- port_shared_action_create(
+ case INDIRECT_ACTION_CREATE:
+ port_action_handle_create(
in->port, in->args.vc.attr.group,
- &((const struct rte_flow_shared_action_conf) {
+ &((const struct rte_flow_indir_action_conf) {
.ingress = in->args.vc.attr.ingress,
.egress = in->args.vc.attr.egress,
.transfer = in->args.vc.attr.transfer,
}),
in->args.vc.actions);
break;
- case SHARED_ACTION_DESTROY:
- port_shared_action_destroy(in->port,
- in->args.sa_destroy.action_id_n,
- in->args.sa_destroy.action_id);
+ case INDIRECT_ACTION_DESTROY:
+ port_action_handle_destroy(in->port,
+ in->args.ia_destroy.action_id_n,
+ in->args.ia_destroy.action_id);
break;
- case SHARED_ACTION_UPDATE:
- port_shared_action_update(in->port, in->args.vc.attr.group,
+ case INDIRECT_ACTION_UPDATE:
+ port_action_handle_update(in->port, in->args.vc.attr.group,
in->args.vc.actions);
break;
- case SHARED_ACTION_QUERY:
- port_shared_action_query(in->port, in->args.sa.action_id);
+ case INDIRECT_ACTION_QUERY:
+ port_action_handle_query(in->port, in->args.ia.action_id);
break;
case VALIDATE:
port_flow_validate(in->port, &in->args.vc.attr,
diff --git a/app/test-pmd/config.c b/app/test-pmd/config.c
index 40b2b29725..c219ef25f7 100644
--- a/app/test-pmd/config.c
+++ b/app/test-pmd/config.c
@@ -1392,38 +1392,38 @@ rss_config_display(struct rte_flow_action_rss *rss_conf)
}
}
-static struct port_shared_action *
+static struct port_indirect_action *
action_get_by_id(portid_t port_id, uint32_t id)
{
struct rte_port *port;
- struct port_shared_action **ppsa;
- struct port_shared_action *psa = NULL;
+ struct port_indirect_action **ppia;
+ struct port_indirect_action *pia = NULL;
if (port_id_is_invalid(port_id, ENABLED_WARN) ||
port_id == (portid_t)RTE_PORT_ALL)
return NULL;
port = &ports[port_id];
- ppsa = &port->actions_list;
- while (*ppsa) {
- if ((*ppsa)->id == id) {
- psa = *ppsa;
+ ppia = &port->actions_list;
+ while (*ppia) {
+ if ((*ppia)->id == id) {
+ pia = *ppia;
break;
}
- ppsa = &(*ppsa)->next;
+ ppia = &(*ppia)->next;
}
- if (!psa)
- printf("Failed to find shared action #%u on port %u\n",
+ if (!pia)
+ printf("Failed to find indirect action #%u on port %u\n",
id, port_id);
- return psa;
+ return pia;
}
static int
action_alloc(portid_t port_id, uint32_t id,
- struct port_shared_action **action)
+ struct port_indirect_action **action)
{
struct rte_port *port;
- struct port_shared_action **ppsa;
- struct port_shared_action *psa = NULL;
+ struct port_indirect_action **ppia;
+ struct port_indirect_action *pia = NULL;
*action = NULL;
if (port_id_is_invalid(port_id, ENABLED_WARN) ||
@@ -1434,7 +1434,7 @@ action_alloc(portid_t port_id, uint32_t id,
/* taking first available ID */
if (port->actions_list) {
if (port->actions_list->id == UINT32_MAX - 1) {
- printf("Highest shared action ID is already"
+ printf("Highest indirect action ID is already"
" assigned, delete it first\n");
return -ENOMEM;
}
@@ -1443,70 +1443,70 @@ action_alloc(portid_t port_id, uint32_t id,
id = 0;
}
}
- psa = calloc(1, sizeof(*psa));
- if (!psa) {
- printf("Allocation of port %u shared action failed\n",
+ pia = calloc(1, sizeof(*pia));
+ if (!pia) {
+ printf("Allocation of port %u indirect action failed\n",
port_id);
return -ENOMEM;
}
- ppsa = &port->actions_list;
- while (*ppsa && (*ppsa)->id > id)
- ppsa = &(*ppsa)->next;
- if (*ppsa && (*ppsa)->id == id) {
- printf("Shared action #%u is already assigned,"
+ ppia = &port->actions_list;
+ while (*ppia && (*ppia)->id > id)
+ ppia = &(*ppia)->next;
+ if (*ppia && (*ppia)->id == id) {
+ printf("Indirect action #%u is already assigned,"
" delete it first\n", id);
- free(psa);
+ free(pia);
return -EINVAL;
}
- psa->next = *ppsa;
- psa->id = id;
- *ppsa = psa;
- *action = psa;
+ pia->next = *ppia;
+ pia->id = id;
+ *ppia = pia;
+ *action = pia;
return 0;
}
-/** Create shared action */
+/** Create indirect action */
int
-port_shared_action_create(portid_t port_id, uint32_t id,
- const struct rte_flow_shared_action_conf *conf,
+port_action_handle_create(portid_t port_id, uint32_t id,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action)
{
- struct port_shared_action *psa;
+ struct port_indirect_action *pia;
int ret;
struct rte_flow_error error;
- ret = action_alloc(port_id, id, &psa);
+ ret = action_alloc(port_id, id, &pia);
if (ret)
return ret;
if (action->type == RTE_FLOW_ACTION_TYPE_AGE) {
struct rte_flow_action_age *age =
(struct rte_flow_action_age *)(uintptr_t)(action->conf);
- psa->age_type = ACTION_AGE_CONTEXT_TYPE_SHARED_ACTION;
- age->context = &psa->age_type;
+ pia->age_type = ACTION_AGE_CONTEXT_TYPE_INDIRECT_ACTION;
+ age->context = &pia->age_type;
}
/* Poisoning to make sure PMDs update it in case of error. */
memset(&error, 0x22, sizeof(error));
- psa->action = rte_flow_shared_action_create(port_id, conf, action,
+ pia->handle = rte_flow_action_handle_create(port_id, conf, action,
&error);
- if (!psa->action) {
- uint32_t destroy_id = psa->id;
- port_shared_action_destroy(port_id, 1, &destroy_id);
+ if (!pia->handle) {
+ uint32_t destroy_id = pia->id;
+ port_action_handle_destroy(port_id, 1, &destroy_id);
return port_flow_complain(&error);
}
- psa->type = action->type;
- printf("Shared action #%u created\n", psa->id);
+ pia->type = action->type;
+ printf("Indirect action #%u created\n", pia->id);
return 0;
}
-/** Destroy shared action */
+/** Destroy indirect action */
int
-port_shared_action_destroy(portid_t port_id,
+port_action_handle_destroy(portid_t port_id,
uint32_t n,
const uint32_t *actions)
{
struct rte_port *port;
- struct port_shared_action **tmp;
+ struct port_indirect_action **tmp;
uint32_t c = 0;
int ret = 0;
@@ -1520,9 +1520,9 @@ port_shared_action_destroy(portid_t port_id,
for (i = 0; i != n; ++i) {
struct rte_flow_error error;
- struct port_shared_action *psa = *tmp;
+ struct port_indirect_action *pia = *tmp;
- if (actions[i] != psa->id)
+ if (actions[i] != pia->id)
continue;
/*
* Poisoning to make sure PMDs update it in case
@@ -1530,14 +1530,14 @@ port_shared_action_destroy(portid_t port_id,
*/
memset(&error, 0x33, sizeof(error));
- if (psa->action && rte_flow_shared_action_destroy(
- port_id, psa->action, &error)) {
+ if (pia->handle && rte_flow_action_handle_destroy(
+ port_id, pia->handle, &error)) {
ret = port_flow_complain(&error);
continue;
}
- *tmp = psa->next;
- printf("Shared action #%u destroyed\n", psa->id);
- free(psa);
+ *tmp = pia->next;
+ printf("Indirect action #%u destroyed\n", pia->id);
+ free(pia);
break;
}
if (i == n)
@@ -1548,60 +1548,60 @@ port_shared_action_destroy(portid_t port_id,
}
-/** Get shared action by port + id */
-struct rte_flow_shared_action *
-port_shared_action_get_by_id(portid_t port_id, uint32_t id)
+/** Get indirect action by port + id */
+struct rte_flow_action_handle *
+port_action_handle_get_by_id(portid_t port_id, uint32_t id)
{
- struct port_shared_action *psa = action_get_by_id(port_id, id);
+ struct port_indirect_action *pia = action_get_by_id(port_id, id);
- return (psa) ? psa->action : NULL;
+ return (pia) ? pia->handle : NULL;
}
-/** Update shared action */
+/** Update indirect action */
int
-port_shared_action_update(portid_t port_id, uint32_t id,
+port_action_handle_update(portid_t port_id, uint32_t id,
const struct rte_flow_action *action)
{
struct rte_flow_error error;
- struct rte_flow_shared_action *shared_action;
+ struct rte_flow_action_handle *action_handle;
- shared_action = port_shared_action_get_by_id(port_id, id);
- if (!shared_action)
+ action_handle = port_action_handle_get_by_id(port_id, id);
+ if (!action_handle)
return -EINVAL;
- if (rte_flow_shared_action_update(port_id, shared_action, action,
+ if (rte_flow_action_handle_update(port_id, action_handle, action,
&error)) {
return port_flow_complain(&error);
}
- printf("Shared action #%u updated\n", id);
+ printf("Indirect action #%u updated\n", id);
return 0;
}
int
-port_shared_action_query(portid_t port_id, uint32_t id)
+port_action_handle_query(portid_t port_id, uint32_t id)
{
struct rte_flow_error error;
- struct port_shared_action *psa;
+ struct port_indirect_action *pia;
uint64_t default_data;
void *data = NULL;
int ret = 0;
- psa = action_get_by_id(port_id, id);
- if (!psa)
+ pia = action_get_by_id(port_id, id);
+ if (!pia)
return -EINVAL;
- switch (psa->type) {
+ switch (pia->type) {
case RTE_FLOW_ACTION_TYPE_RSS:
case RTE_FLOW_ACTION_TYPE_AGE:
data = &default_data;
break;
default:
- printf("Shared action %u (type: %d) on port %u doesn't support"
- " query\n", id, psa->type, port_id);
+ printf("Indirect action %u (type: %d) on port %u doesn't"
+ " support query\n", id, pia->type, port_id);
return -1;
}
- if (rte_flow_shared_action_query(port_id, psa->action, data, &error))
+ if (rte_flow_action_handle_query(port_id, pia->handle, data, &error))
ret = port_flow_complain(&error);
- switch (psa->type) {
+ switch (pia->type) {
case RTE_FLOW_ACTION_TYPE_RSS:
if (!ret)
printf("Shared RSS action:\n\trefs:%u\n",
@@ -1623,8 +1623,8 @@ port_shared_action_query(portid_t port_id, uint32_t id)
data = NULL;
break;
default:
- printf("Shared action %u (type: %d) on port %u doesn't support"
- " query\n", id, psa->type, port_id);
+ printf("Indirect action %u (type: %d) on port %u doesn't"
+ " support query\n", id, pia->type, port_id);
ret = -1;
}
return ret;
@@ -2066,7 +2066,7 @@ port_flow_aged(portid_t port_id, uint8_t destroy)
enum age_action_context_type *type;
union {
struct port_flow *pf;
- struct port_shared_action *psa;
+ struct port_indirect_action *pia;
} ctx;
if (port_id_is_invalid(port_id, ENABLED_WARN) ||
@@ -2116,11 +2116,11 @@ port_flow_aged(portid_t port_id, uint8_t destroy)
&ctx.pf->id))
total++;
break;
- case ACTION_AGE_CONTEXT_TYPE_SHARED_ACTION:
- ctx.psa = container_of(type, struct port_shared_action,
- age_type);
- printf("%-20s\t%" PRIu32 "\n", "Shared action",
- ctx.psa->id);
+ case ACTION_AGE_CONTEXT_TYPE_INDIRECT_ACTION:
+ ctx.pia = container_of(type,
+ struct port_indirect_action, age_type);
+ printf("%-20s\t%" PRIu32 "\n", "Indirect action",
+ ctx.pia->id);
break;
default:
printf("Error: invalid context type %u\n", port_id);
diff --git a/app/test-pmd/testpmd.h b/app/test-pmd/testpmd.h
index 36d8535d0c..c314b30f2e 100644
--- a/app/test-pmd/testpmd.h
+++ b/app/test-pmd/testpmd.h
@@ -151,7 +151,7 @@ struct fwd_stream {
*/
enum age_action_context_type {
ACTION_AGE_CONTEXT_TYPE_FLOW,
- ACTION_AGE_CONTEXT_TYPE_SHARED_ACTION,
+ ACTION_AGE_CONTEXT_TYPE_INDIRECT_ACTION,
};
/** Descriptor for a single flow. */
@@ -165,12 +165,12 @@ struct port_flow {
uint8_t data[]; /**< Storage for flow rule description */
};
-/* Descriptor for shared action */
-struct port_shared_action {
- struct port_shared_action *next; /**< Next flow in list. */
- uint32_t id; /**< Shared action ID. */
+/* Descriptor for indirect action */
+struct port_indirect_action {
+ struct port_indirect_action *next; /**< Next flow in list. */
+ uint32_t id; /**< Indirect action ID. */
enum rte_flow_action_type type; /**< Action type. */
- struct rte_flow_shared_action *action; /**< Shared action handle. */
+ struct rte_flow_action_handle *handle; /**< Indirect action handle. */
enum age_action_context_type age_type; /**< Age action context type. */
};
@@ -222,8 +222,8 @@ struct rte_port {
uint32_t mc_addr_nb; /**< nb. of addr. in mc_addr_pool */
uint8_t slave_flag; /**< bonding slave port */
struct port_flow *flow_list; /**< Associated flows. */
- struct port_shared_action *actions_list;
- /**< Associated shared actions. */
+ struct port_indirect_action *actions_list;
+ /**< Associated indirect actions. */
LIST_HEAD(, port_flow_tunnel) flow_tunnel_list;
const struct rte_eth_rxtx_callback *rx_dump_cb[RTE_MAX_QUEUES_PER_PORT+1];
const struct rte_eth_rxtx_callback *tx_dump_cb[RTE_MAX_QUEUES_PER_PORT+1];
@@ -801,14 +801,14 @@ void port_reg_bit_field_set(portid_t port_id, uint32_t reg_off,
uint8_t bit1_pos, uint8_t bit2_pos, uint32_t value);
void port_reg_display(portid_t port_id, uint32_t reg_off);
void port_reg_set(portid_t port_id, uint32_t reg_off, uint32_t value);
-int port_shared_action_create(portid_t port_id, uint32_t id,
- const struct rte_flow_shared_action_conf *conf,
+int port_action_handle_create(portid_t port_id, uint32_t id,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action);
-int port_shared_action_destroy(portid_t port_id,
+int port_action_handle_destroy(portid_t port_id,
uint32_t n, const uint32_t *action);
-struct rte_flow_shared_action *port_shared_action_get_by_id(portid_t port_id,
+struct rte_flow_action_handle *port_action_handle_get_by_id(portid_t port_id,
uint32_t id);
-int port_shared_action_update(portid_t port_id, uint32_t id,
+int port_action_handle_update(portid_t port_id, uint32_t id,
const struct rte_flow_action *action);
int port_flow_validate(portid_t port_id,
const struct rte_flow_attr *attr,
@@ -820,7 +820,7 @@ int port_flow_create(portid_t port_id,
const struct rte_flow_item *pattern,
const struct rte_flow_action *actions,
const struct tunnel_ops *tunnel_ops);
-int port_shared_action_query(portid_t port_id, uint32_t id);
+int port_action_handle_query(portid_t port_id, uint32_t id);
void update_age_action_context(const struct rte_flow_action *actions,
struct port_flow *pf);
int port_flow_destroy(portid_t port_id, uint32_t n, const uint32_t *rule);
diff --git a/doc/guides/prog_guide/rte_flow.rst b/doc/guides/prog_guide/rte_flow.rst
index e1b93ecedf..2ecc48cfff 100644
--- a/doc/guides/prog_guide/rte_flow.rst
+++ b/doc/guides/prog_guide/rte_flow.rst
@@ -1719,7 +1719,7 @@ that counter.
For ports within the same switch domain then the counter id namespace extends
to all ports within that switch domain.
-The shared flag is DEPRECATED and ``SHARED`` ``COUNT`` action should be used
+The shared flag is DEPRECATED and ``INDIRECT`` ``COUNT`` action should be used
to make shared counters.
.. _table_rte_flow_action_count:
@@ -2742,25 +2742,26 @@ packets, and must have a fate action.
| ``actions`` | sub-action list for sampling |
+--------------+---------------------------------+
-Action: ``SHARED``
+Action: ``INDIRECT``
^^^^^^^^^^^^^^^^^^
-Flow utilize shared action by handle as returned from
-``rte_flow_shared_action_create()``.
+Flow utilize indirect action by handle as returned from
+``rte_flow_action_handle_create()``.
-The behaviour of the shared action defined by ``action`` argument of type
-``struct rte_flow_action`` passed to ``rte_flow_shared_action_create()``.
+The behaviour of the indirect action defined by ``action`` argument of type
+``struct rte_flow_action`` passed to ``rte_flow_action_handle_create()``.
-Multiple flows can use the same shared action.
-The shared action can be in-place updated by ``rte_flow_shared_action_update()``
-without destroying flow and creating flow again.
+The indirect action can be used by a single flow or shared among multiple flows.
+The indirect action can be in-place updated by ``rte_flow_action_handle_update()``
+without destroying flow and creating flow again. The fields that could be
+updated depend on the type of the ``action`` and different for every type.
-The shared action specified data (e.g. counter) can be queried by
-``rte_flow_shared_action_query()``.
+The indirect action specified data (e.g. counter) can be queried by
+``rte_flow_action_handle_query()``.
-.. _table_rte_flow_shared_action:
+.. _table_rte_flow_action_handle:
-.. table:: SHARED
+.. table:: INDIRECT
+---------------+
| Field |
diff --git a/doc/guides/rel_notes/release_21_05.rst b/doc/guides/rel_notes/release_21_05.rst
index 82ee71152f..e6f99350af 100644
--- a/doc/guides/rel_notes/release_21_05.rst
+++ b/doc/guides/rel_notes/release_21_05.rst
@@ -234,6 +234,9 @@ API Changes
* pci: The value ``PCI_ANY_ID`` is marked as deprecated
and can be replaced with ``RTE_PCI_ANY_ID``.
+* ethdev: The experimental shared action APIs in ``rte_flow.h`` has been
+ replaced from ``rte_flow_shared_action_*`` to indirect action APIs named
+ ``rte_flow_action_handle_*``.
ABI Changes
-----------
diff --git a/doc/guides/testpmd_app_ug/testpmd_funcs.rst b/doc/guides/testpmd_app_ug/testpmd_funcs.rst
index e3bfed566d..1fa6e2000e 100644
--- a/doc/guides/testpmd_app_ug/testpmd_funcs.rst
+++ b/doc/guides/testpmd_app_ug/testpmd_funcs.rst
@@ -4057,10 +4057,10 @@ This section lists supported actions and their attributes, if any.
- ``dscp_value {unsigned}``: The new DSCP value to be set
-- ``shared``: Use shared action created via
- ``flow shared_action {port_id} create``
+- ``indirect``: Use indirect action created via
+ ``flow indirect_action {port_id} create``
- - ``shared_action_id {unsigned}``: Shared action ID to use
+ - ``indirect_action_id {unsigned}``: Indirect action ID to use
Destroying flow rules
~~~~~~~~~~~~~~~~~~~~~
@@ -4351,113 +4351,113 @@ If attach ``destroy`` parameter, the command will destroy all the list aged flow
testpmd> flow aged 0
Port 0 total aged flows: 0
-Creating shared actions
+Creating indirect actions
~~~~~~~~~~~~~~~~~~~~~~~
-``flow shared_action {port_id} create`` creates shared action with optional
-shared action ID. It is bound to ``rte_flow_shared_action_create()``::
+``flow indirect_action {port_id} create`` creates indirect action with optional
+indirect action ID. It is bound to ``rte_flow_action_handle_create()``::
- flow shared_action {port_id} create [action_id {shared_action_id}]
+ flow indirect_action {port_id} create [action_id {indirect_action_id}]
[ingress] [egress] [transfer] action {action} / end
If successful, it will show::
- Shared action #[...] created
+ Indirect action #[...] created
-Otherwise, it will complain either that shared action already exists or that
+Otherwise, it will complain either that indirect action already exists or that
some error occurred::
- Shared action #[...] is already assigned, delete it first
+ Indirect action #[...] is already assigned, delete it first
::
Caught error type [...] ([...]): [...]
-Create shared rss action with id 100 to queues 1 and 2 on port 0::
+Create indirect rss action with id 100 to queues 1 and 2 on port 0::
- testpmd> flow shared_action 0 create action_id 100 \
+ testpmd> flow indirect_action 0 create action_id 100 \
ingress action rss queues 1 2 end / end
-Create shared rss action with id assigned by testpmd to queues 1 and 2 on
+Create indirect rss action with id assigned by testpmd to queues 1 and 2 on
port 0::
- testpmd> flow shared_action 0 create action_id \
+ testpmd> flow indirect_action 0 create action_id \
ingress action rss queues 0 1 end / end
-Updating shared actions
+Updating indirect actions
~~~~~~~~~~~~~~~~~~~~~~~
-``flow shared_action {port_id} update`` updates configuration of the shared
-action from its shared action ID (as returned by
-``flow shared_action {port_id} create``). It is bound to
-``rte_flow_shared_action_update()``::
+``flow indirect_action {port_id} update`` updates configuration of the indirect
+action from its indirect action ID (as returned by
+``flow indirect_action {port_id} create``). It is bound to
+``rte_flow_action_handle_update()``::
- flow shared_action {port_id} update {shared_action_id}
+ flow indirect_action {port_id} update {indirect_action_id}
action {action} / end
If successful, it will show::
- Shared action #[...] updated
+ Indirect action #[...] updated
-Otherwise, it will complain either that shared action not found or that some
+Otherwise, it will complain either that indirect action not found or that some
error occurred::
- Failed to find shared action #[...] on port [...]
+ Failed to find indirect action #[...] on port [...]
::
Caught error type [...] ([...]): [...]
-Update shared rss action having id 100 on port 0 with rss to queues 0 and 3
+Update indirect rss action having id 100 on port 0 with rss to queues 0 and 3
(in create example above rss queues were 1 and 2)::
- testpmd> flow shared_action 0 update 100 action rss queues 0 3 end / end
+ testpmd> flow indirect_action 0 update 100 action rss queues 0 3 end / end
-Destroying shared actions
+Destroying indirect actions
~~~~~~~~~~~~~~~~~~~~~~~~~
-``flow shared_action {port_id} update`` destroys one or more shared actions
-from their shared action IDs (as returned by
-``flow shared_action {port_id} create``). It is bound to
-``rte_flow_shared_action_destroy()``::
+``flow indirect_action {port_id} destroy`` destroys one or more indirect actions
+from their indirect action IDs (as returned by
+``flow indirect_action {port_id} create``). It is bound to
+``rte_flow_action_handle_destroy()``::
- flow shared_action {port_id} destroy action_id {shared_action_id} [...]
+ flow indirect_action {port_id} destroy action_id {indirect_action_id} [...]
If successful, it will show::
- Shared action #[...] destroyed
+ Indirect action #[...] destroyed
-It does not report anything for shared action IDs that do not exist.
-The usual error message is shown when a shared action cannot be destroyed::
+It does not report anything for indirect action IDs that do not exist.
+The usual error message is shown when a indirect action cannot be destroyed::
Caught error type [...] ([...]): [...]
-Destroy shared actions having id 100 & 101::
+Destroy indirect actions having id 100 & 101::
- testpmd> flow shared_action 0 destroy action_id 100 action_id 101
+ testpmd> flow indirect_action 0 destroy action_id 100 action_id 101
-Query shared actions
+Query indirect actions
~~~~~~~~~~~~~~~~~~~~
-``flow shared_action {port_id} query`` queries the shared action from its
-shared action ID (as returned by ``flow shared_action {port_id} create``).
-It is bound to ``rte_flow_shared_action_query()``::
+``flow indirect_action {port_id} query`` queries the indirect action from its
+indirect action ID (as returned by ``flow indirect_action {port_id} create``).
+It is bound to ``rte_flow_action_handle_query()``::
- flow shared_action {port_id} query {shared_action_id}
+ flow indirect_action {port_id} query {indirect_action_id}
-Currently only rss shared action supported. If successful, it will show::
+Currently only rss indirect action supported. If successful, it will show::
- Shared RSS action:
+ Indirect RSS action:
refs:[...]
-Otherwise, it will complain either that shared action not found or that some
+Otherwise, it will complain either that indirect action not found or that some
error occurred::
- Failed to find shared action #[...] on port [...]
+ Failed to find indirect action #[...] on port [...]
::
Caught error type [...] ([...]): [...]
-Query shared action having id 100::
+Query indirect action having id 100::
- testpmd> flow shared_action 0 query 100
+ testpmd> flow indirect_action 0 query 100
Sample QinQ flow rules
~~~~~~~~~~~~~~~~~~~~~~
diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c
index 02cc2c781e..3bf224c559 100644
--- a/drivers/net/mlx5/mlx5.c
+++ b/drivers/net/mlx5/mlx5.c
@@ -1341,7 +1341,7 @@ mlx5_dev_close(struct rte_eth_dev *dev)
* then this will return directly without any action.
*/
mlx5_flow_list_flush(dev, &priv->flows, true);
- mlx5_shared_action_flush(dev);
+ mlx5_action_handle_flush(dev);
mlx5_flow_meter_flush(dev, NULL);
/* Prevent crashes when queues are still in use. */
dev->rx_pkt_burst = removed_rx_burst;
diff --git a/drivers/net/mlx5/mlx5_defs.h b/drivers/net/mlx5/mlx5_defs.h
index 8f2807dcd9..6e9c4b9cdd 100644
--- a/drivers/net/mlx5/mlx5_defs.h
+++ b/drivers/net/mlx5/mlx5_defs.h
@@ -192,8 +192,8 @@
#define MLX5_HAIRPIN_QUEUE_STRIDE 6
#define MLX5_HAIRPIN_JUMBO_LOG_SIZE (14 + 2)
-/* Maximum number of shared actions supported by rte_flow */
-#define MLX5_MAX_SHARED_ACTIONS 2
+/* Maximum number of indirect actions supported by rte_flow */
+#define MLX5_MAX_INDIRECT_ACTIONS 2
/*
* Linux definition of static_assert is found in /usr/include/assert.h.
diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c
index 84463074a5..68e1ffda9c 100644
--- a/drivers/net/mlx5/mlx5_flow.c
+++ b/drivers/net/mlx5/mlx5_flow.c
@@ -568,23 +568,23 @@ static const struct mlx5_flow_expand_node mlx5_support_expansion[] = {
},
};
-static struct rte_flow_shared_action *
-mlx5_shared_action_create(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action_conf *conf,
+static struct rte_flow_action_handle *
+mlx5_action_handle_create(struct rte_eth_dev *dev,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action,
struct rte_flow_error *error);
-static int mlx5_shared_action_destroy
+static int mlx5_action_handle_destroy
(struct rte_eth_dev *dev,
- struct rte_flow_shared_action *shared_action,
+ struct rte_flow_action_handle *handle,
struct rte_flow_error *error);
-static int mlx5_shared_action_update
+static int mlx5_action_handle_update
(struct rte_eth_dev *dev,
- struct rte_flow_shared_action *shared_action,
- const struct rte_flow_action *action,
+ struct rte_flow_action_handle *handle,
+ const void *update,
struct rte_flow_error *error);
-static int mlx5_shared_action_query
+static int mlx5_action_handle_query
(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action *action,
+ const struct rte_flow_action_handle *handle,
void *data,
struct rte_flow_error *error);
static int
@@ -623,10 +623,10 @@ static const struct rte_flow_ops mlx5_flow_ops = {
.query = mlx5_flow_query,
.dev_dump = mlx5_flow_dev_dump,
.get_aged_flows = mlx5_flow_get_aged_flows,
- .shared_action_create = mlx5_shared_action_create,
- .shared_action_destroy = mlx5_shared_action_destroy,
- .shared_action_update = mlx5_shared_action_update,
- .shared_action_query = mlx5_shared_action_query,
+ .action_handle_create = mlx5_action_handle_create,
+ .action_handle_destroy = mlx5_action_handle_destroy,
+ .action_handle_update = mlx5_action_handle_update,
+ .action_handle_query = mlx5_action_handle_query,
.tunnel_decap_set = mlx5_flow_tunnel_decap_set,
.tunnel_match = mlx5_flow_tunnel_match,
.tunnel_action_decap_release = mlx5_flow_tunnel_action_release,
@@ -3402,31 +3402,31 @@ flow_aso_age_get_by_idx(struct rte_eth_dev *dev, uint32_t age_idx)
return &pool->actions[offset - 1];
}
-/* maps shared action to translated non shared in some actions array */
-struct mlx5_translated_shared_action {
- struct rte_flow_shared_action *action; /**< Shared action */
- int index; /**< Index in related array of rte_flow_action */
+/* maps indirect action to translated direct in some actions array */
+struct mlx5_translated_action_handle {
+ struct rte_flow_action_handle *action; /**< Indirect action handle. */
+ int index; /**< Index in related array of rte_flow_action. */
};
/**
- * Translates actions of type RTE_FLOW_ACTION_TYPE_SHARED to related
- * non shared action if translation possible.
- * This functionality used to run same execution path for both shared & non
- * shared actions on flow create. All necessary preparations for shared
- * action handling should be preformed on *shared* actions list returned
+ * Translates actions of type RTE_FLOW_ACTION_TYPE_INDIRECT to related
+ * direct action if translation possible.
+ * This functionality used to run same execution path for both direct and
+ * indirect actions on flow create. All necessary preparations for indirect
+ * action handling should be performed on *handle* actions list returned
* from this call.
*
* @param[in] dev
* Pointer to Ethernet device.
* @param[in] actions
* List of actions to translate.
- * @param[out] shared
- * List to store translated shared actions.
- * @param[in, out] shared_n
- * Size of *shared* array. On return should be updated with number of shared
- * actions retrieved from the *actions* list.
+ * @param[out] handle
+ * List to store translated indirect action object handles.
+ * @param[in, out] indir_n
+ * Size of *handle* array. On return should be updated with number of
+ * indirect actions retrieved from the *actions* list.
* @param[out] translated_actions
- * List of actions where all shared actions were translated to non shared
+ * List of actions where all indirect actions were translated to direct
* if possible. NULL if no translation took place.
* @param[out] error
* Pointer to the error structure.
@@ -3435,10 +3435,10 @@ struct mlx5_translated_shared_action {
* 0 on success, a negative errno value otherwise and rte_errno is set.
*/
static int
-flow_shared_actions_translate(struct rte_eth_dev *dev,
+flow_action_handles_translate(struct rte_eth_dev *dev,
const struct rte_flow_action actions[],
- struct mlx5_translated_shared_action *shared,
- int *shared_n,
+ struct mlx5_translated_action_handle *handle,
+ int *indir_n,
struct rte_flow_action **translated_actions,
struct rte_flow_error *error)
{
@@ -3447,23 +3447,23 @@ flow_shared_actions_translate(struct rte_eth_dev *dev,
size_t actions_size;
int n;
int copied_n = 0;
- struct mlx5_translated_shared_action *shared_end = NULL;
+ struct mlx5_translated_action_handle *handle_end = NULL;
for (n = 0; actions[n].type != RTE_FLOW_ACTION_TYPE_END; n++) {
- if (actions[n].type != RTE_FLOW_ACTION_TYPE_SHARED)
+ if (actions[n].type != RTE_FLOW_ACTION_TYPE_INDIRECT)
continue;
- if (copied_n == *shared_n) {
+ if (copied_n == *indir_n) {
return rte_flow_error_set
(error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_NUM,
NULL, "too many shared actions");
}
- rte_memcpy(&shared[copied_n].action, &actions[n].conf,
+ rte_memcpy(&handle[copied_n].action, &actions[n].conf,
sizeof(actions[n].conf));
- shared[copied_n].index = n;
+ handle[copied_n].index = n;
copied_n++;
}
n++;
- *shared_n = copied_n;
+ *indir_n = copied_n;
if (!copied_n)
return 0;
actions_size = sizeof(struct rte_flow_action) * n;
@@ -3473,28 +3473,28 @@ flow_shared_actions_translate(struct rte_eth_dev *dev,
return -ENOMEM;
}
memcpy(translated, actions, actions_size);
- for (shared_end = shared + copied_n; shared < shared_end; shared++) {
+ for (handle_end = handle + copied_n; handle < handle_end; handle++) {
struct mlx5_shared_action_rss *shared_rss;
- uint32_t act_idx = (uint32_t)(uintptr_t)shared->action;
- uint32_t type = act_idx >> MLX5_SHARED_ACTION_TYPE_OFFSET;
- uint32_t idx = act_idx & ((1u << MLX5_SHARED_ACTION_TYPE_OFFSET)
- - 1);
+ uint32_t act_idx = (uint32_t)(uintptr_t)handle->action;
+ uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
+ uint32_t idx = act_idx &
+ ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
switch (type) {
- case MLX5_SHARED_ACTION_TYPE_RSS:
+ case MLX5_INDIRECT_ACTION_TYPE_RSS:
shared_rss = mlx5_ipool_get
(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
- translated[shared->index].type =
+ translated[handle->index].type =
RTE_FLOW_ACTION_TYPE_RSS;
- translated[shared->index].conf =
+ translated[handle->index].conf =
&shared_rss->origin;
break;
- case MLX5_SHARED_ACTION_TYPE_AGE:
+ case MLX5_INDIRECT_ACTION_TYPE_AGE:
if (priv->sh->flow_hit_aso_en) {
- translated[shared->index].type =
+ translated[handle->index].type =
(enum rte_flow_action_type)
MLX5_RTE_FLOW_ACTION_TYPE_AGE;
- translated[shared->index].conf =
+ translated[handle->index].conf =
(void *)(uintptr_t)idx;
break;
}
@@ -3503,7 +3503,7 @@ flow_shared_actions_translate(struct rte_eth_dev *dev,
mlx5_free(translated);
return rte_flow_error_set
(error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION,
- NULL, "invalid shared action type");
+ NULL, "invalid indirect action type");
}
}
*translated_actions = translated;
@@ -3525,21 +3525,21 @@ flow_shared_actions_translate(struct rte_eth_dev *dev,
*/
static uint32_t
flow_get_shared_rss_action(struct rte_eth_dev *dev,
- struct mlx5_translated_shared_action *shared,
+ struct mlx5_translated_action_handle *handle,
int shared_n)
{
- struct mlx5_translated_shared_action *shared_end;
+ struct mlx5_translated_action_handle *handle_end;
struct mlx5_priv *priv = dev->data->dev_private;
struct mlx5_shared_action_rss *shared_rss;
- for (shared_end = shared + shared_n; shared < shared_end; shared++) {
- uint32_t act_idx = (uint32_t)(uintptr_t)shared->action;
- uint32_t type = act_idx >> MLX5_SHARED_ACTION_TYPE_OFFSET;
+ for (handle_end = handle + shared_n; handle < handle_end; handle++) {
+ uint32_t act_idx = (uint32_t)(uintptr_t)handle->action;
+ uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
uint32_t idx = act_idx &
- ((1u << MLX5_SHARED_ACTION_TYPE_OFFSET) - 1);
+ ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
switch (type) {
- case MLX5_SHARED_ACTION_TYPE_RSS:
+ case MLX5_INDIRECT_ACTION_TYPE_RSS:
shared_rss = mlx5_ipool_get
(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
idx);
@@ -5549,9 +5549,9 @@ flow_list_create(struct rte_eth_dev *dev, uint32_t *list,
struct rte_flow *flow = NULL;
struct mlx5_flow *dev_flow;
const struct rte_flow_action_rss *rss = NULL;
- struct mlx5_translated_shared_action
- shared_actions[MLX5_MAX_SHARED_ACTIONS];
- int shared_actions_n = MLX5_MAX_SHARED_ACTIONS;
+ struct mlx5_translated_action_handle
+ indir_actions[MLX5_MAX_INDIRECT_ACTIONS];
+ int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS;
union {
struct mlx5_flow_expand_rss buf;
uint8_t buffer[2048];
@@ -5591,9 +5591,9 @@ flow_list_create(struct rte_eth_dev *dev, uint32_t *list,
MLX5_ASSERT(wks);
rss_desc = &wks->rss_desc;
- ret = flow_shared_actions_translate(dev, original_actions,
- shared_actions,
- &shared_actions_n,
+ ret = flow_action_handles_translate(dev, original_actions,
+ indir_actions,
+ &indir_actions_n,
&translated_actions, error);
if (ret < 0) {
MLX5_ASSERT(translated_actions == NULL);
@@ -5654,8 +5654,8 @@ flow_list_create(struct rte_eth_dev *dev, uint32_t *list,
buf->entries = 1;
buf->entry[0].pattern = (void *)(uintptr_t)items;
}
- rss_desc->shared_rss = flow_get_shared_rss_action(dev, shared_actions,
- shared_actions_n);
+ rss_desc->shared_rss = flow_get_shared_rss_action(dev, indir_actions,
+ indir_actions_n);
for (i = 0; i < buf->entries; ++i) {
/* Initialize flow split data. */
flow_split_info.prefix_layers = 0;
@@ -5834,14 +5834,14 @@ mlx5_flow_validate(struct rte_eth_dev *dev,
struct rte_flow_error *error)
{
int hairpin_flow;
- struct mlx5_translated_shared_action
- shared_actions[MLX5_MAX_SHARED_ACTIONS];
- int shared_actions_n = MLX5_MAX_SHARED_ACTIONS;
+ struct mlx5_translated_action_handle
+ indir_actions[MLX5_MAX_INDIRECT_ACTIONS];
+ int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS;
const struct rte_flow_action *actions;
struct rte_flow_action *translated_actions = NULL;
- int ret = flow_shared_actions_translate(dev, original_actions,
- shared_actions,
- &shared_actions_n,
+ int ret = flow_action_handles_translate(dev, original_actions,
+ indir_actions,
+ &indir_actions_n,
&translated_actions, error);
if (ret)
@@ -7214,12 +7214,12 @@ mlx5_flow_get_aged_flows(struct rte_eth_dev *dev, void **contexts,
/* Wrapper for driver action_validate op callback */
static int
flow_drv_action_validate(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action_conf *conf,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action,
const struct mlx5_flow_driver_ops *fops,
struct rte_flow_error *error)
{
- static const char err_msg[] = "shared action validation unsupported";
+ static const char err_msg[] = "indirect action validation unsupported";
if (!fops->action_validate) {
DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
@@ -7235,8 +7235,8 @@ flow_drv_action_validate(struct rte_eth_dev *dev,
*
* @param dev
* Pointer to Ethernet device structure.
- * @param[in] action
- * Handle for the shared action to be destroyed.
+ * @param[in] handle
+ * Handle for the indirect action object to be destroyed.
* @param[out] error
* Perform verbose error reporting if not NULL. PMDs initialize this
* structure in case of error only.
@@ -7247,11 +7247,11 @@ flow_drv_action_validate(struct rte_eth_dev *dev,
* @note: wrapper for driver action_create op callback.
*/
static int
-mlx5_shared_action_destroy(struct rte_eth_dev *dev,
- struct rte_flow_shared_action *action,
+mlx5_action_handle_destroy(struct rte_eth_dev *dev,
+ struct rte_flow_action_handle *handle,
struct rte_flow_error *error)
{
- static const char err_msg[] = "shared action destruction unsupported";
+ static const char err_msg[] = "indirect action destruction unsupported";
struct rte_flow_attr attr = { .transfer = 0 };
const struct mlx5_flow_driver_ops *fops =
flow_get_drv_ops(flow_get_drv_type(dev, &attr));
@@ -7262,18 +7262,18 @@ mlx5_shared_action_destroy(struct rte_eth_dev *dev,
NULL, err_msg);
return -rte_errno;
}
- return fops->action_destroy(dev, action, error);
+ return fops->action_destroy(dev, handle, error);
}
/* Wrapper for driver action_destroy op callback */
static int
flow_drv_action_update(struct rte_eth_dev *dev,
- struct rte_flow_shared_action *action,
- const void *action_conf,
+ struct rte_flow_action_handle *handle,
+ const void *update,
const struct mlx5_flow_driver_ops *fops,
struct rte_flow_error *error)
{
- static const char err_msg[] = "shared action update unsupported";
+ static const char err_msg[] = "indirect action update unsupported";
if (!fops->action_update) {
DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
@@ -7281,18 +7281,18 @@ flow_drv_action_update(struct rte_eth_dev *dev,
NULL, err_msg);
return -rte_errno;
}
- return fops->action_update(dev, action, action_conf, error);
+ return fops->action_update(dev, handle, update, error);
}
/* Wrapper for driver action_destroy op callback */
static int
flow_drv_action_query(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action *action,
+ const struct rte_flow_action_handle *handle,
void *data,
const struct mlx5_flow_driver_ops *fops,
struct rte_flow_error *error)
{
- static const char err_msg[] = "shared action query unsupported";
+ static const char err_msg[] = "indirect action query unsupported";
if (!fops->action_query) {
DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
@@ -7300,29 +7300,31 @@ flow_drv_action_query(struct rte_eth_dev *dev,
NULL, err_msg);
return -rte_errno;
}
- return fops->action_query(dev, action, data, error);
+ return fops->action_query(dev, handle, data, error);
}
/**
- * Create shared action for reuse in multiple flow rules.
+ * Create indirect action for reuse in multiple flow rules.
*
* @param dev
* Pointer to Ethernet device structure.
+ * @param conf
+ * Pointer to indirect action object configuration.
* @param[in] action
- * Action configuration for shared action creation.
+ * Action configuration for indirect action object creation.
* @param[out] error
* Perform verbose error reporting if not NULL. PMDs initialize this
* structure in case of error only.
* @return
* A valid handle in case of success, NULL otherwise and rte_errno is set.
*/
-static struct rte_flow_shared_action *
-mlx5_shared_action_create(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action_conf *conf,
+static struct rte_flow_action_handle *
+mlx5_action_handle_create(struct rte_eth_dev *dev,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action,
struct rte_flow_error *error)
{
- static const char err_msg[] = "shared action creation unsupported";
+ static const char err_msg[] = "indirect action creation unsupported";
struct rte_flow_attr attr = { .transfer = 0 };
const struct mlx5_flow_driver_ops *fops =
flow_get_drv_ops(flow_get_drv_type(dev, &attr));
@@ -7339,19 +7341,20 @@ mlx5_shared_action_create(struct rte_eth_dev *dev,
}
/**
- * Updates inplace the shared action configuration pointed by *action* handle
- * with the configuration provided as *action* argument.
- * The update of the shared action configuration effects all flow rules reusing
- * the action via handle.
+ * Updates inplace the indirect action configuration pointed by *handle*
+ * with the configuration provided as *update* argument.
+ * The update of the indirect action configuration effects all flow rules
+ * reusing the action via handle.
*
* @param dev
* Pointer to Ethernet device structure.
- * @param[in] shared_action
- * Handle for the shared action to be updated.
- * @param[in] action
+ * @param[in] handle
+ * Handle for the indirect action to be updated.
+ * @param[in] update
* Action specification used to modify the action pointed by handle.
- * *action* should be of same type with the action pointed by the *action*
- * handle argument, otherwise considered as invalid.
+ * *update* could be of same type with the action pointed by the *handle*
+ * handle argument, or some other structures like a wrapper, depending on
+ * the indirect action type.
* @param[out] error
* Perform verbose error reporting if not NULL. PMDs initialize this
* structure in case of error only.
@@ -7360,9 +7363,9 @@ mlx5_shared_action_create(struct rte_eth_dev *dev,
* 0 on success, a negative errno value otherwise and rte_errno is set.
*/
static int
-mlx5_shared_action_update(struct rte_eth_dev *dev,
- struct rte_flow_shared_action *shared_action,
- const struct rte_flow_action *action,
+mlx5_action_handle_update(struct rte_eth_dev *dev,
+ struct rte_flow_action_handle *handle,
+ const void *update,
struct rte_flow_error *error)
{
struct rte_flow_attr attr = { .transfer = 0 };
@@ -7370,26 +7373,27 @@ mlx5_shared_action_update(struct rte_eth_dev *dev,
flow_get_drv_ops(flow_get_drv_type(dev, &attr));
int ret;
- ret = flow_drv_action_validate(dev, NULL, action, fops, error);
+ ret = flow_drv_action_validate(dev, NULL,
+ (const struct rte_flow_action *)update, fops, error);
if (ret)
return ret;
- return flow_drv_action_update(dev, shared_action, action->conf, fops,
+ return flow_drv_action_update(dev, handle, update, fops,
error);
}
/**
- * Query the shared action by handle.
+ * Query the indirect action by handle.
*
* This function allows retrieving action-specific data such as counters.
* Data is gathered by special action which may be present/referenced in
* more than one flow rule definition.
*
- * \see RTE_FLOW_ACTION_TYPE_COUNT
+ * see @RTE_FLOW_ACTION_TYPE_COUNT
*
* @param dev
* Pointer to Ethernet device structure.
- * @param[in] action
- * Handle for the shared action to query.
+ * @param[in] handle
+ * Handle for the indirect action to query.
* @param[in, out] data
* Pointer to storage for the associated query data type.
* @param[out] error
@@ -7400,8 +7404,8 @@ mlx5_shared_action_update(struct rte_eth_dev *dev,
* 0 on success, a negative errno value otherwise and rte_errno is set.
*/
static int
-mlx5_shared_action_query(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action *action,
+mlx5_action_handle_query(struct rte_eth_dev *dev,
+ const struct rte_flow_action_handle *handle,
void *data,
struct rte_flow_error *error)
{
@@ -7409,11 +7413,11 @@ mlx5_shared_action_query(struct rte_eth_dev *dev,
const struct mlx5_flow_driver_ops *fops =
flow_get_drv_ops(flow_get_drv_type(dev, &attr));
- return flow_drv_action_query(dev, action, data, fops, error);
+ return flow_drv_action_query(dev, handle, data, fops, error);
}
/**
- * Destroy all shared actions.
+ * Destroy all indirect actions (shared RSS).
*
* @param dev
* Pointer to Ethernet device.
@@ -7422,7 +7426,7 @@ mlx5_shared_action_query(struct rte_eth_dev *dev,
* 0 on success, a negative errno value otherwise and rte_errno is set.
*/
int
-mlx5_shared_action_flush(struct rte_eth_dev *dev)
+mlx5_action_handle_flush(struct rte_eth_dev *dev)
{
struct rte_flow_error error;
struct mlx5_priv *priv = dev->data->dev_private;
@@ -7432,8 +7436,8 @@ mlx5_shared_action_flush(struct rte_eth_dev *dev)
ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
priv->rss_shared_actions, idx, shared_rss, next) {
- ret |= mlx5_shared_action_destroy(dev,
- (struct rte_flow_shared_action *)(uintptr_t)idx, &error);
+ ret |= mlx5_action_handle_destroy(dev,
+ (struct rte_flow_action_handle *)(uintptr_t)idx, &error);
}
return ret;
}
diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h
index ec673c29ab..56674eb0d2 100644
--- a/drivers/net/mlx5/mlx5_flow.h
+++ b/drivers/net/mlx5/mlx5_flow.h
@@ -39,11 +39,11 @@ enum mlx5_rte_flow_action_type {
MLX5_RTE_FLOW_ACTION_TYPE_AGE,
};
-#define MLX5_SHARED_ACTION_TYPE_OFFSET 30
+#define MLX5_INDIRECT_ACTION_TYPE_OFFSET 30
enum {
- MLX5_SHARED_ACTION_TYPE_RSS,
- MLX5_SHARED_ACTION_TYPE_AGE,
+ MLX5_INDIRECT_ACTION_TYPE_RSS,
+ MLX5_INDIRECT_ACTION_TYPE_AGE,
};
/* Matches on selected register. */
@@ -1152,7 +1152,7 @@ struct mlx5_shared_action_rss {
rte_spinlock_t action_rss_sl; /**< Shared RSS action spinlock. */
};
-struct rte_flow_shared_action {
+struct rte_flow_action_handle {
uint32_t id;
};
@@ -1233,26 +1233,26 @@ typedef int (*mlx5_flow_get_aged_flows_t)
struct rte_flow_error *error);
typedef int (*mlx5_flow_action_validate_t)
(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action_conf *conf,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action,
struct rte_flow_error *error);
-typedef struct rte_flow_shared_action *(*mlx5_flow_action_create_t)
+typedef struct rte_flow_action_handle *(*mlx5_flow_action_create_t)
(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action_conf *conf,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action,
struct rte_flow_error *error);
typedef int (*mlx5_flow_action_destroy_t)
(struct rte_eth_dev *dev,
- struct rte_flow_shared_action *action,
+ struct rte_flow_action_handle *action,
struct rte_flow_error *error);
typedef int (*mlx5_flow_action_update_t)
(struct rte_eth_dev *dev,
- struct rte_flow_shared_action *action,
- const void *action_conf,
+ struct rte_flow_action_handle *action,
+ const void *update,
struct rte_flow_error *error);
typedef int (*mlx5_flow_action_query_t)
(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action *action,
+ const struct rte_flow_action_handle *action,
void *data,
struct rte_flow_error *error);
typedef int (*mlx5_flow_sync_domain_t)
@@ -1483,7 +1483,7 @@ int mlx5_flow_destroy_policer_rules(struct rte_eth_dev *dev,
int mlx5_flow_meter_flush(struct rte_eth_dev *dev,
struct rte_mtr_error *error);
int mlx5_flow_dv_discover_counter_offset_support(struct rte_eth_dev *dev);
-int mlx5_shared_action_flush(struct rte_eth_dev *dev);
+int mlx5_action_handle_flush(struct rte_eth_dev *dev);
void mlx5_release_tunnel_hub(struct mlx5_dev_ctx_shared *sh, uint16_t port_id);
int mlx5_alloc_tunnel_hub(struct mlx5_dev_ctx_shared *sh);
diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index e65cc13bd6..d02e97b3f4 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -12870,7 +12870,7 @@ __flow_dv_action_rss_setup(struct rte_eth_dev *dev,
*/
static uint32_t
__flow_dv_action_rss_create(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action_conf *conf,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action_rss *rss,
struct rte_flow_error *error)
{
@@ -12893,7 +12893,7 @@ __flow_dv_action_rss_create(struct rte_eth_dev *dev,
"cannot allocate resource memory");
goto error_rss_init;
}
- if (idx > (1u << MLX5_SHARED_ACTION_TYPE_OFFSET)) {
+ if (idx > (1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET)) {
rte_flow_error_set(error, E2BIG,
RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
"rss action number out of range");
@@ -13006,7 +13006,7 @@ __flow_dv_action_rss_release(struct rte_eth_dev *dev, uint32_t idx,
}
/**
- * Create shared action, lock free,
+ * Create indirect action, lock free,
* (mutex should be acquired by caller).
* Dispatcher for action type specific call.
*
@@ -13015,7 +13015,7 @@ __flow_dv_action_rss_release(struct rte_eth_dev *dev, uint32_t idx,
* @param[in] conf
* Shared action configuration.
* @param[in] action
- * Action specification used to create shared action.
+ * Action specification used to create indirect action.
* @param[out] error
* Perform verbose error reporting if not NULL. Initialized in case of
* error only.
@@ -13024,9 +13024,9 @@ __flow_dv_action_rss_release(struct rte_eth_dev *dev, uint32_t idx,
* A valid shared action handle in case of success, NULL otherwise and
* rte_errno is set.
*/
-static struct rte_flow_shared_action *
+static struct rte_flow_action_handle *
flow_dv_action_create(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action_conf *conf,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action,
struct rte_flow_error *err)
{
@@ -13036,13 +13036,13 @@ flow_dv_action_create(struct rte_eth_dev *dev,
switch (action->type) {
case RTE_FLOW_ACTION_TYPE_RSS:
ret = __flow_dv_action_rss_create(dev, conf, action->conf, err);
- idx = (MLX5_SHARED_ACTION_TYPE_RSS <<
- MLX5_SHARED_ACTION_TYPE_OFFSET) | ret;
+ idx = (MLX5_INDIRECT_ACTION_TYPE_RSS <<
+ MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
break;
case RTE_FLOW_ACTION_TYPE_AGE:
ret = flow_dv_translate_create_aso_age(dev, action->conf, err);
- idx = (MLX5_SHARED_ACTION_TYPE_AGE <<
- MLX5_SHARED_ACTION_TYPE_OFFSET) | ret;
+ idx = (MLX5_INDIRECT_ACTION_TYPE_AGE <<
+ MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
if (ret) {
struct mlx5_aso_age_action *aso_age =
flow_aso_age_get_by_idx(dev, ret);
@@ -13057,19 +13057,19 @@ flow_dv_action_create(struct rte_eth_dev *dev,
NULL, "action type not supported");
break;
}
- return ret ? (struct rte_flow_shared_action *)(uintptr_t)idx : NULL;
+ return ret ? (struct rte_flow_action_handle *)(uintptr_t)idx : NULL;
}
/**
- * Destroy the shared action.
+ * Destroy the indirect action.
* Release action related resources on the NIC and the memory.
* Lock free, (mutex should be acquired by caller).
* Dispatcher for action type specific call.
*
* @param[in] dev
* Pointer to the Ethernet device structure.
- * @param[in] action
- * The shared action object to be removed.
+ * @param[in] handle
+ * The indirect action object handle to be removed.
* @param[out] error
* Perform verbose error reporting if not NULL. Initialized in case of
* error only.
@@ -13079,25 +13079,25 @@ flow_dv_action_create(struct rte_eth_dev *dev,
*/
static int
flow_dv_action_destroy(struct rte_eth_dev *dev,
- struct rte_flow_shared_action *action,
+ struct rte_flow_action_handle *handle,
struct rte_flow_error *error)
{
- uint32_t act_idx = (uint32_t)(uintptr_t)action;
- uint32_t type = act_idx >> MLX5_SHARED_ACTION_TYPE_OFFSET;
- uint32_t idx = act_idx & ((1u << MLX5_SHARED_ACTION_TYPE_OFFSET) - 1);
+ uint32_t act_idx = (uint32_t)(uintptr_t)handle;
+ uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
+ uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
int ret;
switch (type) {
- case MLX5_SHARED_ACTION_TYPE_RSS:
+ case MLX5_INDIRECT_ACTION_TYPE_RSS:
return __flow_dv_action_rss_release(dev, idx, error);
- case MLX5_SHARED_ACTION_TYPE_AGE:
+ case MLX5_INDIRECT_ACTION_TYPE_AGE:
ret = flow_dv_aso_age_release(dev, idx);
if (ret)
/*
* In this case, the last flow has a reference will
* actually release the age action.
*/
- DRV_LOG(DEBUG, "Shared age action %" PRIu32 " was"
+ DRV_LOG(DEBUG, "Indirect age action %" PRIu32 " was"
" released with references %d.", idx, ret);
return 0;
default:
@@ -13180,12 +13180,13 @@ __flow_dv_action_rss_update(struct rte_eth_dev *dev, uint32_t idx,
*
* @param[in] dev
* Pointer to the Ethernet device structure.
- * @param[in] action
- * The shared action object to be updated.
- * @param[in] action_conf
- * Action specification used to modify *action*.
- * *action_conf* should be of type correlating with type of the *action*,
- * otherwise considered as invalid.
+ * @param[in] handle
+ * The indirect action object handle to be updated.
+ * @param[in] update
+ * Action specification used to modify the action pointed by *handle*.
+ * *update* could be of same type with the action pointed by the *handle*
+ * handle argument, or some other structures like a wrapper, depending on
+ * the indirect action type.
* @param[out] error
* Perform verbose error reporting if not NULL. Initialized in case of
* error only.
@@ -13195,16 +13196,18 @@ __flow_dv_action_rss_update(struct rte_eth_dev *dev, uint32_t idx,
*/
static int
flow_dv_action_update(struct rte_eth_dev *dev,
- struct rte_flow_shared_action *action,
- const void *action_conf,
+ struct rte_flow_action_handle *handle,
+ const void *update,
struct rte_flow_error *err)
{
- uint32_t act_idx = (uint32_t)(uintptr_t)action;
- uint32_t type = act_idx >> MLX5_SHARED_ACTION_TYPE_OFFSET;
- uint32_t idx = act_idx & ((1u << MLX5_SHARED_ACTION_TYPE_OFFSET) - 1);
+ uint32_t act_idx = (uint32_t)(uintptr_t)handle;
+ uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
+ uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
+ const void *action_conf;
switch (type) {
- case MLX5_SHARED_ACTION_TYPE_RSS:
+ case MLX5_INDIRECT_ACTION_TYPE_RSS:
+ action_conf = ((const struct rte_flow_action *)update)->conf;
return __flow_dv_action_rss_update(dev, idx, action_conf, err);
default:
return rte_flow_error_set(err, ENOTSUP,
@@ -13216,17 +13219,17 @@ flow_dv_action_update(struct rte_eth_dev *dev,
static int
flow_dv_action_query(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action *action, void *data,
+ const struct rte_flow_action_handle *handle, void *data,
struct rte_flow_error *error)
{
struct mlx5_age_param *age_param;
struct rte_flow_query_age *resp;
- uint32_t act_idx = (uint32_t)(uintptr_t)action;
- uint32_t type = act_idx >> MLX5_SHARED_ACTION_TYPE_OFFSET;
- uint32_t idx = act_idx & ((1u << MLX5_SHARED_ACTION_TYPE_OFFSET) - 1);
+ uint32_t act_idx = (uint32_t)(uintptr_t)handle;
+ uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
+ uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
switch (type) {
- case MLX5_SHARED_ACTION_TYPE_AGE:
+ case MLX5_INDIRECT_ACTION_TYPE_AGE:
age_param = &flow_aso_age_get_by_idx(dev, idx)->age_params;
resp = data;
resp->aged = __atomic_load_n(&age_param->state,
@@ -14002,7 +14005,7 @@ flow_dv_counter_allocate(struct rte_eth_dev *dev)
}
/**
- * Validate shared action.
+ * Validate indirect action.
* Dispatcher for action type specific validation.
*
* @param[in] dev
@@ -14010,7 +14013,7 @@ flow_dv_counter_allocate(struct rte_eth_dev *dev)
* @param[in] conf
* Shared action configuration.
* @param[in] action
- * The shared action object to validate.
+ * The indirect action object to validate.
* @param[out] error
* Perform verbose error reporting if not NULL. Initialized in case of
* error only.
@@ -14020,7 +14023,7 @@ flow_dv_counter_allocate(struct rte_eth_dev *dev)
*/
static int
flow_dv_action_validate(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action_conf *conf,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action,
struct rte_flow_error *err)
{
diff --git a/lib/librte_ethdev/rte_flow.c b/lib/librte_ethdev/rte_flow.c
index 7241f00353..0d2610b7c4 100644
--- a/lib/librte_ethdev/rte_flow.c
+++ b/lib/librte_ethdev/rte_flow.c
@@ -180,12 +180,12 @@ static const struct rte_flow_desc_data rte_flow_desc_action[] = {
MK_FLOW_ACTION(MODIFY_FIELD,
sizeof(struct rte_flow_action_modify_field)),
/**
- * Shared action represented as handle of type
- * (struct rte_flow_shared action *) stored in conf field (see
+ * Indirect action represented as handle of type
+ * (struct rte_flow_action_handle *) stored in conf field (see
* struct rte_flow_action); no need for additional structure to * store
- * shared action handle.
+ * indirect action handle.
*/
- MK_FLOW_ACTION(SHARED, 0),
+ MK_FLOW_ACTION(INDIRECT, 0),
};
int
@@ -1068,53 +1068,53 @@ rte_flow_get_aged_flows(uint16_t port_id, void **contexts,
NULL, rte_strerror(ENOTSUP));
}
-struct rte_flow_shared_action *
-rte_flow_shared_action_create(uint16_t port_id,
- const struct rte_flow_shared_action_conf *conf,
+struct rte_flow_action_handle *
+rte_flow_action_handle_create(uint16_t port_id,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action,
struct rte_flow_error *error)
{
- struct rte_flow_shared_action *shared_action;
+ struct rte_flow_action_handle *handle;
const struct rte_flow_ops *ops = rte_flow_ops_get(port_id, error);
if (unlikely(!ops))
return NULL;
- if (unlikely(!ops->shared_action_create)) {
+ if (unlikely(!ops->action_handle_create)) {
rte_flow_error_set(error, ENOSYS,
RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
rte_strerror(ENOSYS));
return NULL;
}
- shared_action = ops->shared_action_create(&rte_eth_devices[port_id],
- conf, action, error);
- if (shared_action == NULL)
+ handle = ops->action_handle_create(&rte_eth_devices[port_id],
+ conf, action, error);
+ if (handle == NULL)
flow_err(port_id, -rte_errno, error);
- return shared_action;
+ return handle;
}
int
-rte_flow_shared_action_destroy(uint16_t port_id,
- struct rte_flow_shared_action *action,
- struct rte_flow_error *error)
+rte_flow_action_handle_destroy(uint16_t port_id,
+ struct rte_flow_action_handle *handle,
+ struct rte_flow_error *error)
{
int ret;
const struct rte_flow_ops *ops = rte_flow_ops_get(port_id, error);
if (unlikely(!ops))
return -rte_errno;
- if (unlikely(!ops->shared_action_destroy))
+ if (unlikely(!ops->action_handle_destroy))
return rte_flow_error_set(error, ENOSYS,
RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
NULL, rte_strerror(ENOSYS));
- ret = ops->shared_action_destroy(&rte_eth_devices[port_id], action,
- error);
+ ret = ops->action_handle_destroy(&rte_eth_devices[port_id],
+ handle, error);
return flow_err(port_id, ret, error);
}
int
-rte_flow_shared_action_update(uint16_t port_id,
- struct rte_flow_shared_action *action,
- const struct rte_flow_action *update,
+rte_flow_action_handle_update(uint16_t port_id,
+ struct rte_flow_action_handle *handle,
+ const void *update,
struct rte_flow_error *error)
{
int ret;
@@ -1122,18 +1122,18 @@ rte_flow_shared_action_update(uint16_t port_id,
if (unlikely(!ops))
return -rte_errno;
- if (unlikely(!ops->shared_action_update))
+ if (unlikely(!ops->action_handle_update))
return rte_flow_error_set(error, ENOSYS,
RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
NULL, rte_strerror(ENOSYS));
- ret = ops->shared_action_update(&rte_eth_devices[port_id], action,
+ ret = ops->action_handle_update(&rte_eth_devices[port_id], handle,
update, error);
return flow_err(port_id, ret, error);
}
int
-rte_flow_shared_action_query(uint16_t port_id,
- const struct rte_flow_shared_action *action,
+rte_flow_action_handle_query(uint16_t port_id,
+ const struct rte_flow_action_handle *handle,
void *data,
struct rte_flow_error *error)
{
@@ -1142,11 +1142,11 @@ rte_flow_shared_action_query(uint16_t port_id,
if (unlikely(!ops))
return -rte_errno;
- if (unlikely(!ops->shared_action_query))
+ if (unlikely(!ops->action_handle_query))
return rte_flow_error_set(error, ENOSYS,
RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
NULL, rte_strerror(ENOSYS));
- ret = ops->shared_action_query(&rte_eth_devices[port_id], action,
+ ret = ops->action_handle_query(&rte_eth_devices[port_id], handle,
data, error);
return flow_err(port_id, ret, error);
}
diff --git a/lib/librte_ethdev/rte_flow.h b/lib/librte_ethdev/rte_flow.h
index 203c4cde9a..324d00abdc 100644
--- a/lib/librte_ethdev/rte_flow.h
+++ b/lib/librte_ethdev/rte_flow.h
@@ -1821,7 +1821,7 @@ enum rte_flow_action_type {
* Enables counters for this flow rule.
*
* These counters can be retrieved and reset through rte_flow_query() or
- * rte_flow_shared_action_query() if the action provided via handle,
+ * rte_flow_action_handle_query() if the action provided via handle,
* see struct rte_flow_query_count.
*
* See struct rte_flow_action_count.
@@ -2267,6 +2267,16 @@ enum rte_flow_action_type {
* See struct rte_flow_action_modify_field.
*/
RTE_FLOW_ACTION_TYPE_MODIFY_FIELD,
+
+ /**
+ * Describe indirect action that could be used by a single flow rule
+ * or multiple flow rules.
+ *
+ * Allow flow rule(s) reference the same action by the indirect action
+ * handle (see struct rte_flow_action_handle), rules could be on the
+ * same port or across different ports.
+ */
+ RTE_FLOW_ACTION_TYPE_INDIRECT,
};
/**
@@ -2357,7 +2367,7 @@ struct rte_flow_query_age {
* ``struct rte_flow_query_count``.
*
* @deprecated Shared attribute is deprecated, use generic
- * RTE_FLOW_ACTION_TYPE_SHARED action.
+ * RTE_FLOW_ACTION_TYPE_INDIRECT action.
*
* The shared flag indicates whether the counter is unique to the flow rule the
* action is specified with, or whether it is a shared counter.
@@ -2847,17 +2857,23 @@ struct rte_flow_action_set_dscp {
};
/**
- * RTE_FLOW_ACTION_TYPE_SHARED
+ * @warning
+ * @b EXPERIMENTAL: this structure may change without prior notice
+ *
+ * RTE_FLOW_ACTION_TYPE_INDIRECT
*
- * Opaque type returned after successfully creating a shared action.
+ * Opaque type returned after successfully creating an indirect action object.
+ * The definition of the object handle will be different per driver or
+ * per immediate action type.
*
- * This handle can be used to manage and query the related action:
- * - share it across multiple flow rules
- * - update action configuration
- * - query action data
- * - destroy action
+ * This handle can be used to manage and query the related immediate action:
+ * - referenced in single flow rule or across multiple flow rules
+ * over multiple ports
+ * - update action object configuration
+ * - query action object data
+ * - destroy action object
*/
-struct rte_flow_shared_action;
+struct rte_flow_action_handle;
/**
* Field IDs for MODIFY_FIELD action.
@@ -3631,25 +3647,22 @@ rte_flow_get_aged_flows(uint16_t port_id, void **contexts,
uint32_t nb_contexts, struct rte_flow_error *error);
/**
- * Specify shared action configuration
+ * Specify indirect action object configuration
*/
-struct rte_flow_shared_action_conf {
+struct rte_flow_indir_action_conf {
/**
- * Flow direction for shared action configuration.
+ * Flow direction for the indirect action configuration.
*
- * Shared action should be valid at least for one flow direction,
+ * Action should be valid at least for one flow direction,
* otherwise it is invalid for both ingress and egress rules.
*/
uint32_t ingress:1;
/**< Action valid for rules applied to ingress traffic. */
uint32_t egress:1;
/**< Action valid for rules applied to egress traffic. */
-
/**
* When set to 1, indicates that the action is valid for
* transfer traffic; otherwise, for non-transfer traffic.
- *
- * See struct rte_flow_attr.
*/
uint32_t transfer:1;
};
@@ -3658,16 +3671,17 @@ struct rte_flow_shared_action_conf {
* @warning
* @b EXPERIMENTAL: this API may change without prior notice.
*
- * Create shared action for reuse in multiple flow rules.
- * The created shared action has single state and configuration
- * across all flow rules using it.
+ * Create an indirect action object that can be used by flow create, and
+ * could also be shared by different flows.
+ * The created object handle has single state and configuration
+ * across all the flow rules using it.
*
* @param[in] port_id
* The port identifier of the Ethernet device.
* @param[in] conf
- * Shared action configuration.
+ * Action configuration for the indirect action object creation.
* @param[in] action
- * Action configuration for shared action creation.
+ * Specific configuration of the indirect action object.
* @param[out] error
* Perform verbose error reporting if not NULL. PMDs initialize this
* structure in case of error only.
@@ -3681,9 +3695,9 @@ struct rte_flow_shared_action_conf {
* - (ENOTSUP) if *action* valid but unsupported.
*/
__rte_experimental
-struct rte_flow_shared_action *
-rte_flow_shared_action_create(uint16_t port_id,
- const struct rte_flow_shared_action_conf *conf,
+struct rte_flow_action_handle *
+rte_flow_action_handle_create(uint16_t port_id,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action,
struct rte_flow_error *error);
@@ -3691,12 +3705,12 @@ rte_flow_shared_action_create(uint16_t port_id,
* @warning
* @b EXPERIMENTAL: this API may change without prior notice.
*
- * Destroy the shared action by handle.
+ * Destroy indirect action by handle.
*
* @param[in] port_id
* The port identifier of the Ethernet device.
- * @param[in] action
- * Handle for the shared action to be destroyed.
+ * @param[in] handle
+ * Handle for the indirect action object to be destroyed.
* @param[out] error
* Perform verbose error reporting if not NULL. PMDs initialize this
* structure in case of error only.
@@ -3711,27 +3725,30 @@ rte_flow_shared_action_create(uint16_t port_id,
*/
__rte_experimental
int
-rte_flow_shared_action_destroy(uint16_t port_id,
- struct rte_flow_shared_action *action,
+rte_flow_action_handle_destroy(uint16_t port_id,
+ struct rte_flow_action_handle *handle,
struct rte_flow_error *error);
/**
* @warning
* @b EXPERIMENTAL: this API may change without prior notice.
*
- * Update in-place the shared action configuration pointed by *action* handle
- * with the configuration provided as *update* argument.
- * The update of the shared action configuration effects all flow rules reusing
- * the action via handle.
+ * Update in-place the action configuration and / or state pointed
+ * by action *handle* with the configuration provided as *update* argument.
+ * The update of the action configuration effects all flow rules reusing
+ * the action via *handle*.
+ * The update general pointer provides the ability of partial updating.
*
* @param[in] port_id
* The port identifier of the Ethernet device.
- * @param[in] action
- * Handle for the shared action to be updated.
+ * @param[in] handle
+ * Handle for the indirect action object to be updated.
* @param[in] update
- * Action specification used to modify the action pointed by handle.
- * *update* should be of same type with the action pointed by the *action*
- * handle argument, otherwise considered as invalid.
+ * Update profile specification used to modify the action pointed by handle.
+ * *update* could be with the same type of the immediate action corresponding
+ * to the *handle* argument when creating, or a wrapper structure includes
+ * action configuration to be updated and bit fields to indicate the member
+ * of fields inside the action to update.
* @param[out] error
* Perform verbose error reporting if not NULL. PMDs initialize this
* structure in case of error only.
@@ -3742,32 +3759,32 @@ rte_flow_shared_action_destroy(uint16_t port_id,
* - (-EIO) if underlying device is removed.
* - (-EINVAL) if *update* invalid.
* - (-ENOTSUP) if *update* valid but unsupported.
- * - (-ENOENT) if action pointed by *ctx* was not found.
+ * - (-ENOENT) if indirect action object pointed by *handle* was not found.
* rte_errno is also set.
*/
__rte_experimental
int
-rte_flow_shared_action_update(uint16_t port_id,
- struct rte_flow_shared_action *action,
- const struct rte_flow_action *update,
+rte_flow_action_handle_update(uint16_t port_id,
+ struct rte_flow_action_handle *handle,
+ const void *update,
struct rte_flow_error *error);
/**
* @warning
* @b EXPERIMENTAL: this API may change without prior notice.
*
- * Query the shared action by handle.
+ * Query the direct action by corresponding indirect action object handle.
*
* Retrieve action-specific data such as counters.
* Data is gathered by special action which may be present/referenced in
* more than one flow rule definition.
*
- * \see RTE_FLOW_ACTION_TYPE_COUNT
+ * @see RTE_FLOW_ACTION_TYPE_COUNT
*
* @param port_id
* Port identifier of Ethernet device.
- * @param[in] action
- * Handle for the shared action to query.
+ * @param[in] handle
+ * Handle for the action object to query.
* @param[in, out] data
* Pointer to storage for the associated query data type.
* @param[out] error
@@ -3779,10 +3796,9 @@ rte_flow_shared_action_update(uint16_t port_id,
*/
__rte_experimental
int
-rte_flow_shared_action_query(uint16_t port_id,
- const struct rte_flow_shared_action *action,
- void *data,
- struct rte_flow_error *error);
+rte_flow_action_handle_query(uint16_t port_id,
+ const struct rte_flow_action_handle *handle,
+ void *data, struct rte_flow_error *error);
/* Tunnel has a type and the key information. */
struct rte_flow_tunnel {
diff --git a/lib/librte_ethdev/rte_flow_driver.h b/lib/librte_ethdev/rte_flow_driver.h
index 6ae1f8c264..46f62c2ec2 100644
--- a/lib/librte_ethdev/rte_flow_driver.h
+++ b/lib/librte_ethdev/rte_flow_driver.h
@@ -84,27 +84,27 @@ struct rte_flow_ops {
void **context,
uint32_t nb_contexts,
struct rte_flow_error *err);
- /** See rte_flow_shared_action_create() */
- struct rte_flow_shared_action *(*shared_action_create)
+ /** See rte_flow_action_handle_create() */
+ struct rte_flow_action_handle *(*action_handle_create)
(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action_conf *conf,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action,
struct rte_flow_error *error);
- /** See rte_flow_shared_action_destroy() */
- int (*shared_action_destroy)
+ /** See rte_flow_action_handle_destroy() */
+ int (*action_handle_destroy)
(struct rte_eth_dev *dev,
- struct rte_flow_shared_action *shared_action,
+ struct rte_flow_action_handle *handle,
struct rte_flow_error *error);
- /** See rte_flow_shared_action_update() */
- int (*shared_action_update)
+ /** See rte_flow_action_handle_update() */
+ int (*action_handle_update)
(struct rte_eth_dev *dev,
- struct rte_flow_shared_action *shared_action,
- const struct rte_flow_action *update,
+ struct rte_flow_action_handle *handle,
+ const void *update,
struct rte_flow_error *error);
- /** See rte_flow_shared_action_query() */
- int (*shared_action_query)
+ /** See rte_flow_action_handle_query() */
+ int (*action_handle_query)
(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action *shared_action,
+ const struct rte_flow_action_handle *handle,
void *data,
struct rte_flow_error *error);
/** See rte_flow_tunnel_decap_set() */
diff --git a/lib/librte_ethdev/version.map b/lib/librte_ethdev/version.map
index 93ad388e96..4eb561a89a 100644
--- a/lib/librte_ethdev/version.map
+++ b/lib/librte_ethdev/version.map
@@ -231,10 +231,6 @@ EXPERIMENTAL {
rte_eth_fec_get_capability;
rte_eth_fec_get;
rte_eth_fec_set;
- rte_flow_shared_action_create;
- rte_flow_shared_action_destroy;
- rte_flow_shared_action_query;
- rte_flow_shared_action_update;
rte_flow_tunnel_decap_set;
rte_flow_tunnel_match;
rte_flow_get_restore_info;
@@ -246,6 +242,10 @@ EXPERIMENTAL {
# added in 21.05
rte_eth_representor_info_get;
+ rte_flow_action_handle_create;
+ rte_flow_action_handle_destroy;
+ rte_flow_action_handle_update;
+ rte_flow_action_handle_query;
};
INTERNAL {
--
2.19.0.windows.1
^ permalink raw reply [relevance 1%]
* Re: [dpdk-dev] [PATCH v2 1/4] ethdev: introduce indirect action APIs
2021-04-15 13:55 0% ` Andrew Rybchenko
@ 2021-04-15 14:10 0% ` Thomas Monjalon
2021-04-15 16:02 0% ` Andrew Rybchenko
0 siblings, 1 reply; 200+ results
From: Thomas Monjalon @ 2021-04-15 14:10 UTC (permalink / raw)
To: Bing Zhao, Andrew Rybchenko
Cc: orika, ferruh.yigit, matan, viacheslavo, dev, ajit.khaparde,
getelson, andreyv
15/04/2021 15:55, Andrew Rybchenko:
> On 4/10/21 5:03 PM, Bing Zhao wrote:
> > Right now, rte_flow_shared_action_* APIs are used for some shared
> > actions, like RSS, count. The shared action should be created before
> > using it inside a flow. These shared actions sometimes are not
> > really shared but just some indirect actions decoupled from a flow.
> >
> > The new functions rte_flow_action_handle_* are added to replace
> > the current shared functions rte_flow_shared_action_*.
> >
> > There are two types of flow actions:
> > 1. the direct (normal) actions that could be created and stored
> > within a flow rule. Such action is tied to its flow rule and
> > cannot be reused.
> > 2. the indirect action, in the past, named shared_action. It is
> > created from a direct actioni, like count or rss, and then used
> > in the flow rules with an object handle. The PMD will take care
> > of the retrieve from indirect action to the direct action
> > when it is referenced.
> >
> > The indirect action is accessed (update / query) w/o any flow rule,
> > just via the action object handle. For example, when querying or
> > resetting a counter, it could be done out of any flow using this
> > counter, but only the handle of the counter action object is
> > required.
> > The indirect action object could be shared by different flows or
> > used by a single flow, depending on the direct action type and
> > the real-life requirements.
> > The handle of an indirect action object is opaque and defined in
> > each driver and possibly different per direct action type.
> >
> > The old name "shared" is improper in a sense and should be replaced.
> >
> > All the command lines in testpmd application with "shared_action*"
> > are replaced with "indirect_action*".
> >
> > The parameter of "update" interface is also changed. A general
> > pointer will replace the rte_flow_action struct pointer due to the
> > facts:
> > 1. Some action may not support fields updating. In the example of a
> > counter, the only "update" supported should be the reset. So
> > passing a rte_flow_action struct pointer is meaningless and
> > there is even no such corresponding action struct. What's more,
> > if more than one operations should be supported, for some other
> > action, such pointer parameter may not meet the need.
> > 2. Some action may need conditional or partial update, the current
> > parameter will not provide the ability to indicate which part(s)
> > to update.
> > For different types of indirect action objects, the pointer could
> > either be the same of rte_flow_action* struct - in order not to
> > break the current driver implementation, or some wrapper
> > structures with bits as masks to indicate which part to be
> > updated, depending on real needs of the corresponding direct
> > action. For different direct actions, the structures of indirect
> > action objects updating will be different.
> >
> > All the underlayer PMD callbacks will be moved to these new APIs.
> >
> > The RTE_FLOW_ACTION_TYPE_SHARED is kept for now in order not to
> > break the ABI. All the implementations are changed by using
> > RTE_FLOW_ACTION_TYPE_INDIRECT.
> >
> > Signed-off-by: Bing Zhao <bingz@nvidia.com>
>
> Just for the record. I still dislike renaming since "shared" highlights
> purpose (what is definitely better), but "indirect" is just a technical
> detail on how it is done.
The difference is that indirect action is not only for sharing.
It allows manipulating an action as an object.
Action object is inserted in flow rules through the indirect action.
Does it make it clearer?
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH v2 1/4] ethdev: introduce indirect action APIs
2021-04-10 14:03 4% ` [dpdk-dev] [PATCH v2 1/4] ethdev: introduce indirect action APIs Bing Zhao
2021-04-12 19:42 0% ` Ferruh Yigit
2021-04-13 12:36 0% ` Andrey Vesnovaty
@ 2021-04-15 13:55 0% ` Andrew Rybchenko
2021-04-15 14:10 0% ` Thomas Monjalon
2 siblings, 1 reply; 200+ results
From: Andrew Rybchenko @ 2021-04-15 13:55 UTC (permalink / raw)
To: Bing Zhao, orika, thomas, ferruh.yigit, matan, viacheslavo
Cc: dev, ajit.khaparde, getelson, andreyv
On 4/10/21 5:03 PM, Bing Zhao wrote:
> Right now, rte_flow_shared_action_* APIs are used for some shared
> actions, like RSS, count. The shared action should be created before
> using it inside a flow. These shared actions sometimes are not
> really shared but just some indirect actions decoupled from a flow.
>
> The new functions rte_flow_action_handle_* are added to replace
> the current shared functions rte_flow_shared_action_*.
>
> There are two types of flow actions:
> 1. the direct (normal) actions that could be created and stored
> within a flow rule. Such action is tied to its flow rule and
> cannot be reused.
> 2. the indirect action, in the past, named shared_action. It is
> created from a direct actioni, like count or rss, and then used
> in the flow rules with an object handle. The PMD will take care
> of the retrieve from indirect action to the direct action
> when it is referenced.
>
> The indirect action is accessed (update / query) w/o any flow rule,
> just via the action object handle. For example, when querying or
> resetting a counter, it could be done out of any flow using this
> counter, but only the handle of the counter action object is
> required.
> The indirect action object could be shared by different flows or
> used by a single flow, depending on the direct action type and
> the real-life requirements.
> The handle of an indirect action object is opaque and defined in
> each driver and possibly different per direct action type.
>
> The old name "shared" is improper in a sense and should be replaced.
>
> All the command lines in testpmd application with "shared_action*"
> are replaced with "indirect_action*".
>
> The parameter of "update" interface is also changed. A general
> pointer will replace the rte_flow_action struct pointer due to the
> facts:
> 1. Some action may not support fields updating. In the example of a
> counter, the only "update" supported should be the reset. So
> passing a rte_flow_action struct pointer is meaningless and
> there is even no such corresponding action struct. What's more,
> if more than one operations should be supported, for some other
> action, such pointer parameter may not meet the need.
> 2. Some action may need conditional or partial update, the current
> parameter will not provide the ability to indicate which part(s)
> to update.
> For different types of indirect action objects, the pointer could
> either be the same of rte_flow_action* struct - in order not to
> break the current driver implementation, or some wrapper
> structures with bits as masks to indicate which part to be
> updated, depending on real needs of the corresponding direct
> action. For different direct actions, the structures of indirect
> action objects updating will be different.
>
> All the underlayer PMD callbacks will be moved to these new APIs.
>
> The RTE_FLOW_ACTION_TYPE_SHARED is kept for now in order not to
> break the ABI. All the implementations are changed by using
> RTE_FLOW_ACTION_TYPE_INDIRECT.
>
> Signed-off-by: Bing Zhao <bingz@nvidia.com>
Just for the record. I still dislike renaming since "shared" highlights
purpose (what is definitely better), but "indirect" is just a technical
detail on how it is done.
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH V3] ethdev: add queue state when retrieve queue information
2021-04-15 12:45 0% ` Ferruh Yigit
@ 2021-04-15 13:34 3% ` Thomas Monjalon
2021-04-16 0:58 0% ` [dpdk-dev] [Linuxarm] " oulijun
1 sibling, 0 replies; 200+ results
From: Thomas Monjalon @ 2021-04-15 13:34 UTC (permalink / raw)
To: Lijun Ou, Ferruh Yigit
Cc: Ray Kinsella, David Marchand, dev, linuxarm, Andrew Rybchenko
15/04/2021 14:45, Ferruh Yigit:
> On 4/15/2021 1:36 PM, Thomas Monjalon wrote:
> > 15/04/2021 14:33, Ferruh Yigit:
> >> On 4/15/2021 3:40 AM, Lijun Ou wrote:
> >>> Currently, upper-layer application could get queue state only
> >>> through pointers such as dev->data->tx_queue_state[queue_id],
> >>> this is not the recommended way to access it. So this patch
> >>> add get queue state when call rte_eth_rx_queue_info_get and
> >>> rte_eth_tx_queue_info_get API.
> >>>
> >>> Note: After add queue_state field, the 'struct rte_eth_rxq_info' size
> >>> remains 128B, and the 'struct rte_eth_txq_info' size remains 64B, so
> >>> it could be ABI compatible.
> >>>
> >>> Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
> >>> Signed-off-by: Lijun Ou <oulijun@huawei.com>
> >>
> >> Looks good to me, but it is causing an ABI error as we already discussed before
> >> as that is false positive.
> >>
> >> Ray, David,
> >>
> >> Should we add any exception to libabigail.abignore for this?
> >
> > We do not tolerate any ABI warning.
> > If we are sure the ABI change is false positive,
> > it must be suppressed in libabigail.abignore in the same patch.
>
> A new field is added to public structs, but struct size or the location of the
> existing fields are not changing (struct is cache aligned).
>
> Can you please support how this can be added to 'libabigail.abignore'?
This is how you can check the struct sizes (in 32 and 64-bit builds):
for lib in ethdev ; do for struct in rte_eth_{r,t}xq_info ; do for build in dpdk-build/build-{32b,x86-generic} ; do basename $build ; pahole -sC $struct $build/lib/librte_$lib.a ; done ; done ; done
I confirm the additions are not changing the ABI.
And because they are provided as output infos,
there is no issue like using potentially unitialized holes.
It must be explicited in libabigail with this syntax:
https://sourceware.org/libabigail/manual/libabigail-concepts.html#suppress-type
; Ignore fields inserted in alignment hole of rte_eth_rxq_info
[suppress_type]
name = rte_eth_rxq_info
has_data_member_inserted_at = offset_after(scattered_rx)
; Ignore fields inserted in cacheline boundary of rte_eth_txq_info
[suppress_type]
name = rte_eth_txq_info
has_data_member_inserted_between = {offset_after(nb_desc), end}
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [PATCH V3] ethdev: add queue state when retrieve queue information
2021-04-15 12:36 4% ` Thomas Monjalon
@ 2021-04-15 12:45 0% ` Ferruh Yigit
2021-04-15 13:34 3% ` Thomas Monjalon
2021-04-16 0:58 0% ` [dpdk-dev] [Linuxarm] " oulijun
0 siblings, 2 replies; 200+ results
From: Ferruh Yigit @ 2021-04-15 12:45 UTC (permalink / raw)
To: Thomas Monjalon
Cc: Lijun Ou, Ray Kinsella, David Marchand, dev, linuxarm, Andrew Rybchenko
On 4/15/2021 1:36 PM, Thomas Monjalon wrote:
> 15/04/2021 14:33, Ferruh Yigit:
>> On 4/15/2021 3:40 AM, Lijun Ou wrote:
>>> Currently, upper-layer application could get queue state only
>>> through pointers such as dev->data->tx_queue_state[queue_id],
>>> this is not the recommended way to access it. So this patch
>>> add get queue state when call rte_eth_rx_queue_info_get and
>>> rte_eth_tx_queue_info_get API.
>>>
>>> Note: After add queue_state field, the 'struct rte_eth_rxq_info' size
>>> remains 128B, and the 'struct rte_eth_txq_info' size remains 64B, so
>>> it could be ABI compatible.
>>>
>>> Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
>>> Signed-off-by: Lijun Ou <oulijun@huawei.com>
>>
>> Looks good to me, but it is causing an ABI error as we already discussed before
>> as that is false positive.
>>
>>
>> Ray, David,
>>
>> Should we add any exception to libabigail.abignore for this?
>
> We do not tolerate any ABI warning.
> If we are sure the ABI change is false positive,
> it must be suppressed in libabigail.abignore in the same patch.
>
A new field is added to public structs, but struct size or the location of the
existing fields are not changing (struct is cache aligned).
Can you please support how this can be added to 'libabigail.abignore'?
Lijun can you please send a new version with 'libabigail.abignore' update?
Thanks,
ferruh
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH V3] ethdev: add queue state when retrieve queue information
2021-04-15 12:33 3% ` Ferruh Yigit
@ 2021-04-15 12:36 4% ` Thomas Monjalon
2021-04-15 12:45 0% ` Ferruh Yigit
0 siblings, 1 reply; 200+ results
From: Thomas Monjalon @ 2021-04-15 12:36 UTC (permalink / raw)
To: Ferruh Yigit
Cc: Lijun Ou, Ray Kinsella, David Marchand, dev, linuxarm, Andrew Rybchenko
15/04/2021 14:33, Ferruh Yigit:
> On 4/15/2021 3:40 AM, Lijun Ou wrote:
> > Currently, upper-layer application could get queue state only
> > through pointers such as dev->data->tx_queue_state[queue_id],
> > this is not the recommended way to access it. So this patch
> > add get queue state when call rte_eth_rx_queue_info_get and
> > rte_eth_tx_queue_info_get API.
> >
> > Note: After add queue_state field, the 'struct rte_eth_rxq_info' size
> > remains 128B, and the 'struct rte_eth_txq_info' size remains 64B, so
> > it could be ABI compatible.
> >
> > Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
> > Signed-off-by: Lijun Ou <oulijun@huawei.com>
>
> Looks good to me, but it is causing an ABI error as we already discussed before
> as that is false positive.
>
>
> Ray, David,
>
> Should we add any exception to libabigail.abignore for this?
We do not tolerate any ABI warning.
If we are sure the ABI change is false positive,
it must be suppressed in libabigail.abignore in the same patch.
^ permalink raw reply [relevance 4%]
* Re: [dpdk-dev] [PATCH V3] ethdev: add queue state when retrieve queue information
2021-04-15 2:40 8% ` [dpdk-dev] [PATCH V3] " Lijun Ou
@ 2021-04-15 12:33 3% ` Ferruh Yigit
2021-04-15 12:36 4% ` Thomas Monjalon
2021-04-16 8:46 8% ` [dpdk-dev] [PATCH V4] " Lijun Ou
1 sibling, 1 reply; 200+ results
From: Ferruh Yigit @ 2021-04-15 12:33 UTC (permalink / raw)
To: Lijun Ou, thomas, Ray Kinsella, David Marchand
Cc: dev, linuxarm, Andrew Rybchenko
On 4/15/2021 3:40 AM, Lijun Ou wrote:
> Currently, upper-layer application could get queue state only
> through pointers such as dev->data->tx_queue_state[queue_id],
> this is not the recommended way to access it. So this patch
> add get queue state when call rte_eth_rx_queue_info_get and
> rte_eth_tx_queue_info_get API.
>
> Note: After add queue_state field, the 'struct rte_eth_rxq_info' size
> remains 128B, and the 'struct rte_eth_txq_info' size remains 64B, so
> it could be ABI compatible.
>
> Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
> Signed-off-by: Lijun Ou <oulijun@huawei.com>
Looks good to me, but it is causing an ABI error as we already discussed before
as that is false positive.
Ray, David,
Should we add any exception to libabigail.abignore for this?
^ permalink raw reply [relevance 3%]
* [dpdk-dev] DPDK Release Status Meeting 15/04/2021
@ 2021-04-15 11:34 3% Ferruh Yigit
0 siblings, 0 replies; 200+ results
From: Ferruh Yigit @ 2021-04-15 11:34 UTC (permalink / raw)
To: dev; +Cc: Thomas Monjalon
Release status meeting minutes {Date}
=====================================
:Date: 15 April 2021
:toc:
.Agenda:
* Release Dates
* Subtrees
* LTS
* Opens
.Participants:
* Arm
* Broadcom
* Canonical
* Debian/Microsoft
* Intel
* Marvell
* Nvidia
* OKTET Labs
* Red Hat
Release Dates
-------------
* `v21.05` dates
- -rc1 pushed to *Wednesday, 21 April*
- -rc2: Wednesday, 5 May
- Release: Friday, 14 May
* 1-5 May is Labor Day holiday in PRC.
Subtrees
--------
* main
- ioat driver updates, may be postponed to -rc2
- meson update
** Better to have in this release, but not urgent, can be postponed
- Arm meson updates
** Bruce ack'ed the common code, Arm specific part needs ack
** There are config file changes, Hisilicon and CNXK depends on it
- Reported a vhost TSO problem, work is going on
- mbuf eCPRI will be reviewed, there is no enough review
- Merged most of Thomas' series
- Predictable RSS feature
** Comment on missing documentation and example
*** Working on the documentation update
*** Too short time for the example, it can be done gradually in next
release
- FIB lookup method to l3fwd, can be merged today
- Some fix patch can be merged after -rc1
* next-net
- Not big backlog, ~50 patches, but there are multiple ethdev ones
** 4 ethdev flow API changes, reviews progressed but not finalised yet
*** Relying Ori's review for them
*** conntrack one has no review, it will be postponed if there is no
review before -rc1
** 1 ethdev meter API change, Cristian reviewed, new version expected
** 2 other ethdev changes, queue state and sanity checks ones
*** New version received for queue state one, can be merged soon
**** There is a testpmd patch depends on this
*** Andrew reviewed sanity checks one, minor change request
**** It does not look critical for the release but prefer to get it
if it is ready
- new PMD `ngbe` form Wangxun, new version requested
- pulled from vendor trees yesterday
- There are testpmd multi-process and Windows enablement patches
** For multi-process one waiting for new version because of minor issues
*** There is a long term testing concern, should DTS updated to verify
testpmd multi-process support?
** Windows enablement patch can be postponed to next release
* next-crypto
- 2/3 patches from mlx, will apply soon
- Ciara's patch can be merged later
- "raw data path dequeue API" by Fan waiting for reply
- Two PMDs for -rc2
** mlx5 crypto PMD
** NXP baseband PMD
- "lookaside IPsec UDP encapsulation and transport mode" patch
** Can Konstantin ack again, if so can go into -rc1
* next-eventdev
- Intel dlb2, reviews going on
** Rename to dlb2 -> dlb is ABI break, needs approval
*** Also this may cause issue on LTS, dlb in LTS will be different than
dlb in latest release
*** May hold rename until next LTS
- Marvell CNXK postponed to -rc2
** Because of common code dependency
- "eventdev crypto adapter" support, Abhinandan is reviewing
** There is an ABI discussion going on
* next-virtio
- There is a hotfix for -rc1, a trivial issue
** Will go in directly to next-net
- Remaining patches will be considered for -rc2
- A vdpa patch rejected while pulling to main repo, since it breaks the build
for Alpine Linux
** Need to communicate with Matan for it
* next-net-brcm
- 2/3 fixes to send, but they are not critical, may wait -rc2
* next-net-intel
- Progressing
* next-net-mlx
- Progressing
* next-net-mrvl
- CNXK net driver review is going on, may go into -rc2
LTS
---
* `v19.11.8-rc1` is out, please test
- http://inbox.dpdk.org/dev/20210409074357.2499008-1-christian.ehrhardt@canonical.com/
- The -rc is specifically to address meson build error
* `v20.11` (next version is `v20.11.2`)
- Not much update at this stage
Opens
-----
* Alpine Linux and musl libc should be tested by maintainers
- We should add this to the CI but it is not there yet
* Latest DPDK fails to build on Fedora 34 (which will be released soon)
- Kevin submitted Bugzilla defects for it
- Possibly because of new gcc version
- It is good idea to test with Fedora Rawhide
* fast test suit is failing for PPC without root access
- There is a patch to fix it but there is no review
* There is a new security team member, working on security issues can continue
after he ramped up
* Regular coverity scans are going on, and there are some coverity fixes
already hit the mail list, please review/merge them
.DPDK Release Status Meetings
*****
The DPDK Release Status Meeting is intended for DPDK Committers to discuss the
status of the master tree and sub-trees, and for project managers to track
progress or milestone dates.
The meeting occurs on every Thursdays at 8:30 UTC. on https://meet.jit.si/DPDK
If you wish to attend just send an email to
"John McNamara <john.mcnamara@intel.com>" for the invite.
*****
^ permalink raw reply [relevance 3%]
* [dpdk-dev] [PATCH] doc: announce modification in eventdev structure
@ 2021-04-15 9:08 3% gakhil
2021-04-18 9:11 0% ` Jerin Jacob
2021-04-23 10:53 3% ` Kinsella, Ray
0 siblings, 2 replies; 200+ results
From: gakhil @ 2021-04-15 9:08 UTC (permalink / raw)
To: jerinj, thomas, dev, mdr, david.marchand
Cc: abhinandan.gujjar, hemant.agrawal, nipun.gupta, sachin.saxena,
anoobj, matan, roy.fan.zhang, g.singh, erik.g.carrillo,
jay.jayatheerthan, pbhagavatula, harry.van.haaren, sthotton,
Akhil Goyal
From: Akhil Goyal <gakhil@marvell.com>
A new field ``ca_enqueue`` is added in ``rte_eventdev``
in the end to maintain ABI. It needs to be moved above
in the structure to align with other enqueue callbacks.
Signed-off-by: Akhil Goyal <gakhil@marvell.com>
---
doc/guides/rel_notes/deprecation.rst | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/doc/guides/rel_notes/deprecation.rst b/doc/guides/rel_notes/deprecation.rst
index 2afc84c39..a973de4a9 100644
--- a/doc/guides/rel_notes/deprecation.rst
+++ b/doc/guides/rel_notes/deprecation.rst
@@ -127,6 +127,10 @@ Deprecation Notices
values to the function ``rte_event_eth_rx_adapter_queue_add`` using
the structure ``rte_event_eth_rx_adapter_queue_add``.
+* eventdev: The function pointer ``ca_enqueue`` in structure ``rte_eventdev``
+ will be moved after ``txa_enqueue`` so that all enqueue/dequeue
+ function pointers are adjacent to each other.
+
* sched: To allow more traffic classes, flexible mapping of pipe queues to
traffic classes, and subport level configuration of pipes and queues
changes will be made to macros, data structures and API functions defined
--
2.25.1
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [EXT] [PATCH v5] cryptodev: support multiple cipher data-units
2021-04-14 20:21 10% ` [dpdk-dev] [PATCH v5] " Thomas Monjalon
@ 2021-04-15 8:35 0% ` Akhil Goyal
2021-04-15 19:01 3% ` Akhil Goyal
0 siblings, 1 reply; 200+ results
From: Akhil Goyal @ 2021-04-15 8:35 UTC (permalink / raw)
To: Thomas Monjalon, dev; +Cc: matan, Ray Kinsella, Neil Horman, Declan Doherty
> From: Matan Azrad <matan@nvidia.com>
>
> In cryptography, a block cipher is a deterministic algorithm operating
> on fixed-length groups of bits, called blocks.
>
> A block cipher consists of two paired algorithms, one for encryption
> and the other for decryption. Both algorithms accept two inputs:
> an input block of size n bits and a key of size k bits; and both yield
> an n-bit output block. The decryption algorithm is defined to be the
> inverse function of the encryption.
>
> For AES standard the block size is 16 bytes.
> For AES in XTS mode, the data to be encrypted\decrypted does not have to
> be multiple of 16B size, the unit of data is called data-unit.
> The data-unit size can be any size in range [16B, 2^24B], so, in this
> case, a data stream is divided into N amount of equal data-units and
> must be encrypted\decrypted in the same data-unit resolution.
>
> For ABI compatibility reason, the size is limited to 64K (16-bit field).
> The new field dataunit_len is inserted in a struct padding hole,
> which is only 2 bytes long in 32-bit build.
> It could be moved and extended later during an ABI-breakage window.
>
> The current cryptodev API doesn't allow the user to select a specific
> data-unit length supported by the devices.
> In addition, there is no definition how the IV is detected per data-unit
> when single operation includes more than one data-unit.
>
> That causes applications to use single operation per data-unit even though
> all the data is continuous in memory what reduces datapath performance.
>
> Add a new feature flag to support multiple data-unit sizes, called
> RTE_CRYPTODEV_FF_CIPHER_MULTIPLE_DATA_UNITS.
> Add a new field in cipher capability, called dataunit_set,
> where the devices can report the range of the supported data-unit sizes.
> Add a new cipher transformation field, called dataunit_len, where the user
> can select the data-unit length for all the operations.
>
> All the new fields do not change the size of their structures,
> by filling some struct padding holes.
> They are added as exceptions in the ABI check file libabigail.abignore.
>
> Using a bitmap to report the supported data-unit sizes capability allows
> the devices to report a range simply as same as the user to read it
> simply. also, thus sizes are usually common and probably will be shared
> among different devices.
>
> Signed-off-by: Matan Azrad <matan@nvidia.com>
> Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
> ---
Acked-by: Akhil Goyal <gakhil@marvell.com>
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [EXT] Re: [PATCH v10 1/4] devtools: add exception for reserved fields
2021-04-15 7:26 0% ` David Marchand
@ 2021-04-15 8:25 0% ` Bruce Richardson
0 siblings, 0 replies; 200+ results
From: Bruce Richardson @ 2021-04-15 8:25 UTC (permalink / raw)
To: David Marchand
Cc: Akhil Goyal, Jerin Jacob Kollanukkaran, Thomas Monjalon, dev,
Ray Kinsella, Abhinandan Gujjar, Hemant Agrawal, Nipun Gupta,
Sachin Saxena, Anoob Joseph, Matan Azrad, Fan Zhang,
Gagandeep Singh, Erik Gabriel Carrillo, Jayatheerthan, Jay,
Pavan Nikhilesh Bhagavatula, Van Haaren Harry, Shijith Thotton,
Dodji Seketeli
On Thu, Apr 15, 2021 at 09:26:38AM +0200, David Marchand wrote:
> On Thu, Apr 15, 2021 at 7:33 AM Akhil Goyal <gakhil@marvell.com> wrote:
> >
> > Hi David,
> > > > Certain structures are added with reserved fields
> > > > to address any future enhancements to retain ABI
> > > > compatibility.
> > > > However, ABI script will still report error as it
> > > > is not aware of reserved fields. Hence, adding a
> > > > generic exception for reserved fields.
> > > >
> > > > Signed-off-by: Akhil Goyal <gakhil@marvell.com>
> > > > ---
> > > > devtools/libabigail.abignore | 6 +++++-
> > > > 1 file changed, 5 insertions(+), 1 deletion(-)
> > > >
> > > > diff --git a/devtools/libabigail.abignore b/devtools/libabigail.abignore
> > > > index 6c0b38984..654755314 100644
> > > > --- a/devtools/libabigail.abignore
> > > > +++ b/devtools/libabigail.abignore
> > > > @@ -19,4 +19,8 @@
> > > > ; Ignore fields inserted in cacheline boundary of rte_cryptodev
> > > > [suppress_type]
> > > > name = rte_cryptodev
> > > > - has_data_member_inserted_between = {offset_after(attached), end}
> > > > \ No newline at end of file
> > > > + has_data_member_inserted_between = {offset_after(attached), end}
> > > > +
> > > > +; Ignore changes in reserved fields
> > > > +[suppress_variable]
> > > > + name_regexp = reserved
> > > Mm, this rule is a bit scary, as it matches anything with "reserved" in it.
> >
> > Why do you feel it is scary? Reserved is something which may change at any time
> > Just like experimental. Hence creating a generic exception rule for it make sense
> > And it is done intentionally in this patch.
>
> The reserved regexp on the name of a variable / struct field is too lax.
> Anything could be named with reserved in it.
> If we have clear patterns, they must be preferred, like (untested)
> name_regexp = ^reserved_(64|ptr)s$
>
+1 to have a clear name. I would suggest using a "__reserved" prefix, since
no real field name should ever start with that prefix.
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH v3 25/26] event/dlb: remove version from device name
2021-04-15 7:48 0% ` Thomas Monjalon
@ 2021-04-15 7:56 0% ` Jerin Jacob
0 siblings, 0 replies; 200+ results
From: Jerin Jacob @ 2021-04-15 7:56 UTC (permalink / raw)
To: Thomas Monjalon, techboard
Cc: Timothy McDaniel, Jerin Jacob, dpdk-dev, Erik Gabriel Carrillo,
Gage Eads, Van Haaren, Harry, David Marchand
On Thu, Apr 15, 2021 at 1:18 PM Thomas Monjalon <thomas@monjalon.net> wrote:
>
> 15/04/2021 07:47, Jerin Jacob:
> > On Thu, Apr 15, 2021 at 2:03 AM Thomas Monjalon <thomas@monjalon.net> wrote:
> > > 14/04/2021 21:44, Jerin Jacob:
> > > > On Wed, Apr 14, 2021 at 1:49 AM Timothy McDaniel
> > > > <timothy.mcdaniel@intel.com> wrote:
> > > > >
> > > > > Updated eventdev device name to be dlb_event instead of
> > > > > dlb2_event. The new name will be used for all versions
> > > > > of the DLB hardware. This change required corresponding changes
> > > > > to the directory name that contains the PMD, as well
> > > > > as the documentation files, build infrastructure, and PMD
> > > > > specific APIs.
> > > > >
> > > > > Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
> > > > > --- a/doc/guides/rel_notes/release_21_05.rst
> > > > > +++ b/doc/guides/rel_notes/release_21_05.rst
> > > > > +* **Updated DLB driver.**
> > > > > +
> > > > > + * Added support for v2.5 hardware.
> > > > > + * Renamed DLB2 to DLB, which supports all HW versions v2.0 and v2.5.
> > > >
> > > > @Thomas Monjalon , Do we need to update the "Removed Items" section?
> > >
> > > I did not follow the exact change.
> > > Is it changing the driver library name?
> > > If yes, it is one more ABI issue.
> >
> > It is yes. It needs to be fixed in abiignore.
> >
> > My original question was, Since we are renaming dlb2->dlb one,
> > driver/dlb2 directory will not be present after this change,
> > Do we need to update the "Removed Items" section in release notes,
> > Saying dlb2 driver removed?
>
> Yes we need, but it should have been discussed in techboard first.
+ Techboard
Cc: @McDaniel, Timothy
OK. I will hold this patch and wait for the techboard's approval.
>
>
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH v3 25/26] event/dlb: remove version from device name
2021-04-15 5:47 0% ` Jerin Jacob
@ 2021-04-15 7:48 0% ` Thomas Monjalon
2021-04-15 7:56 0% ` Jerin Jacob
0 siblings, 1 reply; 200+ results
From: Thomas Monjalon @ 2021-04-15 7:48 UTC (permalink / raw)
To: Jerin Jacob
Cc: Timothy McDaniel, Jerin Jacob, dpdk-dev, Erik Gabriel Carrillo,
Gage Eads, Van Haaren, Harry, David Marchand
15/04/2021 07:47, Jerin Jacob:
> On Thu, Apr 15, 2021 at 2:03 AM Thomas Monjalon <thomas@monjalon.net> wrote:
> > 14/04/2021 21:44, Jerin Jacob:
> > > On Wed, Apr 14, 2021 at 1:49 AM Timothy McDaniel
> > > <timothy.mcdaniel@intel.com> wrote:
> > > >
> > > > Updated eventdev device name to be dlb_event instead of
> > > > dlb2_event. The new name will be used for all versions
> > > > of the DLB hardware. This change required corresponding changes
> > > > to the directory name that contains the PMD, as well
> > > > as the documentation files, build infrastructure, and PMD
> > > > specific APIs.
> > > >
> > > > Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
> > > > --- a/doc/guides/rel_notes/release_21_05.rst
> > > > +++ b/doc/guides/rel_notes/release_21_05.rst
> > > > +* **Updated DLB driver.**
> > > > +
> > > > + * Added support for v2.5 hardware.
> > > > + * Renamed DLB2 to DLB, which supports all HW versions v2.0 and v2.5.
> > >
> > > @Thomas Monjalon , Do we need to update the "Removed Items" section?
> >
> > I did not follow the exact change.
> > Is it changing the driver library name?
> > If yes, it is one more ABI issue.
>
> It is yes. It needs to be fixed in abiignore.
>
> My original question was, Since we are renaming dlb2->dlb one,
> driver/dlb2 directory will not be present after this change,
> Do we need to update the "Removed Items" section in release notes,
> Saying dlb2 driver removed?
Yes we need, but it should have been discussed in techboard first.
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [EXT] Re: [PATCH v10 1/4] devtools: add exception for reserved fields
2021-04-15 5:32 0% ` [dpdk-dev] [EXT] " Akhil Goyal
@ 2021-04-15 7:26 0% ` David Marchand
2021-04-15 8:25 0% ` Bruce Richardson
0 siblings, 1 reply; 200+ results
From: David Marchand @ 2021-04-15 7:26 UTC (permalink / raw)
To: Akhil Goyal
Cc: Jerin Jacob Kollanukkaran, Thomas Monjalon, dev, Ray Kinsella,
Abhinandan Gujjar, Hemant Agrawal, Nipun Gupta, Sachin Saxena,
Anoob Joseph, Matan Azrad, Fan Zhang, Gagandeep Singh,
Erik Gabriel Carrillo, Jayatheerthan, Jay,
Pavan Nikhilesh Bhagavatula, Van Haaren Harry, Shijith Thotton,
Dodji Seketeli
On Thu, Apr 15, 2021 at 7:33 AM Akhil Goyal <gakhil@marvell.com> wrote:
>
> Hi David,
> > > Certain structures are added with reserved fields
> > > to address any future enhancements to retain ABI
> > > compatibility.
> > > However, ABI script will still report error as it
> > > is not aware of reserved fields. Hence, adding a
> > > generic exception for reserved fields.
> > >
> > > Signed-off-by: Akhil Goyal <gakhil@marvell.com>
> > > ---
> > > devtools/libabigail.abignore | 6 +++++-
> > > 1 file changed, 5 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/devtools/libabigail.abignore b/devtools/libabigail.abignore
> > > index 6c0b38984..654755314 100644
> > > --- a/devtools/libabigail.abignore
> > > +++ b/devtools/libabigail.abignore
> > > @@ -19,4 +19,8 @@
> > > ; Ignore fields inserted in cacheline boundary of rte_cryptodev
> > > [suppress_type]
> > > name = rte_cryptodev
> > > - has_data_member_inserted_between = {offset_after(attached), end}
> > > \ No newline at end of file
> > > + has_data_member_inserted_between = {offset_after(attached), end}
> > > +
> > > +; Ignore changes in reserved fields
> > > +[suppress_variable]
> > > + name_regexp = reserved
> > Mm, this rule is a bit scary, as it matches anything with "reserved" in it.
>
> Why do you feel it is scary? Reserved is something which may change at any time
> Just like experimental. Hence creating a generic exception rule for it make sense
> And it is done intentionally in this patch.
The reserved regexp on the name of a variable / struct field is too lax.
Anything could be named with reserved in it.
If we have clear patterns, they must be preferred, like (untested)
name_regexp = ^reserved_(64|ptr)s$
Experimental is different.
This is a symbol version tag, which has a clear meaning and can't be
used for anything else.
>
> >
> > You need an exception anyway to insert the new fields (like in patch 2).
> > Can you test your series dropping this patch 1 ?
> It will not work, as there are 2 changes,
> 1. addition of ca_enqueue after attached. This is taken care by the exception set in patch 2
> 2. change in the reserved_ptr[4] -> reserved_ptr[3]. For this change we need exception for reserved.
In the eventdev struct, reserved fields are all in the range between
the attached field and the end of the struct.
I pushed your series without patch 1 to a branch of mine, and it
passes the check fine:
https://github.com/david-marchand/dpdk/commits/crypto_fwd_mode_v10
https://github.com/david-marchand/dpdk/runs/2350324578?check_suite_focus=true#step:15:8549
--
David Marchand
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH v3 25/26] event/dlb: remove version from device name
2021-04-14 20:33 3% ` Thomas Monjalon
2021-04-15 3:22 0% ` McDaniel, Timothy
@ 2021-04-15 5:47 0% ` Jerin Jacob
2021-04-15 7:48 0% ` Thomas Monjalon
1 sibling, 1 reply; 200+ results
From: Jerin Jacob @ 2021-04-15 5:47 UTC (permalink / raw)
To: Thomas Monjalon
Cc: Timothy McDaniel, Jerin Jacob, dpdk-dev, Erik Gabriel Carrillo,
Gage Eads, Van Haaren, Harry, David Marchand
On Thu, Apr 15, 2021 at 2:03 AM Thomas Monjalon <thomas@monjalon.net> wrote:
>
> 14/04/2021 21:44, Jerin Jacob:
> > On Wed, Apr 14, 2021 at 1:49 AM Timothy McDaniel
> > <timothy.mcdaniel@intel.com> wrote:
> > >
> > > Updated eventdev device name to be dlb_event instead of
> > > dlb2_event. The new name will be used for all versions
> > > of the DLB hardware. This change required corresponding changes
> > > to the directory name that contains the PMD, as well
> > > as the documentation files, build infrastructure, and PMD
> > > specific APIs.
> > >
> > > Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
> > > --- a/doc/guides/rel_notes/release_21_05.rst
> > > +++ b/doc/guides/rel_notes/release_21_05.rst
> > > +* **Updated DLB driver.**
> > > +
> > > + * Added support for v2.5 hardware.
> > > + * Renamed DLB2 to DLB, which supports all HW versions v2.0 and v2.5.
> >
> > @Thomas Monjalon , Do we need to update the "Removed Items" section?
>
> I did not follow the exact change.
> Is it changing the driver library name?
> If yes, it is one more ABI issue.
It is yes. It needs to be fixed in abiignore.
My original question was, Since we are renaming dlb2->dlb one,
driver/dlb2 directory will not be present after this change,
Do we need to update the "Removed Items" section in release notes,
Saying dlb2 driver removed?
> If not, I don't see what to update in the release notes.
>
>
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [EXT] Re: [PATCH v10 1/4] devtools: add exception for reserved fields
2021-04-14 20:57 0% ` David Marchand
@ 2021-04-15 5:32 0% ` Akhil Goyal
2021-04-15 7:26 0% ` David Marchand
0 siblings, 1 reply; 200+ results
From: Akhil Goyal @ 2021-04-15 5:32 UTC (permalink / raw)
To: David Marchand
Cc: Jerin Jacob Kollanukkaran, Thomas Monjalon, dev, Ray Kinsella,
Abhinandan Gujjar, Hemant Agrawal, Nipun Gupta, Sachin Saxena,
Anoob Joseph, Matan Azrad, Fan Zhang, Gagandeep Singh,
Erik Gabriel Carrillo, Jayatheerthan, Jay,
Pavan Nikhilesh Bhagavatula, Van Haaren Harry, Shijith Thotton,
Dodji Seketeli
Hi David,
> > Certain structures are added with reserved fields
> > to address any future enhancements to retain ABI
> > compatibility.
> > However, ABI script will still report error as it
> > is not aware of reserved fields. Hence, adding a
> > generic exception for reserved fields.
> >
> > Signed-off-by: Akhil Goyal <gakhil@marvell.com>
> > ---
> > devtools/libabigail.abignore | 6 +++++-
> > 1 file changed, 5 insertions(+), 1 deletion(-)
> >
> > diff --git a/devtools/libabigail.abignore b/devtools/libabigail.abignore
> > index 6c0b38984..654755314 100644
> > --- a/devtools/libabigail.abignore
> > +++ b/devtools/libabigail.abignore
> > @@ -19,4 +19,8 @@
> > ; Ignore fields inserted in cacheline boundary of rte_cryptodev
> > [suppress_type]
> > name = rte_cryptodev
> > - has_data_member_inserted_between = {offset_after(attached), end}
> > \ No newline at end of file
> > + has_data_member_inserted_between = {offset_after(attached), end}
> > +
> > +; Ignore changes in reserved fields
> > +[suppress_variable]
> > + name_regexp = reserved
> Mm, this rule is a bit scary, as it matches anything with "reserved" in it.
Why do you feel it is scary? Reserved is something which may change at any time
Just like experimental. Hence creating a generic exception rule for it make sense
And it is done intentionally in this patch.
>
> You need an exception anyway to insert the new fields (like in patch 2).
> Can you test your series dropping this patch 1 ?
It will not work, as there are 2 changes,
1. addition of ca_enqueue after attached. This is taken care by the exception set in patch 2
2. change in the reserved_ptr[4] -> reserved_ptr[3]. For this change we need exception for reserved.
Regards,
Akhil
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH v3 25/26] event/dlb: remove version from device name
2021-04-14 20:33 3% ` Thomas Monjalon
@ 2021-04-15 3:22 0% ` McDaniel, Timothy
2021-04-15 5:47 0% ` Jerin Jacob
1 sibling, 0 replies; 200+ results
From: McDaniel, Timothy @ 2021-04-15 3:22 UTC (permalink / raw)
To: Thomas Monjalon, Jerin Jacob
Cc: Jerin Jacob, dpdk-dev, Carrillo, Erik G, Gage Eads, Van Haaren,
Harry, david.marchand
> -----Original Message-----
> From: Thomas Monjalon <thomas@monjalon.net>
> Sent: Wednesday, April 14, 2021 3:33 PM
> To: McDaniel, Timothy <timothy.mcdaniel@intel.com>; Jerin Jacob
> <jerinj@marvell.com>
> Cc: Jerin Jacob <jerinjacobk@gmail.com>; dpdk-dev <dev@dpdk.org>; Carrillo,
> Erik G <erik.g.carrillo@intel.com>; Gage Eads <gage.eads@intel.com>; Van
> Haaren, Harry <harry.van.haaren@intel.com>; david.marchand@redhat.com
> Subject: Re: [dpdk-dev] [PATCH v3 25/26] event/dlb: remove version from
> device name
>
> 14/04/2021 21:44, Jerin Jacob:
> > On Wed, Apr 14, 2021 at 1:49 AM Timothy McDaniel
> > <mailto:timothy.mcdaniel@intel.com> wrote:
> > >
> > > Updated eventdev device name to be dlb_event instead of
> > > dlb2_event. The new name will be used for all versions
> > > of the DLB hardware. This change required corresponding changes
> > > to the directory name that contains the PMD, as well
> > > as the documentation files, build infrastructure, and PMD
> > > specific APIs.
> > >
> > > Signed-off-by: Timothy McDaniel <mailto:timothy.mcdaniel@intel.com>
> > > --- a/doc/guides/rel_notes/release_21_05.rst
> > > +++ b/doc/guides/rel_notes/release_21_05.rst
> > > +* **Updated DLB driver.**
> > > +
> > > + * Added support for v2.5 hardware.
> > > + * Renamed DLB2 to DLB, which supports all HW versions v2.0 and v2.5.
> >
> > @Thomas Monjalon , Do we need to update the "Removed Items" section?
>
> I did not follow the exact change.
> Is it changing the driver library name?
> If yes, it is one more ABI issue.
> If not, I don't see what to update in the release notes.
>
I'm not sure if this is related, but my latest patch series build fails due to a problem with the docs build. The odd thing is that I updated the name in doxy-api-index.md and changed the file name to rte_pmd_dlb.h, so I don't know where it is picking up what I assume is the previous version of the doxy-api-index.md file while building the last patch in the series. I made this name change in the same commit where I change over from dlb2 to dlb, which is patch 26 in this series. The build is failing on patch 27, and at that point the text string "rte_pmd_dlb2 is not found anywhere in the repo that I can find.
/root/UB2004-64_K5.8.0_GCC10.2.0/x86_64-native-linuxapp-doc/d9404773e5eb425882b0b26bde1e7467/dpdk/doc/api/generate_doxygen.sh doc/api/doxy-api.conf doc/api/html /root/UB2004-64_K5.8.0_GCC10.2.0/x86_64-native-linuxapp-doc/d9404773e5eb425882b0b26bde1e7467/dpdk/doc/api/doxy-html-custom.sh
warning: tag INPUT: input source '/root/UB2004-64_K5.8.0_GCC10.2.0/x86_64-native-linuxapp-doc/d9404773e5eb425882b0b26bde1e7467/dpdk/drivers/event/dlb2' does not exist
error: source /root/UB2004-64_K5.8.0_GCC10.2.0/x86_64-native-linuxapp-doc/d9404773e5eb425882b0b26bde1e7467/dpdk/drivers/event/dlb2 is not a readable file or directory... skipping.
/root/UB2004-64_K5.8.0_GCC10.2.0/x86_64-native-linuxapp-doc/d9404773e5eb425882b0b26bde1e7467/dpdk/doc/api/doxy-api-index.md:56: error: unable to resolve reference to 'rte_pmd_dlb2.h' for \ref command (warning treated as error, aborting now)
^ permalink raw reply [relevance 0%]
* [dpdk-dev] [PATCH V3] ethdev: add queue state when retrieve queue information
@ 2021-04-15 2:40 8% ` Lijun Ou
2021-04-15 12:33 3% ` Ferruh Yigit
2021-04-16 8:46 8% ` [dpdk-dev] [PATCH V4] " Lijun Ou
2 siblings, 2 replies; 200+ results
From: Lijun Ou @ 2021-04-15 2:40 UTC (permalink / raw)
To: thomas, ferruh.yigit; +Cc: dev, linuxarm
Currently, upper-layer application could get queue state only
through pointers such as dev->data->tx_queue_state[queue_id],
this is not the recommended way to access it. So this patch
add get queue state when call rte_eth_rx_queue_info_get and
rte_eth_tx_queue_info_get API.
Note: After add queue_state field, the 'struct rte_eth_rxq_info' size
remains 128B, and the 'struct rte_eth_txq_info' size remains 64B, so
it could be ABI compatible.
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Lijun Ou <oulijun@huawei.com>
---
V2->V3:
- rewrite the commit log and delete the part Note
- rewrite tht comments for queue state
- move the queue_state definition locations
V1->V2:
- move queue state defines to public file
---
doc/guides/rel_notes/release_21_05.rst | 6 ++++++
lib/librte_ethdev/ethdev_driver.h | 7 -------
lib/librte_ethdev/rte_ethdev.c | 3 +++
lib/librte_ethdev/rte_ethdev.h | 9 +++++++++
4 files changed, 18 insertions(+), 7 deletions(-)
diff --git a/doc/guides/rel_notes/release_21_05.rst b/doc/guides/rel_notes/release_21_05.rst
index 3bd7757..c6e45e2 100644
--- a/doc/guides/rel_notes/release_21_05.rst
+++ b/doc/guides/rel_notes/release_21_05.rst
@@ -251,6 +251,12 @@ ABI Changes
function was already marked as internal in the API documentation for it,
and was not for use by external applications.
+* Added new field ``queue_state`` to ``rte_eth_rxq_info`` structure
+ to provide indicated rxq queue state.
+
+* Added new field ``queue_state`` to ``rte_eth_txq_info`` structure
+ to provide indicated txq queue state.
+
Known Issues
------------
diff --git a/lib/librte_ethdev/ethdev_driver.h b/lib/librte_ethdev/ethdev_driver.h
index 113129d..40e474a 100644
--- a/lib/librte_ethdev/ethdev_driver.h
+++ b/lib/librte_ethdev/ethdev_driver.h
@@ -952,13 +952,6 @@ struct eth_dev_ops {
};
/**
- * RX/TX queue states
- */
-#define RTE_ETH_QUEUE_STATE_STOPPED 0
-#define RTE_ETH_QUEUE_STATE_STARTED 1
-#define RTE_ETH_QUEUE_STATE_HAIRPIN 2
-
-/**
* @internal
* Check if the selected Rx queue is hairpin queue.
*
diff --git a/lib/librte_ethdev/rte_ethdev.c b/lib/librte_ethdev/rte_ethdev.c
index 6b5cfd6..ab188ec 100644
--- a/lib/librte_ethdev/rte_ethdev.c
+++ b/lib/librte_ethdev/rte_ethdev.c
@@ -5042,6 +5042,8 @@ rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
memset(qinfo, 0, sizeof(*qinfo));
dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
+ qinfo->queue_state = dev->data->rx_queue_state[queue_id];
+
return 0;
}
@@ -5082,6 +5084,7 @@ rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
memset(qinfo, 0, sizeof(*qinfo));
dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
+ qinfo->queue_state = dev->data->tx_queue_state[queue_id];
return 0;
}
diff --git a/lib/librte_ethdev/rte_ethdev.h b/lib/librte_ethdev/rte_ethdev.h
index 3b773b6..a0d01d2 100644
--- a/lib/librte_ethdev/rte_ethdev.h
+++ b/lib/librte_ethdev/rte_ethdev.h
@@ -1588,6 +1588,13 @@ struct rte_eth_dev_info {
};
/**
+ * RX/TX queue states
+ */
+#define RTE_ETH_QUEUE_STATE_STOPPED 0
+#define RTE_ETH_QUEUE_STATE_STARTED 1
+#define RTE_ETH_QUEUE_STATE_HAIRPIN 2
+
+/**
* Ethernet device RX queue information structure.
* Used to retrieve information about configured queue.
*/
@@ -1595,6 +1602,7 @@ struct rte_eth_rxq_info {
struct rte_mempool *mp; /**< mempool used by that queue. */
struct rte_eth_rxconf conf; /**< queue config parameters. */
uint8_t scattered_rx; /**< scattered packets RX supported. */
+ uint8_t queue_state; /**< one of RTE_ETH_QUEUE_STATE_*. */
uint16_t nb_desc; /**< configured number of RXDs. */
uint16_t rx_buf_size; /**< hardware receive buffer size. */
} __rte_cache_min_aligned;
@@ -1606,6 +1614,7 @@ struct rte_eth_rxq_info {
struct rte_eth_txq_info {
struct rte_eth_txconf conf; /**< queue config parameters. */
uint16_t nb_desc; /**< configured number of TXDs. */
+ uint8_t queue_state; /**< one of RTE_ETH_QUEUE_STATE_*. */
} __rte_cache_min_aligned;
/* Generic Burst mode flag definition, values can be ORed. */
--
2.7.4
^ permalink raw reply [relevance 8%]
* Re: [dpdk-dev] [PATCH v10 1/4] devtools: add exception for reserved fields
2021-04-14 18:04 4% ` [dpdk-dev] [PATCH v10 1/4] devtools: add exception for reserved fields gakhil
@ 2021-04-14 20:57 0% ` David Marchand
2021-04-15 5:32 0% ` [dpdk-dev] [EXT] " Akhil Goyal
0 siblings, 1 reply; 200+ results
From: David Marchand @ 2021-04-14 20:57 UTC (permalink / raw)
To: Akhil Goyal
Cc: Jerin Jacob Kollanukkaran, Thomas Monjalon, dev, Ray Kinsella,
Abhinandan Gujjar, Hemant Agrawal, Nipun Gupta, Sachin Saxena,
Anoob Joseph, Matan Azrad, Fan Zhang, Gagandeep Singh,
Erik Gabriel Carrillo, Jayatheerthan, Jay, Pavan Nikhilesh,
Van Haaren Harry, Shijith Thotton, Dodji Seketeli
On Wed, Apr 14, 2021 at 8:04 PM <gakhil@marvell.com> wrote:
>
> From: Akhil Goyal <gakhil@marvell.com>
>
> Certain structures are added with reserved fields
> to address any future enhancements to retain ABI
> compatibility.
> However, ABI script will still report error as it
> is not aware of reserved fields. Hence, adding a
> generic exception for reserved fields.
>
> Signed-off-by: Akhil Goyal <gakhil@marvell.com>
> ---
> devtools/libabigail.abignore | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/devtools/libabigail.abignore b/devtools/libabigail.abignore
> index 6c0b38984..654755314 100644
> --- a/devtools/libabigail.abignore
> +++ b/devtools/libabigail.abignore
> @@ -19,4 +19,8 @@
> ; Ignore fields inserted in cacheline boundary of rte_cryptodev
> [suppress_type]
> name = rte_cryptodev
> - has_data_member_inserted_between = {offset_after(attached), end}
> \ No newline at end of file
> + has_data_member_inserted_between = {offset_after(attached), end}
> +
> +; Ignore changes in reserved fields
> +[suppress_variable]
> + name_regexp = reserved
> --
> 2.25.1
>
Mm, this rule is a bit scary, as it matches anything with "reserved" in it.
You need an exception anyway to insert the new fields (like in patch 2).
Can you test your series dropping this patch 1 ?
--
David Marchand
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH v3 25/26] event/dlb: remove version from device name
@ 2021-04-14 20:33 3% ` Thomas Monjalon
2021-04-15 3:22 0% ` McDaniel, Timothy
2021-04-15 5:47 0% ` Jerin Jacob
0 siblings, 2 replies; 200+ results
From: Thomas Monjalon @ 2021-04-14 20:33 UTC (permalink / raw)
To: Timothy McDaniel, Jerin Jacob
Cc: Jerin Jacob, dpdk-dev, Erik Gabriel Carrillo, Gage Eads,
Van Haaren, Harry, david.marchand
14/04/2021 21:44, Jerin Jacob:
> On Wed, Apr 14, 2021 at 1:49 AM Timothy McDaniel
> <timothy.mcdaniel@intel.com> wrote:
> >
> > Updated eventdev device name to be dlb_event instead of
> > dlb2_event. The new name will be used for all versions
> > of the DLB hardware. This change required corresponding changes
> > to the directory name that contains the PMD, as well
> > as the documentation files, build infrastructure, and PMD
> > specific APIs.
> >
> > Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
> > --- a/doc/guides/rel_notes/release_21_05.rst
> > +++ b/doc/guides/rel_notes/release_21_05.rst
> > +* **Updated DLB driver.**
> > +
> > + * Added support for v2.5 hardware.
> > + * Renamed DLB2 to DLB, which supports all HW versions v2.0 and v2.5.
>
> @Thomas Monjalon , Do we need to update the "Removed Items" section?
I did not follow the exact change.
Is it changing the driver library name?
If yes, it is one more ABI issue.
If not, I don't see what to update in the release notes.
^ permalink raw reply [relevance 3%]
* [dpdk-dev] [PATCH v5] cryptodev: support multiple cipher data-units
2021-04-13 18:19 4% ` [dpdk-dev] [PATCH v3] cryptodev: support multiple cipher data-units Thomas Monjalon
2021-04-13 20:42 10% ` [dpdk-dev] [PATCH v4] " Thomas Monjalon
@ 2021-04-14 20:21 10% ` Thomas Monjalon
2021-04-15 8:35 0% ` [dpdk-dev] [EXT] " Akhil Goyal
2 siblings, 1 reply; 200+ results
From: Thomas Monjalon @ 2021-04-14 20:21 UTC (permalink / raw)
To: dev; +Cc: akhil.goyal, matan, Ray Kinsella, Neil Horman, Declan Doherty
From: Matan Azrad <matan@nvidia.com>
In cryptography, a block cipher is a deterministic algorithm operating
on fixed-length groups of bits, called blocks.
A block cipher consists of two paired algorithms, one for encryption
and the other for decryption. Both algorithms accept two inputs:
an input block of size n bits and a key of size k bits; and both yield
an n-bit output block. The decryption algorithm is defined to be the
inverse function of the encryption.
For AES standard the block size is 16 bytes.
For AES in XTS mode, the data to be encrypted\decrypted does not have to
be multiple of 16B size, the unit of data is called data-unit.
The data-unit size can be any size in range [16B, 2^24B], so, in this
case, a data stream is divided into N amount of equal data-units and
must be encrypted\decrypted in the same data-unit resolution.
For ABI compatibility reason, the size is limited to 64K (16-bit field).
The new field dataunit_len is inserted in a struct padding hole,
which is only 2 bytes long in 32-bit build.
It could be moved and extended later during an ABI-breakage window.
The current cryptodev API doesn't allow the user to select a specific
data-unit length supported by the devices.
In addition, there is no definition how the IV is detected per data-unit
when single operation includes more than one data-unit.
That causes applications to use single operation per data-unit even though
all the data is continuous in memory what reduces datapath performance.
Add a new feature flag to support multiple data-unit sizes, called
RTE_CRYPTODEV_FF_CIPHER_MULTIPLE_DATA_UNITS.
Add a new field in cipher capability, called dataunit_set,
where the devices can report the range of the supported data-unit sizes.
Add a new cipher transformation field, called dataunit_len, where the user
can select the data-unit length for all the operations.
All the new fields do not change the size of their structures,
by filling some struct padding holes.
They are added as exceptions in the ABI check file libabigail.abignore.
Using a bitmap to report the supported data-unit sizes capability allows
the devices to report a range simply as same as the user to read it
simply. also, thus sizes are usually common and probably will be shared
among different devices.
Signed-off-by: Matan Azrad <matan@nvidia.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
---
v1:
- Use data-unit term instead of block.
- Update cipher length description in OP.
- Improve descriptions on xform and capability.
- Improve commit log.
v2:
- Fix typo: MULITPLE->MULTIPLE.
- Remain only planned supported sizes for data-unit capability.
v3:
- Improve some comments.
- Fix ABI breakage.
v4:
- Remove RTE_CRYPTO_CIPHER_DATA_UNIT_LEN_1M_BYTES
- Fix dataunit_len placement in padding hole
v5:
- Improve comments
- Use RTE_BIT32
deprecation notice:
https://patches.dpdk.org/project/dpdk/patch/20210414201544.1063413-1-thomas@monjalon.net/
---
devtools/libabigail.abignore | 12 ++++++++-
doc/guides/cryptodevs/features/default.ini | 1 +
doc/guides/cryptodevs/overview.rst | 3 +++
doc/guides/rel_notes/release_21_05.rst | 6 +++++
lib/librte_cryptodev/rte_crypto_sym.h | 29 ++++++++++++++++++++--
lib/librte_cryptodev/rte_cryptodev.c | 2 ++
lib/librte_cryptodev/rte_cryptodev.h | 16 ++++++++++++
7 files changed, 66 insertions(+), 3 deletions(-)
diff --git a/devtools/libabigail.abignore b/devtools/libabigail.abignore
index 6c0b38984e..bce940f2df 100644
--- a/devtools/libabigail.abignore
+++ b/devtools/libabigail.abignore
@@ -19,4 +19,14 @@
; Ignore fields inserted in cacheline boundary of rte_cryptodev
[suppress_type]
name = rte_cryptodev
- has_data_member_inserted_between = {offset_after(attached), end}
\ No newline at end of file
+ has_data_member_inserted_between = {offset_after(attached), end}
+
+; Ignore fields inserted in union boundary of rte_cryptodev_symmetric_capability
+[suppress_type]
+ name = rte_cryptodev_symmetric_capability
+ has_data_member_inserted_between = {offset_after(cipher.iv_size), end}
+
+; Ignore fields inserted in middle padding of rte_crypto_cipher_xform
+[suppress_type]
+ name = rte_crypto_cipher_xform
+ has_data_member_inserted_between = {offset_after(key), offset_of(iv)}
diff --git a/doc/guides/cryptodevs/features/default.ini b/doc/guides/cryptodevs/features/default.ini
index 17b177fc45..978bb30cc1 100644
--- a/doc/guides/cryptodevs/features/default.ini
+++ b/doc/guides/cryptodevs/features/default.ini
@@ -31,6 +31,7 @@ CPU crypto =
Symmetric sessionless =
Non-Byte aligned data =
Sym raw data path API =
+Cipher multiple data units =
;
; Supported crypto algorithms of a default crypto driver.
diff --git a/doc/guides/cryptodevs/overview.rst b/doc/guides/cryptodevs/overview.rst
index e2a1e08ec1..e24e3e1993 100644
--- a/doc/guides/cryptodevs/overview.rst
+++ b/doc/guides/cryptodevs/overview.rst
@@ -46,6 +46,9 @@ Supported Feature Flags
- "Digest encrypted" feature flag means PMD support hash-cipher cases,
where generated digest is appended to and encrypted with the data.
+ - "CIPHER_MULTIPLE_DATA_UNITS" feature flag means PMD support operations
+ on multiple data-units message.
+
Supported Cipher Algorithms
---------------------------
diff --git a/doc/guides/rel_notes/release_21_05.rst b/doc/guides/rel_notes/release_21_05.rst
index 2e3bf5c95a..57b2744d1d 100644
--- a/doc/guides/rel_notes/release_21_05.rst
+++ b/doc/guides/rel_notes/release_21_05.rst
@@ -150,6 +150,12 @@ New Features
* Added support for preferred busy polling.
+* **Added support of multiple data-units in cryptodev API.**
+
+ The cryptodev library has been enhanced to allow operations on multiple
+ data-units for AES-XTS algorithm, the data-unit length should be set in the
+ transformation. A capability for it was added too.
+
* **Updated Mellanox RegEx PMD.**
* Added support for multi-segments mbuf.
diff --git a/lib/librte_cryptodev/rte_crypto_sym.h b/lib/librte_cryptodev/rte_crypto_sym.h
index 9d572ec057..4e365b1eab 100644
--- a/lib/librte_cryptodev/rte_crypto_sym.h
+++ b/lib/librte_cryptodev/rte_crypto_sym.h
@@ -195,6 +195,9 @@ struct rte_crypto_cipher_xform {
enum rte_crypto_cipher_algorithm algo;
/**< Cipher algorithm */
+ RTE_STD_C11
+ union { /* temporary anonymous union for ABI compatibility */
+
struct {
const uint8_t *data; /**< pointer to key data */
uint16_t length; /**< key length in bytes */
@@ -222,6 +225,27 @@ struct rte_crypto_cipher_xform {
* - Each key can be either 128 bits (16 bytes) or 256 bits (32 bytes).
* - Both keys must have the same size.
**/
+
+ RTE_STD_C11
+ struct { /* temporary anonymous struct for ABI compatibility */
+ const uint8_t *_key_data; /* reserved for key.data union */
+ uint16_t _key_length; /* reserved for key.length union */
+ /* next field can fill the padding hole */
+
+ uint16_t dataunit_len;
+ /**< When RTE_CRYPTODEV_FF_CIPHER_MULTIPLE_DATA_UNITS is enabled,
+ * this is the data-unit length of the algorithm,
+ * otherwise or when the value is 0, use the operation length.
+ * The value should be in the range defined by the dataunit_set field
+ * in the cipher capability.
+ *
+ * - For AES-XTS it is the size of data-unit, from IEEE Std 1619-2007.
+ * For-each data-unit in the operation, the tweak (IV) value is
+ * assigned consecutively starting from the operation assigned IV.
+ */
+
+ }; }; /* temporary struct nested in union for ABI compatibility */
+
struct {
uint16_t offset;
/**< Starting point for Initialisation Vector or Counter,
@@ -701,9 +725,10 @@ struct rte_crypto_sym_op {
/**< The message length, in bytes, of the
* source buffer on which the cryptographic
* operation will be computed.
+ * This is also the same as the result length.
* This must be a multiple of the block size
- * if a block cipher is being used. This is
- * also the same as the result length.
+ * or a multiple of data-unit length
+ * as described in xform.
*
* @note
* For SNOW 3G @ RTE_CRYPTO_AUTH_SNOW3G_UEA2,
diff --git a/lib/librte_cryptodev/rte_cryptodev.c b/lib/librte_cryptodev/rte_cryptodev.c
index 40f55a3cd0..e02e001325 100644
--- a/lib/librte_cryptodev/rte_cryptodev.c
+++ b/lib/librte_cryptodev/rte_cryptodev.c
@@ -617,6 +617,8 @@ rte_cryptodev_get_feature_name(uint64_t flag)
return "SYM_SESSIONLESS";
case RTE_CRYPTODEV_FF_NON_BYTE_ALIGNED_DATA:
return "NON_BYTE_ALIGNED_DATA";
+ case RTE_CRYPTODEV_FF_CIPHER_MULTIPLE_DATA_UNITS:
+ return "CIPHER_MULTIPLE_DATA_UNITS";
default:
return NULL;
}
diff --git a/lib/librte_cryptodev/rte_cryptodev.h b/lib/librte_cryptodev/rte_cryptodev.h
index ae34f33f69..7e80f4be26 100644
--- a/lib/librte_cryptodev/rte_cryptodev.h
+++ b/lib/librte_cryptodev/rte_cryptodev.h
@@ -95,6 +95,14 @@ struct rte_crypto_param_range {
*/
};
+/**
+ * Data-unit supported lengths of cipher algorithms.
+ * A bit can represent any set of data-unit sizes
+ * (single size, multiple size, range, etc).
+ */
+#define RTE_CRYPTO_CIPHER_DATA_UNIT_LEN_512_BYTES RTE_BIT32(0)
+#define RTE_CRYPTO_CIPHER_DATA_UNIT_LEN_4096_BYTES RTE_BIT32(1)
+
/**
* Symmetric Crypto Capability
*/
@@ -127,6 +135,12 @@ struct rte_cryptodev_symmetric_capability {
/**< cipher key size range */
struct rte_crypto_param_range iv_size;
/**< Initialisation vector data size range */
+ uint32_t dataunit_set;
+ /**<
+ * Supported data-unit lengths:
+ * RTE_CRYPTO_CIPHER_DATA_UNIT_LEN_* bits
+ * or 0 for lengths defined in the algorithm standard.
+ */
} cipher;
/**< Symmetric Cipher transform capabilities */
struct {
@@ -461,6 +475,8 @@ rte_cryptodev_asym_get_xform_enum(enum rte_crypto_asym_xform_type *xform_enum,
/**< Support operations on data which is not byte aligned */
#define RTE_CRYPTODEV_FF_SYM_RAW_DP (1ULL << 24)
/**< Support accelerator specific symmetric raw data-path APIs */
+#define RTE_CRYPTODEV_FF_CIPHER_MULTIPLE_DATA_UNITS (1ULL << 25)
+/**< Support operations on multiple data-units message */
/**
* Get the name of a crypto device feature flag
--
2.31.1
^ permalink raw reply [relevance 10%]
* Re: [dpdk-dev] [EXT] [PATCH v4] cryptodev: support multiple cipher data-units
2021-04-14 19:43 0% ` Akhil Goyal
@ 2021-04-14 20:17 0% ` Thomas Monjalon
0 siblings, 0 replies; 200+ results
From: Thomas Monjalon @ 2021-04-14 20:17 UTC (permalink / raw)
To: Akhil Goyal
Cc: dev, arkadiuszx.kusztal, Anoob Joseph, Matan Azrad, Ray Kinsella,
Declan Doherty
14/04/2021 21:43, Akhil Goyal:
> > 14/04/2021 20:37, Akhil Goyal:
> > > Hi Thomas,
> > >
> > > > + RTE_STD_C11
> > > > + union { /* temporary anonymous union for ABI compatibility */
> > > > +
> > > > struct {
> > > > const uint8_t *data; /**< pointer to key data */
> > > > uint16_t length; /**< key length in bytes */
> > > > @@ -222,6 +225,27 @@ struct rte_crypto_cipher_xform {
> > > > * - Each key can be either 128 bits (16 bytes) or 256 bits (32 bytes).
> > > > * - Both keys must have the same size.
> > > > **/
> > > > +
> > > > + RTE_STD_C11
> > > > + struct { /* temporary anonymous struct for ABI compatibility */
> > > > + const uint8_t *_key_data; /* reserved for key.data union */
> > > > + uint16_t _key_length; /* reserved for key.length union */
> > > > + /* next field can fill the padding hole */
> > > > +
> > > > + uint16_t dataunit_len;
> > > > + /**< When RTE_CRYPTODEV_FF_CIPHER_MULTIPLE_DATA_UNITS is
> > > > enabled,
> > > > + * this is the data-unit length of the algorithm,
> > > > + * otherwise or when the value is 0, use the operation length.
> > > > + * The value should be in the range defined by the dataunit_set field
> > > > + * in the cipher capability.
> > > > + *
> > > > + * - For AES-XTS it is the size of data-unit, from IEEE Std 1619-2007.
> > > > + * For-each data-unit in the operation, the tweak (IV) value is
> > > > + * assigned consecutively starting from the operation assigned IV.
> > > > + */
> > > > +
> > > > + }; }; /* temporary struct nested in union for ABI compatibility */
> > > > +
> > > Can we add a deprecation notice also in this patch to remove these
> > temporary
> > > Struct and union, so that we remember to remove them in 21.11
> >
> > I thought about it, but a deprecation notice may involve
> > new design considerations and requires 3 approvals.
> > I think it is better to send it separately.
>
> In that case you can send it as a separate patch now only.
> Just wanted to make sure that it is not forgotten.
Yes, sent:
https://patches.dpdk.org/project/dpdk/patch/20210414201544.1063413-1-thomas@monjalon.net/
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH v5 0/5] eal: enable global device syntax by default
@ 2021-04-14 19:49 3% ` Thomas Monjalon
2021-04-23 11:06 0% ` Kinsella, Ray
1 sibling, 1 reply; 200+ results
From: Thomas Monjalon @ 2021-04-14 19:49 UTC (permalink / raw)
To: Xueming Li; +Cc: Gaetan Rivet, dev, Asaf Penso, mdr, david.marchand
13/04/2021 05:14, Xueming Li:
> Xueming Li (5):
> devargs: unify scratch buffer storage
> devargs: fix memory leak on parsing error
> kvargs: add get by key function
> bus: add device arguments name parsing API
> devargs: parse global device syntax
The patch 4 adds a new callback in rte_bus.
I thought about it during the whole day and I don't see any good way
to merge it without breaking the ABI compatibility.
Only first 3 patches are applied for now, thanks.
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [EXT] [PATCH v4] cryptodev: support multiple cipher data-units
2021-04-14 19:38 0% ` Thomas Monjalon
@ 2021-04-14 19:43 0% ` Akhil Goyal
2021-04-14 20:17 0% ` Thomas Monjalon
0 siblings, 1 reply; 200+ results
From: Akhil Goyal @ 2021-04-14 19:43 UTC (permalink / raw)
To: Thomas Monjalon
Cc: dev, arkadiuszx.kusztal, Anoob Joseph, Matan Azrad, Ray Kinsella,
Neil Horman, Declan Doherty
>
> 14/04/2021 20:37, Akhil Goyal:
> > Hi Thomas,
> >
> > > + RTE_STD_C11
> > > + union { /* temporary anonymous union for ABI compatibility */
> > > +
> > > struct {
> > > const uint8_t *data; /**< pointer to key data */
> > > uint16_t length; /**< key length in bytes */
> > > @@ -222,6 +225,27 @@ struct rte_crypto_cipher_xform {
> > > * - Each key can be either 128 bits (16 bytes) or 256 bits (32 bytes).
> > > * - Both keys must have the same size.
> > > **/
> > > +
> > > + RTE_STD_C11
> > > + struct { /* temporary anonymous struct for ABI compatibility */
> > > + const uint8_t *_key_data; /* reserved for key.data union */
> > > + uint16_t _key_length; /* reserved for key.length union */
> > > + /* next field can fill the padding hole */
> > > +
> > > + uint16_t dataunit_len;
> > > + /**< When RTE_CRYPTODEV_FF_CIPHER_MULTIPLE_DATA_UNITS is
> > > enabled,
> > > + * this is the data-unit length of the algorithm,
> > > + * otherwise or when the value is 0, use the operation length.
> > > + * The value should be in the range defined by the dataunit_set field
> > > + * in the cipher capability.
> > > + *
> > > + * - For AES-XTS it is the size of data-unit, from IEEE Std 1619-2007.
> > > + * For-each data-unit in the operation, the tweak (IV) value is
> > > + * assigned consecutively starting from the operation assigned IV.
> > > + */
> > > +
> > > + }; }; /* temporary struct nested in union for ABI compatibility */
> > > +
> > Can we add a deprecation notice also in this patch to remove these
> temporary
> > Struct and union, so that we remember to remove them in 21.11
>
> I thought about it, but a deprecation notice may involve
> new design considerations and requires 3 approvals.
> I think it is better to send it separately.
In that case you can send it as a separate patch now only.
Just wanted to make sure that it is not forgotten.
>
> > > @@ -127,6 +135,11 @@ struct rte_cryptodev_symmetric_capability {
> > > /**< cipher key size range */
> > > struct rte_crypto_param_range iv_size;
> > > /**< Initialisation vector data size range */
> > > + uint32_t dataunit_set;
> > > + /**<
> > > + * A bitmap for a set of the supported data-unit
> > > lengths.
> >
> > Add reference to the newly created macros here
> >
> > > + * 0 for any length defined in the algorithm standard.
> > > + */
>
> Yes, I've seen this miss after sending.
> I'll reword like this:
> * Supported data-unit lengths:
> * RTE_CRYPTO_CIPHER_DATA_UNIT_LEN_* bits
> * or 0 for lengths defined in the algorithm standard.
OK
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH v3 25/26] event/dlb: remove version from device name
2021-04-14 19:31 4% ` Jerin Jacob
@ 2021-04-14 19:42 0% ` McDaniel, Timothy
0 siblings, 0 replies; 200+ results
From: McDaniel, Timothy @ 2021-04-14 19:42 UTC (permalink / raw)
To: Jerin Jacob, David Marchand, Ray Kinsella
Cc: dpdk-dev, Carrillo, Erik G, Gage Eads, Van Haaren, Harry,
Jerin Jacob, Thomas Monjalon
> -----Original Message-----
> From: Jerin Jacob <jerinjacobk@gmail.com>
> Sent: Wednesday, April 14, 2021 2:32 PM
> To: McDaniel, Timothy <timothy.mcdaniel@intel.com>; David Marchand
> <david.marchand@redhat.com>; Ray Kinsella <mdr@ashroe.eu>
> Cc: dpdk-dev <dev@dpdk.org>; Carrillo, Erik G <erik.g.carrillo@intel.com>; Gage
> Eads <gage.eads@intel.com>; Van Haaren, Harry
> <harry.van.haaren@intel.com>; Jerin Jacob <jerinj@marvell.com>; Thomas
> Monjalon <thomas@monjalon.net>
> Subject: Re: [dpdk-dev] [PATCH v3 25/26] event/dlb: remove version from
> device name
>
> On Wed, Apr 14, 2021 at 1:49 AM Timothy McDaniel
> <timothy.mcdaniel@intel.com> wrote:
> >
> > Updated eventdev device name to be dlb_event instead of
> > dlb2_event. The new name will be used for all versions
> > of the DLB hardware. This change required corresponding changes
> > to the directory name that contains the PMD, as well
> > as the documentation files, build infrastructure, and PMD
> > specific APIs.
> >
> > Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
>
> Please change the subject to "event/dlb: rename dlb2 driver", or so.
>
> Also,See the below patch and change the abiignore to dlb2 now.
>
> ------------------
>
> commit 4113ddd45293d7b26ff4033bfd86cef03d29124f
> Author: Thomas Monjalon <thomas@monjalon.net>
> Date: Tue Apr 13 10:29:37 2021 +0200
>
> devtools: skip removed DLB driver in ABI check
>
> The eventdev driver DLB was removed in DPDK 21.05,
> breaking the ABI check.
> The exception was agreed so we just need to skip this check.
>
> Note: complete removal of a driver cannot be ignored
> in devtools/libabigail.abignore, so the script must be patched.
>
> Fixes: 698fa829415d ("event/dlb: remove driver")
>
> Reported-by: David Marchand <david.marchand@redhat.com>
> Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
> Reviewed-by: David Marchand <david.marchand@redhat.com>
>
> ---------------------
>
> > ---
> > MAINTAINERS | 6 +-
> > app/test/test_eventdev.c | 6 +-
> > config/rte_config.h | 11 ++-
> > doc/api/doxy-api-index.md | 2 +-
> > doc/api/doxy-api.conf.in | 2 +-
> > doc/guides/eventdevs/{dlb2.rst => dlb.rst} | 88 +++++++++----------
> > doc/guides/eventdevs/index.rst | 2 +-
> > doc/guides/rel_notes/release_21_05.rst | 5 ++
> > drivers/event/{dlb2 => dlb}/dlb2.c | 25 +++---
> > drivers/event/{dlb2 => dlb}/dlb2_iface.c | 0
> > drivers/event/{dlb2 => dlb}/dlb2_iface.h | 0
> > drivers/event/{dlb2 => dlb}/dlb2_inline_fns.h | 0
> > drivers/event/{dlb2 => dlb}/dlb2_log.h | 0
> > drivers/event/{dlb2 => dlb}/dlb2_priv.h | 7 +-
> > drivers/event/{dlb2 => dlb}/dlb2_selftest.c | 8 +-
> > drivers/event/{dlb2 => dlb}/dlb2_user.h | 0
> > drivers/event/{dlb2 => dlb}/dlb2_xstats.c | 0
> > drivers/event/{dlb2 => dlb}/meson.build | 4 +-
> > .../{dlb2 => dlb}/pf/base/dlb2_hw_types.h | 0
> > .../event/{dlb2 => dlb}/pf/base/dlb2_osdep.h | 0
> > .../{dlb2 => dlb}/pf/base/dlb2_osdep_bitmap.h | 0
> > .../{dlb2 => dlb}/pf/base/dlb2_osdep_list.h | 0
> > .../{dlb2 => dlb}/pf/base/dlb2_osdep_types.h | 0
> > .../event/{dlb2 => dlb}/pf/base/dlb2_regs.h | 0
> > .../{dlb2 => dlb}/pf/base/dlb2_resource.c | 0
> > .../{dlb2 => dlb}/pf/base/dlb2_resource.h | 0
> > drivers/event/{dlb2 => dlb}/pf/dlb2_main.c | 0
> > drivers/event/{dlb2 => dlb}/pf/dlb2_main.h | 0
> > drivers/event/{dlb2 => dlb}/pf/dlb2_pf.c | 0
> > .../rte_pmd_dlb2.c => dlb/rte_pmd_dlb.c} | 6 +-
> > .../rte_pmd_dlb2.h => dlb/rte_pmd_dlb.h} | 12 +--
> > drivers/event/{dlb2 => dlb}/version.map | 2 +-
> > drivers/event/meson.build | 2 +-
> > 33 files changed, 94 insertions(+), 94 deletions(-)
> > rename doc/guides/eventdevs/{dlb2.rst => dlb.rst} (84%)
> > rename drivers/event/{dlb2 => dlb}/dlb2.c (99%)
> > rename drivers/event/{dlb2 => dlb}/dlb2_iface.c (100%)
> > rename drivers/event/{dlb2 => dlb}/dlb2_iface.h (100%)
> > rename drivers/event/{dlb2 => dlb}/dlb2_inline_fns.h (100%)
> > rename drivers/event/{dlb2 => dlb}/dlb2_log.h (100%)
> > rename drivers/event/{dlb2 => dlb}/dlb2_priv.h (99%)
> > rename drivers/event/{dlb2 => dlb}/dlb2_selftest.c (99%)
> > rename drivers/event/{dlb2 => dlb}/dlb2_user.h (100%)
> > rename drivers/event/{dlb2 => dlb}/dlb2_xstats.c (100%)
> > rename drivers/event/{dlb2 => dlb}/meson.build (89%)
> > rename drivers/event/{dlb2 => dlb}/pf/base/dlb2_hw_types.h (100%)
> > rename drivers/event/{dlb2 => dlb}/pf/base/dlb2_osdep.h (100%)
> > rename drivers/event/{dlb2 => dlb}/pf/base/dlb2_osdep_bitmap.h (100%)
> > rename drivers/event/{dlb2 => dlb}/pf/base/dlb2_osdep_list.h (100%)
> > rename drivers/event/{dlb2 => dlb}/pf/base/dlb2_osdep_types.h (100%)
> > rename drivers/event/{dlb2 => dlb}/pf/base/dlb2_regs.h (100%)
> > rename drivers/event/{dlb2 => dlb}/pf/base/dlb2_resource.c (100%)
> > rename drivers/event/{dlb2 => dlb}/pf/base/dlb2_resource.h (100%)
> > rename drivers/event/{dlb2 => dlb}/pf/dlb2_main.c (100%)
> > rename drivers/event/{dlb2 => dlb}/pf/dlb2_main.h (100%)
> > rename drivers/event/{dlb2 => dlb}/pf/dlb2_pf.c (100%)
> > rename drivers/event/{dlb2/rte_pmd_dlb2.c => dlb/rte_pmd_dlb.c} (88%)
> > rename drivers/event/{dlb2/rte_pmd_dlb2.h => dlb/rte_pmd_dlb.h} (88%)
> > rename drivers/event/{dlb2 => dlb}/version.map (60%)
Okay
Thanks,
Tim
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [EXT] [PATCH v4] cryptodev: support multiple cipher data-units
2021-04-14 18:37 0% ` [dpdk-dev] [EXT] " Akhil Goyal
@ 2021-04-14 19:38 0% ` Thomas Monjalon
2021-04-14 19:43 0% ` Akhil Goyal
0 siblings, 1 reply; 200+ results
From: Thomas Monjalon @ 2021-04-14 19:38 UTC (permalink / raw)
To: Akhil Goyal
Cc: dev, arkadiuszx.kusztal, Anoob Joseph, Matan Azrad, Ray Kinsella,
Neil Horman, Declan Doherty
14/04/2021 20:37, Akhil Goyal:
> Hi Thomas,
>
> > + RTE_STD_C11
> > + union { /* temporary anonymous union for ABI compatibility */
> > +
> > struct {
> > const uint8_t *data; /**< pointer to key data */
> > uint16_t length; /**< key length in bytes */
> > @@ -222,6 +225,27 @@ struct rte_crypto_cipher_xform {
> > * - Each key can be either 128 bits (16 bytes) or 256 bits (32 bytes).
> > * - Both keys must have the same size.
> > **/
> > +
> > + RTE_STD_C11
> > + struct { /* temporary anonymous struct for ABI compatibility */
> > + const uint8_t *_key_data; /* reserved for key.data union */
> > + uint16_t _key_length; /* reserved for key.length union */
> > + /* next field can fill the padding hole */
> > +
> > + uint16_t dataunit_len;
> > + /**< When RTE_CRYPTODEV_FF_CIPHER_MULTIPLE_DATA_UNITS is
> > enabled,
> > + * this is the data-unit length of the algorithm,
> > + * otherwise or when the value is 0, use the operation length.
> > + * The value should be in the range defined by the dataunit_set field
> > + * in the cipher capability.
> > + *
> > + * - For AES-XTS it is the size of data-unit, from IEEE Std 1619-2007.
> > + * For-each data-unit in the operation, the tweak (IV) value is
> > + * assigned consecutively starting from the operation assigned IV.
> > + */
> > +
> > + }; }; /* temporary struct nested in union for ABI compatibility */
> > +
> Can we add a deprecation notice also in this patch to remove these temporary
> Struct and union, so that we remember to remove them in 21.11
I thought about it, but a deprecation notice may involve
new design considerations and requires 3 approvals.
I think it is better to send it separately.
> > @@ -127,6 +135,11 @@ struct rte_cryptodev_symmetric_capability {
> > /**< cipher key size range */
> > struct rte_crypto_param_range iv_size;
> > /**< Initialisation vector data size range */
> > + uint32_t dataunit_set;
> > + /**<
> > + * A bitmap for a set of the supported data-unit
> > lengths.
>
> Add reference to the newly created macros here
>
> > + * 0 for any length defined in the algorithm standard.
> > + */
Yes, I've seen this miss after sending.
I'll reword like this:
* Supported data-unit lengths:
* RTE_CRYPTO_CIPHER_DATA_UNIT_LEN_* bits
* or 0 for lengths defined in the algorithm standard.
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH v3 25/26] event/dlb: remove version from device name
@ 2021-04-14 19:31 4% ` Jerin Jacob
2021-04-14 19:42 0% ` McDaniel, Timothy
1 sibling, 1 reply; 200+ results
From: Jerin Jacob @ 2021-04-14 19:31 UTC (permalink / raw)
To: Timothy McDaniel, David Marchand, Ray Kinsella
Cc: dpdk-dev, Erik Gabriel Carrillo, Gage Eads, Van Haaren, Harry,
Jerin Jacob, Thomas Monjalon
On Wed, Apr 14, 2021 at 1:49 AM Timothy McDaniel
<timothy.mcdaniel@intel.com> wrote:
>
> Updated eventdev device name to be dlb_event instead of
> dlb2_event. The new name will be used for all versions
> of the DLB hardware. This change required corresponding changes
> to the directory name that contains the PMD, as well
> as the documentation files, build infrastructure, and PMD
> specific APIs.
>
> Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Please change the subject to "event/dlb: rename dlb2 driver", or so.
Also,See the below patch and change the abiignore to dlb2 now.
------------------
commit 4113ddd45293d7b26ff4033bfd86cef03d29124f
Author: Thomas Monjalon <thomas@monjalon.net>
Date: Tue Apr 13 10:29:37 2021 +0200
devtools: skip removed DLB driver in ABI check
The eventdev driver DLB was removed in DPDK 21.05,
breaking the ABI check.
The exception was agreed so we just need to skip this check.
Note: complete removal of a driver cannot be ignored
in devtools/libabigail.abignore, so the script must be patched.
Fixes: 698fa829415d ("event/dlb: remove driver")
Reported-by: David Marchand <david.marchand@redhat.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Reviewed-by: David Marchand <david.marchand@redhat.com>
---------------------
> ---
> MAINTAINERS | 6 +-
> app/test/test_eventdev.c | 6 +-
> config/rte_config.h | 11 ++-
> doc/api/doxy-api-index.md | 2 +-
> doc/api/doxy-api.conf.in | 2 +-
> doc/guides/eventdevs/{dlb2.rst => dlb.rst} | 88 +++++++++----------
> doc/guides/eventdevs/index.rst | 2 +-
> doc/guides/rel_notes/release_21_05.rst | 5 ++
> drivers/event/{dlb2 => dlb}/dlb2.c | 25 +++---
> drivers/event/{dlb2 => dlb}/dlb2_iface.c | 0
> drivers/event/{dlb2 => dlb}/dlb2_iface.h | 0
> drivers/event/{dlb2 => dlb}/dlb2_inline_fns.h | 0
> drivers/event/{dlb2 => dlb}/dlb2_log.h | 0
> drivers/event/{dlb2 => dlb}/dlb2_priv.h | 7 +-
> drivers/event/{dlb2 => dlb}/dlb2_selftest.c | 8 +-
> drivers/event/{dlb2 => dlb}/dlb2_user.h | 0
> drivers/event/{dlb2 => dlb}/dlb2_xstats.c | 0
> drivers/event/{dlb2 => dlb}/meson.build | 4 +-
> .../{dlb2 => dlb}/pf/base/dlb2_hw_types.h | 0
> .../event/{dlb2 => dlb}/pf/base/dlb2_osdep.h | 0
> .../{dlb2 => dlb}/pf/base/dlb2_osdep_bitmap.h | 0
> .../{dlb2 => dlb}/pf/base/dlb2_osdep_list.h | 0
> .../{dlb2 => dlb}/pf/base/dlb2_osdep_types.h | 0
> .../event/{dlb2 => dlb}/pf/base/dlb2_regs.h | 0
> .../{dlb2 => dlb}/pf/base/dlb2_resource.c | 0
> .../{dlb2 => dlb}/pf/base/dlb2_resource.h | 0
> drivers/event/{dlb2 => dlb}/pf/dlb2_main.c | 0
> drivers/event/{dlb2 => dlb}/pf/dlb2_main.h | 0
> drivers/event/{dlb2 => dlb}/pf/dlb2_pf.c | 0
> .../rte_pmd_dlb2.c => dlb/rte_pmd_dlb.c} | 6 +-
> .../rte_pmd_dlb2.h => dlb/rte_pmd_dlb.h} | 12 +--
> drivers/event/{dlb2 => dlb}/version.map | 2 +-
> drivers/event/meson.build | 2 +-
> 33 files changed, 94 insertions(+), 94 deletions(-)
> rename doc/guides/eventdevs/{dlb2.rst => dlb.rst} (84%)
> rename drivers/event/{dlb2 => dlb}/dlb2.c (99%)
> rename drivers/event/{dlb2 => dlb}/dlb2_iface.c (100%)
> rename drivers/event/{dlb2 => dlb}/dlb2_iface.h (100%)
> rename drivers/event/{dlb2 => dlb}/dlb2_inline_fns.h (100%)
> rename drivers/event/{dlb2 => dlb}/dlb2_log.h (100%)
> rename drivers/event/{dlb2 => dlb}/dlb2_priv.h (99%)
> rename drivers/event/{dlb2 => dlb}/dlb2_selftest.c (99%)
> rename drivers/event/{dlb2 => dlb}/dlb2_user.h (100%)
> rename drivers/event/{dlb2 => dlb}/dlb2_xstats.c (100%)
> rename drivers/event/{dlb2 => dlb}/meson.build (89%)
> rename drivers/event/{dlb2 => dlb}/pf/base/dlb2_hw_types.h (100%)
> rename drivers/event/{dlb2 => dlb}/pf/base/dlb2_osdep.h (100%)
> rename drivers/event/{dlb2 => dlb}/pf/base/dlb2_osdep_bitmap.h (100%)
> rename drivers/event/{dlb2 => dlb}/pf/base/dlb2_osdep_list.h (100%)
> rename drivers/event/{dlb2 => dlb}/pf/base/dlb2_osdep_types.h (100%)
> rename drivers/event/{dlb2 => dlb}/pf/base/dlb2_regs.h (100%)
> rename drivers/event/{dlb2 => dlb}/pf/base/dlb2_resource.c (100%)
> rename drivers/event/{dlb2 => dlb}/pf/base/dlb2_resource.h (100%)
> rename drivers/event/{dlb2 => dlb}/pf/dlb2_main.c (100%)
> rename drivers/event/{dlb2 => dlb}/pf/dlb2_main.h (100%)
> rename drivers/event/{dlb2 => dlb}/pf/dlb2_pf.c (100%)
> rename drivers/event/{dlb2/rte_pmd_dlb2.c => dlb/rte_pmd_dlb.c} (88%)
> rename drivers/event/{dlb2/rte_pmd_dlb2.h => dlb/rte_pmd_dlb.h} (88%)
> rename drivers/event/{dlb2 => dlb}/version.map (60%)
^ permalink raw reply [relevance 4%]
* Re: [dpdk-dev] [EXT] [PATCH v4] cryptodev: support multiple cipher data-units
2021-04-13 20:42 10% ` [dpdk-dev] [PATCH v4] " Thomas Monjalon
@ 2021-04-14 18:37 0% ` Akhil Goyal
2021-04-14 19:38 0% ` Thomas Monjalon
0 siblings, 1 reply; 200+ results
From: Akhil Goyal @ 2021-04-14 18:37 UTC (permalink / raw)
To: Thomas Monjalon, dev
Cc: arkadiuszx.kusztal, Anoob Joseph, Matan Azrad, Ray Kinsella,
Neil Horman, Declan Doherty
Hi Thomas,
> + RTE_STD_C11
> + union { /* temporary anonymous union for ABI compatibility */
> +
> struct {
> const uint8_t *data; /**< pointer to key data */
> uint16_t length; /**< key length in bytes */
> @@ -222,6 +225,27 @@ struct rte_crypto_cipher_xform {
> * - Each key can be either 128 bits (16 bytes) or 256 bits (32 bytes).
> * - Both keys must have the same size.
> **/
> +
> + RTE_STD_C11
> + struct { /* temporary anonymous struct for ABI compatibility */
> + const uint8_t *_key_data; /* reserved for key.data union */
> + uint16_t _key_length; /* reserved for key.length union */
> + /* next field can fill the padding hole */
> +
> + uint16_t dataunit_len;
> + /**< When RTE_CRYPTODEV_FF_CIPHER_MULTIPLE_DATA_UNITS is
> enabled,
> + * this is the data-unit length of the algorithm,
> + * otherwise or when the value is 0, use the operation length.
> + * The value should be in the range defined by the dataunit_set field
> + * in the cipher capability.
> + *
> + * - For AES-XTS it is the size of data-unit, from IEEE Std 1619-2007.
> + * For-each data-unit in the operation, the tweak (IV) value is
> + * assigned consecutively starting from the operation assigned IV.
> + */
> +
> + }; }; /* temporary struct nested in union for ABI compatibility */
> +
Can we add a deprecation notice also in this patch to remove these temporary
Struct and union, so that we remember to remove them in 21.11
> +/**
> + * Data-unit supported lengths of cipher algorithms.
> + * A bit can represent any set of data-unit sizes
> + * (single size, multiple size, range, etc).
> + */
> +#define RTE_CRYPTO_CIPHER_DATA_UNIT_LEN_512_BYTES (1 << 0)
> +#define RTE_CRYPTO_CIPHER_DATA_UNIT_LEN_4096_BYTES (1 << 1)
> +
> /**
> * Symmetric Crypto Capability
> */
> @@ -127,6 +135,11 @@ struct rte_cryptodev_symmetric_capability {
> /**< cipher key size range */
> struct rte_crypto_param_range iv_size;
> /**< Initialisation vector data size range */
> + uint32_t dataunit_set;
> + /**<
> + * A bitmap for a set of the supported data-unit
> lengths.
Add reference to the newly created macros here
> + * 0 for any length defined in the algorithm standard.
> + */
^ permalink raw reply [relevance 0%]
* [dpdk-dev] [PATCH v10 1/4] devtools: add exception for reserved fields
@ 2021-04-14 18:04 4% ` gakhil
2021-04-14 20:57 0% ` David Marchand
0 siblings, 1 reply; 200+ results
From: gakhil @ 2021-04-14 18:04 UTC (permalink / raw)
To: jerinj, thomas, dev, mdr, david.marchand
Cc: abhinandan.gujjar, hemant.agrawal, nipun.gupta, sachin.saxena,
anoobj, matan, roy.fan.zhang, g.singh, erik.g.carrillo,
jay.jayatheerthan, pbhagavatula, harry.van.haaren, sthotton,
Akhil Goyal
From: Akhil Goyal <gakhil@marvell.com>
Certain structures are added with reserved fields
to address any future enhancements to retain ABI
compatibility.
However, ABI script will still report error as it
is not aware of reserved fields. Hence, adding a
generic exception for reserved fields.
Signed-off-by: Akhil Goyal <gakhil@marvell.com>
---
devtools/libabigail.abignore | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/devtools/libabigail.abignore b/devtools/libabigail.abignore
index 6c0b38984..654755314 100644
--- a/devtools/libabigail.abignore
+++ b/devtools/libabigail.abignore
@@ -19,4 +19,8 @@
; Ignore fields inserted in cacheline boundary of rte_cryptodev
[suppress_type]
name = rte_cryptodev
- has_data_member_inserted_between = {offset_after(attached), end}
\ No newline at end of file
+ has_data_member_inserted_between = {offset_after(attached), end}
+
+; Ignore changes in reserved fields
+[suppress_variable]
+ name_regexp = reserved
--
2.25.1
^ permalink raw reply [relevance 4%]
* Re: [dpdk-dev] [EXT] Re: [PATCH v9 4/4] devtools: add exception for reserved fields
2021-04-14 14:16 0% ` [dpdk-dev] [EXT] " Akhil Goyal
@ 2021-04-14 14:22 0% ` Thomas Monjalon
0 siblings, 0 replies; 200+ results
From: Thomas Monjalon @ 2021-04-14 14:22 UTC (permalink / raw)
To: Akhil Goyal
Cc: Jerin Jacob Kollanukkaran, dev, mdr, david.marchand,
abhinandan.gujjar, hemant.agrawal, nipun.gupta, sachin.saxena,
Anoob Joseph, matan, roy.fan.zhang, g.singh, erik.g.carrillo,
jay.jayatheerthan, Pavan Nikhilesh Bhagavatula, harry.van.haaren,
Shijith Thotton
14/04/2021 16:16, Akhil Goyal:
> Hi Thomas,
>
> > 14/04/2021 14:20, gakhil@marvell.com:
> > > From: Akhil Goyal <gakhil@marvell.com>
> > >
> > > Certain structures are added with reserved fields
> > > to address any future enhancements to retain ABI
> > > compatibility.
> > > However, ABI script will still report error as it
> > > is not aware of reserved fields. Hence, adding a
> > > generic exception for reserved fields.
> > >
> > > Signed-off-by: Akhil Goyal <gakhil@marvell.com>
> > > ---
> > >
> > > devtools/libabigail.abignore | 4 ++++
> > > 1 file changed, 4 insertions(+)
> > >
> > > diff --git a/devtools/libabigail.abignore b/devtools/libabigail.abignore
> > > index 46a5a6af5..a9d284f76 100644
> > > --- a/devtools/libabigail.abignore
> > > +++ b/devtools/libabigail.abignore
> > > @@ -25,3 +25,7 @@
> > >
> > > [suppress_type]
> > >
> > > name = rte_eventdev
> > > has_data_member_inserted_between = {offset_after(attached), end}
> > >
> > > +
> > > +; Ignore changes in reserved fields
> > > +[suppress_variable]
> > > + name_regexp = reserved
> >
> > If we do that as first patch of this series,
> > we don't need the exception on rte_eventdev, right?
>
> It will still be required, as we have 2 issues
> 1. Reserved_ptr[4] to reserved[3]
> 2. Additional member ca_enqueue added
>
> So we need both.
If this patch is required, it should not be the last one.
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [EXT] Re: [PATCH v9 4/4] devtools: add exception for reserved fields
2021-04-14 12:53 0% ` Thomas Monjalon
@ 2021-04-14 14:16 0% ` Akhil Goyal
2021-04-14 14:22 0% ` Thomas Monjalon
0 siblings, 1 reply; 200+ results
From: Akhil Goyal @ 2021-04-14 14:16 UTC (permalink / raw)
To: Thomas Monjalon
Cc: Jerin Jacob Kollanukkaran, dev, mdr, david.marchand,
abhinandan.gujjar, hemant.agrawal, nipun.gupta, sachin.saxena,
Anoob Joseph, matan, roy.fan.zhang, g.singh, erik.g.carrillo,
jay.jayatheerthan, Pavan Nikhilesh Bhagavatula, harry.van.haaren,
Shijith Thotton
Hi Thomas,
14/04/2021 14:20, gakhil@marvell.com:
> From: Akhil Goyal <gakhil@marvell.com>
>
> Certain structures are added with reserved fields
> to address any future enhancements to retain ABI
> compatibility.
> However, ABI script will still report error as it
> is not aware of reserved fields. Hence, adding a
> generic exception for reserved fields.
>
> Signed-off-by: Akhil Goyal <gakhil@marvell.com>
> ---
> devtools/libabigail.abignore | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/devtools/libabigail.abignore b/devtools/libabigail.abignore
> index 46a5a6af5..a9d284f76 100644
> --- a/devtools/libabigail.abignore
> +++ b/devtools/libabigail.abignore
> @@ -25,3 +25,7 @@
> [suppress_type]
> name = rte_eventdev
> has_data_member_inserted_between = {offset_after(attached), end}
> +
> +; Ignore changes in reserved fields
> +[suppress_variable]
> + name_regexp = reserved
If we do that as first patch of this series,
we don't need the exception on rte_eventdev, right?
It will still be required, as we have 2 issues
1. Reserved_ptr[4] to reserved[3]
2. Additional member ca_enqueue added
So we need both.
Regards,
Akhil
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH v9 4/4] devtools: add exception for reserved fields
2021-04-14 12:20 4% ` [dpdk-dev] [PATCH v9 4/4] devtools: add exception for reserved fields gakhil
@ 2021-04-14 12:53 0% ` Thomas Monjalon
2021-04-14 14:16 0% ` [dpdk-dev] [EXT] " Akhil Goyal
0 siblings, 1 reply; 200+ results
From: Thomas Monjalon @ 2021-04-14 12:53 UTC (permalink / raw)
To: Akhil Goyal
Cc: jerinj, dev, mdr, david.marchand, abhinandan.gujjar,
hemant.agrawal, nipun.gupta, sachin.saxena, anoobj, matan,
roy.fan.zhang, g.singh, erik.g.carrillo, jay.jayatheerthan,
pbhagavatula, harry.van.haaren, sthotton
14/04/2021 14:20, gakhil@marvell.com:
> From: Akhil Goyal <gakhil@marvell.com>
>
> Certain structures are added with reserved fields
> to address any future enhancements to retain ABI
> compatibility.
> However, ABI script will still report error as it
> is not aware of reserved fields. Hence, adding a
> generic exception for reserved fields.
>
> Signed-off-by: Akhil Goyal <gakhil@marvell.com>
> ---
> devtools/libabigail.abignore | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/devtools/libabigail.abignore b/devtools/libabigail.abignore
> index 46a5a6af5..a9d284f76 100644
> --- a/devtools/libabigail.abignore
> +++ b/devtools/libabigail.abignore
> @@ -25,3 +25,7 @@
> [suppress_type]
> name = rte_eventdev
> has_data_member_inserted_between = {offset_after(attached), end}
> +
> +; Ignore changes in reserved fields
> +[suppress_variable]
> + name_regexp = reserved
If we do that as first patch of this series,
we don't need the exception on rte_eventdev, right?
^ permalink raw reply [relevance 0%]
* [dpdk-dev] [PATCH v9 4/4] devtools: add exception for reserved fields
@ 2021-04-14 12:20 4% ` gakhil
2021-04-14 12:53 0% ` Thomas Monjalon
0 siblings, 1 reply; 200+ results
From: gakhil @ 2021-04-14 12:20 UTC (permalink / raw)
To: jerinj, thomas, dev, mdr, david.marchand
Cc: abhinandan.gujjar, hemant.agrawal, nipun.gupta, sachin.saxena,
anoobj, matan, roy.fan.zhang, g.singh, erik.g.carrillo,
jay.jayatheerthan, pbhagavatula, harry.van.haaren, sthotton,
Akhil Goyal
From: Akhil Goyal <gakhil@marvell.com>
Certain structures are added with reserved fields
to address any future enhancements to retain ABI
compatibility.
However, ABI script will still report error as it
is not aware of reserved fields. Hence, adding a
generic exception for reserved fields.
Signed-off-by: Akhil Goyal <gakhil@marvell.com>
---
devtools/libabigail.abignore | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/devtools/libabigail.abignore b/devtools/libabigail.abignore
index 46a5a6af5..a9d284f76 100644
--- a/devtools/libabigail.abignore
+++ b/devtools/libabigail.abignore
@@ -25,3 +25,7 @@
[suppress_type]
name = rte_eventdev
has_data_member_inserted_between = {offset_after(attached), end}
+
+; Ignore changes in reserved fields
+[suppress_variable]
+ name_regexp = reserved
--
2.25.1
^ permalink raw reply [relevance 4%]
* Re: [dpdk-dev] [PATCH V2] ethdev: add queue state when retrieve queue information
2021-04-14 10:40 0% ` Ferruh Yigit
@ 2021-04-14 10:56 0% ` Ananyev, Konstantin
0 siblings, 0 replies; 200+ results
From: Ananyev, Konstantin @ 2021-04-14 10:56 UTC (permalink / raw)
To: Yigit, Ferruh, Lijun Ou, thomas, Ori Kam, Andrew Rybchenko; +Cc: dev, linuxarm
> Hi Lijun,
>
> Let's try to complete this for the release.
>
> On 4/6/2021 3:02 PM, Ananyev, Konstantin wrote:
> > Hi,
> >
> >> Currently, upper-layer application could get queue state only
> >> through pointers such as dev->data->tx_queue_state[queue_id],
> >> this is not the recommended way to access it. So this patch
> >> add get queue state when call rte_eth_rx_queue_info_get and
> >> rte_eth_tx_queue_info_get API.
> >>
> >> Note: The hairpin queue is not supported with above
> >> rte_eth_*x_queue_info_get, so the queue state could be
> >> RTE_ETH_QUEUE_STATE_STARTED or RTE_ETH_QUEUE_STATE_STOPPED.
> >
> > I wonder why RTE_ETH_QUEUE_STATE_HAIRPIN Is not supported?
> > Obviously what we do - copy internal queue state to the user provided buffer.
> >
>
> +1, with current implementation we can't say it is only for start & stop.
>
> Since 'STATE_HAIRPIN' is all internal, it may be possible to separate it into
With this patch - not any more, as we move RTE_ETH_QUEUE_STATE_* Defines
into rte_ethdev.h.
> its own variable and expose only start and stop, but I don't think it worth the
> effort, why not just expose all possible states.
>
>
> >> Note: After add queue_state field, the 'struct rte_eth_rxq_info' size
> >> remains 128B, and the 'struct rte_eth_txq_info' size remains 64B, so
> >> it could be ABI compatible.
> >>
> >> Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
> >> Signed-off-by: Lijun Ou <oulijun@huawei.com>
> >> ---
> >> V1->V2:
> >> - move queue state defines to public file
> >> ---
> >> doc/guides/rel_notes/release_21_05.rst | 6 ++++++
> >> lib/librte_ethdev/ethdev_driver.h | 7 -------
> >> lib/librte_ethdev/rte_ethdev.c | 3 +++
> >> lib/librte_ethdev/rte_ethdev.h | 11 +++++++++++
> >> 4 files changed, 20 insertions(+), 7 deletions(-)
> >>
> >> diff --git a/doc/guides/rel_notes/release_21_05.rst b/doc/guides/rel_notes/release_21_05.rst
> >> index 22aa80a..503daf9 100644
> >> --- a/doc/guides/rel_notes/release_21_05.rst
> >> +++ b/doc/guides/rel_notes/release_21_05.rst
> >> @@ -164,6 +164,12 @@ ABI Changes
> >>
> >> * No ABI change that would break compatibility with 20.11.
> >>
> >> +* Added new field ``queue_state`` to ``rte_eth_rxq_info`` structure
> >> + to provide indicated rxq queue state.
> >> +
> >> +* Added new field ``queue_state`` to ``rte_eth_txq_info`` structure
> >> + to provide indicated txq queue state.
> >> +
> >>
> >> Known Issues
> >> ------------
> >> diff --git a/lib/librte_ethdev/ethdev_driver.h b/lib/librte_ethdev/ethdev_driver.h
> >> index cdd4b43..ec5a17d 100644
> >> --- a/lib/librte_ethdev/ethdev_driver.h
> >> +++ b/lib/librte_ethdev/ethdev_driver.h
> >> @@ -970,13 +970,6 @@ struct eth_dev_ops {
> >> };
> >>
> >> /**
> >> - * RX/TX queue states
> >> - */
> >> -#define RTE_ETH_QUEUE_STATE_STOPPED 0
> >> -#define RTE_ETH_QUEUE_STATE_STARTED 1
> >> -#define RTE_ETH_QUEUE_STATE_HAIRPIN 2
> >> -
> >> -/**
> >> * @internal
> >> * Check if the selected Rx queue is hairpin queue.
> >> *
> >> diff --git a/lib/librte_ethdev/rte_ethdev.c b/lib/librte_ethdev/rte_ethdev.c
> >> index 3059aa5..fbd10b2 100644
> >> --- a/lib/librte_ethdev/rte_ethdev.c
> >> +++ b/lib/librte_ethdev/rte_ethdev.c
> >> @@ -5042,6 +5042,8 @@ rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
> >>
> >> memset(qinfo, 0, sizeof(*qinfo));
> >> dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
> >> +qinfo->queue_state = dev->data->rx_queue_state[queue_id];
> >> +
> >> return 0;
> >> }
> >>
> >> @@ -5082,6 +5084,7 @@ rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
> >>
> >> memset(qinfo, 0, sizeof(*qinfo));
> >> dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
> >> +qinfo->queue_state = dev->data->tx_queue_state[queue_id];
> >>
> >> return 0;
> >> }
> >> diff --git a/lib/librte_ethdev/rte_ethdev.h b/lib/librte_ethdev/rte_ethdev.h
> >> index efda313..4f0b1b2 100644
> >> --- a/lib/librte_ethdev/rte_ethdev.h
> >> +++ b/lib/librte_ethdev/rte_ethdev.h
> >> @@ -1582,6 +1582,13 @@ struct rte_eth_dev_info {
> >> };
> >>
> >> /**
> >> + * RX/TX queue states
> >> + */
> >> +#define RTE_ETH_QUEUE_STATE_STOPPED 0
> >> +#define RTE_ETH_QUEUE_STATE_STARTED 1
> >> +#define RTE_ETH_QUEUE_STATE_HAIRPIN 2
> >> +
> >> +/**
> >> * Ethernet device RX queue information structure.
> >> * Used to retrieve information about configured queue.
> >> */
> >> @@ -1591,6 +1598,8 @@ struct rte_eth_rxq_info {
> >> uint8_t scattered_rx; /**< scattered packets RX supported. */
> >> uint16_t nb_desc; /**< configured number of RXDs. */
> >> uint16_t rx_buf_size; /**< hardware receive buffer size. */
> >> +/**< Queues state: STARTED(1) / STOPPED(0). */
> >
> > I think comment has to state that possible values are one of
> > RTE_ETH_QUEUE_STATE_*.
> > About previous discussion about new field in this struct vs new API function,
> > I still think new function will be a bit cleaner, but could live with both.
> >
> >> +uint8_t queue_state;
> >
> > If we'll go with new 1B field, then as Stephen pointed,
> > it is probably worth to fill the hole between scattered_rx
> > and nb_desc with this new filed.
> >
>
> +1
>
> >> } __rte_cache_min_aligned;
> >>
> >> /**
> >> @@ -1600,6 +1609,8 @@ struct rte_eth_rxq_info {
> >> struct rte_eth_txq_info {
> >> struct rte_eth_txconf conf; /**< queue config parameters. */
> >> uint16_t nb_desc; /**< configured number of TXDs. */
> >> +/**< Queues state: STARTED(1) / STOPPED(0). */
> >
> > Same about comment here.
> >
> >> +uint8_t queue_state;
> >> } __rte_cache_min_aligned;
> >>
> >> /* Generic Burst mode flag definition, values can be ORed. */
> >> --
> >> 2.7.4
> >
>
>
> Other comments I case see:
>
> 1- Make QUEUE_STATE enum
> For consistency with existing usage I think we can keep it as it is
>
> 2- Make a specific API to get the queue state
> No strong opinion, I think we can go with this one
>
> 3- Use enum type in "struct rte_eth_rxq_info"
> Which make sense but we don't have space in current struct, also
> 'rte_eth_dev_data' has variable to hold same, and for consistency if we change
> it to enum in it, that is even wider change. I think it doesn't worth the effort
> and we can continue with 'uint8_t'
>
> Please add if any is missing, and if there is any strong opinion on above.
>
>
> If there is no objection, only required changes are above two issues commented
> inline,
> - Remove comment/note that this is only for start/stop states
> - Replace the field location to benefit from gap in struct
Sounds good to me.
Konstantin
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH V2] ethdev: add queue state when retrieve queue information
@ 2021-04-14 10:40 0% ` Ferruh Yigit
2021-04-14 10:56 0% ` Ananyev, Konstantin
0 siblings, 1 reply; 200+ results
From: Ferruh Yigit @ 2021-04-14 10:40 UTC (permalink / raw)
To: Ananyev, Konstantin, Lijun Ou, thomas, Ori Kam, Andrew Rybchenko
Cc: dev, linuxarm
Hi Lijun,
Let's try to complete this for the release.
On 4/6/2021 3:02 PM, Ananyev, Konstantin wrote:
> Hi,
>
>> Currently, upper-layer application could get queue state only
>> through pointers such as dev->data->tx_queue_state[queue_id],
>> this is not the recommended way to access it. So this patch
>> add get queue state when call rte_eth_rx_queue_info_get and
>> rte_eth_tx_queue_info_get API.
>>
>> Note: The hairpin queue is not supported with above
>> rte_eth_*x_queue_info_get, so the queue state could be
>> RTE_ETH_QUEUE_STATE_STARTED or RTE_ETH_QUEUE_STATE_STOPPED.
>
> I wonder why RTE_ETH_QUEUE_STATE_HAIRPIN Is not supported?
> Obviously what we do - copy internal queue state to the user provided buffer.
>
+1, with current implementation we can't say it is only for start & stop.
Since 'STATE_HAIRPIN' is all internal, it may be possible to separate it into
its own variable and expose only start and stop, but I don't think it worth the
effort, why not just expose all possible states.
>> Note: After add queue_state field, the 'struct rte_eth_rxq_info' size
>> remains 128B, and the 'struct rte_eth_txq_info' size remains 64B, so
>> it could be ABI compatible.
>>
>> Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
>> Signed-off-by: Lijun Ou <oulijun@huawei.com>
>> ---
>> V1->V2:
>> - move queue state defines to public file
>> ---
>> doc/guides/rel_notes/release_21_05.rst | 6 ++++++
>> lib/librte_ethdev/ethdev_driver.h | 7 -------
>> lib/librte_ethdev/rte_ethdev.c | 3 +++
>> lib/librte_ethdev/rte_ethdev.h | 11 +++++++++++
>> 4 files changed, 20 insertions(+), 7 deletions(-)
>>
>> diff --git a/doc/guides/rel_notes/release_21_05.rst b/doc/guides/rel_notes/release_21_05.rst
>> index 22aa80a..503daf9 100644
>> --- a/doc/guides/rel_notes/release_21_05.rst
>> +++ b/doc/guides/rel_notes/release_21_05.rst
>> @@ -164,6 +164,12 @@ ABI Changes
>>
>> * No ABI change that would break compatibility with 20.11.
>>
>> +* Added new field ``queue_state`` to ``rte_eth_rxq_info`` structure
>> + to provide indicated rxq queue state.
>> +
>> +* Added new field ``queue_state`` to ``rte_eth_txq_info`` structure
>> + to provide indicated txq queue state.
>> +
>>
>> Known Issues
>> ------------
>> diff --git a/lib/librte_ethdev/ethdev_driver.h b/lib/librte_ethdev/ethdev_driver.h
>> index cdd4b43..ec5a17d 100644
>> --- a/lib/librte_ethdev/ethdev_driver.h
>> +++ b/lib/librte_ethdev/ethdev_driver.h
>> @@ -970,13 +970,6 @@ struct eth_dev_ops {
>> };
>>
>> /**
>> - * RX/TX queue states
>> - */
>> -#define RTE_ETH_QUEUE_STATE_STOPPED 0
>> -#define RTE_ETH_QUEUE_STATE_STARTED 1
>> -#define RTE_ETH_QUEUE_STATE_HAIRPIN 2
>> -
>> -/**
>> * @internal
>> * Check if the selected Rx queue is hairpin queue.
>> *
>> diff --git a/lib/librte_ethdev/rte_ethdev.c b/lib/librte_ethdev/rte_ethdev.c
>> index 3059aa5..fbd10b2 100644
>> --- a/lib/librte_ethdev/rte_ethdev.c
>> +++ b/lib/librte_ethdev/rte_ethdev.c
>> @@ -5042,6 +5042,8 @@ rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
>>
>> memset(qinfo, 0, sizeof(*qinfo));
>> dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
>> +qinfo->queue_state = dev->data->rx_queue_state[queue_id];
>> +
>> return 0;
>> }
>>
>> @@ -5082,6 +5084,7 @@ rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
>>
>> memset(qinfo, 0, sizeof(*qinfo));
>> dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
>> +qinfo->queue_state = dev->data->tx_queue_state[queue_id];
>>
>> return 0;
>> }
>> diff --git a/lib/librte_ethdev/rte_ethdev.h b/lib/librte_ethdev/rte_ethdev.h
>> index efda313..4f0b1b2 100644
>> --- a/lib/librte_ethdev/rte_ethdev.h
>> +++ b/lib/librte_ethdev/rte_ethdev.h
>> @@ -1582,6 +1582,13 @@ struct rte_eth_dev_info {
>> };
>>
>> /**
>> + * RX/TX queue states
>> + */
>> +#define RTE_ETH_QUEUE_STATE_STOPPED 0
>> +#define RTE_ETH_QUEUE_STATE_STARTED 1
>> +#define RTE_ETH_QUEUE_STATE_HAIRPIN 2
>> +
>> +/**
>> * Ethernet device RX queue information structure.
>> * Used to retrieve information about configured queue.
>> */
>> @@ -1591,6 +1598,8 @@ struct rte_eth_rxq_info {
>> uint8_t scattered_rx; /**< scattered packets RX supported. */
>> uint16_t nb_desc; /**< configured number of RXDs. */
>> uint16_t rx_buf_size; /**< hardware receive buffer size. */
>> +/**< Queues state: STARTED(1) / STOPPED(0). */
>
> I think comment has to state that possible values are one of
> RTE_ETH_QUEUE_STATE_*.
> About previous discussion about new field in this struct vs new API function,
> I still think new function will be a bit cleaner, but could live with both.
>
>> +uint8_t queue_state;
>
> If we'll go with new 1B field, then as Stephen pointed,
> it is probably worth to fill the hole between scattered_rx
> and nb_desc with this new filed.
>
+1
>> } __rte_cache_min_aligned;
>>
>> /**
>> @@ -1600,6 +1609,8 @@ struct rte_eth_rxq_info {
>> struct rte_eth_txq_info {
>> struct rte_eth_txconf conf; /**< queue config parameters. */
>> uint16_t nb_desc; /**< configured number of TXDs. */
>> +/**< Queues state: STARTED(1) / STOPPED(0). */
>
> Same about comment here.
>
>> +uint8_t queue_state;
>> } __rte_cache_min_aligned;
>>
>> /* Generic Burst mode flag definition, values can be ORed. */
>> --
>> 2.7.4
>
Other comments I case see:
1- Make QUEUE_STATE enum
For consistency with existing usage I think we can keep it as it is
2- Make a specific API to get the queue state
No strong opinion, I think we can go with this one
3- Use enum type in "struct rte_eth_rxq_info"
Which make sense but we don't have space in current struct, also
'rte_eth_dev_data' has variable to hold same, and for consistency if we change
it to enum in it, that is even wider change. I think it doesn't worth the effort
and we can continue with 'uint8_t'
Please add if any is missing, and if there is any strong opinion on above.
If there is no objection, only required changes are above two issues commented
inline,
- Remove comment/note that this is only for start/stop states
- Replace the field location to benefit from gap in struct
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH V2] ethdev: add queue state when retrieve queue information
@ 2021-04-14 10:09 3% ` Ferruh Yigit
0 siblings, 0 replies; 200+ results
From: Ferruh Yigit @ 2021-04-14 10:09 UTC (permalink / raw)
To: Stephen Hemminger, oulijun; +Cc: dev, Thomas Monjalon
On 4/6/2021 2:55 AM, Stephen Hemminger wrote:
> On Tue, 6 Apr 2021 08:49:04 +0800
> oulijun <oulijun@huawei.com> wrote:
>
>>> /**
>>> + * RX/TX queue states
>>> + */
>>> +#define RTE_ETH_QUEUE_STATE_STOPPED 0
>>> +#define RTE_ETH_QUEUE_STATE_STARTED 1
>>> +#define RTE_ETH_QUEUE_STATE_HAIRPIN 2
>
> These could be an enum?
>
These values are already used to assign to
'rte_eth_dev_data->[rt]x_queue_state', which are 'uint8_t', end we can't change
them to 'enum' because of ABI concerns, so I think we can keep them as it is.
>>> +/**
>>> * Ethernet device RX queue information structure.
>>> * Used to retrieve information about configured queue.
>>> */
>>> @@ -1591,6 +1598,8 @@ struct rte_eth_rxq_info {
>>> uint8_t scattered_rx; /**< scattered packets RX supported. */
>
> There is a one byte hole here waiting to be used.
> Why not use that?
>
+1
>>> uint16_t nb_desc; /**< configured number of RXDs. */
>>> uint16_t rx_buf_size; /**< hardware receive buffer size. */
>>> + /**< Queues state: STARTED(1) / STOPPED(0). */
>>> + uint8_t queue_state;
>>> } __rte_cache_min_aligned;
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [EXT] Re: [PATCH v8 1/3] eventdev: introduce crypto adapter enqueue API
2021-04-14 8:39 0% ` [dpdk-dev] [EXT] " Akhil Goyal
@ 2021-04-14 8:43 0% ` Thomas Monjalon
0 siblings, 0 replies; 200+ results
From: Thomas Monjalon @ 2021-04-14 8:43 UTC (permalink / raw)
To: Akhil Goyal
Cc: Jerin Jacob Kollanukkaran, dev, Ray Kinsella, David Marchand,
abhinandan.gujjar, hemant.agrawal, nipun.gupta, sachin.saxena,
Anoob Joseph, matan, roy.fan.zhang, g.singh, erik.g.carrillo,
jay.jayatheerthan, Pavan Nikhilesh Bhagavatula, harry.van.haaren,
Shijith Thotton
14/04/2021 10:39, Akhil Goyal:
> Hi Thomas,
>
> > 14/04/2021 09:58, Akhil Goyal:
> > > Hi,
> > > > > +
> > > > > #define RTE_EVENTDEV_NAME_MAX_LEN (64)
> > > > > /**< @internal Max length of name of event PMD */
> > > > >
> > > > > @@ -1423,6 +1427,8 @@ struct rte_eventdev {
> > > > > */
> > > > > event_tx_adapter_enqueue txa_enqueue;
> > > > > /**< Pointer to PMD eth Tx adapter enqueue function. */
> > > > > + event_crypto_adapter_enqueue ca_enqueue;
> > > > > + /**< Pointer to PMD crypto adapter enqueue function. */
> > > > > struct rte_eventdev_data *data;
> > > > > /**< Pointer to device data */
> > > > > struct rte_eventdev_ops *dev_ops;
> > > > > @@ -1435,7 +1441,7 @@ struct rte_eventdev {
> > > > > /**< Flag indicating the device is attached */
> > > > >
> > > > > uint64_t reserved_64s[4]; /**< Reserved for future fields */
> > > > > - void *reserved_ptrs[4]; /**< Reserved for future fields */
> > > > > + void *reserved_ptrs[3]; /**< Reserved for future fields */
> > > > > } __rte_cache_aligned;
> > > >
> > > >
> > > > This change has following ABI breakage[1].
> > > >
> > > > Could you move ca_enqueue at end of struct to avoid the ABI breakage.
> > Also,
> > > > please update depreciation notice to move ca_enqueue to above(to align
> > > > with function pointers) in 21.11 release.
> > > >
> > > > [1]
> > > > [C]'function rte_eventdev* rte_event_pmd_allocate(const char*, int)' at
> > > > rte_eventdev.c:1467:1 has some indirect sub-type changes:
> > > > return type changed:
> > > > in pointed to type 'struct rte_eventdev' at rte_eventdev.h:1411:1:
> > > > type size hasn't changed
> > > > 1 data member insertion:
> > > > 'event_crypto_adapter_enqueue rte_eventdev::ca_enqueue', at
> > offset
> > > > 512 (in bits) at rte_eventdev.h:1430:1
> > > > 5 data member changes:
> > > > 'rte_eventdev_data* rte_eventdev::data' offset changed from 512 to
> > > > 576 (in bits) (by +64 bits)
> > > > 'rte_eventdev_ops* rte_eventdev::dev_ops' offset changed from
> > 576 to
> > > > 640 (in bits) (by +64 bits)
> > > > 'rte_device* rte_eventdev::dev' offset changed from 640 to 704 (in
> > bits)
> > > > (by +64 bits)
> > > > 'uint64_t rte_eventdev::reserved_64s[4]' offset changed from 768 to
> > > > 832 (in bits) (by +64 bits)
> > > > type of 'void* rte_eventdev::reserved_ptrs[4]' changed:
> > > > type name changed from 'void*[4]' to 'void*[3]'
> > > > array type size changed from 256 to 192
> > > > array type subrange 1 changed length from 4 to 3
> > > > and offset changed from 1024 to 1088 (in bits) (by +64 bits)
> > > >
> > > >
> > > Yes my bad, it should be added in the end.
> > > But abi script will still shout for 'void*[4]' to 'void*[3]' conversion.
> > > We may need to add something in the devtools/libabigail.abignore
> > > So that, CI is not broken when reserved fields are changed.
> > > Otherwise, it does not make sense to introduce reserve fields.
> > > Can we have something generic for reserved fields?
> > > Any suggestions?
> >
> > The ABI check is not aware about the reserved fields.
> > It needs to be added in libabigail.ignore.
> >
> Can I add a generic ignore for all reserved fields.
>
> +; Ignore changes in reserved fields
> +[suppress_variable]
> + name_regexp = reserved
You can propose in a separate patch in your series.
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [EXT] Re: [PATCH v8 1/3] eventdev: introduce crypto adapter enqueue API
2021-04-14 8:18 3% ` Thomas Monjalon
@ 2021-04-14 8:39 0% ` Akhil Goyal
2021-04-14 8:43 0% ` Thomas Monjalon
0 siblings, 1 reply; 200+ results
From: Akhil Goyal @ 2021-04-14 8:39 UTC (permalink / raw)
To: Thomas Monjalon
Cc: Jerin Jacob Kollanukkaran, dev, Ray Kinsella, David Marchand,
abhinandan.gujjar, hemant.agrawal, nipun.gupta, sachin.saxena,
Anoob Joseph, matan, roy.fan.zhang, g.singh, erik.g.carrillo,
jay.jayatheerthan, Pavan Nikhilesh Bhagavatula, harry.van.haaren,
Shijith Thotton
Hi Thomas,
> 14/04/2021 09:58, Akhil Goyal:
> > Hi,
> > > > +
> > > > #define RTE_EVENTDEV_NAME_MAX_LEN (64)
> > > > /**< @internal Max length of name of event PMD */
> > > >
> > > > @@ -1423,6 +1427,8 @@ struct rte_eventdev {
> > > > */
> > > > event_tx_adapter_enqueue txa_enqueue;
> > > > /**< Pointer to PMD eth Tx adapter enqueue function. */
> > > > + event_crypto_adapter_enqueue ca_enqueue;
> > > > + /**< Pointer to PMD crypto adapter enqueue function. */
> > > > struct rte_eventdev_data *data;
> > > > /**< Pointer to device data */
> > > > struct rte_eventdev_ops *dev_ops;
> > > > @@ -1435,7 +1441,7 @@ struct rte_eventdev {
> > > > /**< Flag indicating the device is attached */
> > > >
> > > > uint64_t reserved_64s[4]; /**< Reserved for future fields */
> > > > - void *reserved_ptrs[4]; /**< Reserved for future fields */
> > > > + void *reserved_ptrs[3]; /**< Reserved for future fields */
> > > > } __rte_cache_aligned;
> > >
> > >
> > > This change has following ABI breakage[1].
> > >
> > > Could you move ca_enqueue at end of struct to avoid the ABI breakage.
> Also,
> > > please update depreciation notice to move ca_enqueue to above(to align
> > > with function pointers) in 21.11 release.
> > >
> > > [1]
> > > [C]'function rte_eventdev* rte_event_pmd_allocate(const char*, int)' at
> > > rte_eventdev.c:1467:1 has some indirect sub-type changes:
> > > return type changed:
> > > in pointed to type 'struct rte_eventdev' at rte_eventdev.h:1411:1:
> > > type size hasn't changed
> > > 1 data member insertion:
> > > 'event_crypto_adapter_enqueue rte_eventdev::ca_enqueue', at
> offset
> > > 512 (in bits) at rte_eventdev.h:1430:1
> > > 5 data member changes:
> > > 'rte_eventdev_data* rte_eventdev::data' offset changed from 512 to
> > > 576 (in bits) (by +64 bits)
> > > 'rte_eventdev_ops* rte_eventdev::dev_ops' offset changed from
> 576 to
> > > 640 (in bits) (by +64 bits)
> > > 'rte_device* rte_eventdev::dev' offset changed from 640 to 704 (in
> bits)
> > > (by +64 bits)
> > > 'uint64_t rte_eventdev::reserved_64s[4]' offset changed from 768 to
> > > 832 (in bits) (by +64 bits)
> > > type of 'void* rte_eventdev::reserved_ptrs[4]' changed:
> > > type name changed from 'void*[4]' to 'void*[3]'
> > > array type size changed from 256 to 192
> > > array type subrange 1 changed length from 4 to 3
> > > and offset changed from 1024 to 1088 (in bits) (by +64 bits)
> > >
> > >
> > Yes my bad, it should be added in the end.
> > But abi script will still shout for 'void*[4]' to 'void*[3]' conversion.
> > We may need to add something in the devtools/libabigail.abignore
> > So that, CI is not broken when reserved fields are changed.
> > Otherwise, it does not make sense to introduce reserve fields.
> > Can we have something generic for reserved fields?
> > Any suggestions?
>
> The ABI check is not aware about the reserved fields.
> It needs to be added in libabigail.ignore.
>
Can I add a generic ignore for all reserved fields.
+; Ignore changes in reserved fields
+[suppress_variable]
+ name_regexp = reserved
Regards,
Akhil
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH v8 1/3] eventdev: introduce crypto adapter enqueue API
2021-04-14 7:58 3% ` Akhil Goyal
@ 2021-04-14 8:18 3% ` Thomas Monjalon
2021-04-14 8:39 0% ` [dpdk-dev] [EXT] " Akhil Goyal
0 siblings, 1 reply; 200+ results
From: Thomas Monjalon @ 2021-04-14 8:18 UTC (permalink / raw)
To: Akhil Goyal
Cc: Jerin Jacob Kollanukkaran, dev, Ray Kinsella, David Marchand,
abhinandan.gujjar, hemant.agrawal, nipun.gupta, sachin.saxena,
Anoob Joseph, matan, roy.fan.zhang, g.singh, erik.g.carrillo,
jay.jayatheerthan, Pavan Nikhilesh Bhagavatula, harry.van.haaren,
Shijith Thotton
14/04/2021 09:58, Akhil Goyal:
> Hi,
> > > +
> > > #define RTE_EVENTDEV_NAME_MAX_LEN (64)
> > > /**< @internal Max length of name of event PMD */
> > >
> > > @@ -1423,6 +1427,8 @@ struct rte_eventdev {
> > > */
> > > event_tx_adapter_enqueue txa_enqueue;
> > > /**< Pointer to PMD eth Tx adapter enqueue function. */
> > > + event_crypto_adapter_enqueue ca_enqueue;
> > > + /**< Pointer to PMD crypto adapter enqueue function. */
> > > struct rte_eventdev_data *data;
> > > /**< Pointer to device data */
> > > struct rte_eventdev_ops *dev_ops;
> > > @@ -1435,7 +1441,7 @@ struct rte_eventdev {
> > > /**< Flag indicating the device is attached */
> > >
> > > uint64_t reserved_64s[4]; /**< Reserved for future fields */
> > > - void *reserved_ptrs[4]; /**< Reserved for future fields */
> > > + void *reserved_ptrs[3]; /**< Reserved for future fields */
> > > } __rte_cache_aligned;
> >
> >
> > This change has following ABI breakage[1].
> >
> > Could you move ca_enqueue at end of struct to avoid the ABI breakage. Also,
> > please update depreciation notice to move ca_enqueue to above(to align
> > with function pointers) in 21.11 release.
> >
> > [1]
> > [C]'function rte_eventdev* rte_event_pmd_allocate(const char*, int)' at
> > rte_eventdev.c:1467:1 has some indirect sub-type changes:
> > return type changed:
> > in pointed to type 'struct rte_eventdev' at rte_eventdev.h:1411:1:
> > type size hasn't changed
> > 1 data member insertion:
> > 'event_crypto_adapter_enqueue rte_eventdev::ca_enqueue', at offset
> > 512 (in bits) at rte_eventdev.h:1430:1
> > 5 data member changes:
> > 'rte_eventdev_data* rte_eventdev::data' offset changed from 512 to
> > 576 (in bits) (by +64 bits)
> > 'rte_eventdev_ops* rte_eventdev::dev_ops' offset changed from 576 to
> > 640 (in bits) (by +64 bits)
> > 'rte_device* rte_eventdev::dev' offset changed from 640 to 704 (in bits)
> > (by +64 bits)
> > 'uint64_t rte_eventdev::reserved_64s[4]' offset changed from 768 to
> > 832 (in bits) (by +64 bits)
> > type of 'void* rte_eventdev::reserved_ptrs[4]' changed:
> > type name changed from 'void*[4]' to 'void*[3]'
> > array type size changed from 256 to 192
> > array type subrange 1 changed length from 4 to 3
> > and offset changed from 1024 to 1088 (in bits) (by +64 bits)
> >
> >
> Yes my bad, it should be added in the end.
> But abi script will still shout for 'void*[4]' to 'void*[3]' conversion.
> We may need to add something in the devtools/libabigail.abignore
> So that, CI is not broken when reserved fields are changed.
> Otherwise, it does not make sense to introduce reserve fields.
> Can we have something generic for reserved fields?
> Any suggestions?
The ABI check is not aware about the reserved fields.
It needs to be added in libabigail.ignore.
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [PATCH v8 1/3] eventdev: introduce crypto adapter enqueue API
2021-04-14 7:28 4% ` Jerin Jacob Kollanukkaran
@ 2021-04-14 7:58 3% ` Akhil Goyal
2021-04-14 8:18 3% ` Thomas Monjalon
0 siblings, 1 reply; 200+ results
From: Akhil Goyal @ 2021-04-14 7:58 UTC (permalink / raw)
To: Jerin Jacob Kollanukkaran, dev, Ray Kinsella, David Marchand,
NBU-Contact-Thomas Monjalon
Cc: abhinandan.gujjar, hemant.agrawal, nipun.gupta, sachin.saxena,
Anoob Joseph, matan, roy.fan.zhang, g.singh, erik.g.carrillo,
jay.jayatheerthan, Pavan Nikhilesh Bhagavatula, harry.van.haaren,
Shijith Thotton
Hi,
> > +
> > #define RTE_EVENTDEV_NAME_MAX_LEN (64)
> > /**< @internal Max length of name of event PMD */
> >
> > @@ -1423,6 +1427,8 @@ struct rte_eventdev {
> > */
> > event_tx_adapter_enqueue txa_enqueue;
> > /**< Pointer to PMD eth Tx adapter enqueue function. */
> > + event_crypto_adapter_enqueue ca_enqueue;
> > + /**< Pointer to PMD crypto adapter enqueue function. */
> > struct rte_eventdev_data *data;
> > /**< Pointer to device data */
> > struct rte_eventdev_ops *dev_ops;
> > @@ -1435,7 +1441,7 @@ struct rte_eventdev {
> > /**< Flag indicating the device is attached */
> >
> > uint64_t reserved_64s[4]; /**< Reserved for future fields */
> > - void *reserved_ptrs[4]; /**< Reserved for future fields */
> > + void *reserved_ptrs[3]; /**< Reserved for future fields */
> > } __rte_cache_aligned;
>
>
> This change has following ABI breakage[1].
>
> Could you move ca_enqueue at end of struct to avoid the ABI breakage. Also,
> please update depreciation notice to move ca_enqueue to above(to align
> with function pointers) in 21.11 release.
>
> [1]
> [C]'function rte_eventdev* rte_event_pmd_allocate(const char*, int)' at
> rte_eventdev.c:1467:1 has some indirect sub-type changes:
> return type changed:
> in pointed to type 'struct rte_eventdev' at rte_eventdev.h:1411:1:
> type size hasn't changed
> 1 data member insertion:
> 'event_crypto_adapter_enqueue rte_eventdev::ca_enqueue', at offset
> 512 (in bits) at rte_eventdev.h:1430:1
> 5 data member changes:
> 'rte_eventdev_data* rte_eventdev::data' offset changed from 512 to
> 576 (in bits) (by +64 bits)
> 'rte_eventdev_ops* rte_eventdev::dev_ops' offset changed from 576 to
> 640 (in bits) (by +64 bits)
> 'rte_device* rte_eventdev::dev' offset changed from 640 to 704 (in bits)
> (by +64 bits)
> 'uint64_t rte_eventdev::reserved_64s[4]' offset changed from 768 to
> 832 (in bits) (by +64 bits)
> type of 'void* rte_eventdev::reserved_ptrs[4]' changed:
> type name changed from 'void*[4]' to 'void*[3]'
> array type size changed from 256 to 192
> array type subrange 1 changed length from 4 to 3
> and offset changed from 1024 to 1088 (in bits) (by +64 bits)
>
>
Yes my bad, it should be added in the end.
But abi script will still shout for 'void*[4]' to 'void*[3]' conversion.
We may need to add something in the devtools/libabigail.abignore
So that, CI is not broken when reserved fields are changed.
Otherwise, it does not make sense to introduce reserve fields.
Can we have something generic for reserved fields?
Any suggestions?
Regards,
Akhil
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [PATCH v8 1/3] eventdev: introduce crypto adapter enqueue API
@ 2021-04-14 7:28 4% ` Jerin Jacob Kollanukkaran
2021-04-14 7:58 3% ` Akhil Goyal
1 sibling, 1 reply; 200+ results
From: Jerin Jacob Kollanukkaran @ 2021-04-14 7:28 UTC (permalink / raw)
To: Shijith Thotton, dev
Cc: Akhil Goyal, thomas, abhinandan.gujjar, hemant.agrawal,
nipun.gupta, sachin.saxena, Anoob Joseph, matan, roy.fan.zhang,
g.singh, erik.g.carrillo, jay.jayatheerthan,
Pavan Nikhilesh Bhagavatula, harry.van.haaren, Shijith Thotton,
Ray Kinsella, David Marchand
> +
> #define RTE_EVENTDEV_NAME_MAX_LEN (64)
> /**< @internal Max length of name of event PMD */
>
> @@ -1423,6 +1427,8 @@ struct rte_eventdev {
> */
> event_tx_adapter_enqueue txa_enqueue;
> /**< Pointer to PMD eth Tx adapter enqueue function. */
> + event_crypto_adapter_enqueue ca_enqueue;
> + /**< Pointer to PMD crypto adapter enqueue function. */
> struct rte_eventdev_data *data;
> /**< Pointer to device data */
> struct rte_eventdev_ops *dev_ops;
> @@ -1435,7 +1441,7 @@ struct rte_eventdev {
> /**< Flag indicating the device is attached */
>
> uint64_t reserved_64s[4]; /**< Reserved for future fields */
> - void *reserved_ptrs[4]; /**< Reserved for future fields */
> + void *reserved_ptrs[3]; /**< Reserved for future fields */
> } __rte_cache_aligned;
This change has following ABI breakage[1].
Could you move ca_enqueue at end of struct to avoid the ABI breakage. Also, please update depreciation notice to move ca_enqueue to above(to align with function pointers) in 21.11 release.
[1]
[C]'function rte_eventdev* rte_event_pmd_allocate(const char*, int)' at rte_eventdev.c:1467:1 has some indirect sub-type changes:
return type changed:
in pointed to type 'struct rte_eventdev' at rte_eventdev.h:1411:1:
type size hasn't changed
1 data member insertion:
'event_crypto_adapter_enqueue rte_eventdev::ca_enqueue', at offset 512 (in bits) at rte_eventdev.h:1430:1
5 data member changes:
'rte_eventdev_data* rte_eventdev::data' offset changed from 512 to 576 (in bits) (by +64 bits)
'rte_eventdev_ops* rte_eventdev::dev_ops' offset changed from 576 to 640 (in bits) (by +64 bits)
'rte_device* rte_eventdev::dev' offset changed from 640 to 704 (in bits) (by +64 bits)
'uint64_t rte_eventdev::reserved_64s[4]' offset changed from 768 to 832 (in bits) (by +64 bits)
type of 'void* rte_eventdev::reserved_ptrs[4]' changed:
type name changed from 'void*[4]' to 'void*[3]'
array type size changed from 256 to 192
array type subrange 1 changed length from 4 to 3
and offset changed from 1024 to 1088 (in bits) (by +64 bits)
^ permalink raw reply [relevance 4%]
* [dpdk-dev] [PATCH v4] cryptodev: support multiple cipher data-units
2021-04-13 18:19 4% ` [dpdk-dev] [PATCH v3] cryptodev: support multiple cipher data-units Thomas Monjalon
@ 2021-04-13 20:42 10% ` Thomas Monjalon
2021-04-14 18:37 0% ` [dpdk-dev] [EXT] " Akhil Goyal
2021-04-14 20:21 10% ` [dpdk-dev] [PATCH v5] " Thomas Monjalon
2 siblings, 1 reply; 200+ results
From: Thomas Monjalon @ 2021-04-13 20:42 UTC (permalink / raw)
To: dev
Cc: akhil.goyal, arkadiuszx.kusztal, anoobj, Matan Azrad,
Ray Kinsella, Neil Horman, Declan Doherty
From: Matan Azrad <matan@nvidia.com>
In cryptography, a block cipher is a deterministic algorithm operating
on fixed-length groups of bits, called blocks.
A block cipher consists of two paired algorithms, one for encryption
and the other for decryption. Both algorithms accept two inputs:
an input block of size n bits and a key of size k bits; and both yield
an n-bit output block. The decryption algorithm is defined to be the
inverse function of the encryption.
For AES standard the block size is 16 bytes.
For AES in XTS mode, the data to be encrypted\decrypted does not have to
be multiple of 16B size, the unit of data is called data-unit.
The data-unit size can be any size in range [16B, 2^24B], so, in this
case, a data stream is divided into N amount of equal data-units and
must be encrypted\decrypted in the same data-unit resolution.
For ABI compatibility reason, the size is limited to 64K (16-bit field).
The new field dataunit_len is inserted in a struct padding hole,
which is only 2 bytes long in 32-bit build.
It could be moved and extended later during an ABI-breakage window.
The current cryptodev API doesn't allow the user to select a specific
data-unit length supported by the devices.
In addition, there is no definition how the IV is detected per data-unit
when single operation includes more than one data-unit.
That causes applications to use single operation per data-unit even though
all the data is continuous in memory what reduces datapath performance.
Add a new feature flag to support multiple data-unit sizes, called
RTE_CRYPTODEV_FF_CIPHER_MULTIPLE_DATA_UNITS.
Add a new field in cipher capability, called dataunit_set,
where the devices can report the range of the supported data-unit sizes.
Add a new cipher transformation field, called dataunit_len, where the user
can select the data-unit length for all the operations.
All the new fields do not change the size of their structures,
by filling some struct padding holes.
They are added as exceptions in the ABI check file libabigail.abignore.
Using a bitmap to report the supported data-unit sizes capability allows
the devices to report a range simply as same as the user to read it
simply. also, thus sizes are usually common and probably will be shared
among different devices.
Signed-off-by: Matan Azrad <matan@nvidia.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
---
v1:
- Use data-unit term instead of block.
- Update cipher length description in OP.
- Improve descriptions on xform and capability.
- Improve commit log.
v2:
- Fix typo: MULITPLE->MULTIPLE.
- Remain only planned supported sizes for data-unit capability.
v3:
- Improve some comments.
- Fix ABI breakage.
v4:
- Remove RTE_CRYPTO_CIPHER_DATA_UNIT_LEN_1M_BYTES
- Fix dataunit_len placement in padding hole
---
devtools/libabigail.abignore | 12 ++++++++-
doc/guides/cryptodevs/features/default.ini | 1 +
doc/guides/cryptodevs/overview.rst | 3 +++
doc/guides/rel_notes/release_21_05.rst | 6 +++++
lib/librte_cryptodev/rte_crypto_sym.h | 29 ++++++++++++++++++++--
lib/librte_cryptodev/rte_cryptodev.c | 2 ++
lib/librte_cryptodev/rte_cryptodev.h | 15 +++++++++++
7 files changed, 65 insertions(+), 3 deletions(-)
diff --git a/devtools/libabigail.abignore b/devtools/libabigail.abignore
index 6c0b38984e..bce940f2df 100644
--- a/devtools/libabigail.abignore
+++ b/devtools/libabigail.abignore
@@ -19,4 +19,14 @@
; Ignore fields inserted in cacheline boundary of rte_cryptodev
[suppress_type]
name = rte_cryptodev
- has_data_member_inserted_between = {offset_after(attached), end}
\ No newline at end of file
+ has_data_member_inserted_between = {offset_after(attached), end}
+
+; Ignore fields inserted in union boundary of rte_cryptodev_symmetric_capability
+[suppress_type]
+ name = rte_cryptodev_symmetric_capability
+ has_data_member_inserted_between = {offset_after(cipher.iv_size), end}
+
+; Ignore fields inserted in middle padding of rte_crypto_cipher_xform
+[suppress_type]
+ name = rte_crypto_cipher_xform
+ has_data_member_inserted_between = {offset_after(key), offset_of(iv)}
diff --git a/doc/guides/cryptodevs/features/default.ini b/doc/guides/cryptodevs/features/default.ini
index 17b177fc45..978bb30cc1 100644
--- a/doc/guides/cryptodevs/features/default.ini
+++ b/doc/guides/cryptodevs/features/default.ini
@@ -31,6 +31,7 @@ CPU crypto =
Symmetric sessionless =
Non-Byte aligned data =
Sym raw data path API =
+Cipher multiple data units =
;
; Supported crypto algorithms of a default crypto driver.
diff --git a/doc/guides/cryptodevs/overview.rst b/doc/guides/cryptodevs/overview.rst
index e2a1e08ec1..e24e3e1993 100644
--- a/doc/guides/cryptodevs/overview.rst
+++ b/doc/guides/cryptodevs/overview.rst
@@ -46,6 +46,9 @@ Supported Feature Flags
- "Digest encrypted" feature flag means PMD support hash-cipher cases,
where generated digest is appended to and encrypted with the data.
+ - "CIPHER_MULTIPLE_DATA_UNITS" feature flag means PMD support operations
+ on multiple data-units message.
+
Supported Cipher Algorithms
---------------------------
diff --git a/doc/guides/rel_notes/release_21_05.rst b/doc/guides/rel_notes/release_21_05.rst
index 9a666b629d..2dc776c35e 100644
--- a/doc/guides/rel_notes/release_21_05.rst
+++ b/doc/guides/rel_notes/release_21_05.rst
@@ -145,6 +145,12 @@ New Features
* Added support for preferred busy polling.
+* **Added support of multiple data-units in cryptodev API.**
+
+ The cryptodev library has been enhanced to allow operations on multiple
+ data-units for AES-XTS algorithm, the data-unit length should be set in the
+ transformation. A capability for it was added too.
+
* **Updated Mellanox RegEx PMD.**
* Added support for multi-segments mbuf.
diff --git a/lib/librte_cryptodev/rte_crypto_sym.h b/lib/librte_cryptodev/rte_crypto_sym.h
index 9d572ec057..4e365b1eab 100644
--- a/lib/librte_cryptodev/rte_crypto_sym.h
+++ b/lib/librte_cryptodev/rte_crypto_sym.h
@@ -195,6 +195,9 @@ struct rte_crypto_cipher_xform {
enum rte_crypto_cipher_algorithm algo;
/**< Cipher algorithm */
+ RTE_STD_C11
+ union { /* temporary anonymous union for ABI compatibility */
+
struct {
const uint8_t *data; /**< pointer to key data */
uint16_t length; /**< key length in bytes */
@@ -222,6 +225,27 @@ struct rte_crypto_cipher_xform {
* - Each key can be either 128 bits (16 bytes) or 256 bits (32 bytes).
* - Both keys must have the same size.
**/
+
+ RTE_STD_C11
+ struct { /* temporary anonymous struct for ABI compatibility */
+ const uint8_t *_key_data; /* reserved for key.data union */
+ uint16_t _key_length; /* reserved for key.length union */
+ /* next field can fill the padding hole */
+
+ uint16_t dataunit_len;
+ /**< When RTE_CRYPTODEV_FF_CIPHER_MULTIPLE_DATA_UNITS is enabled,
+ * this is the data-unit length of the algorithm,
+ * otherwise or when the value is 0, use the operation length.
+ * The value should be in the range defined by the dataunit_set field
+ * in the cipher capability.
+ *
+ * - For AES-XTS it is the size of data-unit, from IEEE Std 1619-2007.
+ * For-each data-unit in the operation, the tweak (IV) value is
+ * assigned consecutively starting from the operation assigned IV.
+ */
+
+ }; }; /* temporary struct nested in union for ABI compatibility */
+
struct {
uint16_t offset;
/**< Starting point for Initialisation Vector or Counter,
@@ -701,9 +725,10 @@ struct rte_crypto_sym_op {
/**< The message length, in bytes, of the
* source buffer on which the cryptographic
* operation will be computed.
+ * This is also the same as the result length.
* This must be a multiple of the block size
- * if a block cipher is being used. This is
- * also the same as the result length.
+ * or a multiple of data-unit length
+ * as described in xform.
*
* @note
* For SNOW 3G @ RTE_CRYPTO_AUTH_SNOW3G_UEA2,
diff --git a/lib/librte_cryptodev/rte_cryptodev.c b/lib/librte_cryptodev/rte_cryptodev.c
index 40f55a3cd0..e02e001325 100644
--- a/lib/librte_cryptodev/rte_cryptodev.c
+++ b/lib/librte_cryptodev/rte_cryptodev.c
@@ -617,6 +617,8 @@ rte_cryptodev_get_feature_name(uint64_t flag)
return "SYM_SESSIONLESS";
case RTE_CRYPTODEV_FF_NON_BYTE_ALIGNED_DATA:
return "NON_BYTE_ALIGNED_DATA";
+ case RTE_CRYPTODEV_FF_CIPHER_MULTIPLE_DATA_UNITS:
+ return "CIPHER_MULTIPLE_DATA_UNITS";
default:
return NULL;
}
diff --git a/lib/librte_cryptodev/rte_cryptodev.h b/lib/librte_cryptodev/rte_cryptodev.h
index ae34f33f69..2508abd6e1 100644
--- a/lib/librte_cryptodev/rte_cryptodev.h
+++ b/lib/librte_cryptodev/rte_cryptodev.h
@@ -95,6 +95,14 @@ struct rte_crypto_param_range {
*/
};
+/**
+ * Data-unit supported lengths of cipher algorithms.
+ * A bit can represent any set of data-unit sizes
+ * (single size, multiple size, range, etc).
+ */
+#define RTE_CRYPTO_CIPHER_DATA_UNIT_LEN_512_BYTES (1 << 0)
+#define RTE_CRYPTO_CIPHER_DATA_UNIT_LEN_4096_BYTES (1 << 1)
+
/**
* Symmetric Crypto Capability
*/
@@ -127,6 +135,11 @@ struct rte_cryptodev_symmetric_capability {
/**< cipher key size range */
struct rte_crypto_param_range iv_size;
/**< Initialisation vector data size range */
+ uint32_t dataunit_set;
+ /**<
+ * A bitmap for a set of the supported data-unit lengths.
+ * 0 for any length defined in the algorithm standard.
+ */
} cipher;
/**< Symmetric Cipher transform capabilities */
struct {
@@ -461,6 +474,8 @@ rte_cryptodev_asym_get_xform_enum(enum rte_crypto_asym_xform_type *xform_enum,
/**< Support operations on data which is not byte aligned */
#define RTE_CRYPTODEV_FF_SYM_RAW_DP (1ULL << 24)
/**< Support accelerator specific symmetric raw data-path APIs */
+#define RTE_CRYPTODEV_FF_CIPHER_MULTIPLE_DATA_UNITS (1ULL << 25)
+/**< Support operations on multiple data-units message */
/**
* Get the name of a crypto device feature flag
--
2.31.1
^ permalink raw reply [relevance 10%]
* Re: [dpdk-dev] [PATCH v3] cryptodev: support multiple cipher data-units
2021-04-13 18:19 4% ` [dpdk-dev] [PATCH v3] cryptodev: support multiple cipher data-units Thomas Monjalon
@ 2021-04-13 19:48 0% ` Matan Azrad
0 siblings, 0 replies; 200+ results
From: Matan Azrad @ 2021-04-13 19:48 UTC (permalink / raw)
To: NBU-Contact-Thomas Monjalon, dev
Cc: akhil.goyal, arkadiuszx.kusztal, anoobj, Ray Kinsella,
Neil Horman, Declan Doherty
Hi
Small comment
From: Thomas Monjalon
> From: Matan Azrad <matan@nvidia.com>
>
> In cryptography, a block cipher is a deterministic algorithm operating on fixed-
> length groups of bits, called blocks.
>
> A block cipher consists of two paired algorithms, one for encryption and the
> other for decryption. Both algorithms accept two inputs:
> an input block of size n bits and a key of size k bits; and both yield an n-bit
> output block. The decryption algorithm is defined to be the inverse function of
> the encryption.
>
> For AES standard the block size is 16 bytes.
> For AES in XTS mode, the data to be encrypted\decrypted does not have to be
> multiple of 16B size, the unit of data is called data-unit.
> The data-unit size can be any size in range [16B, 2^24B], so, in this case, a data
> stream is divided into N amount of equal data-units and must be
> encrypted\decrypted in the same data-unit resolution.
>
> For ABI compatibility reason, the size is limited to 64K (16-bit field).
> The new field dataunit_len is inserted in a struct padding hole, which is only 2
> bytes long in 32-bit build.
> It could be extended later during an ABI-breakage window.
>
> The current cryptodev API doesn't allow the user to select a specific data-unit
> length supported by the devices.
> In addition, there is no definition how the IV is detected per data-unit when
> single operation includes more than one data-unit.
>
> That causes applications to use single operation per data-unit even though all
> the data is continuous in memory what reduces datapath performance.
>
> Add a new feature flag to support multiple data-unit sizes, called
> RTE_CRYPTODEV_FF_CIPHER_MULTIPLE_DATA_UNITS.
> Add a new field in cipher capability, called dataunit_set, where the devices can
> report the range of the supported data-unit sizes.
> Add a new cipher transformation field, called dataunit_len, where the user can
> select the data-unit length for all the operations.
>
> All the new fields do not change the size of their structures, by filling some
> struct padding holes.
> They are added as exceptions in the ABI check file libabigail.abignore.
>
> Using a bitmap to report the supported data-unit sizes capability allows the
> devices to report a range simply as same as the user to read it simply. also,
> thus sizes are usually common and probably will be shared among different
> devices.
>
> Signed-off-by: Matan Azrad <matan@nvidia.com>
> Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
> ---
> v1:
> - Use data-unit term instead of block.
> - Update cipher length description in OP.
> - Improve descriptions on xform and capability.
> - Improve commit log.
>
> v2:
> - Fix typo: MULITPLE->MULTIPLE.
> - Remain only planned supported sizes for data-unit capability.
>
> v3:
> - Improve some comments.
> - Fix ABI breakage.
>
> Note: the suppression rules work in libabigail for this patch, but not sure it is
> really considering the offsets defined in the file.
>
> ---
> devtools/libabigail.abignore | 12 +++++++++++-
> doc/guides/cryptodevs/features/default.ini | 1 +
> doc/guides/cryptodevs/overview.rst | 3 +++
> doc/guides/rel_notes/release_21_05.rst | 6 ++++++
> lib/librte_cryptodev/rte_crypto_sym.h | 18 ++++++++++++++++--
> lib/librte_cryptodev/rte_cryptodev.c | 2 ++
> lib/librte_cryptodev/rte_cryptodev.h | 16 ++++++++++++++++
> 7 files changed, 55 insertions(+), 3 deletions(-)
>
> diff --git a/devtools/libabigail.abignore b/devtools/libabigail.abignore index
> 6c0b38984e..bce940f2df 100644
> --- a/devtools/libabigail.abignore
> +++ b/devtools/libabigail.abignore
> @@ -19,4 +19,14 @@
> ; Ignore fields inserted in cacheline boundary of rte_cryptodev [suppress_type]
> name = rte_cryptodev
> - has_data_member_inserted_between = {offset_after(attached), end}
> \ No newline at end of file
> + has_data_member_inserted_between = {offset_after(attached),
> + end}
> +
> +; Ignore fields inserted in union boundary of
> +rte_cryptodev_symmetric_capability
> +[suppress_type]
> + name = rte_cryptodev_symmetric_capability
> + has_data_member_inserted_between =
> +{offset_after(cipher.iv_size), end}
> +
> +; Ignore fields inserted in middle padding of rte_crypto_cipher_xform
> +[suppress_type]
> + name = rte_crypto_cipher_xform
> + has_data_member_inserted_between = {offset_after(key),
> +offset_of(iv)}
> diff --git a/doc/guides/cryptodevs/features/default.ini
> b/doc/guides/cryptodevs/features/default.ini
> index 17b177fc45..978bb30cc1 100644
> --- a/doc/guides/cryptodevs/features/default.ini
> +++ b/doc/guides/cryptodevs/features/default.ini
> @@ -31,6 +31,7 @@ CPU crypto =
> Symmetric sessionless =
> Non-Byte aligned data =
> Sym raw data path API =
> +Cipher multiple data units =
>
> ;
> ; Supported crypto algorithms of a default crypto driver.
> diff --git a/doc/guides/cryptodevs/overview.rst
> b/doc/guides/cryptodevs/overview.rst
> index e2a1e08ec1..e24e3e1993 100644
> --- a/doc/guides/cryptodevs/overview.rst
> +++ b/doc/guides/cryptodevs/overview.rst
> @@ -46,6 +46,9 @@ Supported Feature Flags
> - "Digest encrypted" feature flag means PMD support hash-cipher cases,
> where generated digest is appended to and encrypted with the data.
>
> + - "CIPHER_MULTIPLE_DATA_UNITS" feature flag means PMD support
> operations
> + on multiple data-units message.
> +
>
> Supported Cipher Algorithms
> ---------------------------
> diff --git a/doc/guides/rel_notes/release_21_05.rst
> b/doc/guides/rel_notes/release_21_05.rst
> index 9a666b629d..2dc776c35e 100644
> --- a/doc/guides/rel_notes/release_21_05.rst
> +++ b/doc/guides/rel_notes/release_21_05.rst
> @@ -145,6 +145,12 @@ New Features
>
> * Added support for preferred busy polling.
>
> +* **Added support of multiple data-units in cryptodev API.**
> +
> + The cryptodev library has been enhanced to allow operations on
> + multiple data-units for AES-XTS algorithm, the data-unit length
> + should be set in the transformation. A capability for it was added too.
> +
> * **Updated Mellanox RegEx PMD.**
>
> * Added support for multi-segments mbuf.
> diff --git a/lib/librte_cryptodev/rte_crypto_sym.h
> b/lib/librte_cryptodev/rte_crypto_sym.h
> index 9d572ec057..ec45714fc3 100644
> --- a/lib/librte_cryptodev/rte_crypto_sym.h
> +++ b/lib/librte_cryptodev/rte_crypto_sym.h
> @@ -222,6 +222,19 @@ struct rte_crypto_cipher_xform {
> * - Each key can be either 128 bits (16 bytes) or 256 bits (32 bytes).
> * - Both keys must have the same size.
> **/
> +
> + uint16_t dataunit_len;
> + /**< When RTE_CRYPTODEV_FF_CIPHER_MULTIPLE_DATA_UNITS is
> enabled,
> + * this is the data-unit length of the algorithm,
> + * otherwise or when the value is 0, use the operation length.
> + * The value should be in the range defined by the dataunit_set field
> + * in the cipher capability.
> + *
> + * - For AES-XTS it is the size of data-unit, from IEEE Std 1619-2007.
> + * For-each data-unit in the operation, the tweak (IV) value is
> + * assigned consecutively starting from the operation assigned IV.
> + */
> +
> struct {
> uint16_t offset;
> /**< Starting point for Initialisation Vector or Counter, @@ -701,9
> +714,10 @@ struct rte_crypto_sym_op {
> /**< The message length, in bytes, of the
> * source buffer on which the cryptographic
> * operation will be computed.
> + * This is also the same as the result length.
> * This must be a multiple of the block size
> - * if a block cipher is being used. This is
> - * also the same as the result length.
> + * or a multiple of data-unit length
> + * as described in xform.
> *
> * @note
> * For SNOW 3G @
> RTE_CRYPTO_AUTH_SNOW3G_UEA2, diff --git
> a/lib/librte_cryptodev/rte_cryptodev.c b/lib/librte_cryptodev/rte_cryptodev.c
> index 40f55a3cd0..e02e001325 100644
> --- a/lib/librte_cryptodev/rte_cryptodev.c
> +++ b/lib/librte_cryptodev/rte_cryptodev.c
> @@ -617,6 +617,8 @@ rte_cryptodev_get_feature_name(uint64_t flag)
> return "SYM_SESSIONLESS";
> case RTE_CRYPTODEV_FF_NON_BYTE_ALIGNED_DATA:
> return "NON_BYTE_ALIGNED_DATA";
> + case RTE_CRYPTODEV_FF_CIPHER_MULTIPLE_DATA_UNITS:
> + return "CIPHER_MULTIPLE_DATA_UNITS";
> default:
> return NULL;
> }
> diff --git a/lib/librte_cryptodev/rte_cryptodev.h
> b/lib/librte_cryptodev/rte_cryptodev.h
> index ae34f33f69..f6972a7d19 100644
> --- a/lib/librte_cryptodev/rte_cryptodev.h
> +++ b/lib/librte_cryptodev/rte_cryptodev.h
> @@ -95,6 +95,15 @@ struct rte_crypto_param_range {
> */
> };
>
> +/**
> + * Data-unit supported lengths of cipher algorithms.
> + * A bit can represent any set of data-unit sizes
> + * (single size, multiple size, range, etc).
> + */
> +#define RTE_CRYPTO_CIPHER_DATA_UNIT_LEN_512_BYTES (1 << 0)
> +#define RTE_CRYPTO_CIPHER_DATA_UNIT_LEN_4096_BYTES (1 << 1)
> +#define RTE_CRYPTO_CIPHER_DATA_UNIT_LEN_1M_BYTES (1 << 2)
1M is irrelevant since datauinit_len is only 16 bits now.
> +
> /**
> * Symmetric Crypto Capability
> */
> @@ -127,6 +136,11 @@ struct rte_cryptodev_symmetric_capability {
> /**< cipher key size range */
> struct rte_crypto_param_range iv_size;
> /**< Initialisation vector data size range */
> + uint32_t dataunit_set;
> + /**<
> + * A bitmap for a set of the supported data-unit lengths.
> + * 0 for any length defined in the algorithm standard.
> + */
> } cipher;
> /**< Symmetric Cipher transform capabilities */
> struct {
> @@ -461,6 +475,8 @@ rte_cryptodev_asym_get_xform_enum(enum
> rte_crypto_asym_xform_type *xform_enum, /**< Support operations on data
> which is not byte aligned */
> #define RTE_CRYPTODEV_FF_SYM_RAW_DP (1ULL << 24)
> /**< Support accelerator specific symmetric raw data-path APIs */
> +#define RTE_CRYPTODEV_FF_CIPHER_MULTIPLE_DATA_UNITS (1ULL << 25)
> +/**< Support operations on multiple data-units message */
>
> /**
> * Get the name of a crypto device feature flag
> --
> 2.31.1
^ permalink raw reply [relevance 0%]
* [dpdk-dev] [PATCH v3] cryptodev: support multiple cipher data-units
@ 2021-04-13 18:19 4% ` Thomas Monjalon
2021-04-13 19:48 0% ` Matan Azrad
2021-04-13 20:42 10% ` [dpdk-dev] [PATCH v4] " Thomas Monjalon
2021-04-14 20:21 10% ` [dpdk-dev] [PATCH v5] " Thomas Monjalon
2 siblings, 1 reply; 200+ results
From: Thomas Monjalon @ 2021-04-13 18:19 UTC (permalink / raw)
To: dev
Cc: akhil.goyal, arkadiuszx.kusztal, anoobj, Matan Azrad,
Ray Kinsella, Neil Horman, Declan Doherty
From: Matan Azrad <matan@nvidia.com>
In cryptography, a block cipher is a deterministic algorithm operating
on fixed-length groups of bits, called blocks.
A block cipher consists of two paired algorithms, one for encryption
and the other for decryption. Both algorithms accept two inputs:
an input block of size n bits and a key of size k bits; and both yield
an n-bit output block. The decryption algorithm is defined to be the
inverse function of the encryption.
For AES standard the block size is 16 bytes.
For AES in XTS mode, the data to be encrypted\decrypted does not have to
be multiple of 16B size, the unit of data is called data-unit.
The data-unit size can be any size in range [16B, 2^24B], so, in this
case, a data stream is divided into N amount of equal data-units and
must be encrypted\decrypted in the same data-unit resolution.
For ABI compatibility reason, the size is limited to 64K (16-bit field).
The new field dataunit_len is inserted in a struct padding hole,
which is only 2 bytes long in 32-bit build.
It could be extended later during an ABI-breakage window.
The current cryptodev API doesn't allow the user to select a specific
data-unit length supported by the devices.
In addition, there is no definition how the IV is detected per data-unit
when single operation includes more than one data-unit.
That causes applications to use single operation per data-unit even though
all the data is continuous in memory what reduces datapath performance.
Add a new feature flag to support multiple data-unit sizes, called
RTE_CRYPTODEV_FF_CIPHER_MULTIPLE_DATA_UNITS.
Add a new field in cipher capability, called dataunit_set,
where the devices can report the range of the supported data-unit sizes.
Add a new cipher transformation field, called dataunit_len, where the user
can select the data-unit length for all the operations.
All the new fields do not change the size of their structures,
by filling some struct padding holes.
They are added as exceptions in the ABI check file libabigail.abignore.
Using a bitmap to report the supported data-unit sizes capability allows
the devices to report a range simply as same as the user to read it
simply. also, thus sizes are usually common and probably will be shared
among different devices.
Signed-off-by: Matan Azrad <matan@nvidia.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
---
v1:
- Use data-unit term instead of block.
- Update cipher length description in OP.
- Improve descriptions on xform and capability.
- Improve commit log.
v2:
- Fix typo: MULITPLE->MULTIPLE.
- Remain only planned supported sizes for data-unit capability.
v3:
- Improve some comments.
- Fix ABI breakage.
Note: the suppression rules work in libabigail for this patch,
but not sure it is really considering the offsets defined in the file.
---
devtools/libabigail.abignore | 12 +++++++++++-
doc/guides/cryptodevs/features/default.ini | 1 +
doc/guides/cryptodevs/overview.rst | 3 +++
doc/guides/rel_notes/release_21_05.rst | 6 ++++++
lib/librte_cryptodev/rte_crypto_sym.h | 18 ++++++++++++++++--
lib/librte_cryptodev/rte_cryptodev.c | 2 ++
lib/librte_cryptodev/rte_cryptodev.h | 16 ++++++++++++++++
7 files changed, 55 insertions(+), 3 deletions(-)
diff --git a/devtools/libabigail.abignore b/devtools/libabigail.abignore
index 6c0b38984e..bce940f2df 100644
--- a/devtools/libabigail.abignore
+++ b/devtools/libabigail.abignore
@@ -19,4 +19,14 @@
; Ignore fields inserted in cacheline boundary of rte_cryptodev
[suppress_type]
name = rte_cryptodev
- has_data_member_inserted_between = {offset_after(attached), end}
\ No newline at end of file
+ has_data_member_inserted_between = {offset_after(attached), end}
+
+; Ignore fields inserted in union boundary of rte_cryptodev_symmetric_capability
+[suppress_type]
+ name = rte_cryptodev_symmetric_capability
+ has_data_member_inserted_between = {offset_after(cipher.iv_size), end}
+
+; Ignore fields inserted in middle padding of rte_crypto_cipher_xform
+[suppress_type]
+ name = rte_crypto_cipher_xform
+ has_data_member_inserted_between = {offset_after(key), offset_of(iv)}
diff --git a/doc/guides/cryptodevs/features/default.ini b/doc/guides/cryptodevs/features/default.ini
index 17b177fc45..978bb30cc1 100644
--- a/doc/guides/cryptodevs/features/default.ini
+++ b/doc/guides/cryptodevs/features/default.ini
@@ -31,6 +31,7 @@ CPU crypto =
Symmetric sessionless =
Non-Byte aligned data =
Sym raw data path API =
+Cipher multiple data units =
;
; Supported crypto algorithms of a default crypto driver.
diff --git a/doc/guides/cryptodevs/overview.rst b/doc/guides/cryptodevs/overview.rst
index e2a1e08ec1..e24e3e1993 100644
--- a/doc/guides/cryptodevs/overview.rst
+++ b/doc/guides/cryptodevs/overview.rst
@@ -46,6 +46,9 @@ Supported Feature Flags
- "Digest encrypted" feature flag means PMD support hash-cipher cases,
where generated digest is appended to and encrypted with the data.
+ - "CIPHER_MULTIPLE_DATA_UNITS" feature flag means PMD support operations
+ on multiple data-units message.
+
Supported Cipher Algorithms
---------------------------
diff --git a/doc/guides/rel_notes/release_21_05.rst b/doc/guides/rel_notes/release_21_05.rst
index 9a666b629d..2dc776c35e 100644
--- a/doc/guides/rel_notes/release_21_05.rst
+++ b/doc/guides/rel_notes/release_21_05.rst
@@ -145,6 +145,12 @@ New Features
* Added support for preferred busy polling.
+* **Added support of multiple data-units in cryptodev API.**
+
+ The cryptodev library has been enhanced to allow operations on multiple
+ data-units for AES-XTS algorithm, the data-unit length should be set in the
+ transformation. A capability for it was added too.
+
* **Updated Mellanox RegEx PMD.**
* Added support for multi-segments mbuf.
diff --git a/lib/librte_cryptodev/rte_crypto_sym.h b/lib/librte_cryptodev/rte_crypto_sym.h
index 9d572ec057..ec45714fc3 100644
--- a/lib/librte_cryptodev/rte_crypto_sym.h
+++ b/lib/librte_cryptodev/rte_crypto_sym.h
@@ -222,6 +222,19 @@ struct rte_crypto_cipher_xform {
* - Each key can be either 128 bits (16 bytes) or 256 bits (32 bytes).
* - Both keys must have the same size.
**/
+
+ uint16_t dataunit_len;
+ /**< When RTE_CRYPTODEV_FF_CIPHER_MULTIPLE_DATA_UNITS is enabled,
+ * this is the data-unit length of the algorithm,
+ * otherwise or when the value is 0, use the operation length.
+ * The value should be in the range defined by the dataunit_set field
+ * in the cipher capability.
+ *
+ * - For AES-XTS it is the size of data-unit, from IEEE Std 1619-2007.
+ * For-each data-unit in the operation, the tweak (IV) value is
+ * assigned consecutively starting from the operation assigned IV.
+ */
+
struct {
uint16_t offset;
/**< Starting point for Initialisation Vector or Counter,
@@ -701,9 +714,10 @@ struct rte_crypto_sym_op {
/**< The message length, in bytes, of the
* source buffer on which the cryptographic
* operation will be computed.
+ * This is also the same as the result length.
* This must be a multiple of the block size
- * if a block cipher is being used. This is
- * also the same as the result length.
+ * or a multiple of data-unit length
+ * as described in xform.
*
* @note
* For SNOW 3G @ RTE_CRYPTO_AUTH_SNOW3G_UEA2,
diff --git a/lib/librte_cryptodev/rte_cryptodev.c b/lib/librte_cryptodev/rte_cryptodev.c
index 40f55a3cd0..e02e001325 100644
--- a/lib/librte_cryptodev/rte_cryptodev.c
+++ b/lib/librte_cryptodev/rte_cryptodev.c
@@ -617,6 +617,8 @@ rte_cryptodev_get_feature_name(uint64_t flag)
return "SYM_SESSIONLESS";
case RTE_CRYPTODEV_FF_NON_BYTE_ALIGNED_DATA:
return "NON_BYTE_ALIGNED_DATA";
+ case RTE_CRYPTODEV_FF_CIPHER_MULTIPLE_DATA_UNITS:
+ return "CIPHER_MULTIPLE_DATA_UNITS";
default:
return NULL;
}
diff --git a/lib/librte_cryptodev/rte_cryptodev.h b/lib/librte_cryptodev/rte_cryptodev.h
index ae34f33f69..f6972a7d19 100644
--- a/lib/librte_cryptodev/rte_cryptodev.h
+++ b/lib/librte_cryptodev/rte_cryptodev.h
@@ -95,6 +95,15 @@ struct rte_crypto_param_range {
*/
};
+/**
+ * Data-unit supported lengths of cipher algorithms.
+ * A bit can represent any set of data-unit sizes
+ * (single size, multiple size, range, etc).
+ */
+#define RTE_CRYPTO_CIPHER_DATA_UNIT_LEN_512_BYTES (1 << 0)
+#define RTE_CRYPTO_CIPHER_DATA_UNIT_LEN_4096_BYTES (1 << 1)
+#define RTE_CRYPTO_CIPHER_DATA_UNIT_LEN_1M_BYTES (1 << 2)
+
/**
* Symmetric Crypto Capability
*/
@@ -127,6 +136,11 @@ struct rte_cryptodev_symmetric_capability {
/**< cipher key size range */
struct rte_crypto_param_range iv_size;
/**< Initialisation vector data size range */
+ uint32_t dataunit_set;
+ /**<
+ * A bitmap for a set of the supported data-unit lengths.
+ * 0 for any length defined in the algorithm standard.
+ */
} cipher;
/**< Symmetric Cipher transform capabilities */
struct {
@@ -461,6 +475,8 @@ rte_cryptodev_asym_get_xform_enum(enum rte_crypto_asym_xform_type *xform_enum,
/**< Support operations on data which is not byte aligned */
#define RTE_CRYPTODEV_FF_SYM_RAW_DP (1ULL << 24)
/**< Support accelerator specific symmetric raw data-path APIs */
+#define RTE_CRYPTODEV_FF_CIPHER_MULTIPLE_DATA_UNITS (1ULL << 25)
+/**< Support operations on multiple data-units message */
/**
* Get the name of a crypto device feature flag
--
2.31.1
^ permalink raw reply [relevance 4%]
* Re: [dpdk-dev] [PATCH] devtools: skip removed DLB driver in ABI check
2021-04-13 16:44 4% ` Thomas Monjalon
@ 2021-04-13 16:45 4% ` Kinsella, Ray
0 siblings, 0 replies; 200+ results
From: Kinsella, Ray @ 2021-04-13 16:45 UTC (permalink / raw)
To: Thomas Monjalon
Cc: dev, jerinj, David Marchand, Neil Horman, Timothy McDaniel
On 13/04/2021 17:44, Thomas Monjalon wrote:
> 13/04/2021 18:09, Kinsella, Ray:
>> On 13/04/2021 09:45, Thomas Monjalon wrote:
>>> The eventdev driver DLB was removed in DPDK 21.05,
>>> breaking the ABI check.
>>> The exception was agreed so we just need to skip this check.
>>>
>>> Note: complete removal of a driver cannot be ignored
>>> in devtools/libabigail.abignore, so the script must be patched.
>>>
>>> Fixes: 698fa829415d ("event/dlb: remove driver")
>>>
>>> Reported-by: David Marchand <david.marchand@redhat.com>
>>> Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
>>> ---
>>> This should have been done as part of removing the driver.
>>> The CI is currently broken, so it should be merged today.
>>> ---
>>> devtools/check-abi.sh | 4 ++++
>>> 1 file changed, 4 insertions(+)
>>>
>>> diff --git a/devtools/check-abi.sh b/devtools/check-abi.sh
>>> index 9835e346da..ca523eb94c 100755
>>> --- a/devtools/check-abi.sh
>>> +++ b/devtools/check-abi.sh
>>> @@ -44,6 +44,10 @@ for dump in $(find $refdir -name "*.dump"); do
>>> echo "Skipped glue library $name."
>>> continue
>>> fi
>>> + if grep -qE "\<soname='librte_event_dlb\.so" $dump; then
>>> + echo "Skipped removed driver $name."
>>> + continue
>>> + fi
>>
>> So this is brute force fix - we can anticipate this problem happening again.
>> Perhaps a 2nd file called devtools/libabigail.soignore, if agreed I will submit a patch?
>
> Yes indeed we could have a file for this.
> Maybe we could have a dedicated section [suppress_lib]
> in the existing file if libabigail is OK with unknown sections?
>
That would be tidier - I will take a look.
^ permalink raw reply [relevance 4%]
* Re: [dpdk-dev] [PATCH] devtools: skip removed DLB driver in ABI check
2021-04-13 16:09 4% ` Kinsella, Ray
@ 2021-04-13 16:44 4% ` Thomas Monjalon
2021-04-13 16:45 4% ` Kinsella, Ray
0 siblings, 1 reply; 200+ results
From: Thomas Monjalon @ 2021-04-13 16:44 UTC (permalink / raw)
To: Kinsella, Ray; +Cc: dev, jerinj, David Marchand, Neil Horman, Timothy McDaniel
13/04/2021 18:09, Kinsella, Ray:
> On 13/04/2021 09:45, Thomas Monjalon wrote:
> > The eventdev driver DLB was removed in DPDK 21.05,
> > breaking the ABI check.
> > The exception was agreed so we just need to skip this check.
> >
> > Note: complete removal of a driver cannot be ignored
> > in devtools/libabigail.abignore, so the script must be patched.
> >
> > Fixes: 698fa829415d ("event/dlb: remove driver")
> >
> > Reported-by: David Marchand <david.marchand@redhat.com>
> > Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
> > ---
> > This should have been done as part of removing the driver.
> > The CI is currently broken, so it should be merged today.
> > ---
> > devtools/check-abi.sh | 4 ++++
> > 1 file changed, 4 insertions(+)
> >
> > diff --git a/devtools/check-abi.sh b/devtools/check-abi.sh
> > index 9835e346da..ca523eb94c 100755
> > --- a/devtools/check-abi.sh
> > +++ b/devtools/check-abi.sh
> > @@ -44,6 +44,10 @@ for dump in $(find $refdir -name "*.dump"); do
> > echo "Skipped glue library $name."
> > continue
> > fi
> > + if grep -qE "\<soname='librte_event_dlb\.so" $dump; then
> > + echo "Skipped removed driver $name."
> > + continue
> > + fi
>
> So this is brute force fix - we can anticipate this problem happening again.
> Perhaps a 2nd file called devtools/libabigail.soignore, if agreed I will submit a patch?
Yes indeed we could have a file for this.
Maybe we could have a dedicated section [suppress_lib]
in the existing file if libabigail is OK with unknown sections?
^ permalink raw reply [relevance 4%]
* Re: [dpdk-dev] [EXT] [PATCH v2] cryptodev: support multiple cipher data-units
@ 2021-04-13 16:39 3% ` Thomas Monjalon
0 siblings, 0 replies; 200+ results
From: Thomas Monjalon @ 2021-04-13 16:39 UTC (permalink / raw)
To: Matan Azrad, Ray Kinsella, Declan Doherty, Akhil Goyal
Cc: dev, Somalapuram Amaranath, Ruifeng Wang, Ajit Khaparde,
Anoob Joseph, Fan Zhang, John Griffin, Pablo de Lara,
Michael Shamis, Nagadheeraj Rottela, Ankur Dwivedi,
Gagandeep Singh, Jay Zhou, ArkadiuszX Kusztal, sashakot, oren,
Shiri Kuzin, david.marchand
13/04/2021 14:02, Akhil Goyal:
> > All the new fields do not change the size of their structures.
>
> Please check that the CI is failing. I see that ignore exception is present in
> devtools/libabigail.abignore For rte_cryptodev. But not sure why this is still
> failing. Can you check?
There are 2 new fields:
- rte_cryptodev_symmetric_capability.cipher.dataunit_set
- rte_crypto_cipher_xform.dataunit_len
This is how the struct sizes are affected (before / after):
struct \ arch | 32-bit | 64-bit |
-----------------------------------|---------|---------|
rte_cryptodev_symmetric_capability | 36 / 36 | 36 / 36 |
rte_crypto_cipher_xform | 20 / 24 | 32 / 32 |
There is no change in rte_cryptodev_symmetric_capability because
the field is added in a light branch of the union.
The 64-bit size of rte_crypto_cipher_xform is unchanged (32)
because there were 4 padding bytes at the end (28 + 4).
But the 32-bit version has not such padding at the end,
so there is a breakage.
The only hole in 32-bit rte_crypto_cipher_xform is
2 bytes between key and iv.
Can we define dataunit_len as uint16_t?
The other side to check when playing with the ABI
is the default value of the holes for the new field.
The driver must work properly in case the application
did not explicitly set the new fields.
In general it means the compatible API should have memset(0).
In this case, it seems the new fields will be used only
in a new mlx5 driver, so it should be OK for now.
But usage of the new fields in an existing driver must
be checked carefully during the compatibility period.
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [PATCH] devtools: skip removed DLB driver in ABI check
2021-04-13 8:45 15% ` [dpdk-dev] [PATCH] devtools: skip removed DLB driver in ABI check Thomas Monjalon
2021-04-13 9:15 4% ` David Marchand
@ 2021-04-13 16:09 4% ` Kinsella, Ray
2021-04-13 16:44 4% ` Thomas Monjalon
1 sibling, 1 reply; 200+ results
From: Kinsella, Ray @ 2021-04-13 16:09 UTC (permalink / raw)
To: Thomas Monjalon, dev
Cc: jerinj, David Marchand, Neil Horman, Timothy McDaniel
On 13/04/2021 09:45, Thomas Monjalon wrote:
> The eventdev driver DLB was removed in DPDK 21.05,
> breaking the ABI check.
> The exception was agreed so we just need to skip this check.
>
> Note: complete removal of a driver cannot be ignored
> in devtools/libabigail.abignore, so the script must be patched.
>
> Fixes: 698fa829415d ("event/dlb: remove driver")
>
> Reported-by: David Marchand <david.marchand@redhat.com>
> Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
> ---
> This should have been done as part of removing the driver.
> The CI is currently broken, so it should be merged today.
> ---
> devtools/check-abi.sh | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/devtools/check-abi.sh b/devtools/check-abi.sh
> index 9835e346da..ca523eb94c 100755
> --- a/devtools/check-abi.sh
> +++ b/devtools/check-abi.sh
> @@ -44,6 +44,10 @@ for dump in $(find $refdir -name "*.dump"); do
> echo "Skipped glue library $name."
> continue
> fi
> + if grep -qE "\<soname='librte_event_dlb\.so" $dump; then
> + echo "Skipped removed driver $name."
> + continue
> + fi
So this is brute force fix - we can anticipate this problem happening again.
Perhaps a 2nd file called devtools/libabigail.soignore, if agreed I will submit a patch?
^ permalink raw reply [relevance 4%]
* Re: [dpdk-dev] [PATCH v2 1/4] ethdev: introduce indirect action APIs
2021-04-13 1:26 0% ` Bing Zhao
@ 2021-04-13 14:00 0% ` Ori Kam
0 siblings, 0 replies; 200+ results
From: Ori Kam @ 2021-04-13 14:00 UTC (permalink / raw)
To: Bing Zhao, Ferruh Yigit, NBU-Contact-Thomas Monjalon,
andrew.rybchenko, Matan Azrad, Slava Ovsiienko
Cc: dev, ajit.khaparde, Gregory Etelson, Andrey Vesnovaty
> -----Original Message-----
> From: Bing Zhao <bingz@nvidia.com>
> Sent: Tuesday, April 13, 2021 4:27 AM
> Subject: RE: [PATCH v2 1/4] ethdev: introduce indirect action APIs
>
> Hi Ferruh,
>
> > -----Original Message-----
> > From: Ferruh Yigit <ferruh.yigit@intel.com>
> > Sent: Tuesday, April 13, 2021 3:42 AM
> > To: Bing Zhao <bingz@nvidia.com>; Ori Kam <orika@nvidia.com>; NBU-
> > Contact-Thomas Monjalon <thomas@monjalon.net>;
> > andrew.rybchenko@oktetlabs.ru; Matan Azrad <matan@nvidia.com>; Slava
> > Ovsiienko <viacheslavo@nvidia.com>
> > Cc: dev@dpdk.org; ajit.khaparde@broadcom.com; Gregory Etelson
> > <getelson@nvidia.com>; Andrey Vesnovaty <andreyv@nvidia.com>
> > Subject: Re: [PATCH v2 1/4] ethdev: introduce indirect action APIs
> >
> > External email: Use caution opening links or attachments
> >
> >
> > On 4/10/2021 3:03 PM, Bing Zhao wrote:
> > > Right now, rte_flow_shared_action_* APIs are used for some shared
> > > actions, like RSS, count. The shared action should be created
> > before
> > > using it inside a flow. These shared actions sometimes are not
> > really
> > > shared but just some indirect actions decoupled from a flow.
> > >
> > > The new functions rte_flow_action_handle_* are added to replace
> > the
> > > current shared functions rte_flow_shared_action_*.
> > >
> > > There are two types of flow actions:
> > > 1. the direct (normal) actions that could be created and stored
> > > within a flow rule. Such action is tied to its flow rule and
> > > cannot be reused.
> > > 2. the indirect action, in the past, named shared_action. It is
> > > created from a direct actioni, like count or rss, and then
> > used
> > > in the flow rules with an object handle. The PMD will take
> > care
> > > of the retrieve from indirect action to the direct action
> > > when it is referenced.
> > >
> > > The indirect action is accessed (update / query) w/o any flow rule,
> > > just via the action object handle. For example, when querying or
> > > resetting a counter, it could be done out of any flow using this
> > > counter, but only the handle of the counter action object is
> > required.
> > > The indirect action object could be shared by different flows or
> > used
> > > by a single flow, depending on the direct action type and the
> > > real-life requirements.
> > > The handle of an indirect action object is opaque and defined in
> > each
> > > driver and possibly different per direct action type.
> > >
> > > The old name "shared" is improper in a sense and should be
> > replaced.
> > >
> > > All the command lines in testpmd application with "shared_action*"
> > > are replaced with "indirect_action*".
> > >
> > > The parameter of "update" interface is also changed. A general
> > pointer
> > > will replace the rte_flow_action struct pointer due to the
> > > facts:
> > > 1. Some action may not support fields updating. In the example of
> > a
> > > counter, the only "update" supported should be the reset. So
> > > passing a rte_flow_action struct pointer is meaningless and
> > > there is even no such corresponding action struct. What's more,
> > > if more than one operations should be supported, for some
> > other
> > > action, such pointer parameter may not meet the need.
> > > 2. Some action may need conditional or partial update, the current
> > > parameter will not provide the ability to indicate which
> > part(s)
> > > to update.
> > > For different types of indirect action objects, the pointer
> > could
> > > either be the same of rte_flow_action* struct - in order not
> > to
> > > break the current driver implementation, or some wrapper
> > > structures with bits as masks to indicate which part to be
> > > updated, depending on real needs of the corresponding direct
> > > action. For different direct actions, the structures of
> > indirect
> > > action objects updating will be different.
> > >
> > > All the underlayer PMD callbacks will be moved to these new APIs.
> > >
> > > The RTE_FLOW_ACTION_TYPE_SHARED is kept for now in order not to
> > break
> > > the ABI. All the implementations are changed by using
> > > RTE_FLOW_ACTION_TYPE_INDIRECT.
> > >
> > > Signed-off-by: Bing Zhao <bingz@nvidia.com>
> > > ---
> > > doc/guides/rel_notes/release_21_05.rst | 3 +
> > > lib/librte_ethdev/rte_flow.c | 56 ++++++++--------
> > > lib/librte_ethdev/rte_flow.h | 118
> > +++++++++++++++++++--------------
> > > lib/librte_ethdev/rte_flow_driver.h | 26 ++++----
> > > lib/librte_ethdev/version.map | 8 +--
> >
> > Isn't there any documentation to update with this change?
>
> Do you mean the release note? I only updated the 20_01 release note part.
>
You also need to update the prog/guid/rte_flow.rst
> >
> > If the shared action API is not documented at all, can you please
> > add documentation for the action handle API?
>
> In the testpmd usage guide, I found some description and update it together
> with the testpmd update.
> I will check if there is another place to update or add.
>
> Thanks
>
> BR. Bing
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [pull-request] dpdk-next-net-eventdev - 21.05 - PRE-RC1
2021-04-13 7:15 5% ` David Marchand
` (2 preceding siblings ...)
2021-04-13 8:54 5% ` [dpdk-dev] [pull-request] dpdk-next-net-eventdev - 21.05 - PRE-RC1 Jerin Jacob
@ 2021-04-13 12:58 0% ` Aaron Conole
3 siblings, 0 replies; 200+ results
From: Aaron Conole @ 2021-04-13 12:58 UTC (permalink / raw)
To: David Marchand
Cc: Thomas Monjalon, Timothy McDaniel, Jerin Jacob Kollanukkaran,
Ray Kinsella, dpdklab, abhinandan.gujjar, harry.van.haaren, dev,
Shijith Thotton, Akhil Goyal, Pavan Nikhilesh Bhagavatula,
mattias.ronnblom, ci
David Marchand <david.marchand@redhat.com> writes:
> On Tue, Apr 13, 2021 at 12:12 AM Thomas Monjalon <thomas@monjalon.net> wrote:
>>
>> 12/04/2021 15:20, Jerin Jacob Kollanukkaran:
>> > http://dpdk.org/git/next/dpdk-next-eventdev
>>
>> Pulled, thanks.
>>
>> Note few changes in titles like uppercases for acronyms,
>> or "add support" simplified as "support",
>> and release notes moved in the right place.
>
> The ABI check now reports an error on event/dlb.
> The reason is that the event/dlb driver has been removed, and so the
> check complains about a missing dump.
> This will have to be fixed quickly or reverted.
>
>
> This has been missed by multiple people, so trying to understand why.
>
> The ABI check should have caught this when run by maintainers (/me
> looks at Thomas and Jerin).
>
> The CI should have caught it too.
> But, v1 did not apply.
> For v2, I can see a doc generation issue reported by Intel CI that I
> can't reproduce, so it could be just noise.
> I can't find reports for Travis or GHA and I could not find in the
> robot logs why the series_15708 branch was not created.
I need to go back in the logs - there were a few cases during a
change-over that the robot wasn't running right.
> Looking at UNH reports:
> http://mails.dpdk.org/archives/test-report/2021-March/182956.html
> But looking at the log:
> [2713/2716] Compiling C object
> 'drivers/a715181@@rte_event_octeontx2@sta/meson-generated_.._rte_event_octeontx2.pmd.c.o'.
> [2714/2716] Linking static target drivers/librte_event_octeontx2.a.
> [2715/2716] Generating rte_event_octeontx2.sym_chk with a meson_exe.py
> custom command.
> [2716/2716] Linking target drivers/librte_event_octeontx2.so.21.1.
> Error: cannot find librte_event_dlb.dump in
> /home-local/jenkins-local/jenkins-agent/workspace/Ubuntu18.04-Compile-DPDK-ABI/dpdk/build-gcc-shared/install
>
> Is this something that has been fixed since then?
>
> I don't have the main branch/recent series status from UNH, but at
> least GHA and Travis are now complaining about ABI.
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH v2 1/4] ethdev: introduce indirect action APIs
2021-04-10 14:03 4% ` [dpdk-dev] [PATCH v2 1/4] ethdev: introduce indirect action APIs Bing Zhao
2021-04-12 19:42 0% ` Ferruh Yigit
@ 2021-04-13 12:36 0% ` Andrey Vesnovaty
2021-04-15 13:55 0% ` Andrew Rybchenko
2 siblings, 0 replies; 200+ results
From: Andrey Vesnovaty @ 2021-04-13 12:36 UTC (permalink / raw)
To: Bing Zhao, Ori Kam, NBU-Contact-Thomas Monjalon, ferruh.yigit,
andrew.rybchenko, Matan Azrad, Slava Ovsiienko
Cc: dev, ajit.khaparde, Gregory Etelson
> -----Original Message-----
> From: Bing Zhao <bingz@nvidia.com>
> Sent: Saturday, April 10, 2021 5:04 PM
> To: Ori Kam <orika@nvidia.com>; NBU-Contact-Thomas Monjalon
> <thomas@monjalon.net>; ferruh.yigit@intel.com;
> andrew.rybchenko@oktetlabs.ru; Matan Azrad <matan@nvidia.com>; Slava
> Ovsiienko <viacheslavo@nvidia.com>
> Cc: dev@dpdk.org; ajit.khaparde@broadcom.com; Gregory Etelson
> <getelson@nvidia.com>; Andrey Vesnovaty <andreyv@nvidia.com>
> Subject: [PATCH v2 1/4] ethdev: introduce indirect action APIs
>
> Right now, rte_flow_shared_action_* APIs are used for some shared
> actions, like RSS, count. The shared action should be created before
> using it inside a flow. These shared actions sometimes are not
> really shared but just some indirect actions decoupled from a flow.
>
> The new functions rte_flow_action_handle_* are added to replace
> the current shared functions rte_flow_shared_action_*.
>
> There are two types of flow actions:
> 1. the direct (normal) actions that could be created and stored
> within a flow rule. Such action is tied to its flow rule and
> cannot be reused.
> 2. the indirect action, in the past, named shared_action. It is
> created from a direct actioni, like count or rss, and then used
> in the flow rules with an object handle. The PMD will take care
> of the retrieve from indirect action to the direct action
> when it is referenced.
>
> The indirect action is accessed (update / query) w/o any flow rule,
> just via the action object handle. For example, when querying or
> resetting a counter, it could be done out of any flow using this
> counter, but only the handle of the counter action object is
> required.
> The indirect action object could be shared by different flows or
> used by a single flow, depending on the direct action type and
> the real-life requirements.
> The handle of an indirect action object is opaque and defined in
> each driver and possibly different per direct action type.
>
> The old name "shared" is improper in a sense and should be replaced.
>
> All the command lines in testpmd application with "shared_action*"
> are replaced with "indirect_action*".
>
> The parameter of "update" interface is also changed. A general
> pointer will replace the rte_flow_action struct pointer due to the
> facts:
> 1. Some action may not support fields updating. In the example of a
> counter, the only "update" supported should be the reset. So
> passing a rte_flow_action struct pointer is meaningless and
> there is even no such corresponding action struct. What's more,
> if more than one operations should be supported, for some other
> action, such pointer parameter may not meet the need.
> 2. Some action may need conditional or partial update, the current
> parameter will not provide the ability to indicate which part(s)
> to update.
> For different types of indirect action objects, the pointer could
> either be the same of rte_flow_action* struct - in order not to
> break the current driver implementation, or some wrapper
> structures with bits as masks to indicate which part to be
> updated, depending on real needs of the corresponding direct
> action. For different direct actions, the structures of indirect
> action objects updating will be different.
>
> All the underlayer PMD callbacks will be moved to these new APIs.
>
> The RTE_FLOW_ACTION_TYPE_SHARED is kept for now in order not to
> break the ABI. All the implementations are changed by using
> RTE_FLOW_ACTION_TYPE_INDIRECT.
>
> Signed-off-by: Bing Zhao <bingz@nvidia.com>
> ---
> doc/guides/rel_notes/release_21_05.rst | 3 +
> lib/librte_ethdev/rte_flow.c | 56 ++++++++--------
> lib/librte_ethdev/rte_flow.h | 118 +++++++++++++++++++--------------
> lib/librte_ethdev/rte_flow_driver.h | 26 ++++----
> lib/librte_ethdev/version.map | 8 +--
> 5 files changed, 115 insertions(+), 96 deletions(-)
>
> diff --git a/doc/guides/rel_notes/release_21_05.rst
> b/doc/guides/rel_notes/release_21_05.rst
> index 374d6d9..6c0ac46 100644
> --- a/doc/guides/rel_notes/release_21_05.rst
> +++ b/doc/guides/rel_notes/release_21_05.rst
> @@ -164,6 +164,9 @@ API Changes
> from ``rte_thread_tls_*`` to ``rte_thread_*`` to avoid naming redundancy
> and confusion with the transport layer security term.
>
> +* ethdev: The experimental shared action APIs in ``rte_flow.h`` has been
> + replaced from ``rte_flow_shared_action_*`` to indirect action APIs named
> + ``rte_flow_action_handle_*``.
>
> ABI Changes
> -----------
> diff --git a/lib/librte_ethdev/rte_flow.c b/lib/librte_ethdev/rte_flow.c
> index e07e617..27a1615 100644
> --- a/lib/librte_ethdev/rte_flow.c
> +++ b/lib/librte_ethdev/rte_flow.c
> @@ -180,12 +180,12 @@ struct rte_flow_desc_data {
> MK_FLOW_ACTION(MODIFY_FIELD,
> sizeof(struct rte_flow_action_modify_field)),
> /**
> - * Shared action represented as handle of type
> - * (struct rte_flow_shared action *) stored in conf field (see
> + * Indirect action represented as handle of type
> + * (struct rte_flow_action_handle *) stored in conf field (see
> * struct rte_flow_action); no need for additional structure to * store
> - * shared action handle.
> + * indirect action handle.
> */
> - MK_FLOW_ACTION(SHARED, 0),
> + MK_FLOW_ACTION(INDIRECT, 0),
> };
>
> int
> @@ -1067,53 +1067,53 @@ enum rte_flow_conv_item_spec_type {
> NULL, rte_strerror(ENOTSUP));
> }
>
> -struct rte_flow_shared_action *
> -rte_flow_shared_action_create(uint16_t port_id,
> - const struct rte_flow_shared_action_conf *conf,
> +struct rte_flow_action_handle *
> +rte_flow_action_handle_create(uint16_t port_id,
> + const struct rte_flow_indir_action_conf *conf,
> const struct rte_flow_action *action,
> struct rte_flow_error *error)
> {
> - struct rte_flow_shared_action *shared_action;
> + struct rte_flow_action_handle *handle;
> const struct rte_flow_ops *ops = rte_flow_ops_get(port_id, error);
>
> if (unlikely(!ops))
> return NULL;
> - if (unlikely(!ops->shared_action_create)) {
> + if (unlikely(!ops->action_handle_create)) {
> rte_flow_error_set(error, ENOSYS,
> RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
> NULL,
> rte_strerror(ENOSYS));
> return NULL;
> }
> - shared_action = ops->shared_action_create(&rte_eth_devices[port_id],
> - conf, action, error);
> - if (shared_action == NULL)
> + handle = ops->action_handle_create(&rte_eth_devices[port_id],
> + conf, action, error);
> + if (handle == NULL)
> flow_err(port_id, -rte_errno, error);
> - return shared_action;
> + return handle;
> }
>
> int
> -rte_flow_shared_action_destroy(uint16_t port_id,
> - struct rte_flow_shared_action *action,
> - struct rte_flow_error *error)
> +rte_flow_action_handle_destroy(uint16_t port_id,
> + struct rte_flow_action_handle *handle,
> + struct rte_flow_error *error)
> {
> int ret;
> const struct rte_flow_ops *ops = rte_flow_ops_get(port_id, error);
>
> if (unlikely(!ops))
> return -rte_errno;
> - if (unlikely(!ops->shared_action_destroy))
> + if (unlikely(!ops->action_handle_destroy))
> return rte_flow_error_set(error, ENOSYS,
>
> RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
> NULL, rte_strerror(ENOSYS));
> - ret = ops->shared_action_destroy(&rte_eth_devices[port_id], action,
> - error);
> + ret = ops->action_handle_destroy(&rte_eth_devices[port_id],
> + handle, error);
> return flow_err(port_id, ret, error);
> }
>
> int
> -rte_flow_shared_action_update(uint16_t port_id,
> - struct rte_flow_shared_action *action,
> - const struct rte_flow_action *update,
> +rte_flow_action_handle_update(uint16_t port_id,
> + struct rte_flow_action_handle *handle,
> + const void *update,
> struct rte_flow_error *error)
> {
> int ret;
> @@ -1121,18 +1121,18 @@ struct rte_flow_shared_action *
>
> if (unlikely(!ops))
> return -rte_errno;
> - if (unlikely(!ops->shared_action_update))
> + if (unlikely(!ops->action_handle_update))
> return rte_flow_error_set(error, ENOSYS,
>
> RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
> NULL, rte_strerror(ENOSYS));
> - ret = ops->shared_action_update(&rte_eth_devices[port_id], action,
> + ret = ops->action_handle_update(&rte_eth_devices[port_id], handle,
> update, error);
> return flow_err(port_id, ret, error);
> }
>
> int
> -rte_flow_shared_action_query(uint16_t port_id,
> - const struct rte_flow_shared_action *action,
> +rte_flow_action_handle_query(uint16_t port_id,
> + const struct rte_flow_action_handle *handle,
> void *data,
> struct rte_flow_error *error)
> {
> @@ -1141,11 +1141,11 @@ struct rte_flow_shared_action *
>
> if (unlikely(!ops))
> return -rte_errno;
> - if (unlikely(!ops->shared_action_query))
> + if (unlikely(!ops->action_handle_query))
> return rte_flow_error_set(error, ENOSYS,
>
> RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
> NULL, rte_strerror(ENOSYS));
> - ret = ops->shared_action_query(&rte_eth_devices[port_id], action,
> + ret = ops->action_handle_query(&rte_eth_devices[port_id], handle,
> data, error);
> return flow_err(port_id, ret, error);
> }
> diff --git a/lib/librte_ethdev/rte_flow.h b/lib/librte_ethdev/rte_flow.h
> index 6cc5713..91ae25b 100644
> --- a/lib/librte_ethdev/rte_flow.h
> +++ b/lib/librte_ethdev/rte_flow.h
> @@ -1821,7 +1821,7 @@ enum rte_flow_action_type {
> * Enables counters for this flow rule.
> *
> * These counters can be retrieved and reset through rte_flow_query()
> or
> - * rte_flow_shared_action_query() if the action provided via handle,
> + * rte_flow_action_handle_query() if the action provided via handle,
> * see struct rte_flow_query_count.
> *
> * See struct rte_flow_action_count.
> @@ -2267,6 +2267,16 @@ enum rte_flow_action_type {
> * See struct rte_flow_action_modify_field.
> */
> RTE_FLOW_ACTION_TYPE_MODIFY_FIELD,
> +
> + /**
> + * Describe indirect action that could be used by a single flow rule
> + * or multiple flow rules.
> + *
> + * Allow flow rule(s) reference the same action by the indirect action
> + * handle (see struct rte_flow_action_handle), rules could be on the
> + * same port or across different ports.
> + */
> + RTE_FLOW_ACTION_TYPE_INDIRECT,
> };
>
> /**
> @@ -2357,7 +2367,7 @@ struct rte_flow_query_age {
> * ``struct rte_flow_query_count``.
> *
> * @deprecated Shared attribute is deprecated, use generic
> - * RTE_FLOW_ACTION_TYPE_SHARED action.
> + * RTE_FLOW_ACTION_TYPE_INDIRECT action.
> *
> * The shared flag indicates whether the counter is unique to the flow rule the
> * action is specified with, or whether it is a shared counter.
> @@ -2847,17 +2857,23 @@ struct rte_flow_action_set_dscp {
> };
>
> /**
> - * RTE_FLOW_ACTION_TYPE_SHARED
> + * @warning
> + * @b EXPERIMENTAL: this structure may change without prior notice
> + *
> + * RTE_FLOW_ACTION_TYPE_INDIRECT
> *
> - * Opaque type returned after successfully creating a shared action.
> + * Opaque type returned after successfully creating an indirect action object.
> + * The definition of the object handle will be different per driver or
> + * per immediate action type.
> *
> - * This handle can be used to manage and query the related action:
> - * - share it across multiple flow rules
> - * - update action configuration
> - * - query action data
> - * - destroy action
> + * This handle can be used to manage and query the related immediate action:
> + * - referenced in single flow rule or across multiple flow rules
> + * over multiple ports
> + * - update action object configuration
> + * - query action object data
> + * - destroy action object
> */
> -struct rte_flow_shared_action;
> +struct rte_flow_action_handle;
>
> /**
> * Field IDs for MODIFY_FIELD action.
> @@ -3628,25 +3644,22 @@ struct rte_flow_desc {
> uint32_t nb_contexts, struct rte_flow_error *error);
>
> /**
> - * Specify shared action configuration
> + * Specify indirect action object configuration
> */
> -struct rte_flow_shared_action_conf {
> +struct rte_flow_indir_action_conf {
> /**
> - * Flow direction for shared action configuration.
> + * Flow direction for the indirect action configuration.
> *
> - * Shared action should be valid at least for one flow direction,
> + * Action should be valid at least for one flow direction,
> * otherwise it is invalid for both ingress and egress rules.
> */
> uint32_t ingress:1;
> /**< Action valid for rules applied to ingress traffic. */
> uint32_t egress:1;
> /**< Action valid for rules applied to egress traffic. */
> -
> /**
> * When set to 1, indicates that the action is valid for
> * transfer traffic; otherwise, for non-transfer traffic.
> - *
> - * See struct rte_flow_attr.
> */
> uint32_t transfer:1;
> };
> @@ -3655,16 +3668,17 @@ struct rte_flow_shared_action_conf {
> * @warning
> * @b EXPERIMENTAL: this API may change without prior notice.
> *
> - * Create shared action for reuse in multiple flow rules.
> - * The created shared action has single state and configuration
> - * across all flow rules using it.
> + * Create an indirect action object that can be used by flow create, and
> + * could also be shared by different flows.
> + * The created object handle has single state and configuration
> + * across all the flow rules using it.
> *
> * @param[in] port_id
> * The port identifier of the Ethernet device.
> * @param[in] conf
> - * Shared action configuration.
> + * Action configuration for the indirect action object creation.
> * @param[in] action
> - * Action configuration for shared action creation.
> + * Specific configuration of the indirect action object.
> * @param[out] error
> * Perform verbose error reporting if not NULL. PMDs initialize this
> * structure in case of error only.
> @@ -3678,9 +3692,9 @@ struct rte_flow_shared_action_conf {
> * - (ENOTSUP) if *action* valid but unsupported.
> */
> __rte_experimental
> -struct rte_flow_shared_action *
> -rte_flow_shared_action_create(uint16_t port_id,
> - const struct rte_flow_shared_action_conf *conf,
> +struct rte_flow_action_handle *
> +rte_flow_action_handle_create(uint16_t port_id,
> + const struct rte_flow_indir_action_conf *conf,
> const struct rte_flow_action *action,
> struct rte_flow_error *error);
>
> @@ -3688,12 +3702,12 @@ struct rte_flow_shared_action *
> * @warning
> * @b EXPERIMENTAL: this API may change without prior notice.
> *
> - * Destroy the shared action by handle.
> + * Destroy indirect action by handle.
> *
> * @param[in] port_id
> * The port identifier of the Ethernet device.
> - * @param[in] action
> - * Handle for the shared action to be destroyed.
> + * @param[in] handle
> + * Handle for the indirect action object to be destroyed.
> * @param[out] error
> * Perform verbose error reporting if not NULL. PMDs initialize this
> * structure in case of error only.
> @@ -3708,27 +3722,30 @@ struct rte_flow_shared_action *
> */
> __rte_experimental
> int
> -rte_flow_shared_action_destroy(uint16_t port_id,
> - struct rte_flow_shared_action *action,
> +rte_flow_action_handle_destroy(uint16_t port_id,
> + struct rte_flow_action_handle *handle,
> struct rte_flow_error *error);
>
> /**
> * @warning
> * @b EXPERIMENTAL: this API may change without prior notice.
> *
> - * Update in-place the shared action configuration pointed by *action* handle
> - * with the configuration provided as *update* argument.
> - * The update of the shared action configuration effects all flow rules reusing
> - * the action via handle.
> + * Update in-place the action configuration and / or state pointed
> + * by action *handle* with the configuration provided as *update* argument.
> + * The update of the action configuration effects all flow rules reusing
> + * the action via *handle*.
> + * The update general pointer provides the ability of partial updating.
> *
> * @param[in] port_id
> * The port identifier of the Ethernet device.
> - * @param[in] action
> - * Handle for the shared action to be updated.
> + * @param[in] handle
> + * Handle for the indirect action object to be updated.
> * @param[in] update
> - * Action specification used to modify the action pointed by handle.
> - * *update* should be of same type with the action pointed by the *action*
> - * handle argument, otherwise considered as invalid.
> + * Update profile specification used to modify the action pointed by handle.
> + * *update* could be with the same type of the immediate action
> corresponding
> + * to the *handle* argument when creating, or a wrapper structure includes
> + * action configuration to be updated and bit fields to indicate the member
> + * of fields inside the action to update.
> * @param[out] error
> * Perform verbose error reporting if not NULL. PMDs initialize this
> * structure in case of error only.
> @@ -3739,32 +3756,32 @@ struct rte_flow_shared_action *
> * - (-EIO) if underlying device is removed.
> * - (-EINVAL) if *update* invalid.
> * - (-ENOTSUP) if *update* valid but unsupported.
> - * - (-ENOENT) if action pointed by *ctx* was not found.
> + * - (-ENOENT) if indirect action object pointed by *handle* was not found.
> * rte_errno is also set.
> */
> __rte_experimental
> int
> -rte_flow_shared_action_update(uint16_t port_id,
> - struct rte_flow_shared_action *action,
> - const struct rte_flow_action *update,
> +rte_flow_action_handle_update(uint16_t port_id,
> + struct rte_flow_action_handle *handle,
> + const void *update,
> struct rte_flow_error *error);
>
> /**
> * @warning
> * @b EXPERIMENTAL: this API may change without prior notice.
> *
> - * Query the shared action by handle.
> + * Query the direct action by corresponding indirect action object handle.
> *
> * Retrieve action-specific data such as counters.
> * Data is gathered by special action which may be present/referenced in
> * more than one flow rule definition.
> *
> - * \see RTE_FLOW_ACTION_TYPE_COUNT
> + * @see RTE_FLOW_ACTION_TYPE_COUNT
> *
> * @param port_id
> * Port identifier of Ethernet device.
> - * @param[in] action
> - * Handle for the shared action to query.
> + * @param[in] handle
> + * Handle for the action object to query.
> * @param[in, out] data
> * Pointer to storage for the associated query data type.
> * @param[out] error
> @@ -3776,10 +3793,9 @@ struct rte_flow_shared_action *
> */
> __rte_experimental
> int
> -rte_flow_shared_action_query(uint16_t port_id,
> - const struct rte_flow_shared_action *action,
> - void *data,
> - struct rte_flow_error *error);
> +rte_flow_action_handle_query(uint16_t port_id,
> + const struct rte_flow_action_handle *handle,
> + void *data, struct rte_flow_error *error);
>
> /* Tunnel has a type and the key information. */
> struct rte_flow_tunnel {
> diff --git a/lib/librte_ethdev/rte_flow_driver.h
> b/lib/librte_ethdev/rte_flow_driver.h
> index da594d9..8d825eb 100644
> --- a/lib/librte_ethdev/rte_flow_driver.h
> +++ b/lib/librte_ethdev/rte_flow_driver.h
> @@ -83,27 +83,27 @@ struct rte_flow_ops {
> void **context,
> uint32_t nb_contexts,
> struct rte_flow_error *err);
> - /** See rte_flow_shared_action_create() */
> - struct rte_flow_shared_action *(*shared_action_create)
> + /** See rte_flow_action_handle_create() */
> + struct rte_flow_action_handle *(*action_handle_create)
> (struct rte_eth_dev *dev,
> - const struct rte_flow_shared_action_conf *conf,
> + const struct rte_flow_indir_action_conf *conf,
> const struct rte_flow_action *action,
> struct rte_flow_error *error);
> - /** See rte_flow_shared_action_destroy() */
> - int (*shared_action_destroy)
> + /** See rte_flow_action_handle_destroy() */
> + int (*action_handle_destroy)
> (struct rte_eth_dev *dev,
> - struct rte_flow_shared_action *shared_action,
> + struct rte_flow_action_handle *handle,
> struct rte_flow_error *error);
> - /** See rte_flow_shared_action_update() */
> - int (*shared_action_update)
> + /** See rte_flow_action_handle_update() */
> + int (*action_handle_update)
> (struct rte_eth_dev *dev,
> - struct rte_flow_shared_action *shared_action,
> - const struct rte_flow_action *update,
> + struct rte_flow_action_handle *handle,
> + const void *update,
> struct rte_flow_error *error);
> - /** See rte_flow_shared_action_query() */
> - int (*shared_action_query)
> + /** See rte_flow_action_handle_query() */
> + int (*action_handle_query)
> (struct rte_eth_dev *dev,
> - const struct rte_flow_shared_action *shared_action,
> + const struct rte_flow_action_handle *handle,
> void *data,
> struct rte_flow_error *error);
> /** See rte_flow_tunnel_decap_set() */
> diff --git a/lib/librte_ethdev/version.map b/lib/librte_ethdev/version.map
> index 93ad388..4eb561a 100644
> --- a/lib/librte_ethdev/version.map
> +++ b/lib/librte_ethdev/version.map
> @@ -231,10 +231,6 @@ EXPERIMENTAL {
> rte_eth_fec_get_capability;
> rte_eth_fec_get;
> rte_eth_fec_set;
> - rte_flow_shared_action_create;
> - rte_flow_shared_action_destroy;
> - rte_flow_shared_action_query;
> - rte_flow_shared_action_update;
> rte_flow_tunnel_decap_set;
> rte_flow_tunnel_match;
> rte_flow_get_restore_info;
> @@ -246,6 +242,10 @@ EXPERIMENTAL {
>
> # added in 21.05
> rte_eth_representor_info_get;
> + rte_flow_action_handle_create;
> + rte_flow_action_handle_destroy;
> + rte_flow_action_handle_update;
> + rte_flow_action_handle_query;
> };
>
> INTERNAL {
> --
> 1.8.3.1
Acked-by: Andrey Vesnovaty <andreyv@nvidia.com>
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH] devtools: skip removed DLB driver in ABI check
2021-04-13 9:15 4% ` David Marchand
@ 2021-04-13 9:32 4% ` Thomas Monjalon
0 siblings, 0 replies; 200+ results
From: Thomas Monjalon @ 2021-04-13 9:32 UTC (permalink / raw)
To: Jerin Jacob Kollanukkaran, Timothy McDaniel
Cc: dev, Ray Kinsella, David Marchand
13/04/2021 11:15, David Marchand:
> On Tue, Apr 13, 2021 at 10:45 AM Thomas Monjalon <thomas@monjalon.net> wrote:
> >
> > The eventdev driver DLB was removed in DPDK 21.05,
> > breaking the ABI check.
> > The exception was agreed so we just need to skip this check.
> >
> > Note: complete removal of a driver cannot be ignored
> > in devtools/libabigail.abignore, so the script must be patched.
>
> Indeed, abidiff wants to compare two shared libraries/dumps.
> In this situation, we don't have a second library/dump.
>
> > Fixes: 698fa829415d ("event/dlb: remove driver")
> >
> > Reported-by: David Marchand <david.marchand@redhat.com>
> > Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
> Reviewed-by: David Marchand <david.marchand@redhat.com>
Applied
^ permalink raw reply [relevance 4%]
* Re: [dpdk-dev] [PATCH] devtools: skip removed DLB driver in ABI check
2021-04-13 8:45 15% ` [dpdk-dev] [PATCH] devtools: skip removed DLB driver in ABI check Thomas Monjalon
@ 2021-04-13 9:15 4% ` David Marchand
2021-04-13 9:32 4% ` Thomas Monjalon
2021-04-13 16:09 4% ` Kinsella, Ray
1 sibling, 1 reply; 200+ results
From: David Marchand @ 2021-04-13 9:15 UTC (permalink / raw)
To: Thomas Monjalon
Cc: dev, Jerin Jacob Kollanukkaran, Ray Kinsella, Neil Horman,
Timothy McDaniel
On Tue, Apr 13, 2021 at 10:45 AM Thomas Monjalon <thomas@monjalon.net> wrote:
>
> The eventdev driver DLB was removed in DPDK 21.05,
> breaking the ABI check.
> The exception was agreed so we just need to skip this check.
>
> Note: complete removal of a driver cannot be ignored
> in devtools/libabigail.abignore, so the script must be patched.
Indeed, abidiff wants to compare two shared libraries/dumps.
In this situation, we don't have a second library/dump.
>
> Fixes: 698fa829415d ("event/dlb: remove driver")
>
> Reported-by: David Marchand <david.marchand@redhat.com>
> Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Reviewed-by: David Marchand <david.marchand@redhat.com>
--
David Marchand
^ permalink raw reply [relevance 4%]
* Re: [dpdk-dev] [pull-request] dpdk-next-net-eventdev - 21.05 - PRE-RC1
2021-04-13 9:07 0% ` David Marchand
2021-04-13 9:12 3% ` Thomas Monjalon
@ 2021-04-13 9:14 5% ` David Marchand
1 sibling, 0 replies; 200+ results
From: David Marchand @ 2021-04-13 9:14 UTC (permalink / raw)
To: Jerin Jacob
Cc: Thomas Monjalon, Timothy McDaniel, Jerin Jacob Kollanukkaran,
Ray Kinsella, Aaron Conole, dpdklab, abhinandan.gujjar,
harry.van.haaren, dev, Shijith Thotton, Akhil Goyal,
Pavan Nikhilesh Bhagavatula, mattias.ronnblom, ci
On Tue, Apr 13, 2021 at 11:07 AM David Marchand
<david.marchand@redhat.com> wrote:
>
> On Tue, Apr 13, 2021 at 10:55 AM Jerin Jacob <jerinjacobk@gmail.com> wrote:
> > I was running the following script[1] to detect ABI issues.
> > Since the "./devtools/test-meson-builds.sh" did not return non zero value or
> > the error print was "Error: cannot find librte_event_dlb.dump", It is
> > missed from my side.
> >
> > @David Marchand @Thomas Monjalon Could you share the snippet you are
> > using for detecting the ABI issue.
> >
> >
> > ------------------------
> > # ABI check
> > DPDK_ABI_REF_VERSION=v20.11 DPDK_ABI_REF_DIR=/tmp bash
>
> Ah ok, this is because event/dlb did not exist in 20.11.
> Running against 21.02, you should get the error.
Clicked send too quickly...
No, it did exist.
$ DPDK_ABI_REF_VERSION=v20.11 ./devtools/test-meson-builds.sh
ninja: Entering directory `/home/dmarchan/builds/build-gcc-static'
ninja: no work to do.
ninja: Entering directory `/home/dmarchan/builds/build-gcc-shared'
ninja: no work to do.
Error: cannot find librte_event_dlb.dump in
/home/dmarchan/builds/build-gcc-shared/install
Hum... the next reason I see would be that your reference does not
have event/dlb which is surprising with default configuration.
$ ls $DPDK_ABI_REF_DIR/*/*/dump/*dlb.dump
/home/dmarchan/abi/v20.11/build-clang-shared/dump/librte_event_dlb.dump
/home/dmarchan/abi/v21.02/build-clang-shared/dump/librte_event_dlb.dump
/home/dmarchan/abi/v20.11/build-gcc-shared/dump/librte_event_dlb.dump
/home/dmarchan/abi/v21.02/build-gcc-shared/dump/librte_event_dlb.dump
--
David Marchand
^ permalink raw reply [relevance 5%]
* Re: [dpdk-dev] [pull-request] dpdk-next-net-eventdev - 21.05 - PRE-RC1
2021-04-13 9:07 0% ` David Marchand
@ 2021-04-13 9:12 3% ` Thomas Monjalon
2021-04-13 9:14 5% ` David Marchand
1 sibling, 0 replies; 200+ results
From: Thomas Monjalon @ 2021-04-13 9:12 UTC (permalink / raw)
To: Jerin Jacob, David Marchand
Cc: Timothy McDaniel, Jerin Jacob Kollanukkaran, Ray Kinsella,
Aaron Conole, dpdklab, abhinandan.gujjar, harry.van.haaren, dev,
Shijith Thotton, Akhil Goyal, Pavan Nikhilesh Bhagavatula,
mattias.ronnblom, ci
13/04/2021 11:07, David Marchand:
> On Tue, Apr 13, 2021 at 10:55 AM Jerin Jacob <jerinjacobk@gmail.com> wrote:
> > I was running the following script[1] to detect ABI issues.
> > Since the "./devtools/test-meson-builds.sh" did not return non zero value or
> > the error print was "Error: cannot find librte_event_dlb.dump", It is
> > missed from my side.
> >
> > @David Marchand @Thomas Monjalon Could you share the snippet you are
> > using for detecting the ABI issue.
> >
> >
> > ------------------------
> > # ABI check
> > DPDK_ABI_REF_VERSION=v20.11 DPDK_ABI_REF_DIR=/tmp bash
>
> Ah ok, this is because event/dlb did not exist in 20.11.
No it was added in 20.11.
> Running against 21.02, you should get the error.
Yes we should always run the ABI check against the latest release.
It means you must upgrade DPDK_ABI_REF_VERSION after each release.
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [pull-request] dpdk-next-net-eventdev - 21.05 - PRE-RC1
2021-04-13 8:54 5% ` [dpdk-dev] [pull-request] dpdk-next-net-eventdev - 21.05 - PRE-RC1 Jerin Jacob
2021-04-13 9:01 0% ` Thomas Monjalon
@ 2021-04-13 9:07 0% ` David Marchand
2021-04-13 9:12 3% ` Thomas Monjalon
2021-04-13 9:14 5% ` David Marchand
1 sibling, 2 replies; 200+ results
From: David Marchand @ 2021-04-13 9:07 UTC (permalink / raw)
To: Jerin Jacob
Cc: Thomas Monjalon, Timothy McDaniel, Jerin Jacob Kollanukkaran,
Ray Kinsella, Aaron Conole, dpdklab, abhinandan.gujjar,
harry.van.haaren, dev, Shijith Thotton, Akhil Goyal,
Pavan Nikhilesh Bhagavatula, mattias.ronnblom, ci
On Tue, Apr 13, 2021 at 10:55 AM Jerin Jacob <jerinjacobk@gmail.com> wrote:
> I was running the following script[1] to detect ABI issues.
> Since the "./devtools/test-meson-builds.sh" did not return non zero value or
> the error print was "Error: cannot find librte_event_dlb.dump", It is
> missed from my side.
>
> @David Marchand @Thomas Monjalon Could you share the snippet you are
> using for detecting the ABI issue.
>
>
> ------------------------
> # ABI check
> DPDK_ABI_REF_VERSION=v20.11 DPDK_ABI_REF_DIR=/tmp bash
Ah ok, this is because event/dlb did not exist in 20.11.
Running against 21.02, you should get the error.
--
David Marchand
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [pull-request] dpdk-next-net-eventdev - 21.05 - PRE-RC1
2021-04-13 8:54 5% ` [dpdk-dev] [pull-request] dpdk-next-net-eventdev - 21.05 - PRE-RC1 Jerin Jacob
@ 2021-04-13 9:01 0% ` Thomas Monjalon
2021-04-13 9:07 0% ` David Marchand
1 sibling, 0 replies; 200+ results
From: Thomas Monjalon @ 2021-04-13 9:01 UTC (permalink / raw)
To: Jerin Jacob
Cc: David Marchand, Timothy McDaniel, Jerin Jacob Kollanukkaran,
Ray Kinsella, Aaron Conole, dpdklab, abhinandan.gujjar,
harry.van.haaren, dev, Shijith Thotton, Akhil Goyal,
Pavan Nikhilesh Bhagavatula, mattias.ronnblom, ci
13/04/2021 10:54, Jerin Jacob:
> On Tue, Apr 13, 2021 at 12:46 PM David Marchand
> <david.marchand@redhat.com> wrote:
> >
> > On Tue, Apr 13, 2021 at 12:12 AM Thomas Monjalon <thomas@monjalon.net> wrote:
> > >
> > > 12/04/2021 15:20, Jerin Jacob Kollanukkaran:
> > > > http://dpdk.org/git/next/dpdk-next-eventdev
> > >
> > > Pulled, thanks.
> > >
> > > Note few changes in titles like uppercases for acronyms,
> > > or "add support" simplified as "support",
> > > and release notes moved in the right place.
> >
> > The ABI check now reports an error on event/dlb.
> > The reason is that the event/dlb driver has been removed, and so the
> > check complains about a missing dump.
> > This will have to be fixed quickly or reverted.
> >
> >
> > This has been missed by multiple people, so trying to understand why.
>
>
> I was running the following script[1] to detect ABI issues.
> Since the "./devtools/test-meson-builds.sh" did not return non zero value or
> the error print was "Error: cannot find librte_event_dlb.dump", It is
> missed from my side.
>
> @David Marchand @Thomas Monjalon Could you share the snippet you are
> using for detecting the ABI issue.
I do like you: simply run test-meson-builds.sh
And yes I saw the error, and I don't know why I thought it was OK!
We are humans :)
> ------------------------
> # ABI check
> DPDK_ABI_REF_VERSION=v20.11 DPDK_ABI_REF_DIR=/tmp bash
> ./devtools/test-meson-builds.sh 1> /tmp/build.log 2> /tmp/build.log
> if [ $? -ne 0 ]; then
> echo "ABI check failed"
> exit
> fi
>
> grep "Error: ABI issue reported" /tmp/build.log
> if [ $? -eq 0 ]; then
> echo "ABI issue"
> exit
> fi
>
> -------------------------------------------------------
> >
> > The ABI check should have caught this when run by maintainers (/me
> > looks at Thomas and Jerin).
>
> Sorry for that :-(
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [pull-request] dpdk-next-net-eventdev - 21.05 - PRE-RC1
2021-04-13 7:15 5% ` David Marchand
2021-04-13 7:31 0% ` Thomas Monjalon
2021-04-13 8:45 15% ` [dpdk-dev] [PATCH] devtools: skip removed DLB driver in ABI check Thomas Monjalon
@ 2021-04-13 8:54 5% ` Jerin Jacob
2021-04-13 9:01 0% ` Thomas Monjalon
2021-04-13 9:07 0% ` David Marchand
2021-04-13 12:58 0% ` Aaron Conole
3 siblings, 2 replies; 200+ results
From: Jerin Jacob @ 2021-04-13 8:54 UTC (permalink / raw)
To: David Marchand
Cc: Thomas Monjalon, Timothy McDaniel, Jerin Jacob Kollanukkaran,
Ray Kinsella, Aaron Conole, dpdklab, abhinandan.gujjar,
harry.van.haaren, dev, Shijith Thotton, Akhil Goyal,
Pavan Nikhilesh Bhagavatula, mattias.ronnblom, ci
On Tue, Apr 13, 2021 at 12:46 PM David Marchand
<david.marchand@redhat.com> wrote:
>
> On Tue, Apr 13, 2021 at 12:12 AM Thomas Monjalon <thomas@monjalon.net> wrote:
> >
> > 12/04/2021 15:20, Jerin Jacob Kollanukkaran:
> > > http://dpdk.org/git/next/dpdk-next-eventdev
> >
> > Pulled, thanks.
> >
> > Note few changes in titles like uppercases for acronyms,
> > or "add support" simplified as "support",
> > and release notes moved in the right place.
>
> The ABI check now reports an error on event/dlb.
> The reason is that the event/dlb driver has been removed, and so the
> check complains about a missing dump.
> This will have to be fixed quickly or reverted.
>
>
> This has been missed by multiple people, so trying to understand why.
I was running the following script[1] to detect ABI issues.
Since the "./devtools/test-meson-builds.sh" did not return non zero value or
the error print was "Error: cannot find librte_event_dlb.dump", It is
missed from my side.
@David Marchand @Thomas Monjalon Could you share the snippet you are
using for detecting the ABI issue.
------------------------
# ABI check
DPDK_ABI_REF_VERSION=v20.11 DPDK_ABI_REF_DIR=/tmp bash
./devtools/test-meson-builds.sh 1> /tmp/build.log 2> /tmp/build.log
if [ $? -ne 0 ]; then
echo "ABI check failed"
exit
fi
grep "Error: ABI issue reported" /tmp/build.log
if [ $? -eq 0 ]; then
echo "ABI issue"
exit
fi
-------------------------------------------------------
>
> The ABI check should have caught this when run by maintainers (/me
> looks at Thomas and Jerin).
Sorry for that :-(
^ permalink raw reply [relevance 5%]
* [dpdk-dev] [PATCH] devtools: skip removed DLB driver in ABI check
2021-04-13 7:15 5% ` David Marchand
2021-04-13 7:31 0% ` Thomas Monjalon
@ 2021-04-13 8:45 15% ` Thomas Monjalon
2021-04-13 9:15 4% ` David Marchand
2021-04-13 16:09 4% ` Kinsella, Ray
2021-04-13 8:54 5% ` [dpdk-dev] [pull-request] dpdk-next-net-eventdev - 21.05 - PRE-RC1 Jerin Jacob
2021-04-13 12:58 0% ` Aaron Conole
3 siblings, 2 replies; 200+ results
From: Thomas Monjalon @ 2021-04-13 8:45 UTC (permalink / raw)
To: dev; +Cc: jerinj, David Marchand, Ray Kinsella, Neil Horman, Timothy McDaniel
The eventdev driver DLB was removed in DPDK 21.05,
breaking the ABI check.
The exception was agreed so we just need to skip this check.
Note: complete removal of a driver cannot be ignored
in devtools/libabigail.abignore, so the script must be patched.
Fixes: 698fa829415d ("event/dlb: remove driver")
Reported-by: David Marchand <david.marchand@redhat.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
---
This should have been done as part of removing the driver.
The CI is currently broken, so it should be merged today.
---
devtools/check-abi.sh | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/devtools/check-abi.sh b/devtools/check-abi.sh
index 9835e346da..ca523eb94c 100755
--- a/devtools/check-abi.sh
+++ b/devtools/check-abi.sh
@@ -44,6 +44,10 @@ for dump in $(find $refdir -name "*.dump"); do
echo "Skipped glue library $name."
continue
fi
+ if grep -qE "\<soname='librte_event_dlb\.so" $dump; then
+ echo "Skipped removed driver $name."
+ continue
+ fi
dump2=$(find $newdir -name $name)
if [ -z "$dump2" ] || [ ! -e "$dump2" ]; then
echo "Error: cannot find $name in $newdir" >&2
--
2.31.1
^ permalink raw reply [relevance 15%]
* Re: [dpdk-dev] [pull-request] dpdk-next-net-eventdev - 21.05 - PRE-RC1
2021-04-13 7:15 5% ` David Marchand
@ 2021-04-13 7:31 0% ` Thomas Monjalon
2021-04-13 8:45 15% ` [dpdk-dev] [PATCH] devtools: skip removed DLB driver in ABI check Thomas Monjalon
` (2 subsequent siblings)
3 siblings, 0 replies; 200+ results
From: Thomas Monjalon @ 2021-04-13 7:31 UTC (permalink / raw)
To: David Marchand
Cc: Timothy McDaniel, Jerin Jacob Kollanukkaran, Ray Kinsella,
Aaron Conole, dpdklab, abhinandan.gujjar, harry.van.haaren, dev,
Shijith Thotton, Akhil Goyal, Pavan Nikhilesh Bhagavatula,
mattias.ronnblom, ci, ferruh.yigit
13/04/2021 09:15, David Marchand:
> On Tue, Apr 13, 2021 at 12:12 AM Thomas Monjalon <thomas@monjalon.net> wrote:
> >
> > 12/04/2021 15:20, Jerin Jacob Kollanukkaran:
> > > http://dpdk.org/git/next/dpdk-next-eventdev
> >
> > Pulled, thanks.
> >
> > Note few changes in titles like uppercases for acronyms,
> > or "add support" simplified as "support",
> > and release notes moved in the right place.
>
> The ABI check now reports an error on event/dlb.
> The reason is that the event/dlb driver has been removed, and so the
> check complains about a missing dump.
> This will have to be fixed quickly or reverted.
>
>
> This has been missed by multiple people, so trying to understand why.
>
> The ABI check should have caught this when run by maintainers (/me
> looks at Thomas and Jerin).
>
> The CI should have caught it too.
> But, v1 did not apply.
> For v2, I can see a doc generation issue reported by Intel CI that I
> can't reproduce, so it could be just noise.
> I can't find reports for Travis or GHA and I could not find in the
> robot logs why the series_15708 branch was not created.
>
> Looking at UNH reports:
> http://mails.dpdk.org/archives/test-report/2021-March/182956.html
> But looking at the log:
> [2713/2716] Compiling C object
> 'drivers/a715181@@rte_event_octeontx2@sta/meson-generated_.._rte_event_octeontx2.pmd.c.o'.
> [2714/2716] Linking static target drivers/librte_event_octeontx2.a.
> [2715/2716] Generating rte_event_octeontx2.sym_chk with a meson_exe.py
> custom command.
> [2716/2716] Linking target drivers/librte_event_octeontx2.so.21.1.
> Error: cannot find librte_event_dlb.dump in
> /home-local/jenkins-local/jenkins-agent/workspace/Ubuntu18.04-Compile-DPDK-ABI/dpdk/build-gcc-shared/install
>
> Is this something that has been fixed since then?
>
> I don't have the main branch/recent series status from UNH, but at
> least GHA and Travis are now complaining about ABI.
Sorry about that, this is because I stupidly thought I could fix it
locally without thinking about the CI.
I am going to send a patch for devtools/libabigail.abignore.
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [pull-request] dpdk-next-net-eventdev - 21.05 - PRE-RC1
@ 2021-04-13 7:15 5% ` David Marchand
2021-04-13 7:31 0% ` Thomas Monjalon
` (3 more replies)
0 siblings, 4 replies; 200+ results
From: David Marchand @ 2021-04-13 7:15 UTC (permalink / raw)
To: Thomas Monjalon, Timothy McDaniel, Jerin Jacob Kollanukkaran,
Ray Kinsella, Aaron Conole, dpdklab
Cc: abhinandan.gujjar, harry.van.haaren, dev, Shijith Thotton,
Akhil Goyal, Pavan Nikhilesh Bhagavatula, mattias.ronnblom, ci
On Tue, Apr 13, 2021 at 12:12 AM Thomas Monjalon <thomas@monjalon.net> wrote:
>
> 12/04/2021 15:20, Jerin Jacob Kollanukkaran:
> > http://dpdk.org/git/next/dpdk-next-eventdev
>
> Pulled, thanks.
>
> Note few changes in titles like uppercases for acronyms,
> or "add support" simplified as "support",
> and release notes moved in the right place.
The ABI check now reports an error on event/dlb.
The reason is that the event/dlb driver has been removed, and so the
check complains about a missing dump.
This will have to be fixed quickly or reverted.
This has been missed by multiple people, so trying to understand why.
The ABI check should have caught this when run by maintainers (/me
looks at Thomas and Jerin).
The CI should have caught it too.
But, v1 did not apply.
For v2, I can see a doc generation issue reported by Intel CI that I
can't reproduce, so it could be just noise.
I can't find reports for Travis or GHA and I could not find in the
robot logs why the series_15708 branch was not created.
Looking at UNH reports:
http://mails.dpdk.org/archives/test-report/2021-March/182956.html
But looking at the log:
[2713/2716] Compiling C object
'drivers/a715181@@rte_event_octeontx2@sta/meson-generated_.._rte_event_octeontx2.pmd.c.o'.
[2714/2716] Linking static target drivers/librte_event_octeontx2.a.
[2715/2716] Generating rte_event_octeontx2.sym_chk with a meson_exe.py
custom command.
[2716/2716] Linking target drivers/librte_event_octeontx2.so.21.1.
Error: cannot find librte_event_dlb.dump in
/home-local/jenkins-local/jenkins-agent/workspace/Ubuntu18.04-Compile-DPDK-ABI/dpdk/build-gcc-shared/install
Is this something that has been fixed since then?
I don't have the main branch/recent series status from UNH, but at
least GHA and Travis are now complaining about ABI.
--
David Marchand
^ permalink raw reply [relevance 5%]
* Re: [dpdk-dev] [PATCH v2 1/4] ethdev: introduce indirect action APIs
2021-04-12 19:42 0% ` Ferruh Yigit
@ 2021-04-13 1:26 0% ` Bing Zhao
2021-04-13 14:00 0% ` Ori Kam
0 siblings, 1 reply; 200+ results
From: Bing Zhao @ 2021-04-13 1:26 UTC (permalink / raw)
To: Ferruh Yigit, Ori Kam, NBU-Contact-Thomas Monjalon,
andrew.rybchenko, Matan Azrad, Slava Ovsiienko
Cc: dev, ajit.khaparde, Gregory Etelson, Andrey Vesnovaty
Hi Ferruh,
> -----Original Message-----
> From: Ferruh Yigit <ferruh.yigit@intel.com>
> Sent: Tuesday, April 13, 2021 3:42 AM
> To: Bing Zhao <bingz@nvidia.com>; Ori Kam <orika@nvidia.com>; NBU-
> Contact-Thomas Monjalon <thomas@monjalon.net>;
> andrew.rybchenko@oktetlabs.ru; Matan Azrad <matan@nvidia.com>; Slava
> Ovsiienko <viacheslavo@nvidia.com>
> Cc: dev@dpdk.org; ajit.khaparde@broadcom.com; Gregory Etelson
> <getelson@nvidia.com>; Andrey Vesnovaty <andreyv@nvidia.com>
> Subject: Re: [PATCH v2 1/4] ethdev: introduce indirect action APIs
>
> External email: Use caution opening links or attachments
>
>
> On 4/10/2021 3:03 PM, Bing Zhao wrote:
> > Right now, rte_flow_shared_action_* APIs are used for some shared
> > actions, like RSS, count. The shared action should be created
> before
> > using it inside a flow. These shared actions sometimes are not
> really
> > shared but just some indirect actions decoupled from a flow.
> >
> > The new functions rte_flow_action_handle_* are added to replace
> the
> > current shared functions rte_flow_shared_action_*.
> >
> > There are two types of flow actions:
> > 1. the direct (normal) actions that could be created and stored
> > within a flow rule. Such action is tied to its flow rule and
> > cannot be reused.
> > 2. the indirect action, in the past, named shared_action. It is
> > created from a direct actioni, like count or rss, and then
> used
> > in the flow rules with an object handle. The PMD will take
> care
> > of the retrieve from indirect action to the direct action
> > when it is referenced.
> >
> > The indirect action is accessed (update / query) w/o any flow rule,
> > just via the action object handle. For example, when querying or
> > resetting a counter, it could be done out of any flow using this
> > counter, but only the handle of the counter action object is
> required.
> > The indirect action object could be shared by different flows or
> used
> > by a single flow, depending on the direct action type and the
> > real-life requirements.
> > The handle of an indirect action object is opaque and defined in
> each
> > driver and possibly different per direct action type.
> >
> > The old name "shared" is improper in a sense and should be
> replaced.
> >
> > All the command lines in testpmd application with "shared_action*"
> > are replaced with "indirect_action*".
> >
> > The parameter of "update" interface is also changed. A general
> pointer
> > will replace the rte_flow_action struct pointer due to the
> > facts:
> > 1. Some action may not support fields updating. In the example of
> a
> > counter, the only "update" supported should be the reset. So
> > passing a rte_flow_action struct pointer is meaningless and
> > there is even no such corresponding action struct. What's more,
> > if more than one operations should be supported, for some
> other
> > action, such pointer parameter may not meet the need.
> > 2. Some action may need conditional or partial update, the current
> > parameter will not provide the ability to indicate which
> part(s)
> > to update.
> > For different types of indirect action objects, the pointer
> could
> > either be the same of rte_flow_action* struct - in order not
> to
> > break the current driver implementation, or some wrapper
> > structures with bits as masks to indicate which part to be
> > updated, depending on real needs of the corresponding direct
> > action. For different direct actions, the structures of
> indirect
> > action objects updating will be different.
> >
> > All the underlayer PMD callbacks will be moved to these new APIs.
> >
> > The RTE_FLOW_ACTION_TYPE_SHARED is kept for now in order not to
> break
> > the ABI. All the implementations are changed by using
> > RTE_FLOW_ACTION_TYPE_INDIRECT.
> >
> > Signed-off-by: Bing Zhao <bingz@nvidia.com>
> > ---
> > doc/guides/rel_notes/release_21_05.rst | 3 +
> > lib/librte_ethdev/rte_flow.c | 56 ++++++++--------
> > lib/librte_ethdev/rte_flow.h | 118
> +++++++++++++++++++--------------
> > lib/librte_ethdev/rte_flow_driver.h | 26 ++++----
> > lib/librte_ethdev/version.map | 8 +--
>
> Isn't there any documentation to update with this change?
Do you mean the release note? I only updated the 20_01 release note part.
>
> If the shared action API is not documented at all, can you please
> add documentation for the action handle API?
In the testpmd usage guide, I found some description and update it together with the testpmd update.
I will check if there is another place to update or add.
Thanks
BR. Bing
^ permalink raw reply [relevance 0%]
* [dpdk-dev] [PATCH] devtools: test different build types
@ 2021-04-12 21:53 23% Thomas Monjalon
2021-05-21 15:03 0% ` David Marchand
0 siblings, 1 reply; 200+ results
From: Thomas Monjalon @ 2021-04-12 21:53 UTC (permalink / raw)
To: dev; +Cc: bruce.richardson, david.marchand
All builds were of type debugoptimized.
It is kept only for builds having an ABI check.
Others will have the default build type (release),
except if specified differently as in the x86 generic build
which will be a test of the non-optimized debug build type.
Some static builds will test the minsize build type.
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
---
devtools/test-meson-builds.sh | 18 ++++++++++++------
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/devtools/test-meson-builds.sh b/devtools/test-meson-builds.sh
index daf817ac3e..37f258bd48 100755
--- a/devtools/test-meson-builds.sh
+++ b/devtools/test-meson-builds.sh
@@ -92,13 +92,16 @@ load_env () # <target compiler>
command -v $targetcc >/dev/null 2>&1 || return 1
}
-config () # <dir> <builddir> <meson options>
+config () # <dir> <builddir> <ABI check> <meson options>
{
dir=$1
shift
builddir=$1
shift
+ abicheck=$1
+ shift
if [ -f "$builddir/build.ninja" ] ; then
+ [ $abicheck = ABI ] || return 0
# for existing environments, switch to debugoptimized if unset
# so that ABI checks can run
if ! $MESON configure $builddir |
@@ -114,7 +117,9 @@ config () # <dir> <builddir> <meson options>
else
options="$options -Dexamples=l3fwd" # save disk space
fi
- options="$options --buildtype=debugoptimized"
+ if [ $abicheck = ABI ] ; then
+ options="$options --buildtype=debugoptimized"
+ fi
for option in $DPDK_MESON_OPTIONS ; do
options="$options -D$option"
done
@@ -165,7 +170,7 @@ build () # <directory> <target cc | cross file> <ABI check> [meson options]
cross=
fi
load_env $targetcc || return 0
- config $srcdir $builds_dir/$targetdir $cross --werror $*
+ config $srcdir $builds_dir/$targetdir $abicheck $cross --werror $*
compile $builds_dir/$targetdir
if [ -n "$DPDK_ABI_REF_VERSION" -a "$abicheck" = ABI ] ; then
abirefdir=${DPDK_ABI_REF_DIR:-reference}/$DPDK_ABI_REF_VERSION
@@ -179,7 +184,7 @@ build () # <directory> <target cc | cross file> <ABI check> [meson options]
fi
rm -rf $abirefdir/build
- config $abirefdir/src $abirefdir/build $cross \
+ config $abirefdir/src $abirefdir/build $abicheck $cross \
-Dexamples= $*
compile $abirefdir/build
install_target $abirefdir/build $abirefdir/$targetdir
@@ -213,9 +218,10 @@ for c in gcc clang ; do
abicheck=ABI
else
abicheck=skipABI # save time and disk space
+ buildtype='--buildtype=minsize'
fi
export CC="$CCACHE $c"
- build build-$c-$s $c $abicheck --default-library=$s
+ build build-$c-$s $c $abicheck $buildtype --default-library=$s
unset CC
done
done
@@ -227,7 +233,7 @@ generic_machine='nehalem'
if ! check_cc_flags "-march=$generic_machine" ; then
generic_machine='corei7'
fi
-build build-x86-generic cc skipABI -Dcheck_includes=true \
+build build-x86-generic cc skipABI --buildtype=debug -Dcheck_includes=true \
-Dlibdir=lib -Dmachine=$generic_machine $use_shared
# 32-bit with default compiler
--
2.31.1
^ permalink raw reply [relevance 23%]
* Re: [dpdk-dev] [PATCH v2 1/4] ethdev: introduce indirect action APIs
2021-04-10 14:03 4% ` [dpdk-dev] [PATCH v2 1/4] ethdev: introduce indirect action APIs Bing Zhao
@ 2021-04-12 19:42 0% ` Ferruh Yigit
2021-04-13 1:26 0% ` Bing Zhao
2021-04-13 12:36 0% ` Andrey Vesnovaty
2021-04-15 13:55 0% ` Andrew Rybchenko
2 siblings, 1 reply; 200+ results
From: Ferruh Yigit @ 2021-04-12 19:42 UTC (permalink / raw)
To: Bing Zhao, orika, thomas, andrew.rybchenko, matan, viacheslavo
Cc: dev, ajit.khaparde, getelson, andreyv
On 4/10/2021 3:03 PM, Bing Zhao wrote:
> Right now, rte_flow_shared_action_* APIs are used for some shared
> actions, like RSS, count. The shared action should be created before
> using it inside a flow. These shared actions sometimes are not
> really shared but just some indirect actions decoupled from a flow.
>
> The new functions rte_flow_action_handle_* are added to replace
> the current shared functions rte_flow_shared_action_*.
>
> There are two types of flow actions:
> 1. the direct (normal) actions that could be created and stored
> within a flow rule. Such action is tied to its flow rule and
> cannot be reused.
> 2. the indirect action, in the past, named shared_action. It is
> created from a direct actioni, like count or rss, and then used
> in the flow rules with an object handle. The PMD will take care
> of the retrieve from indirect action to the direct action
> when it is referenced.
>
> The indirect action is accessed (update / query) w/o any flow rule,
> just via the action object handle. For example, when querying or
> resetting a counter, it could be done out of any flow using this
> counter, but only the handle of the counter action object is
> required.
> The indirect action object could be shared by different flows or
> used by a single flow, depending on the direct action type and
> the real-life requirements.
> The handle of an indirect action object is opaque and defined in
> each driver and possibly different per direct action type.
>
> The old name "shared" is improper in a sense and should be replaced.
>
> All the command lines in testpmd application with "shared_action*"
> are replaced with "indirect_action*".
>
> The parameter of "update" interface is also changed. A general
> pointer will replace the rte_flow_action struct pointer due to the
> facts:
> 1. Some action may not support fields updating. In the example of a
> counter, the only "update" supported should be the reset. So
> passing a rte_flow_action struct pointer is meaningless and
> there is even no such corresponding action struct. What's more,
> if more than one operations should be supported, for some other
> action, such pointer parameter may not meet the need.
> 2. Some action may need conditional or partial update, the current
> parameter will not provide the ability to indicate which part(s)
> to update.
> For different types of indirect action objects, the pointer could
> either be the same of rte_flow_action* struct - in order not to
> break the current driver implementation, or some wrapper
> structures with bits as masks to indicate which part to be
> updated, depending on real needs of the corresponding direct
> action. For different direct actions, the structures of indirect
> action objects updating will be different.
>
> All the underlayer PMD callbacks will be moved to these new APIs.
>
> The RTE_FLOW_ACTION_TYPE_SHARED is kept for now in order not to
> break the ABI. All the implementations are changed by using
> RTE_FLOW_ACTION_TYPE_INDIRECT.
>
> Signed-off-by: Bing Zhao <bingz@nvidia.com>
> ---
> doc/guides/rel_notes/release_21_05.rst | 3 +
> lib/librte_ethdev/rte_flow.c | 56 ++++++++--------
> lib/librte_ethdev/rte_flow.h | 118 +++++++++++++++++++--------------
> lib/librte_ethdev/rte_flow_driver.h | 26 ++++----
> lib/librte_ethdev/version.map | 8 +--
Isn't there any documentation to update with this change?
If the shared action API is not documented at all, can you please add
documentation for the action handle API?
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH v9 05/10] kvargs: update parser to support multiple lists
@ 2021-04-12 16:42 3% ` Kinsella, Ray
0 siblings, 0 replies; 200+ results
From: Kinsella, Ray @ 2021-04-12 16:42 UTC (permalink / raw)
To: Xueming Li, Andrew Rybchenko, Ferruh Yigit
Cc: dev, Viacheslav Ovsiienko, Asaf Penso, Olivier Matz, Thomas Monjalon
On 11/03/2021 13:13, Xueming Li wrote:
> This patch updates kvargs parser to support value of multiple lists or
> ranges:
> k1=v[1,2]v[3-5]
>
> Signed-off-by: Xueming Li <xuemingl@nvidia.com>
> Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
> Acked-by: Thomas Monjalon <thomas@monjalon.net>
> ---
> app/test/test_kvargs.c | 46 +++++++++++++--
> lib/librte_kvargs/rte_kvargs.c | 101 +++++++++++++++++++++++----------
> 2 files changed, 112 insertions(+), 35 deletions(-)
>
Hi folks,
This is essentially an FYI.
This change introduced a weak functional ABI regression into DPDK.
When I test librte_kvargs using the v20.11 unit test binary I get the following.
EAL: Detected 80 lcore(s)
EAL: Detected 2 NUMA nodes
EAL: Detected shared linkage of DPDK
EAL: Multi-process socket /var/run/dpdk/rte/mp_socket
EAL: Selected IOVA mode 'PA'
EAL: 4090 hugepages of size 2097152 reserved, but no mounted hugetlbfs found for that size
APP: HPET is not enabled, using TSC as default timer
RTE>>kvargs_autotest
== test valid case ==
== test invalid case ==
rte_kvargs_parse() returned 0 (but should not)
while processing <foo=1,foo=> using valid_keys=<foo,check>
Test Failed
RTE>>
The reason this is failing in v20.11 and passing at the HEAD,
is that "no value" test case (foo=1,foo=) were removed from test_invalid_kvargs, and was added to test_valid_kvargs.
So tokens that were definitely invalid in v20.11, are now is valid in v21.11.
My 2c is that as long as the valid values in v20.11 are still OK, there is no regression.
Thanks,
Ray K
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [PATCH] eal: move DMA mapping from bus-specific to generic driver
@ 2021-04-12 15:03 0% ` Kinsella, Ray
0 siblings, 0 replies; 200+ results
From: Kinsella, Ray @ 2021-04-12 15:03 UTC (permalink / raw)
To: Thomas Monjalon
Cc: dev, hemant.agrawal, rosen.xu, sthemmin, longli, jerinj,
ferruh.yigit, andrew.rybchenko, Matan Azrad, Shahaf Shuler,
Viacheslav Ovsiienko, Maxime Coquelin, Chenbo Xia, xuemingl,
david.marchand
On 31/03/2021 23:53, Thomas Monjalon wrote:
> 01/04/2021 00:45, Thomas Monjalon:
>> The operations of DMA mapping and unmapping are controlled in some
>> bus drivers, following rte_bus specification.
>> If the device driver don't provide any specific mapping operation,
>> the bus driver may have a fallback (VFIO case for PCI).
>>
>> The DMA mapping done by the device drivers are called
>> from the bus drivers via function pointers in bus-specific structures:
>> rte_vdev_driver and rte_pci_driver.
>>
>> The device driver DMA mapping is not specific to the bus,
>> so it can be generalized to all device drivers, based on rte_device.
>> That's why the function pointers dma_map and dma_unmap
>> are moved to rte_driver, avoiding useless casts of device object.
>>
>> The function prototypes rte_dev_dma_map_t and rte_dev_dma_unmap_t
>> are removed from rte_bus.h because the definition in rte_dev.h is enough,
>> but they are still used in rte_bus for bus drivers,
>> while being added in rte_driver for device drivers,
>> and removed from rte_vdev_driver/rte_pci_driver.
>>
>> The impacted device drivers are mlx5 (PCI) and virtio_user (vdev).
>>
>> Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
>> ---
>> Depends-on: series-16017 ("pci: add rte prefix")
>> ---
>> drivers/bus/pci/pci_common.c | 8 ++--
>> drivers/bus/pci/rte_bus_pci.h | 40 --------------------
>> drivers/bus/vdev/rte_bus_vdev.h | 40 --------------------
>> drivers/bus/vdev/vdev.c | 32 +++++-----------
>> drivers/common/mlx5/mlx5_common_pci.c | 30 ++++++++-------
>> drivers/net/mlx5/mlx5.c | 4 +-
>> drivers/net/mlx5/mlx5_mr.c | 50 +++++++++++++------------
>> drivers/net/mlx5/mlx5_rxtx.h | 4 +-
>> drivers/net/virtio/virtio_user_ethdev.c | 22 +++++------
>> lib/librte_eal/include/rte_bus.h | 42 ---------------------
>> lib/librte_eal/include/rte_dev.h | 49 +++++++++++++++++++++++-
>> 11 files changed, 117 insertions(+), 204 deletions(-)
>
> The ABI checker reports some issues on the driver interface.
> It needs to be carefully analyzed, because driver interface
> should not be part of the ABI compatibility contract.
>
The depends-on series-16017 is marked as superseded.
This patch doesn't apply cleanly, even when the depends-on series is applied before it.
Ray K
^ permalink raw reply [relevance 0%]
* [dpdk-dev] [PATCH 2/3] stack: add lock-free support indication
@ 2021-04-12 8:29 4% ` Stanislaw Kardach
0 siblings, 0 replies; 200+ results
From: Stanislaw Kardach @ 2021-04-12 8:29 UTC (permalink / raw)
To: Olivier Matz; +Cc: dev, Stanislaw Kardach, phil.yang, stable
Currently it is impossible to detect programatically whether lock-free
implementation of rte_stack is supported. One could check whether the
header guard for lock-free stubs is defined (_RTE_STACK_LF_STUBS_H_) but
that's an unstable implementation detail. Because of that currently all
lock-free ring creations silently succeed (as long as the stack header
is 16B long) which later leads to push and pop operations being NOPs.
The observable effect is that stack_lf_autotest fails on platforms not
supporting the lock-free. Instead it should just skip the lock-free test
altogether.
This commit adds a new errno value (ENOTSUP) that may be returned by
rte_stack_create() to indicate that a given combination of flags is not
supported on a current platform.
This is detected by checking a compile-time flag in the include logic in
rte_stack_lf.h which may be used by applications to check the lock-free
support at compile time.
Signed-off-by: Stanislaw Kardach <kda@semihalf.com>
Fixes: 7911ba0473e0 ("stack: enable lock-free implementation for aarch64")
Cc: phil.yang@arm.com
Cc: stable@dpdk.org
---
doc/guides/rel_notes/release_21_05.rst | 4 ++++
lib/librte_stack/rte_stack.c | 4 +++-
lib/librte_stack/rte_stack.h | 1 +
lib/librte_stack/rte_stack_lf.h | 5 +++++
4 files changed, 13 insertions(+), 1 deletion(-)
diff --git a/doc/guides/rel_notes/release_21_05.rst b/doc/guides/rel_notes/release_21_05.rst
index 6f5858c8f..42ed60da8 100644
--- a/doc/guides/rel_notes/release_21_05.rst
+++ b/doc/guides/rel_notes/release_21_05.rst
@@ -166,6 +166,10 @@ API Changes
* pci: The value ``PCI_ANY_ID`` is marked as deprecated
and can be replaced with ``RTE_PCI_ANY_ID``.
+* Lock-free ``rte_stack`` no longer silently ignores push and pop when it's not
+ supported on the current platform. Instead ``rte_stack_create()`` fails and
+ ``rte_errno`` is set to ``ENOTSUP``.
+
ABI Changes
-----------
diff --git a/lib/librte_stack/rte_stack.c b/lib/librte_stack/rte_stack.c
index 8a51fba17..10d3b2eeb 100644
--- a/lib/librte_stack/rte_stack.c
+++ b/lib/librte_stack/rte_stack.c
@@ -64,9 +64,11 @@ rte_stack_create(const char *name, unsigned int count, int socket_id,
#ifdef RTE_ARCH_64
RTE_BUILD_BUG_ON(sizeof(struct rte_stack_lf_head) != 16);
-#else
+#endif
+#if !defined(RTE_STACK_LF_SUPPORTED)
if (flags & RTE_STACK_F_LF) {
STACK_LOG_ERR("Lock-free stack is not supported on your platform\n");
+ rte_errno = ENOTSUP;
return NULL;
}
#endif
diff --git a/lib/librte_stack/rte_stack.h b/lib/librte_stack/rte_stack.h
index b82c74e72..27640f87b 100644
--- a/lib/librte_stack/rte_stack.h
+++ b/lib/librte_stack/rte_stack.h
@@ -205,6 +205,7 @@ rte_stack_free_count(struct rte_stack *s)
* - EEXIST - a stack with the same name already exists
* - ENOMEM - insufficient memory to create the stack
* - ENAMETOOLONG - name size exceeds RTE_STACK_NAMESIZE
+ * - ENOTSUP - platform does not support given flags combination.
*/
struct rte_stack *
rte_stack_create(const char *name, unsigned int count, int socket_id,
diff --git a/lib/librte_stack/rte_stack_lf.h b/lib/librte_stack/rte_stack_lf.h
index eb106e64e..f2b012cd0 100644
--- a/lib/librte_stack/rte_stack_lf.h
+++ b/lib/librte_stack/rte_stack_lf.h
@@ -13,6 +13,11 @@
#else
#include "rte_stack_lf_generic.h"
#endif
+
+/**
+ * Indicates that RTE_STACK_F_LF is supported.
+ */
+#define RTE_STACK_LF_SUPPORTED
#endif
/**
--
2.27.0
^ permalink raw reply [relevance 4%]
* [dpdk-dev] [PATCH v2 1/4] ethdev: introduce indirect action APIs
@ 2021-04-10 14:03 4% ` Bing Zhao
2021-04-12 19:42 0% ` Ferruh Yigit
` (2 more replies)
0 siblings, 3 replies; 200+ results
From: Bing Zhao @ 2021-04-10 14:03 UTC (permalink / raw)
To: orika, thomas, ferruh.yigit, andrew.rybchenko, matan, viacheslavo
Cc: dev, ajit.khaparde, getelson, andreyv
Right now, rte_flow_shared_action_* APIs are used for some shared
actions, like RSS, count. The shared action should be created before
using it inside a flow. These shared actions sometimes are not
really shared but just some indirect actions decoupled from a flow.
The new functions rte_flow_action_handle_* are added to replace
the current shared functions rte_flow_shared_action_*.
There are two types of flow actions:
1. the direct (normal) actions that could be created and stored
within a flow rule. Such action is tied to its flow rule and
cannot be reused.
2. the indirect action, in the past, named shared_action. It is
created from a direct actioni, like count or rss, and then used
in the flow rules with an object handle. The PMD will take care
of the retrieve from indirect action to the direct action
when it is referenced.
The indirect action is accessed (update / query) w/o any flow rule,
just via the action object handle. For example, when querying or
resetting a counter, it could be done out of any flow using this
counter, but only the handle of the counter action object is
required.
The indirect action object could be shared by different flows or
used by a single flow, depending on the direct action type and
the real-life requirements.
The handle of an indirect action object is opaque and defined in
each driver and possibly different per direct action type.
The old name "shared" is improper in a sense and should be replaced.
All the command lines in testpmd application with "shared_action*"
are replaced with "indirect_action*".
The parameter of "update" interface is also changed. A general
pointer will replace the rte_flow_action struct pointer due to the
facts:
1. Some action may not support fields updating. In the example of a
counter, the only "update" supported should be the reset. So
passing a rte_flow_action struct pointer is meaningless and
there is even no such corresponding action struct. What's more,
if more than one operations should be supported, for some other
action, such pointer parameter may not meet the need.
2. Some action may need conditional or partial update, the current
parameter will not provide the ability to indicate which part(s)
to update.
For different types of indirect action objects, the pointer could
either be the same of rte_flow_action* struct - in order not to
break the current driver implementation, or some wrapper
structures with bits as masks to indicate which part to be
updated, depending on real needs of the corresponding direct
action. For different direct actions, the structures of indirect
action objects updating will be different.
All the underlayer PMD callbacks will be moved to these new APIs.
The RTE_FLOW_ACTION_TYPE_SHARED is kept for now in order not to
break the ABI. All the implementations are changed by using
RTE_FLOW_ACTION_TYPE_INDIRECT.
Signed-off-by: Bing Zhao <bingz@nvidia.com>
---
doc/guides/rel_notes/release_21_05.rst | 3 +
lib/librte_ethdev/rte_flow.c | 56 ++++++++--------
lib/librte_ethdev/rte_flow.h | 118 +++++++++++++++++++--------------
lib/librte_ethdev/rte_flow_driver.h | 26 ++++----
lib/librte_ethdev/version.map | 8 +--
5 files changed, 115 insertions(+), 96 deletions(-)
diff --git a/doc/guides/rel_notes/release_21_05.rst b/doc/guides/rel_notes/release_21_05.rst
index 374d6d9..6c0ac46 100644
--- a/doc/guides/rel_notes/release_21_05.rst
+++ b/doc/guides/rel_notes/release_21_05.rst
@@ -164,6 +164,9 @@ API Changes
from ``rte_thread_tls_*`` to ``rte_thread_*`` to avoid naming redundancy
and confusion with the transport layer security term.
+* ethdev: The experimental shared action APIs in ``rte_flow.h`` has been
+ replaced from ``rte_flow_shared_action_*`` to indirect action APIs named
+ ``rte_flow_action_handle_*``.
ABI Changes
-----------
diff --git a/lib/librte_ethdev/rte_flow.c b/lib/librte_ethdev/rte_flow.c
index e07e617..27a1615 100644
--- a/lib/librte_ethdev/rte_flow.c
+++ b/lib/librte_ethdev/rte_flow.c
@@ -180,12 +180,12 @@ struct rte_flow_desc_data {
MK_FLOW_ACTION(MODIFY_FIELD,
sizeof(struct rte_flow_action_modify_field)),
/**
- * Shared action represented as handle of type
- * (struct rte_flow_shared action *) stored in conf field (see
+ * Indirect action represented as handle of type
+ * (struct rte_flow_action_handle *) stored in conf field (see
* struct rte_flow_action); no need for additional structure to * store
- * shared action handle.
+ * indirect action handle.
*/
- MK_FLOW_ACTION(SHARED, 0),
+ MK_FLOW_ACTION(INDIRECT, 0),
};
int
@@ -1067,53 +1067,53 @@ enum rte_flow_conv_item_spec_type {
NULL, rte_strerror(ENOTSUP));
}
-struct rte_flow_shared_action *
-rte_flow_shared_action_create(uint16_t port_id,
- const struct rte_flow_shared_action_conf *conf,
+struct rte_flow_action_handle *
+rte_flow_action_handle_create(uint16_t port_id,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action,
struct rte_flow_error *error)
{
- struct rte_flow_shared_action *shared_action;
+ struct rte_flow_action_handle *handle;
const struct rte_flow_ops *ops = rte_flow_ops_get(port_id, error);
if (unlikely(!ops))
return NULL;
- if (unlikely(!ops->shared_action_create)) {
+ if (unlikely(!ops->action_handle_create)) {
rte_flow_error_set(error, ENOSYS,
RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
rte_strerror(ENOSYS));
return NULL;
}
- shared_action = ops->shared_action_create(&rte_eth_devices[port_id],
- conf, action, error);
- if (shared_action == NULL)
+ handle = ops->action_handle_create(&rte_eth_devices[port_id],
+ conf, action, error);
+ if (handle == NULL)
flow_err(port_id, -rte_errno, error);
- return shared_action;
+ return handle;
}
int
-rte_flow_shared_action_destroy(uint16_t port_id,
- struct rte_flow_shared_action *action,
- struct rte_flow_error *error)
+rte_flow_action_handle_destroy(uint16_t port_id,
+ struct rte_flow_action_handle *handle,
+ struct rte_flow_error *error)
{
int ret;
const struct rte_flow_ops *ops = rte_flow_ops_get(port_id, error);
if (unlikely(!ops))
return -rte_errno;
- if (unlikely(!ops->shared_action_destroy))
+ if (unlikely(!ops->action_handle_destroy))
return rte_flow_error_set(error, ENOSYS,
RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
NULL, rte_strerror(ENOSYS));
- ret = ops->shared_action_destroy(&rte_eth_devices[port_id], action,
- error);
+ ret = ops->action_handle_destroy(&rte_eth_devices[port_id],
+ handle, error);
return flow_err(port_id, ret, error);
}
int
-rte_flow_shared_action_update(uint16_t port_id,
- struct rte_flow_shared_action *action,
- const struct rte_flow_action *update,
+rte_flow_action_handle_update(uint16_t port_id,
+ struct rte_flow_action_handle *handle,
+ const void *update,
struct rte_flow_error *error)
{
int ret;
@@ -1121,18 +1121,18 @@ struct rte_flow_shared_action *
if (unlikely(!ops))
return -rte_errno;
- if (unlikely(!ops->shared_action_update))
+ if (unlikely(!ops->action_handle_update))
return rte_flow_error_set(error, ENOSYS,
RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
NULL, rte_strerror(ENOSYS));
- ret = ops->shared_action_update(&rte_eth_devices[port_id], action,
+ ret = ops->action_handle_update(&rte_eth_devices[port_id], handle,
update, error);
return flow_err(port_id, ret, error);
}
int
-rte_flow_shared_action_query(uint16_t port_id,
- const struct rte_flow_shared_action *action,
+rte_flow_action_handle_query(uint16_t port_id,
+ const struct rte_flow_action_handle *handle,
void *data,
struct rte_flow_error *error)
{
@@ -1141,11 +1141,11 @@ struct rte_flow_shared_action *
if (unlikely(!ops))
return -rte_errno;
- if (unlikely(!ops->shared_action_query))
+ if (unlikely(!ops->action_handle_query))
return rte_flow_error_set(error, ENOSYS,
RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
NULL, rte_strerror(ENOSYS));
- ret = ops->shared_action_query(&rte_eth_devices[port_id], action,
+ ret = ops->action_handle_query(&rte_eth_devices[port_id], handle,
data, error);
return flow_err(port_id, ret, error);
}
diff --git a/lib/librte_ethdev/rte_flow.h b/lib/librte_ethdev/rte_flow.h
index 6cc5713..91ae25b 100644
--- a/lib/librte_ethdev/rte_flow.h
+++ b/lib/librte_ethdev/rte_flow.h
@@ -1821,7 +1821,7 @@ enum rte_flow_action_type {
* Enables counters for this flow rule.
*
* These counters can be retrieved and reset through rte_flow_query() or
- * rte_flow_shared_action_query() if the action provided via handle,
+ * rte_flow_action_handle_query() if the action provided via handle,
* see struct rte_flow_query_count.
*
* See struct rte_flow_action_count.
@@ -2267,6 +2267,16 @@ enum rte_flow_action_type {
* See struct rte_flow_action_modify_field.
*/
RTE_FLOW_ACTION_TYPE_MODIFY_FIELD,
+
+ /**
+ * Describe indirect action that could be used by a single flow rule
+ * or multiple flow rules.
+ *
+ * Allow flow rule(s) reference the same action by the indirect action
+ * handle (see struct rte_flow_action_handle), rules could be on the
+ * same port or across different ports.
+ */
+ RTE_FLOW_ACTION_TYPE_INDIRECT,
};
/**
@@ -2357,7 +2367,7 @@ struct rte_flow_query_age {
* ``struct rte_flow_query_count``.
*
* @deprecated Shared attribute is deprecated, use generic
- * RTE_FLOW_ACTION_TYPE_SHARED action.
+ * RTE_FLOW_ACTION_TYPE_INDIRECT action.
*
* The shared flag indicates whether the counter is unique to the flow rule the
* action is specified with, or whether it is a shared counter.
@@ -2847,17 +2857,23 @@ struct rte_flow_action_set_dscp {
};
/**
- * RTE_FLOW_ACTION_TYPE_SHARED
+ * @warning
+ * @b EXPERIMENTAL: this structure may change without prior notice
+ *
+ * RTE_FLOW_ACTION_TYPE_INDIRECT
*
- * Opaque type returned after successfully creating a shared action.
+ * Opaque type returned after successfully creating an indirect action object.
+ * The definition of the object handle will be different per driver or
+ * per immediate action type.
*
- * This handle can be used to manage and query the related action:
- * - share it across multiple flow rules
- * - update action configuration
- * - query action data
- * - destroy action
+ * This handle can be used to manage and query the related immediate action:
+ * - referenced in single flow rule or across multiple flow rules
+ * over multiple ports
+ * - update action object configuration
+ * - query action object data
+ * - destroy action object
*/
-struct rte_flow_shared_action;
+struct rte_flow_action_handle;
/**
* Field IDs for MODIFY_FIELD action.
@@ -3628,25 +3644,22 @@ struct rte_flow_desc {
uint32_t nb_contexts, struct rte_flow_error *error);
/**
- * Specify shared action configuration
+ * Specify indirect action object configuration
*/
-struct rte_flow_shared_action_conf {
+struct rte_flow_indir_action_conf {
/**
- * Flow direction for shared action configuration.
+ * Flow direction for the indirect action configuration.
*
- * Shared action should be valid at least for one flow direction,
+ * Action should be valid at least for one flow direction,
* otherwise it is invalid for both ingress and egress rules.
*/
uint32_t ingress:1;
/**< Action valid for rules applied to ingress traffic. */
uint32_t egress:1;
/**< Action valid for rules applied to egress traffic. */
-
/**
* When set to 1, indicates that the action is valid for
* transfer traffic; otherwise, for non-transfer traffic.
- *
- * See struct rte_flow_attr.
*/
uint32_t transfer:1;
};
@@ -3655,16 +3668,17 @@ struct rte_flow_shared_action_conf {
* @warning
* @b EXPERIMENTAL: this API may change without prior notice.
*
- * Create shared action for reuse in multiple flow rules.
- * The created shared action has single state and configuration
- * across all flow rules using it.
+ * Create an indirect action object that can be used by flow create, and
+ * could also be shared by different flows.
+ * The created object handle has single state and configuration
+ * across all the flow rules using it.
*
* @param[in] port_id
* The port identifier of the Ethernet device.
* @param[in] conf
- * Shared action configuration.
+ * Action configuration for the indirect action object creation.
* @param[in] action
- * Action configuration for shared action creation.
+ * Specific configuration of the indirect action object.
* @param[out] error
* Perform verbose error reporting if not NULL. PMDs initialize this
* structure in case of error only.
@@ -3678,9 +3692,9 @@ struct rte_flow_shared_action_conf {
* - (ENOTSUP) if *action* valid but unsupported.
*/
__rte_experimental
-struct rte_flow_shared_action *
-rte_flow_shared_action_create(uint16_t port_id,
- const struct rte_flow_shared_action_conf *conf,
+struct rte_flow_action_handle *
+rte_flow_action_handle_create(uint16_t port_id,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action,
struct rte_flow_error *error);
@@ -3688,12 +3702,12 @@ struct rte_flow_shared_action *
* @warning
* @b EXPERIMENTAL: this API may change without prior notice.
*
- * Destroy the shared action by handle.
+ * Destroy indirect action by handle.
*
* @param[in] port_id
* The port identifier of the Ethernet device.
- * @param[in] action
- * Handle for the shared action to be destroyed.
+ * @param[in] handle
+ * Handle for the indirect action object to be destroyed.
* @param[out] error
* Perform verbose error reporting if not NULL. PMDs initialize this
* structure in case of error only.
@@ -3708,27 +3722,30 @@ struct rte_flow_shared_action *
*/
__rte_experimental
int
-rte_flow_shared_action_destroy(uint16_t port_id,
- struct rte_flow_shared_action *action,
+rte_flow_action_handle_destroy(uint16_t port_id,
+ struct rte_flow_action_handle *handle,
struct rte_flow_error *error);
/**
* @warning
* @b EXPERIMENTAL: this API may change without prior notice.
*
- * Update in-place the shared action configuration pointed by *action* handle
- * with the configuration provided as *update* argument.
- * The update of the shared action configuration effects all flow rules reusing
- * the action via handle.
+ * Update in-place the action configuration and / or state pointed
+ * by action *handle* with the configuration provided as *update* argument.
+ * The update of the action configuration effects all flow rules reusing
+ * the action via *handle*.
+ * The update general pointer provides the ability of partial updating.
*
* @param[in] port_id
* The port identifier of the Ethernet device.
- * @param[in] action
- * Handle for the shared action to be updated.
+ * @param[in] handle
+ * Handle for the indirect action object to be updated.
* @param[in] update
- * Action specification used to modify the action pointed by handle.
- * *update* should be of same type with the action pointed by the *action*
- * handle argument, otherwise considered as invalid.
+ * Update profile specification used to modify the action pointed by handle.
+ * *update* could be with the same type of the immediate action corresponding
+ * to the *handle* argument when creating, or a wrapper structure includes
+ * action configuration to be updated and bit fields to indicate the member
+ * of fields inside the action to update.
* @param[out] error
* Perform verbose error reporting if not NULL. PMDs initialize this
* structure in case of error only.
@@ -3739,32 +3756,32 @@ struct rte_flow_shared_action *
* - (-EIO) if underlying device is removed.
* - (-EINVAL) if *update* invalid.
* - (-ENOTSUP) if *update* valid but unsupported.
- * - (-ENOENT) if action pointed by *ctx* was not found.
+ * - (-ENOENT) if indirect action object pointed by *handle* was not found.
* rte_errno is also set.
*/
__rte_experimental
int
-rte_flow_shared_action_update(uint16_t port_id,
- struct rte_flow_shared_action *action,
- const struct rte_flow_action *update,
+rte_flow_action_handle_update(uint16_t port_id,
+ struct rte_flow_action_handle *handle,
+ const void *update,
struct rte_flow_error *error);
/**
* @warning
* @b EXPERIMENTAL: this API may change without prior notice.
*
- * Query the shared action by handle.
+ * Query the direct action by corresponding indirect action object handle.
*
* Retrieve action-specific data such as counters.
* Data is gathered by special action which may be present/referenced in
* more than one flow rule definition.
*
- * \see RTE_FLOW_ACTION_TYPE_COUNT
+ * @see RTE_FLOW_ACTION_TYPE_COUNT
*
* @param port_id
* Port identifier of Ethernet device.
- * @param[in] action
- * Handle for the shared action to query.
+ * @param[in] handle
+ * Handle for the action object to query.
* @param[in, out] data
* Pointer to storage for the associated query data type.
* @param[out] error
@@ -3776,10 +3793,9 @@ struct rte_flow_shared_action *
*/
__rte_experimental
int
-rte_flow_shared_action_query(uint16_t port_id,
- const struct rte_flow_shared_action *action,
- void *data,
- struct rte_flow_error *error);
+rte_flow_action_handle_query(uint16_t port_id,
+ const struct rte_flow_action_handle *handle,
+ void *data, struct rte_flow_error *error);
/* Tunnel has a type and the key information. */
struct rte_flow_tunnel {
diff --git a/lib/librte_ethdev/rte_flow_driver.h b/lib/librte_ethdev/rte_flow_driver.h
index da594d9..8d825eb 100644
--- a/lib/librte_ethdev/rte_flow_driver.h
+++ b/lib/librte_ethdev/rte_flow_driver.h
@@ -83,27 +83,27 @@ struct rte_flow_ops {
void **context,
uint32_t nb_contexts,
struct rte_flow_error *err);
- /** See rte_flow_shared_action_create() */
- struct rte_flow_shared_action *(*shared_action_create)
+ /** See rte_flow_action_handle_create() */
+ struct rte_flow_action_handle *(*action_handle_create)
(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action_conf *conf,
+ const struct rte_flow_indir_action_conf *conf,
const struct rte_flow_action *action,
struct rte_flow_error *error);
- /** See rte_flow_shared_action_destroy() */
- int (*shared_action_destroy)
+ /** See rte_flow_action_handle_destroy() */
+ int (*action_handle_destroy)
(struct rte_eth_dev *dev,
- struct rte_flow_shared_action *shared_action,
+ struct rte_flow_action_handle *handle,
struct rte_flow_error *error);
- /** See rte_flow_shared_action_update() */
- int (*shared_action_update)
+ /** See rte_flow_action_handle_update() */
+ int (*action_handle_update)
(struct rte_eth_dev *dev,
- struct rte_flow_shared_action *shared_action,
- const struct rte_flow_action *update,
+ struct rte_flow_action_handle *handle,
+ const void *update,
struct rte_flow_error *error);
- /** See rte_flow_shared_action_query() */
- int (*shared_action_query)
+ /** See rte_flow_action_handle_query() */
+ int (*action_handle_query)
(struct rte_eth_dev *dev,
- const struct rte_flow_shared_action *shared_action,
+ const struct rte_flow_action_handle *handle,
void *data,
struct rte_flow_error *error);
/** See rte_flow_tunnel_decap_set() */
diff --git a/lib/librte_ethdev/version.map b/lib/librte_ethdev/version.map
index 93ad388..4eb561a 100644
--- a/lib/librte_ethdev/version.map
+++ b/lib/librte_ethdev/version.map
@@ -231,10 +231,6 @@ EXPERIMENTAL {
rte_eth_fec_get_capability;
rte_eth_fec_get;
rte_eth_fec_set;
- rte_flow_shared_action_create;
- rte_flow_shared_action_destroy;
- rte_flow_shared_action_query;
- rte_flow_shared_action_update;
rte_flow_tunnel_decap_set;
rte_flow_tunnel_match;
rte_flow_get_restore_info;
@@ -246,6 +242,10 @@ EXPERIMENTAL {
# added in 21.05
rte_eth_representor_info_get;
+ rte_flow_action_handle_create;
+ rte_flow_action_handle_destroy;
+ rte_flow_action_handle_update;
+ rte_flow_action_handle_query;
};
INTERNAL {
--
1.8.3.1
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2020-04-24 7:07 [dpdk-dev] [PATCH v1 0/2] Use WFE for spinlock and ring Gavin Hu
2021-04-25 5:56 3% ` [dpdk-dev] " Ruifeng Wang
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2020-12-18 15:16 [dpdk-dev] [RFC 1/9] devargs: fix data buffer storage type Xueming Li
2021-04-13 3:14 ` [dpdk-dev] [PATCH v5 0/5] eal: enable global device syntax by default Xueming Li
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2021-04-16 7:00 3% ` David Marchand
2021-04-16 12:32 0% ` Aaron Conole
2021-04-16 12:43 5% ` [dpdk-dev] [dpdklab] " Lincoln Lavoie
2021-04-16 12:58 0% ` Thomas Monjalon
2021-04-16 13:14 0% ` Lincoln Lavoie
2021-04-14 19:49 3% ` [dpdk-dev] [PATCH v5 0/5] eal: enable global device syntax by default Thomas Monjalon
2021-04-23 11:06 0% ` Kinsella, Ray
2021-04-23 11:39 3% ` Gaëtan Rivet
2021-04-23 12:35 0% ` Kinsella, Ray
2021-01-12 1:04 [dpdk-dev] [PATCH] eal/rwlock: add note about writer starvation Stephen Hemminger
2021-02-11 22:51 ` [dpdk-dev] [PATCH v2] " Thomas Monjalon
2021-02-12 0:21 ` Honnappa Nagarahalli
2021-05-12 19:10 0% ` Thomas Monjalon
2021-02-04 14:34 [dpdk-dev] [PATCH] cryptodev: support multiple cipher block sizes Matan Azrad
2021-04-13 18:19 4% ` [dpdk-dev] [PATCH v3] cryptodev: support multiple cipher data-units Thomas Monjalon
2021-04-13 19:48 0% ` Matan Azrad
2021-04-13 20:42 10% ` [dpdk-dev] [PATCH v4] " Thomas Monjalon
2021-04-14 18:37 0% ` [dpdk-dev] [EXT] " Akhil Goyal
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2021-04-15 19:31 0% ` David Marchand
2021-03-11 13:13 [dpdk-dev] [PATCH v9 00/10] ethdev: support SubFunction representor Xueming Li
2021-03-11 13:13 ` [dpdk-dev] [PATCH v9 05/10] kvargs: update parser to support multiple lists Xueming Li
2021-04-12 16:42 3% ` Kinsella, Ray
2021-03-14 12:18 [dpdk-dev] [PATCH] cryptodev: support multiple cipher data-units Matan Azrad
[not found] ` <20210404150809.2154241-1-matan@nvidia.com>
2021-04-13 12:02 ` [dpdk-dev] [EXT] [PATCH v2] " Akhil Goyal
2021-04-13 16:39 3% ` Thomas Monjalon
2021-03-16 22:18 [dpdk-dev] [PATCH 01/25] event/dlb2: add dlb v2.5 probe Timothy McDaniel
2021-04-13 20:14 ` [dpdk-dev] [PATCH v3 00/26] Add DLB V2.5 Timothy McDaniel
2021-04-13 20:14 ` [dpdk-dev] [PATCH v3 25/26] event/dlb: remove version from device name Timothy McDaniel
2021-04-14 19:31 4% ` Jerin Jacob
2021-04-14 19:42 0% ` McDaniel, Timothy
2021-04-14 19:44 ` Jerin Jacob
2021-04-14 20:33 3% ` Thomas Monjalon
2021-04-15 3:22 0% ` McDaniel, Timothy
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2021-04-15 7:48 0% ` Thomas Monjalon
2021-04-15 7:56 0% ` Jerin Jacob
2021-03-18 11:20 [dpdk-dev] [PATCH v2] lib/mempool: distinguish debug counters from cache and pool Joyce Kong
2021-04-20 0:07 ` [dpdk-dev] [PATCH v3 0/2] lib/mempool: add debug stats Dharmik Thakkar
2021-04-20 0:08 ` [dpdk-dev] [PATCH v3 2/2] lib/mempool: distinguish debug counters from cache and pool Dharmik Thakkar
2021-04-21 16:29 3% ` Olivier Matz
2021-04-22 21:27 0% ` Dharmik Thakkar
2021-04-22 21:47 0% ` Honnappa Nagarahalli
2021-04-23 10:41 0% ` Kinsella, Ray
2021-03-18 12:25 [dpdk-dev] [PATCH] ethdev: add queue state when retrieve queue information Lijun Ou
2021-03-25 11:09 ` [dpdk-dev] [PATCH V2] " Lijun Ou
2021-04-06 0:49 ` oulijun
2021-04-06 1:55 ` Stephen Hemminger
2021-04-14 10:09 3% ` Ferruh Yigit
2021-04-06 14:02 ` Ananyev, Konstantin
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2021-04-15 2:40 8% ` [dpdk-dev] [PATCH V3] " Lijun Ou
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2021-04-15 13:34 3% ` Thomas Monjalon
2021-04-16 0:58 0% ` [dpdk-dev] [Linuxarm] " oulijun
2021-04-16 7:31 0% ` Ferruh Yigit
2021-04-16 8:46 8% ` [dpdk-dev] [PATCH V4] " Lijun Ou
2021-04-16 8:58 3% ` Thomas Monjalon
2021-04-16 9:41 0% ` Ferruh Yigit
2021-04-16 9:57 3% ` Thomas Monjalon
2021-04-23 11:08 3% ` Kinsella, Ray
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2021-04-26 9:48 0% ` Kinsella, Ray
2021-04-16 9:55 0% ` oulijun
2021-04-16 9:19 0% ` Ananyev, Konstantin
2021-04-17 3:09 8% ` [dpdk-dev] [PATCH V5] " Lijun Ou
2021-04-17 22:00 0% ` Ferruh Yigit
2021-04-19 1:39 0% ` oulijun
2021-04-19 2:04 0% ` oulijun
2021-04-19 2:03 7% ` [dpdk-dev] [PATCH V6] " Lijun Ou
2021-04-19 8:41 0% ` Thomas Monjalon
2021-04-19 8:58 0% ` oulijun
2021-04-19 8:57 3% ` [dpdk-dev] [PATCH v7] " Lijun Ou
2021-04-19 9:03 0% ` Thomas Monjalon
2021-04-19 10:48 0% ` Ferruh Yigit
2021-04-23 11:17 0% ` [dpdk-dev] [PATCH V5] " Kinsella, Ray
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2021-04-23 15:43 3% ` Kinsella, Ray
2021-03-18 18:20 [dpdk-dev] [PATCH v1 0/6] ioat driver updates Bruce Richardson
2021-04-30 11:17 ` [dpdk-dev] [PATCH v3 00/12] " Bruce Richardson
2021-04-30 11:17 2% ` [dpdk-dev] [PATCH v3 12/12] raw/ioat: report status of completed jobs Bruce Richardson
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2021-04-26 9:52 ` [dpdk-dev] [PATCH v2 00/12] ioat driver updates Bruce Richardson
2021-04-26 9:52 1% ` [dpdk-dev] [PATCH v2 12/12] raw/ioat: report status of completed jobs Bruce Richardson
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2021-04-03 1:38 ` [dpdk-dev] [PATCH v6 00/10] eal: Add new API for threading Narcisa Ana Maria Vasile
2021-04-03 1:38 ` [dpdk-dev] [PATCH v6 01/10] eal: add thread id and simple thread functions Narcisa Ana Maria Vasile
2021-04-29 0:50 3% ` Dmitry Kozlyuk
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2021-04-29 16:00 0% ` Tyler Retzlaff
2021-04-29 16:28 0% ` Dmitry Kozlyuk
2021-04-30 6:37 0% ` Narcisa Ana Maria Vasile
2021-03-31 22:45 [dpdk-dev] [PATCH] eal: move DMA mapping from bus-specific to generic driver Thomas Monjalon
2021-03-31 22:53 ` Thomas Monjalon
2021-04-12 15:03 0% ` Kinsella, Ray
2021-04-01 9:52 [dpdk-dev] [PATCH 0/5] Offload flags fixes David Marchand
2021-04-29 8:04 ` [dpdk-dev] [PATCH v2 0/4] " David Marchand
2021-04-29 8:04 ` [dpdk-dev] [PATCH v2 4/4] vhost: fix offload flags in Rx path David Marchand
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2021-04-30 8:38 3% ` Maxime Coquelin
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2021-05-03 16:43 2% ` [dpdk-dev] [PATCH v4 3/3] vhost: fix offload flags in Rx path David Marchand
2021-05-04 11:07 0% ` Flavio Leitner
2021-05-08 6:24 0% ` Wang, Yinan
2021-05-12 3:29 0% ` Wang, Yinan
2021-05-04 8:29 0% ` [dpdk-dev] [PATCH v4 0/3] Offload flags fixes Maxime Coquelin
2021-04-01 11:49 [dpdk-dev] [RFC PATCH 00/14] Build file update proposals Bruce Richardson
2021-04-16 17:04 ` [dpdk-dev] [PATCH 00/14] Build file updates Bruce Richardson
2021-04-16 17:04 1% ` [dpdk-dev] [PATCH 13/14] lib: remove librte_ prefix from directory names Bruce Richardson
2021-04-20 10:22 ` [dpdk-dev] [PATCH v2 00/16] Build file updates Bruce Richardson
2021-04-20 10:22 1% ` [dpdk-dev] [PATCH v2 14/16] lib: remove librte_ prefix from directory names Bruce Richardson
2021-04-04 7:45 [dpdk-dev] [PATCH v4 0/2] fix gtp psc qfi support Raslan Darawsheh
2021-04-29 8:10 3% ` [dpdk-dev] [PATCH v5 0/1] add new hdr for gtp qfi Raslan Darawsheh
2021-04-07 11:28 [dpdk-dev] Questions about API with no parameter check Min Hu (Connor)
2021-04-07 11:40 ` Thomas Monjalon
2021-04-07 11:53 ` Ananyev, Konstantin
2021-04-07 13:19 ` Jerin Jacob
2021-04-07 14:40 ` Ajit Khaparde
2021-04-07 15:25 ` Hemant Agrawal
2021-04-07 16:10 ` Ferruh Yigit
2021-04-29 16:16 ` Tyler Retzlaff
2021-04-29 18:49 ` Dmitry Kozlyuk
2021-05-04 9:36 ` Ananyev, Konstantin
2021-05-05 15:58 3% ` Tyler Retzlaff
2021-04-09 3:54 [dpdk-dev] [PATCH] ethdev: introduce indirect action APIs Bing Zhao
2021-04-10 14:03 ` [dpdk-dev] [PATCH v2 0/4] Change shared action API to action handle API Bing Zhao
2021-04-10 14:03 4% ` [dpdk-dev] [PATCH v2 1/4] ethdev: introduce indirect action APIs Bing Zhao
2021-04-12 19:42 0% ` Ferruh Yigit
2021-04-13 1:26 0% ` Bing Zhao
2021-04-13 14:00 0% ` Ori Kam
2021-04-13 12:36 0% ` Andrey Vesnovaty
2021-04-15 13:55 0% ` Andrew Rybchenko
2021-04-15 14:10 0% ` Thomas Monjalon
2021-04-15 16:02 0% ` Andrew Rybchenko
2021-04-15 15:51 ` [dpdk-dev] [PATCH v3 0/1] Change shared action API to action handle API Bing Zhao
2021-04-15 15:51 1% ` [dpdk-dev] [PATCH v3 1/1] ethdev: introduce indirect action APIs Bing Zhao
2021-04-15 15:56 0% ` Ori Kam
2021-04-15 17:59 0% ` Ajit Khaparde
2021-04-16 6:58 0% ` Bing Zhao
2021-04-16 7:03 0% ` Thomas Monjalon
2021-04-16 15:00 0% ` Ajit Khaparde
2021-04-16 17:33 ` [dpdk-dev] [PATCH v4 0/1] Change shared action API to action handle API Bing Zhao
2021-04-16 17:33 1% ` [dpdk-dev] [PATCH v4 1/1] ethdev: introduce indirect action APIs Bing Zhao
2021-04-19 14:28 ` [dpdk-dev] [PATCH v5] Change shared action API to action handle API Bing Zhao
2021-04-19 14:28 1% ` [dpdk-dev] [PATCH v5] ethdev: introduce indirect action APIs Bing Zhao
2021-04-19 14:38 ` [dpdk-dev] [PATCH v5 0/1] Change shared action API to action handle API Bing Zhao
2021-04-19 14:38 1% ` [dpdk-dev] [PATCH v5 1/1] ethdev: introduce indirect action APIs Bing Zhao
2021-04-10 9:18 [dpdk-dev] [PATCH] ethdev: add sanity checks in control APIs Min Hu (Connor)
2021-04-13 3:22 ` [dpdk-dev] [PATCH v2] " Min Hu (Connor)
2021-04-29 17:48 3% ` Tyler Retzlaff
2021-04-29 18:18 0% ` Stephen Hemminger
2021-04-12 7:43 [dpdk-dev] [PATCH v7 0/3] Enhancements to crypto adapter forward mode Shijith Thotton
2021-04-13 10:29 ` [dpdk-dev] [PATCH v8 " Shijith Thotton
2021-04-13 10:29 ` [dpdk-dev] [PATCH v8 1/3] eventdev: introduce crypto adapter enqueue API Shijith Thotton
2021-04-14 7:28 4% ` Jerin Jacob Kollanukkaran
2021-04-14 7:58 3% ` Akhil Goyal
2021-04-14 8:18 3% ` Thomas Monjalon
2021-04-14 8:39 0% ` [dpdk-dev] [EXT] " Akhil Goyal
2021-04-14 8:43 0% ` Thomas Monjalon
2021-04-14 12:20 ` [dpdk-dev] [PATCH v9 0/4] Enhancements to crypto adapter forward mode gakhil
2021-04-14 12:20 4% ` [dpdk-dev] [PATCH v9 4/4] devtools: add exception for reserved fields gakhil
2021-04-14 12:53 0% ` Thomas Monjalon
2021-04-14 14:16 0% ` [dpdk-dev] [EXT] " Akhil Goyal
2021-04-14 14:22 0% ` Thomas Monjalon
2021-04-12 8:28 [dpdk-dev] [PATCH 0/3] add lock-free stack support discovery Stanislaw Kardach
2021-04-12 8:29 4% ` [dpdk-dev] [PATCH 2/3] stack: add lock-free support indication Stanislaw Kardach
2021-04-12 13:20 [dpdk-dev] [pull-request] dpdk-next-net-eventdev - 21.05 - PRE-RC1 Jerin Jacob Kollanukkaran
2021-04-12 22:12 ` Thomas Monjalon
2021-04-13 7:15 5% ` David Marchand
2021-04-13 7:31 0% ` Thomas Monjalon
2021-04-13 8:45 15% ` [dpdk-dev] [PATCH] devtools: skip removed DLB driver in ABI check Thomas Monjalon
2021-04-13 9:15 4% ` David Marchand
2021-04-13 9:32 4% ` Thomas Monjalon
2021-04-13 16:09 4% ` Kinsella, Ray
2021-04-13 16:44 4% ` Thomas Monjalon
2021-04-13 16:45 4% ` Kinsella, Ray
2021-04-13 8:54 5% ` [dpdk-dev] [pull-request] dpdk-next-net-eventdev - 21.05 - PRE-RC1 Jerin Jacob
2021-04-13 9:01 0% ` Thomas Monjalon
2021-04-13 9:07 0% ` David Marchand
2021-04-13 9:12 3% ` Thomas Monjalon
2021-04-13 9:14 5% ` David Marchand
2021-04-13 12:58 0% ` Aaron Conole
2021-04-12 21:53 23% [dpdk-dev] [PATCH] devtools: test different build types Thomas Monjalon
2021-05-21 15:03 0% ` David Marchand
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2021-04-14 18:04 ` [dpdk-dev] [PATCH v10 0/4] Enhancements to crypto adapter forward mode gakhil
2021-04-14 18:04 4% ` [dpdk-dev] [PATCH v10 1/4] devtools: add exception for reserved fields gakhil
2021-04-14 20:57 0% ` David Marchand
2021-04-15 5:32 0% ` [dpdk-dev] [EXT] " Akhil Goyal
2021-04-15 7:26 0% ` David Marchand
2021-04-15 8:25 0% ` Bruce Richardson
2021-04-15 9:08 3% [dpdk-dev] [PATCH] doc: announce modification in eventdev structure gakhil
2021-04-18 9:11 0% ` Jerin Jacob
2021-04-23 10:53 3% ` Kinsella, Ray
2021-05-03 11:18 0% ` [dpdk-dev] [EXT] " Akhil Goyal
2021-05-04 9:36 3% ` Kinsella, Ray
2021-05-07 9:17 0% ` Jerin Jacob
2021-04-15 11:34 3% [dpdk-dev] DPDK Release Status Meeting 15/04/2021 Ferruh Yigit
2021-04-15 16:32 7% [dpdk-dev] [PATCH] ci: bump ABI reference version David Marchand
2021-04-15 16:57 7% ` Thomas Monjalon
2021-04-15 19:28 7% ` David Marchand
2021-04-15 19:38 8% ` [dpdk-dev] [PATCH v2 1/2] ci: fix ABI reference generation David Marchand
2021-04-15 19:40 7% ` [dpdk-dev] [PATCH v2 2/2] ci: bump ABI reference version David Marchand
2021-04-15 19:43 8% ` [dpdk-dev] [PATCH v2 1/2] ci: fix ABI reference generation David Marchand
2021-04-15 19:43 7% ` [dpdk-dev] [PATCH v2 2/2] ci: bump ABI reference version David Marchand
2021-04-16 12:11 4% ` David Marchand
2021-04-16 6:39 4% ` [dpdk-dev] [PATCH v2 1/2] ci: fix ABI reference generation Juraj Linkeš
2021-04-16 9:17 4% ` David Marchand
2021-04-16 9:20 4% ` Thomas Monjalon
2021-04-16 9:49 4% ` David Marchand
2021-04-16 9:55 4% ` Thomas Monjalon
2021-04-20 15:30 9% [dpdk-dev] UNH-IOL ABI Failures Brandon Lo
2021-04-20 15:37 4% ` [dpdk-dev] [dpdk-ci] " Thomas Monjalon
2021-04-20 17:02 7% ` Brandon Lo
2021-04-23 6:13 3% [dpdk-dev] [PATCH v1] common/iavf: fix wrong order of protocol header types Ting Xu
2021-04-23 8:07 3% [dpdk-dev] [PATCH v1 2/2] " Ting Xu
2021-04-25 6:53 3% [dpdk-dev] [PATCH v2] " Ting Xu
2021-04-29 0:49 0% ` Zhang, Qi Z
2021-04-27 15:07 3% [dpdk-dev] [dpdk-techboard] Minutes of Technical Board Meeting, 2021-04-21 Ananyev, Konstantin
2021-04-28 9:49 1% [dpdk-dev] [PATCH 1/3] common/sfc_efx/base: update MCDI headers Ivan Malov
2021-05-22 19:32 1% ` [dpdk-dev] [PATCH v2 " Ivan Malov
2021-05-24 11:18 1% ` [dpdk-dev] [PATCH v3 " Ivan Malov
2021-05-24 11:48 ` [dpdk-dev] [PATCH v4 0/3] Match On VLAN Presence In Transfer Flows Ivan Malov
2021-05-24 11:48 1% ` [dpdk-dev] [PATCH v4 1/3] common/sfc_efx/base: update MCDI headers Ivan Malov
[not found] <mailman.11957.1619175668.25471.dev@dpdk.org>
2021-05-12 15:32 2% ` [dpdk-dev] dev Digest, Vol 348, Issue 163 Dharmappa, Savinay
2021-05-19 5:02 3% [dpdk-dev] DTS Workgroup: MoM 05/12/2021 Honnappa Nagarahalli
2021-05-20 23:17 3% [dpdk-dev] [PATCH v1] doc: update release notes for 21.05 John McNamara
2021-05-20 23:24 3% ` [dpdk-dev] [PATCH v2] " John McNamara
2021-05-21 16:45 7% [dpdk-dev] [PATCH] version: 21.08-rc0 David Marchand
2021-05-21 18:05 3% [dpdk-dev] [dpdk-announce] DPDK 21.05 released Thomas Monjalon
2021-05-24 10:58 3% [dpdk-dev] [RFC PATCH 0/3] Add PIE support for HQoS library Liguzinski, WojciechX
2021-05-24 16:19 0% ` Stephen Hemminger
2021-05-25 8:56 0% ` Morten Brørup
[not found] <YKdg/B0dJOqC74ii@platinum>
2021-05-25 11:50 4% ` [dpdk-dev] Minutes of Technical Board Meeting, 2021-05-19 Olivier Matz
2021-05-27 15:28 [dpdk-dev] [PATCH] net: introduce IPv4 ihl and version fields Gregory Etelson
2021-05-27 15:56 3% ` Morten Brørup
2021-05-28 10:20 0% ` Ananyev, Konstantin
2021-05-28 10:52 0% ` Morten Brørup
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