* Re: [dpdk-dev] [pull-request] next-crypto 21.08 rc1
2021-07-07 21:57 5% ` Thomas Monjalon
2021-07-08 7:39 0% ` [dpdk-dev] [EXT] " Akhil Goyal
@ 2021-07-08 7:41 0% ` Thomas Monjalon
1 sibling, 0 replies; 200+ results
From: Thomas Monjalon @ 2021-07-08 7:41 UTC (permalink / raw)
To: Akhil Goyal; +Cc: Shijith Thotton, dev, jerinj, david.marchand
07/07/2021 23:57, Thomas Monjalon:
> 07/07/2021 21:30, Akhil Goyal:
> > Shijith Thotton (2):
> > drivers: add octeontx crypto adapter framework
> > drivers: add octeontx crypto adapter data path
>
> It seems there is an ABI breakage:
>
> devtools/check-abi.sh: line 38: 958581 Segmentation fault
> (core dumped) abidiff $ABIDIFF_OPTIONS $dump $dump2
> Error: ABI issue reported for 'abidiff --suppr devtools/libabigail.abignore --no-added-syms --headers-dir1 v21.05/build-gcc-shared/usr/local/include --headers-dir2 build-gcc-shared/install/usr/local/include v21.05/build-gcc-shared/dump/librte_crypto_octeontx.dump build-gcc-shared/install/dump/librte_crypto_octeontx.dump'
>
> Without this series, the ABI check is passing.
After updating libabigail, it passes OK.
Note there was another bug, in PPC toolchain this time.
After upgrading to recent PPC toolchain it is OK.
What a difficult pull request for the tools!
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [EXT] Re: [pull-request] next-crypto 21.08 rc1
2021-07-07 21:57 5% ` Thomas Monjalon
@ 2021-07-08 7:39 0% ` Akhil Goyal
2021-07-08 7:41 0% ` [dpdk-dev] " Thomas Monjalon
1 sibling, 0 replies; 200+ results
From: Akhil Goyal @ 2021-07-08 7:39 UTC (permalink / raw)
To: Thomas Monjalon, Shijith Thotton
Cc: dev, Jerin Jacob Kollanukkaran, david.marchand
> 07/07/2021 21:30, Akhil Goyal:
> > Shijith Thotton (2):
> > drivers: add octeontx crypto adapter framework
> > drivers: add octeontx crypto adapter data path
>
> It seems there is an ABI breakage:
>
> devtools/check-abi.sh: line 38: 958581 Segmentation fault
> (core dumped) abidiff $ABIDIFF_OPTIONS $dump $dump2
> Error: ABI issue reported for 'abidiff --suppr devtools/libabigail.abignore --
> no-added-syms --headers-dir1 v21.05/build-gcc-shared/usr/local/include --
> headers-dir2 build-gcc-shared/install/usr/local/include v21.05/build-gcc-
> shared/dump/librte_crypto_octeontx.dump build-gcc-
> shared/install/dump/librte_crypto_octeontx.dump'
>
> Without this series, the ABI check is passing.
>
I do not see this error at my end + there is no such issue reported on CI.
On CI it failed only on FreeBSD, and that too was a false report.
Can you paste the output of
'abidiff --suppr devtools/libabigail.abignore --no-added-syms --headers-dir1 v21.05/build-gcc-shared/usr/local/include --headers-dir2 build-gcc-shared/install/usr/local/include v21.05/build-gcc-shared/dump/librte_crypto_octeontx.dump build-gcc-shared/install/dump/librte_crypto_octeontx.dump'
Regards,
Akhil
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [pull-request] next-crypto 21.08 rc1
@ 2021-07-07 21:57 5% ` Thomas Monjalon
2021-07-08 7:39 0% ` [dpdk-dev] [EXT] " Akhil Goyal
2021-07-08 7:41 0% ` [dpdk-dev] " Thomas Monjalon
0 siblings, 2 replies; 200+ results
From: Thomas Monjalon @ 2021-07-07 21:57 UTC (permalink / raw)
To: Akhil Goyal, Shijith Thotton; +Cc: dev, jerinj, david.marchand
07/07/2021 21:30, Akhil Goyal:
> Shijith Thotton (2):
> drivers: add octeontx crypto adapter framework
> drivers: add octeontx crypto adapter data path
It seems there is an ABI breakage:
devtools/check-abi.sh: line 38: 958581 Segmentation fault
(core dumped) abidiff $ABIDIFF_OPTIONS $dump $dump2
Error: ABI issue reported for 'abidiff --suppr devtools/libabigail.abignore --no-added-syms --headers-dir1 v21.05/build-gcc-shared/usr/local/include --headers-dir2 build-gcc-shared/install/usr/local/include v21.05/build-gcc-shared/dump/librte_crypto_octeontx.dump build-gcc-shared/install/dump/librte_crypto_octeontx.dump'
Without this series, the ABI check is passing.
^ permalink raw reply [relevance 5%]
* Re: [dpdk-dev] ABI/API stability towards drivers
2021-07-02 8:00 8% [dpdk-dev] ABI/API stability towards drivers Morten Brørup
2021-07-02 9:45 7% ` [dpdk-dev] [dpdk-techboard] " Ferruh Yigit
2021-07-02 12:26 4% ` Thomas Monjalon
@ 2021-07-07 18:46 8% ` Tyler Retzlaff
2 siblings, 0 replies; 200+ results
From: Tyler Retzlaff @ 2021-07-07 18:46 UTC (permalink / raw)
To: Morten Brørup; +Cc: dpdk-techboard, dpdk-dev
On Fri, Jul 02, 2021 at 10:00:11AM +0200, Morten Brørup wrote:
> Regarding the ongoing ABI stability project, it is suggested to export driver interfaces as internal.
>
> What are we targeting regarding ABI and API stability towards drivers?
last discussed the outcome was that there was no promise of api/abi stability
at all for drivers only applications. tech-board may have discussed it
further i don't know.
we (Microsoft) would like to see them evolve to stable abi/api but we
understand the challenges and effort involved. so driver stability is
pretty much the interface consumers problem right now for drivers built
in-tree and out of tree.
^ permalink raw reply [relevance 8%]
* Re: [dpdk-dev] [PATCH v3] doc: policy on the promotion of experimental APIs
2021-07-01 10:38 23% ` [dpdk-dev] [PATCH v3] doc: policy on the " Ray Kinsella
@ 2021-07-07 18:32 0% ` Tyler Retzlaff
0 siblings, 0 replies; 200+ results
From: Tyler Retzlaff @ 2021-07-07 18:32 UTC (permalink / raw)
To: Ray Kinsella
Cc: dev, bruce.richardson, john.mcnamara, ferruh.yigit, thomas,
david.marchand, stephen
On Thu, Jul 01, 2021 at 11:38:42AM +0100, Ray Kinsella wrote:
> Clarifying the ABI policy on the promotion of experimental APIS to stable.
> We have a fair number of APIs that have been experimental for more than
> 2 years. This policy amendment indicates that these APIs should be
> promoted or removed, or should at least form a conservation between the
> maintainer and original contributor.
>
> Signed-off-by: Ray Kinsella <mdr@ashroe.eu>
> ---
Acked-By: Tyler Retzlaff <roretzla@microsoft.com>
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] Use WFE for spinlock and ring
@ 2021-07-07 14:47 0% ` Stephen Hemminger
0 siblings, 0 replies; 200+ results
From: Stephen Hemminger @ 2021-07-07 14:47 UTC (permalink / raw)
To: Ruifeng Wang
Cc: dev, david.marchand, thomas, jerinj, nd, honnappa.nagarahalli
On Sun, 25 Apr 2021 05:56:51 +0000
Ruifeng Wang <ruifeng.wang@arm.com> wrote:
> The rte_wait_until_equal_xxx APIs abstract the functionality of 'polling
> for a memory location to become equal to a given value'[1].
>
> Use the API for the rte spinlock and ring implementations.
> With the wait until equal APIs being stable, changes will not impact ABI.
>
> [1] http://patches.dpdk.org/cover/62703/
>
> v3:
> Series rebased. (David)
>
> Gavin Hu (1):
> spinlock: use wfe to reduce contention on aarch64
>
> Ruifeng Wang (1):
> ring: use wfe to wait for ring tail update on aarch64
>
> lib/eal/include/generic/rte_spinlock.h | 4 ++--
> lib/ring/rte_ring_c11_pvt.h | 4 ++--
> lib/ring/rte_ring_generic_pvt.h | 3 +--
> 3 files changed, 5 insertions(+), 6 deletions(-)
>
Other places that should use WFE:
rte_mcslock.h:rte_mcslock_lock()
rte_mcslock_unlock:rte_mcslock_unlock()
rte_pflock.h:rte_pflock_lock()
rte_rwlock.h:rte_rwlock_read_lock()
rte_rwlock.h:rte_rwlock_write_lock()
You should also introduce rte_wait_while_XXX variants to handle some
of these cases.
^ permalink raw reply [relevance 0%]
* [dpdk-dev] [dpdk-announce] DPDK 20.11.2 released
@ 2021-07-07 12:37 1% Xueming(Steven) Li
0 siblings, 0 replies; 200+ results
From: Xueming(Steven) Li @ 2021-07-07 12:37 UTC (permalink / raw)
To: announce
Hi all,
Here is a new stable release:
https://fast.dpdk.org/rel/dpdk-20.11.2.tar.xz
The git tree is at:
https://git.dpdk.org/dpdk-stable/log/?h=20.11
Special thanks to Luca for his great help on this version!
Xueming Li <xuemingl@nvidia.com>
---
.ci/linux-build.sh | 59 ++-
.github/workflows/build.yml | 130 +++++
.travis.yml | 51 +-
MAINTAINERS | 1 +
VERSION | 2 +-
app/meson.build | 4 -
app/test-bbdev/test_bbdev_perf.c | 7 +-
app/test-compress-perf/comp_perf_options_parse.c | 2 +-
app/test-crypto-perf/cperf_options_parsing.c | 8 +-
app/test-eventdev/evt_options.c | 4 +-
app/test-eventdev/parser.c | 4 +-
app/test-eventdev/parser.h | 2 +-
app/test-eventdev/test_perf_common.c | 22 +-
app/test-flow-perf/main.c | 47 +-
app/test-pmd/bpf_cmd.c | 2 +-
app/test-pmd/cmdline.c | 29 +-
app/test-pmd/cmdline_flow.c | 2 +
app/test-pmd/config.c | 108 +++-
app/test-pmd/parameters.c | 39 +-
app/test-pmd/testpmd.c | 35 +-
app/test-pmd/testpmd.h | 3 +-
app/test-regex/main.c | 7 +-
app/test/autotest_test_funcs.py | 5 +-
app/test/meson.build | 3 -
app/test/packet_burst_generator.c | 1 +
app/test/process.h | 10 +-
app/test/test.c | 11 +-
app/test/test_bpf.c | 2 +-
app/test/test_cmdline_ipaddr.c | 2 +-
app/test/test_cmdline_num.c | 4 +-
app/test/test_cryptodev.c | 44 +-
app/test/test_cryptodev_blockcipher.c | 2 +-
app/test/test_debug.c | 11 +-
app/test/test_distributor_perf.c | 6 +-
app/test/test_event_timer_adapter.c | 4 +-
app/test/test_external_mem.c | 3 +-
app/test/test_flow_classify.c | 6 +
app/test/test_kni.c | 8 +-
app/test/test_mbuf.c | 9 +-
app/test/test_mempool.c | 2 +-
app/test/test_power_cpufreq.c | 97 +++-
app/test/test_prefetch.c | 2 +-
app/test/test_reciprocal_division_perf.c | 41 +-
app/test/test_stack.c | 4 +
app/test/test_stack_perf.c | 4 +
app/test/test_table_tables.c | 3 +-
app/test/test_timer_secondary.c | 8 +-
app/test/test_trace_perf.c | 5 +-
buildtools/binutils-avx512-check.sh | 2 +-
buildtools/check-symbols.sh | 2 +-
buildtools/list-dir-globs.py | 2 +-
buildtools/map-list-symbol.sh | 2 +-
buildtools/meson.build | 2 +-
config/meson.build | 9 +-
config/ppc/meson.build | 17 +-
devtools/check-symbol-maps.sh | 3 +-
devtools/checkpatches.sh | 3 +-
doc/api/doxy-api.conf.in | 3 +-
doc/guides/conf.py | 49 +-
doc/guides/contributing/documentation.rst | 74 +--
doc/guides/cryptodevs/caam_jr.rst | 2 +-
doc/guides/cryptodevs/qat.rst | 2 +-
doc/guides/cryptodevs/virtio.rst | 2 +-
doc/guides/eventdevs/dlb2.rst | 41 +-
doc/guides/linux_gsg/linux_drivers.rst | 10 +
doc/guides/nics/enic.rst | 32 +-
doc/guides/nics/hns3.rst | 6 +-
doc/guides/nics/i40e.rst | 2 +-
doc/guides/nics/ice.rst | 2 +-
doc/guides/nics/netvsc.rst | 2 +-
doc/guides/nics/nfp.rst | 10 +-
doc/guides/nics/virtio.rst | 5 +-
doc/guides/nics/vmxnet3.rst | 3 +-
doc/guides/prog_guide/vhost_lib.rst | 12 +
doc/guides/rel_notes/known_issues.rst | 10 +-
doc/guides/rel_notes/release_20_05.rst | 7 +
doc/guides/rel_notes/release_20_11.rst | 556 +++++++++++++++++++++
doc/guides/sample_app_ug/vhost.rst | 2 +-
doc/guides/testpmd_app_ug/run_app.rst | 10 +-
doc/guides/testpmd_app_ug/testpmd_funcs.rst | 3 +-
drivers/bus/dpaa/base/fman/fman_hw.c | 33 +-
drivers/bus/dpaa/base/fman/netcfg_layer.c | 4 +-
drivers/bus/dpaa/base/qbman/bman_driver.c | 13 +-
drivers/bus/dpaa/base/qbman/qman_driver.c | 17 +-
drivers/bus/dpaa/include/fsl_qman.h | 2 +-
drivers/bus/dpaa/include/netcfg.h | 1 -
drivers/bus/fslmc/fslmc_logs.h | 2 -
drivers/bus/fslmc/qbman/include/compat.h | 3 -
drivers/bus/fslmc/qbman/qbman_portal.c | 14 +-
drivers/bus/pci/linux/pci_uio.c | 12 +
drivers/bus/pci/rte_bus_pci.h | 13 +-
drivers/bus/pci/windows/pci.c | 28 +-
drivers/common/dpaax/caamflib/compat.h | 12 +-
drivers/common/dpaax/compat.h | 5 -
drivers/common/dpaax/dpaax_iova_table.c | 4 +-
drivers/common/dpaax/meson.build | 1 -
drivers/common/iavf/virtchnl.h | 6 +-
drivers/common/mlx5/linux/mlx5_glue.c | 18 +
drivers/common/mlx5/linux/mlx5_glue.h | 2 +
drivers/common/mlx5/mlx5_common.c | 9 +-
drivers/common/mlx5/mlx5_devx_cmds.c | 140 +++++-
drivers/common/mlx5/mlx5_devx_cmds.h | 16 +
drivers/common/mlx5/mlx5_prm.h | 155 +++++-
drivers/common/mlx5/version.map | 5 +-
drivers/common/octeontx2/otx2_mbox.h | 7 +
drivers/common/qat/qat_device.h | 2 +-
drivers/common/sfc_efx/base/ef10_filter.c | 11 +-
drivers/common/sfc_efx/base/ef10_nic.c | 10 +-
drivers/common/sfc_efx/base/efx_mae.c | 61 ++-
drivers/common/sfc_efx/base/efx_mcdi.c | 10 +
drivers/common/sfc_efx/base/efx_pci.c | 3 +-
drivers/common/sfc_efx/base/rhead_nic.c | 1 -
drivers/compress/qat/qat_comp.c | 7 +-
drivers/compress/qat/qat_comp_pmd.c | 111 ++--
drivers/crypto/bcmfs/bcmfs_logs.c | 17 +-
drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 50 +-
drivers/crypto/dpaa_sec/dpaa_sec.c | 14 +
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drivers/crypto/octeontx2/otx2_cryptodev_qp.h | 4 +-
drivers/crypto/qat/qat_sym.c | 10 +-
drivers/crypto/zuc/rte_zuc_pmd.c | 8 +-
drivers/event/dlb/dlb.c | 2 +-
drivers/event/dlb/pf/dlb_pf.c | 3 +-
drivers/event/dlb2/dlb2.c | 2 +-
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drivers/event/dlb2/pf/dlb2_pf.c | 3 +-
drivers/event/dpaa2/dpaa2_eventdev_logs.h | 2 -
drivers/event/octeontx2/otx2_evdev.c | 65 ++-
drivers/event/octeontx2/otx2_evdev_adptr.c | 2 +-
drivers/event/octeontx2/otx2_evdev_crypto_adptr.c | 110 ++--
drivers/meson.build | 2 +-
drivers/net/af_xdp/rte_eth_af_xdp.c | 3 +-
drivers/net/ark/ark_ethdev.c | 3 +
drivers/net/ark/ark_ethdev_rx.c | 49 +-
drivers/net/ark/ark_pktdir.c | 2 +-
drivers/net/ark/ark_pktdir.h | 2 +-
drivers/net/atlantic/atl_ethdev.c | 7 +-
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drivers/net/bnx2x/bnx2x_rxtx.c | 13 +-
drivers/net/bnxt/bnxt.h | 23 +-
drivers/net/bnxt/bnxt_cpr.h | 4 +
drivers/net/bnxt/bnxt_ethdev.c | 514 +++++++++++++++----
drivers/net/bnxt/bnxt_flow.c | 56 ++-
drivers/net/bnxt/bnxt_hwrm.c | 185 ++++---
drivers/net/bnxt/bnxt_hwrm.h | 9 +-
drivers/net/bnxt/bnxt_reps.c | 4 +-
drivers/net/bnxt/bnxt_rxq.c | 33 +-
drivers/net/bnxt/bnxt_rxr.c | 25 +-
drivers/net/bnxt/bnxt_rxr.h | 4 +-
drivers/net/bnxt/bnxt_stats.c | 23 +-
drivers/net/bnxt/bnxt_stats.h | 7 +-
drivers/net/bnxt/bnxt_txr.c | 2 +-
drivers/net/bnxt/bnxt_util.h | 2 +
drivers/net/bnxt/bnxt_vnic.c | 4 +-
drivers/net/bnxt/bnxt_vnic.h | 4 +-
drivers/net/bonding/eth_bond_private.h | 2 +-
drivers/net/bonding/rte_eth_bond_8023ad.c | 17 +-
drivers/net/bonding/rte_eth_bond_api.c | 26 +-
drivers/net/bonding/rte_eth_bond_args.c | 8 +-
drivers/net/bonding/rte_eth_bond_pmd.c | 7 +-
drivers/net/cxgbe/base/common.h | 18 +-
drivers/net/dpaa/dpaa_ethdev.c | 26 +-
drivers/net/dpaa2/dpaa2_ethdev.c | 25 +-
drivers/net/e1000/base/e1000_i210.c | 2 +
drivers/net/e1000/e1000_logs.c | 49 +-
drivers/net/e1000/em_ethdev.c | 21 +-
drivers/net/e1000/igb_ethdev.c | 33 +-
drivers/net/e1000/igb_flow.c | 2 +-
drivers/net/e1000/igb_rxtx.c | 9 +-
drivers/net/ena/base/ena_com.c | 60 ++-
drivers/net/ena/base/ena_defs/ena_admin_defs.h | 85 ++--
drivers/net/ena/base/ena_eth_com.c | 16 +-
drivers/net/ena/base/ena_plat_dpdk.h | 9 +-
drivers/net/ena/ena_ethdev.c | 38 +-
drivers/net/ena/ena_platform.h | 12 -
drivers/net/enic/base/vnic_dev.c | 2 +-
drivers/net/enic/base/vnic_enet.h | 1 +
drivers/net/enic/enic.h | 4 +-
drivers/net/enic/enic_ethdev.c | 85 ++--
drivers/net/enic/enic_fm_flow.c | 6 +-
drivers/net/enic/enic_main.c | 161 +++---
drivers/net/enic/enic_res.c | 7 +-
drivers/net/failsafe/failsafe_ops.c | 10 +-
drivers/net/hinic/base/hinic_compat.h | 25 +-
drivers/net/hinic/hinic_pmd_ethdev.c | 5 +
drivers/net/hns3/hns3_cmd.c | 24 +-
drivers/net/hns3/hns3_cmd.h | 21 +-
drivers/net/hns3/hns3_dcb.c | 109 ++--
drivers/net/hns3/hns3_dcb.h | 4 +-
drivers/net/hns3/hns3_ethdev.c | 443 +++++++++-------
drivers/net/hns3/hns3_ethdev.h | 46 +-
drivers/net/hns3/hns3_ethdev_vf.c | 121 ++---
drivers/net/hns3/hns3_fdir.c | 52 +-
drivers/net/hns3/hns3_fdir.h | 5 +-
drivers/net/hns3/hns3_flow.c | 112 ++++-
drivers/net/hns3/hns3_intr.c | 73 ++-
drivers/net/hns3/hns3_intr.h | 4 +-
drivers/net/hns3/hns3_logs.h | 2 +-
drivers/net/hns3/hns3_mbx.c | 256 +++++++---
drivers/net/hns3/hns3_mbx.h | 32 +-
drivers/net/hns3/hns3_mp.c | 6 +-
drivers/net/hns3/hns3_mp.h | 2 +-
drivers/net/hns3/hns3_regs.c | 9 +-
drivers/net/hns3/hns3_regs.h | 2 +-
drivers/net/hns3/hns3_rss.c | 2 +-
drivers/net/hns3/hns3_rss.h | 2 +-
drivers/net/hns3/hns3_rxtx.c | 307 +++++++++---
drivers/net/hns3/hns3_rxtx.h | 37 +-
drivers/net/hns3/hns3_rxtx_vec.c | 38 +-
drivers/net/hns3/hns3_rxtx_vec.h | 5 +-
drivers/net/hns3/hns3_rxtx_vec_neon.h | 2 +-
drivers/net/hns3/hns3_rxtx_vec_sve.c | 34 +-
drivers/net/hns3/hns3_stats.c | 10 +-
drivers/net/hns3/hns3_stats.h | 6 +-
drivers/net/hns3/meson.build | 2 +-
drivers/net/i40e/base/virtchnl.h | 29 +-
drivers/net/i40e/i40e_ethdev.c | 167 +++++--
drivers/net/i40e/i40e_ethdev.h | 5 +-
drivers/net/i40e/i40e_ethdev_vf.c | 95 ++--
drivers/net/i40e/i40e_fdir.c | 89 ++++
drivers/net/i40e/i40e_flow.c | 181 ++++---
drivers/net/i40e/i40e_pf.c | 65 +++
drivers/net/i40e/i40e_rxtx.c | 2 -
drivers/net/i40e/i40e_rxtx_vec_neon.c | 20 +-
drivers/net/iavf/iavf.h | 6 +-
drivers/net/iavf/iavf_ethdev.c | 16 +-
drivers/net/iavf/iavf_rxtx.c | 5 +
drivers/net/iavf/iavf_rxtx.h | 2 +-
drivers/net/iavf/iavf_rxtx_vec_avx2.c | 120 +----
drivers/net/iavf/iavf_rxtx_vec_avx512.c | 13 +-
drivers/net/iavf/iavf_rxtx_vec_common.h | 203 ++++++++
drivers/net/iavf/iavf_vchnl.c | 25 +-
drivers/net/ice/base/ice_flow.c | 11 +-
drivers/net/ice/base/ice_lan_tx_rx.h | 2 +-
drivers/net/ice/base/ice_osdep.h | 2 +-
drivers/net/ice/base/ice_switch.c | 3 +-
drivers/net/ice/base/meson.build | 5 +
drivers/net/ice/ice_dcf_parent.c | 2 +
drivers/net/ice/ice_ethdev.c | 56 ++-
drivers/net/ice/ice_hash.c | 14 +
drivers/net/ice/ice_rxtx_vec_avx2.c | 120 +----
drivers/net/ice/ice_rxtx_vec_avx512.c | 5 +-
drivers/net/ice/ice_rxtx_vec_common.h | 203 ++++++++
drivers/net/ice/meson.build | 2 +
drivers/net/igc/igc_ethdev.c | 46 +-
drivers/net/igc/igc_ethdev.h | 3 +-
drivers/net/igc/igc_flow.c | 2 +-
drivers/net/igc/igc_txrx.c | 30 +-
drivers/net/ionic/ionic_ethdev.c | 15 +-
drivers/net/ionic/ionic_lif.c | 5 +-
drivers/net/ixgbe/ixgbe_ethdev.c | 22 +-
drivers/net/kni/rte_eth_kni.c | 12 +-
drivers/net/memif/rte_eth_memif.c | 1 +
drivers/net/memif/rte_eth_memif.h | 4 -
drivers/net/mlx4/mlx4.c | 1 +
drivers/net/mlx4/mlx4_flow.c | 3 +-
drivers/net/mlx4/mlx4_mp.c | 2 +-
drivers/net/mlx4/mlx4_rxtx.c | 4 -
drivers/net/mlx4/mlx4_txq.c | 19 +-
drivers/net/mlx5/linux/mlx5_ethdev_os.c | 4 +-
drivers/net/mlx5/linux/mlx5_mp_os.c | 2 +-
drivers/net/mlx5/linux/mlx5_os.c | 37 +-
drivers/net/mlx5/linux/mlx5_socket.c | 4 -
drivers/net/mlx5/linux/mlx5_verbs.c | 121 +++++
drivers/net/mlx5/linux/mlx5_verbs.h | 2 +
drivers/net/mlx5/mlx5.c | 19 +-
drivers/net/mlx5/mlx5.h | 20 +-
drivers/net/mlx5/mlx5_devx.c | 4 +
drivers/net/mlx5/mlx5_flow.c | 103 ++--
drivers/net/mlx5/mlx5_flow.h | 68 ++-
drivers/net/mlx5/mlx5_flow_age.c | 5 +-
drivers/net/mlx5/mlx5_flow_dv.c | 311 ++++++++----
drivers/net/mlx5/mlx5_mr.c | 11 +
drivers/net/mlx5/mlx5_rxtx.c | 16 +-
drivers/net/mlx5/mlx5_rxtx.h | 1 +
drivers/net/mlx5/mlx5_rxtx_vec_altivec.h | 11 +-
drivers/net/mlx5/mlx5_rxtx_vec_neon.h | 13 +-
drivers/net/mlx5/mlx5_rxtx_vec_sse.h | 9 +-
drivers/net/mlx5/mlx5_trigger.c | 10 +
drivers/net/mlx5/mlx5_txpp.c | 2 +
drivers/net/nfp/nfp_net.c | 26 +-
drivers/net/octeontx2/otx2_ethdev_ops.c | 5 +-
drivers/net/octeontx2/otx2_vlan.c | 8 +-
drivers/net/pcap/rte_eth_pcap.c | 12 +-
drivers/net/qede/base/ecore_int.c | 2 +-
drivers/net/qede/qede_ethdev.c | 9 +-
drivers/net/sfc/sfc_ef100_rx.c | 21 +-
drivers/net/sfc/sfc_ethdev.c | 8 -
drivers/net/sfc/sfc_mae.c | 25 +-
drivers/net/sfc/sfc_mae.h | 3 +-
drivers/net/tap/rte_eth_tap.c | 5 +-
drivers/net/tap/tap_flow.c | 8 +-
drivers/net/tap/tap_intr.c | 2 +-
drivers/net/txgbe/base/txgbe_eeprom.c | 76 +--
drivers/net/txgbe/base/txgbe_eeprom.h | 2 -
drivers/net/txgbe/base/txgbe_type.h | 1 +
drivers/net/txgbe/txgbe_ethdev.c | 47 +-
drivers/net/txgbe/txgbe_ptypes.c | 4 +-
drivers/net/virtio/virtio_rxtx_simple_altivec.c | 12 +-
drivers/net/virtio/virtio_rxtx_simple_neon.c | 12 +-
drivers/net/virtio/virtio_rxtx_simple_sse.c | 12 +-
drivers/net/virtio/virtio_user_ethdev.c | 75 ++-
drivers/raw/ifpga/ifpga_rawdev.c | 4 +-
drivers/raw/ifpga/ifpga_rawdev.h | 2 +
drivers/raw/ioat/dpdk_idxd_cfg.py | 10 +-
drivers/raw/ntb/ntb.c | 13 +
drivers/raw/ntb/ntb_hw_intel.c | 5 +
drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c | 1 +
drivers/raw/skeleton/skeleton_rawdev_test.c | 1 +
drivers/regex/mlx5/mlx5_regex.c | 1 +
drivers/regex/mlx5/mlx5_regex.h | 1 +
drivers/regex/mlx5/mlx5_regex_control.c | 1 +
drivers/regex/octeontx2/meson.build | 1 -
drivers/vdpa/ifc/base/ifcvf.c | 7 +-
drivers/vdpa/mlx5/mlx5_vdpa.c | 3 +
drivers/vdpa/mlx5/mlx5_vdpa.h | 1 +
drivers/vdpa/mlx5/mlx5_vdpa_event.c | 2 +
drivers/vdpa/mlx5/mlx5_vdpa_virtq.c | 8 +-
examples/bbdev_app/Makefile | 6 +-
examples/bbdev_app/main.c | 5 +-
examples/bond/Makefile | 6 +-
examples/bond/main.c | 4 +
examples/cmdline/Makefile | 6 +-
examples/cmdline/main.c | 3 +
examples/distributor/Makefile | 6 +-
examples/distributor/main.c | 3 +
examples/ethtool/ethtool-app/Makefile | 6 +-
examples/ethtool/ethtool-app/ethapp.c | 1 -
examples/ethtool/ethtool-app/main.c | 3 +
examples/ethtool/lib/Makefile | 6 +-
examples/eventdev_pipeline/Makefile | 6 +-
examples/fips_validation/Makefile | 6 +-
examples/fips_validation/main.c | 3 +
examples/flow_classify/Makefile | 6 +-
examples/flow_classify/flow_classify.c | 5 +-
examples/flow_filtering/Makefile | 6 +-
examples/flow_filtering/main.c | 7 +-
examples/helloworld/Makefile | 6 +-
examples/helloworld/main.c | 4 +
examples/ioat/Makefile | 6 +-
examples/ioat/ioatfwd.c | 3 +
examples/ip_fragmentation/Makefile | 6 +-
examples/ip_fragmentation/main.c | 3 +
examples/ip_pipeline/Makefile | 6 +-
examples/ip_reassembly/Makefile | 6 +-
examples/ip_reassembly/main.c | 3 +
examples/ipsec-secgw/Makefile | 6 +-
examples/ipsec-secgw/ipsec-secgw.c | 3 +
examples/ipv4_multicast/Makefile | 6 +-
examples/ipv4_multicast/main.c | 3 +
examples/kni/Makefile | 6 +-
examples/kni/main.c | 3 +
examples/l2fwd-cat/Makefile | 6 +-
examples/l2fwd-cat/l2fwd-cat.c | 5 +-
examples/l2fwd-crypto/Makefile | 6 +-
examples/l2fwd-crypto/main.c | 23 +
examples/l2fwd-event/Makefile | 6 +-
examples/l2fwd-event/main.c | 3 +
examples/l2fwd-jobstats/Makefile | 6 +-
examples/l2fwd-jobstats/main.c | 3 +
examples/l2fwd-keepalive/Makefile | 6 +-
examples/l2fwd-keepalive/ka-agent/Makefile | 6 +-
examples/l2fwd-keepalive/main.c | 4 +
examples/l2fwd/Makefile | 6 +-
examples/l2fwd/main.c | 3 +
examples/l3fwd-acl/Makefile | 6 +-
examples/l3fwd-acl/main.c | 3 +
examples/l3fwd-graph/Makefile | 6 +-
examples/l3fwd-graph/main.c | 3 +
examples/l3fwd-power/Makefile | 6 +-
examples/l3fwd-power/main.c | 4 +-
examples/l3fwd/Makefile | 6 +-
examples/l3fwd/l3fwd_lpm.c | 26 +-
examples/l3fwd/main.c | 4 +
examples/link_status_interrupt/Makefile | 6 +-
examples/link_status_interrupt/main.c | 3 +
examples/meson.build | 10 +-
.../client_server_mp/mp_client/Makefile | 6 +-
.../client_server_mp/mp_client/client.c | 3 +
.../client_server_mp/mp_server/Makefile | 6 +-
.../client_server_mp/mp_server/main.c | 4 +
examples/multi_process/hotplug_mp/Makefile | 6 +-
examples/multi_process/simple_mp/Makefile | 6 +-
examples/multi_process/simple_mp/main.c | 4 +
examples/multi_process/symmetric_mp/Makefile | 6 +-
examples/multi_process/symmetric_mp/main.c | 3 +
examples/ntb/Makefile | 6 +-
examples/ntb/ntb_fwd.c | 3 +
examples/packet_ordering/Makefile | 6 +-
examples/packet_ordering/main.c | 6 +-
examples/performance-thread/l3fwd-thread/Makefile | 5 +-
examples/performance-thread/l3fwd-thread/main.c | 3 +
examples/performance-thread/pthread_shim/Makefile | 6 +-
examples/performance-thread/pthread_shim/main.c | 4 +
examples/pipeline/Makefile | 6 +-
examples/pipeline/main.c | 3 +
examples/ptpclient/Makefile | 6 +-
examples/ptpclient/ptpclient.c | 7 +-
examples/qos_meter/Makefile | 6 +-
examples/qos_meter/main.c | 3 +
examples/qos_sched/Makefile | 6 +-
examples/qos_sched/main.c | 3 +
examples/rxtx_callbacks/Makefile | 6 +-
examples/rxtx_callbacks/main.c | 6 +-
examples/server_node_efd/node/Makefile | 6 +-
examples/server_node_efd/node/node.c | 3 +
examples/server_node_efd/server/Makefile | 6 +-
examples/server_node_efd/server/main.c | 4 +
examples/service_cores/Makefile | 6 +-
examples/service_cores/main.c | 3 +
examples/skeleton/Makefile | 6 +-
examples/skeleton/basicfwd.c | 5 +-
examples/timer/Makefile | 6 +-
examples/timer/main.c | 23 +-
examples/vdpa/Makefile | 6 +-
examples/vdpa/main.c | 3 +
examples/vhost/Makefile | 6 +-
examples/vhost/main.c | 48 +-
examples/vhost/virtio_net.c | 8 +-
examples/vhost_blk/Makefile | 6 +-
examples/vhost_blk/vhost_blk.c | 3 +
examples/vhost_crypto/Makefile | 6 +-
examples/vhost_crypto/main.c | 5 +-
examples/vm_power_manager/Makefile | 6 +-
examples/vm_power_manager/guest_cli/Makefile | 6 +-
examples/vm_power_manager/guest_cli/main.c | 3 +
examples/vm_power_manager/main.c | 3 +
examples/vmdq/Makefile | 6 +-
examples/vmdq/main.c | 3 +
examples/vmdq_dcb/Makefile | 6 +-
examples/vmdq_dcb/main.c | 3 +
kernel/linux/kni/kni_net.c | 48 +-
lib/librte_acl/acl_run_avx512_common.h | 24 +
lib/librte_bpf/bpf_validate.c | 2 +-
lib/librte_eal/arm/rte_cpuflags.c | 2 +-
lib/librte_eal/common/eal_common_fbarray.c | 7 +-
lib/librte_eal/common/eal_common_options.c | 12 +-
lib/librte_eal/common/eal_common_proc.c | 27 +-
lib/librte_eal/common/eal_common_thread.c | 66 +--
lib/librte_eal/common/malloc_mp.c | 4 +-
lib/librte_eal/freebsd/eal.c | 4 +
lib/librte_eal/freebsd/include/rte_os.h | 6 +-
lib/librte_eal/include/rte_eal_paging.h | 2 +-
lib/librte_eal/include/rte_lcore.h | 8 +
lib/librte_eal/include/rte_reciprocal.h | 8 +
lib/librte_eal/include/rte_service.h | 5 +-
lib/librte_eal/include/rte_vfio.h | 7 +-
lib/librte_eal/linux/eal.c | 4 +
lib/librte_eal/linux/eal_log.c | 6 +-
lib/librte_eal/linux/eal_memalloc.c | 14 +-
lib/librte_eal/linux/eal_vfio.c | 98 ++--
lib/librte_eal/linux/eal_vfio.h | 1 +
lib/librte_eal/linux/include/rte_os.h | 8 +-
lib/librte_eal/unix/eal_file.c | 1 +
lib/librte_eal/unix/eal_unix_memory.c | 11 +-
lib/librte_eal/version.map | 1 -
lib/librte_eal/windows/eal.c | 4 +
lib/librte_eal/windows/eal_hugepages.c | 4 +
lib/librte_eal/windows/eal_memory.c | 2 +-
lib/librte_eal/windows/eal_thread.c | 4 +-
lib/librte_eal/windows/include/pthread.h | 16 +-
lib/librte_eal/windows/include/rte_os.h | 5 +-
lib/librte_eal/windows/include/sched.h | 1 +
lib/librte_ethdev/rte_ethdev.c | 14 +-
lib/librte_ethdev/rte_ethdev.h | 5 +
lib/librte_ethdev/rte_flow.h | 4 +-
lib/librte_eventdev/rte_event_crypto_adapter.c | 1 +
lib/librte_eventdev/rte_event_eth_rx_adapter.c | 5 +-
lib/librte_ip_frag/rte_ipv4_fragmentation.c | 34 +-
lib/librte_kni/rte_kni.c | 7 +-
lib/librte_kni/rte_kni_common.h | 1 +
lib/librte_mbuf/rte_mbuf_dyn.c | 10 +-
lib/librte_net/rte_ip.h | 2 +-
lib/librte_pipeline/rte_swx_pipeline.c | 494 ++++++++++++++----
lib/librte_power/guest_channel.c | 22 +-
lib/librte_power/power_acpi_cpufreq.c | 5 +-
lib/librte_power/power_pstate_cpufreq.c | 5 +-
lib/librte_power/rte_power_guest_channel.h | 8 -
lib/librte_power/version.map | 2 -
lib/librte_sched/rte_sched.c | 2 +-
lib/librte_stack/rte_stack.c | 4 +-
lib/librte_stack/rte_stack.h | 3 +-
lib/librte_stack/rte_stack_lf.h | 5 +
lib/librte_table/rte_swx_table_em.c | 6 +-
lib/librte_telemetry/rte_telemetry.h | 4 +
lib/librte_telemetry/telemetry.c | 2 +
lib/librte_vhost/rte_vhost.h | 1 +
lib/librte_vhost/socket.c | 5 +-
lib/librte_vhost/vhost.c | 8 +-
lib/librte_vhost/vhost.h | 14 +-
lib/librte_vhost/vhost_user.c | 3 -
lib/librte_vhost/virtio_net.c | 213 ++++++--
license/README | 4 +-
meson.build | 2 +-
494 files changed, 7573 insertions(+), 3561 deletions(-)
Adam Dybkowski (3):
common/qat: increase IM buffer size for GEN3
compress/qat: enable compression on GEN3
crypto/qat: fix null authentication request
Ajit Khaparde (7):
net/bnxt: fix RSS context cleanup
net/bnxt: check kvargs parsing
net/bnxt: fix resource cleanup
doc: fix formatting in testpmd guide
net/bnxt: fix mismatched type comparison in MAC restore
net/bnxt: check PCI config read
net/bnxt: fix mismatched type comparison in Rx
Alvin Zhang (11):
net/ice: fix VLAN filter with PF
net/i40e: fix input set field mask
net/igc: fix Rx RSS hash offload capability
net/igc: fix Rx error counter for bad length
net/e1000: fix Rx error counter for bad length
net/e1000: fix max Rx packet size
net/igc: fix Rx packet size
net/ice: fix fast mbuf freeing
net/iavf: fix VF to PF command failure handling
net/i40e: fix VF RSS configuration
net/igc: fix speed configuration
Anatoly Burakov (3):
fbarray: fix log message on truncation error
power: do not skip saving original P-state governor
power: save original ACPI governor always
Andrew Boyer (1):
net/ionic: fix completion type in lif init
Andrew Rybchenko (4):
net/failsafe: fix RSS hash offload reporting
net/failsafe: report minimum and maximum MTU
common/sfc_efx: remove GENEVE from supported tunnels
net/sfc: fix mark support in EF100 native Rx datapath
Andy Moreton (2):
common/sfc_efx/base: limit reported MCDI response length
common/sfc_efx/base: add missing MCDI response length checks
Ankur Dwivedi (1):
crypto/octeontx: fix session-less mode
Apeksha Gupta (1):
examples/l2fwd-crypto: skip masked devices
Arek Kusztal (1):
crypto/qat: fix offset for out-of-place scatter-gather
Beilei Xing (1):
net/i40evf: fix packet loss for X722
Bing Zhao (1):
net/mlx5: fix loopback for Direct Verbs queue
Bruce Richardson (2):
build: exclude meson files from examples installation
raw/ioat: fix script for configuring small number of queues
Chaoyong He (1):
doc: fix multiport syntax in nfp guide
Chenbo Xia (1):
examples/vhost: check memory table query
Chengchang Tang (20):
net/hns3: fix HW buffer size on MTU update
net/hns3: fix processing Tx offload flags
net/hns3: fix Tx checksum for UDP packets with special port
net/hns3: fix long task queue pairs reset time
ethdev: validate input in module EEPROM dump
ethdev: validate input in register info
ethdev: validate input in EEPROM info
net/hns3: fix rollback after setting PVID failure
net/hns3: fix timing in resetting queues
net/hns3: fix queue state when concurrent with reset
net/hns3: fix configure FEC when concurrent with reset
net/hns3: fix use of command status enumeration
examples: add eal cleanup to examples
net/bonding: fix adding itself as its slave
net/hns3: fix timing in mailbox
app/testpmd: fix max queue number for Tx offloads
net/tap: fix interrupt vector array size
net/bonding: fix socket ID check
net/tap: check ioctl on restore
examples/timer: fix time interval
Chengwen Feng (50):
net/hns3: fix flow counter value
net/hns3: fix VF mailbox head field
net/hns3: support get device version when dump register
net/hns3: fix some packet types
net/hns3: fix missing outer L4 UDP flag for VXLAN
net/hns3: remove VLAN/QinQ ptypes from support list
test: check thread creation
common/dpaax: fix possible null pointer access
examples/ethtool: remove unused parsing
net/hns3: fix flow director lock
net/e1000/base: fix timeout for shadow RAM write
net/hns3: fix setting default MAC address in bonding of VF
net/hns3: fix possible mismatched response of mailbox
net/hns3: fix VF handling LSC event in secondary process
net/hns3: fix verification of NEON support
mbuf: check shared memory before dumping dynamic space
eventdev: remove redundant thread name setting
eventdev: fix memory leakage on thread creation failure
net/kni: check init result
net/hns3: fix mailbox error message
net/hns3: fix processing link status message on PF
net/hns3: remove unused mailbox macro and struct
net/bonding: fix leak on remove
net/hns3: fix handling link update
net/i40e: fix negative VEB index
net/i40e: remove redundant VSI check in Tx queue setup
net/virtio: fix getline memory leakage
net/hns3: log time delta in decimal format
net/hns3: fix time delta calculation
net/hns3: remove unused macros
net/hns3: fix vector Rx burst limitation
net/hns3: remove read when enabling TM QCN error event
net/hns3: remove unused VMDq code
net/hns3: increase readability in logs
raw/ntb: check SPAD user index
raw/ntb: check memory allocations
ipc: check malloc sync reply result
eal: fix service core list parsing
ipc: use monotonic clock
net/hns3: return error on PCI config write failure
net/hns3: fix log on flow director clear
net/hns3: clear hash map on flow director clear
net/hns3: fix querying flow director counter for out param
net/hns3: fix TM QCN error event report by MSI-X
net/hns3: fix mailbox message ID in log
net/hns3: fix secondary process request start/stop Rx/Tx
net/hns3: fix ordering in secondary process initialization
net/hns3: fail setting FEC if one bit mode is not supported
net/mlx4: fix secondary process initialization ordering
net/mlx5: fix secondary process initialization ordering
Ciara Loftus (1):
net/af_xdp: fix error handling during Rx queue setup
Ciara Power (2):
telemetry: fix race on callbacks list
test/crypto: fix return value of a skipped test
Conor Walsh (1):
examples/l3fwd: fix LPM IPv6 subnets
Cristian Dumitrescu (3):
table: fix actions with different data size
pipeline: fix instruction translation
pipeline: fix endianness conversions
Dapeng Yu (3):
net/igc: remove MTU setting limitation
net/e1000: remove MTU setting limitation
examples/packet_ordering: fix port configuration
David Christensen (1):
config/ppc: reduce number of cores and NUMA nodes
David Harton (1):
net/ena: fix releasing Tx ring mbufs
David Hunt (4):
test/power: fix CPU frequency check
test/power: add turbo mode to frequency check
test/power: fix low frequency test when turbo enabled
test/power: fix turbo test
David Marchand (18):
doc: fix sphinx rtd theme import in GHA
service: clean references to removed symbol
eal: fix evaluation of log level option
ci: hook to GitHub Actions
ci: enable v21 ABI checks
ci: fix package installation in GitHub Actions
ci: ignore APT update failure in GitHub Actions
ci: catch coredumps
vhost: fix offload flags in Rx path
bus/fslmc: remove unused debug macro
eal: fix leak in shared lib mode detection
event/dpaa2: remove unused macros
net/ice/base: fix memory allocation wrapper
net/ice: fix leak on thread termination
devtools: fix orphan symbols check with busybox
net/vhost: restore pseudo TSO support
net/ark: fix leak on thread termination
build: fix drivers selection without Python
Dekel Peled (1):
common/mlx5: fix DevX read output buffer size
Dmitry Kozlyuk (4):
net/pcap: fix format string
eal/windows: add missing SPDX license tag
buildtools: fix all drivers disabled on Windows
examples/rxtx_callbacks: fix port ID format specifier
Ed Czeck (2):
net/ark: update packet director initial state
net/ark: refactor Rx buffer recovery
Elad Nachman (2):
kni: support async user request
kni: fix kernel deadlock with bifurcated device
Feifei Wang (2):
net/i40e: fix parsing packet type for NEON
test/trace: fix race on collected perf data
Ferruh Yigit (9):
power: remove duplicated symbols from map file
log/linux: make default output stderr
license: fix typos
drivers/net: fix FW version query
net/bnx2x: fix build with GCC 11
net/bnx2x: fix build with GCC 11
net/ice/base: fix build with GCC 11
net/tap: fix build with GCC 11
test/table: fix build with GCC 11
Gregory Etelson (2):
app/testpmd: fix tunnel offload flows cleanup
net/mlx5: fix tunnel offload private items location
Guoyang Zhou (1):
net/hinic: fix crash in secondary process
Haiyue Wang (1):
net/ixgbe: fix Rx errors statistics for UDP checksum
Harman Kalra (1):
event/octeontx2: fix device reconfigure for single slot
Heinrich Kuhn (1):
net/nfp: fix reporting of RSS capabilities
Hemant Agrawal (3):
ethdev: add missing buses in device iterator
crypto/dpaa_sec: affine the thread portal affinity
crypto/dpaa2_sec: fix close and uninit functions
Hongbo Zheng (9):
app/testpmd: fix Tx/Rx descriptor query error log
net/hns3: fix FLR miss detection
net/hns3: delete redundant blank line
bpf: fix JSLT validation
common/sfc_efx/base: fix dereferencing null pointer
power: fix sanity checks for guest channel read
net/hns3: fix VF alive notification after config restore
examples/l3fwd-power: fix empty poll thresholds
net/hns3: fix concurrent interrupt handling
Huisong Li (23):
net/hns3: fix device capabilities for copper media type
net/hns3: remove unused parameter markers
net/hns3: fix reporting undefined speed
net/hns3: fix link update when failed to get link info
net/hns3: fix flow control exception
app/testpmd: fix bitmap of link speeds when force speed
net/hns3: fix flow control mode
net/hns3: remove redundant mailbox response
net/hns3: fix DCB mode check
net/hns3: fix VMDq mode check
net/hns3: fix mbuf leakage
net/hns3: fix link status when port is stopped
net/hns3: fix link speed when port is down
app/testpmd: fix forward lcores number for DCB
app/testpmd: fix DCB forwarding configuration
app/testpmd: fix DCB re-configuration
app/testpmd: verify DCB config during forward config
net/hns3: fix Rx/Tx queue numbers check
net/hns3: fix requested FC mode rollback
net/hns3: remove meaningless packet buffer rollback
net/hns3: fix DCB configuration
net/hns3: fix DCB reconfiguration
net/hns3: fix link speed when VF device is down
Ibtisam Tariq (1):
examples/vhost_crypto: remove unused short option
Igor Chauskin (2):
net/ena: switch memcpy to optimized version
net/ena: fix parsing of large LLQ header device argument
Igor Russkikh (2):
net/qede: reduce log verbosity
net/qede: accept bigger RSS table
Ilya Maximets (1):
net/virtio: fix interrupt unregistering for listening socket
Ivan Malov (5):
net/sfc: fix buffer size for flow parse
net: fix comment in IPv6 header
net/sfc: fix error path inconsistency
common/sfc_efx/base: fix indication of MAE encap support
net/sfc: fix outer rule rollback on error
Jerin Jacob (1):
examples: fix pkg-config override
Jiawei Wang (4):
app/testpmd: fix NVGRE encap configuration
net/mlx5: fix resource release for mirror flow
net/mlx5: fix RSS flow item expansion for GRE key
net/mlx5: fix RSS flow item expansion for NVGRE
Jiawei Zhu (1):
net/mlx5: fix Rx segmented packets on mbuf starvation
Jiawen Wu (4):
net/txgbe: remove unused functions
net/txgbe: fix Rx missed packet counter
net/txgbe: update packet type
net/txgbe: fix QinQ strip
Jiayu Hu (2):
vhost: fix queue initialization
vhost: fix redundant vring status change notification
Jie Wang (1):
net/ice: fix VSI array out of bounds access
John Daley (2):
net/enic: fix flow initialization error handling
net/enic: enable GENEVE offload via VNIC configuration
Juraj Linkeš (1):
eal/arm64: fix platform register bit
Kai Ji (2):
test/crypto: fix auth-cipher compare length in OOP
test/crypto: copy offset data to OOP destination buffer
Kalesh AP (23):
net/bnxt: remove unused macro
net/bnxt: fix VNIC configuration
net/bnxt: fix firmware fatal error handling
net/bnxt: fix FW readiness check during recovery
net/bnxt: fix device readiness check
net/bnxt: fix VF info allocation
net/bnxt: fix HWRM and FW incompatibility handling
net/bnxt: mute some failure logs
app/testpmd: check MAC address query
net/bnxt: fix PCI write check
net/bnxt: fix link state operations
net/bnxt: fix timesync when PTP is not supported
net/bnxt: fix memory allocation for command response
net/bnxt: fix double free in port start failure
net/bnxt: fix configuring LRO
net/bnxt: fix health check alarm cancellation
net/bnxt: fix PTP support for Thor
net/bnxt: fix ring count calculation for Thor
net/bnxt: remove unnecessary forward declarations
net/bnxt: remove unused function parameters
net/bnxt: drop unused attribute
net/bnxt: fix single PF per port check
net/bnxt: prevent device access in error state
Kamil Vojanec (1):
net/mlx5/linux: fix firmware version
Kevin Traynor (5):
test/cmdline: fix inputs array
test/crypto: fix build with GCC 11
crypto/zuc: fix build with GCC 11
test: fix build with GCC 11
test/cmdline: silence clang 12 warning
Konstantin Ananyev (1):
acl: fix build with GCC 11
Lance Richardson (8):
net/bnxt: fix Rx buffer posting
net/bnxt: fix Tx length hint threshold
net/bnxt: fix handling of null flow mask
test: fix TCP header initialization
net/bnxt: fix Rx descriptor status
net/bnxt: fix Rx queue count
net/bnxt: fix dynamic VNIC count
eal: fix memory mapping on 32-bit target
Leyi Rong (1):
net/iavf: fix packet length parsing in AVX512
Li Zhang (1):
net/mlx5: fix flow actions index in cache
Luc Pelletier (2):
eal: fix race in control thread creation
eal: fix hang in control thread creation
Marvin Liu (5):
vhost: fix split ring potential buffer overflow
vhost: fix packed ring potential buffer overflow
vhost: fix batch dequeue potential buffer overflow
vhost: fix initialization of temporary header
vhost: fix initialization of async temporary header
Matan Azrad (5):
common/mlx5/linux: add glue function to query WQ
common/mlx5: add DevX command to query WQ
common/mlx5: add DevX commands for queue counters
vdpa/mlx5: fix virtq cleaning
vdpa/mlx5: fix device unplug
Michael Baum (1):
net/mlx5: fix flow age event triggering
Michal Krawczyk (5):
net/ena/base: improve style and comments
net/ena/base: fix type conversions by explicit casting
net/ena/base: destroy multiple wait events
net/ena: fix crash with unsupported device argument
net/ena: indicate Rx RSS hash presence
Min Hu (Connor) (25):
net/hns3: fix MTU config complexity
net/hns3: update HiSilicon copyright syntax
net/hns3: fix copyright date
examples/ptpclient: remove wrong comment
test/bpf: fix error message
doc: fix HiSilicon copyright syntax
net/hns3: remove unused macros
net/hns3: remove unused macro
app/eventdev: fix overflow in lcore list parsing
test/kni: fix a comment
test/kni: check init result
net/hns3: fix typos on comments
net/e1000: fix flow error message object
app/testpmd: fix division by zero on socket memory dump
net/kni: warn on stop failure
app/bbdev: check memory allocation
app/bbdev: fix HARQ error messages
raw/skeleton: add missing check after setting attribute
test/timer: check memzone allocation
app/crypto-perf: check memory allocation
examples/flow_classify: fix NUMA check of port and core
examples/l2fwd-cat: fix NUMA check of port and core
examples/skeleton: fix NUMA check of port and core
test: check flow classifier creation
test: fix division by zero
Murphy Yang (3):
net/ixgbe: fix RSS RETA being reset after port start
net/i40e: fix flow director config after flow validate
net/i40e: fix flow director for common pctypes
Natanael Copa (5):
common/dpaax/caamflib: fix build with musl
bus/dpaa: fix 64-bit arch detection
bus/dpaa: fix build with musl
net/cxgbe: remove use of uint type
app/testpmd: fix build with musl
Nipun Gupta (1):
bus/dpaa: fix statistics reading
Nithin Dabilpuram (3):
vfio: do not merge contiguous areas
vfio: fix DMA mapping granularity for IOVA as VA
test/mem: fix page size for external memory
Olivier Matz (1):
test/mempool: fix object initializer
Pallavi Kadam (1):
bus/pci: skip probing some Windows NDIS devices
Pavan Nikhilesh (4):
test/event: fix timeout accuracy
app/eventdev: fix timeout accuracy
app/eventdev: fix lcore parsing skipping last core
event/octeontx2: fix XAQ pool reconfigure
Pu Xu (1):
ip_frag: fix fragmenting IPv4 packet with header option
Qi Zhang (8):
net/ice/base: fix payload indicator on ptype
net/ice/base: fix uninitialized struct
net/ice/base: cleanup filter list on error
net/ice/base: fix memory allocation for MAC addresses
net/iavf: fix TSO max segment size
doc: fix matching versions in ice guide
net/iavf: fix wrong Tx context descriptor
common/iavf: fix duplicated offload bit
Radha Mohan Chintakuntla (1):
raw/octeontx2_dma: assign PCI device in DPI VF
Raslan Darawsheh (1):
ethdev: update flow item GTP QFI definition
Richael Zhuang (2):
test/power: add delay before checking CPU frequency
test/power: round CPU frequency to check
Robin Zhang (6):
net/i40e: announce request queue capability in PF
doc: update recommended versions for i40e
net/i40e: fix lack of MAC type when set MAC address
net/iavf: fix lack of MAC type when set MAC address
net/iavf: fix primary MAC type when starting port
net/i40e: fix primary MAC type when starting port
Rohit Raj (3):
net/dpaa2: fix getting link status
net/dpaa: fix getting link status
examples/l2fwd-crypto: fix packet length while decryption
Roy Shterman (1):
mem: fix freeing segments in --huge-unlink mode
Satheesh Paul (1):
net/octeontx2: fix VLAN filter
Savinay Dharmappa (1):
sched: fix traffic class oversubscription parameter
Shijith Thotton (3):
eventdev: fix case to initiate crypto adapter service
event/octeontx2: fix crypto adapter queue pair operations
event/octeontx2: configure crypto adapter xaq pool
Siwar Zitouni (1):
net/ice: fix disabling promiscuous mode
Somnath Kotur (5):
net/bnxt: fix xstats get
net/bnxt: fix Rx and Tx timestamps
net/bnxt: fix Tx timestamp init
net/bnxt: refactor multi-queue Rx configuration
net/bnxt: fix Rx timestamp when FIFO pending bit is set
Stanislaw Kardach (6):
test: proceed if timer subsystem already initialized
stack: allow lock-free only on relevant architectures
test/distributor: fix worker notification in burst mode
test/distributor: fix burst flush on worker quit
net/ena: remove endian swap functions
net/ena: report default ring size
Stephen Hemminger (2):
kni: refactor user request processing
net/bnxt: use prefix on global function
Suanming Mou (1):
net/mlx5: fix counter offset detection
Tal Shnaiderman (2):
eal/windows: fix default thread priority
eal/windows: fix return codes of pthread shim layer
Tengfei Zhang (1):
net/pcap: fix file descriptor leak on close
Thinh Tran (1):
test: fix autotest handling of skipped tests
Thomas Monjalon (18):
bus/pci: fix Windows kernel driver categories
eal: fix comment of OS-specific header files
buildtools: fix build with busybox
build: detect execinfo library on Linux
build: remove redundant _GNU_SOURCE definitions
eal: fix build with musl
net/igc: remove use of uint type
event/dlb: fix header includes for musl
examples/bbdev: fix header include for musl
drivers: fix log level after loading
app/regex: fix usage text
app/testpmd: fix usage text
doc: fix names of UIO drivers
doc: fix build with Sphinx 4
bus/pci: support I/O port operations with musl
app: fix exit messages
regex/octeontx2: remove unused include directory
doc: remove PDF requirements
Tianyu Li (1):
net/memif: fix Tx bps statistics for zero-copy
Timothy McDaniel (2):
event/dlb2: remove references to deferred scheduling
doc: fix runtime options in DLB2 guide
Tyler Retzlaff (1):
eal: add C++ include guard for reciprocal header
Vadim Podovinnikov (1):
net/bonding: fix LACP system address check
Venkat Duvvuru (1):
net/bnxt: fix queues per VNIC
Viacheslav Ovsiienko (16):
net/mlx5: fix external buffer pool registration for Rx queue
net/mlx5: fix metadata item validation for ingress flows
net/mlx5: fix hashed list size for tunnel flow groups
net/mlx5: fix UAR allocation diagnostics messages
common/mlx5: add timestamp format support to DevX
vdpa/mlx5: support timestamp format
net/mlx5: fix Rx metadata leftovers
net/mlx5: fix drop action for Direct Rules/Verbs
net/mlx4: fix RSS action with null hash key
net/mlx5: support timestamp format
regex/mlx5: support timestamp format
app/testpmd: fix segment number check
net/mlx5: remove drop queue function prototypes
net/mlx4: fix buffer leakage on device close
net/mlx5: fix probing device in legacy bonding mode
net/mlx5: fix receiving queue timestamp format
Wei Huang (1):
raw/ifpga: fix device name format
Wenjun Wu (3):
net/ice: check some functions return
net/ice: fix RSS hash update
net/ice: fix RSS for L2 packet
Wenwu Ma (1):
net/ice: fix illegal access when removing MAC filter
Wenzhuo Lu (2):
net/iavf: fix crash in AVX512
net/ice: fix crash in AVX512
Wisam Jaddo (1):
app/flow-perf: fix encap/decap actions
Xiao Wang (1):
vdpa/ifc: check PCI config read
Xiaoyu Min (4):
net/mlx5: support RSS expansion for IPv6 GRE
net/mlx5: fix shared inner RSS
net/mlx5: fix missing shared RSS hash types
net/mlx5: fix redundant flow after RSS expansion
Xiaoyun Li (2):
app/testpmd: remove unnecessary UDP tunnel check
net/i40e: fix IPv4 fragment offload
Xueming Li (4):
version: 20.11.2-rc1
net/virtio: fix vectorized Rx queue rearm
version: 20.11.2-rc2
version: 20.11.2
Youri Querry (1):
bus/fslmc: fix random portal hangs with qbman 5.0
Yunjian Wang (5):
vfio: fix API description
net/mlx5: fix using flow tunnel before null check
vfio: fix duplicated user mem map
net/mlx4: fix leak when configured repeatedly
net/mlx5: fix leak when configured repeatedly
^ permalink raw reply [relevance 1%]
* [dpdk-dev] [PATCH v7 4/7] power: remove thread safety from PMD power API's
2021-07-07 10:48 3% ` [dpdk-dev] [PATCH v7 1/7] power_intrinsics: use callbacks for comparison Anatoly Burakov
@ 2021-07-07 10:48 3% ` Anatoly Burakov
1 sibling, 0 replies; 200+ results
From: Anatoly Burakov @ 2021-07-07 10:48 UTC (permalink / raw)
To: dev, David Hunt; +Cc: konstantin.ananyev, ciara.loftus
Currently, we expect that only one callback can be active at any given
moment, for a particular queue configuration, which is relatively easy
to implement in a thread-safe way. However, we're about to add support
for multiple queues per lcore, which will greatly increase the
possibility of various race conditions.
We could have used something like an RCU for this use case, but absent
of a pressing need for thread safety we'll go the easy way and just
mandate that the API's are to be called when all affected ports are
stopped, and document this limitation. This greatly simplifies the
`rte_power_monitor`-related code.
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
Notes:
v2:
- Add check for stopped queue
- Clarified doc message
- Added release notes
doc/guides/rel_notes/release_21_08.rst | 4 +
lib/power/meson.build | 3 +
lib/power/rte_power_pmd_mgmt.c | 133 ++++++++++---------------
lib/power/rte_power_pmd_mgmt.h | 6 ++
4 files changed, 66 insertions(+), 80 deletions(-)
diff --git a/doc/guides/rel_notes/release_21_08.rst b/doc/guides/rel_notes/release_21_08.rst
index c1d063bb11..4b84c89c0b 100644
--- a/doc/guides/rel_notes/release_21_08.rst
+++ b/doc/guides/rel_notes/release_21_08.rst
@@ -119,6 +119,10 @@ API Changes
* eal: the ``rte_power_intrinsics`` API changed to use a callback mechanism.
+* rte_power: The experimental PMD power management API is no longer considered
+ to be thread safe; all Rx queues affected by the API will now need to be
+ stopped before making any changes to the power management scheme.
+
ABI Changes
-----------
diff --git a/lib/power/meson.build b/lib/power/meson.build
index c1097d32f1..4f6a242364 100644
--- a/lib/power/meson.build
+++ b/lib/power/meson.build
@@ -21,4 +21,7 @@ headers = files(
'rte_power_pmd_mgmt.h',
'rte_power_guest_channel.h',
)
+if cc.has_argument('-Wno-cast-qual')
+ cflags += '-Wno-cast-qual'
+endif
deps += ['timer', 'ethdev']
diff --git a/lib/power/rte_power_pmd_mgmt.c b/lib/power/rte_power_pmd_mgmt.c
index db03cbf420..9b95cf1794 100644
--- a/lib/power/rte_power_pmd_mgmt.c
+++ b/lib/power/rte_power_pmd_mgmt.c
@@ -40,8 +40,6 @@ struct pmd_queue_cfg {
/**< Callback mode for this queue */
const struct rte_eth_rxtx_callback *cur_cb;
/**< Callback instance */
- volatile bool umwait_in_progress;
- /**< are we currently sleeping? */
uint64_t empty_poll_stats;
/**< Number of empty polls */
} __rte_cache_aligned;
@@ -92,30 +90,11 @@ clb_umwait(uint16_t port_id, uint16_t qidx, struct rte_mbuf **pkts __rte_unused,
struct rte_power_monitor_cond pmc;
uint16_t ret;
- /*
- * we might get a cancellation request while being
- * inside the callback, in which case the wakeup
- * wouldn't work because it would've arrived too early.
- *
- * to get around this, we notify the other thread that
- * we're sleeping, so that it can spin until we're done.
- * unsolicited wakeups are perfectly safe.
- */
- q_conf->umwait_in_progress = true;
-
- rte_atomic_thread_fence(__ATOMIC_SEQ_CST);
-
- /* check if we need to cancel sleep */
- if (q_conf->pwr_mgmt_state == PMD_MGMT_ENABLED) {
- /* use monitoring condition to sleep */
- ret = rte_eth_get_monitor_addr(port_id, qidx,
- &pmc);
- if (ret == 0)
- rte_power_monitor(&pmc, UINT64_MAX);
- }
- q_conf->umwait_in_progress = false;
-
- rte_atomic_thread_fence(__ATOMIC_SEQ_CST);
+ /* use monitoring condition to sleep */
+ ret = rte_eth_get_monitor_addr(port_id, qidx,
+ &pmc);
+ if (ret == 0)
+ rte_power_monitor(&pmc, UINT64_MAX);
}
} else
q_conf->empty_poll_stats = 0;
@@ -177,12 +156,24 @@ clb_scale_freq(uint16_t port_id, uint16_t qidx,
return nb_rx;
}
+static int
+queue_stopped(const uint16_t port_id, const uint16_t queue_id)
+{
+ struct rte_eth_rxq_info qinfo;
+
+ if (rte_eth_rx_queue_info_get(port_id, queue_id, &qinfo) < 0)
+ return -1;
+
+ return qinfo.queue_state == RTE_ETH_QUEUE_STATE_STOPPED;
+}
+
int
rte_power_ethdev_pmgmt_queue_enable(unsigned int lcore_id, uint16_t port_id,
uint16_t queue_id, enum rte_power_pmd_mgmt_type mode)
{
struct pmd_queue_cfg *queue_cfg;
struct rte_eth_dev_info info;
+ rte_rx_callback_fn clb;
int ret;
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
@@ -203,6 +194,14 @@ rte_power_ethdev_pmgmt_queue_enable(unsigned int lcore_id, uint16_t port_id,
goto end;
}
+ /* check if the queue is stopped */
+ ret = queue_stopped(port_id, queue_id);
+ if (ret != 1) {
+ /* error means invalid queue, 0 means queue wasn't stopped */
+ ret = ret < 0 ? -EINVAL : -EBUSY;
+ goto end;
+ }
+
queue_cfg = &port_cfg[port_id][queue_id];
if (queue_cfg->pwr_mgmt_state != PMD_MGMT_DISABLED) {
@@ -232,17 +231,7 @@ rte_power_ethdev_pmgmt_queue_enable(unsigned int lcore_id, uint16_t port_id,
ret = -ENOTSUP;
goto end;
}
- /* initialize data before enabling the callback */
- queue_cfg->empty_poll_stats = 0;
- queue_cfg->cb_mode = mode;
- queue_cfg->umwait_in_progress = false;
- queue_cfg->pwr_mgmt_state = PMD_MGMT_ENABLED;
-
- /* ensure we update our state before callback starts */
- rte_atomic_thread_fence(__ATOMIC_SEQ_CST);
-
- queue_cfg->cur_cb = rte_eth_add_rx_callback(port_id, queue_id,
- clb_umwait, NULL);
+ clb = clb_umwait;
break;
}
case RTE_POWER_MGMT_TYPE_SCALE:
@@ -269,16 +258,7 @@ rte_power_ethdev_pmgmt_queue_enable(unsigned int lcore_id, uint16_t port_id,
ret = -ENOTSUP;
goto end;
}
- /* initialize data before enabling the callback */
- queue_cfg->empty_poll_stats = 0;
- queue_cfg->cb_mode = mode;
- queue_cfg->pwr_mgmt_state = PMD_MGMT_ENABLED;
-
- /* this is not necessary here, but do it anyway */
- rte_atomic_thread_fence(__ATOMIC_SEQ_CST);
-
- queue_cfg->cur_cb = rte_eth_add_rx_callback(port_id,
- queue_id, clb_scale_freq, NULL);
+ clb = clb_scale_freq;
break;
}
case RTE_POWER_MGMT_TYPE_PAUSE:
@@ -286,18 +266,21 @@ rte_power_ethdev_pmgmt_queue_enable(unsigned int lcore_id, uint16_t port_id,
if (global_data.tsc_per_us == 0)
calc_tsc();
- /* initialize data before enabling the callback */
- queue_cfg->empty_poll_stats = 0;
- queue_cfg->cb_mode = mode;
- queue_cfg->pwr_mgmt_state = PMD_MGMT_ENABLED;
-
- /* this is not necessary here, but do it anyway */
- rte_atomic_thread_fence(__ATOMIC_SEQ_CST);
-
- queue_cfg->cur_cb = rte_eth_add_rx_callback(port_id, queue_id,
- clb_pause, NULL);
+ clb = clb_pause;
break;
+ default:
+ RTE_LOG(DEBUG, POWER, "Invalid power management type\n");
+ ret = -EINVAL;
+ goto end;
}
+
+ /* initialize data before enabling the callback */
+ queue_cfg->empty_poll_stats = 0;
+ queue_cfg->cb_mode = mode;
+ queue_cfg->pwr_mgmt_state = PMD_MGMT_ENABLED;
+ queue_cfg->cur_cb = rte_eth_add_rx_callback(port_id, queue_id,
+ clb, NULL);
+
ret = 0;
end:
return ret;
@@ -308,12 +291,20 @@ rte_power_ethdev_pmgmt_queue_disable(unsigned int lcore_id,
uint16_t port_id, uint16_t queue_id)
{
struct pmd_queue_cfg *queue_cfg;
+ int ret;
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
if (lcore_id >= RTE_MAX_LCORE || queue_id >= RTE_MAX_QUEUES_PER_PORT)
return -EINVAL;
+ /* check if the queue is stopped */
+ ret = queue_stopped(port_id, queue_id);
+ if (ret != 1) {
+ /* error means invalid queue, 0 means queue wasn't stopped */
+ return ret < 0 ? -EINVAL : -EBUSY;
+ }
+
/* no need to check queue id as wrong queue id would not be enabled */
queue_cfg = &port_cfg[port_id][queue_id];
@@ -323,27 +314,8 @@ rte_power_ethdev_pmgmt_queue_disable(unsigned int lcore_id,
/* stop any callbacks from progressing */
queue_cfg->pwr_mgmt_state = PMD_MGMT_DISABLED;
- /* ensure we update our state before continuing */
- rte_atomic_thread_fence(__ATOMIC_SEQ_CST);
-
switch (queue_cfg->cb_mode) {
- case RTE_POWER_MGMT_TYPE_MONITOR:
- {
- bool exit = false;
- do {
- /*
- * we may request cancellation while the other thread
- * has just entered the callback but hasn't started
- * sleeping yet, so keep waking it up until we know it's
- * done sleeping.
- */
- if (queue_cfg->umwait_in_progress)
- rte_power_monitor_wakeup(lcore_id);
- else
- exit = true;
- } while (!exit);
- }
- /* fall-through */
+ case RTE_POWER_MGMT_TYPE_MONITOR: /* fall-through */
case RTE_POWER_MGMT_TYPE_PAUSE:
rte_eth_remove_rx_callback(port_id, queue_id,
queue_cfg->cur_cb);
@@ -356,10 +328,11 @@ rte_power_ethdev_pmgmt_queue_disable(unsigned int lcore_id,
break;
}
/*
- * we don't free the RX callback here because it is unsafe to do so
- * unless we know for a fact that all data plane threads have stopped.
+ * the API doc mandates that the user stops all processing on affected
+ * ports before calling any of these API's, so we can assume that the
+ * callbacks can be freed. we're intentionally casting away const-ness.
*/
- queue_cfg->cur_cb = NULL;
+ rte_free((void *)queue_cfg->cur_cb);
return 0;
}
diff --git a/lib/power/rte_power_pmd_mgmt.h b/lib/power/rte_power_pmd_mgmt.h
index 7a0ac24625..444e7b8a66 100644
--- a/lib/power/rte_power_pmd_mgmt.h
+++ b/lib/power/rte_power_pmd_mgmt.h
@@ -43,6 +43,9 @@ enum rte_power_pmd_mgmt_type {
*
* @note This function is not thread-safe.
*
+ * @warning This function must be called when all affected Ethernet queues are
+ * stopped and no Rx/Tx is in progress!
+ *
* @param lcore_id
* The lcore the Rx queue will be polled from.
* @param port_id
@@ -69,6 +72,9 @@ rte_power_ethdev_pmgmt_queue_enable(unsigned int lcore_id,
*
* @note This function is not thread-safe.
*
+ * @warning This function must be called when all affected Ethernet queues are
+ * stopped and no Rx/Tx is in progress!
+ *
* @param lcore_id
* The lcore the Rx queue is polled from.
* @param port_id
--
2.25.1
^ permalink raw reply [relevance 3%]
* [dpdk-dev] [PATCH v7 1/7] power_intrinsics: use callbacks for comparison
@ 2021-07-07 10:48 3% ` Anatoly Burakov
2021-07-07 10:48 3% ` [dpdk-dev] [PATCH v7 4/7] power: remove thread safety from PMD power API's Anatoly Burakov
1 sibling, 0 replies; 200+ results
From: Anatoly Burakov @ 2021-07-07 10:48 UTC (permalink / raw)
To: dev, Timothy McDaniel, Beilei Xing, Jingjing Wu, Qiming Yang,
Qi Zhang, Haiyue Wang, Matan Azrad, Shahaf Shuler,
Viacheslav Ovsiienko, Bruce Richardson, Konstantin Ananyev
Cc: ciara.loftus, david.hunt
Previously, the semantics of power monitor were such that we were
checking current value against the expected value, and if they matched,
then the sleep was aborted. This is somewhat inflexible, because it only
allowed us to check for a specific value in a specific way.
This commit replaces the comparison with a user callback mechanism, so
that any PMD (or other code) using `rte_power_monitor()` can define
their own comparison semantics and decision making on how to detect the
need to abort the entering of power optimized state.
Existing implementations are adjusted to follow the new semantics.
Suggested-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
---
Notes:
v4:
- Return error if callback is set to NULL
- Replace raw number with a macro in monitor condition opaque data
v2:
- Use callback mechanism for more flexibility
- Address feedback from Konstantin
doc/guides/rel_notes/release_21_08.rst | 2 ++
drivers/event/dlb2/dlb2.c | 17 ++++++++--
drivers/net/i40e/i40e_rxtx.c | 20 +++++++----
drivers/net/iavf/iavf_rxtx.c | 20 +++++++----
drivers/net/ice/ice_rxtx.c | 20 +++++++----
drivers/net/ixgbe/ixgbe_rxtx.c | 20 +++++++----
drivers/net/mlx5/mlx5_rx.c | 17 ++++++++--
.../include/generic/rte_power_intrinsics.h | 33 +++++++++++++++----
lib/eal/x86/rte_power_intrinsics.c | 17 +++++-----
9 files changed, 122 insertions(+), 44 deletions(-)
diff --git a/doc/guides/rel_notes/release_21_08.rst b/doc/guides/rel_notes/release_21_08.rst
index cd02820e68..c1d063bb11 100644
--- a/doc/guides/rel_notes/release_21_08.rst
+++ b/doc/guides/rel_notes/release_21_08.rst
@@ -117,6 +117,8 @@ API Changes
* eal: ``rte_strscpy`` sets ``rte_errno`` to ``E2BIG`` in case of string
truncation.
+* eal: the ``rte_power_intrinsics`` API changed to use a callback mechanism.
+
ABI Changes
-----------
diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c
index eca183753f..252bbd8d5e 100644
--- a/drivers/event/dlb2/dlb2.c
+++ b/drivers/event/dlb2/dlb2.c
@@ -3154,6 +3154,16 @@ dlb2_port_credits_inc(struct dlb2_port *qm_port, int num)
}
}
+#define CLB_MASK_IDX 0
+#define CLB_VAL_IDX 1
+static int
+dlb2_monitor_callback(const uint64_t val,
+ const uint64_t opaque[RTE_POWER_MONITOR_OPAQUE_SZ])
+{
+ /* abort if the value matches */
+ return (val & opaque[CLB_MASK_IDX]) == opaque[CLB_VAL_IDX] ? -1 : 0;
+}
+
static inline int
dlb2_dequeue_wait(struct dlb2_eventdev *dlb2,
struct dlb2_eventdev_port *ev_port,
@@ -3194,8 +3204,11 @@ dlb2_dequeue_wait(struct dlb2_eventdev *dlb2,
expected_value = 0;
pmc.addr = monitor_addr;
- pmc.val = expected_value;
- pmc.mask = qe_mask.raw_qe[1];
+ /* store expected value and comparison mask in opaque data */
+ pmc.opaque[CLB_VAL_IDX] = expected_value;
+ pmc.opaque[CLB_MASK_IDX] = qe_mask.raw_qe[1];
+ /* set up callback */
+ pmc.fn = dlb2_monitor_callback;
pmc.size = sizeof(uint64_t);
rte_power_monitor(&pmc, timeout + start_ticks);
diff --git a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c
index 8d65f287f4..65f325ede1 100644
--- a/drivers/net/i40e/i40e_rxtx.c
+++ b/drivers/net/i40e/i40e_rxtx.c
@@ -81,6 +81,18 @@
#define I40E_TX_OFFLOAD_SIMPLE_NOTSUP_MASK \
(PKT_TX_OFFLOAD_MASK ^ I40E_TX_OFFLOAD_SIMPLE_SUP_MASK)
+static int
+i40e_monitor_callback(const uint64_t value,
+ const uint64_t arg[RTE_POWER_MONITOR_OPAQUE_SZ] __rte_unused)
+{
+ const uint64_t m = rte_cpu_to_le_64(1 << I40E_RX_DESC_STATUS_DD_SHIFT);
+ /*
+ * we expect the DD bit to be set to 1 if this descriptor was already
+ * written to.
+ */
+ return (value & m) == m ? -1 : 0;
+}
+
int
i40e_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
{
@@ -93,12 +105,8 @@ i40e_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
/* watch for changes in status bit */
pmc->addr = &rxdp->wb.qword1.status_error_len;
- /*
- * we expect the DD bit to be set to 1 if this descriptor was already
- * written to.
- */
- pmc->val = rte_cpu_to_le_64(1 << I40E_RX_DESC_STATUS_DD_SHIFT);
- pmc->mask = rte_cpu_to_le_64(1 << I40E_RX_DESC_STATUS_DD_SHIFT);
+ /* comparison callback */
+ pmc->fn = i40e_monitor_callback;
/* registers are 64-bit */
pmc->size = sizeof(uint64_t);
diff --git a/drivers/net/iavf/iavf_rxtx.c b/drivers/net/iavf/iavf_rxtx.c
index f817fbc49b..d61b32fcee 100644
--- a/drivers/net/iavf/iavf_rxtx.c
+++ b/drivers/net/iavf/iavf_rxtx.c
@@ -57,6 +57,18 @@ iavf_proto_xtr_type_to_rxdid(uint8_t flex_type)
rxdid_map[flex_type] : IAVF_RXDID_COMMS_OVS_1;
}
+static int
+iavf_monitor_callback(const uint64_t value,
+ const uint64_t arg[RTE_POWER_MONITOR_OPAQUE_SZ] __rte_unused)
+{
+ const uint64_t m = rte_cpu_to_le_64(1 << IAVF_RX_DESC_STATUS_DD_SHIFT);
+ /*
+ * we expect the DD bit to be set to 1 if this descriptor was already
+ * written to.
+ */
+ return (value & m) == m ? -1 : 0;
+}
+
int
iavf_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
{
@@ -69,12 +81,8 @@ iavf_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
/* watch for changes in status bit */
pmc->addr = &rxdp->wb.qword1.status_error_len;
- /*
- * we expect the DD bit to be set to 1 if this descriptor was already
- * written to.
- */
- pmc->val = rte_cpu_to_le_64(1 << IAVF_RX_DESC_STATUS_DD_SHIFT);
- pmc->mask = rte_cpu_to_le_64(1 << IAVF_RX_DESC_STATUS_DD_SHIFT);
+ /* comparison callback */
+ pmc->fn = iavf_monitor_callback;
/* registers are 64-bit */
pmc->size = sizeof(uint64_t);
diff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c
index 3f6e735984..5d7ab4f047 100644
--- a/drivers/net/ice/ice_rxtx.c
+++ b/drivers/net/ice/ice_rxtx.c
@@ -27,6 +27,18 @@ uint64_t rte_net_ice_dynflag_proto_xtr_ipv6_flow_mask;
uint64_t rte_net_ice_dynflag_proto_xtr_tcp_mask;
uint64_t rte_net_ice_dynflag_proto_xtr_ip_offset_mask;
+static int
+ice_monitor_callback(const uint64_t value,
+ const uint64_t arg[RTE_POWER_MONITOR_OPAQUE_SZ] __rte_unused)
+{
+ const uint64_t m = rte_cpu_to_le_16(1 << ICE_RX_FLEX_DESC_STATUS0_DD_S);
+ /*
+ * we expect the DD bit to be set to 1 if this descriptor was already
+ * written to.
+ */
+ return (value & m) == m ? -1 : 0;
+}
+
int
ice_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
{
@@ -39,12 +51,8 @@ ice_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
/* watch for changes in status bit */
pmc->addr = &rxdp->wb.status_error0;
- /*
- * we expect the DD bit to be set to 1 if this descriptor was already
- * written to.
- */
- pmc->val = rte_cpu_to_le_16(1 << ICE_RX_FLEX_DESC_STATUS0_DD_S);
- pmc->mask = rte_cpu_to_le_16(1 << ICE_RX_FLEX_DESC_STATUS0_DD_S);
+ /* comparison callback */
+ pmc->fn = ice_monitor_callback;
/* register is 16-bit */
pmc->size = sizeof(uint16_t);
diff --git a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers/net/ixgbe/ixgbe_rxtx.c
index d69f36e977..c814a28cb4 100644
--- a/drivers/net/ixgbe/ixgbe_rxtx.c
+++ b/drivers/net/ixgbe/ixgbe_rxtx.c
@@ -1369,6 +1369,18 @@ const uint32_t
RTE_PTYPE_INNER_L3_IPV4_EXT | RTE_PTYPE_INNER_L4_UDP,
};
+static int
+ixgbe_monitor_callback(const uint64_t value,
+ const uint64_t arg[RTE_POWER_MONITOR_OPAQUE_SZ] __rte_unused)
+{
+ const uint64_t m = rte_cpu_to_le_32(IXGBE_RXDADV_STAT_DD);
+ /*
+ * we expect the DD bit to be set to 1 if this descriptor was already
+ * written to.
+ */
+ return (value & m) == m ? -1 : 0;
+}
+
int
ixgbe_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
{
@@ -1381,12 +1393,8 @@ ixgbe_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
/* watch for changes in status bit */
pmc->addr = &rxdp->wb.upper.status_error;
- /*
- * we expect the DD bit to be set to 1 if this descriptor was already
- * written to.
- */
- pmc->val = rte_cpu_to_le_32(IXGBE_RXDADV_STAT_DD);
- pmc->mask = rte_cpu_to_le_32(IXGBE_RXDADV_STAT_DD);
+ /* comparison callback */
+ pmc->fn = ixgbe_monitor_callback;
/* the registers are 32-bit */
pmc->size = sizeof(uint32_t);
diff --git a/drivers/net/mlx5/mlx5_rx.c b/drivers/net/mlx5/mlx5_rx.c
index 777a1d6e45..17370b77dc 100644
--- a/drivers/net/mlx5/mlx5_rx.c
+++ b/drivers/net/mlx5/mlx5_rx.c
@@ -269,6 +269,18 @@ mlx5_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id)
return rx_queue_count(rxq);
}
+#define CLB_VAL_IDX 0
+#define CLB_MSK_IDX 1
+static int
+mlx_monitor_callback(const uint64_t value,
+ const uint64_t opaque[RTE_POWER_MONITOR_OPAQUE_SZ])
+{
+ const uint64_t m = opaque[CLB_MSK_IDX];
+ const uint64_t v = opaque[CLB_VAL_IDX];
+
+ return (value & m) == v ? -1 : 0;
+}
+
int mlx5_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
{
struct mlx5_rxq_data *rxq = rx_queue;
@@ -282,8 +294,9 @@ int mlx5_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
return -rte_errno;
}
pmc->addr = &cqe->op_own;
- pmc->val = !!idx;
- pmc->mask = MLX5_CQE_OWNER_MASK;
+ pmc->opaque[CLB_VAL_IDX] = !!idx;
+ pmc->opaque[CLB_MSK_IDX] = MLX5_CQE_OWNER_MASK;
+ pmc->fn = mlx_monitor_callback;
pmc->size = sizeof(uint8_t);
return 0;
}
diff --git a/lib/eal/include/generic/rte_power_intrinsics.h b/lib/eal/include/generic/rte_power_intrinsics.h
index dddca3d41c..c9aa52a86d 100644
--- a/lib/eal/include/generic/rte_power_intrinsics.h
+++ b/lib/eal/include/generic/rte_power_intrinsics.h
@@ -18,19 +18,38 @@
* which are architecture-dependent.
*/
+/** Size of the opaque data in monitor condition */
+#define RTE_POWER_MONITOR_OPAQUE_SZ 4
+
+/**
+ * Callback definition for monitoring conditions. Callbacks with this signature
+ * will be used by `rte_power_monitor()` to check if the entering of power
+ * optimized state should be aborted.
+ *
+ * @param val
+ * The value read from memory.
+ * @param opaque
+ * Callback-specific data.
+ *
+ * @return
+ * 0 if entering of power optimized state should proceed
+ * -1 if entering of power optimized state should be aborted
+ */
+typedef int (*rte_power_monitor_clb_t)(const uint64_t val,
+ const uint64_t opaque[RTE_POWER_MONITOR_OPAQUE_SZ]);
struct rte_power_monitor_cond {
volatile void *addr; /**< Address to monitor for changes */
- uint64_t val; /**< If the `mask` is non-zero, location pointed
- * to by `addr` will be read and compared
- * against this value.
- */
- uint64_t mask; /**< 64-bit mask to extract value read from `addr` */
- uint8_t size; /**< Data size (in bytes) that will be used to compare
- * expected value (`val`) with data read from the
+ uint8_t size; /**< Data size (in bytes) that will be read from the
* monitored memory location (`addr`). Can be 1, 2,
* 4, or 8. Supplying any other value will result in
* an error.
*/
+ rte_power_monitor_clb_t fn; /**< Callback to be used to check if
+ * entering power optimized state should
+ * be aborted.
+ */
+ uint64_t opaque[RTE_POWER_MONITOR_OPAQUE_SZ];
+ /**< Callback-specific data */
};
/**
diff --git a/lib/eal/x86/rte_power_intrinsics.c b/lib/eal/x86/rte_power_intrinsics.c
index 39ea9fdecd..66fea28897 100644
--- a/lib/eal/x86/rte_power_intrinsics.c
+++ b/lib/eal/x86/rte_power_intrinsics.c
@@ -76,6 +76,7 @@ rte_power_monitor(const struct rte_power_monitor_cond *pmc,
const uint32_t tsc_h = (uint32_t)(tsc_timestamp >> 32);
const unsigned int lcore_id = rte_lcore_id();
struct power_wait_status *s;
+ uint64_t cur_value;
/* prevent user from running this instruction if it's not supported */
if (!wait_supported)
@@ -91,6 +92,9 @@ rte_power_monitor(const struct rte_power_monitor_cond *pmc,
if (__check_val_size(pmc->size) < 0)
return -EINVAL;
+ if (pmc->fn == NULL)
+ return -EINVAL;
+
s = &wait_status[lcore_id];
/* update sleep address */
@@ -110,16 +114,11 @@ rte_power_monitor(const struct rte_power_monitor_cond *pmc,
/* now that we've put this address into monitor, we can unlock */
rte_spinlock_unlock(&s->lock);
- /* if we have a comparison mask, we might not need to sleep at all */
- if (pmc->mask) {
- const uint64_t cur_value = __get_umwait_val(
- pmc->addr, pmc->size);
- const uint64_t masked = cur_value & pmc->mask;
+ cur_value = __get_umwait_val(pmc->addr, pmc->size);
- /* if the masked value is already matching, abort */
- if (masked == pmc->val)
- goto end;
- }
+ /* check if callback indicates we should abort */
+ if (pmc->fn(cur_value, pmc->opaque) != 0)
+ goto end;
/* execute UMWAIT */
asm volatile(".byte 0xf2, 0x0f, 0xae, 0xf7;"
--
2.25.1
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [PATCH V2] ethdev: add dev configured flag
2021-07-07 9:36 0% ` David Marchand
@ 2021-07-07 9:59 0% ` Thomas Monjalon
0 siblings, 0 replies; 200+ results
From: Thomas Monjalon @ 2021-07-07 9:59 UTC (permalink / raw)
To: Andrew Rybchenko, David Marchand
Cc: Dodji Seketeli, Huisong Li, dev, Yigit, Ferruh, Ananyev,
Konstantin, Ray Kinsella
07/07/2021 11:36, David Marchand:
> On Wed, Jul 7, 2021 at 10:23 AM Andrew Rybchenko
> <andrew.rybchenko@oktetlabs.ru> wrote:
> >
> > On 7/7/21 10:39 AM, David Marchand wrote:
> > > On Tue, Jul 6, 2021 at 10:36 AM Andrew Rybchenko
> > > <andrew.rybchenko@oktetlabs.ru> wrote:
> > >>
> > >> @David, could you take a look at the ABI breakage warnings for
> > >> the patch. May we ignore it since ABI looks backward
> > >> compatible? Or should be marked as a minor change ABI
> > >> which is backward compatible with DPDK_21?
> > >
> > > The whole eth_dev_shared_data area has always been reset to 0 at the
> > > first port allocation in a dpdk application life.
> > > Subsequent calls to rte_eth_dev_release_port() reset every port
> > > eth_dev->data to 0.
> > >
> > > This bit flag is added in a hole of the structure, and it is
> > > set/manipulated internally of ethdev.
> > >
> > > So unless the application was doing something nasty like highjacking
> > > this empty hole in the structure, I see no problem with the change wrt
> > > ABI.
> > >
> > >
> > > I wonder if libabigail is too strict on this report.
> > > Or maybe there is some extreme consideration on what a compiler could
> > > do about this hole...
> >
> > I was wondering if it could be any specifics related to big-
> > little endian vs bit fields placement, but throw the idea
> > away...
>
> After some discussion offlist with (fairly busy ;-)) Dodji, the report
> here is a good warning.
>
> But it looks we have an issue with libabigail not properly computing
> bitfields offsets.
> I just opened a bz for tracking
> https://sourceware.org/bugzilla/show_bug.cgi?id=28060
>
> This is problematic, as the following rule does not work:
>
> +; Ignore bitfields added in rte_eth_dev_data hole
> +[suppress_type]
> + name = rte_eth_dev_data
> + has_data_member_inserted_between = {offset_after(lro),
> offset_of(rx_queue_state)}
>
> On the other hand, a (wrong) rule with "has_data_member_inserted_at =
> 2" (2 being the wrong offset you can read in abidiff output) works.
>
> This might force us to waive all changes to rte_eth_dev_data... not
> that I am happy about it.
We are not going to do other changes until 21.11, so it could be fine.
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH V2] ethdev: add dev configured flag
2021-07-07 8:23 0% ` Andrew Rybchenko
@ 2021-07-07 9:36 0% ` David Marchand
2021-07-07 9:59 0% ` Thomas Monjalon
0 siblings, 1 reply; 200+ results
From: David Marchand @ 2021-07-07 9:36 UTC (permalink / raw)
To: Andrew Rybchenko
Cc: Dodji Seketeli, Huisong Li, dev, Thomas Monjalon, Yigit, Ferruh,
Ananyev, Konstantin, Ray Kinsella
On Wed, Jul 7, 2021 at 10:23 AM Andrew Rybchenko
<andrew.rybchenko@oktetlabs.ru> wrote:
>
> On 7/7/21 10:39 AM, David Marchand wrote:
> > On Tue, Jul 6, 2021 at 10:36 AM Andrew Rybchenko
> > <andrew.rybchenko@oktetlabs.ru> wrote:
> >>
> >> @David, could you take a look at the ABI breakage warnings for
> >> the patch. May we ignore it since ABI looks backward
> >> compatible? Or should be marked as a minor change ABI
> >> which is backward compatible with DPDK_21?
> >
> > The whole eth_dev_shared_data area has always been reset to 0 at the
> > first port allocation in a dpdk application life.
> > Subsequent calls to rte_eth_dev_release_port() reset every port
> > eth_dev->data to 0.
> >
> > This bit flag is added in a hole of the structure, and it is
> > set/manipulated internally of ethdev.
> >
> > So unless the application was doing something nasty like highjacking
> > this empty hole in the structure, I see no problem with the change wrt
> > ABI.
> >
> >
> > I wonder if libabigail is too strict on this report.
> > Or maybe there is some extreme consideration on what a compiler could
> > do about this hole...
>
> I was wondering if it could be any specifics related to big-
> little endian vs bit fields placement, but throw the idea
> away...
After some discussion offlist with (fairly busy ;-)) Dodji, the report
here is a good warning.
But it looks we have an issue with libabigail not properly computing
bitfields offsets.
I just opened a bz for tracking
https://sourceware.org/bugzilla/show_bug.cgi?id=28060
This is problematic, as the following rule does not work:
+; Ignore bitfields added in rte_eth_dev_data hole
+[suppress_type]
+ name = rte_eth_dev_data
+ has_data_member_inserted_between = {offset_after(lro),
offset_of(rx_queue_state)}
On the other hand, a (wrong) rule with "has_data_member_inserted_at =
2" (2 being the wrong offset you can read in abidiff output) works.
This might force us to waive all changes to rte_eth_dev_data... not
that I am happy about it.
--
David Marchand
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH V2] ethdev: add dev configured flag
2021-07-07 8:25 3% ` Andrew Rybchenko
@ 2021-07-07 9:26 0% ` Huisong Li
0 siblings, 0 replies; 200+ results
From: Huisong Li @ 2021-07-07 9:26 UTC (permalink / raw)
To: Andrew Rybchenko, dev
Cc: thomas, ferruh.yigit, konstantin.ananyev, david.marchand, Ray Kinsella
在 2021/7/7 16:25, Andrew Rybchenko 写道:
> On 7/7/21 5:55 AM, Huisong Li wrote:
>> 在 2021/7/6 16:36, Andrew Rybchenko 写道:
>>> @David, could you take a look at the ABI breakage warnings for
>>> the patch. May we ignore it since ABI looks backward
>>> compatible? Or should be marked as a minor change ABI
>>> which is backward compatible with DPDK_21?
>>>
>>> On 7/6/21 7:10 AM, Huisong Li wrote:
>>>> Currently, if dev_configure is not called or fails to be called, users
>>>> can still call dev_start successfully. So it is necessary to have a flag
>>>> which indicates whether the device is configured, to control whether
>>>> dev_start can be called and eliminate dependency on user invocation
>>>> order.
>>>>
>>>> The flag stored in "struct rte_eth_dev_data" is more reasonable than
>>>> "enum rte_eth_dev_state". "enum rte_eth_dev_state" is private to the
>>>> primary and secondary processes, and can be independently controlled.
>>>> However, the secondary process does not make resource allocations and
>>>> does not call dev_configure(). These are done by the primary process
>>>> and can be obtained or used by the secondary process. So this patch
>>>> adds a "dev_configured" flag in "rte_eth_dev_data", like "dev_started".
>>>>
>>>> Signed-off-by: Huisong Li <lihuisong@huawei.com>
>>> Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
>>>
>>>> ---
>>>> v1 -> v2:
>>>> - adjusting the description of patch.
>>>>
>>>> ---
>>>> lib/ethdev/rte_ethdev.c | 16 ++++++++++++++++
>>>> lib/ethdev/rte_ethdev_core.h | 6 +++++-
>>>> 2 files changed, 21 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/lib/ethdev/rte_ethdev.c b/lib/ethdev/rte_ethdev.c
>>>> index c607eab..6540432 100644
>>>> --- a/lib/ethdev/rte_ethdev.c
>>>> +++ b/lib/ethdev/rte_ethdev.c
>>>> @@ -1356,6 +1356,13 @@ rte_eth_dev_configure(uint16_t port_id,
>>>> uint16_t nb_rx_q, uint16_t nb_tx_q,
>>>> return -EBUSY;
>>>> }
>>>> + /*
>>>> + * Ensure that "dev_configured" is always 0 each time prepare to do
>>>> + * dev_configure() to avoid any non-anticipated behaviour.
>>>> + * And set to 1 when dev_configure() is executed successfully.
>>>> + */
>>>> + dev->data->dev_configured = 0;
>>>> +
>>>> /* Store original config, as rollback required on failure */
>>>> memcpy(&orig_conf, &dev->data->dev_conf,
>>>> sizeof(dev->data->dev_conf));
>>>> @@ -1606,6 +1613,8 @@ rte_eth_dev_configure(uint16_t port_id,
>>>> uint16_t nb_rx_q, uint16_t nb_tx_q,
>>>> }
>>>> rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q,
>>>> dev_conf, 0);
>>>> + dev->data->dev_configured = 1;
>>>> +
>>> I think it should be inserted before the trace, since tracing
>>> is intentionally put close to return without any empty lines
>>> in between.
>> All right. Do I need to send a patch V3?
> Since the patch is waiting for resolution for ABI warning,
> please, send v3 with my Reviewed-by and ack from Konstantin.
> It will be a bit easier to apply when it is OK to do it.
> .
ok. I will send patch V3.
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH V2] ethdev: add dev configured flag
2021-07-07 2:55 0% ` Huisong Li
@ 2021-07-07 8:25 3% ` Andrew Rybchenko
2021-07-07 9:26 0% ` Huisong Li
0 siblings, 1 reply; 200+ results
From: Andrew Rybchenko @ 2021-07-07 8:25 UTC (permalink / raw)
To: Huisong Li, dev
Cc: thomas, ferruh.yigit, konstantin.ananyev, david.marchand, Ray Kinsella
On 7/7/21 5:55 AM, Huisong Li wrote:
>
> 在 2021/7/6 16:36, Andrew Rybchenko 写道:
>> @David, could you take a look at the ABI breakage warnings for
>> the patch. May we ignore it since ABI looks backward
>> compatible? Or should be marked as a minor change ABI
>> which is backward compatible with DPDK_21?
>>
>> On 7/6/21 7:10 AM, Huisong Li wrote:
>>> Currently, if dev_configure is not called or fails to be called, users
>>> can still call dev_start successfully. So it is necessary to have a flag
>>> which indicates whether the device is configured, to control whether
>>> dev_start can be called and eliminate dependency on user invocation
>>> order.
>>>
>>> The flag stored in "struct rte_eth_dev_data" is more reasonable than
>>> "enum rte_eth_dev_state". "enum rte_eth_dev_state" is private to the
>>> primary and secondary processes, and can be independently controlled.
>>> However, the secondary process does not make resource allocations and
>>> does not call dev_configure(). These are done by the primary process
>>> and can be obtained or used by the secondary process. So this patch
>>> adds a "dev_configured" flag in "rte_eth_dev_data", like "dev_started".
>>>
>>> Signed-off-by: Huisong Li <lihuisong@huawei.com>
>> Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
>>
>>> ---
>>> v1 -> v2:
>>> - adjusting the description of patch.
>>>
>>> ---
>>> lib/ethdev/rte_ethdev.c | 16 ++++++++++++++++
>>> lib/ethdev/rte_ethdev_core.h | 6 +++++-
>>> 2 files changed, 21 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/lib/ethdev/rte_ethdev.c b/lib/ethdev/rte_ethdev.c
>>> index c607eab..6540432 100644
>>> --- a/lib/ethdev/rte_ethdev.c
>>> +++ b/lib/ethdev/rte_ethdev.c
>>> @@ -1356,6 +1356,13 @@ rte_eth_dev_configure(uint16_t port_id,
>>> uint16_t nb_rx_q, uint16_t nb_tx_q,
>>> return -EBUSY;
>>> }
>>> + /*
>>> + * Ensure that "dev_configured" is always 0 each time prepare to do
>>> + * dev_configure() to avoid any non-anticipated behaviour.
>>> + * And set to 1 when dev_configure() is executed successfully.
>>> + */
>>> + dev->data->dev_configured = 0;
>>> +
>>> /* Store original config, as rollback required on failure */
>>> memcpy(&orig_conf, &dev->data->dev_conf,
>>> sizeof(dev->data->dev_conf));
>>> @@ -1606,6 +1613,8 @@ rte_eth_dev_configure(uint16_t port_id,
>>> uint16_t nb_rx_q, uint16_t nb_tx_q,
>>> }
>>> rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q,
>>> dev_conf, 0);
>>> + dev->data->dev_configured = 1;
>>> +
>> I think it should be inserted before the trace, since tracing
>> is intentionally put close to return without any empty lines
>> in between.
> All right. Do I need to send a patch V3?
Since the patch is waiting for resolution for ABI warning,
please, send v3 with my Reviewed-by and ack from Konstantin.
It will be a bit easier to apply when it is OK to do it.
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [PATCH V2] ethdev: add dev configured flag
2021-07-07 7:39 3% ` David Marchand
@ 2021-07-07 8:23 0% ` Andrew Rybchenko
2021-07-07 9:36 0% ` David Marchand
0 siblings, 1 reply; 200+ results
From: Andrew Rybchenko @ 2021-07-07 8:23 UTC (permalink / raw)
To: David Marchand, Dodji Seketeli
Cc: Huisong Li, dev, Thomas Monjalon, Yigit, Ferruh, Ananyev,
Konstantin, Ray Kinsella
On 7/7/21 10:39 AM, David Marchand wrote:
> On Tue, Jul 6, 2021 at 10:36 AM Andrew Rybchenko
> <andrew.rybchenko@oktetlabs.ru> wrote:
>>
>> @David, could you take a look at the ABI breakage warnings for
>> the patch. May we ignore it since ABI looks backward
>> compatible? Or should be marked as a minor change ABI
>> which is backward compatible with DPDK_21?
>
> The whole eth_dev_shared_data area has always been reset to 0 at the
> first port allocation in a dpdk application life.
> Subsequent calls to rte_eth_dev_release_port() reset every port
> eth_dev->data to 0.
>
> This bit flag is added in a hole of the structure, and it is
> set/manipulated internally of ethdev.
>
> So unless the application was doing something nasty like highjacking
> this empty hole in the structure, I see no problem with the change wrt
> ABI.
>
>
> I wonder if libabigail is too strict on this report.
> Or maybe there is some extreme consideration on what a compiler could
> do about this hole...
I was wondering if it could be any specifics related to big-
little endian vs bit fields placement, but throw the idea
away...
> Dodji?
>
>
> For now, we can waive the warning.
> I'll look into the exception rule to add.
Thanks a lot. I'll hold on the patch for now.
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH] dmadev: introduce DMA device library
2021-07-05 17:16 0% ` Bruce Richardson
@ 2021-07-07 8:08 0% ` Jerin Jacob
0 siblings, 0 replies; 200+ results
From: Jerin Jacob @ 2021-07-07 8:08 UTC (permalink / raw)
To: Bruce Richardson
Cc: Chengwen Feng, Thomas Monjalon, Ferruh Yigit, Jerin Jacob,
dpdk-dev, Morten Brørup, Nipun Gupta, Hemant Agrawal,
Maxime Coquelin, Honnappa Nagarahalli, David Marchand,
Satananda Burla, Prasun Kapoor, Ananyev, Konstantin, liangma,
Radha Mohan Chintakuntla
On Mon, Jul 5, 2021 at 10:46 PM Bruce Richardson
<bruce.richardson@intel.com> wrote:
>
> On Mon, Jul 05, 2021 at 09:25:34PM +0530, Jerin Jacob wrote:
> >
> > On Mon, Jul 5, 2021 at 4:22 PM Bruce Richardson
> > <bruce.richardson@intel.com> wrote:
> > >
> > > On Sun, Jul 04, 2021 at 03:00:30PM +0530, Jerin Jacob wrote:
> > > > On Fri, Jul 2, 2021 at 6:51 PM Chengwen Feng <fengchengwen@huawei.com> wrote:
> > > > >
> > > > > This patch introduces 'dmadevice' which is a generic type of DMA
> > > > > device.
> <snip>
> > >
> > > +1 and the terminology with regards to queues and channels. With our ioat
> > > hardware, each HW queue was called a channel for instance.
> >
> > Looks like <dmadev> <> <channel> can cover all the use cases, if the
> > HW has more than
> > 1 queues it can be exposed as separate dmadev dev.
> >
>
> Fine for me.
>
> However, just to confirm that Morten's suggestion of using a
> (device-specific void *) channel pointer rather than dev_id + channel_id
> pair of parameters won't work for you? You can't store a pointer or dev
> index in the channel struct in the driver?
Yes. That will work. To confirm, the suggestion is to use, void *
object instead of channel_id,
That will avoid one more indirection.(index -> pointer)
>
> >
> <snip>
> > > > > + *
> > > > > + * If dma_cookie_t is >=0 it's a DMA operation request cookie, <0 it's a error
> > > > > + * code.
> > > > > + * When using cookies, comply with the following rules:
> > > > > + * a) Cookies for each virtual queue are independent.
> > > > > + * b) For a virt queue, the cookie are monotonically incremented, when it reach
> > > > > + * the INT_MAX, it wraps back to zero.
> > >
> > > I disagree with the INT_MAX (or INT32_MAX) value here. If we use that
> > > value, it means that we cannot use implicit wrap-around inside the CPU and
> > > have to check for the INT_MAX value. Better to:
> > > 1. Specify that it wraps at UINT16_MAX which allows us to just use a
> > > uint16_t internally and wrap-around automatically, or:
> > > 2. Specify that it wraps at a power-of-2 value >= UINT16_MAX, giving
> > > drivers the flexibility at what value to wrap around.
> >
> > I think, (2) better than 1. I think, even better to wrap around the number of
> > descriptors configured in dev_configure()(We cake make this as the power of 2),
> >
>
> Interesting, I hadn't really considered that before. My only concern
> would be if an app wants to keep values in the app ring for a while after
> they have been returned from dmadev. I thought it easier to have the full
> 16-bit counter value returned to the user to give the most flexibility,
> given that going from that to any power-of-2 ring size smaller is a trivial
> operation.
>
> Overall, while my ideal situation is to always have a 0..UINT16_MAX return
> value from the function, I can live with your suggestion of wrapping at
> ring_size, since drivers will likely do that internally anyway.
> I think wrapping at INT32_MAX is too awkward and will be error prone since
> we can't rely on hardware automatically wrapping to zero, nor on the driver
> having pre-masked the value.
OK. +1 for UINT16_MAX
>
> > >
> > > > > + * c) The initial cookie of a virt queue is zero, after the device is stopped or
> > > > > + * reset, the virt queue's cookie needs to be reset to zero.
> <snip>
> > > >
> > > > Please add some good amount of reserved bits and have API to init this
> > > > structure for future ABI stability, say rte_dmadev_queue_config_init()
> > > > or so.
> > > >
> > >
> > > I don't think that is necessary. Since the config struct is used only as
> > > parameter to the config function, any changes to it can be managed by
> > > versioning that single function. Padding would only be necessary if we had
> > > an array of these config structs somewhere.
> >
> > OK.
> >
> > For some reason, the versioning API looks ugly to me in code instead of keeping
> > some rsvd fields look cool to me with init function.
> >
> > But I agree. function versioning works in this case. No need to find other API
> > if tt is not general DPDK API practice.
> >
>
> The one thing I would suggest instead of the padding is for the internal
> APIS, to pass the struct size through, since we can't version those - and
> for padding we can't know whether any replaced padding should be used or
> not. Specifically:
>
> typedef int (*rte_dmadev_configure_t)(struct rte_dmadev *dev, struct
> rte_dmadev_conf *cfg, size_t cfg_size);
>
> but for the public function:
>
> int
> rte_dmadev_configure(struct rte_dmadev *dev, struct
> rte_dmadev_conf *cfg)
> {
> ...
> ret = dev->ops.configure(dev, cfg, sizeof(*cfg));
> ...
> }
Makes sense.
>
> Then if we change the structure and version the config API, the driver can
> tell from the size what struct version it is and act accordingly. Without
> that, each time the struct changed, we'd have to add a new function pointer
> to the device ops.
>
> > In other libraries, I have seen such _init or function that can use
> > for this as well as filling default value
> > in some cases implementation values is not zero).
> > So that application can avoid memset for param structure.
> > Added rte_event_queue_default_conf_get() in eventdev spec for this.
> >
>
> I think that would largely have the same issues, unless it returned a
> pointer to data inside the driver - and which therefore could not be
> modified. Alternatively it would mean that the memory would have been
> allocated in the driver and we would need to ensure proper cleanup
> functions were called to free memory afterwards. Supporting having the
> config parameter as a local variable I think makes things a lot easier.
>
> > No strong opinion on this.
> >
> >
> >
> > >
> > > >
> > > > > +
> > > > > +/**
> > > > > + * A structure used to retrieve information of a DMA virt queue.
> > > > > + */
> > > > > +struct rte_dmadev_queue_info {
> > > > > + enum dma_transfer_direction direction;
> > > >
> > > > A queue may support all directions so I think it should be a bitfield.
> > > >
> > > > > + /**< Associated transfer direction */
> > > > > + uint16_t hw_queue_id; /**< The HW queue on which to create virt queue */
> > > > > + uint16_t nb_desc; /**< Number of descriptor for this virt queue */
> > > > > + uint64_t dev_flags; /**< Device specific flags */
> > > > > +};
> > > > > +
> > > >
> > > > > +__rte_experimental
> > > > > +static inline dma_cookie_t
> > > > > +rte_dmadev_copy_sg(uint16_t dev_id, uint16_t vq_id,
> > > > > + const struct dma_scatterlist *sg,
> > > > > + uint32_t sg_len, uint64_t flags)
> > > >
> > > > I would like to change this as:
> > > > rte_dmadev_copy_sg(uint16_t dev_id, uint16_t vq_id, const struct
> > > > rte_dma_sg *src, uint32_t nb_src,
> > > > const struct rte_dma_sg *dst, uint32_t nb_dst) or so allow the use case like
In the above syntax, @Chengchang Tang
rte_dma_sg needs to contains only ptr and size.
> > > > src 30 MB copy can be splitted as written as 1 MB x 30 dst.
> > > >
>
> Out of interest, do you see much benefit (and in what way) from having the
> scatter-gather support? Unlike sending 5 buffers in one packet rather than
> 5 buffers in 5 packets to a NIC, copying an array of memory in one op vs
> multiple is functionally identical.
Knowing upfront or in shot if such segments expressed can have better
optimization
in drivers like
1) In one DMA job request HW can fill multiple segments vs multiple
DMA job requests with each segment.
2) Single completion i.e less overhead system.
3) Less latency for the job requests.
>
> > > >
> > > >
> <snip>
> > Got it. In order to save space if first CL size for fastpath(Saving 8B
> > for the pointer) and to avoid
> > function overhead, Can we use one bit of flags of op function to
> > enable the fence?
> >
>
> The original ioat implementation did exactly that. However, I then
> discovered that because a fence logically belongs between two operations,
> does the fence flag on an operation mean "don't do any jobs after this
> until this job has completed" or does it mean "don't start this job until
> all previous jobs have completed". [Or theoretically does it mean both :-)]
> Naturally, some hardware does it the former way (i.e. fence flag goes on
> last op before fence), while other hardware the latter way (i.e. fence flag
> goes on first op after the fence). Therefore, since fencing is about
> ordering *between* two (sets of) jobs, I decided that it should do exactly
> that and go between two jobs, so there is no ambiguity!
>
> However, I'm happy enough to switch to having a fence flag, but I think if
> we do that, it should be put in the "first job after fence" case, because
> it is always easier to modify a previously written job if we need to, than
> to save the flag for a future one.
>
> Alternatively, if we keep the fence as a separate function, I'm happy
> enough for it not to be on the same cacheline as the "hot" operations,
> since fencing will always introduce a small penalty anyway.
Ack.
You may consider two flags, FENCE_THEN_JOB and JOB_THEN_FENCE( If
there any use case for this or it makes sense for your HW)
For us, Fence is NOP for us as we have an implicit fence between each
HW job descriptor.
>
> > >
> > > >
> <snip>
> > > > Since we have additional function call overhead in all the
> > > > applications for this scheme, I would like to understand
> > > > the use of doing this way vs enq does the doorbell implicitly from
> > > > driver/application PoV?
> > > >
> > >
> > > In our benchmarks it's just faster. When we tested it, the overhead of the
> > > function calls was noticably less than the cost of building up the
> > > parameter array(s) for passing the jobs in as a burst. [We don't see this
> > > cost with things like NIC I/O since DPDK tends to already have the mbuf
> > > fully populated before the TX call anyway.]
> >
> > OK. I agree with stack population.
> >
> > My question was more on doing implicit doorbell update enq. Is doorbell write
> > costly in other HW compare to a function call? In our HW, it is just write of
> > the number of instructions written in a register.
> >
> > Also, we need to again access the internal PMD memory structure to find
> > where to write etc if it is a separate function.
> >
>
> The cost varies depending on a number of factors - even writing to a single
> HW register can be very slow if that register is mapped as device
> (uncacheable) memory, since (AFAIK) it will act as a full fence and wait
I don't know, At least in our case, writes are write-back. so core does not need
to wait.(If there is no read operation).
> for the write to go all the way to hardware. For more modern HW, the cost
> can be lighter. However, any cost of HW writes is going to be the same
> whether its a separate function call or not.
>
> However, the main thing about the doorbell update is that it's a
> once-per-burst thing, rather than a once-per-job. Therefore, even if you
> have to re-read the struct memory (which is likely still somewhere in your
> cores' cache), any extra small cost of doing so is to be amortized over the
> cost of a whole burst of copies.
Linux kernel has xmit_more flag in skb to address similar thing.
i.e enq job flag can have one more bit field to say update ring bell or not?
Rather having yet another function overhead.IMO, it is the best of both worlds.
>
> >
> > >
> > > >
> <snip>
> > > > > +
> > > > > +/**
> > > > > + * @warning
> > > > > + * @b EXPERIMENTAL: this API may change without prior notice.
> > > > > + *
> > > > > + * Returns the number of operations that failed to complete.
> > > > > + * NOTE: This API was used when rte_dmadev_completed has_error was set.
> > > > > + *
> > > > > + * @param dev_id
> > > > > + * The identifier of the device.
> > > > > + * @param vq_id
> > > > > + * The identifier of virt queue.
> > > > (> + * @param nb_status
> > > > > + * Indicates the size of status array.
> > > > > + * @param[out] status
> > > > > + * The error code of operations that failed to complete.
> > > > > + * @param[out] cookie
> > > > > + * The last failed completed operation's cookie.
> > > > > + *
> > > > > + * @return
> > > > > + * The number of operations that failed to complete.
> > > > > + *
> > > > > + * NOTE: The caller must ensure that the input parameter is valid and the
> > > > > + * corresponding device supports the operation.
> > > > > + */
> > > > > +__rte_experimental
> > > > > +static inline uint16_t
> > > > > +rte_dmadev_completed_fails(uint16_t dev_id, uint16_t vq_id,
> > > > > + const uint16_t nb_status, uint32_t *status,
> > > > > + dma_cookie_t *cookie)
> > > >
> > > > IMO, it is better to move cookie/rind_idx at 3.
> > > > Why it would return any array of errors? since it called after
> > > > rte_dmadev_completed() has
> > > > has_error. Is it better to change
> > > >
> > > > rte_dmadev_error_status((uint16_t dev_id, uint16_t vq_id, dma_cookie_t
> > > > *cookie, uint32_t *status)
> > > >
> > > > I also think, we may need to set status as bitmask and enumerate all
> > > > the combination of error codes
> > > > of all the driver and return string from driver existing rte_flow_error
> > > >
> > > > See
> > > > struct rte_flow_error {
> > > > enum rte_flow_error_type type; /**< Cause field and error types. */
> > > > const void *cause; /**< Object responsible for the error. */
> > > > const char *message; /**< Human-readable error message. */
> > > > };
> > > >
> > >
> > > I think we need a multi-return value API here, as we may add operations in
> > > future which have non-error status values to return. The obvious case is
> > > DMA engines which support "compare" operations. In that case a successful
> > > compare (as in there were no DMA or HW errors) can return "equal" or
> > > "not-equal" as statuses. For general "copy" operations, the faster
> > > completion op can be used to just return successful values (and only call
> > > this status version on error), while apps using those compare ops or a
> > > mixture of copy and compare ops, would always use the slower one that
> > > returns status values for each and every op..
> > >
> > > The ioat APIs used 32-bit integer values for this status array so as to
> > > allow e.g. 16-bits for error code and 16-bits for future status values. For
> > > most operations there should be a fairly small set of things that can go
> > > wrong, i.e. bad source address, bad destination address or invalid length.
> > > Within that we may have a couple of specifics for why an address is bad,
> > > but even so I don't think we need to start having multiple bit
> > > combinations.
> >
> > OK. What is the purpose of errors status? Is it for application printing it or
> > Does the application need to take any action based on specific error requests?
>
> It's largely for information purposes, but in the case of SVA/SVM errors
> could occur due to the memory not being pinned, i.e. a page fault, in some
> cases. If that happens, then it's up the app to either touch the memory and
> retry the copy, or to do a SW memcpy as a fallback.
>
> In other error cases, I think it's good to tell the application if it's
> passing around bad data, or data that is beyond the scope of hardware, e.g.
> a copy that is beyond what can be done in a single transaction for a HW
> instance. Given that there are always things that can go wrong, I think we
> need some error reporting mechanism.
>
> > If the former is scope, then we need to define the standard enum value
> > for the error right?
> > ie. uint32_t *status needs to change to enum rte_dma_error or so.
> >
> Sure. Perhaps an error/status structure either is an option, where we
> explicitly call out error info from status info.
Agree. Better to have a structure with filed like,
1) enum rte_dma_error_type
2) memory to store, informative message on fine aspects of error.
LIke address caused issue etc.(Which will be driver-specific
information).
>
> >
> >
> <snip to end>
>
> /Bruce
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH V2] ethdev: add dev configured flag
2021-07-06 8:36 4% ` Andrew Rybchenko
2021-07-07 2:55 0% ` Huisong Li
@ 2021-07-07 7:39 3% ` David Marchand
2021-07-07 8:23 0% ` Andrew Rybchenko
1 sibling, 1 reply; 200+ results
From: David Marchand @ 2021-07-07 7:39 UTC (permalink / raw)
To: Andrew Rybchenko, Dodji Seketeli
Cc: Huisong Li, dev, Thomas Monjalon, Yigit, Ferruh, Ananyev,
Konstantin, Ray Kinsella
On Tue, Jul 6, 2021 at 10:36 AM Andrew Rybchenko
<andrew.rybchenko@oktetlabs.ru> wrote:
>
> @David, could you take a look at the ABI breakage warnings for
> the patch. May we ignore it since ABI looks backward
> compatible? Or should be marked as a minor change ABI
> which is backward compatible with DPDK_21?
The whole eth_dev_shared_data area has always been reset to 0 at the
first port allocation in a dpdk application life.
Subsequent calls to rte_eth_dev_release_port() reset every port
eth_dev->data to 0.
This bit flag is added in a hole of the structure, and it is
set/manipulated internally of ethdev.
So unless the application was doing something nasty like highjacking
this empty hole in the structure, I see no problem with the change wrt
ABI.
I wonder if libabigail is too strict on this report.
Or maybe there is some extreme consideration on what a compiler could
do about this hole...
Dodji?
For now, we can waive the warning.
I'll look into the exception rule to add.
--
David Marchand
^ permalink raw reply [relevance 3%]
* [dpdk-dev] [PATCH v4 0/3] Use WFE for spinlock and ring
2021-07-07 5:43 3% ` [dpdk-dev] [PATCH v4 0/3] " Ruifeng Wang
@ 2021-07-07 5:48 3% ` Ruifeng Wang
2 siblings, 0 replies; 200+ results
From: Ruifeng Wang @ 2021-07-07 5:48 UTC (permalink / raw)
Cc: dev, david.marchand, thomas, bruce.richardson, jerinj, nd,
honnappa.nagarahalli, ruifeng.wang
The rte_wait_until_equal_xxx APIs abstract the functionality of 'polling
for a memory location to become equal to a given value'[1].
Use the API for the rte spinlock and ring implementations.
With the wait until equal APIs being stable, changes will not impact ABI.
[1] http://patches.dpdk.org/cover/62703/
v4:
Added meson option to expose WFE. (David, Bruce)
v3:
Series rebased. (David)
Gavin Hu (1):
spinlock: use wfe to reduce contention on aarch64
Ruifeng Wang (2):
ring: use wfe to wait for ring tail update on aarch64
build: add option to enable wait until equal
config/arm/meson.build | 2 +-
lib/eal/include/generic/rte_spinlock.h | 4 ++--
lib/ring/rte_ring_c11_pvt.h | 4 ++--
lib/ring/rte_ring_generic_pvt.h | 3 +--
meson_options.txt | 2 ++
5 files changed, 8 insertions(+), 7 deletions(-)
--
2.25.1
^ permalink raw reply [relevance 3%]
* [dpdk-dev] [PATCH v4 0/3] Use WFE for spinlock and ring
@ 2021-07-07 5:43 3% ` Ruifeng Wang
2021-07-07 5:48 3% ` Ruifeng Wang
2 siblings, 0 replies; 200+ results
From: Ruifeng Wang @ 2021-07-07 5:43 UTC (permalink / raw)
Cc: dev, david.marchand, thomas, bruce.richardson, jerinj, nd,
honnappa.nagarahalli, ruifeng.wang
The rte_wait_until_equal_xxx APIs abstract the functionality of 'polling
for a memory location to become equal to a given value'[1].
Use the API for the rte spinlock and ring implementations.
With the wait until equal APIs being stable, changes will not impact ABI.
[1] http://patches.dpdk.org/cover/62703/
v4:
Added meson option to expose WFE. (David, Bruce)
v3:
Series rebased. (David)
Gavin Hu (1):
spinlock: use wfe to reduce contention on aarch64
Ruifeng Wang (2):
ring: use wfe to wait for ring tail update on aarch64
build: add option to enable wait until equal
config/arm/meson.build | 2 +-
lib/eal/include/generic/rte_spinlock.h | 4 ++--
lib/ring/rte_ring_c11_pvt.h | 4 ++--
lib/ring/rte_ring_generic_pvt.h | 3 +--
meson_options.txt | 2 ++
5 files changed, 8 insertions(+), 7 deletions(-)
--
2.25.1
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [PATCH V2] ethdev: add dev configured flag
2021-07-06 8:36 4% ` Andrew Rybchenko
@ 2021-07-07 2:55 0% ` Huisong Li
2021-07-07 8:25 3% ` Andrew Rybchenko
2021-07-07 7:39 3% ` David Marchand
1 sibling, 1 reply; 200+ results
From: Huisong Li @ 2021-07-07 2:55 UTC (permalink / raw)
To: Andrew Rybchenko, dev
Cc: thomas, ferruh.yigit, konstantin.ananyev, david.marchand, Ray Kinsella
在 2021/7/6 16:36, Andrew Rybchenko 写道:
> @David, could you take a look at the ABI breakage warnings for
> the patch. May we ignore it since ABI looks backward
> compatible? Or should be marked as a minor change ABI
> which is backward compatible with DPDK_21?
>
> On 7/6/21 7:10 AM, Huisong Li wrote:
>> Currently, if dev_configure is not called or fails to be called, users
>> can still call dev_start successfully. So it is necessary to have a flag
>> which indicates whether the device is configured, to control whether
>> dev_start can be called and eliminate dependency on user invocation order.
>>
>> The flag stored in "struct rte_eth_dev_data" is more reasonable than
>> "enum rte_eth_dev_state". "enum rte_eth_dev_state" is private to the
>> primary and secondary processes, and can be independently controlled.
>> However, the secondary process does not make resource allocations and
>> does not call dev_configure(). These are done by the primary process
>> and can be obtained or used by the secondary process. So this patch
>> adds a "dev_configured" flag in "rte_eth_dev_data", like "dev_started".
>>
>> Signed-off-by: Huisong Li <lihuisong@huawei.com>
> Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
>
>> ---
>> v1 -> v2:
>> - adjusting the description of patch.
>>
>> ---
>> lib/ethdev/rte_ethdev.c | 16 ++++++++++++++++
>> lib/ethdev/rte_ethdev_core.h | 6 +++++-
>> 2 files changed, 21 insertions(+), 1 deletion(-)
>>
>> diff --git a/lib/ethdev/rte_ethdev.c b/lib/ethdev/rte_ethdev.c
>> index c607eab..6540432 100644
>> --- a/lib/ethdev/rte_ethdev.c
>> +++ b/lib/ethdev/rte_ethdev.c
>> @@ -1356,6 +1356,13 @@ rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
>> return -EBUSY;
>> }
>>
>> + /*
>> + * Ensure that "dev_configured" is always 0 each time prepare to do
>> + * dev_configure() to avoid any non-anticipated behaviour.
>> + * And set to 1 when dev_configure() is executed successfully.
>> + */
>> + dev->data->dev_configured = 0;
>> +
>> /* Store original config, as rollback required on failure */
>> memcpy(&orig_conf, &dev->data->dev_conf, sizeof(dev->data->dev_conf));
>>
>> @@ -1606,6 +1613,8 @@ rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
>> }
>>
>> rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q, dev_conf, 0);
>> + dev->data->dev_configured = 1;
>> +
> I think it should be inserted before the trace, since tracing
> is intentionally put close to return without any empty lines
> in between.
All right. Do I need to send a patch V3?
>> return 0;
>> reset_queues:
>> eth_dev_rx_queue_config(dev, 0);
>> @@ -1751,6 +1760,13 @@ rte_eth_dev_start(uint16_t port_id)
>>
>> RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
>>
>> + if (dev->data->dev_configured == 0) {
>> + RTE_ETHDEV_LOG(INFO,
>> + "Device with port_id=%"PRIu16" is not configured.\n",
>> + port_id);
>> + return -EINVAL;
>> + }
>> +
>> if (dev->data->dev_started != 0) {
>> RTE_ETHDEV_LOG(INFO,
>> "Device with port_id=%"PRIu16" already started\n",
>> diff --git a/lib/ethdev/rte_ethdev_core.h b/lib/ethdev/rte_ethdev_core.h
>> index 4679d94..edf96de 100644
>> --- a/lib/ethdev/rte_ethdev_core.h
>> +++ b/lib/ethdev/rte_ethdev_core.h
>> @@ -167,7 +167,11 @@ struct rte_eth_dev_data {
>> scattered_rx : 1, /**< RX of scattered packets is ON(1) / OFF(0) */
>> all_multicast : 1, /**< RX all multicast mode ON(1) / OFF(0). */
>> dev_started : 1, /**< Device state: STARTED(1) / STOPPED(0). */
>> - lro : 1; /**< RX LRO is ON(1) / OFF(0) */
>> + lro : 1, /**< RX LRO is ON(1) / OFF(0) */
>> + dev_configured : 1;
>> + /**< Indicates whether the device is configured.
>> + * CONFIGURED(1) / NOT CONFIGURED(0).
>> + */
>> uint8_t rx_queue_state[RTE_MAX_QUEUES_PER_PORT];
>> /**< Queues state: HAIRPIN(2) / STARTED(1) / STOPPED(0). */
>> uint8_t tx_queue_state[RTE_MAX_QUEUES_PER_PORT];
>>
> .
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH] test: fix crypto_op length for sessionless case
@ 2021-07-06 16:09 3% ` Brandon Lo
0 siblings, 0 replies; 200+ results
From: Brandon Lo @ 2021-07-06 16:09 UTC (permalink / raw)
To: Gujjar, Abhinandan S
Cc: Yigit, Ferruh, dev, jerinj, dpdklab, aconole, gakhil, Power,
Ciara, Ali Alnubani
Hi all,
I have rerun the failing unit test. It also recreated the report, so
that category should be passing now.
Currently, I am looking more into the ABI test that is failing on
Arch, as well as the failures with DTS tests.
I will keep this thread updated.
Thanks,
Brandon
On Mon, Jul 5, 2021 at 2:30 AM Gujjar, Abhinandan S
<abhinandan.gujjar@intel.com> wrote:
>
> Hi Jerin/Akhil,
>
> Could you please review the patch?
>
> Regards
> Abhinandan
>
> > -----Original Message-----
> > From: Yigit, Ferruh <ferruh.yigit@intel.com>
> > Sent: Saturday, July 3, 2021 4:56 AM
> > To: Gujjar, Abhinandan S <abhinandan.gujjar@intel.com>; dev@dpdk.org;
> > jerinj@marvell.com; dpdklab@iol.unh.edu; aconole@redhat.com
> > Cc: gakhil@marvell.com; Power, Ciara <ciara.power@intel.com>; Ali Alnubani
> > <alialnu@nvidia.com>
> > Subject: Re: [PATCH] test: fix crypto_op length for sessionless case
> >
> > On 7/2/2021 7:08 PM, Gujjar, Abhinandan S wrote:
> > > Hi Aaron/dpdklab,
> > >
> > > This patch's CI seems to have lot of false positive!
> > > Ferruh triggered the re-test sometime back. Now, it is reporting less.
> > > Could you please check from your end? Thanks!
> > >
> >
> > Only a malloc related unit test is still failing, which seems unrelated with the
> > patch. I am triggering it one more time, third time lucky.
> >
> > Also after re-run, some tests passing now still shown as fail in the patchwork
> > checks table. Isn't re-run sending the patchwork test status again?
> >
> > > Regards
> > > Abhinandan
> > >
> > >
> > >> -----Original Message-----
> > >> From: Gujjar, Abhinandan S <abhinandan.gujjar@intel.com>
> > >> Sent: Wednesday, June 30, 2021 6:17 PM
> > >> To: dev@dpdk.org; jerinj@marvell.com
> > >> Cc: gakhil@marvell.com; Gujjar, Abhinandan S
> > >> <abhinandan.gujjar@intel.com>; Power, Ciara <ciara.power@intel.com>
> > >> Subject: [PATCH] test: fix crypto_op length for sessionless case
> > >>
> > >> Currently, private_data_offset for the sessionless is computed
> > >> wrongly which includes extra bytes added because of using
> > >> sizeof(struct
> > >> rte_crypto_sym_xform) * 2) instead of (sizeof(union
> > >> rte_event_crypto_metadata)). Due to this buffer overflow, the
> > >> corruption was leading to test application crash while freeing the ops
> > mempool.
> > >>
> > >> Fixes: 3c2c535ecfc0 ("test: add event crypto adapter auto-test")
> > >> Reported-by: ciara.power@intel.com
> > >>
> > >> Signed-off-by: Abhinandan Gujjar <abhinandan.gujjar@intel.com>
> > >> ---
> > >> app/test/test_event_crypto_adapter.c | 4 ++--
> > >> 1 file changed, 2 insertions(+), 2 deletions(-)
> > >>
> > >> diff --git a/app/test/test_event_crypto_adapter.c
> > >> b/app/test/test_event_crypto_adapter.c
> > >> index f689bc1f2..688ac0b2f 100644
> > >> --- a/app/test/test_event_crypto_adapter.c
> > >> +++ b/app/test/test_event_crypto_adapter.c
> > >> @@ -229,7 +229,7 @@ test_op_forward_mode(uint8_t session_less)
> > >> first_xform = &cipher_xform;
> > >> sym_op->xform = first_xform;
> > >> uint32_t len = IV_OFFSET + MAXIMUM_IV_LENGTH +
> > >> - (sizeof(struct rte_crypto_sym_xform) * 2);
> > >> + (sizeof(union
> > >> + rte_event_crypto_metadata));
> > >> op->private_data_offset = len;
> > >> /* Fill in private data information */
> > >> rte_memcpy(&m_data.response_info, &response_info, @@ -
> > >> 424,7 +424,7 @@ test_op_new_mode(uint8_t session_less)
> > >> first_xform = &cipher_xform;
> > >> sym_op->xform = first_xform;
> > >> uint32_t len = IV_OFFSET + MAXIMUM_IV_LENGTH +
> > >> - (sizeof(struct rte_crypto_sym_xform) * 2);
> > >> + (sizeof(union
> > >> + rte_event_crypto_metadata));
> > >> op->private_data_offset = len;
> > >> /* Fill in private data information */
> > >> rte_memcpy(&m_data.response_info, &response_info,
> > >> --
> > >> 2.25.1
> > >
>
--
Brandon Lo
UNH InterOperability Laboratory
21 Madbury Rd, Suite 100, Durham, NH 03824
blo@iol.unh.edu
www.iol.unh.edu
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [PATCH V2] ethdev: add dev configured flag
@ 2021-07-06 8:36 4% ` Andrew Rybchenko
2021-07-07 2:55 0% ` Huisong Li
2021-07-07 7:39 3% ` David Marchand
0 siblings, 2 replies; 200+ results
From: Andrew Rybchenko @ 2021-07-06 8:36 UTC (permalink / raw)
To: Huisong Li, dev
Cc: thomas, ferruh.yigit, konstantin.ananyev, david.marchand, Ray Kinsella
@David, could you take a look at the ABI breakage warnings for
the patch. May we ignore it since ABI looks backward
compatible? Or should be marked as a minor change ABI
which is backward compatible with DPDK_21?
On 7/6/21 7:10 AM, Huisong Li wrote:
> Currently, if dev_configure is not called or fails to be called, users
> can still call dev_start successfully. So it is necessary to have a flag
> which indicates whether the device is configured, to control whether
> dev_start can be called and eliminate dependency on user invocation order.
>
> The flag stored in "struct rte_eth_dev_data" is more reasonable than
> "enum rte_eth_dev_state". "enum rte_eth_dev_state" is private to the
> primary and secondary processes, and can be independently controlled.
> However, the secondary process does not make resource allocations and
> does not call dev_configure(). These are done by the primary process
> and can be obtained or used by the secondary process. So this patch
> adds a "dev_configured" flag in "rte_eth_dev_data", like "dev_started".
>
> Signed-off-by: Huisong Li <lihuisong@huawei.com>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
> ---
> v1 -> v2:
> - adjusting the description of patch.
>
> ---
> lib/ethdev/rte_ethdev.c | 16 ++++++++++++++++
> lib/ethdev/rte_ethdev_core.h | 6 +++++-
> 2 files changed, 21 insertions(+), 1 deletion(-)
>
> diff --git a/lib/ethdev/rte_ethdev.c b/lib/ethdev/rte_ethdev.c
> index c607eab..6540432 100644
> --- a/lib/ethdev/rte_ethdev.c
> +++ b/lib/ethdev/rte_ethdev.c
> @@ -1356,6 +1356,13 @@ rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
> return -EBUSY;
> }
>
> + /*
> + * Ensure that "dev_configured" is always 0 each time prepare to do
> + * dev_configure() to avoid any non-anticipated behaviour.
> + * And set to 1 when dev_configure() is executed successfully.
> + */
> + dev->data->dev_configured = 0;
> +
> /* Store original config, as rollback required on failure */
> memcpy(&orig_conf, &dev->data->dev_conf, sizeof(dev->data->dev_conf));
>
> @@ -1606,6 +1613,8 @@ rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
> }
>
> rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q, dev_conf, 0);
> + dev->data->dev_configured = 1;
> +
I think it should be inserted before the trace, since tracing
is intentionally put close to return without any empty lines
in between.
> return 0;
> reset_queues:
> eth_dev_rx_queue_config(dev, 0);
> @@ -1751,6 +1760,13 @@ rte_eth_dev_start(uint16_t port_id)
>
> RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
>
> + if (dev->data->dev_configured == 0) {
> + RTE_ETHDEV_LOG(INFO,
> + "Device with port_id=%"PRIu16" is not configured.\n",
> + port_id);
> + return -EINVAL;
> + }
> +
> if (dev->data->dev_started != 0) {
> RTE_ETHDEV_LOG(INFO,
> "Device with port_id=%"PRIu16" already started\n",
> diff --git a/lib/ethdev/rte_ethdev_core.h b/lib/ethdev/rte_ethdev_core.h
> index 4679d94..edf96de 100644
> --- a/lib/ethdev/rte_ethdev_core.h
> +++ b/lib/ethdev/rte_ethdev_core.h
> @@ -167,7 +167,11 @@ struct rte_eth_dev_data {
> scattered_rx : 1, /**< RX of scattered packets is ON(1) / OFF(0) */
> all_multicast : 1, /**< RX all multicast mode ON(1) / OFF(0). */
> dev_started : 1, /**< Device state: STARTED(1) / STOPPED(0). */
> - lro : 1; /**< RX LRO is ON(1) / OFF(0) */
> + lro : 1, /**< RX LRO is ON(1) / OFF(0) */
> + dev_configured : 1;
> + /**< Indicates whether the device is configured.
> + * CONFIGURED(1) / NOT CONFIGURED(0).
> + */
> uint8_t rx_queue_state[RTE_MAX_QUEUES_PER_PORT];
> /**< Queues state: HAIRPIN(2) / STARTED(1) / STOPPED(0). */
> uint8_t tx_queue_state[RTE_MAX_QUEUES_PER_PORT];
>
^ permalink raw reply [relevance 4%]
* Re: [dpdk-dev] [dpdk-stable] 20.11.2 patches review and test
2021-07-06 3:26 0% ` [dpdk-dev] [dpdk-stable] " Kalesh Anakkur Purayil
@ 2021-07-06 6:47 0% ` Xueming(Steven) Li
0 siblings, 0 replies; 200+ results
From: Xueming(Steven) Li @ 2021-07-06 6:47 UTC (permalink / raw)
To: Kalesh Anakkur Purayil
Cc: dpdk stable, dpdk-dev, Abhishek Marathe, Akhil Goyal,
Ali Alnubani, benjamin.walker, David Christensen,
Hariprasad Govindharajan, Hemant Agrawal, Ian Stokes,
Jerin Jacob, John McNamara, Ju-Hyoung Lee, Kevin Traynor,
Luca Boccassi, Pei Zhang, pingx.yu, qian.q.xu, Raslan Darawsheh,
NBU-Contact-Thomas Monjalon, yuan.peng, zhaoyan.chen
>
> From: Kalesh Anakkur Purayil <kalesh-anakkur.purayil@broadcom.com>
> Sent: Tuesday, July 6, 2021 11:27 AM
> To: Xueming(Steven) Li <xuemingl@nvidia.com>
> Cc: dpdk stable <stable@dpdk.org>; dpdk-dev <dev@dpdk.org>; Abhishek Marathe <Abhishek.Marathe@microsoft.com>; Akhil Goyal <akhil.goyal@nxp.com>; Ali Alnubani <alialnu@nvidi
> Subject: Re: [dpdk-stable] 20.11.2 patches review and test
>
> Hi Xueming,
>
> Testing with dpdk v20.11.2 from Broadcom looks good.
>
> - Basic functionality:
> Send and receive multiple types of traffic.
> - Changing/checking link status through testpmd.
> - RSS tests.
> - TSO tests
> - VLAN filtering tests.
> - MAC filtering test
> - statistics tests
> - Checksum offload tests
> - MTU tests
> - Promiscuous tests
> - Allmulti test
>
> NIC: BCM57414 NetXtreme-E 10Gb/25Gb Ethernet Controller, Firmware: 219.0.88.0
> NIC: BCM57508 NetXtreme-E 10Gb/25Gb/40Gb/50Gb/100Gb/200Gb Ethernet, Firmware : 220.0.0.100
Thanks very much!
>
> Regards,
> Kalesh
>
> On Sun, Jun 27, 2021 at 4:59 AM Xueming Li <mailto:xuemingl@nvidia.com> wrote:
> Hi all,
>
> Here is a list of patches targeted for stable release 20.11.2.
>
> The planned date for the final release is 6th July.
>
> Please help with testing and validation of your use cases and report
> any issues/results with reply-all to this mail. For the final release
> the fixes and reported validations will be added to the release notes.
>
> A release candidate tarball can be found at:
>
> https://dpdk.org/browse/dpdk-stable/tag/?id=v20.11.2-rc2
>
> These patches are located at branch 20.11 of dpdk-stable repo:
> https://dpdk.org/browse/dpdk-stable/
>
> Thanks.
>
> Xueming Li <mailto:xuemingl@nvidia.com>
>
> ---
> Adam Dybkowski (3):
> common/qat: increase IM buffer size for GEN3
> compress/qat: enable compression on GEN3
> crypto/qat: fix null authentication request
>
> Ajit Khaparde (7):
> net/bnxt: fix RSS context cleanup
> net/bnxt: check kvargs parsing
> net/bnxt: fix resource cleanup
> doc: fix formatting in testpmd guide
> net/bnxt: fix mismatched type comparison in MAC restore
> net/bnxt: check PCI config read
> net/bnxt: fix mismatched type comparison in Rx
>
> Alvin Zhang (11):
> net/ice: fix VLAN filter with PF
> net/i40e: fix input set field mask
> net/igc: fix Rx RSS hash offload capability
> net/igc: fix Rx error counter for bad length
> net/e1000: fix Rx error counter for bad length
> net/e1000: fix max Rx packet size
> net/igc: fix Rx packet size
> net/ice: fix fast mbuf freeing
> net/iavf: fix VF to PF command failure handling
> net/i40e: fix VF RSS configuration
> net/igc: fix speed configuration
>
> Anatoly Burakov (3):
> fbarray: fix log message on truncation error
> power: do not skip saving original P-state governor
> power: save original ACPI governor always
>
> Andrew Boyer (1):
> net/ionic: fix completion type in lif init
>
> Andrew Rybchenko (4):
> net/failsafe: fix RSS hash offload reporting
> net/failsafe: report minimum and maximum MTU
> common/sfc_efx: remove GENEVE from supported tunnels
> net/sfc: fix mark support in EF100 native Rx datapath
>
> Andy Moreton (2):
> common/sfc_efx/base: limit reported MCDI response length
> common/sfc_efx/base: add missing MCDI response length checks
>
> Ankur Dwivedi (1):
> crypto/octeontx: fix session-less mode
>
> Apeksha Gupta (1):
> examples/l2fwd-crypto: skip masked devices
>
> Arek Kusztal (1):
> crypto/qat: fix offset for out-of-place scatter-gather
>
> Beilei Xing (1):
> net/i40evf: fix packet loss for X722
>
> Bing Zhao (1):
> net/mlx5: fix loopback for Direct Verbs queue
>
> Bruce Richardson (2):
> build: exclude meson files from examples installation
> raw/ioat: fix script for configuring small number of queues
>
> Chaoyong He (1):
> doc: fix multiport syntax in nfp guide
>
> Chenbo Xia (1):
> examples/vhost: check memory table query
>
> Chengchang Tang (20):
> net/hns3: fix HW buffer size on MTU update
> net/hns3: fix processing Tx offload flags
> net/hns3: fix Tx checksum for UDP packets with special port
> net/hns3: fix long task queue pairs reset time
> ethdev: validate input in module EEPROM dump
> ethdev: validate input in register info
> ethdev: validate input in EEPROM info
> net/hns3: fix rollback after setting PVID failure
> net/hns3: fix timing in resetting queues
> net/hns3: fix queue state when concurrent with reset
> net/hns3: fix configure FEC when concurrent with reset
> net/hns3: fix use of command status enumeration
> examples: add eal cleanup to examples
> net/bonding: fix adding itself as its slave
> net/hns3: fix timing in mailbox
> app/testpmd: fix max queue number for Tx offloads
> net/tap: fix interrupt vector array size
> net/bonding: fix socket ID check
> net/tap: check ioctl on restore
> examples/timer: fix time interval
>
> Chengwen Feng (50):
> net/hns3: fix flow counter value
> net/hns3: fix VF mailbox head field
> net/hns3: support get device version when dump register
> net/hns3: fix some packet types
> net/hns3: fix missing outer L4 UDP flag for VXLAN
> net/hns3: remove VLAN/QinQ ptypes from support list
> test: check thread creation
> common/dpaax: fix possible null pointer access
> examples/ethtool: remove unused parsing
> net/hns3: fix flow director lock
> net/e1000/base: fix timeout for shadow RAM write
> net/hns3: fix setting default MAC address in bonding of VF
> net/hns3: fix possible mismatched response of mailbox
> net/hns3: fix VF handling LSC event in secondary process
> net/hns3: fix verification of NEON support
> mbuf: check shared memory before dumping dynamic space
> eventdev: remove redundant thread name setting
> eventdev: fix memory leakage on thread creation failure
> net/kni: check init result
> net/hns3: fix mailbox error message
> net/hns3: fix processing link status message on PF
> net/hns3: remove unused mailbox macro and struct
> net/bonding: fix leak on remove
> net/hns3: fix handling link update
> net/i40e: fix negative VEB index
> net/i40e: remove redundant VSI check in Tx queue setup
> net/virtio: fix getline memory leakage
> net/hns3: log time delta in decimal format
> net/hns3: fix time delta calculation
> net/hns3: remove unused macros
> net/hns3: fix vector Rx burst limitation
> net/hns3: remove read when enabling TM QCN error event
> net/hns3: remove unused VMDq code
> net/hns3: increase readability in logs
> raw/ntb: check SPAD user index
> raw/ntb: check memory allocations
> ipc: check malloc sync reply result
> eal: fix service core list parsing
> ipc: use monotonic clock
> net/hns3: return error on PCI config write failure
> net/hns3: fix log on flow director clear
> net/hns3: clear hash map on flow director clear
> net/hns3: fix querying flow director counter for out param
> net/hns3: fix TM QCN error event report by MSI-X
> net/hns3: fix mailbox message ID in log
> net/hns3: fix secondary process request start/stop Rx/Tx
> net/hns3: fix ordering in secondary process initialization
> net/hns3: fail setting FEC if one bit mode is not supported
> net/mlx4: fix secondary process initialization ordering
> net/mlx5: fix secondary process initialization ordering
>
> Ciara Loftus (1):
> net/af_xdp: fix error handling during Rx queue setup
>
> Ciara Power (2):
> telemetry: fix race on callbacks list
> test/crypto: fix return value of a skipped test
>
> Conor Walsh (1):
> examples/l3fwd: fix LPM IPv6 subnets
>
> Cristian Dumitrescu (3):
> table: fix actions with different data size
> pipeline: fix instruction translation
> pipeline: fix endianness conversions
>
> Dapeng Yu (3):
> net/igc: remove MTU setting limitation
> net/e1000: remove MTU setting limitation
> examples/packet_ordering: fix port configuration
>
> David Christensen (1):
> config/ppc: reduce number of cores and NUMA nodes
>
> David Harton (1):
> net/ena: fix releasing Tx ring mbufs
>
> David Hunt (4):
> test/power: fix CPU frequency check
> test/power: add turbo mode to frequency check
> test/power: fix low frequency test when turbo enabled
> test/power: fix turbo test
>
> David Marchand (18):
> doc: fix sphinx rtd theme import in GHA
> service: clean references to removed symbol
> eal: fix evaluation of log level option
> ci: hook to GitHub Actions
> ci: enable v21 ABI checks
> ci: fix package installation in GitHub Actions
> ci: ignore APT update failure in GitHub Actions
> ci: catch coredumps
> vhost: fix offload flags in Rx path
> bus/fslmc: remove unused debug macro
> eal: fix leak in shared lib mode detection
> event/dpaa2: remove unused macros
> net/ice/base: fix memory allocation wrapper
> net/ice: fix leak on thread termination
> devtools: fix orphan symbols check with busybox
> net/vhost: restore pseudo TSO support
> net/ark: fix leak on thread termination
> build: fix drivers selection without Python
>
> Dekel Peled (1):
> common/mlx5: fix DevX read output buffer size
>
> Dmitry Kozlyuk (4):
> net/pcap: fix format string
> eal/windows: add missing SPDX license tag
> buildtools: fix all drivers disabled on Windows
> examples/rxtx_callbacks: fix port ID format specifier
>
> Ed Czeck (2):
> net/ark: update packet director initial state
> net/ark: refactor Rx buffer recovery
>
> Elad Nachman (2):
> kni: support async user request
> kni: fix kernel deadlock with bifurcated device
>
> Feifei Wang (2):
> net/i40e: fix parsing packet type for NEON
> test/trace: fix race on collected perf data
>
> Ferruh Yigit (9):
> power: remove duplicated symbols from map file
> log/linux: make default output stderr
> license: fix typos
> drivers/net: fix FW version query
> net/bnx2x: fix build with GCC 11
> net/bnx2x: fix build with GCC 11
> net/ice/base: fix build with GCC 11
> net/tap: fix build with GCC 11
> test/table: fix build with GCC 11
>
> Gregory Etelson (2):
> app/testpmd: fix tunnel offload flows cleanup
> net/mlx5: fix tunnel offload private items location
>
> Guoyang Zhou (1):
> net/hinic: fix crash in secondary process
>
> Haiyue Wang (1):
> net/ixgbe: fix Rx errors statistics for UDP checksum
>
> Harman Kalra (1):
> event/octeontx2: fix device reconfigure for single slot
>
> Heinrich Kuhn (1):
> net/nfp: fix reporting of RSS capabilities
>
> Hemant Agrawal (3):
> ethdev: add missing buses in device iterator
> crypto/dpaa_sec: affine the thread portal affinity
> crypto/dpaa2_sec: fix close and uninit functions
>
> Hongbo Zheng (9):
> app/testpmd: fix Tx/Rx descriptor query error log
> net/hns3: fix FLR miss detection
> net/hns3: delete redundant blank line
> bpf: fix JSLT validation
> common/sfc_efx/base: fix dereferencing null pointer
> power: fix sanity checks for guest channel read
> net/hns3: fix VF alive notification after config restore
> examples/l3fwd-power: fix empty poll thresholds
> net/hns3: fix concurrent interrupt handling
>
> Huisong Li (23):
> net/hns3: fix device capabilities for copper media type
> net/hns3: remove unused parameter markers
> net/hns3: fix reporting undefined speed
> net/hns3: fix link update when failed to get link info
> net/hns3: fix flow control exception
> app/testpmd: fix bitmap of link speeds when force speed
> net/hns3: fix flow control mode
> net/hns3: remove redundant mailbox response
> net/hns3: fix DCB mode check
> net/hns3: fix VMDq mode check
> net/hns3: fix mbuf leakage
> net/hns3: fix link status when port is stopped
> net/hns3: fix link speed when port is down
> app/testpmd: fix forward lcores number for DCB
> app/testpmd: fix DCB forwarding configuration
> app/testpmd: fix DCB re-configuration
> app/testpmd: verify DCB config during forward config
> net/hns3: fix Rx/Tx queue numbers check
> net/hns3: fix requested FC mode rollback
> net/hns3: remove meaningless packet buffer rollback
> net/hns3: fix DCB configuration
> net/hns3: fix DCB reconfiguration
> net/hns3: fix link speed when VF device is down
>
> Ibtisam Tariq (1):
> examples/vhost_crypto: remove unused short option
>
> Igor Chauskin (2):
> net/ena: switch memcpy to optimized version
> net/ena: fix parsing of large LLQ header device argument
>
> Igor Russkikh (2):
> net/qede: reduce log verbosity
> net/qede: accept bigger RSS table
>
> Ilya Maximets (1):
> net/virtio: fix interrupt unregistering for listening socket
>
> Ivan Malov (5):
> net/sfc: fix buffer size for flow parse
> net: fix comment in IPv6 header
> net/sfc: fix error path inconsistency
> common/sfc_efx/base: fix indication of MAE encap support
> net/sfc: fix outer rule rollback on error
>
> Jerin Jacob (1):
> examples: fix pkg-config override
>
> Jiawei Wang (4):
> app/testpmd: fix NVGRE encap configuration
> net/mlx5: fix resource release for mirror flow
> net/mlx5: fix RSS flow item expansion for GRE key
> net/mlx5: fix RSS flow item expansion for NVGRE
>
> Jiawei Zhu (1):
> net/mlx5: fix Rx segmented packets on mbuf starvation
>
> Jiawen Wu (4):
> net/txgbe: remove unused functions
> net/txgbe: fix Rx missed packet counter
> net/txgbe: update packet type
> net/txgbe: fix QinQ strip
>
> Jiayu Hu (2):
> vhost: fix queue initialization
> vhost: fix redundant vring status change notification
>
> Jie Wang (1):
> net/ice: fix VSI array out of bounds access
>
> John Daley (2):
> net/enic: fix flow initialization error handling
> net/enic: enable GENEVE offload via VNIC configuration
>
> Juraj Linkea (1):
> eal/arm64: fix platform register bit
>
> Kai Ji (2):
> test/crypto: fix auth-cipher compare length in OOP
> test/crypto: copy offset data to OOP destination buffer
>
> Kalesh AP (23):
> net/bnxt: remove unused macro
> net/bnxt: fix VNIC configuration
> net/bnxt: fix firmware fatal error handling
> net/bnxt: fix FW readiness check during recovery
> net/bnxt: fix device readiness check
> net/bnxt: fix VF info allocation
> net/bnxt: fix HWRM and FW incompatibility handling
> net/bnxt: mute some failure logs
> app/testpmd: check MAC address query
> net/bnxt: fix PCI write check
> net/bnxt: fix link state operations
> net/bnxt: fix timesync when PTP is not supported
> net/bnxt: fix memory allocation for command response
> net/bnxt: fix double free in port start failure
> net/bnxt: fix configuring LRO
> net/bnxt: fix health check alarm cancellation
> net/bnxt: fix PTP support for Thor
> net/bnxt: fix ring count calculation for Thor
> net/bnxt: remove unnecessary forward declarations
> net/bnxt: remove unused function parameters
> net/bnxt: drop unused attribute
> net/bnxt: fix single PF per port check
> net/bnxt: prevent device access in error state
>
> Kamil Vojanec (1):
> net/mlx5/linux: fix firmware version
>
> Kevin Traynor (5):
> test/cmdline: fix inputs array
> test/crypto: fix build with GCC 11
> crypto/zuc: fix build with GCC 11
> test: fix build with GCC 11
> test/cmdline: silence clang 12 warning
>
> Konstantin Ananyev (1):
> acl: fix build with GCC 11
>
> Lance Richardson (8):
> net/bnxt: fix Rx buffer posting
> net/bnxt: fix Tx length hint threshold
> net/bnxt: fix handling of null flow mask
> test: fix TCP header initialization
> net/bnxt: fix Rx descriptor status
> net/bnxt: fix Rx queue count
> net/bnxt: fix dynamic VNIC count
> eal: fix memory mapping on 32-bit target
>
> Leyi Rong (1):
> net/iavf: fix packet length parsing in AVX512
>
> Li Zhang (1):
> net/mlx5: fix flow actions index in cache
>
> Luc Pelletier (2):
> eal: fix race in control thread creation
> eal: fix hang in control thread creation
>
> Marvin Liu (5):
> vhost: fix split ring potential buffer overflow
> vhost: fix packed ring potential buffer overflow
> vhost: fix batch dequeue potential buffer overflow
> vhost: fix initialization of temporary header
> vhost: fix initialization of async temporary header
>
> Matan Azrad (5):
> common/mlx5/linux: add glue function to query WQ
> common/mlx5: add DevX command to query WQ
> common/mlx5: add DevX commands for queue counters
> vdpa/mlx5: fix virtq cleaning
> vdpa/mlx5: fix device unplug
>
> Michael Baum (1):
> net/mlx5: fix flow age event triggering
>
> Michal Krawczyk (5):
> net/ena/base: improve style and comments
> net/ena/base: fix type conversions by explicit casting
> net/ena/base: destroy multiple wait events
> net/ena: fix crash with unsupported device argument
> net/ena: indicate Rx RSS hash presence
>
> Min Hu (Connor) (25):
> net/hns3: fix MTU config complexity
> net/hns3: update HiSilicon copyright syntax
> net/hns3: fix copyright date
> examples/ptpclient: remove wrong comment
> test/bpf: fix error message
> doc: fix HiSilicon copyright syntax
> net/hns3: remove unused macros
> net/hns3: remove unused macro
> app/eventdev: fix overflow in lcore list parsing
> test/kni: fix a comment
> test/kni: check init result
> net/hns3: fix typos on comments
> net/e1000: fix flow error message object
> app/testpmd: fix division by zero on socket memory dump
> net/kni: warn on stop failure
> app/bbdev: check memory allocation
> app/bbdev: fix HARQ error messages
> raw/skeleton: add missing check after setting attribute
> test/timer: check memzone allocation
> app/crypto-perf: check memory allocation
> examples/flow_classify: fix NUMA check of port and core
> examples/l2fwd-cat: fix NUMA check of port and core
> examples/skeleton: fix NUMA check of port and core
> test: check flow classifier creation
> test: fix division by zero
>
> Murphy Yang (3):
> net/ixgbe: fix RSS RETA being reset after port start
> net/i40e: fix flow director config after flow validate
> net/i40e: fix flow director for common pctypes
>
> Natanael Copa (5):
> common/dpaax/caamflib: fix build with musl
> bus/dpaa: fix 64-bit arch detection
> bus/dpaa: fix build with musl
> net/cxgbe: remove use of uint type
> app/testpmd: fix build with musl
>
> Nipun Gupta (1):
> bus/dpaa: fix statistics reading
>
> Nithin Dabilpuram (3):
> vfio: do not merge contiguous areas
> vfio: fix DMA mapping granularity for IOVA as VA
> test/mem: fix page size for external memory
>
> Olivier Matz (1):
> test/mempool: fix object initializer
>
> Pallavi Kadam (1):
> bus/pci: skip probing some Windows NDIS devices
>
> Pavan Nikhilesh (4):
> test/event: fix timeout accuracy
> app/eventdev: fix timeout accuracy
> app/eventdev: fix lcore parsing skipping last core
> event/octeontx2: fix XAQ pool reconfigure
>
> Pu Xu (1):
> ip_frag: fix fragmenting IPv4 packet with header option
>
> Qi Zhang (8):
> net/ice/base: fix payload indicator on ptype
> net/ice/base: fix uninitialized struct
> net/ice/base: cleanup filter list on error
> net/ice/base: fix memory allocation for MAC addresses
> net/iavf: fix TSO max segment size
> doc: fix matching versions in ice guide
> net/iavf: fix wrong Tx context descriptor
> common/iavf: fix duplicated offload bit
>
> Radha Mohan Chintakuntla (1):
> raw/octeontx2_dma: assign PCI device in DPI VF
>
> Raslan Darawsheh (1):
> ethdev: update flow item GTP QFI definition
>
> Richael Zhuang (2):
> test/power: add delay before checking CPU frequency
> test/power: round CPU frequency to check
>
> Robin Zhang (6):
> net/i40e: announce request queue capability in PF
> doc: update recommended versions for i40e
> net/i40e: fix lack of MAC type when set MAC address
> net/iavf: fix lack of MAC type when set MAC address
> net/iavf: fix primary MAC type when starting port
> net/i40e: fix primary MAC type when starting port
>
> Rohit Raj (3):
> net/dpaa2: fix getting link status
> net/dpaa: fix getting link status
> examples/l2fwd-crypto: fix packet length while decryption
>
> Roy Shterman (1):
> mem: fix freeing segments in --huge-unlink mode
>
> Satheesh Paul (1):
> net/octeontx2: fix VLAN filter
>
> Savinay Dharmappa (1):
> sched: fix traffic class oversubscription parameter
>
> Shijith Thotton (3):
> eventdev: fix case to initiate crypto adapter service
> event/octeontx2: fix crypto adapter queue pair operations
> event/octeontx2: configure crypto adapter xaq pool
>
> Siwar Zitouni (1):
> net/ice: fix disabling promiscuous mode
>
> Somnath Kotur (5):
> net/bnxt: fix xstats get
> net/bnxt: fix Rx and Tx timestamps
> net/bnxt: fix Tx timestamp init
> net/bnxt: refactor multi-queue Rx configuration
> net/bnxt: fix Rx timestamp when FIFO pending bit is set
>
> Stanislaw Kardach (6):
> test: proceed if timer subsystem already initialized
> stack: allow lock-free only on relevant architectures
> test/distributor: fix worker notification in burst mode
> test/distributor: fix burst flush on worker quit
> net/ena: remove endian swap functions
> net/ena: report default ring size
>
> Stephen Hemminger (2):
> kni: refactor user request processing
> net/bnxt: use prefix on global function
>
> Suanming Mou (1):
> net/mlx5: fix counter offset detection
>
> Tal Shnaiderman (2):
> eal/windows: fix default thread priority
> eal/windows: fix return codes of pthread shim layer
>
> Tengfei Zhang (1):
> net/pcap: fix file descriptor leak on close
>
> Thinh Tran (1):
> test: fix autotest handling of skipped tests
>
> Thomas Monjalon (18):
> bus/pci: fix Windows kernel driver categories
> eal: fix comment of OS-specific header files
> buildtools: fix build with busybox
> build: detect execinfo library on Linux
> build: remove redundant _GNU_SOURCE definitions
> eal: fix build with musl
> net/igc: remove use of uint type
> event/dlb: fix header includes for musl
> examples/bbdev: fix header include for musl
> drivers: fix log level after loading
> app/regex: fix usage text
> app/testpmd: fix usage text
> doc: fix names of UIO drivers
> doc: fix build with Sphinx 4
> bus/pci: support I/O port operations with musl
> app: fix exit messages
> regex/octeontx2: remove unused include directory
> doc: remove PDF requirements
>
> Tianyu Li (1):
> net/memif: fix Tx bps statistics for zero-copy
>
> Timothy McDaniel (2):
> event/dlb2: remove references to deferred scheduling
> doc: fix runtime options in DLB2 guide
>
> Tyler Retzlaff (1):
> eal: add C++ include guard for reciprocal header
>
> Vadim Podovinnikov (1):
> net/bonding: fix LACP system address check
>
> Venkat Duvvuru (1):
> net/bnxt: fix queues per VNIC
>
> Viacheslav Ovsiienko (16):
> net/mlx5: fix external buffer pool registration for Rx queue
> net/mlx5: fix metadata item validation for ingress flows
> net/mlx5: fix hashed list size for tunnel flow groups
> net/mlx5: fix UAR allocation diagnostics messages
> common/mlx5: add timestamp format support to DevX
> vdpa/mlx5: support timestamp format
> net/mlx5: fix Rx metadata leftovers
> net/mlx5: fix drop action for Direct Rules/Verbs
> net/mlx4: fix RSS action with null hash key
> net/mlx5: support timestamp format
> regex/mlx5: support timestamp format
> app/testpmd: fix segment number check
> net/mlx5: remove drop queue function prototypes
> net/mlx4: fix buffer leakage on device close
> net/mlx5: fix probing device in legacy bonding mode
> net/mlx5: fix receiving queue timestamp format
>
> Wei Huang (1):
> raw/ifpga: fix device name format
>
> Wenjun Wu (3):
> net/ice: check some functions return
> net/ice: fix RSS hash update
> net/ice: fix RSS for L2 packet
>
> Wenwu Ma (1):
> net/ice: fix illegal access when removing MAC filter
>
> Wenzhuo Lu (2):
> net/iavf: fix crash in AVX512
> net/ice: fix crash in AVX512
>
> Wisam Jaddo (1):
> app/flow-perf: fix encap/decap actions
>
> Xiao Wang (1):
> vdpa/ifc: check PCI config read
>
> Xiaoyu Min (4):
> net/mlx5: support RSS expansion for IPv6 GRE
> net/mlx5: fix shared inner RSS
> net/mlx5: fix missing shared RSS hash types
> net/mlx5: fix redundant flow after RSS expansion
>
> Xiaoyun Li (2):
> app/testpmd: remove unnecessary UDP tunnel check
> net/i40e: fix IPv4 fragment offload
>
> Xueming Li (2):
> version: 20.11.2-rc1
> net/virtio: fix vectorized Rx queue rearm
>
> Youri Querry (1):
> bus/fslmc: fix random portal hangs with qbman 5.0
>
> Yunjian Wang (5):
> vfio: fix API description
> net/mlx5: fix using flow tunnel before null check
> vfio: fix duplicated user mem map
> net/mlx4: fix leak when configured repeatedly
> net/mlx5: fix leak when configured repeatedly
>
>
>
> --
> Regards,
> Kalesh A P
>
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [dpdk-stable] 20.11.2 patches review and test
2021-06-26 23:28 1% Xueming Li
2021-06-30 10:33 0% ` Jiang, YuX
@ 2021-07-06 3:26 0% ` Kalesh Anakkur Purayil
2021-07-06 6:47 0% ` Xueming(Steven) Li
1 sibling, 1 reply; 200+ results
From: Kalesh Anakkur Purayil @ 2021-07-06 3:26 UTC (permalink / raw)
To: Xueming Li
Cc: dpdk stable, dpdk-dev, Abhishek Marathe, Akhil Goyal,
Ali Alnubani, benjamin.walker, David Christensen,
Hariprasad Govindharajan, Hemant Agrawal, Ian Stokes,
Jerin Jacob, John McNamara, Ju-Hyoung Lee, Kevin Traynor,
Luca Boccassi, Pei Zhang, pingx.yu, qian.q.xu, Raslan Darawsheh,
Thomas Monjalon, yuan.peng, zhaoyan.chen
[-- Attachment #1: Type: text/plain, Size: 26728 bytes --]
Hi Xueming,
Testing with dpdk v20.11.2 from Broadcom looks good.
- Basic functionality:
Send and receive multiple types of traffic.
- Changing/checking link status through testpmd.
- RSS tests.
- TSO tests
- VLAN filtering tests.
- MAC filtering test
- statistics tests
- Checksum offload tests
- MTU tests
- Promiscuous tests
- Allmulti test
NIC: BCM57414 NetXtreme-E 10Gb/25Gb Ethernet Controller, Firmware:
219.0.88.0
NIC: BCM57508 NetXtreme-E 10Gb/25Gb/40Gb/50Gb/100Gb/200Gb Ethernet,
Firmware : 220.0.0.100
Regards,
Kalesh
On Sun, Jun 27, 2021 at 4:59 AM Xueming Li <xuemingl@nvidia.com> wrote:
> Hi all,
>
> Here is a list of patches targeted for stable release 20.11.2.
>
> The planned date for the final release is 6th July.
>
> Please help with testing and validation of your use cases and report
> any issues/results with reply-all to this mail. For the final release
> the fixes and reported validations will be added to the release notes.
>
> A release candidate tarball can be found at:
>
> https://dpdk.org/browse/dpdk-stable/tag/?id=v20.11.2-rc2
>
> These patches are located at branch 20.11 of dpdk-stable repo:
> https://dpdk.org/browse/dpdk-stable/
>
> Thanks.
>
> Xueming Li <xuemingl@nvidia.com>
>
> ---
> Adam Dybkowski (3):
> common/qat: increase IM buffer size for GEN3
> compress/qat: enable compression on GEN3
> crypto/qat: fix null authentication request
>
> Ajit Khaparde (7):
> net/bnxt: fix RSS context cleanup
> net/bnxt: check kvargs parsing
> net/bnxt: fix resource cleanup
> doc: fix formatting in testpmd guide
> net/bnxt: fix mismatched type comparison in MAC restore
> net/bnxt: check PCI config read
> net/bnxt: fix mismatched type comparison in Rx
>
> Alvin Zhang (11):
> net/ice: fix VLAN filter with PF
> net/i40e: fix input set field mask
> net/igc: fix Rx RSS hash offload capability
> net/igc: fix Rx error counter for bad length
> net/e1000: fix Rx error counter for bad length
> net/e1000: fix max Rx packet size
> net/igc: fix Rx packet size
> net/ice: fix fast mbuf freeing
> net/iavf: fix VF to PF command failure handling
> net/i40e: fix VF RSS configuration
> net/igc: fix speed configuration
>
> Anatoly Burakov (3):
> fbarray: fix log message on truncation error
> power: do not skip saving original P-state governor
> power: save original ACPI governor always
>
> Andrew Boyer (1):
> net/ionic: fix completion type in lif init
>
> Andrew Rybchenko (4):
> net/failsafe: fix RSS hash offload reporting
> net/failsafe: report minimum and maximum MTU
> common/sfc_efx: remove GENEVE from supported tunnels
> net/sfc: fix mark support in EF100 native Rx datapath
>
> Andy Moreton (2):
> common/sfc_efx/base: limit reported MCDI response length
> common/sfc_efx/base: add missing MCDI response length checks
>
> Ankur Dwivedi (1):
> crypto/octeontx: fix session-less mode
>
> Apeksha Gupta (1):
> examples/l2fwd-crypto: skip masked devices
>
> Arek Kusztal (1):
> crypto/qat: fix offset for out-of-place scatter-gather
>
> Beilei Xing (1):
> net/i40evf: fix packet loss for X722
>
> Bing Zhao (1):
> net/mlx5: fix loopback for Direct Verbs queue
>
> Bruce Richardson (2):
> build: exclude meson files from examples installation
> raw/ioat: fix script for configuring small number of queues
>
> Chaoyong He (1):
> doc: fix multiport syntax in nfp guide
>
> Chenbo Xia (1):
> examples/vhost: check memory table query
>
> Chengchang Tang (20):
> net/hns3: fix HW buffer size on MTU update
> net/hns3: fix processing Tx offload flags
> net/hns3: fix Tx checksum for UDP packets with special port
> net/hns3: fix long task queue pairs reset time
> ethdev: validate input in module EEPROM dump
> ethdev: validate input in register info
> ethdev: validate input in EEPROM info
> net/hns3: fix rollback after setting PVID failure
> net/hns3: fix timing in resetting queues
> net/hns3: fix queue state when concurrent with reset
> net/hns3: fix configure FEC when concurrent with reset
> net/hns3: fix use of command status enumeration
> examples: add eal cleanup to examples
> net/bonding: fix adding itself as its slave
> net/hns3: fix timing in mailbox
> app/testpmd: fix max queue number for Tx offloads
> net/tap: fix interrupt vector array size
> net/bonding: fix socket ID check
> net/tap: check ioctl on restore
> examples/timer: fix time interval
>
> Chengwen Feng (50):
> net/hns3: fix flow counter value
> net/hns3: fix VF mailbox head field
> net/hns3: support get device version when dump register
> net/hns3: fix some packet types
> net/hns3: fix missing outer L4 UDP flag for VXLAN
> net/hns3: remove VLAN/QinQ ptypes from support list
> test: check thread creation
> common/dpaax: fix possible null pointer access
> examples/ethtool: remove unused parsing
> net/hns3: fix flow director lock
> net/e1000/base: fix timeout for shadow RAM write
> net/hns3: fix setting default MAC address in bonding of VF
> net/hns3: fix possible mismatched response of mailbox
> net/hns3: fix VF handling LSC event in secondary process
> net/hns3: fix verification of NEON support
> mbuf: check shared memory before dumping dynamic space
> eventdev: remove redundant thread name setting
> eventdev: fix memory leakage on thread creation failure
> net/kni: check init result
> net/hns3: fix mailbox error message
> net/hns3: fix processing link status message on PF
> net/hns3: remove unused mailbox macro and struct
> net/bonding: fix leak on remove
> net/hns3: fix handling link update
> net/i40e: fix negative VEB index
> net/i40e: remove redundant VSI check in Tx queue setup
> net/virtio: fix getline memory leakage
> net/hns3: log time delta in decimal format
> net/hns3: fix time delta calculation
> net/hns3: remove unused macros
> net/hns3: fix vector Rx burst limitation
> net/hns3: remove read when enabling TM QCN error event
> net/hns3: remove unused VMDq code
> net/hns3: increase readability in logs
> raw/ntb: check SPAD user index
> raw/ntb: check memory allocations
> ipc: check malloc sync reply result
> eal: fix service core list parsing
> ipc: use monotonic clock
> net/hns3: return error on PCI config write failure
> net/hns3: fix log on flow director clear
> net/hns3: clear hash map on flow director clear
> net/hns3: fix querying flow director counter for out param
> net/hns3: fix TM QCN error event report by MSI-X
> net/hns3: fix mailbox message ID in log
> net/hns3: fix secondary process request start/stop Rx/Tx
> net/hns3: fix ordering in secondary process initialization
> net/hns3: fail setting FEC if one bit mode is not supported
> net/mlx4: fix secondary process initialization ordering
> net/mlx5: fix secondary process initialization ordering
>
> Ciara Loftus (1):
> net/af_xdp: fix error handling during Rx queue setup
>
> Ciara Power (2):
> telemetry: fix race on callbacks list
> test/crypto: fix return value of a skipped test
>
> Conor Walsh (1):
> examples/l3fwd: fix LPM IPv6 subnets
>
> Cristian Dumitrescu (3):
> table: fix actions with different data size
> pipeline: fix instruction translation
> pipeline: fix endianness conversions
>
> Dapeng Yu (3):
> net/igc: remove MTU setting limitation
> net/e1000: remove MTU setting limitation
> examples/packet_ordering: fix port configuration
>
> David Christensen (1):
> config/ppc: reduce number of cores and NUMA nodes
>
> David Harton (1):
> net/ena: fix releasing Tx ring mbufs
>
> David Hunt (4):
> test/power: fix CPU frequency check
> test/power: add turbo mode to frequency check
> test/power: fix low frequency test when turbo enabled
> test/power: fix turbo test
>
> David Marchand (18):
> doc: fix sphinx rtd theme import in GHA
> service: clean references to removed symbol
> eal: fix evaluation of log level option
> ci: hook to GitHub Actions
> ci: enable v21 ABI checks
> ci: fix package installation in GitHub Actions
> ci: ignore APT update failure in GitHub Actions
> ci: catch coredumps
> vhost: fix offload flags in Rx path
> bus/fslmc: remove unused debug macro
> eal: fix leak in shared lib mode detection
> event/dpaa2: remove unused macros
> net/ice/base: fix memory allocation wrapper
> net/ice: fix leak on thread termination
> devtools: fix orphan symbols check with busybox
> net/vhost: restore pseudo TSO support
> net/ark: fix leak on thread termination
> build: fix drivers selection without Python
>
> Dekel Peled (1):
> common/mlx5: fix DevX read output buffer size
>
> Dmitry Kozlyuk (4):
> net/pcap: fix format string
> eal/windows: add missing SPDX license tag
> buildtools: fix all drivers disabled on Windows
> examples/rxtx_callbacks: fix port ID format specifier
>
> Ed Czeck (2):
> net/ark: update packet director initial state
> net/ark: refactor Rx buffer recovery
>
> Elad Nachman (2):
> kni: support async user request
> kni: fix kernel deadlock with bifurcated device
>
> Feifei Wang (2):
> net/i40e: fix parsing packet type for NEON
> test/trace: fix race on collected perf data
>
> Ferruh Yigit (9):
> power: remove duplicated symbols from map file
> log/linux: make default output stderr
> license: fix typos
> drivers/net: fix FW version query
> net/bnx2x: fix build with GCC 11
> net/bnx2x: fix build with GCC 11
> net/ice/base: fix build with GCC 11
> net/tap: fix build with GCC 11
> test/table: fix build with GCC 11
>
> Gregory Etelson (2):
> app/testpmd: fix tunnel offload flows cleanup
> net/mlx5: fix tunnel offload private items location
>
> Guoyang Zhou (1):
> net/hinic: fix crash in secondary process
>
> Haiyue Wang (1):
> net/ixgbe: fix Rx errors statistics for UDP checksum
>
> Harman Kalra (1):
> event/octeontx2: fix device reconfigure for single slot
>
> Heinrich Kuhn (1):
> net/nfp: fix reporting of RSS capabilities
>
> Hemant Agrawal (3):
> ethdev: add missing buses in device iterator
> crypto/dpaa_sec: affine the thread portal affinity
> crypto/dpaa2_sec: fix close and uninit functions
>
> Hongbo Zheng (9):
> app/testpmd: fix Tx/Rx descriptor query error log
> net/hns3: fix FLR miss detection
> net/hns3: delete redundant blank line
> bpf: fix JSLT validation
> common/sfc_efx/base: fix dereferencing null pointer
> power: fix sanity checks for guest channel read
> net/hns3: fix VF alive notification after config restore
> examples/l3fwd-power: fix empty poll thresholds
> net/hns3: fix concurrent interrupt handling
>
> Huisong Li (23):
> net/hns3: fix device capabilities for copper media type
> net/hns3: remove unused parameter markers
> net/hns3: fix reporting undefined speed
> net/hns3: fix link update when failed to get link info
> net/hns3: fix flow control exception
> app/testpmd: fix bitmap of link speeds when force speed
> net/hns3: fix flow control mode
> net/hns3: remove redundant mailbox response
> net/hns3: fix DCB mode check
> net/hns3: fix VMDq mode check
> net/hns3: fix mbuf leakage
> net/hns3: fix link status when port is stopped
> net/hns3: fix link speed when port is down
> app/testpmd: fix forward lcores number for DCB
> app/testpmd: fix DCB forwarding configuration
> app/testpmd: fix DCB re-configuration
> app/testpmd: verify DCB config during forward config
> net/hns3: fix Rx/Tx queue numbers check
> net/hns3: fix requested FC mode rollback
> net/hns3: remove meaningless packet buffer rollback
> net/hns3: fix DCB configuration
> net/hns3: fix DCB reconfiguration
> net/hns3: fix link speed when VF device is down
>
> Ibtisam Tariq (1):
> examples/vhost_crypto: remove unused short option
>
> Igor Chauskin (2):
> net/ena: switch memcpy to optimized version
> net/ena: fix parsing of large LLQ header device argument
>
> Igor Russkikh (2):
> net/qede: reduce log verbosity
> net/qede: accept bigger RSS table
>
> Ilya Maximets (1):
> net/virtio: fix interrupt unregistering for listening socket
>
> Ivan Malov (5):
> net/sfc: fix buffer size for flow parse
> net: fix comment in IPv6 header
> net/sfc: fix error path inconsistency
> common/sfc_efx/base: fix indication of MAE encap support
> net/sfc: fix outer rule rollback on error
>
> Jerin Jacob (1):
> examples: fix pkg-config override
>
> Jiawei Wang (4):
> app/testpmd: fix NVGRE encap configuration
> net/mlx5: fix resource release for mirror flow
> net/mlx5: fix RSS flow item expansion for GRE key
> net/mlx5: fix RSS flow item expansion for NVGRE
>
> Jiawei Zhu (1):
> net/mlx5: fix Rx segmented packets on mbuf starvation
>
> Jiawen Wu (4):
> net/txgbe: remove unused functions
> net/txgbe: fix Rx missed packet counter
> net/txgbe: update packet type
> net/txgbe: fix QinQ strip
>
> Jiayu Hu (2):
> vhost: fix queue initialization
> vhost: fix redundant vring status change notification
>
> Jie Wang (1):
> net/ice: fix VSI array out of bounds access
>
> John Daley (2):
> net/enic: fix flow initialization error handling
> net/enic: enable GENEVE offload via VNIC configuration
>
> Juraj Linkeš (1):
> eal/arm64: fix platform register bit
>
> Kai Ji (2):
> test/crypto: fix auth-cipher compare length in OOP
> test/crypto: copy offset data to OOP destination buffer
>
> Kalesh AP (23):
> net/bnxt: remove unused macro
> net/bnxt: fix VNIC configuration
> net/bnxt: fix firmware fatal error handling
> net/bnxt: fix FW readiness check during recovery
> net/bnxt: fix device readiness check
> net/bnxt: fix VF info allocation
> net/bnxt: fix HWRM and FW incompatibility handling
> net/bnxt: mute some failure logs
> app/testpmd: check MAC address query
> net/bnxt: fix PCI write check
> net/bnxt: fix link state operations
> net/bnxt: fix timesync when PTP is not supported
> net/bnxt: fix memory allocation for command response
> net/bnxt: fix double free in port start failure
> net/bnxt: fix configuring LRO
> net/bnxt: fix health check alarm cancellation
> net/bnxt: fix PTP support for Thor
> net/bnxt: fix ring count calculation for Thor
> net/bnxt: remove unnecessary forward declarations
> net/bnxt: remove unused function parameters
> net/bnxt: drop unused attribute
> net/bnxt: fix single PF per port check
> net/bnxt: prevent device access in error state
>
> Kamil Vojanec (1):
> net/mlx5/linux: fix firmware version
>
> Kevin Traynor (5):
> test/cmdline: fix inputs array
> test/crypto: fix build with GCC 11
> crypto/zuc: fix build with GCC 11
> test: fix build with GCC 11
> test/cmdline: silence clang 12 warning
>
> Konstantin Ananyev (1):
> acl: fix build with GCC 11
>
> Lance Richardson (8):
> net/bnxt: fix Rx buffer posting
> net/bnxt: fix Tx length hint threshold
> net/bnxt: fix handling of null flow mask
> test: fix TCP header initialization
> net/bnxt: fix Rx descriptor status
> net/bnxt: fix Rx queue count
> net/bnxt: fix dynamic VNIC count
> eal: fix memory mapping on 32-bit target
>
> Leyi Rong (1):
> net/iavf: fix packet length parsing in AVX512
>
> Li Zhang (1):
> net/mlx5: fix flow actions index in cache
>
> Luc Pelletier (2):
> eal: fix race in control thread creation
> eal: fix hang in control thread creation
>
> Marvin Liu (5):
> vhost: fix split ring potential buffer overflow
> vhost: fix packed ring potential buffer overflow
> vhost: fix batch dequeue potential buffer overflow
> vhost: fix initialization of temporary header
> vhost: fix initialization of async temporary header
>
> Matan Azrad (5):
> common/mlx5/linux: add glue function to query WQ
> common/mlx5: add DevX command to query WQ
> common/mlx5: add DevX commands for queue counters
> vdpa/mlx5: fix virtq cleaning
> vdpa/mlx5: fix device unplug
>
> Michael Baum (1):
> net/mlx5: fix flow age event triggering
>
> Michal Krawczyk (5):
> net/ena/base: improve style and comments
> net/ena/base: fix type conversions by explicit casting
> net/ena/base: destroy multiple wait events
> net/ena: fix crash with unsupported device argument
> net/ena: indicate Rx RSS hash presence
>
> Min Hu (Connor) (25):
> net/hns3: fix MTU config complexity
> net/hns3: update HiSilicon copyright syntax
> net/hns3: fix copyright date
> examples/ptpclient: remove wrong comment
> test/bpf: fix error message
> doc: fix HiSilicon copyright syntax
> net/hns3: remove unused macros
> net/hns3: remove unused macro
> app/eventdev: fix overflow in lcore list parsing
> test/kni: fix a comment
> test/kni: check init result
> net/hns3: fix typos on comments
> net/e1000: fix flow error message object
> app/testpmd: fix division by zero on socket memory dump
> net/kni: warn on stop failure
> app/bbdev: check memory allocation
> app/bbdev: fix HARQ error messages
> raw/skeleton: add missing check after setting attribute
> test/timer: check memzone allocation
> app/crypto-perf: check memory allocation
> examples/flow_classify: fix NUMA check of port and core
> examples/l2fwd-cat: fix NUMA check of port and core
> examples/skeleton: fix NUMA check of port and core
> test: check flow classifier creation
> test: fix division by zero
>
> Murphy Yang (3):
> net/ixgbe: fix RSS RETA being reset after port start
> net/i40e: fix flow director config after flow validate
> net/i40e: fix flow director for common pctypes
>
> Natanael Copa (5):
> common/dpaax/caamflib: fix build with musl
> bus/dpaa: fix 64-bit arch detection
> bus/dpaa: fix build with musl
> net/cxgbe: remove use of uint type
> app/testpmd: fix build with musl
>
> Nipun Gupta (1):
> bus/dpaa: fix statistics reading
>
> Nithin Dabilpuram (3):
> vfio: do not merge contiguous areas
> vfio: fix DMA mapping granularity for IOVA as VA
> test/mem: fix page size for external memory
>
> Olivier Matz (1):
> test/mempool: fix object initializer
>
> Pallavi Kadam (1):
> bus/pci: skip probing some Windows NDIS devices
>
> Pavan Nikhilesh (4):
> test/event: fix timeout accuracy
> app/eventdev: fix timeout accuracy
> app/eventdev: fix lcore parsing skipping last core
> event/octeontx2: fix XAQ pool reconfigure
>
> Pu Xu (1):
> ip_frag: fix fragmenting IPv4 packet with header option
>
> Qi Zhang (8):
> net/ice/base: fix payload indicator on ptype
> net/ice/base: fix uninitialized struct
> net/ice/base: cleanup filter list on error
> net/ice/base: fix memory allocation for MAC addresses
> net/iavf: fix TSO max segment size
> doc: fix matching versions in ice guide
> net/iavf: fix wrong Tx context descriptor
> common/iavf: fix duplicated offload bit
>
> Radha Mohan Chintakuntla (1):
> raw/octeontx2_dma: assign PCI device in DPI VF
>
> Raslan Darawsheh (1):
> ethdev: update flow item GTP QFI definition
>
> Richael Zhuang (2):
> test/power: add delay before checking CPU frequency
> test/power: round CPU frequency to check
>
> Robin Zhang (6):
> net/i40e: announce request queue capability in PF
> doc: update recommended versions for i40e
> net/i40e: fix lack of MAC type when set MAC address
> net/iavf: fix lack of MAC type when set MAC address
> net/iavf: fix primary MAC type when starting port
> net/i40e: fix primary MAC type when starting port
>
> Rohit Raj (3):
> net/dpaa2: fix getting link status
> net/dpaa: fix getting link status
> examples/l2fwd-crypto: fix packet length while decryption
>
> Roy Shterman (1):
> mem: fix freeing segments in --huge-unlink mode
>
> Satheesh Paul (1):
> net/octeontx2: fix VLAN filter
>
> Savinay Dharmappa (1):
> sched: fix traffic class oversubscription parameter
>
> Shijith Thotton (3):
> eventdev: fix case to initiate crypto adapter service
> event/octeontx2: fix crypto adapter queue pair operations
> event/octeontx2: configure crypto adapter xaq pool
>
> Siwar Zitouni (1):
> net/ice: fix disabling promiscuous mode
>
> Somnath Kotur (5):
> net/bnxt: fix xstats get
> net/bnxt: fix Rx and Tx timestamps
> net/bnxt: fix Tx timestamp init
> net/bnxt: refactor multi-queue Rx configuration
> net/bnxt: fix Rx timestamp when FIFO pending bit is set
>
> Stanislaw Kardach (6):
> test: proceed if timer subsystem already initialized
> stack: allow lock-free only on relevant architectures
> test/distributor: fix worker notification in burst mode
> test/distributor: fix burst flush on worker quit
> net/ena: remove endian swap functions
> net/ena: report default ring size
>
> Stephen Hemminger (2):
> kni: refactor user request processing
> net/bnxt: use prefix on global function
>
> Suanming Mou (1):
> net/mlx5: fix counter offset detection
>
> Tal Shnaiderman (2):
> eal/windows: fix default thread priority
> eal/windows: fix return codes of pthread shim layer
>
> Tengfei Zhang (1):
> net/pcap: fix file descriptor leak on close
>
> Thinh Tran (1):
> test: fix autotest handling of skipped tests
>
> Thomas Monjalon (18):
> bus/pci: fix Windows kernel driver categories
> eal: fix comment of OS-specific header files
> buildtools: fix build with busybox
> build: detect execinfo library on Linux
> build: remove redundant _GNU_SOURCE definitions
> eal: fix build with musl
> net/igc: remove use of uint type
> event/dlb: fix header includes for musl
> examples/bbdev: fix header include for musl
> drivers: fix log level after loading
> app/regex: fix usage text
> app/testpmd: fix usage text
> doc: fix names of UIO drivers
> doc: fix build with Sphinx 4
> bus/pci: support I/O port operations with musl
> app: fix exit messages
> regex/octeontx2: remove unused include directory
> doc: remove PDF requirements
>
> Tianyu Li (1):
> net/memif: fix Tx bps statistics for zero-copy
>
> Timothy McDaniel (2):
> event/dlb2: remove references to deferred scheduling
> doc: fix runtime options in DLB2 guide
>
> Tyler Retzlaff (1):
> eal: add C++ include guard for reciprocal header
>
> Vadim Podovinnikov (1):
> net/bonding: fix LACP system address check
>
> Venkat Duvvuru (1):
> net/bnxt: fix queues per VNIC
>
> Viacheslav Ovsiienko (16):
> net/mlx5: fix external buffer pool registration for Rx queue
> net/mlx5: fix metadata item validation for ingress flows
> net/mlx5: fix hashed list size for tunnel flow groups
> net/mlx5: fix UAR allocation diagnostics messages
> common/mlx5: add timestamp format support to DevX
> vdpa/mlx5: support timestamp format
> net/mlx5: fix Rx metadata leftovers
> net/mlx5: fix drop action for Direct Rules/Verbs
> net/mlx4: fix RSS action with null hash key
> net/mlx5: support timestamp format
> regex/mlx5: support timestamp format
> app/testpmd: fix segment number check
> net/mlx5: remove drop queue function prototypes
> net/mlx4: fix buffer leakage on device close
> net/mlx5: fix probing device in legacy bonding mode
> net/mlx5: fix receiving queue timestamp format
>
> Wei Huang (1):
> raw/ifpga: fix device name format
>
> Wenjun Wu (3):
> net/ice: check some functions return
> net/ice: fix RSS hash update
> net/ice: fix RSS for L2 packet
>
> Wenwu Ma (1):
> net/ice: fix illegal access when removing MAC filter
>
> Wenzhuo Lu (2):
> net/iavf: fix crash in AVX512
> net/ice: fix crash in AVX512
>
> Wisam Jaddo (1):
> app/flow-perf: fix encap/decap actions
>
> Xiao Wang (1):
> vdpa/ifc: check PCI config read
>
> Xiaoyu Min (4):
> net/mlx5: support RSS expansion for IPv6 GRE
> net/mlx5: fix shared inner RSS
> net/mlx5: fix missing shared RSS hash types
> net/mlx5: fix redundant flow after RSS expansion
>
> Xiaoyun Li (2):
> app/testpmd: remove unnecessary UDP tunnel check
> net/i40e: fix IPv4 fragment offload
>
> Xueming Li (2):
> version: 20.11.2-rc1
> net/virtio: fix vectorized Rx queue rearm
>
> Youri Querry (1):
> bus/fslmc: fix random portal hangs with qbman 5.0
>
> Yunjian Wang (5):
> vfio: fix API description
> net/mlx5: fix using flow tunnel before null check
> vfio: fix duplicated user mem map
> net/mlx4: fix leak when configured repeatedly
> net/mlx5: fix leak when configured repeatedly
>
--
Regards,
Kalesh A P
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] 20.11.2 patches review and test
2021-06-30 10:33 0% ` Jiang, YuX
@ 2021-07-06 2:37 0% ` Xueming(Steven) Li
0 siblings, 0 replies; 200+ results
From: Xueming(Steven) Li @ 2021-07-06 2:37 UTC (permalink / raw)
To: Jiang, YuX, stable
Cc: dev, Abhishek Marathe, Akhil Goyal, Ali Alnubani, Walker,
Benjamin, David Christensen, Govindharajan, Hariprasad,
Hemant Agrawal, Stokes, Ian, Jerin Jacob, Mcnamara, John,
Ju-Hyoung Lee, Kevin Traynor, Luca Boccassi, Pei Zhang, Yu,
PingX, Xu, Qian Q, Raslan Darawsheh, NBU-Contact-Thomas Monjalon,
Peng, Yuan, Chen, Zhaoyan
> -----Original Message-----
> From: Jiang, YuX <yux.jiang@intel.com>
> Sent: Wednesday, June 30, 2021 6:33 PM
> To: Xueming(Steven) Li <xuemingl@nvidia.com>; stable@dpdk.org
> Cc: dev@dpdk.org; Abhishek Marathe <Abhishek.Marathe@microsoft.com>; Akhil Goyal <akhil.goyal@nxp.com>; Ali Alnubani
> <alialnu@nvidia.com>; Walker, Benjamin <benjamin.walker@intel.com>; David Christensen <drc@linux.vnet.ibm.com>;
> Govindharajan, Hariprasad <hariprasad.govindharajan@intel.com>; Hemant Agrawal <hemant.agrawal@nxp.com>; Stokes, Ian
> <ian.stokes@intel.com>; Jerin Jacob <jerinj@marvell.com>; Mcnamara, John <john.mcnamara@intel.com>; Ju-Hyoung Lee
> <juhlee@microsoft.com>; Kevin Traynor <ktraynor@redhat.com>; Luca Boccassi <bluca@debian.org>; Pei Zhang
> <pezhang@redhat.com>; Yu, PingX <pingx.yu@intel.com>; Xu, Qian Q <qian.q.xu@intel.com>; Raslan Darawsheh
> <rasland@nvidia.com>; NBU-Contact-Thomas Monjalon <thomas@monjalon.net>; Peng, Yuan <yuan.peng@intel.com>; Chen,
> Zhaoyan <zhaoyan.chen@intel.com>
> Subject: RE: [dpdk-dev] 20.11.2 patches review and test
>
> All,
> Testing with dpdk v20.11.2-rc2 from Intel looks good, no critical issue is found. All of them are known issues.
> Below two issues has been fixed in 20.11.2-rc2:
> 1) Fedora34 GCC11 and Clang12 build failed.
> 2) dcf_lifecycle/handle_acl_filter_05: after reset port the mac changed.
>
> # Basic Intel(R) NIC testing
> *PF(i40e, ixgbe): test scenarios including rte_flow/TSO/Jumboframe/checksum offload/Tunnel, etc. Listed but not all.
> - Below two known issues are found.
> 1)https://bugs.dpdk.org/show_bug.cgi?id=687 : unit_tests_power/power_cpufreq: unit test failed. This issue is found in 21.05 and
> not fixed yet.
> 2)ddp_gtp_qregion/fd_gtpu_ipv4_dstip: flow director does not work. This issue is found in 21.05, fixed in 21.08.
> Fixed patch link: http://patches.dpdk.org/project/dpdk/patch/20210519032745.707639-1-stevex.yang@intel.com/
> *VF(i40e,ixgbe): test scenarios including vf-rte_flow/TSO/Jumboframe/checksum offload/Tunnel, Listed but not all.
> - No new issues are found.
> *PF/VF(ice): test scenarios including switch features/Flow Director/Advanced RSS/ACL/DCF/Flexible Descriptor and so on, Listed but
> not all.
> - Below 3 known DPDK issues are found.
> 1)rxtx_offload/rxoffload_port: Pkt1 can't be distributed to the same queue. This issue is found in 21.05, fixed in 21.08
> Fixed patch link: http://patches.dpdk.org/project/dpdk/patch/20210527064251.242076-1-dapengx.yu@intel.com/
> 2)cvl_advanced_iavf_rss: change the SCTP port value, the hash value remains unchanged. This issue is found in 20.11-rc3, fixed in
> 21.02, but it’s belong to 21.02 new feature, won’t backporting to LTS20.11.
> 3)Can't create 512 acl rules after creating a full mask switch rule. This issue is also occurred in dpdk 20.11 and not fixed yet.
> * Build: cover the build test combination with latest GCC/Clang/ICC version and the popular OS revision such as Ubuntu20.04,
> CentOS8.3 and so on. Listed but not all.
> - All passed.
> * Intel NIC single core/NIC performance: test scenarios including PF/VF single core performance test(AVX2+AVX512) test and so on.
> Listed but not all.
> - All passed. No big data drop.
>
> # Basic cryptodev and virtio testing
> * Virtio: both function and performance test are covered. Such as PVP/Virtio_loopback/virtio-user loopback/virtio-net VM2VM perf
> testing, etc.. Listed but not all.
> - One known issues as below:
> > (1)The UDP fragmentation offload feature of Virtio-net device can’t be turned on in the VM, kernel issue, bugzilla has been submited:
> https://bugzilla.kernel.org/show_bug.cgi?id=207075, not fixed yet.
> * Cryptodev:
> - Function test: test scenarios including Cryptodev API testing/CompressDev ISA-L/QAT/ZLIB PMD Testing/FIPS, etc. Listed but not all.
> - All passed.
> - Performance test: test scenarios including Thoughput Performance /Cryptodev Latency, etc. Listed but not all.
> - No big data drop.
>
> Best regards,
> Yu Jiang
Thank you!
>
> > -----Original Message-----
> > From: dev <dev-bounces@dpdk.org> On Behalf Of Xueming Li
> > Sent: Sunday, June 27, 2021 7:28 AM
> > To: stable@dpdk.org
> > Cc: dev@dpdk.org; Abhishek Marathe <Abhishek.Marathe@microsoft.com>;
> > Akhil Goyal <akhil.goyal@nxp.com>; Ali Alnubani <alialnu@nvidia.com>;
> > Walker, Benjamin <benjamin.walker@intel.com>; David Christensen
> > <drc@linux.vnet.ibm.com>; Govindharajan, Hariprasad
> > <hariprasad.govindharajan@intel.com>; Hemant Agrawal
> > <hemant.agrawal@nxp.com>; Stokes, Ian <ian.stokes@intel.com>; Jerin
> > Jacob <jerinj@marvell.com>; Mcnamara, John <john.mcnamara@intel.com>;
> > Ju-Hyoung Lee <juhlee@microsoft.com>; Kevin Traynor
> > <ktraynor@redhat.com>; Luca Boccassi <bluca@debian.org>; Pei Zhang
> > <pezhang@redhat.com>; Yu, PingX <pingx.yu@intel.com>; Xu, Qian Q
> > <qian.q.xu@intel.com>; Raslan Darawsheh <rasland@nvidia.com>; Thomas
> > Monjalon <thomas@monjalon.net>; Peng, Yuan <yuan.peng@intel.com>;
> > Chen, Zhaoyan <zhaoyan.chen@intel.com>; xuemingl@nvidia.com
> > Subject: [dpdk-dev] 20.11.2 patches review and test
> >
> > Hi all,
> >
> > Here is a list of patches targeted for stable release 20.11.2.
> >
> > The planned date for the final release is 6th July.
> >
> > Please help with testing and validation of your use cases and report
> > any issues/results with reply-all to this mail. For the final release
> > the fixes and reported validations will be added to the release notes.
> >
> > A release candidate tarball can be found at:
> >
> > https://dpdk.org/browse/dpdk-stable/tag/?id=v20.11.2-rc2
> >
> > These patches are located at branch 20.11 of dpdk-stable repo:
> > https://dpdk.org/browse/dpdk-stable/
> >
> > Thanks.
> >
> > Xueming Li <xuemingl@nvidia.com>
> >
> > ---
> > Adam Dybkowski (3):
> > common/qat: increase IM buffer size for GEN3
> > compress/qat: enable compression on GEN3
> > crypto/qat: fix null authentication request
> >
> > Ajit Khaparde (7):
> > net/bnxt: fix RSS context cleanup
> > net/bnxt: check kvargs parsing
> > net/bnxt: fix resource cleanup
> > doc: fix formatting in testpmd guide
> > net/bnxt: fix mismatched type comparison in MAC restore
> > net/bnxt: check PCI config read
> > net/bnxt: fix mismatched type comparison in Rx
> >
> > Alvin Zhang (11):
> > net/ice: fix VLAN filter with PF
> > net/i40e: fix input set field mask
> > net/igc: fix Rx RSS hash offload capability
> > net/igc: fix Rx error counter for bad length
> > net/e1000: fix Rx error counter for bad length
> > net/e1000: fix max Rx packet size
> > net/igc: fix Rx packet size
> > net/ice: fix fast mbuf freeing
> > net/iavf: fix VF to PF command failure handling
> > net/i40e: fix VF RSS configuration
> > net/igc: fix speed configuration
> >
> > Anatoly Burakov (3):
> > fbarray: fix log message on truncation error
> > power: do not skip saving original P-state governor
> > power: save original ACPI governor always
> >
> > Andrew Boyer (1):
> > net/ionic: fix completion type in lif init
> >
> > Andrew Rybchenko (4):
> > net/failsafe: fix RSS hash offload reporting
> > net/failsafe: report minimum and maximum MTU
> > common/sfc_efx: remove GENEVE from supported tunnels
> > net/sfc: fix mark support in EF100 native Rx datapath
> >
> > Andy Moreton (2):
> > common/sfc_efx/base: limit reported MCDI response length
> > common/sfc_efx/base: add missing MCDI response length checks
> >
> > Ankur Dwivedi (1):
> > crypto/octeontx: fix session-less mode
> >
> > Apeksha Gupta (1):
> > examples/l2fwd-crypto: skip masked devices
> >
> > Arek Kusztal (1):
> > crypto/qat: fix offset for out-of-place scatter-gather
> >
> > Beilei Xing (1):
> > net/i40evf: fix packet loss for X722
> >
> > Bing Zhao (1):
> > net/mlx5: fix loopback for Direct Verbs queue
> >
> > Bruce Richardson (2):
> > build: exclude meson files from examples installation
> > raw/ioat: fix script for configuring small number of queues
> >
> > Chaoyong He (1):
> > doc: fix multiport syntax in nfp guide
> >
> > Chenbo Xia (1):
> > examples/vhost: check memory table query
> >
> > Chengchang Tang (20):
> > net/hns3: fix HW buffer size on MTU update
> > net/hns3: fix processing Tx offload flags
> > net/hns3: fix Tx checksum for UDP packets with special port
> > net/hns3: fix long task queue pairs reset time
> > ethdev: validate input in module EEPROM dump
> > ethdev: validate input in register info
> > ethdev: validate input in EEPROM info
> > net/hns3: fix rollback after setting PVID failure
> > net/hns3: fix timing in resetting queues
> > net/hns3: fix queue state when concurrent with reset
> > net/hns3: fix configure FEC when concurrent with reset
> > net/hns3: fix use of command status enumeration
> > examples: add eal cleanup to examples
> > net/bonding: fix adding itself as its slave
> > net/hns3: fix timing in mailbox
> > app/testpmd: fix max queue number for Tx offloads
> > net/tap: fix interrupt vector array size
> > net/bonding: fix socket ID check
> > net/tap: check ioctl on restore
> > examples/timer: fix time interval
> >
> > Chengwen Feng (50):
> > net/hns3: fix flow counter value
> > net/hns3: fix VF mailbox head field
> > net/hns3: support get device version when dump register
> > net/hns3: fix some packet types
> > net/hns3: fix missing outer L4 UDP flag for VXLAN
> > net/hns3: remove VLAN/QinQ ptypes from support list
> > test: check thread creation
> > common/dpaax: fix possible null pointer access
> > examples/ethtool: remove unused parsing
> > net/hns3: fix flow director lock
> > net/e1000/base: fix timeout for shadow RAM write
> > net/hns3: fix setting default MAC address in bonding of VF
> > net/hns3: fix possible mismatched response of mailbox
> > net/hns3: fix VF handling LSC event in secondary process
> > net/hns3: fix verification of NEON support
> > mbuf: check shared memory before dumping dynamic space
> > eventdev: remove redundant thread name setting
> > eventdev: fix memory leakage on thread creation failure
> > net/kni: check init result
> > net/hns3: fix mailbox error message
> > net/hns3: fix processing link status message on PF
> > net/hns3: remove unused mailbox macro and struct
> > net/bonding: fix leak on remove
> > net/hns3: fix handling link update
> > net/i40e: fix negative VEB index
> > net/i40e: remove redundant VSI check in Tx queue setup
> > net/virtio: fix getline memory leakage
> > net/hns3: log time delta in decimal format
> > net/hns3: fix time delta calculation
> > net/hns3: remove unused macros
> > net/hns3: fix vector Rx burst limitation
> > net/hns3: remove read when enabling TM QCN error event
> > net/hns3: remove unused VMDq code
> > net/hns3: increase readability in logs
> > raw/ntb: check SPAD user index
> > raw/ntb: check memory allocations
> > ipc: check malloc sync reply result
> > eal: fix service core list parsing
> > ipc: use monotonic clock
> > net/hns3: return error on PCI config write failure
> > net/hns3: fix log on flow director clear
> > net/hns3: clear hash map on flow director clear
> > net/hns3: fix querying flow director counter for out param
> > net/hns3: fix TM QCN error event report by MSI-X
> > net/hns3: fix mailbox message ID in log
> > net/hns3: fix secondary process request start/stop Rx/Tx
> > net/hns3: fix ordering in secondary process initialization
> > net/hns3: fail setting FEC if one bit mode is not supported
> > net/mlx4: fix secondary process initialization ordering
> > net/mlx5: fix secondary process initialization ordering
> >
> > Ciara Loftus (1):
> > net/af_xdp: fix error handling during Rx queue setup
> >
> > Ciara Power (2):
> > telemetry: fix race on callbacks list
> > test/crypto: fix return value of a skipped test
> >
> > Conor Walsh (1):
> > examples/l3fwd: fix LPM IPv6 subnets
> >
> > Cristian Dumitrescu (3):
> > table: fix actions with different data size
> > pipeline: fix instruction translation
> > pipeline: fix endianness conversions
> >
> > Dapeng Yu (3):
> > net/igc: remove MTU setting limitation
> > net/e1000: remove MTU setting limitation
> > examples/packet_ordering: fix port configuration
> >
> > David Christensen (1):
> > config/ppc: reduce number of cores and NUMA nodes
> >
> > David Harton (1):
> > net/ena: fix releasing Tx ring mbufs
> >
> > David Hunt (4):
> > test/power: fix CPU frequency check
> > test/power: add turbo mode to frequency check
> > test/power: fix low frequency test when turbo enabled
> > test/power: fix turbo test
> >
> > David Marchand (18):
> > doc: fix sphinx rtd theme import in GHA
> > service: clean references to removed symbol
> > eal: fix evaluation of log level option
> > ci: hook to GitHub Actions
> > ci: enable v21 ABI checks
> > ci: fix package installation in GitHub Actions
> > ci: ignore APT update failure in GitHub Actions
> > ci: catch coredumps
> > vhost: fix offload flags in Rx path
> > bus/fslmc: remove unused debug macro
> > eal: fix leak in shared lib mode detection
> > event/dpaa2: remove unused macros
> > net/ice/base: fix memory allocation wrapper
> > net/ice: fix leak on thread termination
> > devtools: fix orphan symbols check with busybox
> > net/vhost: restore pseudo TSO support
> > net/ark: fix leak on thread termination
> > build: fix drivers selection without Python
> >
> > Dekel Peled (1):
> > common/mlx5: fix DevX read output buffer size
> >
> > Dmitry Kozlyuk (4):
> > net/pcap: fix format string
> > eal/windows: add missing SPDX license tag
> > buildtools: fix all drivers disabled on Windows
> > examples/rxtx_callbacks: fix port ID format specifier
> >
> > Ed Czeck (2):
> > net/ark: update packet director initial state
> > net/ark: refactor Rx buffer recovery
> >
> > Elad Nachman (2):
> > kni: support async user request
> > kni: fix kernel deadlock with bifurcated device
> >
> > Feifei Wang (2):
> > net/i40e: fix parsing packet type for NEON
> > test/trace: fix race on collected perf data
> >
> > Ferruh Yigit (9):
> > power: remove duplicated symbols from map file
> > log/linux: make default output stderr
> > license: fix typos
> > drivers/net: fix FW version query
> > net/bnx2x: fix build with GCC 11
> > net/bnx2x: fix build with GCC 11
> > net/ice/base: fix build with GCC 11
> > net/tap: fix build with GCC 11
> > test/table: fix build with GCC 11
> >
> > Gregory Etelson (2):
> > app/testpmd: fix tunnel offload flows cleanup
> > net/mlx5: fix tunnel offload private items location
> >
> > Guoyang Zhou (1):
> > net/hinic: fix crash in secondary process
> >
> > Haiyue Wang (1):
> > net/ixgbe: fix Rx errors statistics for UDP checksum
> >
> > Harman Kalra (1):
> > event/octeontx2: fix device reconfigure for single slot
> >
> > Heinrich Kuhn (1):
> > net/nfp: fix reporting of RSS capabilities
> >
> > Hemant Agrawal (3):
> > ethdev: add missing buses in device iterator
> > crypto/dpaa_sec: affine the thread portal affinity
> > crypto/dpaa2_sec: fix close and uninit functions
> >
> > Hongbo Zheng (9):
> > app/testpmd: fix Tx/Rx descriptor query error log
> > net/hns3: fix FLR miss detection
> > net/hns3: delete redundant blank line
> > bpf: fix JSLT validation
> > common/sfc_efx/base: fix dereferencing null pointer
> > power: fix sanity checks for guest channel read
> > net/hns3: fix VF alive notification after config restore
> > examples/l3fwd-power: fix empty poll thresholds
> > net/hns3: fix concurrent interrupt handling
> >
> > Huisong Li (23):
> > net/hns3: fix device capabilities for copper media type
> > net/hns3: remove unused parameter markers
> > net/hns3: fix reporting undefined speed
> > net/hns3: fix link update when failed to get link info
> > net/hns3: fix flow control exception
> > app/testpmd: fix bitmap of link speeds when force speed
> > net/hns3: fix flow control mode
> > net/hns3: remove redundant mailbox response
> > net/hns3: fix DCB mode check
> > net/hns3: fix VMDq mode check
> > net/hns3: fix mbuf leakage
> > net/hns3: fix link status when port is stopped
> > net/hns3: fix link speed when port is down
> > app/testpmd: fix forward lcores number for DCB
> > app/testpmd: fix DCB forwarding configuration
> > app/testpmd: fix DCB re-configuration
> > app/testpmd: verify DCB config during forward config
> > net/hns3: fix Rx/Tx queue numbers check
> > net/hns3: fix requested FC mode rollback
> > net/hns3: remove meaningless packet buffer rollback
> > net/hns3: fix DCB configuration
> > net/hns3: fix DCB reconfiguration
> > net/hns3: fix link speed when VF device is down
> >
> > Ibtisam Tariq (1):
> > examples/vhost_crypto: remove unused short option
> >
> > Igor Chauskin (2):
> > net/ena: switch memcpy to optimized version
> > net/ena: fix parsing of large LLQ header device argument
> >
> > Igor Russkikh (2):
> > net/qede: reduce log verbosity
> > net/qede: accept bigger RSS table
> >
> > Ilya Maximets (1):
> > net/virtio: fix interrupt unregistering for listening socket
> >
> > Ivan Malov (5):
> > net/sfc: fix buffer size for flow parse
> > net: fix comment in IPv6 header
> > net/sfc: fix error path inconsistency
> > common/sfc_efx/base: fix indication of MAE encap support
> > net/sfc: fix outer rule rollback on error
> >
> > Jerin Jacob (1):
> > examples: fix pkg-config override
> >
> > Jiawei Wang (4):
> > app/testpmd: fix NVGRE encap configuration
> > net/mlx5: fix resource release for mirror flow
> > net/mlx5: fix RSS flow item expansion for GRE key
> > net/mlx5: fix RSS flow item expansion for NVGRE
> >
> > Jiawei Zhu (1):
> > net/mlx5: fix Rx segmented packets on mbuf starvation
> >
> > Jiawen Wu (4):
> > net/txgbe: remove unused functions
> > net/txgbe: fix Rx missed packet counter
> > net/txgbe: update packet type
> > net/txgbe: fix QinQ strip
> >
> > Jiayu Hu (2):
> > vhost: fix queue initialization
> > vhost: fix redundant vring status change notification
> >
> > Jie Wang (1):
> > net/ice: fix VSI array out of bounds access
> >
> > John Daley (2):
> > net/enic: fix flow initialization error handling
> > net/enic: enable GENEVE offload via VNIC configuration
> >
> > Juraj Linkeš (1):
> > eal/arm64: fix platform register bit
> >
> > Kai Ji (2):
> > test/crypto: fix auth-cipher compare length in OOP
> > test/crypto: copy offset data to OOP destination buffer
> >
> > Kalesh AP (23):
> > net/bnxt: remove unused macro
> > net/bnxt: fix VNIC configuration
> > net/bnxt: fix firmware fatal error handling
> > net/bnxt: fix FW readiness check during recovery
> > net/bnxt: fix device readiness check
> > net/bnxt: fix VF info allocation
> > net/bnxt: fix HWRM and FW incompatibility handling
> > net/bnxt: mute some failure logs
> > app/testpmd: check MAC address query
> > net/bnxt: fix PCI write check
> > net/bnxt: fix link state operations
> > net/bnxt: fix timesync when PTP is not supported
> > net/bnxt: fix memory allocation for command response
> > net/bnxt: fix double free in port start failure
> > net/bnxt: fix configuring LRO
> > net/bnxt: fix health check alarm cancellation
> > net/bnxt: fix PTP support for Thor
> > net/bnxt: fix ring count calculation for Thor
> > net/bnxt: remove unnecessary forward declarations
> > net/bnxt: remove unused function parameters
> > net/bnxt: drop unused attribute
> > net/bnxt: fix single PF per port check
> > net/bnxt: prevent device access in error state
> >
> > Kamil Vojanec (1):
> > net/mlx5/linux: fix firmware version
> >
> > Kevin Traynor (5):
> > test/cmdline: fix inputs array
> > test/crypto: fix build with GCC 11
> > crypto/zuc: fix build with GCC 11
> > test: fix build with GCC 11
> > test/cmdline: silence clang 12 warning
> >
> > Konstantin Ananyev (1):
> > acl: fix build with GCC 11
> >
> > Lance Richardson (8):
> > net/bnxt: fix Rx buffer posting
> > net/bnxt: fix Tx length hint threshold
> > net/bnxt: fix handling of null flow mask
> > test: fix TCP header initialization
> > net/bnxt: fix Rx descriptor status
> > net/bnxt: fix Rx queue count
> > net/bnxt: fix dynamic VNIC count
> > eal: fix memory mapping on 32-bit target
> >
> > Leyi Rong (1):
> > net/iavf: fix packet length parsing in AVX512
> >
> > Li Zhang (1):
> > net/mlx5: fix flow actions index in cache
> >
> > Luc Pelletier (2):
> > eal: fix race in control thread creation
> > eal: fix hang in control thread creation
> >
> > Marvin Liu (5):
> > vhost: fix split ring potential buffer overflow
> > vhost: fix packed ring potential buffer overflow
> > vhost: fix batch dequeue potential buffer overflow
> > vhost: fix initialization of temporary header
> > vhost: fix initialization of async temporary header
> >
> > Matan Azrad (5):
> > common/mlx5/linux: add glue function to query WQ
> > common/mlx5: add DevX command to query WQ
> > common/mlx5: add DevX commands for queue counters
> > vdpa/mlx5: fix virtq cleaning
> > vdpa/mlx5: fix device unplug
> >
> > Michael Baum (1):
> > net/mlx5: fix flow age event triggering
> >
> > Michal Krawczyk (5):
> > net/ena/base: improve style and comments
> > net/ena/base: fix type conversions by explicit casting
> > net/ena/base: destroy multiple wait events
> > net/ena: fix crash with unsupported device argument
> > net/ena: indicate Rx RSS hash presence
> >
> > Min Hu (Connor) (25):
> > net/hns3: fix MTU config complexity
> > net/hns3: update HiSilicon copyright syntax
> > net/hns3: fix copyright date
> > examples/ptpclient: remove wrong comment
> > test/bpf: fix error message
> > doc: fix HiSilicon copyright syntax
> > net/hns3: remove unused macros
> > net/hns3: remove unused macro
> > app/eventdev: fix overflow in lcore list parsing
> > test/kni: fix a comment
> > test/kni: check init result
> > net/hns3: fix typos on comments
> > net/e1000: fix flow error message object
> > app/testpmd: fix division by zero on socket memory dump
> > net/kni: warn on stop failure
> > app/bbdev: check memory allocation
> > app/bbdev: fix HARQ error messages
> > raw/skeleton: add missing check after setting attribute
> > test/timer: check memzone allocation
> > app/crypto-perf: check memory allocation
> > examples/flow_classify: fix NUMA check of port and core
> > examples/l2fwd-cat: fix NUMA check of port and core
> > examples/skeleton: fix NUMA check of port and core
> > test: check flow classifier creation
> > test: fix division by zero
> >
> > Murphy Yang (3):
> > net/ixgbe: fix RSS RETA being reset after port start
> > net/i40e: fix flow director config after flow validate
> > net/i40e: fix flow director for common pctypes
> >
> > Natanael Copa (5):
> > common/dpaax/caamflib: fix build with musl
> > bus/dpaa: fix 64-bit arch detection
> > bus/dpaa: fix build with musl
> > net/cxgbe: remove use of uint type
> > app/testpmd: fix build with musl
> >
> > Nipun Gupta (1):
> > bus/dpaa: fix statistics reading
> >
> > Nithin Dabilpuram (3):
> > vfio: do not merge contiguous areas
> > vfio: fix DMA mapping granularity for IOVA as VA
> > test/mem: fix page size for external memory
> >
> > Olivier Matz (1):
> > test/mempool: fix object initializer
> >
> > Pallavi Kadam (1):
> > bus/pci: skip probing some Windows NDIS devices
> >
> > Pavan Nikhilesh (4):
> > test/event: fix timeout accuracy
> > app/eventdev: fix timeout accuracy
> > app/eventdev: fix lcore parsing skipping last core
> > event/octeontx2: fix XAQ pool reconfigure
> >
> > Pu Xu (1):
> > ip_frag: fix fragmenting IPv4 packet with header option
> >
> > Qi Zhang (8):
> > net/ice/base: fix payload indicator on ptype
> > net/ice/base: fix uninitialized struct
> > net/ice/base: cleanup filter list on error
> > net/ice/base: fix memory allocation for MAC addresses
> > net/iavf: fix TSO max segment size
> > doc: fix matching versions in ice guide
> > net/iavf: fix wrong Tx context descriptor
> > common/iavf: fix duplicated offload bit
> >
> > Radha Mohan Chintakuntla (1):
> > raw/octeontx2_dma: assign PCI device in DPI VF
> >
> > Raslan Darawsheh (1):
> > ethdev: update flow item GTP QFI definition
> >
> > Richael Zhuang (2):
> > test/power: add delay before checking CPU frequency
> > test/power: round CPU frequency to check
> >
> > Robin Zhang (6):
> > net/i40e: announce request queue capability in PF
> > doc: update recommended versions for i40e
> > net/i40e: fix lack of MAC type when set MAC address
> > net/iavf: fix lack of MAC type when set MAC address
> > net/iavf: fix primary MAC type when starting port
> > net/i40e: fix primary MAC type when starting port
> >
> > Rohit Raj (3):
> > net/dpaa2: fix getting link status
> > net/dpaa: fix getting link status
> > examples/l2fwd-crypto: fix packet length while decryption
> >
> > Roy Shterman (1):
> > mem: fix freeing segments in --huge-unlink mode
> >
> > Satheesh Paul (1):
> > net/octeontx2: fix VLAN filter
> >
> > Savinay Dharmappa (1):
> > sched: fix traffic class oversubscription parameter
> >
> > Shijith Thotton (3):
> > eventdev: fix case to initiate crypto adapter service
> > event/octeontx2: fix crypto adapter queue pair operations
> > event/octeontx2: configure crypto adapter xaq pool
> >
> > Siwar Zitouni (1):
> > net/ice: fix disabling promiscuous mode
> >
> > Somnath Kotur (5):
> > net/bnxt: fix xstats get
> > net/bnxt: fix Rx and Tx timestamps
> > net/bnxt: fix Tx timestamp init
> > net/bnxt: refactor multi-queue Rx configuration
> > net/bnxt: fix Rx timestamp when FIFO pending bit is set
> >
> > Stanislaw Kardach (6):
> > test: proceed if timer subsystem already initialized
> > stack: allow lock-free only on relevant architectures
> > test/distributor: fix worker notification in burst mode
> > test/distributor: fix burst flush on worker quit
> > net/ena: remove endian swap functions
> > net/ena: report default ring size
> >
> > Stephen Hemminger (2):
> > kni: refactor user request processing
> > net/bnxt: use prefix on global function
> >
> > Suanming Mou (1):
> > net/mlx5: fix counter offset detection
> >
> > Tal Shnaiderman (2):
> > eal/windows: fix default thread priority
> > eal/windows: fix return codes of pthread shim layer
> >
> > Tengfei Zhang (1):
> > net/pcap: fix file descriptor leak on close
> >
> > Thinh Tran (1):
> > test: fix autotest handling of skipped tests
> >
> > Thomas Monjalon (18):
> > bus/pci: fix Windows kernel driver categories
> > eal: fix comment of OS-specific header files
> > buildtools: fix build with busybox
> > build: detect execinfo library on Linux
> > build: remove redundant _GNU_SOURCE definitions
> > eal: fix build with musl
> > net/igc: remove use of uint type
> > event/dlb: fix header includes for musl
> > examples/bbdev: fix header include for musl
> > drivers: fix log level after loading
> > app/regex: fix usage text
> > app/testpmd: fix usage text
> > doc: fix names of UIO drivers
> > doc: fix build with Sphinx 4
> > bus/pci: support I/O port operations with musl
> > app: fix exit messages
> > regex/octeontx2: remove unused include directory
> > doc: remove PDF requirements
> >
> > Tianyu Li (1):
> > net/memif: fix Tx bps statistics for zero-copy
> >
> > Timothy McDaniel (2):
> > event/dlb2: remove references to deferred scheduling
> > doc: fix runtime options in DLB2 guide
> >
> > Tyler Retzlaff (1):
> > eal: add C++ include guard for reciprocal header
> >
> > Vadim Podovinnikov (1):
> > net/bonding: fix LACP system address check
> >
> > Venkat Duvvuru (1):
> > net/bnxt: fix queues per VNIC
> >
> > Viacheslav Ovsiienko (16):
> > net/mlx5: fix external buffer pool registration for Rx queue
> > net/mlx5: fix metadata item validation for ingress flows
> > net/mlx5: fix hashed list size for tunnel flow groups
> > net/mlx5: fix UAR allocation diagnostics messages
> > common/mlx5: add timestamp format support to DevX
> > vdpa/mlx5: support timestamp format
> > net/mlx5: fix Rx metadata leftovers
> > net/mlx5: fix drop action for Direct Rules/Verbs
> > net/mlx4: fix RSS action with null hash key
> > net/mlx5: support timestamp format
> > regex/mlx5: support timestamp format
> > app/testpmd: fix segment number check
> > net/mlx5: remove drop queue function prototypes
> > net/mlx4: fix buffer leakage on device close
> > net/mlx5: fix probing device in legacy bonding mode
> > net/mlx5: fix receiving queue timestamp format
> >
> > Wei Huang (1):
> > raw/ifpga: fix device name format
> >
> > Wenjun Wu (3):
> > net/ice: check some functions return
> > net/ice: fix RSS hash update
> > net/ice: fix RSS for L2 packet
> >
> > Wenwu Ma (1):
> > net/ice: fix illegal access when removing MAC filter
> >
> > Wenzhuo Lu (2):
> > net/iavf: fix crash in AVX512
> > net/ice: fix crash in AVX512
> >
> > Wisam Jaddo (1):
> > app/flow-perf: fix encap/decap actions
> >
> > Xiao Wang (1):
> > vdpa/ifc: check PCI config read
> >
> > Xiaoyu Min (4):
> > net/mlx5: support RSS expansion for IPv6 GRE
> > net/mlx5: fix shared inner RSS
> > net/mlx5: fix missing shared RSS hash types
> > net/mlx5: fix redundant flow after RSS expansion
> >
> > Xiaoyun Li (2):
> > app/testpmd: remove unnecessary UDP tunnel check
> > net/i40e: fix IPv4 fragment offload
> >
> > Xueming Li (2):
> > version: 20.11.2-rc1
> > net/virtio: fix vectorized Rx queue rearm
> >
> > Youri Querry (1):
> > bus/fslmc: fix random portal hangs with qbman 5.0
> >
> > Yunjian Wang (5):
> > vfio: fix API description
> > net/mlx5: fix using flow tunnel before null check
> > vfio: fix duplicated user mem map
> > net/mlx4: fix leak when configured repeatedly
> > net/mlx5: fix leak when configured repeatedly
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH] dmadev: introduce DMA device library
2021-07-05 15:55 0% ` Jerin Jacob
@ 2021-07-05 17:16 0% ` Bruce Richardson
2021-07-07 8:08 0% ` Jerin Jacob
0 siblings, 1 reply; 200+ results
From: Bruce Richardson @ 2021-07-05 17:16 UTC (permalink / raw)
To: Jerin Jacob
Cc: Chengwen Feng, Thomas Monjalon, Ferruh Yigit, Jerin Jacob,
dpdk-dev, Morten Brørup, Nipun Gupta, Hemant Agrawal,
Maxime Coquelin, Honnappa Nagarahalli, David Marchand,
Satananda Burla, Prasun Kapoor, Ananyev, Konstantin, liangma,
Radha Mohan Chintakuntla
On Mon, Jul 05, 2021 at 09:25:34PM +0530, Jerin Jacob wrote:
>
> On Mon, Jul 5, 2021 at 4:22 PM Bruce Richardson
> <bruce.richardson@intel.com> wrote:
> >
> > On Sun, Jul 04, 2021 at 03:00:30PM +0530, Jerin Jacob wrote:
> > > On Fri, Jul 2, 2021 at 6:51 PM Chengwen Feng <fengchengwen@huawei.com> wrote:
> > > >
> > > > This patch introduces 'dmadevice' which is a generic type of DMA
> > > > device.
<snip>
> >
> > +1 and the terminology with regards to queues and channels. With our ioat
> > hardware, each HW queue was called a channel for instance.
>
> Looks like <dmadev> <> <channel> can cover all the use cases, if the
> HW has more than
> 1 queues it can be exposed as separate dmadev dev.
>
Fine for me.
However, just to confirm that Morten's suggestion of using a
(device-specific void *) channel pointer rather than dev_id + channel_id
pair of parameters won't work for you? You can't store a pointer or dev
index in the channel struct in the driver?
>
<snip>
> > > > + *
> > > > + * If dma_cookie_t is >=0 it's a DMA operation request cookie, <0 it's a error
> > > > + * code.
> > > > + * When using cookies, comply with the following rules:
> > > > + * a) Cookies for each virtual queue are independent.
> > > > + * b) For a virt queue, the cookie are monotonically incremented, when it reach
> > > > + * the INT_MAX, it wraps back to zero.
> >
> > I disagree with the INT_MAX (or INT32_MAX) value here. If we use that
> > value, it means that we cannot use implicit wrap-around inside the CPU and
> > have to check for the INT_MAX value. Better to:
> > 1. Specify that it wraps at UINT16_MAX which allows us to just use a
> > uint16_t internally and wrap-around automatically, or:
> > 2. Specify that it wraps at a power-of-2 value >= UINT16_MAX, giving
> > drivers the flexibility at what value to wrap around.
>
> I think, (2) better than 1. I think, even better to wrap around the number of
> descriptors configured in dev_configure()(We cake make this as the power of 2),
>
Interesting, I hadn't really considered that before. My only concern
would be if an app wants to keep values in the app ring for a while after
they have been returned from dmadev. I thought it easier to have the full
16-bit counter value returned to the user to give the most flexibility,
given that going from that to any power-of-2 ring size smaller is a trivial
operation.
Overall, while my ideal situation is to always have a 0..UINT16_MAX return
value from the function, I can live with your suggestion of wrapping at
ring_size, since drivers will likely do that internally anyway.
I think wrapping at INT32_MAX is too awkward and will be error prone since
we can't rely on hardware automatically wrapping to zero, nor on the driver
having pre-masked the value.
> >
> > > > + * c) The initial cookie of a virt queue is zero, after the device is stopped or
> > > > + * reset, the virt queue's cookie needs to be reset to zero.
<snip>
> > >
> > > Please add some good amount of reserved bits and have API to init this
> > > structure for future ABI stability, say rte_dmadev_queue_config_init()
> > > or so.
> > >
> >
> > I don't think that is necessary. Since the config struct is used only as
> > parameter to the config function, any changes to it can be managed by
> > versioning that single function. Padding would only be necessary if we had
> > an array of these config structs somewhere.
>
> OK.
>
> For some reason, the versioning API looks ugly to me in code instead of keeping
> some rsvd fields look cool to me with init function.
>
> But I agree. function versioning works in this case. No need to find other API
> if tt is not general DPDK API practice.
>
The one thing I would suggest instead of the padding is for the internal
APIS, to pass the struct size through, since we can't version those - and
for padding we can't know whether any replaced padding should be used or
not. Specifically:
typedef int (*rte_dmadev_configure_t)(struct rte_dmadev *dev, struct
rte_dmadev_conf *cfg, size_t cfg_size);
but for the public function:
int
rte_dmadev_configure(struct rte_dmadev *dev, struct
rte_dmadev_conf *cfg)
{
...
ret = dev->ops.configure(dev, cfg, sizeof(*cfg));
...
}
Then if we change the structure and version the config API, the driver can
tell from the size what struct version it is and act accordingly. Without
that, each time the struct changed, we'd have to add a new function pointer
to the device ops.
> In other libraries, I have seen such _init or function that can use
> for this as well as filling default value
> in some cases implementation values is not zero).
> So that application can avoid memset for param structure.
> Added rte_event_queue_default_conf_get() in eventdev spec for this.
>
I think that would largely have the same issues, unless it returned a
pointer to data inside the driver - and which therefore could not be
modified. Alternatively it would mean that the memory would have been
allocated in the driver and we would need to ensure proper cleanup
functions were called to free memory afterwards. Supporting having the
config parameter as a local variable I think makes things a lot easier.
> No strong opinion on this.
>
>
>
> >
> > >
> > > > +
> > > > +/**
> > > > + * A structure used to retrieve information of a DMA virt queue.
> > > > + */
> > > > +struct rte_dmadev_queue_info {
> > > > + enum dma_transfer_direction direction;
> > >
> > > A queue may support all directions so I think it should be a bitfield.
> > >
> > > > + /**< Associated transfer direction */
> > > > + uint16_t hw_queue_id; /**< The HW queue on which to create virt queue */
> > > > + uint16_t nb_desc; /**< Number of descriptor for this virt queue */
> > > > + uint64_t dev_flags; /**< Device specific flags */
> > > > +};
> > > > +
> > >
> > > > +__rte_experimental
> > > > +static inline dma_cookie_t
> > > > +rte_dmadev_copy_sg(uint16_t dev_id, uint16_t vq_id,
> > > > + const struct dma_scatterlist *sg,
> > > > + uint32_t sg_len, uint64_t flags)
> > >
> > > I would like to change this as:
> > > rte_dmadev_copy_sg(uint16_t dev_id, uint16_t vq_id, const struct
> > > rte_dma_sg *src, uint32_t nb_src,
> > > const struct rte_dma_sg *dst, uint32_t nb_dst) or so allow the use case like
> > > src 30 MB copy can be splitted as written as 1 MB x 30 dst.
> > >
Out of interest, do you see much benefit (and in what way) from having the
scatter-gather support? Unlike sending 5 buffers in one packet rather than
5 buffers in 5 packets to a NIC, copying an array of memory in one op vs
multiple is functionally identical.
> > >
> > >
<snip>
> Got it. In order to save space if first CL size for fastpath(Saving 8B
> for the pointer) and to avoid
> function overhead, Can we use one bit of flags of op function to
> enable the fence?
>
The original ioat implementation did exactly that. However, I then
discovered that because a fence logically belongs between two operations,
does the fence flag on an operation mean "don't do any jobs after this
until this job has completed" or does it mean "don't start this job until
all previous jobs have completed". [Or theoretically does it mean both :-)]
Naturally, some hardware does it the former way (i.e. fence flag goes on
last op before fence), while other hardware the latter way (i.e. fence flag
goes on first op after the fence). Therefore, since fencing is about
ordering *between* two (sets of) jobs, I decided that it should do exactly
that and go between two jobs, so there is no ambiguity!
However, I'm happy enough to switch to having a fence flag, but I think if
we do that, it should be put in the "first job after fence" case, because
it is always easier to modify a previously written job if we need to, than
to save the flag for a future one.
Alternatively, if we keep the fence as a separate function, I'm happy
enough for it not to be on the same cacheline as the "hot" operations,
since fencing will always introduce a small penalty anyway.
> >
> > >
<snip>
> > > Since we have additional function call overhead in all the
> > > applications for this scheme, I would like to understand
> > > the use of doing this way vs enq does the doorbell implicitly from
> > > driver/application PoV?
> > >
> >
> > In our benchmarks it's just faster. When we tested it, the overhead of the
> > function calls was noticably less than the cost of building up the
> > parameter array(s) for passing the jobs in as a burst. [We don't see this
> > cost with things like NIC I/O since DPDK tends to already have the mbuf
> > fully populated before the TX call anyway.]
>
> OK. I agree with stack population.
>
> My question was more on doing implicit doorbell update enq. Is doorbell write
> costly in other HW compare to a function call? In our HW, it is just write of
> the number of instructions written in a register.
>
> Also, we need to again access the internal PMD memory structure to find
> where to write etc if it is a separate function.
>
The cost varies depending on a number of factors - even writing to a single
HW register can be very slow if that register is mapped as device
(uncacheable) memory, since (AFAIK) it will act as a full fence and wait
for the write to go all the way to hardware. For more modern HW, the cost
can be lighter. However, any cost of HW writes is going to be the same
whether its a separate function call or not.
However, the main thing about the doorbell update is that it's a
once-per-burst thing, rather than a once-per-job. Therefore, even if you
have to re-read the struct memory (which is likely still somewhere in your
cores' cache), any extra small cost of doing so is to be amortized over the
cost of a whole burst of copies.
>
> >
> > >
<snip>
> > > > +
> > > > +/**
> > > > + * @warning
> > > > + * @b EXPERIMENTAL: this API may change without prior notice.
> > > > + *
> > > > + * Returns the number of operations that failed to complete.
> > > > + * NOTE: This API was used when rte_dmadev_completed has_error was set.
> > > > + *
> > > > + * @param dev_id
> > > > + * The identifier of the device.
> > > > + * @param vq_id
> > > > + * The identifier of virt queue.
> > > (> + * @param nb_status
> > > > + * Indicates the size of status array.
> > > > + * @param[out] status
> > > > + * The error code of operations that failed to complete.
> > > > + * @param[out] cookie
> > > > + * The last failed completed operation's cookie.
> > > > + *
> > > > + * @return
> > > > + * The number of operations that failed to complete.
> > > > + *
> > > > + * NOTE: The caller must ensure that the input parameter is valid and the
> > > > + * corresponding device supports the operation.
> > > > + */
> > > > +__rte_experimental
> > > > +static inline uint16_t
> > > > +rte_dmadev_completed_fails(uint16_t dev_id, uint16_t vq_id,
> > > > + const uint16_t nb_status, uint32_t *status,
> > > > + dma_cookie_t *cookie)
> > >
> > > IMO, it is better to move cookie/rind_idx at 3.
> > > Why it would return any array of errors? since it called after
> > > rte_dmadev_completed() has
> > > has_error. Is it better to change
> > >
> > > rte_dmadev_error_status((uint16_t dev_id, uint16_t vq_id, dma_cookie_t
> > > *cookie, uint32_t *status)
> > >
> > > I also think, we may need to set status as bitmask and enumerate all
> > > the combination of error codes
> > > of all the driver and return string from driver existing rte_flow_error
> > >
> > > See
> > > struct rte_flow_error {
> > > enum rte_flow_error_type type; /**< Cause field and error types. */
> > > const void *cause; /**< Object responsible for the error. */
> > > const char *message; /**< Human-readable error message. */
> > > };
> > >
> >
> > I think we need a multi-return value API here, as we may add operations in
> > future which have non-error status values to return. The obvious case is
> > DMA engines which support "compare" operations. In that case a successful
> > compare (as in there were no DMA or HW errors) can return "equal" or
> > "not-equal" as statuses. For general "copy" operations, the faster
> > completion op can be used to just return successful values (and only call
> > this status version on error), while apps using those compare ops or a
> > mixture of copy and compare ops, would always use the slower one that
> > returns status values for each and every op..
> >
> > The ioat APIs used 32-bit integer values for this status array so as to
> > allow e.g. 16-bits for error code and 16-bits for future status values. For
> > most operations there should be a fairly small set of things that can go
> > wrong, i.e. bad source address, bad destination address or invalid length.
> > Within that we may have a couple of specifics for why an address is bad,
> > but even so I don't think we need to start having multiple bit
> > combinations.
>
> OK. What is the purpose of errors status? Is it for application printing it or
> Does the application need to take any action based on specific error requests?
It's largely for information purposes, but in the case of SVA/SVM errors
could occur due to the memory not being pinned, i.e. a page fault, in some
cases. If that happens, then it's up the app to either touch the memory and
retry the copy, or to do a SW memcpy as a fallback.
In other error cases, I think it's good to tell the application if it's
passing around bad data, or data that is beyond the scope of hardware, e.g.
a copy that is beyond what can be done in a single transaction for a HW
instance. Given that there are always things that can go wrong, I think we
need some error reporting mechanism.
> If the former is scope, then we need to define the standard enum value
> for the error right?
> ie. uint32_t *status needs to change to enum rte_dma_error or so.
>
Sure. Perhaps an error/status structure either is an option, where we
explicitly call out error info from status info.
>
>
<snip to end>
/Bruce
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH] dmadev: introduce DMA device library
2021-07-05 10:52 0% ` Bruce Richardson
@ 2021-07-05 15:55 0% ` Jerin Jacob
2021-07-05 17:16 0% ` Bruce Richardson
0 siblings, 1 reply; 200+ results
From: Jerin Jacob @ 2021-07-05 15:55 UTC (permalink / raw)
To: Bruce Richardson
Cc: Chengwen Feng, Thomas Monjalon, Ferruh Yigit, Jerin Jacob,
dpdk-dev, Morten Brørup, Nipun Gupta, Hemant Agrawal,
Maxime Coquelin, Honnappa Nagarahalli, David Marchand,
Satananda Burla, Prasun Kapoor, Ananyev, Konstantin, liangma,
Radha Mohan Chintakuntla
need
On Mon, Jul 5, 2021 at 4:22 PM Bruce Richardson
<bruce.richardson@intel.com> wrote:
>
> On Sun, Jul 04, 2021 at 03:00:30PM +0530, Jerin Jacob wrote:
> > On Fri, Jul 2, 2021 at 6:51 PM Chengwen Feng <fengchengwen@huawei.com> wrote:
> > >
> > > This patch introduces 'dmadevice' which is a generic type of DMA
> > > device.
> > >
> > > The APIs of dmadev library exposes some generic operations which can
> > > enable configuration and I/O with the DMA devices.
> > >
> > > Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
> >
> > Thanks for v1.
> >
> > I would suggest finalizing lib/dmadev/rte_dmadev.h before doing the
> > implementation so that you don't need
> > to waste time on rewoking the implementation.
> >
>
> I actually like having the .c file available too. Before we lock down the
> .h file and the API, I want to verify the performance of our drivers with
> the implementation, and having a working .c file is obviously necessary for
> that. So I appreciate having it as part of the RFC.
Ack.
>
> > Comments inline.
> >
> > > ---
> <snip>
> > > + *
> > > + * The DMA framework is built on the following abstraction model:
> > > + *
> > > + * ------------ ------------
> > > + * |virt-queue| |virt-queue|
> > > + * ------------ ------------
> > > + * \ /
> > > + * \ /
> > > + * \ /
> > > + * ------------ ------------
> > > + * | HW-queue | | HW-queue |
> > > + * ------------ ------------
> > > + * \ /
> > > + * \ /
> > > + * \ /
> > > + * ----------
> > > + * | dmadev |
> > > + * ----------
> >
> > Continuing the discussion with @Morten Brørup , I think, we need to
> > finalize the model.
> >
>
> +1 and the terminology with regards to queues and channels. With our ioat
> hardware, each HW queue was called a channel for instance.
Looks like <dmadev> <> <channel> can cover all the use cases, if the
HW has more than
1 queues it can be exposed as separate dmadev dev.
>
> > > + * a) The DMA operation request must be submitted to the virt queue, virt
> > > + * queues must be created based on HW queues, the DMA device could have
> > > + * multiple HW queues.
> > > + * b) The virt queues on the same HW-queue could represent different contexts,
> > > + * e.g. user could create virt-queue-0 on HW-queue-0 for mem-to-mem
> > > + * transfer scenario, and create virt-queue-1 on the same HW-queue for
> > > + * mem-to-dev transfer scenario.
> > > + * NOTE: user could also create multiple virt queues for mem-to-mem transfer
> > > + * scenario as long as the corresponding driver supports.
> > > + *
> > > + * The control plane APIs include configure/queue_setup/queue_release/start/
> > > + * stop/reset/close, in order to start device work, the call sequence must be
> > > + * as follows:
> > > + * - rte_dmadev_configure()
> > > + * - rte_dmadev_queue_setup()
> > > + * - rte_dmadev_start()
> >
> > Please add reconfigure behaviour etc, Please check the
> > lib/regexdev/rte_regexdev.h
> > introduction. I have added similar ones so you could reuse as much as possible.
> >
> >
> > > + * The dataplane APIs include two parts:
> > > + * a) The first part is the submission of operation requests:
> > > + * - rte_dmadev_copy()
> > > + * - rte_dmadev_copy_sg() - scatter-gather form of copy
> > > + * - rte_dmadev_fill()
> > > + * - rte_dmadev_fill_sg() - scatter-gather form of fill
> > > + * - rte_dmadev_fence() - add a fence force ordering between operations
> > > + * - rte_dmadev_perform() - issue doorbell to hardware
> > > + * These APIs could work with different virt queues which have different
> > > + * contexts.
> > > + * The first four APIs are used to submit the operation request to the virt
> > > + * queue, if the submission is successful, a cookie (as type
> > > + * 'dma_cookie_t') is returned, otherwise a negative number is returned.
> > > + * b) The second part is to obtain the result of requests:
> > > + * - rte_dmadev_completed()
> > > + * - return the number of operation requests completed successfully.
> > > + * - rte_dmadev_completed_fails()
> > > + * - return the number of operation requests failed to complete.
> > > + *
> > > + * The misc APIs include info_get/queue_info_get/stats/xstats/selftest, provide
> > > + * information query and self-test capabilities.
> > > + *
> > > + * About the dataplane APIs MT-safe, there are two dimensions:
> > > + * a) For one virt queue, the submit/completion API could be MT-safe,
> > > + * e.g. one thread do submit operation, another thread do completion
> > > + * operation.
> > > + * If driver support it, then declare RTE_DMA_DEV_CAPA_MT_VQ.
> > > + * If driver don't support it, it's up to the application to guarantee
> > > + * MT-safe.
> > > + * b) For multiple virt queues on the same HW queue, e.g. one thread do
> > > + * operation on virt-queue-0, another thread do operation on virt-queue-1.
> > > + * If driver support it, then declare RTE_DMA_DEV_CAPA_MT_MVQ.
> > > + * If driver don't support it, it's up to the application to guarantee
> > > + * MT-safe.
> >
> > From an application PoV it may not be good to write portable
> > applications. Please check
> > latest thread with @Morten Brørup
> >
> > > + */
> > > +
> > > +#ifdef __cplusplus
> > > +extern "C" {
> > > +#endif
> > > +
> > > +#include <rte_common.h>
> > > +#include <rte_memory.h>
> > > +#include <rte_errno.h>
> > > +#include <rte_compat.h>
> >
> > Sort in alphabetical order.
> >
> > > +
> > > +/**
> > > + * dma_cookie_t - an opaque DMA cookie
> >
> > Since we are defining the behaviour is not opaque any more.
> > I think, it is better to call ring_idx or so.
> >
>
> +1 for ring index. We don't need a separate type for it though, just
> document the index as an unsigned return value.
>
> >
> > > +#define RTE_DMA_DEV_CAPA_MT_MVQ (1ull << 11) /**< Support MT-safe of multiple virt queues */
> >
> > Please lot of @see for all symbols where it is being used. So that one
> > can understand the full scope of
> > symbols. See below example.
> >
> > #define RTE_REGEXDEV_CAPA_RUNTIME_COMPILATION_F (1ULL << 0)
> > /**< RegEx device does support compiling the rules at runtime unlike
> > * loading only the pre-built rule database using
> > * struct rte_regexdev_config::rule_db in rte_regexdev_configure()
> > *
> > * @see struct rte_regexdev_config::rule_db, rte_regexdev_configure()
> > * @see struct rte_regexdev_info::regexdev_capa
> > */
> >
> > > + *
> > > + * If dma_cookie_t is >=0 it's a DMA operation request cookie, <0 it's a error
> > > + * code.
> > > + * When using cookies, comply with the following rules:
> > > + * a) Cookies for each virtual queue are independent.
> > > + * b) For a virt queue, the cookie are monotonically incremented, when it reach
> > > + * the INT_MAX, it wraps back to zero.
>
> I disagree with the INT_MAX (or INT32_MAX) value here. If we use that
> value, it means that we cannot use implicit wrap-around inside the CPU and
> have to check for the INT_MAX value. Better to:
> 1. Specify that it wraps at UINT16_MAX which allows us to just use a
> uint16_t internally and wrap-around automatically, or:
> 2. Specify that it wraps at a power-of-2 value >= UINT16_MAX, giving
> drivers the flexibility at what value to wrap around.
I think, (2) better than 1. I think, even better to wrap around the number of
descriptors configured in dev_configure()(We cake make this as the power of 2),
>
> > > + * c) The initial cookie of a virt queue is zero, after the device is stopped or
> > > + * reset, the virt queue's cookie needs to be reset to zero.
> > > + * Example:
> > > + * step-1: start one dmadev
> > > + * step-2: enqueue a copy operation, the cookie return is 0
> > > + * step-3: enqueue a copy operation again, the cookie return is 1
> > > + * ...
> > > + * step-101: stop the dmadev
> > > + * step-102: start the dmadev
> > > + * step-103: enqueue a copy operation, the cookie return is 0
> > > + * ...
> > > + */
> >
> > Good explanation.
> >
> > > +typedef int32_t dma_cookie_t;
> >
>
> As I mentioned before, I'd just remove this, and use regular int types,
> with "ring_idx" as the name.
+1
>
> >
> > > +
> > > +/**
> > > + * dma_scatterlist - can hold scatter DMA operation request
> > > + */
> > > +struct dma_scatterlist {
> >
> > I prefer to change scatterlist -> sg
> > i.e rte_dma_sg
> >
> > > + void *src;
> > > + void *dst;
> > > + uint32_t length;
> > > +};
> > > +
> >
> > > +
> > > +/**
> > > + * A structure used to retrieve the contextual information of
> > > + * an DMA device
> > > + */
> > > +struct rte_dmadev_info {
> > > + /**
> > > + * Fields filled by framewok
> >
> > typo.
> >
> > > + */
> > > + struct rte_device *device; /**< Generic Device information */
> > > + const char *driver_name; /**< Device driver name */
> > > + int socket_id; /**< Socket ID where memory is allocated */
> > > +
> > > + /**
> > > + * Specification fields filled by driver
> > > + */
> > > + uint64_t dev_capa; /**< Device capabilities (RTE_DMA_DEV_CAPA_) */
> > > + uint16_t max_hw_queues; /**< Maximum number of HW queues. */
> > > + uint16_t max_vqs_per_hw_queue;
> > > + /**< Maximum number of virt queues to allocate per HW queue */
> > > + uint16_t max_desc;
> > > + /**< Maximum allowed number of virt queue descriptors */
> > > + uint16_t min_desc;
> > > + /**< Minimum allowed number of virt queue descriptors */
> >
> > Please add max_nb_segs. i.e maximum number of segments supported.
> >
> > > +
> > > + /**
> > > + * Status fields filled by driver
> > > + */
> > > + uint16_t nb_hw_queues; /**< Number of HW queues configured */
> > > + uint16_t nb_vqs; /**< Number of virt queues configured */
> > > +};
> > > + i
> > > +
> > > +/**
> > > + * dma_address_type
> > > + */
> > > +enum dma_address_type {
> > > + DMA_ADDRESS_TYPE_IOVA, /**< Use IOVA as dma address */
> > > + DMA_ADDRESS_TYPE_VA, /**< Use VA as dma address */
> > > +};
> > > +
> > > +/**
> > > + * A structure used to configure a DMA device.
> > > + */
> > > +struct rte_dmadev_conf {
> > > + enum dma_address_type addr_type; /**< Address type to used */
> >
> > I think, there are 3 kinds of limitations/capabilities.
> >
> > When the system is configured as IOVA as VA
> > 1) Device supports any VA address like memory from rte_malloc(),
> > rte_memzone(), malloc, stack memory
> > 2) Device support only VA address from rte_malloc(), rte_memzone() i.e
> > memory backed by hugepage and added to DMA map.
> >
> > When the system is configured as IOVA as PA
> > 1) Devices support only PA addresses .
> >
> > IMO, Above needs to be advertised as capability and application needs
> > to align with that
> > and I dont think application requests the driver to work in any of the modes.
> >
> >
>
> I don't think we need this level of detail for addressing capabilities.
> Unless I'm missing something, the hardware should behave exactly as other
> hardware does taking in iova's. If the user wants to check whether virtual
> addresses to pinned memory can be used directly, the user can call
> "rte_eal_iova_mode". We can't have a situation where some hardware uses one
> type of addresses and another hardware the other.
>
> Therefore, the only additional addressing capability we should need to
> report is that the hardware can use SVM/SVA and use virtual addresses not
> in hugepage memory.
+1.
>
> >
> > > + uint16_t nb_hw_queues; /**< Number of HW-queues enable to use */
> > > + uint16_t max_vqs; /**< Maximum number of virt queues to use */
> >
> > You need to what is max value allowed etc i.e it is based on
> > info_get() and mention the field
> > in info structure
> >
> >
> > > +
> > > +/**
> > > + * dma_transfer_direction
> > > + */
> > > +enum dma_transfer_direction {
> >
> > rte_dma_transter_direction
> >
> > > + DMA_MEM_TO_MEM,
> > > + DMA_MEM_TO_DEV,
> > > + DMA_DEV_TO_MEM,
> > > + DMA_DEV_TO_DEV,
> > > +};
> > > +
> > > +/**
> > > + * A structure used to configure a DMA virt queue.
> > > + */
> > > +struct rte_dmadev_queue_conf {
> > > + enum dma_transfer_direction direction;
> >
> >
> > > + /**< Associated transfer direction */
> > > + uint16_t hw_queue_id; /**< The HW queue on which to create virt queue */
> > > + uint16_t nb_desc; /**< Number of descriptor for this virt queue */
> > > + uint64_t dev_flags; /**< Device specific flags */
> >
> > Use of this? Need more comments on this.
> > Since it is in slowpath, We can have non opaque names here based on
> > each driver capability.
> >
> >
> > > + void *dev_ctx; /**< Device specific context */
> >
> > Use of this ? Need more comment ont this.
> >
>
> I think this should be dropped. We should not have any opaque
> device-specific info in these structs, rather if a particular device needs
> parameters we should call them out. Drivers for which it's not relevant can
> ignore them (and report same in capability if necessary). Since this is not
> a dataplane API, we aren't concerned too much about perf and can size the
> struct appropriately.
>
> >
> > Please add some good amount of reserved bits and have API to init this
> > structure for future ABI stability, say rte_dmadev_queue_config_init()
> > or so.
> >
>
> I don't think that is necessary. Since the config struct is used only as
> parameter to the config function, any changes to it can be managed by
> versioning that single function. Padding would only be necessary if we had
> an array of these config structs somewhere.
OK.
For some reason, the versioning API looks ugly to me in code instead of keeping
some rsvd fields look cool to me with init function.
But I agree. function versioning works in this case. No need to find other API
if tt is not general DPDK API practice.
In other libraries, I have seen such _init or function that can use
for this as well as filling default value
in some cases implementation values is not zero).
So that application can avoid memset for param structure.
Added rte_event_queue_default_conf_get() in eventdev spec for this.
No strong opinion on this.
>
> >
> > > +
> > > +/**
> > > + * A structure used to retrieve information of a DMA virt queue.
> > > + */
> > > +struct rte_dmadev_queue_info {
> > > + enum dma_transfer_direction direction;
> >
> > A queue may support all directions so I think it should be a bitfield.
> >
> > > + /**< Associated transfer direction */
> > > + uint16_t hw_queue_id; /**< The HW queue on which to create virt queue */
> > > + uint16_t nb_desc; /**< Number of descriptor for this virt queue */
> > > + uint64_t dev_flags; /**< Device specific flags */
> > > +};
> > > +
> >
> > > +__rte_experimental
> > > +static inline dma_cookie_t
> > > +rte_dmadev_copy_sg(uint16_t dev_id, uint16_t vq_id,
> > > + const struct dma_scatterlist *sg,
> > > + uint32_t sg_len, uint64_t flags)
> >
> > I would like to change this as:
> > rte_dmadev_copy_sg(uint16_t dev_id, uint16_t vq_id, const struct
> > rte_dma_sg *src, uint32_t nb_src,
> > const struct rte_dma_sg *dst, uint32_t nb_dst) or so allow the use case like
> > src 30 MB copy can be splitted as written as 1 MB x 30 dst.
> >
> >
> >
> > > +{
> > > + struct rte_dmadev *dev = &rte_dmadevices[dev_id];
> > > + return (*dev->copy_sg)(dev, vq_id, sg, sg_len, flags);
> > > +}
> > > +
> > > +/**
> > > + * @warning
> > > + * @b EXPERIMENTAL: this API may change without prior notice.
> > > + *
> > > + * Enqueue a fill operation onto the DMA virt queue
> > > + *
> > > + * This queues up a fill operation to be performed by hardware, but does not
> > > + * trigger hardware to begin that operation.
> > > + *
> > > + * @param dev_id
> > > + * The identifier of the device.
> > > + * @param vq_id
> > > + * The identifier of virt queue.
> > > + * @param pattern
> > > + * The pattern to populate the destination buffer with.
> > > + * @param dst
> > > + * The address of the destination buffer.
> > > + * @param length
> > > + * The length of the destination buffer.
> > > + * @param flags
> > > + * An opaque flags for this operation.
> >
> > PLEASE REMOVE opaque stuff from fastpath it will be a pain for
> > application writers as
> > they need to write multiple combinations of fastpath. flags are OK, if
> > we have a valid
> > generic flag now to control the transfer behavior.
> >
>
> +1. Flags need to be explicitly listed. If we don't have any flags for now,
> we can specify that the value must be given as zero and it's for future
> use.
OK.
>
> >
> > > +/**
> > > + * @warning
> > > + * @b EXPERIMENTAL: this API may change without prior notice.
> > > + *
> > > + * Add a fence to force ordering between operations
> > > + *
> > > + * This adds a fence to a sequence of operations to enforce ordering, such that
> > > + * all operations enqueued before the fence must be completed before operations
> > > + * after the fence.
> > > + * NOTE: Since this fence may be added as a flag to the last operation enqueued,
> > > + * this API may not function correctly when called immediately after an
> > > + * "rte_dmadev_perform" call i.e. before any new operations are enqueued.
> > > + *
> > > + * @param dev_id
> > > + * The identifier of the device.
> > > + * @param vq_id
> > > + * The identifier of virt queue.
> > > + *
> > > + * @return
> > > + * - =0: Successful add fence.
> > > + * - <0: Failure to add fence.
> > > + *
> > > + * NOTE: The caller must ensure that the input parameter is valid and the
> > > + * corresponding device supports the operation.
> > > + */
> > > +__rte_experimental
> > > +static inline int
> > > +rte_dmadev_fence(uint16_t dev_id, uint16_t vq_id)
> > > +{
> > > + struct rte_dmadev *dev = &rte_dmadevices[dev_id];
> > > + return (*dev->fence)(dev, vq_id);
> > > +}
> >
> > Since HW submission is in a queue(FIFO) the ordering is always
> > maintained. Right?
> > Could you share more details and use case of fence() from
> > driver/application PoV?
> >
>
> There are different kinds of ordering to consider, ordering of completions
> and the ordering of operations. While jobs are reported as completed to the
> user in order, for performance hardware, may overlap individual jobs within
> a burst (or even across bursts). Therefore, we need a fence operation to
> inform hardware that one job should not be started until the other has
> fully completed.
Got it. In order to save space if first CL size for fastpath(Saving 8B
for the pointer) and to avoid
function overhead, Can we use one bit of flags of op function to
enable the fence?
>
> >
> > > +
> > > +/**
> > > + * @warning
> > > + * @b EXPERIMENTAL: this API may change without prior notice.
> > > + *
> > > + * Trigger hardware to begin performing enqueued operations
> > > + *
> > > + * This API is used to write the "doorbell" to the hardware to trigger it
> > > + * to begin the operations previously enqueued by rte_dmadev_copy/fill()
> > > + *
> > > + * @param dev_id
> > > + * The identifier of the device.
> > > + * @param vq_id
> > > + * The identifier of virt queue.
> > > + *
> > > + * @return
> > > + * - =0: Successful trigger hardware.
> > > + * - <0: Failure to trigger hardware.
> > > + *
> > > + * NOTE: The caller must ensure that the input parameter is valid and the
> > > + * corresponding device supports the operation.
> > > + */
> > > +__rte_experimental
> > > +static inline int
> > > +rte_dmadev_perform(uint16_t dev_id, uint16_t vq_id)
> > > +{
> > > + struct rte_dmadev *dev = &rte_dmadevices[dev_id];
> > > + return (*dev->perform)(dev, vq_id);
> > > +}
> >
> > Since we have additional function call overhead in all the
> > applications for this scheme, I would like to understand
> > the use of doing this way vs enq does the doorbell implicitly from
> > driver/application PoV?
> >
>
> In our benchmarks it's just faster. When we tested it, the overhead of the
> function calls was noticably less than the cost of building up the
> parameter array(s) for passing the jobs in as a burst. [We don't see this
> cost with things like NIC I/O since DPDK tends to already have the mbuf
> fully populated before the TX call anyway.]
OK. I agree with stack population.
My question was more on doing implicit doorbell update enq. Is doorbell write
costly in other HW compare to a function call? In our HW, it is just write of
the number of instructions written in a register.
Also, we need to again access the internal PMD memory structure to find
where to write etc if it is a separate function.
>
> >
> > > +
> > > +/**
> > > + * @warning
> > > + * @b EXPERIMENTAL: this API may change without prior notice.
> > > + *
> > > + * Returns the number of operations that have been successful completed.
> > > + *
> > > + * @param dev_id
> > > + * The identifier of the device.
> > > + * @param vq_id
> > > + * The identifier of virt queue.
> > > + * @param nb_cpls
> > > + * The maximum number of completed operations that can be processed.
> > > + * @param[out] cookie
> > > + * The last completed operation's cookie.
> > > + * @param[out] has_error
> > > + * Indicates if there are transfer error.
> > > + *
> > > + * @return
> > > + * The number of operations that successful completed.
> >
> > successfully
> >
> > > + *
> > > + * NOTE: The caller must ensure that the input parameter is valid and the
> > > + * corresponding device supports the operation.
> > > + */
> > > +__rte_experimental
> > > +static inline uint16_t
> > > +rte_dmadev_completed(uint16_t dev_id, uint16_t vq_id, const uint16_t nb_cpls,
> > > + dma_cookie_t *cookie, bool *has_error)
> > > +{
> > > + struct rte_dmadev *dev = &rte_dmadevices[dev_id];
> > > + has_error = false;
> > > + return (*dev->completed)(dev, vq_id, nb_cpls, cookie, has_error);
> >
> > It may be better to have cookie/ring_idx as third argument.
> >
>
> No strong opinions here, but having it as in the code above means all
> input parameters come before all output, which makes sense to me.
+1
>
> > > +}
> > > +
> > > +/**
> > > + * @warning
> > > + * @b EXPERIMENTAL: this API may change without prior notice.
> > > + *
> > > + * Returns the number of operations that failed to complete.
> > > + * NOTE: This API was used when rte_dmadev_completed has_error was set.
> > > + *
> > > + * @param dev_id
> > > + * The identifier of the device.
> > > + * @param vq_id
> > > + * The identifier of virt queue.
> > (> + * @param nb_status
> > > + * Indicates the size of status array.
> > > + * @param[out] status
> > > + * The error code of operations that failed to complete.
> > > + * @param[out] cookie
> > > + * The last failed completed operation's cookie.
> > > + *
> > > + * @return
> > > + * The number of operations that failed to complete.
> > > + *
> > > + * NOTE: The caller must ensure that the input parameter is valid and the
> > > + * corresponding device supports the operation.
> > > + */
> > > +__rte_experimental
> > > +static inline uint16_t
> > > +rte_dmadev_completed_fails(uint16_t dev_id, uint16_t vq_id,
> > > + const uint16_t nb_status, uint32_t *status,
> > > + dma_cookie_t *cookie)
> >
> > IMO, it is better to move cookie/rind_idx at 3.
> > Why it would return any array of errors? since it called after
> > rte_dmadev_completed() has
> > has_error. Is it better to change
> >
> > rte_dmadev_error_status((uint16_t dev_id, uint16_t vq_id, dma_cookie_t
> > *cookie, uint32_t *status)
> >
> > I also think, we may need to set status as bitmask and enumerate all
> > the combination of error codes
> > of all the driver and return string from driver existing rte_flow_error
> >
> > See
> > struct rte_flow_error {
> > enum rte_flow_error_type type; /**< Cause field and error types. */
> > const void *cause; /**< Object responsible for the error. */
> > const char *message; /**< Human-readable error message. */
> > };
> >
>
> I think we need a multi-return value API here, as we may add operations in
> future which have non-error status values to return. The obvious case is
> DMA engines which support "compare" operations. In that case a successful
> compare (as in there were no DMA or HW errors) can return "equal" or
> "not-equal" as statuses. For general "copy" operations, the faster
> completion op can be used to just return successful values (and only call
> this status version on error), while apps using those compare ops or a
> mixture of copy and compare ops, would always use the slower one that
> returns status values for each and every op..
>
> The ioat APIs used 32-bit integer values for this status array so as to
> allow e.g. 16-bits for error code and 16-bits for future status values. For
> most operations there should be a fairly small set of things that can go
> wrong, i.e. bad source address, bad destination address or invalid length.
> Within that we may have a couple of specifics for why an address is bad,
> but even so I don't think we need to start having multiple bit
> combinations.
OK. What is the purpose of errors status? Is it for application printing it or
Does the application need to take any action based on specific error requests?
If the former is scope, then we need to define the standard enum value
for the error right?
ie. uint32_t *status needs to change to enum rte_dma_error or so.
>
> > > +{
> > > + struct rte_dmadev *dev = &rte_dmadevices[dev_id];
> > > + return (*dev->completed_fails)(dev, vq_id, nb_status, status, cookie);
> > > +}
> > > +
> > > +struct rte_dmadev_stats {
> > > + uint64_t enqueue_fail_count;
> > > + /**< Conut of all operations which failed enqueued */
> > > + uint64_t enqueued_count;
> > > + /**< Count of all operations which successful enqueued */
> > > + uint64_t completed_fail_count;
> > > + /**< Count of all operations which failed to complete */
> > > + uint64_t completed_count;
> > > + /**< Count of all operations which successful complete */
> > > +};
> >
> > We need to have capability API to tell which items are
> > updated/supported by the driver.
> >
>
> I also would remove the enqueue fail counts, since they are better counted
> by the app. If a driver reports 20,000 failures we have no way of knowing
> if that is 20,000 unique operations which failed to enqueue or a single
> operation which failed to enqueue 20,000 times but succeeded on attempt
> 20,001.
>
> >
> > > diff --git a/lib/dmadev/rte_dmadev_core.h b/lib/dmadev/rte_dmadev_core.h
> > > new file mode 100644
> > > index 0000000..a3afea2
> > > --- /dev/null
> > > +++ b/lib/dmadev/rte_dmadev_core.h
> > > @@ -0,0 +1,98 @@
> > > +/* SPDX-License-Identifier: BSD-3-Clause
> > > + * Copyright 2021 HiSilicon Limited.
> > > + */
> > > +
> > > +#ifndef _RTE_DMADEV_CORE_H_
> > > +#define _RTE_DMADEV_CORE_H_
> > > +
> > > +/**
> > > + * @file
> > > + *
> > > + * RTE DMA Device internal header.
> > > + *
> > > + * This header contains internal data types. But they are still part of the
> > > + * public API because they are used by inline public functions.
> > > + */
> > > +
> > > +struct rte_dmadev;
> > > +
> > > +typedef dma_cookie_t (*dmadev_copy_t)(struct rte_dmadev *dev, uint16_t vq_id,
> > > + void *src, void *dst,
> > > + uint32_t length, uint64_t flags);
> > > +/**< @internal Function used to enqueue a copy operation. */
> >
> > To avoid namespace conflict(as it is public API) use rte_
> >
> >
> > > +
> > > +/**
> > > + * The data structure associated with each DMA device.
> > > + */
> > > +struct rte_dmadev {
> > > + /**< Enqueue a copy operation onto the DMA device. */
> > > + dmadev_copy_t copy;
> > > + /**< Enqueue a scatter list copy operation onto the DMA device. */
> > > + dmadev_copy_sg_t copy_sg;
> > > + /**< Enqueue a fill operation onto the DMA device. */
> > > + dmadev_fill_t fill;
> > > + /**< Enqueue a scatter list fill operation onto the DMA device. */
> > > + dmadev_fill_sg_t fill_sg;
> > > + /**< Add a fence to force ordering between operations. */
> > > + dmadev_fence_t fence;
> > > + /**< Trigger hardware to begin performing enqueued operations. */
> > > + dmadev_perform_t perform;
> > > + /**< Returns the number of operations that successful completed. */
> > > + dmadev_completed_t completed;
> > > + /**< Returns the number of operations that failed to complete. */
> > > + dmadev_completed_fails_t completed_fails;
> >
> > We need to limit fastpath items in 1 CL
> >
>
> I don't think that is going to be possible. I also would like to see
> numbers to check if we benefit much from having these fastpath ops separate
> from the regular ops.
>
> > > +
> > > + void *dev_private; /**< PMD-specific private data */
> > > + const struct rte_dmadev_ops *dev_ops; /**< Functions exported by PMD */
> > > +
> > > + uint16_t dev_id; /**< Device ID for this instance */
> > > + int socket_id; /**< Socket ID where memory is allocated */
> > > + struct rte_device *device;
> > > + /**< Device info. supplied during device initialization */
> > > + const char *driver_name; /**< Driver info. supplied by probing */
> > > + char name[RTE_DMADEV_NAME_MAX_LEN]; /**< Device name */
> > > +
> > > + RTE_STD_C11
> > > + uint8_t attached : 1; /**< Flag indicating the device is attached */
> > > + uint8_t started : 1; /**< Device state: STARTED(1)/STOPPED(0) */
> >
> > Add a couple of reserved fields for future ABI stability.
> >
> > > +
> > > +} __rte_cache_aligned;
> > > +
> > > +extern struct rte_dmadev rte_dmadevices[];
> > > +
^ permalink raw reply [relevance 0%]
* [dpdk-dev] [PATCH v6 4/7] power: remove thread safety from PMD power API's
2021-07-05 15:21 3% ` [dpdk-dev] [PATCH v6 1/7] power_intrinsics: use callbacks for comparison Anatoly Burakov
@ 2021-07-05 15:21 3% ` Anatoly Burakov
2 siblings, 0 replies; 200+ results
From: Anatoly Burakov @ 2021-07-05 15:21 UTC (permalink / raw)
To: dev, David Hunt; +Cc: ciara.loftus, konstantin.ananyev
Currently, we expect that only one callback can be active at any given
moment, for a particular queue configuration, which is relatively easy
to implement in a thread-safe way. However, we're about to add support
for multiple queues per lcore, which will greatly increase the
possibility of various race conditions.
We could have used something like an RCU for this use case, but absent
of a pressing need for thread safety we'll go the easy way and just
mandate that the API's are to be called when all affected ports are
stopped, and document this limitation. This greatly simplifies the
`rte_power_monitor`-related code.
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
Notes:
v2:
- Add check for stopped queue
- Clarified doc message
- Added release notes
doc/guides/rel_notes/release_21_08.rst | 5 +
lib/power/meson.build | 3 +
lib/power/rte_power_pmd_mgmt.c | 133 ++++++++++---------------
lib/power/rte_power_pmd_mgmt.h | 6 ++
4 files changed, 67 insertions(+), 80 deletions(-)
diff --git a/doc/guides/rel_notes/release_21_08.rst b/doc/guides/rel_notes/release_21_08.rst
index 9d1cfac395..f015c509fc 100644
--- a/doc/guides/rel_notes/release_21_08.rst
+++ b/doc/guides/rel_notes/release_21_08.rst
@@ -88,6 +88,11 @@ API Changes
* eal: the ``rte_power_intrinsics`` API changed to use a callback mechanism.
+* rte_power: The experimental PMD power management API is no longer considered
+ to be thread safe; all Rx queues affected by the API will now need to be
+ stopped before making any changes to the power management scheme.
+
+
ABI Changes
-----------
diff --git a/lib/power/meson.build b/lib/power/meson.build
index c1097d32f1..4f6a242364 100644
--- a/lib/power/meson.build
+++ b/lib/power/meson.build
@@ -21,4 +21,7 @@ headers = files(
'rte_power_pmd_mgmt.h',
'rte_power_guest_channel.h',
)
+if cc.has_argument('-Wno-cast-qual')
+ cflags += '-Wno-cast-qual'
+endif
deps += ['timer', 'ethdev']
diff --git a/lib/power/rte_power_pmd_mgmt.c b/lib/power/rte_power_pmd_mgmt.c
index db03cbf420..9b95cf1794 100644
--- a/lib/power/rte_power_pmd_mgmt.c
+++ b/lib/power/rte_power_pmd_mgmt.c
@@ -40,8 +40,6 @@ struct pmd_queue_cfg {
/**< Callback mode for this queue */
const struct rte_eth_rxtx_callback *cur_cb;
/**< Callback instance */
- volatile bool umwait_in_progress;
- /**< are we currently sleeping? */
uint64_t empty_poll_stats;
/**< Number of empty polls */
} __rte_cache_aligned;
@@ -92,30 +90,11 @@ clb_umwait(uint16_t port_id, uint16_t qidx, struct rte_mbuf **pkts __rte_unused,
struct rte_power_monitor_cond pmc;
uint16_t ret;
- /*
- * we might get a cancellation request while being
- * inside the callback, in which case the wakeup
- * wouldn't work because it would've arrived too early.
- *
- * to get around this, we notify the other thread that
- * we're sleeping, so that it can spin until we're done.
- * unsolicited wakeups are perfectly safe.
- */
- q_conf->umwait_in_progress = true;
-
- rte_atomic_thread_fence(__ATOMIC_SEQ_CST);
-
- /* check if we need to cancel sleep */
- if (q_conf->pwr_mgmt_state == PMD_MGMT_ENABLED) {
- /* use monitoring condition to sleep */
- ret = rte_eth_get_monitor_addr(port_id, qidx,
- &pmc);
- if (ret == 0)
- rte_power_monitor(&pmc, UINT64_MAX);
- }
- q_conf->umwait_in_progress = false;
-
- rte_atomic_thread_fence(__ATOMIC_SEQ_CST);
+ /* use monitoring condition to sleep */
+ ret = rte_eth_get_monitor_addr(port_id, qidx,
+ &pmc);
+ if (ret == 0)
+ rte_power_monitor(&pmc, UINT64_MAX);
}
} else
q_conf->empty_poll_stats = 0;
@@ -177,12 +156,24 @@ clb_scale_freq(uint16_t port_id, uint16_t qidx,
return nb_rx;
}
+static int
+queue_stopped(const uint16_t port_id, const uint16_t queue_id)
+{
+ struct rte_eth_rxq_info qinfo;
+
+ if (rte_eth_rx_queue_info_get(port_id, queue_id, &qinfo) < 0)
+ return -1;
+
+ return qinfo.queue_state == RTE_ETH_QUEUE_STATE_STOPPED;
+}
+
int
rte_power_ethdev_pmgmt_queue_enable(unsigned int lcore_id, uint16_t port_id,
uint16_t queue_id, enum rte_power_pmd_mgmt_type mode)
{
struct pmd_queue_cfg *queue_cfg;
struct rte_eth_dev_info info;
+ rte_rx_callback_fn clb;
int ret;
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
@@ -203,6 +194,14 @@ rte_power_ethdev_pmgmt_queue_enable(unsigned int lcore_id, uint16_t port_id,
goto end;
}
+ /* check if the queue is stopped */
+ ret = queue_stopped(port_id, queue_id);
+ if (ret != 1) {
+ /* error means invalid queue, 0 means queue wasn't stopped */
+ ret = ret < 0 ? -EINVAL : -EBUSY;
+ goto end;
+ }
+
queue_cfg = &port_cfg[port_id][queue_id];
if (queue_cfg->pwr_mgmt_state != PMD_MGMT_DISABLED) {
@@ -232,17 +231,7 @@ rte_power_ethdev_pmgmt_queue_enable(unsigned int lcore_id, uint16_t port_id,
ret = -ENOTSUP;
goto end;
}
- /* initialize data before enabling the callback */
- queue_cfg->empty_poll_stats = 0;
- queue_cfg->cb_mode = mode;
- queue_cfg->umwait_in_progress = false;
- queue_cfg->pwr_mgmt_state = PMD_MGMT_ENABLED;
-
- /* ensure we update our state before callback starts */
- rte_atomic_thread_fence(__ATOMIC_SEQ_CST);
-
- queue_cfg->cur_cb = rte_eth_add_rx_callback(port_id, queue_id,
- clb_umwait, NULL);
+ clb = clb_umwait;
break;
}
case RTE_POWER_MGMT_TYPE_SCALE:
@@ -269,16 +258,7 @@ rte_power_ethdev_pmgmt_queue_enable(unsigned int lcore_id, uint16_t port_id,
ret = -ENOTSUP;
goto end;
}
- /* initialize data before enabling the callback */
- queue_cfg->empty_poll_stats = 0;
- queue_cfg->cb_mode = mode;
- queue_cfg->pwr_mgmt_state = PMD_MGMT_ENABLED;
-
- /* this is not necessary here, but do it anyway */
- rte_atomic_thread_fence(__ATOMIC_SEQ_CST);
-
- queue_cfg->cur_cb = rte_eth_add_rx_callback(port_id,
- queue_id, clb_scale_freq, NULL);
+ clb = clb_scale_freq;
break;
}
case RTE_POWER_MGMT_TYPE_PAUSE:
@@ -286,18 +266,21 @@ rte_power_ethdev_pmgmt_queue_enable(unsigned int lcore_id, uint16_t port_id,
if (global_data.tsc_per_us == 0)
calc_tsc();
- /* initialize data before enabling the callback */
- queue_cfg->empty_poll_stats = 0;
- queue_cfg->cb_mode = mode;
- queue_cfg->pwr_mgmt_state = PMD_MGMT_ENABLED;
-
- /* this is not necessary here, but do it anyway */
- rte_atomic_thread_fence(__ATOMIC_SEQ_CST);
-
- queue_cfg->cur_cb = rte_eth_add_rx_callback(port_id, queue_id,
- clb_pause, NULL);
+ clb = clb_pause;
break;
+ default:
+ RTE_LOG(DEBUG, POWER, "Invalid power management type\n");
+ ret = -EINVAL;
+ goto end;
}
+
+ /* initialize data before enabling the callback */
+ queue_cfg->empty_poll_stats = 0;
+ queue_cfg->cb_mode = mode;
+ queue_cfg->pwr_mgmt_state = PMD_MGMT_ENABLED;
+ queue_cfg->cur_cb = rte_eth_add_rx_callback(port_id, queue_id,
+ clb, NULL);
+
ret = 0;
end:
return ret;
@@ -308,12 +291,20 @@ rte_power_ethdev_pmgmt_queue_disable(unsigned int lcore_id,
uint16_t port_id, uint16_t queue_id)
{
struct pmd_queue_cfg *queue_cfg;
+ int ret;
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
if (lcore_id >= RTE_MAX_LCORE || queue_id >= RTE_MAX_QUEUES_PER_PORT)
return -EINVAL;
+ /* check if the queue is stopped */
+ ret = queue_stopped(port_id, queue_id);
+ if (ret != 1) {
+ /* error means invalid queue, 0 means queue wasn't stopped */
+ return ret < 0 ? -EINVAL : -EBUSY;
+ }
+
/* no need to check queue id as wrong queue id would not be enabled */
queue_cfg = &port_cfg[port_id][queue_id];
@@ -323,27 +314,8 @@ rte_power_ethdev_pmgmt_queue_disable(unsigned int lcore_id,
/* stop any callbacks from progressing */
queue_cfg->pwr_mgmt_state = PMD_MGMT_DISABLED;
- /* ensure we update our state before continuing */
- rte_atomic_thread_fence(__ATOMIC_SEQ_CST);
-
switch (queue_cfg->cb_mode) {
- case RTE_POWER_MGMT_TYPE_MONITOR:
- {
- bool exit = false;
- do {
- /*
- * we may request cancellation while the other thread
- * has just entered the callback but hasn't started
- * sleeping yet, so keep waking it up until we know it's
- * done sleeping.
- */
- if (queue_cfg->umwait_in_progress)
- rte_power_monitor_wakeup(lcore_id);
- else
- exit = true;
- } while (!exit);
- }
- /* fall-through */
+ case RTE_POWER_MGMT_TYPE_MONITOR: /* fall-through */
case RTE_POWER_MGMT_TYPE_PAUSE:
rte_eth_remove_rx_callback(port_id, queue_id,
queue_cfg->cur_cb);
@@ -356,10 +328,11 @@ rte_power_ethdev_pmgmt_queue_disable(unsigned int lcore_id,
break;
}
/*
- * we don't free the RX callback here because it is unsafe to do so
- * unless we know for a fact that all data plane threads have stopped.
+ * the API doc mandates that the user stops all processing on affected
+ * ports before calling any of these API's, so we can assume that the
+ * callbacks can be freed. we're intentionally casting away const-ness.
*/
- queue_cfg->cur_cb = NULL;
+ rte_free((void *)queue_cfg->cur_cb);
return 0;
}
diff --git a/lib/power/rte_power_pmd_mgmt.h b/lib/power/rte_power_pmd_mgmt.h
index 7a0ac24625..444e7b8a66 100644
--- a/lib/power/rte_power_pmd_mgmt.h
+++ b/lib/power/rte_power_pmd_mgmt.h
@@ -43,6 +43,9 @@ enum rte_power_pmd_mgmt_type {
*
* @note This function is not thread-safe.
*
+ * @warning This function must be called when all affected Ethernet queues are
+ * stopped and no Rx/Tx is in progress!
+ *
* @param lcore_id
* The lcore the Rx queue will be polled from.
* @param port_id
@@ -69,6 +72,9 @@ rte_power_ethdev_pmgmt_queue_enable(unsigned int lcore_id,
*
* @note This function is not thread-safe.
*
+ * @warning This function must be called when all affected Ethernet queues are
+ * stopped and no Rx/Tx is in progress!
+ *
* @param lcore_id
* The lcore the Rx queue is polled from.
* @param port_id
--
2.25.1
^ permalink raw reply [relevance 3%]
* [dpdk-dev] [PATCH v6 1/7] power_intrinsics: use callbacks for comparison
@ 2021-07-05 15:21 3% ` Anatoly Burakov
2021-07-05 15:21 3% ` [dpdk-dev] [PATCH v6 4/7] power: remove thread safety from PMD power API's Anatoly Burakov
2 siblings, 0 replies; 200+ results
From: Anatoly Burakov @ 2021-07-05 15:21 UTC (permalink / raw)
To: dev, Timothy McDaniel, Beilei Xing, Jingjing Wu, Qiming Yang,
Qi Zhang, Haiyue Wang, Matan Azrad, Shahaf Shuler,
Viacheslav Ovsiienko, Bruce Richardson, Konstantin Ananyev
Cc: david.hunt, ciara.loftus
Previously, the semantics of power monitor were such that we were
checking current value against the expected value, and if they matched,
then the sleep was aborted. This is somewhat inflexible, because it only
allowed us to check for a specific value in a specific way.
This commit replaces the comparison with a user callback mechanism, so
that any PMD (or other code) using `rte_power_monitor()` can define
their own comparison semantics and decision making on how to detect the
need to abort the entering of power optimized state.
Existing implementations are adjusted to follow the new semantics.
Suggested-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
---
Notes:
v4:
- Return error if callback is set to NULL
- Replace raw number with a macro in monitor condition opaque data
v2:
- Use callback mechanism for more flexibility
- Address feedback from Konstantin
doc/guides/rel_notes/release_21_08.rst | 1 +
drivers/event/dlb2/dlb2.c | 17 ++++++++--
drivers/net/i40e/i40e_rxtx.c | 20 +++++++----
drivers/net/iavf/iavf_rxtx.c | 20 +++++++----
drivers/net/ice/ice_rxtx.c | 20 +++++++----
drivers/net/ixgbe/ixgbe_rxtx.c | 20 +++++++----
drivers/net/mlx5/mlx5_rx.c | 17 ++++++++--
.../include/generic/rte_power_intrinsics.h | 33 +++++++++++++++----
lib/eal/x86/rte_power_intrinsics.c | 17 +++++-----
9 files changed, 121 insertions(+), 44 deletions(-)
diff --git a/doc/guides/rel_notes/release_21_08.rst b/doc/guides/rel_notes/release_21_08.rst
index a6ecfdf3ce..c84ac280f5 100644
--- a/doc/guides/rel_notes/release_21_08.rst
+++ b/doc/guides/rel_notes/release_21_08.rst
@@ -84,6 +84,7 @@ API Changes
Also, make sure to start the actual text at the margin.
=======================================================
+* eal: the ``rte_power_intrinsics`` API changed to use a callback mechanism.
ABI Changes
-----------
diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c
index eca183753f..252bbd8d5e 100644
--- a/drivers/event/dlb2/dlb2.c
+++ b/drivers/event/dlb2/dlb2.c
@@ -3154,6 +3154,16 @@ dlb2_port_credits_inc(struct dlb2_port *qm_port, int num)
}
}
+#define CLB_MASK_IDX 0
+#define CLB_VAL_IDX 1
+static int
+dlb2_monitor_callback(const uint64_t val,
+ const uint64_t opaque[RTE_POWER_MONITOR_OPAQUE_SZ])
+{
+ /* abort if the value matches */
+ return (val & opaque[CLB_MASK_IDX]) == opaque[CLB_VAL_IDX] ? -1 : 0;
+}
+
static inline int
dlb2_dequeue_wait(struct dlb2_eventdev *dlb2,
struct dlb2_eventdev_port *ev_port,
@@ -3194,8 +3204,11 @@ dlb2_dequeue_wait(struct dlb2_eventdev *dlb2,
expected_value = 0;
pmc.addr = monitor_addr;
- pmc.val = expected_value;
- pmc.mask = qe_mask.raw_qe[1];
+ /* store expected value and comparison mask in opaque data */
+ pmc.opaque[CLB_VAL_IDX] = expected_value;
+ pmc.opaque[CLB_MASK_IDX] = qe_mask.raw_qe[1];
+ /* set up callback */
+ pmc.fn = dlb2_monitor_callback;
pmc.size = sizeof(uint64_t);
rte_power_monitor(&pmc, timeout + start_ticks);
diff --git a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c
index 6c58decece..081682f88b 100644
--- a/drivers/net/i40e/i40e_rxtx.c
+++ b/drivers/net/i40e/i40e_rxtx.c
@@ -81,6 +81,18 @@
#define I40E_TX_OFFLOAD_SIMPLE_NOTSUP_MASK \
(PKT_TX_OFFLOAD_MASK ^ I40E_TX_OFFLOAD_SIMPLE_SUP_MASK)
+static int
+i40e_monitor_callback(const uint64_t value,
+ const uint64_t arg[RTE_POWER_MONITOR_OPAQUE_SZ] __rte_unused)
+{
+ const uint64_t m = rte_cpu_to_le_64(1 << I40E_RX_DESC_STATUS_DD_SHIFT);
+ /*
+ * we expect the DD bit to be set to 1 if this descriptor was already
+ * written to.
+ */
+ return (value & m) == m ? -1 : 0;
+}
+
int
i40e_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
{
@@ -93,12 +105,8 @@ i40e_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
/* watch for changes in status bit */
pmc->addr = &rxdp->wb.qword1.status_error_len;
- /*
- * we expect the DD bit to be set to 1 if this descriptor was already
- * written to.
- */
- pmc->val = rte_cpu_to_le_64(1 << I40E_RX_DESC_STATUS_DD_SHIFT);
- pmc->mask = rte_cpu_to_le_64(1 << I40E_RX_DESC_STATUS_DD_SHIFT);
+ /* comparison callback */
+ pmc->fn = i40e_monitor_callback;
/* registers are 64-bit */
pmc->size = sizeof(uint64_t);
diff --git a/drivers/net/iavf/iavf_rxtx.c b/drivers/net/iavf/iavf_rxtx.c
index 0361af0d85..7ed196ec22 100644
--- a/drivers/net/iavf/iavf_rxtx.c
+++ b/drivers/net/iavf/iavf_rxtx.c
@@ -57,6 +57,18 @@ iavf_proto_xtr_type_to_rxdid(uint8_t flex_type)
rxdid_map[flex_type] : IAVF_RXDID_COMMS_OVS_1;
}
+static int
+iavf_monitor_callback(const uint64_t value,
+ const uint64_t arg[RTE_POWER_MONITOR_OPAQUE_SZ] __rte_unused)
+{
+ const uint64_t m = rte_cpu_to_le_64(1 << IAVF_RX_DESC_STATUS_DD_SHIFT);
+ /*
+ * we expect the DD bit to be set to 1 if this descriptor was already
+ * written to.
+ */
+ return (value & m) == m ? -1 : 0;
+}
+
int
iavf_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
{
@@ -69,12 +81,8 @@ iavf_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
/* watch for changes in status bit */
pmc->addr = &rxdp->wb.qword1.status_error_len;
- /*
- * we expect the DD bit to be set to 1 if this descriptor was already
- * written to.
- */
- pmc->val = rte_cpu_to_le_64(1 << IAVF_RX_DESC_STATUS_DD_SHIFT);
- pmc->mask = rte_cpu_to_le_64(1 << IAVF_RX_DESC_STATUS_DD_SHIFT);
+ /* comparison callback */
+ pmc->fn = iavf_monitor_callback;
/* registers are 64-bit */
pmc->size = sizeof(uint64_t);
diff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c
index fc9bb5a3e7..d12437d19d 100644
--- a/drivers/net/ice/ice_rxtx.c
+++ b/drivers/net/ice/ice_rxtx.c
@@ -27,6 +27,18 @@ uint64_t rte_net_ice_dynflag_proto_xtr_ipv6_flow_mask;
uint64_t rte_net_ice_dynflag_proto_xtr_tcp_mask;
uint64_t rte_net_ice_dynflag_proto_xtr_ip_offset_mask;
+static int
+ice_monitor_callback(const uint64_t value,
+ const uint64_t arg[RTE_POWER_MONITOR_OPAQUE_SZ] __rte_unused)
+{
+ const uint64_t m = rte_cpu_to_le_16(1 << ICE_RX_FLEX_DESC_STATUS0_DD_S);
+ /*
+ * we expect the DD bit to be set to 1 if this descriptor was already
+ * written to.
+ */
+ return (value & m) == m ? -1 : 0;
+}
+
int
ice_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
{
@@ -39,12 +51,8 @@ ice_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
/* watch for changes in status bit */
pmc->addr = &rxdp->wb.status_error0;
- /*
- * we expect the DD bit to be set to 1 if this descriptor was already
- * written to.
- */
- pmc->val = rte_cpu_to_le_16(1 << ICE_RX_FLEX_DESC_STATUS0_DD_S);
- pmc->mask = rte_cpu_to_le_16(1 << ICE_RX_FLEX_DESC_STATUS0_DD_S);
+ /* comparison callback */
+ pmc->fn = ice_monitor_callback;
/* register is 16-bit */
pmc->size = sizeof(uint16_t);
diff --git a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers/net/ixgbe/ixgbe_rxtx.c
index d69f36e977..c814a28cb4 100644
--- a/drivers/net/ixgbe/ixgbe_rxtx.c
+++ b/drivers/net/ixgbe/ixgbe_rxtx.c
@@ -1369,6 +1369,18 @@ const uint32_t
RTE_PTYPE_INNER_L3_IPV4_EXT | RTE_PTYPE_INNER_L4_UDP,
};
+static int
+ixgbe_monitor_callback(const uint64_t value,
+ const uint64_t arg[RTE_POWER_MONITOR_OPAQUE_SZ] __rte_unused)
+{
+ const uint64_t m = rte_cpu_to_le_32(IXGBE_RXDADV_STAT_DD);
+ /*
+ * we expect the DD bit to be set to 1 if this descriptor was already
+ * written to.
+ */
+ return (value & m) == m ? -1 : 0;
+}
+
int
ixgbe_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
{
@@ -1381,12 +1393,8 @@ ixgbe_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
/* watch for changes in status bit */
pmc->addr = &rxdp->wb.upper.status_error;
- /*
- * we expect the DD bit to be set to 1 if this descriptor was already
- * written to.
- */
- pmc->val = rte_cpu_to_le_32(IXGBE_RXDADV_STAT_DD);
- pmc->mask = rte_cpu_to_le_32(IXGBE_RXDADV_STAT_DD);
+ /* comparison callback */
+ pmc->fn = ixgbe_monitor_callback;
/* the registers are 32-bit */
pmc->size = sizeof(uint32_t);
diff --git a/drivers/net/mlx5/mlx5_rx.c b/drivers/net/mlx5/mlx5_rx.c
index 777a1d6e45..17370b77dc 100644
--- a/drivers/net/mlx5/mlx5_rx.c
+++ b/drivers/net/mlx5/mlx5_rx.c
@@ -269,6 +269,18 @@ mlx5_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id)
return rx_queue_count(rxq);
}
+#define CLB_VAL_IDX 0
+#define CLB_MSK_IDX 1
+static int
+mlx_monitor_callback(const uint64_t value,
+ const uint64_t opaque[RTE_POWER_MONITOR_OPAQUE_SZ])
+{
+ const uint64_t m = opaque[CLB_MSK_IDX];
+ const uint64_t v = opaque[CLB_VAL_IDX];
+
+ return (value & m) == v ? -1 : 0;
+}
+
int mlx5_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
{
struct mlx5_rxq_data *rxq = rx_queue;
@@ -282,8 +294,9 @@ int mlx5_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
return -rte_errno;
}
pmc->addr = &cqe->op_own;
- pmc->val = !!idx;
- pmc->mask = MLX5_CQE_OWNER_MASK;
+ pmc->opaque[CLB_VAL_IDX] = !!idx;
+ pmc->opaque[CLB_MSK_IDX] = MLX5_CQE_OWNER_MASK;
+ pmc->fn = mlx_monitor_callback;
pmc->size = sizeof(uint8_t);
return 0;
}
diff --git a/lib/eal/include/generic/rte_power_intrinsics.h b/lib/eal/include/generic/rte_power_intrinsics.h
index dddca3d41c..c9aa52a86d 100644
--- a/lib/eal/include/generic/rte_power_intrinsics.h
+++ b/lib/eal/include/generic/rte_power_intrinsics.h
@@ -18,19 +18,38 @@
* which are architecture-dependent.
*/
+/** Size of the opaque data in monitor condition */
+#define RTE_POWER_MONITOR_OPAQUE_SZ 4
+
+/**
+ * Callback definition for monitoring conditions. Callbacks with this signature
+ * will be used by `rte_power_monitor()` to check if the entering of power
+ * optimized state should be aborted.
+ *
+ * @param val
+ * The value read from memory.
+ * @param opaque
+ * Callback-specific data.
+ *
+ * @return
+ * 0 if entering of power optimized state should proceed
+ * -1 if entering of power optimized state should be aborted
+ */
+typedef int (*rte_power_monitor_clb_t)(const uint64_t val,
+ const uint64_t opaque[RTE_POWER_MONITOR_OPAQUE_SZ]);
struct rte_power_monitor_cond {
volatile void *addr; /**< Address to monitor for changes */
- uint64_t val; /**< If the `mask` is non-zero, location pointed
- * to by `addr` will be read and compared
- * against this value.
- */
- uint64_t mask; /**< 64-bit mask to extract value read from `addr` */
- uint8_t size; /**< Data size (in bytes) that will be used to compare
- * expected value (`val`) with data read from the
+ uint8_t size; /**< Data size (in bytes) that will be read from the
* monitored memory location (`addr`). Can be 1, 2,
* 4, or 8. Supplying any other value will result in
* an error.
*/
+ rte_power_monitor_clb_t fn; /**< Callback to be used to check if
+ * entering power optimized state should
+ * be aborted.
+ */
+ uint64_t opaque[RTE_POWER_MONITOR_OPAQUE_SZ];
+ /**< Callback-specific data */
};
/**
diff --git a/lib/eal/x86/rte_power_intrinsics.c b/lib/eal/x86/rte_power_intrinsics.c
index 39ea9fdecd..66fea28897 100644
--- a/lib/eal/x86/rte_power_intrinsics.c
+++ b/lib/eal/x86/rte_power_intrinsics.c
@@ -76,6 +76,7 @@ rte_power_monitor(const struct rte_power_monitor_cond *pmc,
const uint32_t tsc_h = (uint32_t)(tsc_timestamp >> 32);
const unsigned int lcore_id = rte_lcore_id();
struct power_wait_status *s;
+ uint64_t cur_value;
/* prevent user from running this instruction if it's not supported */
if (!wait_supported)
@@ -91,6 +92,9 @@ rte_power_monitor(const struct rte_power_monitor_cond *pmc,
if (__check_val_size(pmc->size) < 0)
return -EINVAL;
+ if (pmc->fn == NULL)
+ return -EINVAL;
+
s = &wait_status[lcore_id];
/* update sleep address */
@@ -110,16 +114,11 @@ rte_power_monitor(const struct rte_power_monitor_cond *pmc,
/* now that we've put this address into monitor, we can unlock */
rte_spinlock_unlock(&s->lock);
- /* if we have a comparison mask, we might not need to sleep at all */
- if (pmc->mask) {
- const uint64_t cur_value = __get_umwait_val(
- pmc->addr, pmc->size);
- const uint64_t masked = cur_value & pmc->mask;
+ cur_value = __get_umwait_val(pmc->addr, pmc->size);
- /* if the masked value is already matching, abort */
- if (masked == pmc->val)
- goto end;
- }
+ /* check if callback indicates we should abort */
+ if (pmc->fn(cur_value, pmc->opaque) != 0)
+ goto end;
/* execute UMWAIT */
asm volatile(".byte 0xf2, 0x0f, 0xae, 0xf7;"
--
2.25.1
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [PATCH v8 2/2] bus/auxiliary: introduce auxiliary bus
2021-07-05 14:57 0% ` Thomas Monjalon
@ 2021-07-05 15:06 0% ` Andrew Rybchenko
0 siblings, 0 replies; 200+ results
From: Andrew Rybchenko @ 2021-07-05 15:06 UTC (permalink / raw)
To: Thomas Monjalon, Xueming(Steven) Li, techboard
Cc: dev, Wang Haiyue, Kinsella Ray, Parav Pandit, david.marchand
On 7/5/21 5:57 PM, Thomas Monjalon wrote:
> 05/07/2021 11:35, Andrew Rybchenko:
>> On 7/5/21 12:30 PM, Xueming(Steven) Li wrote:
>>> From: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
>>>> I still don't understand if we really need to make the API a part of stable API/ABI in the future. Can it be internal?
>>>
>>> There was some discussion on this with Thomas in earlier version.
>>> Users might want to register/unregister their own PMD driver,
>>> Is this a valid scenario?
>>
>> Yes, it is true, but should DPDK care that much about
>> out-of-tree drivers. I'm just asking since don't know
>> techboard position on it.
>
> I think there is a consensus to allow out-of-tree drivers
> without any compatibility commitment.
>
> Some other bus drivers are exporting some API like in this patch.
> We could discuss again in techboard what to make internal.
> If it is decided to hide buses API, we could change all bus drivers
> later in DPDK 21.11.
OK, thanks.
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH v8 2/2] bus/auxiliary: introduce auxiliary bus
2021-07-05 9:35 0% ` Andrew Rybchenko
@ 2021-07-05 14:57 0% ` Thomas Monjalon
2021-07-05 15:06 0% ` Andrew Rybchenko
0 siblings, 1 reply; 200+ results
From: Thomas Monjalon @ 2021-07-05 14:57 UTC (permalink / raw)
To: Xueming(Steven) Li, Andrew Rybchenko, techboard
Cc: dev, Wang Haiyue, Kinsella Ray, Parav Pandit, david.marchand
05/07/2021 11:35, Andrew Rybchenko:
> On 7/5/21 12:30 PM, Xueming(Steven) Li wrote:
> > From: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
> >> I still don't understand if we really need to make the API a part of stable API/ABI in the future. Can it be internal?
> >
> > There was some discussion on this with Thomas in earlier version.
> > Users might want to register/unregister their own PMD driver,
> > Is this a valid scenario?
>
> Yes, it is true, but should DPDK care that much about
> out-of-tree drivers. I'm just asking since don't know
> techboard position on it.
I think there is a consensus to allow out-of-tree drivers
without any compatibility commitment.
Some other bus drivers are exporting some API like in this patch.
We could discuss again in techboard what to make internal.
If it is decided to hide buses API, we could change all bus drivers
later in DPDK 21.11.
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH 21.11] telemetry: remove experimental tags from APIs
@ 2021-07-05 10:58 3% ` Bruce Richardson
0 siblings, 0 replies; 200+ results
From: Bruce Richardson @ 2021-07-05 10:58 UTC (permalink / raw)
To: Power, Ciara; +Cc: dev, Ray Kinsella
On Mon, Jul 05, 2021 at 11:09:38AM +0100, Power, Ciara wrote:
>
>
> >-----Original Message-----
> >From: Richardson, Bruce <bruce.richardson@intel.com>
> >Sent: Friday 2 July 2021 16:23
> >To: dev@dpdk.org
> >Cc: Ray Kinsella <mdr@ashroe.eu>; Power, Ciara <ciara.power@intel.com>;
> >Richardson, Bruce <bruce.richardson@intel.com>
> >Subject: [PATCH 21.11] telemetry: remove experimental tags from APIs
> >
> >The telemetry APIs have been present and unchanged for >1 year now, so
> >remove experimental tag from them.
> >
> >Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
> >---
> > lib/telemetry/rte_telemetry.h | 18 ------------------
> > lib/telemetry/version.map | 2 +-
> > 2 files changed, 1 insertion(+), 19 deletions(-)
> >
> <snip>
>
> Hi Bruce,
>
> +1 for this change.
>
> I think there are some experimental tags missing from this patch - the legacy telemetry functions that are in "metrics/rte_metrics_telemetry.h" currently have the tags too.
I'm not sure about making those part of the stable ABI.
> Also, there is a reference to the library being experimental in the Telemetry User Guide doc.
>
I missed checking the "howto" doc on telemetry, yes. I'll include that in a
v2.
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [PATCH] dmadev: introduce DMA device library
2021-07-04 9:30 3% ` Jerin Jacob
@ 2021-07-05 10:52 0% ` Bruce Richardson
2021-07-05 15:55 0% ` Jerin Jacob
0 siblings, 1 reply; 200+ results
From: Bruce Richardson @ 2021-07-05 10:52 UTC (permalink / raw)
To: Jerin Jacob
Cc: Chengwen Feng, Thomas Monjalon, Ferruh Yigit, Jerin Jacob,
dpdk-dev, Morten Brørup, Nipun Gupta, Hemant Agrawal,
Maxime Coquelin, Honnappa Nagarahalli, David Marchand,
Satananda Burla, Prasun Kapoor, Ananyev, Konstantin, liangma,
Radha Mohan Chintakuntla
On Sun, Jul 04, 2021 at 03:00:30PM +0530, Jerin Jacob wrote:
> On Fri, Jul 2, 2021 at 6:51 PM Chengwen Feng <fengchengwen@huawei.com> wrote:
> >
> > This patch introduces 'dmadevice' which is a generic type of DMA
> > device.
> >
> > The APIs of dmadev library exposes some generic operations which can
> > enable configuration and I/O with the DMA devices.
> >
> > Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
>
> Thanks for v1.
>
> I would suggest finalizing lib/dmadev/rte_dmadev.h before doing the
> implementation so that you don't need
> to waste time on rewoking the implementation.
>
I actually like having the .c file available too. Before we lock down the
.h file and the API, I want to verify the performance of our drivers with
the implementation, and having a working .c file is obviously necessary for
that. So I appreciate having it as part of the RFC.
> Comments inline.
>
> > ---
<snip>
> > + *
> > + * The DMA framework is built on the following abstraction model:
> > + *
> > + * ------------ ------------
> > + * |virt-queue| |virt-queue|
> > + * ------------ ------------
> > + * \ /
> > + * \ /
> > + * \ /
> > + * ------------ ------------
> > + * | HW-queue | | HW-queue |
> > + * ------------ ------------
> > + * \ /
> > + * \ /
> > + * \ /
> > + * ----------
> > + * | dmadev |
> > + * ----------
>
> Continuing the discussion with @Morten Brørup , I think, we need to
> finalize the model.
>
+1 and the terminology with regards to queues and channels. With our ioat
hardware, each HW queue was called a channel for instance.
> > + * a) The DMA operation request must be submitted to the virt queue, virt
> > + * queues must be created based on HW queues, the DMA device could have
> > + * multiple HW queues.
> > + * b) The virt queues on the same HW-queue could represent different contexts,
> > + * e.g. user could create virt-queue-0 on HW-queue-0 for mem-to-mem
> > + * transfer scenario, and create virt-queue-1 on the same HW-queue for
> > + * mem-to-dev transfer scenario.
> > + * NOTE: user could also create multiple virt queues for mem-to-mem transfer
> > + * scenario as long as the corresponding driver supports.
> > + *
> > + * The control plane APIs include configure/queue_setup/queue_release/start/
> > + * stop/reset/close, in order to start device work, the call sequence must be
> > + * as follows:
> > + * - rte_dmadev_configure()
> > + * - rte_dmadev_queue_setup()
> > + * - rte_dmadev_start()
>
> Please add reconfigure behaviour etc, Please check the
> lib/regexdev/rte_regexdev.h
> introduction. I have added similar ones so you could reuse as much as possible.
>
>
> > + * The dataplane APIs include two parts:
> > + * a) The first part is the submission of operation requests:
> > + * - rte_dmadev_copy()
> > + * - rte_dmadev_copy_sg() - scatter-gather form of copy
> > + * - rte_dmadev_fill()
> > + * - rte_dmadev_fill_sg() - scatter-gather form of fill
> > + * - rte_dmadev_fence() - add a fence force ordering between operations
> > + * - rte_dmadev_perform() - issue doorbell to hardware
> > + * These APIs could work with different virt queues which have different
> > + * contexts.
> > + * The first four APIs are used to submit the operation request to the virt
> > + * queue, if the submission is successful, a cookie (as type
> > + * 'dma_cookie_t') is returned, otherwise a negative number is returned.
> > + * b) The second part is to obtain the result of requests:
> > + * - rte_dmadev_completed()
> > + * - return the number of operation requests completed successfully.
> > + * - rte_dmadev_completed_fails()
> > + * - return the number of operation requests failed to complete.
> > + *
> > + * The misc APIs include info_get/queue_info_get/stats/xstats/selftest, provide
> > + * information query and self-test capabilities.
> > + *
> > + * About the dataplane APIs MT-safe, there are two dimensions:
> > + * a) For one virt queue, the submit/completion API could be MT-safe,
> > + * e.g. one thread do submit operation, another thread do completion
> > + * operation.
> > + * If driver support it, then declare RTE_DMA_DEV_CAPA_MT_VQ.
> > + * If driver don't support it, it's up to the application to guarantee
> > + * MT-safe.
> > + * b) For multiple virt queues on the same HW queue, e.g. one thread do
> > + * operation on virt-queue-0, another thread do operation on virt-queue-1.
> > + * If driver support it, then declare RTE_DMA_DEV_CAPA_MT_MVQ.
> > + * If driver don't support it, it's up to the application to guarantee
> > + * MT-safe.
>
> From an application PoV it may not be good to write portable
> applications. Please check
> latest thread with @Morten Brørup
>
> > + */
> > +
> > +#ifdef __cplusplus
> > +extern "C" {
> > +#endif
> > +
> > +#include <rte_common.h>
> > +#include <rte_memory.h>
> > +#include <rte_errno.h>
> > +#include <rte_compat.h>
>
> Sort in alphabetical order.
>
> > +
> > +/**
> > + * dma_cookie_t - an opaque DMA cookie
>
> Since we are defining the behaviour is not opaque any more.
> I think, it is better to call ring_idx or so.
>
+1 for ring index. We don't need a separate type for it though, just
document the index as an unsigned return value.
>
> > +#define RTE_DMA_DEV_CAPA_MT_MVQ (1ull << 11) /**< Support MT-safe of multiple virt queues */
>
> Please lot of @see for all symbols where it is being used. So that one
> can understand the full scope of
> symbols. See below example.
>
> #define RTE_REGEXDEV_CAPA_RUNTIME_COMPILATION_F (1ULL << 0)
> /**< RegEx device does support compiling the rules at runtime unlike
> * loading only the pre-built rule database using
> * struct rte_regexdev_config::rule_db in rte_regexdev_configure()
> *
> * @see struct rte_regexdev_config::rule_db, rte_regexdev_configure()
> * @see struct rte_regexdev_info::regexdev_capa
> */
>
> > + *
> > + * If dma_cookie_t is >=0 it's a DMA operation request cookie, <0 it's a error
> > + * code.
> > + * When using cookies, comply with the following rules:
> > + * a) Cookies for each virtual queue are independent.
> > + * b) For a virt queue, the cookie are monotonically incremented, when it reach
> > + * the INT_MAX, it wraps back to zero.
I disagree with the INT_MAX (or INT32_MAX) value here. If we use that
value, it means that we cannot use implicit wrap-around inside the CPU and
have to check for the INT_MAX value. Better to:
1. Specify that it wraps at UINT16_MAX which allows us to just use a
uint16_t internally and wrap-around automatically, or:
2. Specify that it wraps at a power-of-2 value >= UINT16_MAX, giving
drivers the flexibility at what value to wrap around.
> > + * c) The initial cookie of a virt queue is zero, after the device is stopped or
> > + * reset, the virt queue's cookie needs to be reset to zero.
> > + * Example:
> > + * step-1: start one dmadev
> > + * step-2: enqueue a copy operation, the cookie return is 0
> > + * step-3: enqueue a copy operation again, the cookie return is 1
> > + * ...
> > + * step-101: stop the dmadev
> > + * step-102: start the dmadev
> > + * step-103: enqueue a copy operation, the cookie return is 0
> > + * ...
> > + */
>
> Good explanation.
>
> > +typedef int32_t dma_cookie_t;
>
As I mentioned before, I'd just remove this, and use regular int types,
with "ring_idx" as the name.
>
> > +
> > +/**
> > + * dma_scatterlist - can hold scatter DMA operation request
> > + */
> > +struct dma_scatterlist {
>
> I prefer to change scatterlist -> sg
> i.e rte_dma_sg
>
> > + void *src;
> > + void *dst;
> > + uint32_t length;
> > +};
> > +
>
> > +
> > +/**
> > + * A structure used to retrieve the contextual information of
> > + * an DMA device
> > + */
> > +struct rte_dmadev_info {
> > + /**
> > + * Fields filled by framewok
>
> typo.
>
> > + */
> > + struct rte_device *device; /**< Generic Device information */
> > + const char *driver_name; /**< Device driver name */
> > + int socket_id; /**< Socket ID where memory is allocated */
> > +
> > + /**
> > + * Specification fields filled by driver
> > + */
> > + uint64_t dev_capa; /**< Device capabilities (RTE_DMA_DEV_CAPA_) */
> > + uint16_t max_hw_queues; /**< Maximum number of HW queues. */
> > + uint16_t max_vqs_per_hw_queue;
> > + /**< Maximum number of virt queues to allocate per HW queue */
> > + uint16_t max_desc;
> > + /**< Maximum allowed number of virt queue descriptors */
> > + uint16_t min_desc;
> > + /**< Minimum allowed number of virt queue descriptors */
>
> Please add max_nb_segs. i.e maximum number of segments supported.
>
> > +
> > + /**
> > + * Status fields filled by driver
> > + */
> > + uint16_t nb_hw_queues; /**< Number of HW queues configured */
> > + uint16_t nb_vqs; /**< Number of virt queues configured */
> > +};
> > + i
> > +
> > +/**
> > + * dma_address_type
> > + */
> > +enum dma_address_type {
> > + DMA_ADDRESS_TYPE_IOVA, /**< Use IOVA as dma address */
> > + DMA_ADDRESS_TYPE_VA, /**< Use VA as dma address */
> > +};
> > +
> > +/**
> > + * A structure used to configure a DMA device.
> > + */
> > +struct rte_dmadev_conf {
> > + enum dma_address_type addr_type; /**< Address type to used */
>
> I think, there are 3 kinds of limitations/capabilities.
>
> When the system is configured as IOVA as VA
> 1) Device supports any VA address like memory from rte_malloc(),
> rte_memzone(), malloc, stack memory
> 2) Device support only VA address from rte_malloc(), rte_memzone() i.e
> memory backed by hugepage and added to DMA map.
>
> When the system is configured as IOVA as PA
> 1) Devices support only PA addresses .
>
> IMO, Above needs to be advertised as capability and application needs
> to align with that
> and I dont think application requests the driver to work in any of the modes.
>
>
I don't think we need this level of detail for addressing capabilities.
Unless I'm missing something, the hardware should behave exactly as other
hardware does taking in iova's. If the user wants to check whether virtual
addresses to pinned memory can be used directly, the user can call
"rte_eal_iova_mode". We can't have a situation where some hardware uses one
type of addresses and another hardware the other.
Therefore, the only additional addressing capability we should need to
report is that the hardware can use SVM/SVA and use virtual addresses not
in hugepage memory.
>
> > + uint16_t nb_hw_queues; /**< Number of HW-queues enable to use */
> > + uint16_t max_vqs; /**< Maximum number of virt queues to use */
>
> You need to what is max value allowed etc i.e it is based on
> info_get() and mention the field
> in info structure
>
>
> > +
> > +/**
> > + * dma_transfer_direction
> > + */
> > +enum dma_transfer_direction {
>
> rte_dma_transter_direction
>
> > + DMA_MEM_TO_MEM,
> > + DMA_MEM_TO_DEV,
> > + DMA_DEV_TO_MEM,
> > + DMA_DEV_TO_DEV,
> > +};
> > +
> > +/**
> > + * A structure used to configure a DMA virt queue.
> > + */
> > +struct rte_dmadev_queue_conf {
> > + enum dma_transfer_direction direction;
>
>
> > + /**< Associated transfer direction */
> > + uint16_t hw_queue_id; /**< The HW queue on which to create virt queue */
> > + uint16_t nb_desc; /**< Number of descriptor for this virt queue */
> > + uint64_t dev_flags; /**< Device specific flags */
>
> Use of this? Need more comments on this.
> Since it is in slowpath, We can have non opaque names here based on
> each driver capability.
>
>
> > + void *dev_ctx; /**< Device specific context */
>
> Use of this ? Need more comment ont this.
>
I think this should be dropped. We should not have any opaque
device-specific info in these structs, rather if a particular device needs
parameters we should call them out. Drivers for which it's not relevant can
ignore them (and report same in capability if necessary). Since this is not
a dataplane API, we aren't concerned too much about perf and can size the
struct appropriately.
>
> Please add some good amount of reserved bits and have API to init this
> structure for future ABI stability, say rte_dmadev_queue_config_init()
> or so.
>
I don't think that is necessary. Since the config struct is used only as
parameter to the config function, any changes to it can be managed by
versioning that single function. Padding would only be necessary if we had
an array of these config structs somewhere.
>
> > +
> > +/**
> > + * A structure used to retrieve information of a DMA virt queue.
> > + */
> > +struct rte_dmadev_queue_info {
> > + enum dma_transfer_direction direction;
>
> A queue may support all directions so I think it should be a bitfield.
>
> > + /**< Associated transfer direction */
> > + uint16_t hw_queue_id; /**< The HW queue on which to create virt queue */
> > + uint16_t nb_desc; /**< Number of descriptor for this virt queue */
> > + uint64_t dev_flags; /**< Device specific flags */
> > +};
> > +
>
> > +__rte_experimental
> > +static inline dma_cookie_t
> > +rte_dmadev_copy_sg(uint16_t dev_id, uint16_t vq_id,
> > + const struct dma_scatterlist *sg,
> > + uint32_t sg_len, uint64_t flags)
>
> I would like to change this as:
> rte_dmadev_copy_sg(uint16_t dev_id, uint16_t vq_id, const struct
> rte_dma_sg *src, uint32_t nb_src,
> const struct rte_dma_sg *dst, uint32_t nb_dst) or so allow the use case like
> src 30 MB copy can be splitted as written as 1 MB x 30 dst.
>
>
>
> > +{
> > + struct rte_dmadev *dev = &rte_dmadevices[dev_id];
> > + return (*dev->copy_sg)(dev, vq_id, sg, sg_len, flags);
> > +}
> > +
> > +/**
> > + * @warning
> > + * @b EXPERIMENTAL: this API may change without prior notice.
> > + *
> > + * Enqueue a fill operation onto the DMA virt queue
> > + *
> > + * This queues up a fill operation to be performed by hardware, but does not
> > + * trigger hardware to begin that operation.
> > + *
> > + * @param dev_id
> > + * The identifier of the device.
> > + * @param vq_id
> > + * The identifier of virt queue.
> > + * @param pattern
> > + * The pattern to populate the destination buffer with.
> > + * @param dst
> > + * The address of the destination buffer.
> > + * @param length
> > + * The length of the destination buffer.
> > + * @param flags
> > + * An opaque flags for this operation.
>
> PLEASE REMOVE opaque stuff from fastpath it will be a pain for
> application writers as
> they need to write multiple combinations of fastpath. flags are OK, if
> we have a valid
> generic flag now to control the transfer behavior.
>
+1. Flags need to be explicitly listed. If we don't have any flags for now,
we can specify that the value must be given as zero and it's for future
use.
>
> > +/**
> > + * @warning
> > + * @b EXPERIMENTAL: this API may change without prior notice.
> > + *
> > + * Add a fence to force ordering between operations
> > + *
> > + * This adds a fence to a sequence of operations to enforce ordering, such that
> > + * all operations enqueued before the fence must be completed before operations
> > + * after the fence.
> > + * NOTE: Since this fence may be added as a flag to the last operation enqueued,
> > + * this API may not function correctly when called immediately after an
> > + * "rte_dmadev_perform" call i.e. before any new operations are enqueued.
> > + *
> > + * @param dev_id
> > + * The identifier of the device.
> > + * @param vq_id
> > + * The identifier of virt queue.
> > + *
> > + * @return
> > + * - =0: Successful add fence.
> > + * - <0: Failure to add fence.
> > + *
> > + * NOTE: The caller must ensure that the input parameter is valid and the
> > + * corresponding device supports the operation.
> > + */
> > +__rte_experimental
> > +static inline int
> > +rte_dmadev_fence(uint16_t dev_id, uint16_t vq_id)
> > +{
> > + struct rte_dmadev *dev = &rte_dmadevices[dev_id];
> > + return (*dev->fence)(dev, vq_id);
> > +}
>
> Since HW submission is in a queue(FIFO) the ordering is always
> maintained. Right?
> Could you share more details and use case of fence() from
> driver/application PoV?
>
There are different kinds of ordering to consider, ordering of completions
and the ordering of operations. While jobs are reported as completed to the
user in order, for performance hardware, may overlap individual jobs within
a burst (or even across bursts). Therefore, we need a fence operation to
inform hardware that one job should not be started until the other has
fully completed.
>
> > +
> > +/**
> > + * @warning
> > + * @b EXPERIMENTAL: this API may change without prior notice.
> > + *
> > + * Trigger hardware to begin performing enqueued operations
> > + *
> > + * This API is used to write the "doorbell" to the hardware to trigger it
> > + * to begin the operations previously enqueued by rte_dmadev_copy/fill()
> > + *
> > + * @param dev_id
> > + * The identifier of the device.
> > + * @param vq_id
> > + * The identifier of virt queue.
> > + *
> > + * @return
> > + * - =0: Successful trigger hardware.
> > + * - <0: Failure to trigger hardware.
> > + *
> > + * NOTE: The caller must ensure that the input parameter is valid and the
> > + * corresponding device supports the operation.
> > + */
> > +__rte_experimental
> > +static inline int
> > +rte_dmadev_perform(uint16_t dev_id, uint16_t vq_id)
> > +{
> > + struct rte_dmadev *dev = &rte_dmadevices[dev_id];
> > + return (*dev->perform)(dev, vq_id);
> > +}
>
> Since we have additional function call overhead in all the
> applications for this scheme, I would like to understand
> the use of doing this way vs enq does the doorbell implicitly from
> driver/application PoV?
>
In our benchmarks it's just faster. When we tested it, the overhead of the
function calls was noticably less than the cost of building up the
parameter array(s) for passing the jobs in as a burst. [We don't see this
cost with things like NIC I/O since DPDK tends to already have the mbuf
fully populated before the TX call anyway.]
>
> > +
> > +/**
> > + * @warning
> > + * @b EXPERIMENTAL: this API may change without prior notice.
> > + *
> > + * Returns the number of operations that have been successful completed.
> > + *
> > + * @param dev_id
> > + * The identifier of the device.
> > + * @param vq_id
> > + * The identifier of virt queue.
> > + * @param nb_cpls
> > + * The maximum number of completed operations that can be processed.
> > + * @param[out] cookie
> > + * The last completed operation's cookie.
> > + * @param[out] has_error
> > + * Indicates if there are transfer error.
> > + *
> > + * @return
> > + * The number of operations that successful completed.
>
> successfully
>
> > + *
> > + * NOTE: The caller must ensure that the input parameter is valid and the
> > + * corresponding device supports the operation.
> > + */
> > +__rte_experimental
> > +static inline uint16_t
> > +rte_dmadev_completed(uint16_t dev_id, uint16_t vq_id, const uint16_t nb_cpls,
> > + dma_cookie_t *cookie, bool *has_error)
> > +{
> > + struct rte_dmadev *dev = &rte_dmadevices[dev_id];
> > + has_error = false;
> > + return (*dev->completed)(dev, vq_id, nb_cpls, cookie, has_error);
>
> It may be better to have cookie/ring_idx as third argument.
>
No strong opinions here, but having it as in the code above means all
input parameters come before all output, which makes sense to me.
> > +}
> > +
> > +/**
> > + * @warning
> > + * @b EXPERIMENTAL: this API may change without prior notice.
> > + *
> > + * Returns the number of operations that failed to complete.
> > + * NOTE: This API was used when rte_dmadev_completed has_error was set.
> > + *
> > + * @param dev_id
> > + * The identifier of the device.
> > + * @param vq_id
> > + * The identifier of virt queue.
> (> + * @param nb_status
> > + * Indicates the size of status array.
> > + * @param[out] status
> > + * The error code of operations that failed to complete.
> > + * @param[out] cookie
> > + * The last failed completed operation's cookie.
> > + *
> > + * @return
> > + * The number of operations that failed to complete.
> > + *
> > + * NOTE: The caller must ensure that the input parameter is valid and the
> > + * corresponding device supports the operation.
> > + */
> > +__rte_experimental
> > +static inline uint16_t
> > +rte_dmadev_completed_fails(uint16_t dev_id, uint16_t vq_id,
> > + const uint16_t nb_status, uint32_t *status,
> > + dma_cookie_t *cookie)
>
> IMO, it is better to move cookie/rind_idx at 3.
> Why it would return any array of errors? since it called after
> rte_dmadev_completed() has
> has_error. Is it better to change
>
> rte_dmadev_error_status((uint16_t dev_id, uint16_t vq_id, dma_cookie_t
> *cookie, uint32_t *status)
>
> I also think, we may need to set status as bitmask and enumerate all
> the combination of error codes
> of all the driver and return string from driver existing rte_flow_error
>
> See
> struct rte_flow_error {
> enum rte_flow_error_type type; /**< Cause field and error types. */
> const void *cause; /**< Object responsible for the error. */
> const char *message; /**< Human-readable error message. */
> };
>
I think we need a multi-return value API here, as we may add operations in
future which have non-error status values to return. The obvious case is
DMA engines which support "compare" operations. In that case a successful
compare (as in there were no DMA or HW errors) can return "equal" or
"not-equal" as statuses. For general "copy" operations, the faster
completion op can be used to just return successful values (and only call
this status version on error), while apps using those compare ops or a
mixture of copy and compare ops, would always use the slower one that
returns status values for each and every op..
The ioat APIs used 32-bit integer values for this status array so as to
allow e.g. 16-bits for error code and 16-bits for future status values. For
most operations there should be a fairly small set of things that can go
wrong, i.e. bad source address, bad destination address or invalid length.
Within that we may have a couple of specifics for why an address is bad,
but even so I don't think we need to start having multiple bit
combinations.
> > +{
> > + struct rte_dmadev *dev = &rte_dmadevices[dev_id];
> > + return (*dev->completed_fails)(dev, vq_id, nb_status, status, cookie);
> > +}
> > +
> > +struct rte_dmadev_stats {
> > + uint64_t enqueue_fail_count;
> > + /**< Conut of all operations which failed enqueued */
> > + uint64_t enqueued_count;
> > + /**< Count of all operations which successful enqueued */
> > + uint64_t completed_fail_count;
> > + /**< Count of all operations which failed to complete */
> > + uint64_t completed_count;
> > + /**< Count of all operations which successful complete */
> > +};
>
> We need to have capability API to tell which items are
> updated/supported by the driver.
>
I also would remove the enqueue fail counts, since they are better counted
by the app. If a driver reports 20,000 failures we have no way of knowing
if that is 20,000 unique operations which failed to enqueue or a single
operation which failed to enqueue 20,000 times but succeeded on attempt
20,001.
>
> > diff --git a/lib/dmadev/rte_dmadev_core.h b/lib/dmadev/rte_dmadev_core.h
> > new file mode 100644
> > index 0000000..a3afea2
> > --- /dev/null
> > +++ b/lib/dmadev/rte_dmadev_core.h
> > @@ -0,0 +1,98 @@
> > +/* SPDX-License-Identifier: BSD-3-Clause
> > + * Copyright 2021 HiSilicon Limited.
> > + */
> > +
> > +#ifndef _RTE_DMADEV_CORE_H_
> > +#define _RTE_DMADEV_CORE_H_
> > +
> > +/**
> > + * @file
> > + *
> > + * RTE DMA Device internal header.
> > + *
> > + * This header contains internal data types. But they are still part of the
> > + * public API because they are used by inline public functions.
> > + */
> > +
> > +struct rte_dmadev;
> > +
> > +typedef dma_cookie_t (*dmadev_copy_t)(struct rte_dmadev *dev, uint16_t vq_id,
> > + void *src, void *dst,
> > + uint32_t length, uint64_t flags);
> > +/**< @internal Function used to enqueue a copy operation. */
>
> To avoid namespace conflict(as it is public API) use rte_
>
>
> > +
> > +/**
> > + * The data structure associated with each DMA device.
> > + */
> > +struct rte_dmadev {
> > + /**< Enqueue a copy operation onto the DMA device. */
> > + dmadev_copy_t copy;
> > + /**< Enqueue a scatter list copy operation onto the DMA device. */
> > + dmadev_copy_sg_t copy_sg;
> > + /**< Enqueue a fill operation onto the DMA device. */
> > + dmadev_fill_t fill;
> > + /**< Enqueue a scatter list fill operation onto the DMA device. */
> > + dmadev_fill_sg_t fill_sg;
> > + /**< Add a fence to force ordering between operations. */
> > + dmadev_fence_t fence;
> > + /**< Trigger hardware to begin performing enqueued operations. */
> > + dmadev_perform_t perform;
> > + /**< Returns the number of operations that successful completed. */
> > + dmadev_completed_t completed;
> > + /**< Returns the number of operations that failed to complete. */
> > + dmadev_completed_fails_t completed_fails;
>
> We need to limit fastpath items in 1 CL
>
I don't think that is going to be possible. I also would like to see
numbers to check if we benefit much from having these fastpath ops separate
from the regular ops.
> > +
> > + void *dev_private; /**< PMD-specific private data */
> > + const struct rte_dmadev_ops *dev_ops; /**< Functions exported by PMD */
> > +
> > + uint16_t dev_id; /**< Device ID for this instance */
> > + int socket_id; /**< Socket ID where memory is allocated */
> > + struct rte_device *device;
> > + /**< Device info. supplied during device initialization */
> > + const char *driver_name; /**< Driver info. supplied by probing */
> > + char name[RTE_DMADEV_NAME_MAX_LEN]; /**< Device name */
> > +
> > + RTE_STD_C11
> > + uint8_t attached : 1; /**< Flag indicating the device is attached */
> > + uint8_t started : 1; /**< Device state: STARTED(1)/STOPPED(0) */
>
> Add a couple of reserved fields for future ABI stability.
>
> > +
> > +} __rte_cache_aligned;
> > +
> > +extern struct rte_dmadev rte_dmadevices[];
> > +
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH v8 2/2] bus/auxiliary: introduce auxiliary bus
2021-07-05 9:30 0% ` Xueming(Steven) Li
@ 2021-07-05 9:35 0% ` Andrew Rybchenko
2021-07-05 14:57 0% ` Thomas Monjalon
0 siblings, 1 reply; 200+ results
From: Andrew Rybchenko @ 2021-07-05 9:35 UTC (permalink / raw)
To: Xueming(Steven) Li
Cc: dev, Wang Haiyue, NBU-Contact-Thomas Monjalon, Kinsella Ray,
Parav Pandit, Neil Horman
On 7/5/21 12:30 PM, Xueming(Steven) Li wrote:
> Hi Andrew,
>
>> -----Original Message-----
>> From: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
>> Sent: Monday, July 5, 2021 5:19 PM
>> To: Xueming(Steven) Li <xuemingl@nvidia.com>
>> Cc: dev@dpdk.org; Wang Haiyue <haiyue.wang@intel.com>; NBU-Contact-Thomas Monjalon <thomas@monjalon.net>; Kinsella Ray
>> <mdr@ashroe.eu>; Parav Pandit <parav@nvidia.com>; Neil Horman <nhorman@tuxdriver.com>
>> Subject: Re: [PATCH v8 2/2] bus/auxiliary: introduce auxiliary bus
>>
>> On 7/5/21 9:45 AM, Xueming Li wrote:
>>> Auxiliary bus [1] provides a way to split function into child-devices
>>> representing sub-domains of functionality. Each auxiliary device
>>> represents a part of its parent functionality.
>>>
>>> Auxiliary device is identified by unique device name, sysfs path:
>>> /sys/bus/auxiliary/devices/<name>
>>>
>>> Devargs legacy syntax of auxiliary device:
>>> -a auxiliary:<name>[,args...]
>>> Devargs generic syntax of auxiliary device:
>>> -a bus=auxiliary,name=<name>/class=<class>/driver=<driver>[,args...]
>>>
>>> [1] kernel auxiliary bus document:
>>> https://www.kernel.org/doc/html/latest/driver-api/auxiliary_bus.html
>>>
>>> Signed-off-by: Xueming Li <xuemingl@nvidia.com>
>>> Cc: Wang Haiyue <haiyue.wang@intel.com>
>>> Cc: Thomas Monjalon <thomas@monjalon.net>
>>> Cc: Kinsella Ray <mdr@ashroe.eu>
>>> Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
>>
>> I still don't understand if we really need to make the API a part of stable API/ABI in the future. Can it be internal?
>
> There was some discussion on this with Thomas in earlier version.
> Users might want to register/unregister their own PMD driver,
> Is this a valid scenario?
Yes, it is true, but should DPDK care that much about
out-of-tree drivers. I'm just asking since don't know
techboard position on it.
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH v8 2/2] bus/auxiliary: introduce auxiliary bus
2021-07-05 9:19 3% ` Andrew Rybchenko
@ 2021-07-05 9:30 0% ` Xueming(Steven) Li
2021-07-05 9:35 0% ` Andrew Rybchenko
0 siblings, 1 reply; 200+ results
From: Xueming(Steven) Li @ 2021-07-05 9:30 UTC (permalink / raw)
To: Andrew Rybchenko
Cc: dev, Wang Haiyue, NBU-Contact-Thomas Monjalon, Kinsella Ray,
Parav Pandit, Neil Horman
Hi Andrew,
> -----Original Message-----
> From: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
> Sent: Monday, July 5, 2021 5:19 PM
> To: Xueming(Steven) Li <xuemingl@nvidia.com>
> Cc: dev@dpdk.org; Wang Haiyue <haiyue.wang@intel.com>; NBU-Contact-Thomas Monjalon <thomas@monjalon.net>; Kinsella Ray
> <mdr@ashroe.eu>; Parav Pandit <parav@nvidia.com>; Neil Horman <nhorman@tuxdriver.com>
> Subject: Re: [PATCH v8 2/2] bus/auxiliary: introduce auxiliary bus
>
> On 7/5/21 9:45 AM, Xueming Li wrote:
> > Auxiliary bus [1] provides a way to split function into child-devices
> > representing sub-domains of functionality. Each auxiliary device
> > represents a part of its parent functionality.
> >
> > Auxiliary device is identified by unique device name, sysfs path:
> > /sys/bus/auxiliary/devices/<name>
> >
> > Devargs legacy syntax of auxiliary device:
> > -a auxiliary:<name>[,args...]
> > Devargs generic syntax of auxiliary device:
> > -a bus=auxiliary,name=<name>/class=<class>/driver=<driver>[,args...]
> >
> > [1] kernel auxiliary bus document:
> > https://www.kernel.org/doc/html/latest/driver-api/auxiliary_bus.html
> >
> > Signed-off-by: Xueming Li <xuemingl@nvidia.com>
> > Cc: Wang Haiyue <haiyue.wang@intel.com>
> > Cc: Thomas Monjalon <thomas@monjalon.net>
> > Cc: Kinsella Ray <mdr@ashroe.eu>
> > Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
>
> I still don't understand if we really need to make the API a part of stable API/ABI in the future. Can it be internal?
There was some discussion on this with Thomas in earlier version. Users might want to register/unregister their own PMD driver,
Is this a valid scenario?
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH v8 2/2] bus/auxiliary: introduce auxiliary bus
@ 2021-07-05 9:19 3% ` Andrew Rybchenko
2021-07-05 9:30 0% ` Xueming(Steven) Li
0 siblings, 1 reply; 200+ results
From: Andrew Rybchenko @ 2021-07-05 9:19 UTC (permalink / raw)
To: Xueming Li
Cc: dev, Wang Haiyue, Thomas Monjalon, Kinsella Ray, Parav Pandit,
Neil Horman
On 7/5/21 9:45 AM, Xueming Li wrote:
> Auxiliary bus [1] provides a way to split function into child-devices
> representing sub-domains of functionality. Each auxiliary device
> represents a part of its parent functionality.
>
> Auxiliary device is identified by unique device name, sysfs path:
> /sys/bus/auxiliary/devices/<name>
>
> Devargs legacy syntax of auxiliary device:
> -a auxiliary:<name>[,args...]
> Devargs generic syntax of auxiliary device:
> -a bus=auxiliary,name=<name>/class=<class>/driver=<driver>[,args...]
>
> [1] kernel auxiliary bus document:
> https://www.kernel.org/doc/html/latest/driver-api/auxiliary_bus.html
>
> Signed-off-by: Xueming Li <xuemingl@nvidia.com>
> Cc: Wang Haiyue <haiyue.wang@intel.com>
> Cc: Thomas Monjalon <thomas@monjalon.net>
> Cc: Kinsella Ray <mdr@ashroe.eu>
> Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
I still don't understand if we really need to make the API
a part of stable API/ABI in the future. Can it be internal?
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [PATCH v3 19/20] net/sfc: support flow action COUNT in transfer rules
2021-07-04 19:45 3% ` Thomas Monjalon
@ 2021-07-05 8:41 0% ` Andrew Rybchenko
0 siblings, 0 replies; 200+ results
From: Andrew Rybchenko @ 2021-07-05 8:41 UTC (permalink / raw)
To: Thomas Monjalon
Cc: David Marchand, Bruce Richardson, dev, Igor Romanov,
Andy Moreton, Ivan Malov
On 7/4/21 10:45 PM, Thomas Monjalon wrote:
> 02/07/2021 14:53, Andrew Rybchenko:
>> On 7/2/21 3:30 PM, Thomas Monjalon wrote:
>>> 02/07/2021 10:43, Andrew Rybchenko:
>>>> On 7/1/21 4:05 PM, Andrew Rybchenko wrote:
>>>>> On 7/1/21 3:34 PM, David Marchand wrote:
>>>>>> On Thu, Jul 1, 2021 at 11:22 AM Andrew Rybchenko
>>>>>> <andrew.rybchenko@oktetlabs.ru> wrote:
>>>>>>> The build works fine for me on FC34, but it has
>>>>>>> libatomic-11.1.1-3.fc34.x86_64 installed.
>>>>>> I first produced the issue on my "old" FC32.
>>>>>> Afaics, for FC33 and later, gcc now depends on libatomic and the
>>>>>> problem won't be noticed.
>>>>>> FC32 and before are EOL, but I then reproduced the issue on RHEL 8
>>>>>> (and Intel CI reported it on Centos 8 too).
>>>>> I see. Thanks for the clarification.
>>>>>
>>>>>>> I'd like to understand what we're trying to solve here.
>>>>>>> Are we trying to make meson to report the missing library
>>>>>>> correctly?
>>>>>>>
>>>>>>> If so, I think I can do simple check using cc.links()
>>>>>>> which will fail if the library is not found. I'll
>>>>>>> test that it works as expected if the library is not
>>>>>>> completely installed.
>>>>>>>
>>>>>> I tried below diff, and it works for me.
>>>>>> "works" as in net/sfc gets disabled without libatomic installed:
>>> [...]
>>>>>> # for gcc compiles we need -latomic for 128-bit atomic ops
>>>>>> if cc.get_id() == 'gcc'
>>>>>> + code = '''#include <stdio.h>
>>>>>> + void main() { printf("Atomilink me.\n"); }
>>>>>> + '''
>>>>>> + if not cc.links(code, args: '-latomic', name: 'libatomic link check')
>>>>>> + build = false
>>>>>> + reason = 'missing dependency, "libatomic"'
>>>>>> + subdir_done()
>>>>>> + endif
>>>>>> ext_deps += cc.find_library('atomic')
>>>>>> endif
>>>>> Many thanks, LGTM. I'll pick it up and add comments why
>>>>> it is checked this way.
>>>>>
>>>> I've send v4 with the problem fixed. However, I'm afraid
>>>> build test systems should be updated to have libatomic
>>>> correctly installed. Otherwise, they do not really check
>>>> net/sfc build.
>>> When testing on old systems, sfc won't be tested anymore after this patchset.
>>> On recent systems, sfc should be enabled I guess.
>>> I don't see how to manage better, sorry.
>>>
>> I see. I thought that it is possible to install missing
>> package on corresponding systems to make build coverage
>> better.
>>
>> Now I automatically test build on problematic distros
>> with previously missing packages installed. So I have
>> internal build coverage anyway.
> David asked for installing libatomic:
> https://inbox.dpdk.org/ci/CAJFAV8xCNBL4yEZU0c=dJGYS+13QM7Uz7e2qnUkMuM7eaKKw+Q@mail.gmail.com/
>
> We should wait for it to be installed otherwise ABI check will fail.
Yes, I see. Thanks.
^ permalink raw reply [relevance 0%]
* [dpdk-dev] [RFC PATCH v4 0/3] Add PIE support for HQoS library
2021-06-21 7:35 3% ` [dpdk-dev] [RFC PATCH v3 " Liguzinski, WojciechX
@ 2021-07-05 8:04 3% ` Liguzinski, WojciechX
0 siblings, 0 replies; 200+ results
From: Liguzinski, WojciechX @ 2021-07-05 8:04 UTC (permalink / raw)
To: dev, jasvinder.singh, cristian.dumitrescu; +Cc: savinay.dharmappa, megha.ajmera
DPDK sched library is equipped with mechanism that secures it from the bufferbloat problem
which is a situation when excess buffers in the network cause high latency and latency
variation. Currently, it supports RED for active queue management (which is designed
to control the queue length but it does not control latency directly and is now being
obsoleted). However, more advanced queue management is required to address this problem
and provide desirable quality of service to users.
This solution (RFC) proposes usage of new algorithm called "PIE" (Proportional Integral
controller Enhanced) that can effectively and directly control queuing latency to address
the bufferbloat problem.
The implementation of mentioned functionality includes modification of existing and
adding a new set of data structures to the library, adding PIE related APIs.
This affects structures in public API/ABI. That is why deprecation notice is going
to be prepared and sent.
Liguzinski, WojciechX (3):
sched: add PIE based congestion management
example/qos_sched: add PIE support
example/ip_pipeline: add PIE support
config/rte_config.h | 1 -
drivers/net/softnic/rte_eth_softnic_tm.c | 6 +-
examples/ip_pipeline/tmgr.c | 6 +-
examples/qos_sched/app_thread.c | 1 -
examples/qos_sched/cfg_file.c | 82 ++++-
examples/qos_sched/init.c | 7 +-
examples/qos_sched/profile.cfg | 196 +++++++----
lib/sched/meson.build | 10 +-
lib/sched/rte_pie.c | 82 +++++
lib/sched/rte_pie.h | 393 +++++++++++++++++++++++
lib/sched/rte_sched.c | 229 +++++++++----
lib/sched/rte_sched.h | 53 ++-
lib/sched/version.map | 3 +
13 files changed, 888 insertions(+), 181 deletions(-)
create mode 100644 lib/sched/rte_pie.c
create mode 100644 lib/sched/rte_pie.h
--
2.17.1
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [PATCH v6 2/2] bus/auxiliary: introduce auxiliary bus
2021-07-04 16:13 3% ` Andrew Rybchenko
@ 2021-07-05 5:47 0% ` Xueming(Steven) Li
0 siblings, 0 replies; 200+ results
From: Xueming(Steven) Li @ 2021-07-05 5:47 UTC (permalink / raw)
To: Andrew Rybchenko
Cc: dev, Wang Haiyue, NBU-Contact-Thomas Monjalon, Kinsella Ray, Neil Horman
Hi Andrew,
Thanks very much all the good suggestions, v7 posted.
Best Regards,
Xueming
> -----Original Message-----
> From: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
> Sent: Monday, July 5, 2021 12:13 AM
> To: Xueming(Steven) Li <xuemingl@nvidia.com>
> Cc: dev@dpdk.org; Wang Haiyue <haiyue.wang@intel.com>; NBU-Contact-Thomas Monjalon <thomas@monjalon.net>; Kinsella Ray
> <mdr@ashroe.eu>; Neil Horman <nhorman@tuxdriver.com>
> Subject: Re: [dpdk-dev] [PATCH v6 2/2] bus/auxiliary: introduce auxiliary bus
>
> On 6/25/21 2:47 PM, Xueming Li wrote:
> > Auxiliary bus [1] provides a way to split function into child-devices
> > representing sub-domains of functionality. Each auxiliary device
> > represents a part of its parent functionality.
> >
> > Auxiliary device is identified by unique device name, sysfs path:
> > /sys/bus/auxiliary/devices/<name>
> >
> > Devargs legacy syntax ofauxiliary device:
>
> Missing space after 'of'
>
> > -a auxiliary:<name>[,args...]
> > Devargs generic syntax of auxiliary device:
> > -a bus=auxiliary,name=<name>,,/class=<classs>,,/driver=<driver>,,
>
> Are two commas above intentionall? What for?
>
> >
> > [1] kernel auxiliary bus document:
> > https://www.kernel.org/doc/html/latest/driver-api/auxiliary_bus.html
> >
> > Signed-off-by: Xueming Li <xuemingl@nvidia.com>
>
> With my below notes fixed:
>
> Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
>
> > Cc: Wang Haiyue <haiyue.wang@intel.com>
> > Cc: Thomas Monjalon <thomas@monjalon.net>
> > Cc: Kinsella Ray <mdr@ashroe.eu>
> > ---
> > MAINTAINERS | 5 +
> > doc/guides/rel_notes/release_21_08.rst | 6 +
> > drivers/bus/auxiliary/auxiliary_common.c | 411
> > ++++++++++++++++++++++ drivers/bus/auxiliary/auxiliary_params.c | 59 ++++
> > drivers/bus/auxiliary/linux/auxiliary.c | 141 ++++++++
> > drivers/bus/auxiliary/meson.build | 16 +
> > drivers/bus/auxiliary/private.h | 74 ++++
> > drivers/bus/auxiliary/rte_bus_auxiliary.h | 201 +++++++++++
> > drivers/bus/auxiliary/version.map | 7 +
> > drivers/bus/meson.build | 1 +
> > 10 files changed, 921 insertions(+)
> > create mode 100644 drivers/bus/auxiliary/auxiliary_common.c
> > create mode 100644 drivers/bus/auxiliary/auxiliary_params.c
> > create mode 100644 drivers/bus/auxiliary/linux/auxiliary.c
> > create mode 100644 drivers/bus/auxiliary/meson.build create mode
> > 100644 drivers/bus/auxiliary/private.h create mode 100644
> > drivers/bus/auxiliary/rte_bus_auxiliary.h
> > create mode 100644 drivers/bus/auxiliary/version.map
> >
> > diff --git a/MAINTAINERS b/MAINTAINERS index 5877a16971..eaf691ca6a
> > 100644
> > --- a/MAINTAINERS
> > +++ b/MAINTAINERS
> > @@ -525,6 +525,11 @@ F: doc/guides/mempool/octeontx2.rst Bus Drivers
> > -----------
> >
> > +Auxiliary bus driver
>
> Shouldn't it be EXPERIMENTAL?
>
> > +M: Parav Pandit <parav@nvidia.com>
> > +M: Xueming Li <xuemingl@nvidia.com>
> > +F: drivers/bus/auxiliary/
> > +
> > Intel FPGA bus
> > M: Rosen Xu <rosen.xu@intel.com>
> > F: drivers/bus/ifpga/
> > diff --git a/doc/guides/rel_notes/release_21_08.rst
> > b/doc/guides/rel_notes/release_21_08.rst
> > index a6ecfdf3ce..e7ef4c8a05 100644
> > --- a/doc/guides/rel_notes/release_21_08.rst
> > +++ b/doc/guides/rel_notes/release_21_08.rst
> > @@ -55,6 +55,12 @@ New Features
> > Also, make sure to start the actual text at the margin.
> > =======================================================
> >
> > +* **Added auxiliary bus support.**
> > +
> > + Auxiliary bus provides a way to split function into child-devices
> > + representing sub-domains of functionality. Each auxiliary device
> > + represents a part of its parent functionality.
> > +
> >
> > Removed Items
> > -------------
> > diff --git a/drivers/bus/auxiliary/auxiliary_common.c
> > b/drivers/bus/auxiliary/auxiliary_common.c
> > new file mode 100644
> > index 0000000000..8a75306da5
> > --- /dev/null
> > +++ b/drivers/bus/auxiliary/auxiliary_common.c
> > @@ -0,0 +1,411 @@
> > +/* SPDX-License-Identifier: BSD-3-Clause
> > + * Copyright (c) 2021 NVIDIA Corporation & Affiliates */
> > +
> > +#include <string.h>
> > +#include <inttypes.h>
> > +#include <stdint.h>
> > +#include <stdbool.h>
> > +#include <stdlib.h>
> > +#include <stdio.h>
> > +#include <sys/queue.h>
> > +#include <rte_errno.h>
> > +#include <rte_interrupts.h>
> > +#include <rte_log.h>
> > +#include <rte_bus.h>
> > +#include <rte_per_lcore.h>
> > +#include <rte_memory.h>
> > +#include <rte_eal.h>
> > +#include <rte_eal_paging.h>
> > +#include <rte_string_fns.h>
> > +#include <rte_common.h>
> > +#include <rte_devargs.h>
> > +
> > +#include "private.h"
> > +#include "rte_bus_auxiliary.h"
> > +
> > +static struct rte_devargs *
> > +auxiliary_devargs_lookup(const char *name) {
> > + struct rte_devargs *devargs;
> > +
> > + RTE_EAL_DEVARGS_FOREACH(RTE_BUS_AUXILIARY_NAME, devargs) {
> > + if (strcmp(devargs->name, name) == 0)
> > + return devargs;
> > + }
> > + return NULL;
> > +}
> > +
> > +/*
> > + * Test whether the auxiliary device exist
>
> Missing full stop above.
>
> > + *
> > + * Stub for OS not supporting auxiliary bus.
> > + */
> > +__rte_weak bool
> > +auxiliary_dev_exists(const char *name) {
> > + RTE_SET_USED(name);
> > + return false;
> > +}
> > +
> > +/*
> > + * Scan the devices in the auxiliary bus.
> > + *
> > + * Stub for OS not supporting auxiliary bus.
> > + */
> > +__rte_weak int
> > +auxiliary_scan(void)
> > +{
> > + return 0;
> > +}
> > +
> > +/*
> > + * Update a device's devargs being scanned.
> > + *
> > + * @param aux_dev
> > + * AUXILIARY device.
> > + */
> > +void
> > +auxiliary_on_scan(struct rte_auxiliary_device *aux_dev) {
> > + aux_dev->device.devargs = auxiliary_devargs_lookup(aux_dev->name);
> > +}
> > +
> > +/*
> > + * Match the auxiliary driver and device using driver function.
> > + */
> > +bool
> > +auxiliary_match(const struct rte_auxiliary_driver *aux_drv,
> > + const struct rte_auxiliary_device *aux_dev) {
> > + if (aux_drv->match == NULL)
> > + return false;
> > + return aux_drv->match(aux_dev->name); }
> > +
> > +/*
> > + * Call the probe() function of the driver.
> > + */
> > +static int
> > +rte_auxiliary_probe_one_driver(struct rte_auxiliary_driver *drv,
> > + struct rte_auxiliary_device *dev)
> > +{
> > + enum rte_iova_mode iova_mode;
> > + int ret;
> > +
> > + if ((drv == NULL) || (dev == NULL))
>
> Unnecessary internal parenthesis.
>
> > + return -EINVAL;
> > +
> > + /* Check if driver supports it. */
> > + if (!auxiliary_match(drv, dev))
> > + /* Match of device and driver failed */
> > + return 1;
> > +
> > + /* No initialization when marked as blocked, return without error. */
> > + if (dev->device.devargs != NULL &&
> > + dev->device.devargs->policy == RTE_DEV_BLOCKED) {
> > + AUXILIARY_LOG(INFO, "Device is blocked, not initializing");
> > + return -1;
> > + }
> > +
> > + if (dev->device.numa_node < 0) {
> > + AUXILIARY_LOG(INFO, "Device is not NUMA-aware, defaulting socket to 0");
>
> socket -> NUMA node
>
> > + dev->device.numa_node = 0;
> > + }
> > +
> > + iova_mode = rte_eal_iova_mode();
> > + if ((drv->drv_flags & RTE_AUXILIARY_DRV_NEED_IOVA_AS_VA) > 0 &&
> > + iova_mode != RTE_IOVA_VA) {
> > + AUXILIARY_LOG(ERR, "Driver %s expecting VA IOVA mode but current mode is PA, not initializing",
> > + drv->driver.name);
> > + return -EINVAL;
> > + }
> > +
> > + dev->driver = drv;
> > +
> > + AUXILIARY_LOG(INFO, "Probe auxiliary driver: %s device: %s (socket %i)",
>
> socket -> NUMA node
>
> > + drv->driver.name, dev->name, dev->device.numa_node);
> > + ret = drv->probe(drv, dev);
> > + if (ret != 0)
> > + dev->driver = NULL;
> > + else
> > + dev->device.driver = &drv->driver;
> > +
> > + return ret;
> > +}
> > +
> > +/*
> > + * Call the remove() function of the driver.
> > + */
> > +static int
> > +rte_auxiliary_driver_remove_dev(struct rte_auxiliary_device *dev)
> > +{
> > + struct rte_auxiliary_driver *drv;
> > + int ret = 0;
> > +
> > + if (dev == NULL)
> > + return -EINVAL;
> > +
> > + drv = dev->driver;
> > +
> > + AUXILIARY_LOG(DEBUG, "Driver %s remove auxiliary device %s on NUMA socket %i",
>
> socket -> node
>
> > + drv->driver.name, dev->name, dev->device.numa_node);
> > +
> > + if (drv->remove != NULL) {
> > + ret = drv->remove(dev);
> > + if (ret < 0)
> > + return ret;
> > + }
> > +
> > + /* clear driver structure */
> > + dev->driver = NULL;
> > + dev->device.driver = NULL;
> > +
> > + return 0;
> > +}
> > +
> > +/*
> > + * Call the probe() function of all registered driver for the given device.
> > + * Return < 0 if initialization failed.
> > + * Return 1 if no driver is found for this device.
> > + */
> > +static int
> > +auxiliary_probe_all_drivers(struct rte_auxiliary_device *dev)
> > +{
> > + struct rte_auxiliary_driver *drv;
> > + int rc;
> > +
> > + if (dev == NULL)
> > + return -EINVAL;
> > +
> > + FOREACH_DRIVER_ON_AUXILIARY_BUS(drv) {
> > + if (!drv->match(dev->name))
> > + continue;
> > +
> > + rc = rte_auxiliary_probe_one_driver(drv, dev);
> > + if (rc < 0)
> > + /* negative value is an error */
> > + return rc;
> > + if (rc > 0)
> > + /* positive value means driver doesn't support it */
> > + continue;
> > + return 0;
> > + }
> > + return 1;
> > +}
> > +
> > +/*
> > + * Scan the content of the auxiliary bus, and call the probe function for
> > + * all registered drivers to try to probe discovered devices.
> > + */
> > +static int
> > +auxiliary_probe(void)
> > +{
> > + struct rte_auxiliary_device *dev = NULL;
> > + size_t probed = 0, failed = 0;
> > + int ret = 0;
> > +
> > + FOREACH_DEVICE_ON_AUXILIARY_BUS(dev) {
> > + probed++;
> > +
> > + ret = auxiliary_probe_all_drivers(dev);
> > + if (ret < 0) {
> > + if (ret != -EEXIST) {
> > + AUXILIARY_LOG(ERR, "Requested device %s cannot be used",
> > + dev->name);
> > + rte_errno = errno;
> > + failed++;
> > + }
> > + ret = 0;
> > + }
> > + }
> > +
> > + return (probed && probed == failed) ? -1 : 0;
> > +}
> > +
> > +static int
> > +auxiliary_parse(const char *name, void *addr)
> > +{
> > + struct rte_auxiliary_driver *drv = NULL;
> > + const char **out = addr;
> > +
> > + /* Allow empty device name "auxiliary:" to bypass entire bus scan. */
> > + if (strlen(name) == 0)
> > + return 0;
> > +
> > + FOREACH_DRIVER_ON_AUXILIARY_BUS(drv) {
> > + if (drv->match(name))
> > + break;
> > + }
> > + if (drv != NULL && addr != NULL)
> > + *out = name;
> > + return drv != NULL ? 0 : -1;
> > +}
> > +
> > +/* Register a driver */
> > +void
> > +rte_auxiliary_register(struct rte_auxiliary_driver *driver)
> > +{
> > + TAILQ_INSERT_TAIL(&auxiliary_bus.driver_list, driver, next);
> > + driver->bus = &auxiliary_bus;
> > +}
> > +
> > +/* Unregister a driver */
> > +void
> > +rte_auxiliary_unregister(struct rte_auxiliary_driver *driver)
> > +{
> > + TAILQ_REMOVE(&auxiliary_bus.driver_list, driver, next);
> > + driver->bus = NULL;
> > +}
> > +
> > +/* Add a device to auxiliary bus */
> > +void
> > +auxiliary_add_device(struct rte_auxiliary_device *aux_dev)
> > +{
> > + TAILQ_INSERT_TAIL(&auxiliary_bus.device_list, aux_dev, next);
> > +}
> > +
> > +/* Insert a device into a predefined position in auxiliary bus */
> > +void
> > +auxiliary_insert_device(struct rte_auxiliary_device *exist_aux_dev,
> > + struct rte_auxiliary_device *new_aux_dev)
> > +{
> > + TAILQ_INSERT_BEFORE(exist_aux_dev, new_aux_dev, next);
> > +}
> > +
> > +/* Remove a device from auxiliary bus */
> > +static void
> > +rte_auxiliary_remove_device(struct rte_auxiliary_device *auxiliary_dev)
> > +{
> > + TAILQ_REMOVE(&auxiliary_bus.device_list, auxiliary_dev, next);
> > +}
> > +
> > +static struct rte_device *
> > +auxiliary_find_device(const struct rte_device *start, rte_dev_cmp_t cmp,
> > + const void *data)
> > +{
> > + const struct rte_auxiliary_device *pstart;
> > + struct rte_auxiliary_device *adev;
> > +
> > + if (start != NULL) {
> > + pstart = RTE_DEV_TO_AUXILIARY_CONST(start);
> > + adev = TAILQ_NEXT(pstart, next);
> > + } else {
> > + adev = TAILQ_FIRST(&auxiliary_bus.device_list);
> > + }
> > + while (adev != NULL) {
> > + if (cmp(&adev->device, data) == 0)
> > + return &adev->device;
> > + adev = TAILQ_NEXT(adev, next);
> > + }
> > + return NULL;
> > +}
> > +
> > +static int
> > +auxiliary_plug(struct rte_device *dev)
> > +{
> > + if (!auxiliary_dev_exists(dev->name))
> > + return -ENOENT;
> > + return auxiliary_probe_all_drivers(RTE_DEV_TO_AUXILIARY(dev));
> > +}
> > +
> > +static int
> > +auxiliary_unplug(struct rte_device *dev)
> > +{
> > + struct rte_auxiliary_device *adev;
> > + int ret;
> > +
> > + adev = RTE_DEV_TO_AUXILIARY(dev);
> > + ret = rte_auxiliary_driver_remove_dev(adev);
> > + if (ret == 0) {
> > + rte_auxiliary_remove_device(adev);
> > + rte_devargs_remove(dev->devargs);
> > + free(adev);
> > + }
> > + return ret;
> > +}
> > +
> > +static int
> > +auxiliary_dma_map(struct rte_device *dev, void *addr, uint64_t iova, size_t len)
> > +{
> > + struct rte_auxiliary_device *aux_dev = RTE_DEV_TO_AUXILIARY(dev);
> > +
> > + if (dev == NULL || aux_dev->driver == NULL) {
> > + rte_errno = EINVAL;
> > + return -1;
> > + }
> > + if (aux_dev->driver->dma_map == NULL) {
> > + rte_errno = ENOTSUP;
> > + return -1;
> > + }
> > + return aux_dev->driver->dma_map(aux_dev, addr, iova, len);
> > +}
> > +
> > +static int
> > +auxiliary_dma_unmap(struct rte_device *dev, void *addr, uint64_t iova,
> > + size_t len)
> > +{
> > + struct rte_auxiliary_device *aux_dev = RTE_DEV_TO_AUXILIARY(dev);
> > +
> > + if (dev == NULL || aux_dev->driver == NULL) {
> > + rte_errno = EINVAL;
> > + return -1;
> > + }
> > + if (aux_dev->driver->dma_unmap == NULL) {
> > + rte_errno = ENOTSUP;
> > + return -1;
> > + }
> > + return aux_dev->driver->dma_unmap(aux_dev, addr, iova, len);
> > +}
> > +
> > +bool
> > +auxiliary_is_ignored_device(const char *name)
> > +{
> > + struct rte_devargs *devargs = auxiliary_devargs_lookup(name);
> > +
> > + switch (auxiliary_bus.bus.conf.scan_mode) {
> > + case RTE_BUS_SCAN_ALLOWLIST:
> > + if (devargs && devargs->policy == RTE_DEV_ALLOWED)
> > + return false;
> > + break;
> > + case RTE_BUS_SCAN_UNDEFINED:
> > + case RTE_BUS_SCAN_BLOCKLIST:
> > + if (devargs == NULL || devargs->policy != RTE_DEV_BLOCKED)
> > + return false;
> > + break;
> > + }
> > + return true;
> > +}
> > +
> > +static enum rte_iova_mode
> > +auxiliary_get_iommu_class(void)
> > +{
> > + const struct rte_auxiliary_driver *drv;
> > +
> > + FOREACH_DRIVER_ON_AUXILIARY_BUS(drv) {
> > + if ((drv->drv_flags & RTE_AUXILIARY_DRV_NEED_IOVA_AS_VA) > 0)
> > + return RTE_IOVA_VA;
> > + }
> > +
> > + return RTE_IOVA_DC;
> > +}
> > +
> > +struct rte_auxiliary_bus auxiliary_bus = {
> > + .bus = {
> > + .scan = auxiliary_scan,
> > + .probe = auxiliary_probe,
> > + .find_device = auxiliary_find_device,
> > + .plug = auxiliary_plug,
> > + .unplug = auxiliary_unplug,
> > + .parse = auxiliary_parse,
> > + .dma_map = auxiliary_dma_map,
> > + .dma_unmap = auxiliary_dma_unmap,
> > + .get_iommu_class = auxiliary_get_iommu_class,
> > + .dev_iterate = auxiliary_dev_iterate,
> > + },
> > + .device_list = TAILQ_HEAD_INITIALIZER(auxiliary_bus.device_list),
> > + .driver_list = TAILQ_HEAD_INITIALIZER(auxiliary_bus.driver_list),
> > +};
> > +
> > +RTE_REGISTER_BUS(auxiliary, auxiliary_bus.bus);
> > +RTE_LOG_REGISTER_DEFAULT(auxiliary_bus_logtype, NOTICE);
> > diff --git a/drivers/bus/auxiliary/auxiliary_params.c b/drivers/bus/auxiliary/auxiliary_params.c
> > new file mode 100644
> > index 0000000000..cd3fa56cb4
> > --- /dev/null
> > +++ b/drivers/bus/auxiliary/auxiliary_params.c
> > @@ -0,0 +1,59 @@
> > +/* SPDX-License-Identifier: BSD-3-Clause
> > + * Copyright (c) 2021 NVIDIA Corporation & Affiliates
> > + */
> > +
> > +#include <string.h>
> > +
> > +#include <rte_bus.h>
> > +#include <rte_dev.h>
> > +#include <rte_errno.h>
> > +#include <rte_kvargs.h>
> > +
> > +#include "private.h"
> > +#include "rte_bus_auxiliary.h"
> > +
> > +enum auxiliary_params {
> > + RTE_AUXILIARY_PARAM_NAME,
> > +};
> > +
> > +static const char * const auxiliary_params_keys[] = {
> > + [RTE_AUXILIARY_PARAM_NAME] = "name",
> > +};
> > +
> > +static int
> > +auxiliary_dev_match(const struct rte_device *dev,
> > + const void *_kvlist)
> > +{
> > + const struct rte_kvargs *kvlist = _kvlist;
> > + int ret;
> > +
> > + ret = rte_kvargs_process(kvlist,
> > + auxiliary_params_keys[RTE_AUXILIARY_PARAM_NAME],
> > + rte_kvargs_strcmp, (void *)(uintptr_t)dev->name);
> > +
> > + return ret != 0 ? -1 : 0;
> > +}
> > +
> > +void *
> > +auxiliary_dev_iterate(const void *start,
> > + const char *str,
> > + const struct rte_dev_iterator *it __rte_unused)
> > +{
> > + rte_bus_find_device_t find_device;
> > + struct rte_kvargs *kvargs = NULL;
> > + struct rte_device *dev;
> > +
> > + if (str != NULL) {
> > + kvargs = rte_kvargs_parse(str, auxiliary_params_keys);
> > + if (kvargs == NULL) {
> > + AUXILIARY_LOG(ERR, "cannot parse argument list %s",
> > + str);
> > + rte_errno = EINVAL;
> > + return NULL;
> > + }
> > + }
> > + find_device = auxiliary_bus.bus.find_device;
> > + dev = find_device(start, auxiliary_dev_match, kvargs);
> > + rte_kvargs_free(kvargs);
> > + return dev;
> > +}
> > diff --git a/drivers/bus/auxiliary/linux/auxiliary.c b/drivers/bus/auxiliary/linux/auxiliary.c
> > new file mode 100644
> > index 0000000000..8464487971
> > --- /dev/null
> > +++ b/drivers/bus/auxiliary/linux/auxiliary.c
> > @@ -0,0 +1,141 @@
> > +/* SPDX-License-Identifier: BSD-3-Clause
> > + * Copyright (c) 2021 NVIDIA Corporation & Affiliates
> > + */
> > +
> > +#include <string.h>
> > +#include <dirent.h>
> > +
> > +#include <rte_log.h>
> > +#include <rte_bus.h>
> > +#include <rte_malloc.h>
> > +#include <rte_devargs.h>
> > +#include <rte_memcpy.h>
> > +#include <eal_filesystem.h>
> > +
> > +#include "../rte_bus_auxiliary.h"
> > +#include "../private.h"
> > +
> > +#define AUXILIARY_SYSFS_PATH "/sys/bus/auxiliary/devices"
> > +
> > +/* Scan one auxiliary sysfs entry, and fill the devices list from it. */
> > +static int
> > +auxiliary_scan_one(const char *dirname, const char *name)
> > +{
> > + struct rte_auxiliary_device *dev;
> > + struct rte_auxiliary_device *dev2;
> > + char filename[PATH_MAX];
> > + unsigned long tmp;
> > + int ret;
> > +
> > + dev = malloc(sizeof(*dev));
> > + if (dev == NULL)
> > + return -1;
> > +
> > + memset(dev, 0, sizeof(*dev));
> > + if (rte_strscpy(dev->name, name, sizeof(dev->name)) < 0) {
> > + free(dev);
> > + return -1;
> > + }
> > + dev->device.name = dev->name;
> > + dev->device.bus = &auxiliary_bus.bus;
> > +
> > + /* Get NUMA node, default to 0 if not present */
> > + snprintf(filename, sizeof(filename), "%s/%s/numa_node",
> > + dirname, name);
> > + if (access(filename, F_OK) != -1) {
> > + if (eal_parse_sysfs_value(filename, &tmp) == 0)
> > + dev->device.numa_node = tmp;
> > + else
> > + dev->device.numa_node = -1;
> > + } else {
> > + dev->device.numa_node = 0;
> > + }
> > +
> > + auxiliary_on_scan(dev);
> > +
> > + /* Device is valid, add in list (sorted) */
> > + TAILQ_FOREACH(dev2, &auxiliary_bus.device_list, next) {
> > + ret = strcmp(dev->name, dev2->name);
> > + if (ret > 0)
> > + continue;
> > + if (ret < 0) {
> > + auxiliary_insert_device(dev2, dev);
> > + } else { /* already registered */
> > + if (rte_dev_is_probed(&dev2->device) &&
> > + dev2->device.devargs != dev->device.devargs) {
> > + /* To probe device with new devargs. */
> > + rte_devargs_remove(dev2->device.devargs);
> > + auxiliary_on_scan(dev2);
> > + }
> > + free(dev);
> > + }
> > + return 0;
> > + }
> > + auxiliary_add_device(dev);
> > + return 0;
> > +}
> > +
> > +/*
> > + * Test whether the auxiliary device exist
>
> Missing full stop above.
>
> > + */
> > +bool
> > +auxiliary_dev_exists(const char *name)
> > +{
> > + DIR *dir;
> > + char dirname[PATH_MAX];
> > +
> > + snprintf(dirname, sizeof(dirname), "%s/%s",
> > + AUXILIARY_SYSFS_PATH, name);
> > + dir = opendir(dirname);
> > + if (dir == NULL)
> > + return false;
> > + closedir(dir);
> > + return true;
> > +}
> > +
> > +/*
> > + * Scan the devices in the auxiliary bus
>
> Missing full stop above.
>
> > + */
> > +int
> > +auxiliary_scan(void)
> > +{
> > + struct dirent *e;
> > + DIR *dir;
> > + char dirname[PATH_MAX];
> > + struct rte_auxiliary_driver *drv;
> > +
> > + dir = opendir(AUXILIARY_SYSFS_PATH);
> > + if (dir == NULL) {
> > + AUXILIARY_LOG(INFO, "%s not found, is auxiliary module loaded?",
> > + AUXILIARY_SYSFS_PATH);
> > + return 0;
> > + }
> > +
> > + while ((e = readdir(dir)) != NULL) {
> > + if (e->d_name[0] == '.')
> > + continue;
> > +
> > + if (auxiliary_is_ignored_device(e->d_name))
> > + continue;
> > +
> > + snprintf(dirname, sizeof(dirname), "%s/%s",
> > + AUXILIARY_SYSFS_PATH, e->d_name);
> > +
> > + /* Ignore if no driver can handle. */
> > + FOREACH_DRIVER_ON_AUXILIARY_BUS(drv) {
> > + if (drv->match(e->d_name))
> > + break;
> > + }
> > + if (drv == NULL)
> > + continue;
> > +
> > + if (auxiliary_scan_one(dirname, e->d_name) < 0)
> > + goto error;
> > + }
> > + closedir(dir);
> > + return 0;
> > +
> > +error:
> > + closedir(dir);
> > + return -1;
> > +}
> > diff --git a/drivers/bus/auxiliary/meson.build b/drivers/bus/auxiliary/meson.build
> > new file mode 100644
> > index 0000000000..357550eff7
> > --- /dev/null
> > +++ b/drivers/bus/auxiliary/meson.build
> > @@ -0,0 +1,16 @@
> > +# SPDX-License-Identifier: BSD-3-Clause
> > +# Copyright (c) 2021 NVIDIA Corporation & Affiliates
> > +
> > +headers = files(
> > + 'rte_bus_auxiliary.h',
> > +)
> > +sources = files(
> > + 'auxiliary_common.c',
> > + 'auxiliary_params.c',
> > +)
> > +if is_linux
> > + sources += files(
> > + 'linux/auxiliary.c',
> > + )
> > +endif
> > +deps += ['kvargs']
> > diff --git a/drivers/bus/auxiliary/private.h b/drivers/bus/auxiliary/private.h
> > new file mode 100644
> > index 0000000000..cb3e849993
> > --- /dev/null
> > +++ b/drivers/bus/auxiliary/private.h
> > @@ -0,0 +1,74 @@
> > +/* SPDX-License-Identifier: BSD-3-Clause
> > + * Copyright (c) 2021 NVIDIA Corporation & Affiliates
> > + */
> > +
> > +#ifndef AUXILIARY_PRIVATE_H
>
> May be add BUS_ prefix at leaat?
>
> > +#define AUXILIARY_PRIVATE_H
> > +
> > +#include <stdbool.h>
> > +#include <stdio.h>
> > +
> > +#include "rte_bus_auxiliary.h"
> > +
> > +extern struct rte_auxiliary_bus auxiliary_bus;
> > +extern int auxiliary_bus_logtype;
> > +
> > +#define AUXILIARY_LOG(level, ...) \
> > + rte_log(RTE_LOG_ ## level, auxiliary_bus_logtype, \
> > + RTE_FMT("auxiliary bus: " RTE_FMT_HEAD(__VA_ARGS__,) "\n", \
> > + RTE_FMT_TAIL(__VA_ARGS__,)))
> > +
> > +/* Auxiliary bus iterators */
> > +#define FOREACH_DEVICE_ON_AUXILIARY_BUS(p) \
> > + TAILQ_FOREACH(p, &(auxiliary_bus.device_list), next)
> > +
> > +#define FOREACH_DRIVER_ON_AUXILIARY_BUS(p) \
> > + TAILQ_FOREACH(p, &(auxiliary_bus.driver_list), next)
> > +
> > +bool auxiliary_dev_exists(const char *name);
> > +
> > +/*
> > + * Scan the content of the auxiliary bus, and the devices in the devices
> > + * list.
> > + */
> > +int auxiliary_scan(void);
> > +
> > +/*
> > + * Update a device being scanned.
> > + */
> > +void auxiliary_on_scan(struct rte_auxiliary_device *aux_dev);
> > +
> > +/*
> > + * Validate whether a device with given auxiliary device should be ignored
> > + * or not.
> > + */
> > +bool auxiliary_is_ignored_device(const char *name);
> > +
> > +/*
> > + * Add an auxiliary device to the auxiliary bus (append to auxiliary device
> > + * list). This function also updates the bus references of the auxiliary
> > + * device and the generic device object embedded within.
> > + */
> > +void auxiliary_add_device(struct rte_auxiliary_device *aux_dev);
> > +
> > +/*
> > + * Insert an auxiliary device in the auxiliary bus at a particular location
> > + * in the device list. It also updates the auxiliary bus reference of the
> > + * new devices to be inserted.
> > + */
> > +void auxiliary_insert_device(struct rte_auxiliary_device *exist_aux_dev,
> > + struct rte_auxiliary_device *new_aux_dev);
> > +
> > +/*
> > + * Match the auxiliary driver and device by driver function
>
> Missing full stop.
>
> > + */
> > +bool auxiliary_match(const struct rte_auxiliary_driver *aux_drv,
> > + const struct rte_auxiliary_device *aux_dev);
> > +
> > +/*
> > + * Iterate over devices, matching any device against the provided string
>
> Missing full stop.
>
> > + */
> > +void *auxiliary_dev_iterate(const void *start, const char *str,
> > + const struct rte_dev_iterator *it);
> > +
> > +#endif /* AUXILIARY_PRIVATE_H */
> > diff --git a/drivers/bus/auxiliary/rte_bus_auxiliary.h b/drivers/bus/auxiliary/rte_bus_auxiliary.h
> > new file mode 100644
> > index 0000000000..16b147e387
> > --- /dev/null
> > +++ b/drivers/bus/auxiliary/rte_bus_auxiliary.h
> > @@ -0,0 +1,201 @@
> > +/* SPDX-License-Identifier: BSD-3-Clause
> > + * Copyright (c) 2021 NVIDIA Corporation & Affiliates
> > + */
> > +
> > +#ifndef RTE_BUS_AUXILIARY_H
> > +#define RTE_BUS_AUXILIARY_H
> > +
> > +/**
> > + * @file
> > + *
> > + * Auxiliary Bus Interface.
> > + */
> > +
> > +#ifdef __cplusplus
> > +extern "C" {
> > +#endif
> > +
> > +#include <stdio.h>
> > +#include <stdlib.h>
> > +#include <limits.h>
> > +#include <errno.h>
> > +#include <sys/queue.h>
> > +#include <stdint.h>
> > +#include <inttypes.h>
> > +
> > +#include <rte_debug.h>
> > +#include <rte_interrupts.h>
> > +#include <rte_dev.h>
> > +#include <rte_bus.h>
> > +#include <rte_kvargs.h>
> > +
> > +#define RTE_BUS_AUXILIARY_NAME "auxiliary"
> > +
> > +/* Forward declarations */
> > +struct rte_auxiliary_driver;
> > +struct rte_auxiliary_bus;
> > +struct rte_auxiliary_device;
> > +
> > +/**
> > + * Match function for the driver to decide if device can be handled.
> > + *
> > + * @param name
> > + * Pointer to the auxiliary device name.
> > + * @return
> > + * Whether the driver can handle the auxiliary device.
> > + */
> > +typedef bool(rte_auxiliary_match_t)(const char *name);
> > +
> > +/**
> > + * Initialization function for the driver called during auxiliary probing.
> > + *
> > + * @param drv
> > + * Pointer to the auxiliary driver.
> > + * @param dev
> > + * Pointer to the auxiliary device.
> > + * @return
> > + * - 0 On success.
> > + * - Negative value and rte_errno is set otherwise.
> > + */
> > +typedef int(rte_auxiliary_probe_t)(struct rte_auxiliary_driver *drv,
> > + struct rte_auxiliary_device *dev);
> > +
> > +/**
> > + * Uninitialization function for the driver called during hotplugging.
> > + *
> > + * @param dev
> > + * Pointer to the auxiliary device.
> > + * @return
> > + * - 0 On success.
> > + * - Negative value and rte_errno is set otherwise.
> > + */
> > +typedef int (rte_auxiliary_remove_t)(struct rte_auxiliary_device *dev);
> > +
> > +/**
> > + * Driver-specific DMA mapping. After a successful call the device
> > + * will be able to read/write from/to this segment.
> > + *
> > + * @param dev
> > + * Pointer to the auxiliary device.
> > + * @param addr
> > + * Starting virtual address of memory to be mapped.
> > + * @param iova
> > + * Starting IOVA address of memory to be mapped.
> > + * @param len
> > + * Length of memory segment being mapped.
> > + * @return
> > + * - 0 On success.
> > + * - Negative value and rte_errno is set otherwise.
> > + */
> > +typedef int (rte_auxiliary_dma_map_t)(struct rte_auxiliary_device *dev,
> > + void *addr, uint64_t iova, size_t len);
> > +
> > +/**
> > + * Driver-specific DMA un-mapping. After a successful call the device
> > + * will not be able to read/write from/to this segment.
> > + *
> > + * @param dev
> > + * Pointer to the auxiliary device.
> > + * @param addr
> > + * Starting virtual address of memory to be unmapped.
> > + * @param iova
> > + * Starting IOVA address of memory to be unmapped.
> > + * @param len
> > + * Length of memory segment being unmapped.
> > + * @return
> > + * - 0 On success.
> > + * - Negative value and rte_errno is set otherwise.
> > + */
> > +typedef int (rte_auxiliary_dma_unmap_t)(struct rte_auxiliary_device *dev,
> > + void *addr, uint64_t iova, size_t len);
> > +
> > +/**
> > + * A structure describing an auxiliary device.
> > + */
> > +struct rte_auxiliary_device {
> > + TAILQ_ENTRY(rte_auxiliary_device) next; /**< Next probed device. */
> > + struct rte_device device; /**< Inherit core device */
> > + char name[RTE_DEV_NAME_MAX_LEN + 1]; /**< ASCII device name */
> > + struct rte_intr_handle intr_handle; /**< Interrupt handle */
> > + struct rte_auxiliary_driver *driver; /**< Device driver */
> > +};
> > +
> > +/** List of auxiliary devices */
> > +TAILQ_HEAD(rte_auxiliary_device_list, rte_auxiliary_device);
> > +/** List of auxiliary drivers */
> > +TAILQ_HEAD(rte_auxiliary_driver_list, rte_auxiliary_driver);
>
> Shouldn't we hide rte_auxiliary_device inside the library take
> API/ABI stability into account? Or will be it DPDK internal anyway? If
> so, it should be done INTERNAL from the very
> beginning.
>
> > +
> > +/**
> > + * Structure describing the auxiliary bus
> > + */
> > +struct rte_auxiliary_bus {
> > + struct rte_bus bus; /**< Inherit the generic class */
> > + struct rte_auxiliary_device_list device_list; /**< List of devices */
> > + struct rte_auxiliary_driver_list driver_list; /**< List of drivers */
> > +};
>
> It looks internal. The following forward declaration should be
> sufficient to build.
>
> struct rte_auxiliary_bus;
>
>
> > +
> > +/**
> > + * A structure describing an auxiliary driver.
> > + */
> > +struct rte_auxiliary_driver {
> > + TAILQ_ENTRY(rte_auxiliary_driver) next; /**< Next in list. */
> > + struct rte_driver driver; /**< Inherit core driver. */
> > + struct rte_auxiliary_bus *bus; /**< Auxiliary bus reference. */
> > + rte_auxiliary_match_t *match; /**< Device match function. */
> > + rte_auxiliary_probe_t *probe; /**< Device probe function. */
> > + rte_auxiliary_remove_t *remove; /**< Device remove function. */
> > + rte_auxiliary_dma_map_t *dma_map; /**< Device DMA map function. */
> > + rte_auxiliary_dma_unmap_t *dma_unmap; /**< Device DMA unmap function. */
> > + uint32_t drv_flags; /**< Flags RTE_AUXILIARY_DRV_*. */
> > +};
> > +
> > +/**
> > + * @internal
> > + * Helper macro for drivers that need to convert to struct rte_auxiliary_device.
> > + */
> > +#define RTE_DEV_TO_AUXILIARY(ptr) \
> > + container_of(ptr, struct rte_auxiliary_device, device)
> > +
> > +#define RTE_DEV_TO_AUXILIARY_CONST(ptr) \
> > + container_of(ptr, const struct rte_auxiliary_device, device)
> > +
> > +#define RTE_ETH_DEV_TO_AUXILIARY(eth_dev) \
> > + RTE_DEV_TO_AUXILIARY((eth_dev)->device)
> > +
> > +/** Device driver needs IOVA as VA and cannot work with IOVA as PA */
> > +#define RTE_AUXILIARY_DRV_NEED_IOVA_AS_VA 0x002
> > +
> > +/**
>
> Don't we need EXPERIMENTAL notice here?
>
> > + * Register an auxiliary driver.
> > + *
> > + * @param driver
> > + * A pointer to a rte_auxiliary_driver structure describing the driver
> > + * to be registered.
> > + */
> > +__rte_experimental
> > +void rte_auxiliary_register(struct rte_auxiliary_driver *driver);
> > +
> > +/** Helper for auxiliary device registration from driver instance */
> > +#define RTE_PMD_REGISTER_AUXILIARY(nm, auxiliary_drv) \
> > + RTE_INIT(auxiliaryinitfn_ ##nm) \
> > + { \
> > + (auxiliary_drv).driver.name = RTE_STR(nm); \
> > + rte_auxiliary_register(&(auxiliary_drv)); \
> > + } \
> > + RTE_PMD_EXPORT_NAME(nm, __COUNTER__)
> > +
> > +/**
>
> Don't we need EXPERIMENTAL notice here?
>
> > + * Unregister an auxiliary driver.
> > + *
> > + * @param driver
> > + * A pointer to a rte_auxiliary_driver structure describing the driver
> > + * to be unregistered.
> > + */
> > +__rte_experimental
> > +void rte_auxiliary_unregister(struct rte_auxiliary_driver *driver);
> > +
> > +#ifdef __cplusplus
> > +}
> > +#endif
> > +
> > +#endif /* RTE_BUS_AUXILIARY_H */
> > diff --git a/drivers/bus/auxiliary/version.map b/drivers/bus/auxiliary/version.map
> > new file mode 100644
> > index 0000000000..a52260657c
> > --- /dev/null
> > +++ b/drivers/bus/auxiliary/version.map
> > @@ -0,0 +1,7 @@
> > +EXPERIMENTAL {
> > + global:
> > +
> > + # added in 21.08
> > + rte_auxiliary_register;
> > + rte_auxiliary_unregister;
> > +};
> > diff --git a/drivers/bus/meson.build b/drivers/bus/meson.build
> > index 410058de3a..45eab5233d 100644
> > --- a/drivers/bus/meson.build
> > +++ b/drivers/bus/meson.build
> > @@ -2,6 +2,7 @@
> > # Copyright(c) 2017 Intel Corporation
> >
> > drivers = [
> > + 'auxiliary',
> > 'dpaa',
> > 'fslmc',
> > 'ifpga',
> >
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH v3 19/20] net/sfc: support flow action COUNT in transfer rules
@ 2021-07-04 19:45 3% ` Thomas Monjalon
2021-07-05 8:41 0% ` Andrew Rybchenko
0 siblings, 1 reply; 200+ results
From: Thomas Monjalon @ 2021-07-04 19:45 UTC (permalink / raw)
To: Andrew Rybchenko
Cc: David Marchand, Bruce Richardson, dev, Igor Romanov,
Andy Moreton, Ivan Malov
02/07/2021 14:53, Andrew Rybchenko:
> On 7/2/21 3:30 PM, Thomas Monjalon wrote:
> > 02/07/2021 10:43, Andrew Rybchenko:
> >> On 7/1/21 4:05 PM, Andrew Rybchenko wrote:
> >>> On 7/1/21 3:34 PM, David Marchand wrote:
> >>>> On Thu, Jul 1, 2021 at 11:22 AM Andrew Rybchenko
> >>>> <andrew.rybchenko@oktetlabs.ru> wrote:
> >>>>> The build works fine for me on FC34, but it has
> >>>>> libatomic-11.1.1-3.fc34.x86_64 installed.
> >>>>
> >>>> I first produced the issue on my "old" FC32.
> >>>> Afaics, for FC33 and later, gcc now depends on libatomic and the
> >>>> problem won't be noticed.
> >>>> FC32 and before are EOL, but I then reproduced the issue on RHEL 8
> >>>> (and Intel CI reported it on Centos 8 too).
> >>>
> >>> I see. Thanks for the clarification.
> >>>
> >>>>>
> >>>>> I'd like to understand what we're trying to solve here.
> >>>>> Are we trying to make meson to report the missing library
> >>>>> correctly?
> >>>>>
> >>>>> If so, I think I can do simple check using cc.links()
> >>>>> which will fail if the library is not found. I'll
> >>>>> test that it works as expected if the library is not
> >>>>> completely installed.
> >>>>>
> >>>>
> >>>> I tried below diff, and it works for me.
> >>>> "works" as in net/sfc gets disabled without libatomic installed:
> > [...]
> >>>> # for gcc compiles we need -latomic for 128-bit atomic ops
> >>>> if cc.get_id() == 'gcc'
> >>>> + code = '''#include <stdio.h>
> >>>> + void main() { printf("Atomilink me.\n"); }
> >>>> + '''
> >>>> + if not cc.links(code, args: '-latomic', name: 'libatomic link check')
> >>>> + build = false
> >>>> + reason = 'missing dependency, "libatomic"'
> >>>> + subdir_done()
> >>>> + endif
> >>>> ext_deps += cc.find_library('atomic')
> >>>> endif
> >>>
> >>> Many thanks, LGTM. I'll pick it up and add comments why
> >>> it is checked this way.
> >>>
> >>
> >> I've send v4 with the problem fixed. However, I'm afraid
> >> build test systems should be updated to have libatomic
> >> correctly installed. Otherwise, they do not really check
> >> net/sfc build.
> >
> > When testing on old systems, sfc won't be tested anymore after this patchset.
> > On recent systems, sfc should be enabled I guess.
> > I don't see how to manage better, sorry.
> >
>
> I see. I thought that it is possible to install missing
> package on corresponding systems to make build coverage
> better.
>
> Now I automatically test build on problematic distros
> with previously missing packages installed. So I have
> internal build coverage anyway.
David asked for installing libatomic:
https://inbox.dpdk.org/ci/CAJFAV8xCNBL4yEZU0c=dJGYS+13QM7Uz7e2qnUkMuM7eaKKw+Q@mail.gmail.com/
We should wait for it to be installed otherwise ABI check will fail.
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [PATCH v6 2/2] bus/auxiliary: introduce auxiliary bus
@ 2021-07-04 16:13 3% ` Andrew Rybchenko
2021-07-05 5:47 0% ` Xueming(Steven) Li
0 siblings, 1 reply; 200+ results
From: Andrew Rybchenko @ 2021-07-04 16:13 UTC (permalink / raw)
To: Xueming Li; +Cc: dev, Wang Haiyue, Thomas Monjalon, Kinsella Ray, Neil Horman
On 6/25/21 2:47 PM, Xueming Li wrote:
> Auxiliary bus [1] provides a way to split function into child-devices
> representing sub-domains of functionality. Each auxiliary device
> represents a part of its parent functionality.
>
> Auxiliary device is identified by unique device name, sysfs path:
> /sys/bus/auxiliary/devices/<name>
>
> Devargs legacy syntax ofauxiliary device:
Missing space after 'of'
> -a auxiliary:<name>[,args...]
> Devargs generic syntax of auxiliary device:
> -a bus=auxiliary,name=<name>,,/class=<classs>,,/driver=<driver>,,
Are two commas above intentionall? What for?
>
> [1] kernel auxiliary bus document:
> https://www.kernel.org/doc/html/latest/driver-api/auxiliary_bus.html
>
> Signed-off-by: Xueming Li <xuemingl@nvidia.com>
With my below notes fixed:
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
> Cc: Wang Haiyue <haiyue.wang@intel.com>
> Cc: Thomas Monjalon <thomas@monjalon.net>
> Cc: Kinsella Ray <mdr@ashroe.eu>
> ---
> MAINTAINERS | 5 +
> doc/guides/rel_notes/release_21_08.rst | 6 +
> drivers/bus/auxiliary/auxiliary_common.c | 411 ++++++++++++++++++++++
> drivers/bus/auxiliary/auxiliary_params.c | 59 ++++
> drivers/bus/auxiliary/linux/auxiliary.c | 141 ++++++++
> drivers/bus/auxiliary/meson.build | 16 +
> drivers/bus/auxiliary/private.h | 74 ++++
> drivers/bus/auxiliary/rte_bus_auxiliary.h | 201 +++++++++++
> drivers/bus/auxiliary/version.map | 7 +
> drivers/bus/meson.build | 1 +
> 10 files changed, 921 insertions(+)
> create mode 100644 drivers/bus/auxiliary/auxiliary_common.c
> create mode 100644 drivers/bus/auxiliary/auxiliary_params.c
> create mode 100644 drivers/bus/auxiliary/linux/auxiliary.c
> create mode 100644 drivers/bus/auxiliary/meson.build
> create mode 100644 drivers/bus/auxiliary/private.h
> create mode 100644 drivers/bus/auxiliary/rte_bus_auxiliary.h
> create mode 100644 drivers/bus/auxiliary/version.map
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 5877a16971..eaf691ca6a 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -525,6 +525,11 @@ F: doc/guides/mempool/octeontx2.rst
> Bus Drivers
> -----------
>
> +Auxiliary bus driver
Shouldn't it be EXPERIMENTAL?
> +M: Parav Pandit <parav@nvidia.com>
> +M: Xueming Li <xuemingl@nvidia.com>
> +F: drivers/bus/auxiliary/
> +
> Intel FPGA bus
> M: Rosen Xu <rosen.xu@intel.com>
> F: drivers/bus/ifpga/
> diff --git a/doc/guides/rel_notes/release_21_08.rst b/doc/guides/rel_notes/release_21_08.rst
> index a6ecfdf3ce..e7ef4c8a05 100644
> --- a/doc/guides/rel_notes/release_21_08.rst
> +++ b/doc/guides/rel_notes/release_21_08.rst
> @@ -55,6 +55,12 @@ New Features
> Also, make sure to start the actual text at the margin.
> =======================================================
>
> +* **Added auxiliary bus support.**
> +
> + Auxiliary bus provides a way to split function into child-devices
> + representing sub-domains of functionality. Each auxiliary device
> + represents a part of its parent functionality.
> +
>
> Removed Items
> -------------
> diff --git a/drivers/bus/auxiliary/auxiliary_common.c b/drivers/bus/auxiliary/auxiliary_common.c
> new file mode 100644
> index 0000000000..8a75306da5
> --- /dev/null
> +++ b/drivers/bus/auxiliary/auxiliary_common.c
> @@ -0,0 +1,411 @@
> +/* SPDX-License-Identifier: BSD-3-Clause
> + * Copyright (c) 2021 NVIDIA Corporation & Affiliates
> + */
> +
> +#include <string.h>
> +#include <inttypes.h>
> +#include <stdint.h>
> +#include <stdbool.h>
> +#include <stdlib.h>
> +#include <stdio.h>
> +#include <sys/queue.h>
> +#include <rte_errno.h>
> +#include <rte_interrupts.h>
> +#include <rte_log.h>
> +#include <rte_bus.h>
> +#include <rte_per_lcore.h>
> +#include <rte_memory.h>
> +#include <rte_eal.h>
> +#include <rte_eal_paging.h>
> +#include <rte_string_fns.h>
> +#include <rte_common.h>
> +#include <rte_devargs.h>
> +
> +#include "private.h"
> +#include "rte_bus_auxiliary.h"
> +
> +static struct rte_devargs *
> +auxiliary_devargs_lookup(const char *name)
> +{
> + struct rte_devargs *devargs;
> +
> + RTE_EAL_DEVARGS_FOREACH(RTE_BUS_AUXILIARY_NAME, devargs) {
> + if (strcmp(devargs->name, name) == 0)
> + return devargs;
> + }
> + return NULL;
> +}
> +
> +/*
> + * Test whether the auxiliary device exist
Missing full stop above.
> + *
> + * Stub for OS not supporting auxiliary bus.
> + */
> +__rte_weak bool
> +auxiliary_dev_exists(const char *name)
> +{
> + RTE_SET_USED(name);
> + return false;
> +}
> +
> +/*
> + * Scan the devices in the auxiliary bus.
> + *
> + * Stub for OS not supporting auxiliary bus.
> + */
> +__rte_weak int
> +auxiliary_scan(void)
> +{
> + return 0;
> +}
> +
> +/*
> + * Update a device's devargs being scanned.
> + *
> + * @param aux_dev
> + * AUXILIARY device.
> + */
> +void
> +auxiliary_on_scan(struct rte_auxiliary_device *aux_dev)
> +{
> + aux_dev->device.devargs = auxiliary_devargs_lookup(aux_dev->name);
> +}
> +
> +/*
> + * Match the auxiliary driver and device using driver function.
> + */
> +bool
> +auxiliary_match(const struct rte_auxiliary_driver *aux_drv,
> + const struct rte_auxiliary_device *aux_dev)
> +{
> + if (aux_drv->match == NULL)
> + return false;
> + return aux_drv->match(aux_dev->name);
> +}
> +
> +/*
> + * Call the probe() function of the driver.
> + */
> +static int
> +rte_auxiliary_probe_one_driver(struct rte_auxiliary_driver *drv,
> + struct rte_auxiliary_device *dev)
> +{
> + enum rte_iova_mode iova_mode;
> + int ret;
> +
> + if ((drv == NULL) || (dev == NULL))
Unnecessary internal parenthesis.
> + return -EINVAL;
> +
> + /* Check if driver supports it. */
> + if (!auxiliary_match(drv, dev))
> + /* Match of device and driver failed */
> + return 1;
> +
> + /* No initialization when marked as blocked, return without error. */
> + if (dev->device.devargs != NULL &&
> + dev->device.devargs->policy == RTE_DEV_BLOCKED) {
> + AUXILIARY_LOG(INFO, "Device is blocked, not initializing");
> + return -1;
> + }
> +
> + if (dev->device.numa_node < 0) {
> + AUXILIARY_LOG(INFO, "Device is not NUMA-aware, defaulting socket to 0");
socket -> NUMA node
> + dev->device.numa_node = 0;
> + }
> +
> + iova_mode = rte_eal_iova_mode();
> + if ((drv->drv_flags & RTE_AUXILIARY_DRV_NEED_IOVA_AS_VA) > 0 &&
> + iova_mode != RTE_IOVA_VA) {
> + AUXILIARY_LOG(ERR, "Driver %s expecting VA IOVA mode but current mode is PA, not initializing",
> + drv->driver.name);
> + return -EINVAL;
> + }
> +
> + dev->driver = drv;
> +
> + AUXILIARY_LOG(INFO, "Probe auxiliary driver: %s device: %s (socket %i)",
socket -> NUMA node
> + drv->driver.name, dev->name, dev->device.numa_node);
> + ret = drv->probe(drv, dev);
> + if (ret != 0)
> + dev->driver = NULL;
> + else
> + dev->device.driver = &drv->driver;
> +
> + return ret;
> +}
> +
> +/*
> + * Call the remove() function of the driver.
> + */
> +static int
> +rte_auxiliary_driver_remove_dev(struct rte_auxiliary_device *dev)
> +{
> + struct rte_auxiliary_driver *drv;
> + int ret = 0;
> +
> + if (dev == NULL)
> + return -EINVAL;
> +
> + drv = dev->driver;
> +
> + AUXILIARY_LOG(DEBUG, "Driver %s remove auxiliary device %s on NUMA socket %i",
socket -> node
> + drv->driver.name, dev->name, dev->device.numa_node);
> +
> + if (drv->remove != NULL) {
> + ret = drv->remove(dev);
> + if (ret < 0)
> + return ret;
> + }
> +
> + /* clear driver structure */
> + dev->driver = NULL;
> + dev->device.driver = NULL;
> +
> + return 0;
> +}
> +
> +/*
> + * Call the probe() function of all registered driver for the given device.
> + * Return < 0 if initialization failed.
> + * Return 1 if no driver is found for this device.
> + */
> +static int
> +auxiliary_probe_all_drivers(struct rte_auxiliary_device *dev)
> +{
> + struct rte_auxiliary_driver *drv;
> + int rc;
> +
> + if (dev == NULL)
> + return -EINVAL;
> +
> + FOREACH_DRIVER_ON_AUXILIARY_BUS(drv) {
> + if (!drv->match(dev->name))
> + continue;
> +
> + rc = rte_auxiliary_probe_one_driver(drv, dev);
> + if (rc < 0)
> + /* negative value is an error */
> + return rc;
> + if (rc > 0)
> + /* positive value means driver doesn't support it */
> + continue;
> + return 0;
> + }
> + return 1;
> +}
> +
> +/*
> + * Scan the content of the auxiliary bus, and call the probe function for
> + * all registered drivers to try to probe discovered devices.
> + */
> +static int
> +auxiliary_probe(void)
> +{
> + struct rte_auxiliary_device *dev = NULL;
> + size_t probed = 0, failed = 0;
> + int ret = 0;
> +
> + FOREACH_DEVICE_ON_AUXILIARY_BUS(dev) {
> + probed++;
> +
> + ret = auxiliary_probe_all_drivers(dev);
> + if (ret < 0) {
> + if (ret != -EEXIST) {
> + AUXILIARY_LOG(ERR, "Requested device %s cannot be used",
> + dev->name);
> + rte_errno = errno;
> + failed++;
> + }
> + ret = 0;
> + }
> + }
> +
> + return (probed && probed == failed) ? -1 : 0;
> +}
> +
> +static int
> +auxiliary_parse(const char *name, void *addr)
> +{
> + struct rte_auxiliary_driver *drv = NULL;
> + const char **out = addr;
> +
> + /* Allow empty device name "auxiliary:" to bypass entire bus scan. */
> + if (strlen(name) == 0)
> + return 0;
> +
> + FOREACH_DRIVER_ON_AUXILIARY_BUS(drv) {
> + if (drv->match(name))
> + break;
> + }
> + if (drv != NULL && addr != NULL)
> + *out = name;
> + return drv != NULL ? 0 : -1;
> +}
> +
> +/* Register a driver */
> +void
> +rte_auxiliary_register(struct rte_auxiliary_driver *driver)
> +{
> + TAILQ_INSERT_TAIL(&auxiliary_bus.driver_list, driver, next);
> + driver->bus = &auxiliary_bus;
> +}
> +
> +/* Unregister a driver */
> +void
> +rte_auxiliary_unregister(struct rte_auxiliary_driver *driver)
> +{
> + TAILQ_REMOVE(&auxiliary_bus.driver_list, driver, next);
> + driver->bus = NULL;
> +}
> +
> +/* Add a device to auxiliary bus */
> +void
> +auxiliary_add_device(struct rte_auxiliary_device *aux_dev)
> +{
> + TAILQ_INSERT_TAIL(&auxiliary_bus.device_list, aux_dev, next);
> +}
> +
> +/* Insert a device into a predefined position in auxiliary bus */
> +void
> +auxiliary_insert_device(struct rte_auxiliary_device *exist_aux_dev,
> + struct rte_auxiliary_device *new_aux_dev)
> +{
> + TAILQ_INSERT_BEFORE(exist_aux_dev, new_aux_dev, next);
> +}
> +
> +/* Remove a device from auxiliary bus */
> +static void
> +rte_auxiliary_remove_device(struct rte_auxiliary_device *auxiliary_dev)
> +{
> + TAILQ_REMOVE(&auxiliary_bus.device_list, auxiliary_dev, next);
> +}
> +
> +static struct rte_device *
> +auxiliary_find_device(const struct rte_device *start, rte_dev_cmp_t cmp,
> + const void *data)
> +{
> + const struct rte_auxiliary_device *pstart;
> + struct rte_auxiliary_device *adev;
> +
> + if (start != NULL) {
> + pstart = RTE_DEV_TO_AUXILIARY_CONST(start);
> + adev = TAILQ_NEXT(pstart, next);
> + } else {
> + adev = TAILQ_FIRST(&auxiliary_bus.device_list);
> + }
> + while (adev != NULL) {
> + if (cmp(&adev->device, data) == 0)
> + return &adev->device;
> + adev = TAILQ_NEXT(adev, next);
> + }
> + return NULL;
> +}
> +
> +static int
> +auxiliary_plug(struct rte_device *dev)
> +{
> + if (!auxiliary_dev_exists(dev->name))
> + return -ENOENT;
> + return auxiliary_probe_all_drivers(RTE_DEV_TO_AUXILIARY(dev));
> +}
> +
> +static int
> +auxiliary_unplug(struct rte_device *dev)
> +{
> + struct rte_auxiliary_device *adev;
> + int ret;
> +
> + adev = RTE_DEV_TO_AUXILIARY(dev);
> + ret = rte_auxiliary_driver_remove_dev(adev);
> + if (ret == 0) {
> + rte_auxiliary_remove_device(adev);
> + rte_devargs_remove(dev->devargs);
> + free(adev);
> + }
> + return ret;
> +}
> +
> +static int
> +auxiliary_dma_map(struct rte_device *dev, void *addr, uint64_t iova, size_t len)
> +{
> + struct rte_auxiliary_device *aux_dev = RTE_DEV_TO_AUXILIARY(dev);
> +
> + if (dev == NULL || aux_dev->driver == NULL) {
> + rte_errno = EINVAL;
> + return -1;
> + }
> + if (aux_dev->driver->dma_map == NULL) {
> + rte_errno = ENOTSUP;
> + return -1;
> + }
> + return aux_dev->driver->dma_map(aux_dev, addr, iova, len);
> +}
> +
> +static int
> +auxiliary_dma_unmap(struct rte_device *dev, void *addr, uint64_t iova,
> + size_t len)
> +{
> + struct rte_auxiliary_device *aux_dev = RTE_DEV_TO_AUXILIARY(dev);
> +
> + if (dev == NULL || aux_dev->driver == NULL) {
> + rte_errno = EINVAL;
> + return -1;
> + }
> + if (aux_dev->driver->dma_unmap == NULL) {
> + rte_errno = ENOTSUP;
> + return -1;
> + }
> + return aux_dev->driver->dma_unmap(aux_dev, addr, iova, len);
> +}
> +
> +bool
> +auxiliary_is_ignored_device(const char *name)
> +{
> + struct rte_devargs *devargs = auxiliary_devargs_lookup(name);
> +
> + switch (auxiliary_bus.bus.conf.scan_mode) {
> + case RTE_BUS_SCAN_ALLOWLIST:
> + if (devargs && devargs->policy == RTE_DEV_ALLOWED)
> + return false;
> + break;
> + case RTE_BUS_SCAN_UNDEFINED:
> + case RTE_BUS_SCAN_BLOCKLIST:
> + if (devargs == NULL || devargs->policy != RTE_DEV_BLOCKED)
> + return false;
> + break;
> + }
> + return true;
> +}
> +
> +static enum rte_iova_mode
> +auxiliary_get_iommu_class(void)
> +{
> + const struct rte_auxiliary_driver *drv;
> +
> + FOREACH_DRIVER_ON_AUXILIARY_BUS(drv) {
> + if ((drv->drv_flags & RTE_AUXILIARY_DRV_NEED_IOVA_AS_VA) > 0)
> + return RTE_IOVA_VA;
> + }
> +
> + return RTE_IOVA_DC;
> +}
> +
> +struct rte_auxiliary_bus auxiliary_bus = {
> + .bus = {
> + .scan = auxiliary_scan,
> + .probe = auxiliary_probe,
> + .find_device = auxiliary_find_device,
> + .plug = auxiliary_plug,
> + .unplug = auxiliary_unplug,
> + .parse = auxiliary_parse,
> + .dma_map = auxiliary_dma_map,
> + .dma_unmap = auxiliary_dma_unmap,
> + .get_iommu_class = auxiliary_get_iommu_class,
> + .dev_iterate = auxiliary_dev_iterate,
> + },
> + .device_list = TAILQ_HEAD_INITIALIZER(auxiliary_bus.device_list),
> + .driver_list = TAILQ_HEAD_INITIALIZER(auxiliary_bus.driver_list),
> +};
> +
> +RTE_REGISTER_BUS(auxiliary, auxiliary_bus.bus);
> +RTE_LOG_REGISTER_DEFAULT(auxiliary_bus_logtype, NOTICE);
> diff --git a/drivers/bus/auxiliary/auxiliary_params.c b/drivers/bus/auxiliary/auxiliary_params.c
> new file mode 100644
> index 0000000000..cd3fa56cb4
> --- /dev/null
> +++ b/drivers/bus/auxiliary/auxiliary_params.c
> @@ -0,0 +1,59 @@
> +/* SPDX-License-Identifier: BSD-3-Clause
> + * Copyright (c) 2021 NVIDIA Corporation & Affiliates
> + */
> +
> +#include <string.h>
> +
> +#include <rte_bus.h>
> +#include <rte_dev.h>
> +#include <rte_errno.h>
> +#include <rte_kvargs.h>
> +
> +#include "private.h"
> +#include "rte_bus_auxiliary.h"
> +
> +enum auxiliary_params {
> + RTE_AUXILIARY_PARAM_NAME,
> +};
> +
> +static const char * const auxiliary_params_keys[] = {
> + [RTE_AUXILIARY_PARAM_NAME] = "name",
> +};
> +
> +static int
> +auxiliary_dev_match(const struct rte_device *dev,
> + const void *_kvlist)
> +{
> + const struct rte_kvargs *kvlist = _kvlist;
> + int ret;
> +
> + ret = rte_kvargs_process(kvlist,
> + auxiliary_params_keys[RTE_AUXILIARY_PARAM_NAME],
> + rte_kvargs_strcmp, (void *)(uintptr_t)dev->name);
> +
> + return ret != 0 ? -1 : 0;
> +}
> +
> +void *
> +auxiliary_dev_iterate(const void *start,
> + const char *str,
> + const struct rte_dev_iterator *it __rte_unused)
> +{
> + rte_bus_find_device_t find_device;
> + struct rte_kvargs *kvargs = NULL;
> + struct rte_device *dev;
> +
> + if (str != NULL) {
> + kvargs = rte_kvargs_parse(str, auxiliary_params_keys);
> + if (kvargs == NULL) {
> + AUXILIARY_LOG(ERR, "cannot parse argument list %s",
> + str);
> + rte_errno = EINVAL;
> + return NULL;
> + }
> + }
> + find_device = auxiliary_bus.bus.find_device;
> + dev = find_device(start, auxiliary_dev_match, kvargs);
> + rte_kvargs_free(kvargs);
> + return dev;
> +}
> diff --git a/drivers/bus/auxiliary/linux/auxiliary.c b/drivers/bus/auxiliary/linux/auxiliary.c
> new file mode 100644
> index 0000000000..8464487971
> --- /dev/null
> +++ b/drivers/bus/auxiliary/linux/auxiliary.c
> @@ -0,0 +1,141 @@
> +/* SPDX-License-Identifier: BSD-3-Clause
> + * Copyright (c) 2021 NVIDIA Corporation & Affiliates
> + */
> +
> +#include <string.h>
> +#include <dirent.h>
> +
> +#include <rte_log.h>
> +#include <rte_bus.h>
> +#include <rte_malloc.h>
> +#include <rte_devargs.h>
> +#include <rte_memcpy.h>
> +#include <eal_filesystem.h>
> +
> +#include "../rte_bus_auxiliary.h"
> +#include "../private.h"
> +
> +#define AUXILIARY_SYSFS_PATH "/sys/bus/auxiliary/devices"
> +
> +/* Scan one auxiliary sysfs entry, and fill the devices list from it. */
> +static int
> +auxiliary_scan_one(const char *dirname, const char *name)
> +{
> + struct rte_auxiliary_device *dev;
> + struct rte_auxiliary_device *dev2;
> + char filename[PATH_MAX];
> + unsigned long tmp;
> + int ret;
> +
> + dev = malloc(sizeof(*dev));
> + if (dev == NULL)
> + return -1;
> +
> + memset(dev, 0, sizeof(*dev));
> + if (rte_strscpy(dev->name, name, sizeof(dev->name)) < 0) {
> + free(dev);
> + return -1;
> + }
> + dev->device.name = dev->name;
> + dev->device.bus = &auxiliary_bus.bus;
> +
> + /* Get NUMA node, default to 0 if not present */
> + snprintf(filename, sizeof(filename), "%s/%s/numa_node",
> + dirname, name);
> + if (access(filename, F_OK) != -1) {
> + if (eal_parse_sysfs_value(filename, &tmp) == 0)
> + dev->device.numa_node = tmp;
> + else
> + dev->device.numa_node = -1;
> + } else {
> + dev->device.numa_node = 0;
> + }
> +
> + auxiliary_on_scan(dev);
> +
> + /* Device is valid, add in list (sorted) */
> + TAILQ_FOREACH(dev2, &auxiliary_bus.device_list, next) {
> + ret = strcmp(dev->name, dev2->name);
> + if (ret > 0)
> + continue;
> + if (ret < 0) {
> + auxiliary_insert_device(dev2, dev);
> + } else { /* already registered */
> + if (rte_dev_is_probed(&dev2->device) &&
> + dev2->device.devargs != dev->device.devargs) {
> + /* To probe device with new devargs. */
> + rte_devargs_remove(dev2->device.devargs);
> + auxiliary_on_scan(dev2);
> + }
> + free(dev);
> + }
> + return 0;
> + }
> + auxiliary_add_device(dev);
> + return 0;
> +}
> +
> +/*
> + * Test whether the auxiliary device exist
Missing full stop above.
> + */
> +bool
> +auxiliary_dev_exists(const char *name)
> +{
> + DIR *dir;
> + char dirname[PATH_MAX];
> +
> + snprintf(dirname, sizeof(dirname), "%s/%s",
> + AUXILIARY_SYSFS_PATH, name);
> + dir = opendir(dirname);
> + if (dir == NULL)
> + return false;
> + closedir(dir);
> + return true;
> +}
> +
> +/*
> + * Scan the devices in the auxiliary bus
Missing full stop above.
> + */
> +int
> +auxiliary_scan(void)
> +{
> + struct dirent *e;
> + DIR *dir;
> + char dirname[PATH_MAX];
> + struct rte_auxiliary_driver *drv;
> +
> + dir = opendir(AUXILIARY_SYSFS_PATH);
> + if (dir == NULL) {
> + AUXILIARY_LOG(INFO, "%s not found, is auxiliary module loaded?",
> + AUXILIARY_SYSFS_PATH);
> + return 0;
> + }
> +
> + while ((e = readdir(dir)) != NULL) {
> + if (e->d_name[0] == '.')
> + continue;
> +
> + if (auxiliary_is_ignored_device(e->d_name))
> + continue;
> +
> + snprintf(dirname, sizeof(dirname), "%s/%s",
> + AUXILIARY_SYSFS_PATH, e->d_name);
> +
> + /* Ignore if no driver can handle. */
> + FOREACH_DRIVER_ON_AUXILIARY_BUS(drv) {
> + if (drv->match(e->d_name))
> + break;
> + }
> + if (drv == NULL)
> + continue;
> +
> + if (auxiliary_scan_one(dirname, e->d_name) < 0)
> + goto error;
> + }
> + closedir(dir);
> + return 0;
> +
> +error:
> + closedir(dir);
> + return -1;
> +}
> diff --git a/drivers/bus/auxiliary/meson.build b/drivers/bus/auxiliary/meson.build
> new file mode 100644
> index 0000000000..357550eff7
> --- /dev/null
> +++ b/drivers/bus/auxiliary/meson.build
> @@ -0,0 +1,16 @@
> +# SPDX-License-Identifier: BSD-3-Clause
> +# Copyright (c) 2021 NVIDIA Corporation & Affiliates
> +
> +headers = files(
> + 'rte_bus_auxiliary.h',
> +)
> +sources = files(
> + 'auxiliary_common.c',
> + 'auxiliary_params.c',
> +)
> +if is_linux
> + sources += files(
> + 'linux/auxiliary.c',
> + )
> +endif
> +deps += ['kvargs']
> diff --git a/drivers/bus/auxiliary/private.h b/drivers/bus/auxiliary/private.h
> new file mode 100644
> index 0000000000..cb3e849993
> --- /dev/null
> +++ b/drivers/bus/auxiliary/private.h
> @@ -0,0 +1,74 @@
> +/* SPDX-License-Identifier: BSD-3-Clause
> + * Copyright (c) 2021 NVIDIA Corporation & Affiliates
> + */
> +
> +#ifndef AUXILIARY_PRIVATE_H
May be add BUS_ prefix at leaat?
> +#define AUXILIARY_PRIVATE_H
> +
> +#include <stdbool.h>
> +#include <stdio.h>
> +
> +#include "rte_bus_auxiliary.h"
> +
> +extern struct rte_auxiliary_bus auxiliary_bus;
> +extern int auxiliary_bus_logtype;
> +
> +#define AUXILIARY_LOG(level, ...) \
> + rte_log(RTE_LOG_ ## level, auxiliary_bus_logtype, \
> + RTE_FMT("auxiliary bus: " RTE_FMT_HEAD(__VA_ARGS__,) "\n", \
> + RTE_FMT_TAIL(__VA_ARGS__,)))
> +
> +/* Auxiliary bus iterators */
> +#define FOREACH_DEVICE_ON_AUXILIARY_BUS(p) \
> + TAILQ_FOREACH(p, &(auxiliary_bus.device_list), next)
> +
> +#define FOREACH_DRIVER_ON_AUXILIARY_BUS(p) \
> + TAILQ_FOREACH(p, &(auxiliary_bus.driver_list), next)
> +
> +bool auxiliary_dev_exists(const char *name);
> +
> +/*
> + * Scan the content of the auxiliary bus, and the devices in the devices
> + * list.
> + */
> +int auxiliary_scan(void);
> +
> +/*
> + * Update a device being scanned.
> + */
> +void auxiliary_on_scan(struct rte_auxiliary_device *aux_dev);
> +
> +/*
> + * Validate whether a device with given auxiliary device should be ignored
> + * or not.
> + */
> +bool auxiliary_is_ignored_device(const char *name);
> +
> +/*
> + * Add an auxiliary device to the auxiliary bus (append to auxiliary device
> + * list). This function also updates the bus references of the auxiliary
> + * device and the generic device object embedded within.
> + */
> +void auxiliary_add_device(struct rte_auxiliary_device *aux_dev);
> +
> +/*
> + * Insert an auxiliary device in the auxiliary bus at a particular location
> + * in the device list. It also updates the auxiliary bus reference of the
> + * new devices to be inserted.
> + */
> +void auxiliary_insert_device(struct rte_auxiliary_device *exist_aux_dev,
> + struct rte_auxiliary_device *new_aux_dev);
> +
> +/*
> + * Match the auxiliary driver and device by driver function
Missing full stop.
> + */
> +bool auxiliary_match(const struct rte_auxiliary_driver *aux_drv,
> + const struct rte_auxiliary_device *aux_dev);
> +
> +/*
> + * Iterate over devices, matching any device against the provided string
Missing full stop.
> + */
> +void *auxiliary_dev_iterate(const void *start, const char *str,
> + const struct rte_dev_iterator *it);
> +
> +#endif /* AUXILIARY_PRIVATE_H */
> diff --git a/drivers/bus/auxiliary/rte_bus_auxiliary.h b/drivers/bus/auxiliary/rte_bus_auxiliary.h
> new file mode 100644
> index 0000000000..16b147e387
> --- /dev/null
> +++ b/drivers/bus/auxiliary/rte_bus_auxiliary.h
> @@ -0,0 +1,201 @@
> +/* SPDX-License-Identifier: BSD-3-Clause
> + * Copyright (c) 2021 NVIDIA Corporation & Affiliates
> + */
> +
> +#ifndef RTE_BUS_AUXILIARY_H
> +#define RTE_BUS_AUXILIARY_H
> +
> +/**
> + * @file
> + *
> + * Auxiliary Bus Interface.
> + */
> +
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +#include <stdio.h>
> +#include <stdlib.h>
> +#include <limits.h>
> +#include <errno.h>
> +#include <sys/queue.h>
> +#include <stdint.h>
> +#include <inttypes.h>
> +
> +#include <rte_debug.h>
> +#include <rte_interrupts.h>
> +#include <rte_dev.h>
> +#include <rte_bus.h>
> +#include <rte_kvargs.h>
> +
> +#define RTE_BUS_AUXILIARY_NAME "auxiliary"
> +
> +/* Forward declarations */
> +struct rte_auxiliary_driver;
> +struct rte_auxiliary_bus;
> +struct rte_auxiliary_device;
> +
> +/**
> + * Match function for the driver to decide if device can be handled.
> + *
> + * @param name
> + * Pointer to the auxiliary device name.
> + * @return
> + * Whether the driver can handle the auxiliary device.
> + */
> +typedef bool(rte_auxiliary_match_t)(const char *name);
> +
> +/**
> + * Initialization function for the driver called during auxiliary probing.
> + *
> + * @param drv
> + * Pointer to the auxiliary driver.
> + * @param dev
> + * Pointer to the auxiliary device.
> + * @return
> + * - 0 On success.
> + * - Negative value and rte_errno is set otherwise.
> + */
> +typedef int(rte_auxiliary_probe_t)(struct rte_auxiliary_driver *drv,
> + struct rte_auxiliary_device *dev);
> +
> +/**
> + * Uninitialization function for the driver called during hotplugging.
> + *
> + * @param dev
> + * Pointer to the auxiliary device.
> + * @return
> + * - 0 On success.
> + * - Negative value and rte_errno is set otherwise.
> + */
> +typedef int (rte_auxiliary_remove_t)(struct rte_auxiliary_device *dev);
> +
> +/**
> + * Driver-specific DMA mapping. After a successful call the device
> + * will be able to read/write from/to this segment.
> + *
> + * @param dev
> + * Pointer to the auxiliary device.
> + * @param addr
> + * Starting virtual address of memory to be mapped.
> + * @param iova
> + * Starting IOVA address of memory to be mapped.
> + * @param len
> + * Length of memory segment being mapped.
> + * @return
> + * - 0 On success.
> + * - Negative value and rte_errno is set otherwise.
> + */
> +typedef int (rte_auxiliary_dma_map_t)(struct rte_auxiliary_device *dev,
> + void *addr, uint64_t iova, size_t len);
> +
> +/**
> + * Driver-specific DMA un-mapping. After a successful call the device
> + * will not be able to read/write from/to this segment.
> + *
> + * @param dev
> + * Pointer to the auxiliary device.
> + * @param addr
> + * Starting virtual address of memory to be unmapped.
> + * @param iova
> + * Starting IOVA address of memory to be unmapped.
> + * @param len
> + * Length of memory segment being unmapped.
> + * @return
> + * - 0 On success.
> + * - Negative value and rte_errno is set otherwise.
> + */
> +typedef int (rte_auxiliary_dma_unmap_t)(struct rte_auxiliary_device *dev,
> + void *addr, uint64_t iova, size_t len);
> +
> +/**
> + * A structure describing an auxiliary device.
> + */
> +struct rte_auxiliary_device {
> + TAILQ_ENTRY(rte_auxiliary_device) next; /**< Next probed device. */
> + struct rte_device device; /**< Inherit core device */
> + char name[RTE_DEV_NAME_MAX_LEN + 1]; /**< ASCII device name */
> + struct rte_intr_handle intr_handle; /**< Interrupt handle */
> + struct rte_auxiliary_driver *driver; /**< Device driver */
> +};
> +
> +/** List of auxiliary devices */
> +TAILQ_HEAD(rte_auxiliary_device_list, rte_auxiliary_device);
> +/** List of auxiliary drivers */
> +TAILQ_HEAD(rte_auxiliary_driver_list, rte_auxiliary_driver);
Shouldn't we hide rte_auxiliary_device inside the library take
API/ABI stability into account? Or will be it DPDK internal anyway? If
so, it should be done INTERNAL from the very
beginning.
> +
> +/**
> + * Structure describing the auxiliary bus
> + */
> +struct rte_auxiliary_bus {
> + struct rte_bus bus; /**< Inherit the generic class */
> + struct rte_auxiliary_device_list device_list; /**< List of devices */
> + struct rte_auxiliary_driver_list driver_list; /**< List of drivers */
> +};
It looks internal. The following forward declaration should be
sufficient to build.
struct rte_auxiliary_bus;
> +
> +/**
> + * A structure describing an auxiliary driver.
> + */
> +struct rte_auxiliary_driver {
> + TAILQ_ENTRY(rte_auxiliary_driver) next; /**< Next in list. */
> + struct rte_driver driver; /**< Inherit core driver. */
> + struct rte_auxiliary_bus *bus; /**< Auxiliary bus reference. */
> + rte_auxiliary_match_t *match; /**< Device match function. */
> + rte_auxiliary_probe_t *probe; /**< Device probe function. */
> + rte_auxiliary_remove_t *remove; /**< Device remove function. */
> + rte_auxiliary_dma_map_t *dma_map; /**< Device DMA map function. */
> + rte_auxiliary_dma_unmap_t *dma_unmap; /**< Device DMA unmap function. */
> + uint32_t drv_flags; /**< Flags RTE_AUXILIARY_DRV_*. */
> +};
> +
> +/**
> + * @internal
> + * Helper macro for drivers that need to convert to struct rte_auxiliary_device.
> + */
> +#define RTE_DEV_TO_AUXILIARY(ptr) \
> + container_of(ptr, struct rte_auxiliary_device, device)
> +
> +#define RTE_DEV_TO_AUXILIARY_CONST(ptr) \
> + container_of(ptr, const struct rte_auxiliary_device, device)
> +
> +#define RTE_ETH_DEV_TO_AUXILIARY(eth_dev) \
> + RTE_DEV_TO_AUXILIARY((eth_dev)->device)
> +
> +/** Device driver needs IOVA as VA and cannot work with IOVA as PA */
> +#define RTE_AUXILIARY_DRV_NEED_IOVA_AS_VA 0x002
> +
> +/**
Don't we need EXPERIMENTAL notice here?
> + * Register an auxiliary driver.
> + *
> + * @param driver
> + * A pointer to a rte_auxiliary_driver structure describing the driver
> + * to be registered.
> + */
> +__rte_experimental
> +void rte_auxiliary_register(struct rte_auxiliary_driver *driver);
> +
> +/** Helper for auxiliary device registration from driver instance */
> +#define RTE_PMD_REGISTER_AUXILIARY(nm, auxiliary_drv) \
> + RTE_INIT(auxiliaryinitfn_ ##nm) \
> + { \
> + (auxiliary_drv).driver.name = RTE_STR(nm); \
> + rte_auxiliary_register(&(auxiliary_drv)); \
> + } \
> + RTE_PMD_EXPORT_NAME(nm, __COUNTER__)
> +
> +/**
Don't we need EXPERIMENTAL notice here?
> + * Unregister an auxiliary driver.
> + *
> + * @param driver
> + * A pointer to a rte_auxiliary_driver structure describing the driver
> + * to be unregistered.
> + */
> +__rte_experimental
> +void rte_auxiliary_unregister(struct rte_auxiliary_driver *driver);
> +
> +#ifdef __cplusplus
> +}
> +#endif
> +
> +#endif /* RTE_BUS_AUXILIARY_H */
> diff --git a/drivers/bus/auxiliary/version.map b/drivers/bus/auxiliary/version.map
> new file mode 100644
> index 0000000000..a52260657c
> --- /dev/null
> +++ b/drivers/bus/auxiliary/version.map
> @@ -0,0 +1,7 @@
> +EXPERIMENTAL {
> + global:
> +
> + # added in 21.08
> + rte_auxiliary_register;
> + rte_auxiliary_unregister;
> +};
> diff --git a/drivers/bus/meson.build b/drivers/bus/meson.build
> index 410058de3a..45eab5233d 100644
> --- a/drivers/bus/meson.build
> +++ b/drivers/bus/meson.build
> @@ -2,6 +2,7 @@
> # Copyright(c) 2017 Intel Corporation
>
> drivers = [
> + 'auxiliary',
> 'dpaa',
> 'fslmc',
> 'ifpga',
>
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [PATCH] dmadev: introduce DMA device library
@ 2021-07-04 9:30 3% ` Jerin Jacob
2021-07-05 10:52 0% ` Bruce Richardson
0 siblings, 1 reply; 200+ results
From: Jerin Jacob @ 2021-07-04 9:30 UTC (permalink / raw)
To: Chengwen Feng
Cc: Thomas Monjalon, Ferruh Yigit, Richardson, Bruce, Jerin Jacob,
dpdk-dev, Morten Brørup, Nipun Gupta, Hemant Agrawal,
Maxime Coquelin, Honnappa Nagarahalli, David Marchand,
Satananda Burla, Prasun Kapoor, Ananyev, Konstantin, liangma,
Radha Mohan Chintakuntla
On Fri, Jul 2, 2021 at 6:51 PM Chengwen Feng <fengchengwen@huawei.com> wrote:
>
> This patch introduces 'dmadevice' which is a generic type of DMA
> device.
>
> The APIs of dmadev library exposes some generic operations which can
> enable configuration and I/O with the DMA devices.
>
> Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Thanks for v1.
I would suggest finalizing lib/dmadev/rte_dmadev.h before doing the
implementation so that you don't need
to waste time on rewoking the implementation.
Comments inline.
> ---
> MAINTAINERS | 4 +
> config/rte_config.h | 3 +
> lib/dmadev/meson.build | 6 +
> lib/dmadev/rte_dmadev.c | 438 +++++++++++++++++++++
> lib/dmadev/rte_dmadev.h | 919 +++++++++++++++++++++++++++++++++++++++++++
> lib/dmadev/rte_dmadev_core.h | 98 +++++
> lib/dmadev/rte_dmadev_pmd.h | 210 ++++++++++
> lib/dmadev/version.map | 32 ++
Missed to update doxygen. See doc/api/doxy-api.conf.in
Use meson -Denable_docs=true to verify the generated doxgen doc.
> lib/meson.build | 1 +
> 9 files changed, 1711 insertions(+)
> create mode 100644 lib/dmadev/meson.build
> create mode 100644 lib/dmadev/rte_dmadev.c
> create mode 100644 lib/dmadev/rte_dmadev.h
> create mode 100644 lib/dmadev/rte_dmadev_core.h
> create mode 100644 lib/dmadev/rte_dmadev_pmd.h
> create mode 100644 lib/dmadev/version.map
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 4347555..2019783 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -496,6 +496,10 @@ F: drivers/raw/skeleton/
> F: app/test/test_rawdev.c
> F: doc/guides/prog_guide/rawdev.rst
>
Add EXPERIMENTAL
> +Dma device API
> +M: Chengwen Feng <fengchengwen@huawei.com>
> +F: lib/dmadev/
> +
>
> new file mode 100644
> index 0000000..a94e839
> --- /dev/null
> +++ b/lib/dmadev/rte_dmadev.c
> @@ -0,0 +1,438 @@
> +/* SPDX-License-Identifier: BSD-3-Clause
> + * Copyright 2021 HiSilicon Limited.
> + */
> +
> +#include <ctype.h>
> +#include <stdlib.h>
> +#include <string.h>
> +#include <stdint.h>
> +
> +#include <rte_log.h>
> +#include <rte_debug.h>
> +#include <rte_dev.h>
> +#include <rte_memory.h>
> +#include <rte_memzone.h>
> +#include <rte_malloc.h>
> +#include <rte_errno.h>
> +#include <rte_string_fns.h>
Sort in alphabetical order.
> +
> +#include "rte_dmadev.h"
> +#include "rte_dmadev_pmd.h"
> +
> +struct rte_dmadev rte_dmadevices[RTE_DMADEV_MAX_DEVS];
# Please check have you missed any multiprocess angle.
lib/regexdev/rte_regexdev.c is latest device class implemented in dpdk and
please check *rte_regexdev_shared_data scheme.
# Missing dynamic log for this library.
> diff --git a/lib/dmadev/rte_dmadev.h b/lib/dmadev/rte_dmadev.h
> new file mode 100644
> index 0000000..f74fc6a
> --- /dev/null
> +++ b/lib/dmadev/rte_dmadev.h
> @@ -0,0 +1,919 @@
> +/* SPDX-License-Identifier: BSD-3-Clause
> + * Copyright 2021 HiSilicon Limited.
It would be nice to add other companies' names who have contributed to
the specification.
> + */
> +
> +#ifndef _RTE_DMADEV_H_
> +#define _RTE_DMADEV_H_
> +
> +/**
> + * @file rte_dmadev.h
> + *
> + * RTE DMA (Direct Memory Access) device APIs.
> + *
> + * The generic DMA device diagram:
> + *
> + * ------------ ------------
> + * | HW-queue | | HW-queue |
> + * ------------ ------------
> + * \ /
> + * \ /
> + * \ /
> + * ----------------
> + * |dma-controller|
> + * ----------------
> + *
> + * The DMA could have multiple HW-queues, each HW-queue could have multiple
> + * capabilities, e.g. whether to support fill operation, supported DMA
> + * transfter direction and etc.
typo
> + *
> + * The DMA framework is built on the following abstraction model:
> + *
> + * ------------ ------------
> + * |virt-queue| |virt-queue|
> + * ------------ ------------
> + * \ /
> + * \ /
> + * \ /
> + * ------------ ------------
> + * | HW-queue | | HW-queue |
> + * ------------ ------------
> + * \ /
> + * \ /
> + * \ /
> + * ----------
> + * | dmadev |
> + * ----------
Continuing the discussion with @Morten Brørup , I think, we need to
finalize the model.
> + * a) The DMA operation request must be submitted to the virt queue, virt
> + * queues must be created based on HW queues, the DMA device could have
> + * multiple HW queues.
> + * b) The virt queues on the same HW-queue could represent different contexts,
> + * e.g. user could create virt-queue-0 on HW-queue-0 for mem-to-mem
> + * transfer scenario, and create virt-queue-1 on the same HW-queue for
> + * mem-to-dev transfer scenario.
> + * NOTE: user could also create multiple virt queues for mem-to-mem transfer
> + * scenario as long as the corresponding driver supports.
> + *
> + * The control plane APIs include configure/queue_setup/queue_release/start/
> + * stop/reset/close, in order to start device work, the call sequence must be
> + * as follows:
> + * - rte_dmadev_configure()
> + * - rte_dmadev_queue_setup()
> + * - rte_dmadev_start()
Please add reconfigure behaviour etc, Please check the
lib/regexdev/rte_regexdev.h
introduction. I have added similar ones so you could reuse as much as possible.
> + * The dataplane APIs include two parts:
> + * a) The first part is the submission of operation requests:
> + * - rte_dmadev_copy()
> + * - rte_dmadev_copy_sg() - scatter-gather form of copy
> + * - rte_dmadev_fill()
> + * - rte_dmadev_fill_sg() - scatter-gather form of fill
> + * - rte_dmadev_fence() - add a fence force ordering between operations
> + * - rte_dmadev_perform() - issue doorbell to hardware
> + * These APIs could work with different virt queues which have different
> + * contexts.
> + * The first four APIs are used to submit the operation request to the virt
> + * queue, if the submission is successful, a cookie (as type
> + * 'dma_cookie_t') is returned, otherwise a negative number is returned.
> + * b) The second part is to obtain the result of requests:
> + * - rte_dmadev_completed()
> + * - return the number of operation requests completed successfully.
> + * - rte_dmadev_completed_fails()
> + * - return the number of operation requests failed to complete.
> + *
> + * The misc APIs include info_get/queue_info_get/stats/xstats/selftest, provide
> + * information query and self-test capabilities.
> + *
> + * About the dataplane APIs MT-safe, there are two dimensions:
> + * a) For one virt queue, the submit/completion API could be MT-safe,
> + * e.g. one thread do submit operation, another thread do completion
> + * operation.
> + * If driver support it, then declare RTE_DMA_DEV_CAPA_MT_VQ.
> + * If driver don't support it, it's up to the application to guarantee
> + * MT-safe.
> + * b) For multiple virt queues on the same HW queue, e.g. one thread do
> + * operation on virt-queue-0, another thread do operation on virt-queue-1.
> + * If driver support it, then declare RTE_DMA_DEV_CAPA_MT_MVQ.
> + * If driver don't support it, it's up to the application to guarantee
> + * MT-safe.
From an application PoV it may not be good to write portable
applications. Please check
latest thread with @Morten Brørup
> + */
> +
> +#ifdef __cplusplus
> +extern "C" {
> +#endif
> +
> +#include <rte_common.h>
> +#include <rte_memory.h>
> +#include <rte_errno.h>
> +#include <rte_compat.h>
Sort in alphabetical order.
> +
> +/**
> + * dma_cookie_t - an opaque DMA cookie
Since we are defining the behaviour is not opaque any more.
I think, it is better to call ring_idx or so.
> +#define RTE_DMA_DEV_CAPA_MT_MVQ (1ull << 11) /**< Support MT-safe of multiple virt queues */
Please lot of @see for all symbols where it is being used. So that one
can understand the full scope of
symbols. See below example.
#define RTE_REGEXDEV_CAPA_RUNTIME_COMPILATION_F (1ULL << 0)
/**< RegEx device does support compiling the rules at runtime unlike
* loading only the pre-built rule database using
* struct rte_regexdev_config::rule_db in rte_regexdev_configure()
*
* @see struct rte_regexdev_config::rule_db, rte_regexdev_configure()
* @see struct rte_regexdev_info::regexdev_capa
*/
> + *
> + * If dma_cookie_t is >=0 it's a DMA operation request cookie, <0 it's a error
> + * code.
> + * When using cookies, comply with the following rules:
> + * a) Cookies for each virtual queue are independent.
> + * b) For a virt queue, the cookie are monotonically incremented, when it reach
> + * the INT_MAX, it wraps back to zero.
> + * c) The initial cookie of a virt queue is zero, after the device is stopped or
> + * reset, the virt queue's cookie needs to be reset to zero.
> + * Example:
> + * step-1: start one dmadev
> + * step-2: enqueue a copy operation, the cookie return is 0
> + * step-3: enqueue a copy operation again, the cookie return is 1
> + * ...
> + * step-101: stop the dmadev
> + * step-102: start the dmadev
> + * step-103: enqueue a copy operation, the cookie return is 0
> + * ...
> + */
Good explanation.
> +typedef int32_t dma_cookie_t;
> +
> +/**
> + * dma_scatterlist - can hold scatter DMA operation request
> + */
> +struct dma_scatterlist {
I prefer to change scatterlist -> sg
i.e rte_dma_sg
> + void *src;
> + void *dst;
> + uint32_t length;
> +};
> +
> +
> +/**
> + * A structure used to retrieve the contextual information of
> + * an DMA device
> + */
> +struct rte_dmadev_info {
> + /**
> + * Fields filled by framewok
typo.
> + */
> + struct rte_device *device; /**< Generic Device information */
> + const char *driver_name; /**< Device driver name */
> + int socket_id; /**< Socket ID where memory is allocated */
> +
> + /**
> + * Specification fields filled by driver
> + */
> + uint64_t dev_capa; /**< Device capabilities (RTE_DMA_DEV_CAPA_) */
> + uint16_t max_hw_queues; /**< Maximum number of HW queues. */
> + uint16_t max_vqs_per_hw_queue;
> + /**< Maximum number of virt queues to allocate per HW queue */
> + uint16_t max_desc;
> + /**< Maximum allowed number of virt queue descriptors */
> + uint16_t min_desc;
> + /**< Minimum allowed number of virt queue descriptors */
Please add max_nb_segs. i.e maximum number of segments supported.
> +
> + /**
> + * Status fields filled by driver
> + */
> + uint16_t nb_hw_queues; /**< Number of HW queues configured */
> + uint16_t nb_vqs; /**< Number of virt queues configured */
> +};
> + i
> +
> +/**
> + * dma_address_type
> + */
> +enum dma_address_type {
> + DMA_ADDRESS_TYPE_IOVA, /**< Use IOVA as dma address */
> + DMA_ADDRESS_TYPE_VA, /**< Use VA as dma address */
> +};
> +
> +/**
> + * A structure used to configure a DMA device.
> + */
> +struct rte_dmadev_conf {
> + enum dma_address_type addr_type; /**< Address type to used */
I think, there are 3 kinds of limitations/capabilities.
When the system is configured as IOVA as VA
1) Device supports any VA address like memory from rte_malloc(),
rte_memzone(), malloc, stack memory
2) Device support only VA address from rte_malloc(), rte_memzone() i.e
memory backed by hugepage and added to DMA map.
When the system is configured as IOVA as PA
1) Devices support only PA addresses .
IMO, Above needs to be advertised as capability and application needs
to align with that
and I dont think application requests the driver to work in any of the modes.
> + uint16_t nb_hw_queues; /**< Number of HW-queues enable to use */
> + uint16_t max_vqs; /**< Maximum number of virt queues to use */
You need to what is max value allowed etc i.e it is based on
info_get() and mention the field
in info structure
> +
> +/**
> + * dma_transfer_direction
> + */
> +enum dma_transfer_direction {
rte_dma_transter_direction
> + DMA_MEM_TO_MEM,
> + DMA_MEM_TO_DEV,
> + DMA_DEV_TO_MEM,
> + DMA_DEV_TO_DEV,
> +};
> +
> +/**
> + * A structure used to configure a DMA virt queue.
> + */
> +struct rte_dmadev_queue_conf {
> + enum dma_transfer_direction direction;
> + /**< Associated transfer direction */
> + uint16_t hw_queue_id; /**< The HW queue on which to create virt queue */
> + uint16_t nb_desc; /**< Number of descriptor for this virt queue */
> + uint64_t dev_flags; /**< Device specific flags */
Use of this? Need more comments on this.
Since it is in slowpath, We can have non opaque names here based on
each driver capability.
> + void *dev_ctx; /**< Device specific context */
Use of this ? Need more comment ont this.
Please add some good amount of reserved bits and have API to init this
structure for future ABI stability, say rte_dmadev_queue_config_init()
or so.
> +
> +/**
> + * A structure used to retrieve information of a DMA virt queue.
> + */
> +struct rte_dmadev_queue_info {
> + enum dma_transfer_direction direction;
A queue may support all directions so I think it should be a bitfield.
> + /**< Associated transfer direction */
> + uint16_t hw_queue_id; /**< The HW queue on which to create virt queue */
> + uint16_t nb_desc; /**< Number of descriptor for this virt queue */
> + uint64_t dev_flags; /**< Device specific flags */
> +};
> +
> +__rte_experimental
> +static inline dma_cookie_t
> +rte_dmadev_copy_sg(uint16_t dev_id, uint16_t vq_id,
> + const struct dma_scatterlist *sg,
> + uint32_t sg_len, uint64_t flags)
I would like to change this as:
rte_dmadev_copy_sg(uint16_t dev_id, uint16_t vq_id, const struct
rte_dma_sg *src, uint32_t nb_src,
const struct rte_dma_sg *dst, uint32_t nb_dst) or so allow the use case like
src 30 MB copy can be splitted as written as 1 MB x 30 dst.
> +{
> + struct rte_dmadev *dev = &rte_dmadevices[dev_id];
> + return (*dev->copy_sg)(dev, vq_id, sg, sg_len, flags);
> +}
> +
> +/**
> + * @warning
> + * @b EXPERIMENTAL: this API may change without prior notice.
> + *
> + * Enqueue a fill operation onto the DMA virt queue
> + *
> + * This queues up a fill operation to be performed by hardware, but does not
> + * trigger hardware to begin that operation.
> + *
> + * @param dev_id
> + * The identifier of the device.
> + * @param vq_id
> + * The identifier of virt queue.
> + * @param pattern
> + * The pattern to populate the destination buffer with.
> + * @param dst
> + * The address of the destination buffer.
> + * @param length
> + * The length of the destination buffer.
> + * @param flags
> + * An opaque flags for this operation.
PLEASE REMOVE opaque stuff from fastpath it will be a pain for
application writers as
they need to write multiple combinations of fastpath. flags are OK, if
we have a valid
generic flag now to control the transfer behavior.
> +/**
> + * @warning
> + * @b EXPERIMENTAL: this API may change without prior notice.
> + *
> + * Add a fence to force ordering between operations
> + *
> + * This adds a fence to a sequence of operations to enforce ordering, such that
> + * all operations enqueued before the fence must be completed before operations
> + * after the fence.
> + * NOTE: Since this fence may be added as a flag to the last operation enqueued,
> + * this API may not function correctly when called immediately after an
> + * "rte_dmadev_perform" call i.e. before any new operations are enqueued.
> + *
> + * @param dev_id
> + * The identifier of the device.
> + * @param vq_id
> + * The identifier of virt queue.
> + *
> + * @return
> + * - =0: Successful add fence.
> + * - <0: Failure to add fence.
> + *
> + * NOTE: The caller must ensure that the input parameter is valid and the
> + * corresponding device supports the operation.
> + */
> +__rte_experimental
> +static inline int
> +rte_dmadev_fence(uint16_t dev_id, uint16_t vq_id)
> +{
> + struct rte_dmadev *dev = &rte_dmadevices[dev_id];
> + return (*dev->fence)(dev, vq_id);
> +}
Since HW submission is in a queue(FIFO) the ordering is always
maintained. Right?
Could you share more details and use case of fence() from
driver/application PoV?
> +
> +/**
> + * @warning
> + * @b EXPERIMENTAL: this API may change without prior notice.
> + *
> + * Trigger hardware to begin performing enqueued operations
> + *
> + * This API is used to write the "doorbell" to the hardware to trigger it
> + * to begin the operations previously enqueued by rte_dmadev_copy/fill()
> + *
> + * @param dev_id
> + * The identifier of the device.
> + * @param vq_id
> + * The identifier of virt queue.
> + *
> + * @return
> + * - =0: Successful trigger hardware.
> + * - <0: Failure to trigger hardware.
> + *
> + * NOTE: The caller must ensure that the input parameter is valid and the
> + * corresponding device supports the operation.
> + */
> +__rte_experimental
> +static inline int
> +rte_dmadev_perform(uint16_t dev_id, uint16_t vq_id)
> +{
> + struct rte_dmadev *dev = &rte_dmadevices[dev_id];
> + return (*dev->perform)(dev, vq_id);
> +}
Since we have additional function call overhead in all the
applications for this scheme, I would like to understand
the use of doing this way vs enq does the doorbell implicitly from
driver/application PoV?
> +
> +/**
> + * @warning
> + * @b EXPERIMENTAL: this API may change without prior notice.
> + *
> + * Returns the number of operations that have been successful completed.
> + *
> + * @param dev_id
> + * The identifier of the device.
> + * @param vq_id
> + * The identifier of virt queue.
> + * @param nb_cpls
> + * The maximum number of completed operations that can be processed.
> + * @param[out] cookie
> + * The last completed operation's cookie.
> + * @param[out] has_error
> + * Indicates if there are transfer error.
> + *
> + * @return
> + * The number of operations that successful completed.
successfully
> + *
> + * NOTE: The caller must ensure that the input parameter is valid and the
> + * corresponding device supports the operation.
> + */
> +__rte_experimental
> +static inline uint16_t
> +rte_dmadev_completed(uint16_t dev_id, uint16_t vq_id, const uint16_t nb_cpls,
> + dma_cookie_t *cookie, bool *has_error)
> +{
> + struct rte_dmadev *dev = &rte_dmadevices[dev_id];
> + has_error = false;
> + return (*dev->completed)(dev, vq_id, nb_cpls, cookie, has_error);
It may be better to have cookie/ring_idx as third argument.
> +}
> +
> +/**
> + * @warning
> + * @b EXPERIMENTAL: this API may change without prior notice.
> + *
> + * Returns the number of operations that failed to complete.
> + * NOTE: This API was used when rte_dmadev_completed has_error was set.
> + *
> + * @param dev_id
> + * The identifier of the device.
> + * @param vq_id
> + * The identifier of virt queue.
(> + * @param nb_status
> + * Indicates the size of status array.
> + * @param[out] status
> + * The error code of operations that failed to complete.
> + * @param[out] cookie
> + * The last failed completed operation's cookie.
> + *
> + * @return
> + * The number of operations that failed to complete.
> + *
> + * NOTE: The caller must ensure that the input parameter is valid and the
> + * corresponding device supports the operation.
> + */
> +__rte_experimental
> +static inline uint16_t
> +rte_dmadev_completed_fails(uint16_t dev_id, uint16_t vq_id,
> + const uint16_t nb_status, uint32_t *status,
> + dma_cookie_t *cookie)
IMO, it is better to move cookie/rind_idx at 3.
Why it would return any array of errors? since it called after
rte_dmadev_completed() has
has_error. Is it better to change
rte_dmadev_error_status((uint16_t dev_id, uint16_t vq_id, dma_cookie_t
*cookie, uint32_t *status)
I also think, we may need to set status as bitmask and enumerate all
the combination of error codes
of all the driver and return string from driver existing rte_flow_error
See
struct rte_flow_error {
enum rte_flow_error_type type; /**< Cause field and error types. */
const void *cause; /**< Object responsible for the error. */
const char *message; /**< Human-readable error message. */
};
> +{
> + struct rte_dmadev *dev = &rte_dmadevices[dev_id];
> + return (*dev->completed_fails)(dev, vq_id, nb_status, status, cookie);
> +}
> +
> +struct rte_dmadev_stats {
> + uint64_t enqueue_fail_count;
> + /**< Conut of all operations which failed enqueued */
> + uint64_t enqueued_count;
> + /**< Count of all operations which successful enqueued */
> + uint64_t completed_fail_count;
> + /**< Count of all operations which failed to complete */
> + uint64_t completed_count;
> + /**< Count of all operations which successful complete */
> +};
We need to have capability API to tell which items are
updated/supported by the driver.
> diff --git a/lib/dmadev/rte_dmadev_core.h b/lib/dmadev/rte_dmadev_core.h
> new file mode 100644
> index 0000000..a3afea2
> --- /dev/null
> +++ b/lib/dmadev/rte_dmadev_core.h
> @@ -0,0 +1,98 @@
> +/* SPDX-License-Identifier: BSD-3-Clause
> + * Copyright 2021 HiSilicon Limited.
> + */
> +
> +#ifndef _RTE_DMADEV_CORE_H_
> +#define _RTE_DMADEV_CORE_H_
> +
> +/**
> + * @file
> + *
> + * RTE DMA Device internal header.
> + *
> + * This header contains internal data types. But they are still part of the
> + * public API because they are used by inline public functions.
> + */
> +
> +struct rte_dmadev;
> +
> +typedef dma_cookie_t (*dmadev_copy_t)(struct rte_dmadev *dev, uint16_t vq_id,
> + void *src, void *dst,
> + uint32_t length, uint64_t flags);
> +/**< @internal Function used to enqueue a copy operation. */
To avoid namespace conflict(as it is public API) use rte_
> +
> +/**
> + * The data structure associated with each DMA device.
> + */
> +struct rte_dmadev {
> + /**< Enqueue a copy operation onto the DMA device. */
> + dmadev_copy_t copy;
> + /**< Enqueue a scatter list copy operation onto the DMA device. */
> + dmadev_copy_sg_t copy_sg;
> + /**< Enqueue a fill operation onto the DMA device. */
> + dmadev_fill_t fill;
> + /**< Enqueue a scatter list fill operation onto the DMA device. */
> + dmadev_fill_sg_t fill_sg;
> + /**< Add a fence to force ordering between operations. */
> + dmadev_fence_t fence;
> + /**< Trigger hardware to begin performing enqueued operations. */
> + dmadev_perform_t perform;
> + /**< Returns the number of operations that successful completed. */
> + dmadev_completed_t completed;
> + /**< Returns the number of operations that failed to complete. */
> + dmadev_completed_fails_t completed_fails;
We need to limit fastpath items in 1 CL
> +
> + void *dev_private; /**< PMD-specific private data */
> + const struct rte_dmadev_ops *dev_ops; /**< Functions exported by PMD */
> +
> + uint16_t dev_id; /**< Device ID for this instance */
> + int socket_id; /**< Socket ID where memory is allocated */
> + struct rte_device *device;
> + /**< Device info. supplied during device initialization */
> + const char *driver_name; /**< Driver info. supplied by probing */
> + char name[RTE_DMADEV_NAME_MAX_LEN]; /**< Device name */
> +
> + RTE_STD_C11
> + uint8_t attached : 1; /**< Flag indicating the device is attached */
> + uint8_t started : 1; /**< Device state: STARTED(1)/STOPPED(0) */
Add a couple of reserved fields for future ABI stability.
> +
> +} __rte_cache_aligned;
> +
> +extern struct rte_dmadev rte_dmadevices[];
> +
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [PATCH v3 19/20] net/sfc: support flow action COUNT in transfer rules
2021-07-02 13:37 3% ` David Marchand
@ 2021-07-02 13:39 0% ` Andrew Rybchenko
0 siblings, 0 replies; 200+ results
From: Andrew Rybchenko @ 2021-07-02 13:39 UTC (permalink / raw)
To: David Marchand
Cc: Bruce Richardson, Thomas Monjalon, dev, Igor Romanov,
Andy Moreton, Ivan Malov
On 7/2/21 4:37 PM, David Marchand wrote:
> On Fri, Jul 2, 2021 at 10:43 AM Andrew Rybchenko
> <andrew.rybchenko@oktetlabs.ru> wrote:
>> I've send v4 with the problem fixed. However, I'm afraid
>> build test systems should be updated to have libatomic
>> correctly installed. Otherwise, they do not really check
>> net/sfc build.
>
> CI systems must be updated if they check ABI.
> And in general, we want them to continue testing net/sfc.
> I sent a mail to ask for this.
Many thanks, David
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH v3 19/20] net/sfc: support flow action COUNT in transfer rules
@ 2021-07-02 13:37 3% ` David Marchand
2021-07-02 13:39 0% ` Andrew Rybchenko
0 siblings, 1 reply; 200+ results
From: David Marchand @ 2021-07-02 13:37 UTC (permalink / raw)
To: Andrew Rybchenko
Cc: Bruce Richardson, Thomas Monjalon, dev, Igor Romanov,
Andy Moreton, Ivan Malov
On Fri, Jul 2, 2021 at 10:43 AM Andrew Rybchenko
<andrew.rybchenko@oktetlabs.ru> wrote:
> I've send v4 with the problem fixed. However, I'm afraid
> build test systems should be updated to have libatomic
> correctly installed. Otherwise, they do not really check
> net/sfc build.
CI systems must be updated if they check ABI.
And in general, we want them to continue testing net/sfc.
I sent a mail to ask for this.
--
David Marchand
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [dpdk-techboard] ABI/API stability towards drivers
2021-07-02 8:00 8% [dpdk-dev] ABI/API stability towards drivers Morten Brørup
2021-07-02 9:45 7% ` [dpdk-dev] [dpdk-techboard] " Ferruh Yigit
@ 2021-07-02 12:26 4% ` Thomas Monjalon
2021-07-07 18:46 8% ` [dpdk-dev] " Tyler Retzlaff
2 siblings, 0 replies; 200+ results
From: Thomas Monjalon @ 2021-07-02 12:26 UTC (permalink / raw)
To: Morten Brørup; +Cc: dpdk-techboard, dpdk-dev
02/07/2021 10:00, Morten Brørup:
> Regarding the ongoing ABI stability project, it is suggested to export driver interfaces as internal.
>
> What are we targeting regarding ABI and API stability towards drivers?
No stability for driver interface.
It is recommended to make drivers internal.
If a driver is kept external to DPDK, there is a maintenance cost.
^ permalink raw reply [relevance 4%]
* Re: [dpdk-dev] [dpdk-techboard] ABI/API stability towards drivers
2021-07-02 8:00 8% [dpdk-dev] ABI/API stability towards drivers Morten Brørup
@ 2021-07-02 9:45 7% ` Ferruh Yigit
2021-07-02 12:26 4% ` Thomas Monjalon
2021-07-07 18:46 8% ` [dpdk-dev] " Tyler Retzlaff
2 siblings, 0 replies; 200+ results
From: Ferruh Yigit @ 2021-07-02 9:45 UTC (permalink / raw)
To: Morten Brørup, dpdk-techboard; +Cc: dpdk-dev
On 7/2/2021 10:00 AM, Morten Brørup wrote:
> Regarding the ongoing ABI stability project, it is suggested to export driver interfaces as internal.
>
> What are we targeting regarding ABI and API stability towards drivers?
>
Hi Morten,
It is about some device abstraction libraries, like cryptodev, exposing the
internal driver to library interface to the application. And any change on them
causing an unnecessary ABI break.
So target is not drivers, but hide everything from application that only needs
to be between lib and driver.
^ permalink raw reply [relevance 7%]
* [dpdk-dev] ABI/API stability towards drivers
@ 2021-07-02 8:00 8% Morten Brørup
2021-07-02 9:45 7% ` [dpdk-dev] [dpdk-techboard] " Ferruh Yigit
` (2 more replies)
0 siblings, 3 replies; 200+ results
From: Morten Brørup @ 2021-07-02 8:00 UTC (permalink / raw)
To: dpdk-techboard; +Cc: dpdk-dev
Regarding the ongoing ABI stability project, it is suggested to export driver interfaces as internal.
What are we targeting regarding ABI and API stability towards drivers?
-Morten
^ permalink raw reply [relevance 8%]
* Re: [dpdk-dev] [PATCH v1] doc: policy on promotion of experimental APIs
2021-07-01 15:09 4% ` Tyler Retzlaff
@ 2021-07-02 6:30 4% ` Kinsella, Ray
0 siblings, 0 replies; 200+ results
From: Kinsella, Ray @ 2021-07-02 6:30 UTC (permalink / raw)
To: Tyler Retzlaff; +Cc: dev, ferruh.yigit, thomas, david.marchand, stephen
On 01/07/2021 16:09, Tyler Retzlaff wrote:
> On Thu, Jul 01, 2021 at 11:19:27AM +0100, Kinsella, Ray wrote:
>>
>>
>> On 30/06/2021 20:56, Tyler Retzlaff wrote:
>>> On Tue, Jun 29, 2021 at 07:38:05PM +0100, Kinsella, Ray wrote:
>>>>
>>>>
>>>>>> +Promotion to stable
>>>>>> +~~~~~~~~~~~~~~~~~~~
>>>>>> +
>>>>>> +Ordinarily APIs marked as ``experimental`` will be promoted to the stable API
>>>>>> +once a maintainer and/or the original contributor is satisfied that the API is
>>>>>> +reasonably mature. In exceptional circumstances, should an API still be
>>>>>
>>>>> this seems vague and arbitrary. is there a way we can have a more
>>>>> quantitative metric for what "reasonably mature" means.
>>>>>
>>>>>> +classified as ``experimental`` after two years and is without any prospect of
>>>>>> +becoming part of the stable API. The API will then become a candidate for
>>>>>> +removal, to avoid the acculumation of abandoned symbols.
>>>>>
>>>>> i think with the above comment the basis for removal then depends on
>>>>> whatever metric is used to determine maturity.
>>>>> if it is still changing
>>>>> then it seems like it is useful and still evolving so perhaps should not
>>>>> be removed but hasn't changed but doesn't meet the metric for being made
>>>>> stable then perhaps it becomes a candidate for removal.
>>>>
>>>> Good idea.
>>>>
>>>> I think it is reasonable to add a clause that indicates that any change
>>>> to the "API signature" would reset the clock.
>>>
>>> a time based strategy works but i guess the follow-on to that is how is
>>> the clock tracked and how does it get updated? i don't think trying to
>>> troll through git history will be effective.
>>>
>>> one nit, i think "api signature" doesn't cover all cases of what i would
>>> regard as change. i would prefer to define it as "no change where api/abi
>>> compatibility or semantic change occurred"? which is a lot more strict
>>> but in practice is necessary to support binaries when abi/api is stable.
>>>
>>> i.e. if a recompile is necessary with or without code change then it's a
>>> change.
>>
>> Having thought a bit ... this becomes a bit problematic.
>>
>> Many data-structures in DPDK are nested,
>> these can have a ripple effect when changed - a change to mbuf is a good example.
>>
>> What I saying is ...
>> I don't think changes in ABI due to in-direct reasons should count.
>> If there is a change due to a deliberate change in the ABI signature
>> that is fine, reset the clock.
>>
>>
>> If there is a change due to some nested data-structure,
>> 3-levels down changing in my book that doesn't count.
>
> it has to count otherwise dpdk's abi stability promise for major version
> releases is meaningless. or are you suggesting it doesn't count for the
> purpose of determining whether or not an experimental api/abi has
> changed?
"it doesn't count for the purpose of determining whether or not an experimental api/abi has changed?".
Exactly - that is what I meant - apologies if I was unclear.
In this case the change is not a deliberate act,
in that it is not really happening because of any maturing of the ABI.
>
>> As that may or may not have been deliberate, and is almost impossible to police.
>>
>> Checking anything but a deliberate change to the ABI signature,
>> would be practically impossible IMHO.
>
> well, it isn't impossible but it does take knowledge, mechanism and
> process maintain the abi for a major version.
100% agree with this statement.
What do you think of the v3?
^ permalink raw reply [relevance 4%]
* [dpdk-dev] DPDK Release Status Meeting 01/07/2021
@ 2021-07-01 16:30 4% Mcnamara, John
0 siblings, 0 replies; 200+ results
From: Mcnamara, John @ 2021-07-01 16:30 UTC (permalink / raw)
To: dev; +Cc: thomas, Yigit, Ferruh
Release status meeting minutes {Date}
=====================================
:Date: 1 July 2021
:toc:
.Agenda:
* Release Dates
* Subtrees
* Roadmaps
* LTS
* Defects
* Opens
.Participants:
* Broadcom
* Canonical
* Debian/Microsoft
* Intel
* Marvell
* Nvidia
* Red Hat
Release Dates
-------------
* `v21.08` dates
- Proposal/V1: Wednesday, 2 June (completed)
- -rc1: Wednesday, 7 July
- Release: Tuesday, 3 August
* Note: We need to hold to the early August release date since
several of the maintainers will be on holidays after that.
* `v21.11` dates (proposed and subject to discussion)
- Proposal/V1: Friday, 10 September
- -rc1: Friday, 15 October
- Release: Friday, 19 November
Subtrees
--------
* main
- Backlog is a little big at the moment. RC1 will probably slip to Wednesday 7th July.
- Most subtrees PRs are ready or close to ready.
- Still waiting update on Solarflare patches.
- New auxiliary bus patch series should go into this release.
* next-net
- Testpmd patchset for Windows.
- Looking at net/sfc patches.
* next-crypto
- 4 new PMDs in this release:
** CNXK - reviewed - awaiting final version for RC1.
** MLX - still in progress. New version will be sent today.
** Intel QAT - under review.
** NXP baseband - requires new version.
* next-eventdev
- PR for RC1 will be completed today.
* next-virtio
- PR posted yesterday.
* next-net-brcm
- All patches in sub-tree waiting to be pulled.
* next-net-intel
- Proceeding okay. No issues
* next-net-mlx
- PR not pulled due to comments that need to be addressed.
- New version sent today.
* next-net-mrvl
- Pull request for RC1 sent.
LTS
---
* `v19.11` (next version is `v19.11.9`)
- RC3 tagged.
- Target release date July 2, however there are some late reported
MLX regressions that are under investigation.
- There are 2 other known issues:
** Plenty of GCC11 and Clang build issues were fixed, but 19.11.9
is not yet compatible with clang 12.0.0. Fixes are discussed
and a potential 3 backports identified for 19.11.10:
https://bugs.dpdk.org/show_bug.cgi?id=733
** Due to a kernel patch backport in SUSE Linux Enterprise Server 15
SP3 6, compilation of kni fails there:
https://bugs.dpdk.org/show_bug.cgi?id=728
* `v20.11` (next version is `v20.11.2`)
- RC2 released
- Some test reports coming in (Intel, MLX)
- 6 July is proposed release date.
* Distros
- v20.11 in Debian 11
- v20.11 in Ubuntu 21.04
Defects
-------
* Bugzilla links, 'Bugs', added for hosted projects
- https://www.dpdk.org/hosted-projects/
Opens
-----
* There in an ongoing initiative around ABI stability which was
discussed in the Tech Board call. A workgroup has come up
with a list of critical and major changes required to let us
extend the ABI without as much disruption. For example:
** export driver interfaces as internal
** hide more structs (may require uninlining)
** split big structs + new feature-specific functions Major
** remove enum maximums
** reserved space initialized to 0
** reserved flags cleared
* We need to fill details and volunteers in this table:
https://docs.google.com/spreadsheets/d/1betlC000ua5SsSiJIcC54mCCCJnW6voH5Dqv9UxeyfE/edit?usp=sharing
* The DPDK North America Summit will be on July 12-13. Registration is free.
https://events.linuxfoundation.org/dpdk-summit-north-america/
.DPDK Release Status Meetings
*****
The DPDK Release Status Meeting is intended for DPDK Committers to discuss the status of the master tree and sub-trees, and for project managers to track progress or milestone dates.
The meeting occurs on every Thursdays at 8:30 UTC. on https://meet.jit.si/DPDK
If you wish to attend just send an email to "John McNamara <john.mcnamara@intel.com>" for the invite.
*****
^ permalink raw reply [relevance 4%]
* Re: [dpdk-dev] [PATCH v1] doc: policy on promotion of experimental APIs
2021-07-01 10:19 4% ` Kinsella, Ray
@ 2021-07-01 15:09 4% ` Tyler Retzlaff
2021-07-02 6:30 4% ` Kinsella, Ray
0 siblings, 1 reply; 200+ results
From: Tyler Retzlaff @ 2021-07-01 15:09 UTC (permalink / raw)
To: Kinsella, Ray; +Cc: dev, ferruh.yigit, thomas, david.marchand, stephen
On Thu, Jul 01, 2021 at 11:19:27AM +0100, Kinsella, Ray wrote:
>
>
> On 30/06/2021 20:56, Tyler Retzlaff wrote:
> > On Tue, Jun 29, 2021 at 07:38:05PM +0100, Kinsella, Ray wrote:
> >>
> >>
> >>>> +Promotion to stable
> >>>> +~~~~~~~~~~~~~~~~~~~
> >>>> +
> >>>> +Ordinarily APIs marked as ``experimental`` will be promoted to the stable API
> >>>> +once a maintainer and/or the original contributor is satisfied that the API is
> >>>> +reasonably mature. In exceptional circumstances, should an API still be
> >>>
> >>> this seems vague and arbitrary. is there a way we can have a more
> >>> quantitative metric for what "reasonably mature" means.
> >>>
> >>>> +classified as ``experimental`` after two years and is without any prospect of
> >>>> +becoming part of the stable API. The API will then become a candidate for
> >>>> +removal, to avoid the acculumation of abandoned symbols.
> >>>
> >>> i think with the above comment the basis for removal then depends on
> >>> whatever metric is used to determine maturity.
> >>> if it is still changing
> >>> then it seems like it is useful and still evolving so perhaps should not
> >>> be removed but hasn't changed but doesn't meet the metric for being made
> >>> stable then perhaps it becomes a candidate for removal.
> >>
> >> Good idea.
> >>
> >> I think it is reasonable to add a clause that indicates that any change
> >> to the "API signature" would reset the clock.
> >
> > a time based strategy works but i guess the follow-on to that is how is
> > the clock tracked and how does it get updated? i don't think trying to
> > troll through git history will be effective.
> >
> > one nit, i think "api signature" doesn't cover all cases of what i would
> > regard as change. i would prefer to define it as "no change where api/abi
> > compatibility or semantic change occurred"? which is a lot more strict
> > but in practice is necessary to support binaries when abi/api is stable.
> >
> > i.e. if a recompile is necessary with or without code change then it's a
> > change.
>
> Having thought a bit ... this becomes a bit problematic.
>
> Many data-structures in DPDK are nested,
> these can have a ripple effect when changed - a change to mbuf is a good example.
>
> What I saying is ...
> I don't think changes in ABI due to in-direct reasons should count.
> If there is a change due to a deliberate change in the ABI signature
> that is fine, reset the clock.
>
>
> If there is a change due to some nested data-structure,
> 3-levels down changing in my book that doesn't count.
it has to count otherwise dpdk's abi stability promise for major version
releases is meaningless. or are you suggesting it doesn't count for the
purpose of determining whether or not an experimental api/abi has
changed?
> As that may or may not have been deliberate, and is almost impossible to police.
>
> Checking anything but a deliberate change to the ABI signature,
> would be practically impossible IMHO.
well, it isn't impossible but it does take knowledge, mechanism and
process maintain the abi for a major version.
^ permalink raw reply [relevance 4%]
* Re: [dpdk-dev] [PATCH v1] doc: policy on promotion of experimental APIs
2021-07-01 7:56 0% ` Ferruh Yigit
@ 2021-07-01 14:45 4% ` Tyler Retzlaff
0 siblings, 0 replies; 200+ results
From: Tyler Retzlaff @ 2021-07-01 14:45 UTC (permalink / raw)
To: Ferruh Yigit; +Cc: Kinsella, Ray, dev, thomas, david.marchand, stephen
On Thu, Jul 01, 2021 at 08:56:22AM +0100, Ferruh Yigit wrote:
> On 6/30/2021 8:56 PM, Tyler Retzlaff wrote:
> > On Tue, Jun 29, 2021 at 07:38:05PM +0100, Kinsella, Ray wrote:
> >>
> >>
> >>>> +Promotion to stable
> >>>> +~~~~~~~~~~~~~~~~~~~
> >>>> +
> >>>> +Ordinarily APIs marked as ``experimental`` will be promoted to the stable API
> >>>> +once a maintainer and/or the original contributor is satisfied that the API is
> >>>> +reasonably mature. In exceptional circumstances, should an API still be
> >>>
> >>> this seems vague and arbitrary. is there a way we can have a more
> >>> quantitative metric for what "reasonably mature" means.
> >>>
> >>>> +classified as ``experimental`` after two years and is without any prospect of
> >>>> +becoming part of the stable API. The API will then become a candidate for
> >>>> +removal, to avoid the acculumation of abandoned symbols.
> >>>
> >>> i think with the above comment the basis for removal then depends on
> >>> whatever metric is used to determine maturity.
> >>> if it is still changing
> >>> then it seems like it is useful and still evolving so perhaps should not
> >>> be removed but hasn't changed but doesn't meet the metric for being made
> >>> stable then perhaps it becomes a candidate for removal.
> >>
> >> Good idea.
> >>
> >> I think it is reasonable to add a clause that indicates that any change
> >> to the "API signature" would reset the clock.
> >
> > a time based strategy works but i guess the follow-on to that is how is
> > the clock tracked and how does it get updated? i don't think trying to
> > troll through git history will be effective.
> >
>
> We are grouping the new experimental APIs in the version file based on the
> release they are added with a comment, thanks to Dave. Like:
>
> # added in 19.02
> rte_extmem_attach;
> rte_extmem_detach;
> rte_extmem_register;
> rte_extmem_unregister;
>
> # added in 19.05
> rte_dev_dma_map;
> rte_dev_dma_unmap;
> ....
>
> Please check 'lib/eal/version.map' as sample.
>
> This enables us easily see the release experimental APIs are added.
this is fine but the subject being discussed is oriented around how long
an api/abi has been unchanged to identify it as a candidate for qualifying
it as stable (not experimental). are you suggesting that if api/abi changes
then it is moved to the -current version to "restart the clock" as it were?
^ permalink raw reply [relevance 4%]
* [dpdk-dev] [PATCH v3] doc: policy on the promotion of experimental APIs
2021-06-29 16:00 21% [dpdk-dev] [PATCH v1] doc: policy on promotion of experimental APIs Ray Kinsella
2021-06-29 16:28 3% ` Tyler Retzlaff
2021-07-01 10:31 23% ` [dpdk-dev] [PATCH v2] " Ray Kinsella
@ 2021-07-01 10:38 23% ` Ray Kinsella
2021-07-07 18:32 0% ` Tyler Retzlaff
2 siblings, 1 reply; 200+ results
From: Ray Kinsella @ 2021-07-01 10:38 UTC (permalink / raw)
To: dev
Cc: bruce.richardson, john.mcnamara, roretzla, ferruh.yigit, thomas,
david.marchand, stephen, Ray Kinsella
Clarifying the ABI policy on the promotion of experimental APIS to stable.
We have a fair number of APIs that have been experimental for more than
2 years. This policy amendment indicates that these APIs should be
promoted or removed, or should at least form a conservation between the
maintainer and original contributor.
Signed-off-by: Ray Kinsella <mdr@ashroe.eu>
---
v2: addressing comments on abi expiry from Tyler Retzlaff.
v3: addressing typos in the git commit message
doc/guides/contributing/abi_policy.rst | 22 +++++++++++++++++++---
1 file changed, 19 insertions(+), 3 deletions(-)
diff --git a/doc/guides/contributing/abi_policy.rst b/doc/guides/contributing/abi_policy.rst
index 4ad87dbfed..840c295e5d 100644
--- a/doc/guides/contributing/abi_policy.rst
+++ b/doc/guides/contributing/abi_policy.rst
@@ -26,9 +26,10 @@ General Guidelines
symbols is managed with :ref:`ABI Versioning <abi_versioning>`.
#. The removal of symbols is considered an :ref:`ABI breakage <abi_breakages>`,
once approved these will form part of the next ABI version.
-#. Libraries or APIs marked as :ref:`experimental <experimental_apis>` may
- be changed or removed without prior notice, as they are not considered part
- of an ABI version.
+#. Libraries or APIs marked as :ref:`experimental <experimental_apis>` may be
+ changed or removed without prior notice, as they are not considered part of
+ an ABI version. The :ref:`experimental <experimental_apis>` status of an API
+ is not an indefinite state.
#. Updates to the :ref:`minimum hardware requirements <hw_rqmts>`, which drop
support for hardware which was previously supported, should be treated as an
ABI change.
@@ -358,3 +359,18 @@ Libraries
Libraries marked as ``experimental`` are entirely not considered part of an ABI
version.
All functions in such libraries may be changed or removed without prior notice.
+
+Promotion to stable
+~~~~~~~~~~~~~~~~~~~
+
+Ordinarily APIs marked as ``experimental`` will be promoted to the stable ABI
+once a maintainer and/or the original contributor is satisfied that the API is
+reasonably mature. In exceptional circumstances, should an API still be
+classified as ``experimental`` after two years and is without any prospect of
+becoming part of the stable API. The API will then become a candidate for
+removal, to avoid the acculumation of abandoned symbols.
+
+Should an API's Binary Interface change during the two year period, usually due
+to a direct change in the to API's signature. It is reasonable for the expiry
+clock to reset. The promotion or removal of symbols will typically form part of
+a conversation between the maintainer and the original contributor.
--
2.26.2
^ permalink raw reply [relevance 23%]
* [dpdk-dev] [PATCH v2] doc: policy on promotion of experimental APIs
2021-06-29 16:00 21% [dpdk-dev] [PATCH v1] doc: policy on promotion of experimental APIs Ray Kinsella
2021-06-29 16:28 3% ` Tyler Retzlaff
@ 2021-07-01 10:31 23% ` Ray Kinsella
2021-07-01 10:38 23% ` [dpdk-dev] [PATCH v3] doc: policy on the " Ray Kinsella
2 siblings, 0 replies; 200+ results
From: Ray Kinsella @ 2021-07-01 10:31 UTC (permalink / raw)
To: dev
Cc: bruce.richardson, john.mcnamara, roretzla, ferruh.yigit, thomas,
david.marchand, stephen, Ray Kinsella
Clarifying the ABI policy on the promotion of experimental APIS to stable.
We have a fair number of APIs that have been experimental for more than
2 years. This policy ammendment indicates that these APIs should be
promoted or removed, or should at least form a conservation between the
maintainer and original contributor.
Signed-off-by: Ray Kinsella <mdr@ashroe.eu>
---
v2: addressing comments on abi expiry from Tyler Retzlaff.
doc/guides/contributing/abi_policy.rst | 22 +++++++++++++++++++---
1 file changed, 19 insertions(+), 3 deletions(-)
diff --git a/doc/guides/contributing/abi_policy.rst b/doc/guides/contributing/abi_policy.rst
index 4ad87dbfed..840c295e5d 100644
--- a/doc/guides/contributing/abi_policy.rst
+++ b/doc/guides/contributing/abi_policy.rst
@@ -26,9 +26,10 @@ General Guidelines
symbols is managed with :ref:`ABI Versioning <abi_versioning>`.
#. The removal of symbols is considered an :ref:`ABI breakage <abi_breakages>`,
once approved these will form part of the next ABI version.
-#. Libraries or APIs marked as :ref:`experimental <experimental_apis>` may
- be changed or removed without prior notice, as they are not considered part
- of an ABI version.
+#. Libraries or APIs marked as :ref:`experimental <experimental_apis>` may be
+ changed or removed without prior notice, as they are not considered part of
+ an ABI version. The :ref:`experimental <experimental_apis>` status of an API
+ is not an indefinite state.
#. Updates to the :ref:`minimum hardware requirements <hw_rqmts>`, which drop
support for hardware which was previously supported, should be treated as an
ABI change.
@@ -358,3 +359,18 @@ Libraries
Libraries marked as ``experimental`` are entirely not considered part of an ABI
version.
All functions in such libraries may be changed or removed without prior notice.
+
+Promotion to stable
+~~~~~~~~~~~~~~~~~~~
+
+Ordinarily APIs marked as ``experimental`` will be promoted to the stable ABI
+once a maintainer and/or the original contributor is satisfied that the API is
+reasonably mature. In exceptional circumstances, should an API still be
+classified as ``experimental`` after two years and is without any prospect of
+becoming part of the stable API. The API will then become a candidate for
+removal, to avoid the acculumation of abandoned symbols.
+
+Should an API's Binary Interface change during the two year period, usually due
+to a direct change in the to API's signature. It is reasonable for the expiry
+clock to reset. The promotion or removal of symbols will typically form part of
+a conversation between the maintainer and the original contributor.
--
2.26.2
^ permalink raw reply [relevance 23%]
* Re: [dpdk-dev] [PATCH v1] doc: policy on promotion of experimental APIs
2021-06-30 19:56 4% ` Tyler Retzlaff
2021-07-01 7:56 0% ` Ferruh Yigit
@ 2021-07-01 10:19 4% ` Kinsella, Ray
2021-07-01 15:09 4% ` Tyler Retzlaff
1 sibling, 1 reply; 200+ results
From: Kinsella, Ray @ 2021-07-01 10:19 UTC (permalink / raw)
To: Tyler Retzlaff; +Cc: dev, ferruh.yigit, thomas, david.marchand, stephen
On 30/06/2021 20:56, Tyler Retzlaff wrote:
> On Tue, Jun 29, 2021 at 07:38:05PM +0100, Kinsella, Ray wrote:
>>
>>
>>>> +Promotion to stable
>>>> +~~~~~~~~~~~~~~~~~~~
>>>> +
>>>> +Ordinarily APIs marked as ``experimental`` will be promoted to the stable API
>>>> +once a maintainer and/or the original contributor is satisfied that the API is
>>>> +reasonably mature. In exceptional circumstances, should an API still be
>>>
>>> this seems vague and arbitrary. is there a way we can have a more
>>> quantitative metric for what "reasonably mature" means.
>>>
>>>> +classified as ``experimental`` after two years and is without any prospect of
>>>> +becoming part of the stable API. The API will then become a candidate for
>>>> +removal, to avoid the acculumation of abandoned symbols.
>>>
>>> i think with the above comment the basis for removal then depends on
>>> whatever metric is used to determine maturity.
>>> if it is still changing
>>> then it seems like it is useful and still evolving so perhaps should not
>>> be removed but hasn't changed but doesn't meet the metric for being made
>>> stable then perhaps it becomes a candidate for removal.
>>
>> Good idea.
>>
>> I think it is reasonable to add a clause that indicates that any change
>> to the "API signature" would reset the clock.
>
> a time based strategy works but i guess the follow-on to that is how is
> the clock tracked and how does it get updated? i don't think trying to
> troll through git history will be effective.
>
> one nit, i think "api signature" doesn't cover all cases of what i would
> regard as change. i would prefer to define it as "no change where api/abi
> compatibility or semantic change occurred"? which is a lot more strict
> but in practice is necessary to support binaries when abi/api is stable.
>
> i.e. if a recompile is necessary with or without code change then it's a
> change.
Having thought a bit ... this becomes a bit problematic.
Many data-structures in DPDK are nested,
these can have a ripple effect when changed - a change to mbuf is a good example.
What I saying is ...
I don't think changes in ABI due to in-direct reasons should count.
If there is a change due to a deliberate change in the ABI signature
that is fine, reset the clock.
If there is a change due to some nested data-structure,
3-levels down changing in my book that doesn't count.
As that may or may not have been deliberate, and is almost impossible to police.
Checking anything but a deliberate change to the ABI signature,
would be practically impossible IMHO.
>
>>
>> However equally any changes to the implementation do not reset the clock.
>>
>> Would that work?
>
> that works for me.
v2 on the way.
>
>>
>>>
>>>> +
>>>> +The promotion or removal of symbols will typically form part of a conversation
>>>> +between the maintainer and the original contributor.
>>>
>>> this should extend beyond just symbols. there are other changes that
>>> impact the abi where exported symbols don't change. e.g. additions to
>>> return values sets.>
>>> thanks for working on this.
>>>
^ permalink raw reply [relevance 4%]
* Re: [dpdk-dev] [PATCH v1] doc: policy on promotion of experimental APIs
2021-06-30 19:56 4% ` Tyler Retzlaff
@ 2021-07-01 7:56 0% ` Ferruh Yigit
2021-07-01 14:45 4% ` Tyler Retzlaff
2021-07-01 10:19 4% ` Kinsella, Ray
1 sibling, 1 reply; 200+ results
From: Ferruh Yigit @ 2021-07-01 7:56 UTC (permalink / raw)
To: Tyler Retzlaff, Kinsella, Ray; +Cc: dev, thomas, david.marchand, stephen
On 6/30/2021 8:56 PM, Tyler Retzlaff wrote:
> On Tue, Jun 29, 2021 at 07:38:05PM +0100, Kinsella, Ray wrote:
>>
>>
>>>> +Promotion to stable
>>>> +~~~~~~~~~~~~~~~~~~~
>>>> +
>>>> +Ordinarily APIs marked as ``experimental`` will be promoted to the stable API
>>>> +once a maintainer and/or the original contributor is satisfied that the API is
>>>> +reasonably mature. In exceptional circumstances, should an API still be
>>>
>>> this seems vague and arbitrary. is there a way we can have a more
>>> quantitative metric for what "reasonably mature" means.
>>>
>>>> +classified as ``experimental`` after two years and is without any prospect of
>>>> +becoming part of the stable API. The API will then become a candidate for
>>>> +removal, to avoid the acculumation of abandoned symbols.
>>>
>>> i think with the above comment the basis for removal then depends on
>>> whatever metric is used to determine maturity.
>>> if it is still changing
>>> then it seems like it is useful and still evolving so perhaps should not
>>> be removed but hasn't changed but doesn't meet the metric for being made
>>> stable then perhaps it becomes a candidate for removal.
>>
>> Good idea.
>>
>> I think it is reasonable to add a clause that indicates that any change
>> to the "API signature" would reset the clock.
>
> a time based strategy works but i guess the follow-on to that is how is
> the clock tracked and how does it get updated? i don't think trying to
> troll through git history will be effective.
>
We are grouping the new experimental APIs in the version file based on the
release they are added with a comment, thanks to Dave. Like:
# added in 19.02
rte_extmem_attach;
rte_extmem_detach;
rte_extmem_register;
rte_extmem_unregister;
# added in 19.05
rte_dev_dma_map;
rte_dev_dma_unmap;
....
Please check 'lib/eal/version.map' as sample.
This enables us easily see the release experimental APIs are added.
> one nit, i think "api signature" doesn't cover all cases of what i would
> regard as change. i would prefer to define it as "no change where api/abi
> compatibility or semantic change occurred"? which is a lot more strict
> but in practice is necessary to support binaries when abi/api is stable.
>
> i.e. if a recompile is necessary with or without code change then it's a
> change.
>
>>
>> However equally any changes to the implementation do not reset the clock.
>>
>> Would that work?
>
> that works for me.
>
>>
>>>
>>>> +
>>>> +The promotion or removal of symbols will typically form part of a conversation
>>>> +between the maintainer and the original contributor.
>>>
>>> this should extend beyond just symbols. there are other changes that
>>> impact the abi where exported symbols don't change. e.g. additions to
>>> return values sets.>
>>> thanks for working on this.
>>>
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH v1] doc: policy on promotion of experimental APIs
2021-06-29 18:38 0% ` Kinsella, Ray
@ 2021-06-30 19:56 4% ` Tyler Retzlaff
2021-07-01 7:56 0% ` Ferruh Yigit
2021-07-01 10:19 4% ` Kinsella, Ray
0 siblings, 2 replies; 200+ results
From: Tyler Retzlaff @ 2021-06-30 19:56 UTC (permalink / raw)
To: Kinsella, Ray; +Cc: dev, ferruh.yigit, thomas, david.marchand, stephen
On Tue, Jun 29, 2021 at 07:38:05PM +0100, Kinsella, Ray wrote:
>
>
> >> +Promotion to stable
> >> +~~~~~~~~~~~~~~~~~~~
> >> +
> >> +Ordinarily APIs marked as ``experimental`` will be promoted to the stable API
> >> +once a maintainer and/or the original contributor is satisfied that the API is
> >> +reasonably mature. In exceptional circumstances, should an API still be
> >
> > this seems vague and arbitrary. is there a way we can have a more
> > quantitative metric for what "reasonably mature" means.
> >
> >> +classified as ``experimental`` after two years and is without any prospect of
> >> +becoming part of the stable API. The API will then become a candidate for
> >> +removal, to avoid the acculumation of abandoned symbols.
> >
> > i think with the above comment the basis for removal then depends on
> > whatever metric is used to determine maturity.
> > if it is still changing
> > then it seems like it is useful and still evolving so perhaps should not
> > be removed but hasn't changed but doesn't meet the metric for being made
> > stable then perhaps it becomes a candidate for removal.
>
> Good idea.
>
> I think it is reasonable to add a clause that indicates that any change
> to the "API signature" would reset the clock.
a time based strategy works but i guess the follow-on to that is how is
the clock tracked and how does it get updated? i don't think trying to
troll through git history will be effective.
one nit, i think "api signature" doesn't cover all cases of what i would
regard as change. i would prefer to define it as "no change where api/abi
compatibility or semantic change occurred"? which is a lot more strict
but in practice is necessary to support binaries when abi/api is stable.
i.e. if a recompile is necessary with or without code change then it's a
change.
>
> However equally any changes to the implementation do not reset the clock.
>
> Would that work?
that works for me.
>
> >
> >> +
> >> +The promotion or removal of symbols will typically form part of a conversation
> >> +between the maintainer and the original contributor.
> >
> > this should extend beyond just symbols. there are other changes that
> > impact the abi where exported symbols don't change. e.g. additions to
> > return values sets.>
> > thanks for working on this.
> >
^ permalink raw reply [relevance 4%]
* Re: [dpdk-dev] [dpdk-ci] [PATCH v2 2/2] drivers: add octeontx crypto adapter data path
@ 2021-06-30 16:23 4% ` Brandon Lo
0 siblings, 0 replies; 200+ results
From: Brandon Lo @ 2021-06-30 16:23 UTC (permalink / raw)
To: Akhil Goyal
Cc: Shijith Thotton, dev, ci, Pavan Nikhilesh Bhagavatula,
Anoob Joseph, Jerin Jacob Kollanukkaran, abhinandan.gujjar,
Ankur Dwivedi
Hi Akhil,
I believe the FreeBSD 13 failure appeared because new requirements
were added for drivers/event/octeontx.
The ABI reference was taken at the v21.05 release which was able to
build this driver at the time.
I will try to look for a way to produce a real ABI test.
Thanks,
Brandon
On Wed, Jun 30, 2021 at 4:54 AM Akhil Goyal <gakhil@marvell.com> wrote:
>
> > Added support for crypto adapter OP_FORWARD mode.
> >
> > As OcteonTx CPT crypto completions could be out of order, each crypto op
> > is enqueued to CPT, dequeued from CPT and enqueued to SSO one-by-one.
> >
> > Signed-off-by: Shijith Thotton <sthotton@marvell.com>
> > ---
> This patch shows a CI warning for FreeBSD, but was not able to locate the error/warning in the logs.
> Can anybody confirm what is the issue?
>
> http://mails.dpdk.org/archives/test-report/2021-June/200637.html
>
> Regards,
> Akhil
--
Brandon Lo
UNH InterOperability Laboratory
21 Madbury Rd, Suite 100, Durham, NH 03824
blo@iol.unh.edu
www.iol.unh.edu
^ permalink raw reply [relevance 4%]
* Re: [dpdk-dev] 20.11.2 patches review and test
2021-06-26 23:28 1% Xueming Li
@ 2021-06-30 10:33 0% ` Jiang, YuX
2021-07-06 2:37 0% ` Xueming(Steven) Li
2021-07-06 3:26 0% ` [dpdk-dev] [dpdk-stable] " Kalesh Anakkur Purayil
1 sibling, 1 reply; 200+ results
From: Jiang, YuX @ 2021-06-30 10:33 UTC (permalink / raw)
To: Xueming Li, stable
Cc: dev, Abhishek Marathe, Akhil Goyal, Ali Alnubani, Walker,
Benjamin, David Christensen, Govindharajan, Hariprasad,
Hemant Agrawal, Stokes, Ian, Jerin Jacob, Mcnamara, John,
Ju-Hyoung Lee, Kevin Traynor, Luca Boccassi, Pei Zhang, Yu,
PingX, Xu, Qian Q, Raslan Darawsheh, Thomas Monjalon, Peng, Yuan,
Chen, Zhaoyan
All,
Testing with dpdk v20.11.2-rc2 from Intel looks good, no critical issue is found. All of them are known issues.
Below two issues has been fixed in 20.11.2-rc2:
1) Fedora34 GCC11 and Clang12 build failed.
2) dcf_lifecycle/handle_acl_filter_05: after reset port the mac changed.
# Basic Intel(R) NIC testing
*PF(i40e, ixgbe): test scenarios including rte_flow/TSO/Jumboframe/checksum offload/Tunnel, etc. Listed but not all.
- Below two known issues are found.
1)https://bugs.dpdk.org/show_bug.cgi?id=687 : unit_tests_power/power_cpufreq: unit test failed. This issue is found in 21.05 and not fixed yet.
2)ddp_gtp_qregion/fd_gtpu_ipv4_dstip: flow director does not work. This issue is found in 21.05, fixed in 21.08.
Fixed patch link: http://patches.dpdk.org/project/dpdk/patch/20210519032745.707639-1-stevex.yang@intel.com/
*VF(i40e,ixgbe): test scenarios including vf-rte_flow/TSO/Jumboframe/checksum offload/Tunnel, Listed but not all.
- No new issues are found.
*PF/VF(ice): test scenarios including switch features/Flow Director/Advanced RSS/ACL/DCF/Flexible Descriptor and so on, Listed but not all.
- Below 3 known DPDK issues are found.
1)rxtx_offload/rxoffload_port: Pkt1 can't be distributed to the same queue. This issue is found in 21.05, fixed in 21.08
Fixed patch link: http://patches.dpdk.org/project/dpdk/patch/20210527064251.242076-1-dapengx.yu@intel.com/
2)cvl_advanced_iavf_rss: change the SCTP port value, the hash value remains unchanged. This issue is found in 20.11-rc3, fixed in 21.02, but it’s belong to 21.02 new feature, won’t backporting to LTS20.11.
3)Can't create 512 acl rules after creating a full mask switch rule. This issue is also occurred in dpdk 20.11 and not fixed yet.
* Build: cover the build test combination with latest GCC/Clang/ICC version and the popular OS revision such as Ubuntu20.04, CentOS8.3 and so on. Listed but not all.
- All passed.
* Intel NIC single core/NIC performance: test scenarios including PF/VF single core performance test(AVX2+AVX512) test and so on. Listed but not all.
- All passed. No big data drop.
# Basic cryptodev and virtio testing
* Virtio: both function and performance test are covered. Such as PVP/Virtio_loopback/virtio-user loopback/virtio-net VM2VM perf testing, etc.. Listed but not all.
- One known issues as below:
> (1)The UDP fragmentation offload feature of Virtio-net device can’t be turned on in the VM, kernel issue, bugzilla has been submited: https://bugzilla.kernel.org/show_bug.cgi?id=207075, not fixed yet.
* Cryptodev:
- Function test: test scenarios including Cryptodev API testing/CompressDev ISA-L/QAT/ZLIB PMD Testing/FIPS, etc. Listed but not all.
- All passed.
- Performance test: test scenarios including Thoughput Performance /Cryptodev Latency, etc. Listed but not all.
- No big data drop.
Best regards,
Yu Jiang
> -----Original Message-----
> From: dev <dev-bounces@dpdk.org> On Behalf Of Xueming Li
> Sent: Sunday, June 27, 2021 7:28 AM
> To: stable@dpdk.org
> Cc: dev@dpdk.org; Abhishek Marathe <Abhishek.Marathe@microsoft.com>;
> Akhil Goyal <akhil.goyal@nxp.com>; Ali Alnubani <alialnu@nvidia.com>;
> Walker, Benjamin <benjamin.walker@intel.com>; David Christensen
> <drc@linux.vnet.ibm.com>; Govindharajan, Hariprasad
> <hariprasad.govindharajan@intel.com>; Hemant Agrawal
> <hemant.agrawal@nxp.com>; Stokes, Ian <ian.stokes@intel.com>; Jerin
> Jacob <jerinj@marvell.com>; Mcnamara, John <john.mcnamara@intel.com>;
> Ju-Hyoung Lee <juhlee@microsoft.com>; Kevin Traynor
> <ktraynor@redhat.com>; Luca Boccassi <bluca@debian.org>; Pei Zhang
> <pezhang@redhat.com>; Yu, PingX <pingx.yu@intel.com>; Xu, Qian Q
> <qian.q.xu@intel.com>; Raslan Darawsheh <rasland@nvidia.com>; Thomas
> Monjalon <thomas@monjalon.net>; Peng, Yuan <yuan.peng@intel.com>;
> Chen, Zhaoyan <zhaoyan.chen@intel.com>; xuemingl@nvidia.com
> Subject: [dpdk-dev] 20.11.2 patches review and test
>
> Hi all,
>
> Here is a list of patches targeted for stable release 20.11.2.
>
> The planned date for the final release is 6th July.
>
> Please help with testing and validation of your use cases and report any
> issues/results with reply-all to this mail. For the final release the fixes and
> reported validations will be added to the release notes.
>
> A release candidate tarball can be found at:
>
> https://dpdk.org/browse/dpdk-stable/tag/?id=v20.11.2-rc2
>
> These patches are located at branch 20.11 of dpdk-stable repo:
> https://dpdk.org/browse/dpdk-stable/
>
> Thanks.
>
> Xueming Li <xuemingl@nvidia.com>
>
> ---
> Adam Dybkowski (3):
> common/qat: increase IM buffer size for GEN3
> compress/qat: enable compression on GEN3
> crypto/qat: fix null authentication request
>
> Ajit Khaparde (7):
> net/bnxt: fix RSS context cleanup
> net/bnxt: check kvargs parsing
> net/bnxt: fix resource cleanup
> doc: fix formatting in testpmd guide
> net/bnxt: fix mismatched type comparison in MAC restore
> net/bnxt: check PCI config read
> net/bnxt: fix mismatched type comparison in Rx
>
> Alvin Zhang (11):
> net/ice: fix VLAN filter with PF
> net/i40e: fix input set field mask
> net/igc: fix Rx RSS hash offload capability
> net/igc: fix Rx error counter for bad length
> net/e1000: fix Rx error counter for bad length
> net/e1000: fix max Rx packet size
> net/igc: fix Rx packet size
> net/ice: fix fast mbuf freeing
> net/iavf: fix VF to PF command failure handling
> net/i40e: fix VF RSS configuration
> net/igc: fix speed configuration
>
> Anatoly Burakov (3):
> fbarray: fix log message on truncation error
> power: do not skip saving original P-state governor
> power: save original ACPI governor always
>
> Andrew Boyer (1):
> net/ionic: fix completion type in lif init
>
> Andrew Rybchenko (4):
> net/failsafe: fix RSS hash offload reporting
> net/failsafe: report minimum and maximum MTU
> common/sfc_efx: remove GENEVE from supported tunnels
> net/sfc: fix mark support in EF100 native Rx datapath
>
> Andy Moreton (2):
> common/sfc_efx/base: limit reported MCDI response length
> common/sfc_efx/base: add missing MCDI response length checks
>
> Ankur Dwivedi (1):
> crypto/octeontx: fix session-less mode
>
> Apeksha Gupta (1):
> examples/l2fwd-crypto: skip masked devices
>
> Arek Kusztal (1):
> crypto/qat: fix offset for out-of-place scatter-gather
>
> Beilei Xing (1):
> net/i40evf: fix packet loss for X722
>
> Bing Zhao (1):
> net/mlx5: fix loopback for Direct Verbs queue
>
> Bruce Richardson (2):
> build: exclude meson files from examples installation
> raw/ioat: fix script for configuring small number of queues
>
> Chaoyong He (1):
> doc: fix multiport syntax in nfp guide
>
> Chenbo Xia (1):
> examples/vhost: check memory table query
>
> Chengchang Tang (20):
> net/hns3: fix HW buffer size on MTU update
> net/hns3: fix processing Tx offload flags
> net/hns3: fix Tx checksum for UDP packets with special port
> net/hns3: fix long task queue pairs reset time
> ethdev: validate input in module EEPROM dump
> ethdev: validate input in register info
> ethdev: validate input in EEPROM info
> net/hns3: fix rollback after setting PVID failure
> net/hns3: fix timing in resetting queues
> net/hns3: fix queue state when concurrent with reset
> net/hns3: fix configure FEC when concurrent with reset
> net/hns3: fix use of command status enumeration
> examples: add eal cleanup to examples
> net/bonding: fix adding itself as its slave
> net/hns3: fix timing in mailbox
> app/testpmd: fix max queue number for Tx offloads
> net/tap: fix interrupt vector array size
> net/bonding: fix socket ID check
> net/tap: check ioctl on restore
> examples/timer: fix time interval
>
> Chengwen Feng (50):
> net/hns3: fix flow counter value
> net/hns3: fix VF mailbox head field
> net/hns3: support get device version when dump register
> net/hns3: fix some packet types
> net/hns3: fix missing outer L4 UDP flag for VXLAN
> net/hns3: remove VLAN/QinQ ptypes from support list
> test: check thread creation
> common/dpaax: fix possible null pointer access
> examples/ethtool: remove unused parsing
> net/hns3: fix flow director lock
> net/e1000/base: fix timeout for shadow RAM write
> net/hns3: fix setting default MAC address in bonding of VF
> net/hns3: fix possible mismatched response of mailbox
> net/hns3: fix VF handling LSC event in secondary process
> net/hns3: fix verification of NEON support
> mbuf: check shared memory before dumping dynamic space
> eventdev: remove redundant thread name setting
> eventdev: fix memory leakage on thread creation failure
> net/kni: check init result
> net/hns3: fix mailbox error message
> net/hns3: fix processing link status message on PF
> net/hns3: remove unused mailbox macro and struct
> net/bonding: fix leak on remove
> net/hns3: fix handling link update
> net/i40e: fix negative VEB index
> net/i40e: remove redundant VSI check in Tx queue setup
> net/virtio: fix getline memory leakage
> net/hns3: log time delta in decimal format
> net/hns3: fix time delta calculation
> net/hns3: remove unused macros
> net/hns3: fix vector Rx burst limitation
> net/hns3: remove read when enabling TM QCN error event
> net/hns3: remove unused VMDq code
> net/hns3: increase readability in logs
> raw/ntb: check SPAD user index
> raw/ntb: check memory allocations
> ipc: check malloc sync reply result
> eal: fix service core list parsing
> ipc: use monotonic clock
> net/hns3: return error on PCI config write failure
> net/hns3: fix log on flow director clear
> net/hns3: clear hash map on flow director clear
> net/hns3: fix querying flow director counter for out param
> net/hns3: fix TM QCN error event report by MSI-X
> net/hns3: fix mailbox message ID in log
> net/hns3: fix secondary process request start/stop Rx/Tx
> net/hns3: fix ordering in secondary process initialization
> net/hns3: fail setting FEC if one bit mode is not supported
> net/mlx4: fix secondary process initialization ordering
> net/mlx5: fix secondary process initialization ordering
>
> Ciara Loftus (1):
> net/af_xdp: fix error handling during Rx queue setup
>
> Ciara Power (2):
> telemetry: fix race on callbacks list
> test/crypto: fix return value of a skipped test
>
> Conor Walsh (1):
> examples/l3fwd: fix LPM IPv6 subnets
>
> Cristian Dumitrescu (3):
> table: fix actions with different data size
> pipeline: fix instruction translation
> pipeline: fix endianness conversions
>
> Dapeng Yu (3):
> net/igc: remove MTU setting limitation
> net/e1000: remove MTU setting limitation
> examples/packet_ordering: fix port configuration
>
> David Christensen (1):
> config/ppc: reduce number of cores and NUMA nodes
>
> David Harton (1):
> net/ena: fix releasing Tx ring mbufs
>
> David Hunt (4):
> test/power: fix CPU frequency check
> test/power: add turbo mode to frequency check
> test/power: fix low frequency test when turbo enabled
> test/power: fix turbo test
>
> David Marchand (18):
> doc: fix sphinx rtd theme import in GHA
> service: clean references to removed symbol
> eal: fix evaluation of log level option
> ci: hook to GitHub Actions
> ci: enable v21 ABI checks
> ci: fix package installation in GitHub Actions
> ci: ignore APT update failure in GitHub Actions
> ci: catch coredumps
> vhost: fix offload flags in Rx path
> bus/fslmc: remove unused debug macro
> eal: fix leak in shared lib mode detection
> event/dpaa2: remove unused macros
> net/ice/base: fix memory allocation wrapper
> net/ice: fix leak on thread termination
> devtools: fix orphan symbols check with busybox
> net/vhost: restore pseudo TSO support
> net/ark: fix leak on thread termination
> build: fix drivers selection without Python
>
> Dekel Peled (1):
> common/mlx5: fix DevX read output buffer size
>
> Dmitry Kozlyuk (4):
> net/pcap: fix format string
> eal/windows: add missing SPDX license tag
> buildtools: fix all drivers disabled on Windows
> examples/rxtx_callbacks: fix port ID format specifier
>
> Ed Czeck (2):
> net/ark: update packet director initial state
> net/ark: refactor Rx buffer recovery
>
> Elad Nachman (2):
> kni: support async user request
> kni: fix kernel deadlock with bifurcated device
>
> Feifei Wang (2):
> net/i40e: fix parsing packet type for NEON
> test/trace: fix race on collected perf data
>
> Ferruh Yigit (9):
> power: remove duplicated symbols from map file
> log/linux: make default output stderr
> license: fix typos
> drivers/net: fix FW version query
> net/bnx2x: fix build with GCC 11
> net/bnx2x: fix build with GCC 11
> net/ice/base: fix build with GCC 11
> net/tap: fix build with GCC 11
> test/table: fix build with GCC 11
>
> Gregory Etelson (2):
> app/testpmd: fix tunnel offload flows cleanup
> net/mlx5: fix tunnel offload private items location
>
> Guoyang Zhou (1):
> net/hinic: fix crash in secondary process
>
> Haiyue Wang (1):
> net/ixgbe: fix Rx errors statistics for UDP checksum
>
> Harman Kalra (1):
> event/octeontx2: fix device reconfigure for single slot
>
> Heinrich Kuhn (1):
> net/nfp: fix reporting of RSS capabilities
>
> Hemant Agrawal (3):
> ethdev: add missing buses in device iterator
> crypto/dpaa_sec: affine the thread portal affinity
> crypto/dpaa2_sec: fix close and uninit functions
>
> Hongbo Zheng (9):
> app/testpmd: fix Tx/Rx descriptor query error log
> net/hns3: fix FLR miss detection
> net/hns3: delete redundant blank line
> bpf: fix JSLT validation
> common/sfc_efx/base: fix dereferencing null pointer
> power: fix sanity checks for guest channel read
> net/hns3: fix VF alive notification after config restore
> examples/l3fwd-power: fix empty poll thresholds
> net/hns3: fix concurrent interrupt handling
>
> Huisong Li (23):
> net/hns3: fix device capabilities for copper media type
> net/hns3: remove unused parameter markers
> net/hns3: fix reporting undefined speed
> net/hns3: fix link update when failed to get link info
> net/hns3: fix flow control exception
> app/testpmd: fix bitmap of link speeds when force speed
> net/hns3: fix flow control mode
> net/hns3: remove redundant mailbox response
> net/hns3: fix DCB mode check
> net/hns3: fix VMDq mode check
> net/hns3: fix mbuf leakage
> net/hns3: fix link status when port is stopped
> net/hns3: fix link speed when port is down
> app/testpmd: fix forward lcores number for DCB
> app/testpmd: fix DCB forwarding configuration
> app/testpmd: fix DCB re-configuration
> app/testpmd: verify DCB config during forward config
> net/hns3: fix Rx/Tx queue numbers check
> net/hns3: fix requested FC mode rollback
> net/hns3: remove meaningless packet buffer rollback
> net/hns3: fix DCB configuration
> net/hns3: fix DCB reconfiguration
> net/hns3: fix link speed when VF device is down
>
> Ibtisam Tariq (1):
> examples/vhost_crypto: remove unused short option
>
> Igor Chauskin (2):
> net/ena: switch memcpy to optimized version
> net/ena: fix parsing of large LLQ header device argument
>
> Igor Russkikh (2):
> net/qede: reduce log verbosity
> net/qede: accept bigger RSS table
>
> Ilya Maximets (1):
> net/virtio: fix interrupt unregistering for listening socket
>
> Ivan Malov (5):
> net/sfc: fix buffer size for flow parse
> net: fix comment in IPv6 header
> net/sfc: fix error path inconsistency
> common/sfc_efx/base: fix indication of MAE encap support
> net/sfc: fix outer rule rollback on error
>
> Jerin Jacob (1):
> examples: fix pkg-config override
>
> Jiawei Wang (4):
> app/testpmd: fix NVGRE encap configuration
> net/mlx5: fix resource release for mirror flow
> net/mlx5: fix RSS flow item expansion for GRE key
> net/mlx5: fix RSS flow item expansion for NVGRE
>
> Jiawei Zhu (1):
> net/mlx5: fix Rx segmented packets on mbuf starvation
>
> Jiawen Wu (4):
> net/txgbe: remove unused functions
> net/txgbe: fix Rx missed packet counter
> net/txgbe: update packet type
> net/txgbe: fix QinQ strip
>
> Jiayu Hu (2):
> vhost: fix queue initialization
> vhost: fix redundant vring status change notification
>
> Jie Wang (1):
> net/ice: fix VSI array out of bounds access
>
> John Daley (2):
> net/enic: fix flow initialization error handling
> net/enic: enable GENEVE offload via VNIC configuration
>
> Juraj Linkeš (1):
> eal/arm64: fix platform register bit
>
> Kai Ji (2):
> test/crypto: fix auth-cipher compare length in OOP
> test/crypto: copy offset data to OOP destination buffer
>
> Kalesh AP (23):
> net/bnxt: remove unused macro
> net/bnxt: fix VNIC configuration
> net/bnxt: fix firmware fatal error handling
> net/bnxt: fix FW readiness check during recovery
> net/bnxt: fix device readiness check
> net/bnxt: fix VF info allocation
> net/bnxt: fix HWRM and FW incompatibility handling
> net/bnxt: mute some failure logs
> app/testpmd: check MAC address query
> net/bnxt: fix PCI write check
> net/bnxt: fix link state operations
> net/bnxt: fix timesync when PTP is not supported
> net/bnxt: fix memory allocation for command response
> net/bnxt: fix double free in port start failure
> net/bnxt: fix configuring LRO
> net/bnxt: fix health check alarm cancellation
> net/bnxt: fix PTP support for Thor
> net/bnxt: fix ring count calculation for Thor
> net/bnxt: remove unnecessary forward declarations
> net/bnxt: remove unused function parameters
> net/bnxt: drop unused attribute
> net/bnxt: fix single PF per port check
> net/bnxt: prevent device access in error state
>
> Kamil Vojanec (1):
> net/mlx5/linux: fix firmware version
>
> Kevin Traynor (5):
> test/cmdline: fix inputs array
> test/crypto: fix build with GCC 11
> crypto/zuc: fix build with GCC 11
> test: fix build with GCC 11
> test/cmdline: silence clang 12 warning
>
> Konstantin Ananyev (1):
> acl: fix build with GCC 11
>
> Lance Richardson (8):
> net/bnxt: fix Rx buffer posting
> net/bnxt: fix Tx length hint threshold
> net/bnxt: fix handling of null flow mask
> test: fix TCP header initialization
> net/bnxt: fix Rx descriptor status
> net/bnxt: fix Rx queue count
> net/bnxt: fix dynamic VNIC count
> eal: fix memory mapping on 32-bit target
>
> Leyi Rong (1):
> net/iavf: fix packet length parsing in AVX512
>
> Li Zhang (1):
> net/mlx5: fix flow actions index in cache
>
> Luc Pelletier (2):
> eal: fix race in control thread creation
> eal: fix hang in control thread creation
>
> Marvin Liu (5):
> vhost: fix split ring potential buffer overflow
> vhost: fix packed ring potential buffer overflow
> vhost: fix batch dequeue potential buffer overflow
> vhost: fix initialization of temporary header
> vhost: fix initialization of async temporary header
>
> Matan Azrad (5):
> common/mlx5/linux: add glue function to query WQ
> common/mlx5: add DevX command to query WQ
> common/mlx5: add DevX commands for queue counters
> vdpa/mlx5: fix virtq cleaning
> vdpa/mlx5: fix device unplug
>
> Michael Baum (1):
> net/mlx5: fix flow age event triggering
>
> Michal Krawczyk (5):
> net/ena/base: improve style and comments
> net/ena/base: fix type conversions by explicit casting
> net/ena/base: destroy multiple wait events
> net/ena: fix crash with unsupported device argument
> net/ena: indicate Rx RSS hash presence
>
> Min Hu (Connor) (25):
> net/hns3: fix MTU config complexity
> net/hns3: update HiSilicon copyright syntax
> net/hns3: fix copyright date
> examples/ptpclient: remove wrong comment
> test/bpf: fix error message
> doc: fix HiSilicon copyright syntax
> net/hns3: remove unused macros
> net/hns3: remove unused macro
> app/eventdev: fix overflow in lcore list parsing
> test/kni: fix a comment
> test/kni: check init result
> net/hns3: fix typos on comments
> net/e1000: fix flow error message object
> app/testpmd: fix division by zero on socket memory dump
> net/kni: warn on stop failure
> app/bbdev: check memory allocation
> app/bbdev: fix HARQ error messages
> raw/skeleton: add missing check after setting attribute
> test/timer: check memzone allocation
> app/crypto-perf: check memory allocation
> examples/flow_classify: fix NUMA check of port and core
> examples/l2fwd-cat: fix NUMA check of port and core
> examples/skeleton: fix NUMA check of port and core
> test: check flow classifier creation
> test: fix division by zero
>
> Murphy Yang (3):
> net/ixgbe: fix RSS RETA being reset after port start
> net/i40e: fix flow director config after flow validate
> net/i40e: fix flow director for common pctypes
>
> Natanael Copa (5):
> common/dpaax/caamflib: fix build with musl
> bus/dpaa: fix 64-bit arch detection
> bus/dpaa: fix build with musl
> net/cxgbe: remove use of uint type
> app/testpmd: fix build with musl
>
> Nipun Gupta (1):
> bus/dpaa: fix statistics reading
>
> Nithin Dabilpuram (3):
> vfio: do not merge contiguous areas
> vfio: fix DMA mapping granularity for IOVA as VA
> test/mem: fix page size for external memory
>
> Olivier Matz (1):
> test/mempool: fix object initializer
>
> Pallavi Kadam (1):
> bus/pci: skip probing some Windows NDIS devices
>
> Pavan Nikhilesh (4):
> test/event: fix timeout accuracy
> app/eventdev: fix timeout accuracy
> app/eventdev: fix lcore parsing skipping last core
> event/octeontx2: fix XAQ pool reconfigure
>
> Pu Xu (1):
> ip_frag: fix fragmenting IPv4 packet with header option
>
> Qi Zhang (8):
> net/ice/base: fix payload indicator on ptype
> net/ice/base: fix uninitialized struct
> net/ice/base: cleanup filter list on error
> net/ice/base: fix memory allocation for MAC addresses
> net/iavf: fix TSO max segment size
> doc: fix matching versions in ice guide
> net/iavf: fix wrong Tx context descriptor
> common/iavf: fix duplicated offload bit
>
> Radha Mohan Chintakuntla (1):
> raw/octeontx2_dma: assign PCI device in DPI VF
>
> Raslan Darawsheh (1):
> ethdev: update flow item GTP QFI definition
>
> Richael Zhuang (2):
> test/power: add delay before checking CPU frequency
> test/power: round CPU frequency to check
>
> Robin Zhang (6):
> net/i40e: announce request queue capability in PF
> doc: update recommended versions for i40e
> net/i40e: fix lack of MAC type when set MAC address
> net/iavf: fix lack of MAC type when set MAC address
> net/iavf: fix primary MAC type when starting port
> net/i40e: fix primary MAC type when starting port
>
> Rohit Raj (3):
> net/dpaa2: fix getting link status
> net/dpaa: fix getting link status
> examples/l2fwd-crypto: fix packet length while decryption
>
> Roy Shterman (1):
> mem: fix freeing segments in --huge-unlink mode
>
> Satheesh Paul (1):
> net/octeontx2: fix VLAN filter
>
> Savinay Dharmappa (1):
> sched: fix traffic class oversubscription parameter
>
> Shijith Thotton (3):
> eventdev: fix case to initiate crypto adapter service
> event/octeontx2: fix crypto adapter queue pair operations
> event/octeontx2: configure crypto adapter xaq pool
>
> Siwar Zitouni (1):
> net/ice: fix disabling promiscuous mode
>
> Somnath Kotur (5):
> net/bnxt: fix xstats get
> net/bnxt: fix Rx and Tx timestamps
> net/bnxt: fix Tx timestamp init
> net/bnxt: refactor multi-queue Rx configuration
> net/bnxt: fix Rx timestamp when FIFO pending bit is set
>
> Stanislaw Kardach (6):
> test: proceed if timer subsystem already initialized
> stack: allow lock-free only on relevant architectures
> test/distributor: fix worker notification in burst mode
> test/distributor: fix burst flush on worker quit
> net/ena: remove endian swap functions
> net/ena: report default ring size
>
> Stephen Hemminger (2):
> kni: refactor user request processing
> net/bnxt: use prefix on global function
>
> Suanming Mou (1):
> net/mlx5: fix counter offset detection
>
> Tal Shnaiderman (2):
> eal/windows: fix default thread priority
> eal/windows: fix return codes of pthread shim layer
>
> Tengfei Zhang (1):
> net/pcap: fix file descriptor leak on close
>
> Thinh Tran (1):
> test: fix autotest handling of skipped tests
>
> Thomas Monjalon (18):
> bus/pci: fix Windows kernel driver categories
> eal: fix comment of OS-specific header files
> buildtools: fix build with busybox
> build: detect execinfo library on Linux
> build: remove redundant _GNU_SOURCE definitions
> eal: fix build with musl
> net/igc: remove use of uint type
> event/dlb: fix header includes for musl
> examples/bbdev: fix header include for musl
> drivers: fix log level after loading
> app/regex: fix usage text
> app/testpmd: fix usage text
> doc: fix names of UIO drivers
> doc: fix build with Sphinx 4
> bus/pci: support I/O port operations with musl
> app: fix exit messages
> regex/octeontx2: remove unused include directory
> doc: remove PDF requirements
>
> Tianyu Li (1):
> net/memif: fix Tx bps statistics for zero-copy
>
> Timothy McDaniel (2):
> event/dlb2: remove references to deferred scheduling
> doc: fix runtime options in DLB2 guide
>
> Tyler Retzlaff (1):
> eal: add C++ include guard for reciprocal header
>
> Vadim Podovinnikov (1):
> net/bonding: fix LACP system address check
>
> Venkat Duvvuru (1):
> net/bnxt: fix queues per VNIC
>
> Viacheslav Ovsiienko (16):
> net/mlx5: fix external buffer pool registration for Rx queue
> net/mlx5: fix metadata item validation for ingress flows
> net/mlx5: fix hashed list size for tunnel flow groups
> net/mlx5: fix UAR allocation diagnostics messages
> common/mlx5: add timestamp format support to DevX
> vdpa/mlx5: support timestamp format
> net/mlx5: fix Rx metadata leftovers
> net/mlx5: fix drop action for Direct Rules/Verbs
> net/mlx4: fix RSS action with null hash key
> net/mlx5: support timestamp format
> regex/mlx5: support timestamp format
> app/testpmd: fix segment number check
> net/mlx5: remove drop queue function prototypes
> net/mlx4: fix buffer leakage on device close
> net/mlx5: fix probing device in legacy bonding mode
> net/mlx5: fix receiving queue timestamp format
>
> Wei Huang (1):
> raw/ifpga: fix device name format
>
> Wenjun Wu (3):
> net/ice: check some functions return
> net/ice: fix RSS hash update
> net/ice: fix RSS for L2 packet
>
> Wenwu Ma (1):
> net/ice: fix illegal access when removing MAC filter
>
> Wenzhuo Lu (2):
> net/iavf: fix crash in AVX512
> net/ice: fix crash in AVX512
>
> Wisam Jaddo (1):
> app/flow-perf: fix encap/decap actions
>
> Xiao Wang (1):
> vdpa/ifc: check PCI config read
>
> Xiaoyu Min (4):
> net/mlx5: support RSS expansion for IPv6 GRE
> net/mlx5: fix shared inner RSS
> net/mlx5: fix missing shared RSS hash types
> net/mlx5: fix redundant flow after RSS expansion
>
> Xiaoyun Li (2):
> app/testpmd: remove unnecessary UDP tunnel check
> net/i40e: fix IPv4 fragment offload
>
> Xueming Li (2):
> version: 20.11.2-rc1
> net/virtio: fix vectorized Rx queue rearm
>
> Youri Querry (1):
> bus/fslmc: fix random portal hangs with qbman 5.0
>
> Yunjian Wang (5):
> vfio: fix API description
> net/mlx5: fix using flow tunnel before null check
> vfio: fix duplicated user mem map
> net/mlx4: fix leak when configured repeatedly
> net/mlx5: fix leak when configured repeatedly
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH v1] doc: policy on promotion of experimental APIs
2021-06-29 16:28 3% ` Tyler Retzlaff
@ 2021-06-29 18:38 0% ` Kinsella, Ray
2021-06-30 19:56 4% ` Tyler Retzlaff
0 siblings, 1 reply; 200+ results
From: Kinsella, Ray @ 2021-06-29 18:38 UTC (permalink / raw)
To: Tyler Retzlaff; +Cc: dev, ferruh.yigit, thomas, david.marchand, stephen
On 29/06/2021 17:28, Tyler Retzlaff wrote:
> On Tue, Jun 29, 2021 at 05:00:31PM +0100, Ray Kinsella wrote:
>> Clarifying the ABI policy on the promotion of experimental APIS to stable.
>> We have a fair number of APIs that have been experimental for more than
>> 2 years. This policy ammendment indicates that these APIs should be
>> promoted or removed, or should at least form a conservation between the
>> maintainer and original contributor.
>>
>> Signed-off-by: Ray Kinsella <mdr@ashroe.eu>
>> ---
>> doc/guides/contributing/abi_policy.rst | 20 +++++++++++++++++---
>> 1 file changed, 17 insertions(+), 3 deletions(-)
>>
>> diff --git a/doc/guides/contributing/abi_policy.rst b/doc/guides/contributing/abi_policy.rst
>> index 4ad87dbfed..58bc45b8a5 100644
>> --- a/doc/guides/contributing/abi_policy.rst
>> +++ b/doc/guides/contributing/abi_policy.rst
>> @@ -26,9 +26,10 @@ General Guidelines
>> symbols is managed with :ref:`ABI Versioning <abi_versioning>`.
>> #. The removal of symbols is considered an :ref:`ABI breakage <abi_breakages>`,
>> once approved these will form part of the next ABI version.
>> -#. Libraries or APIs marked as :ref:`experimental <experimental_apis>` may
>> - be changed or removed without prior notice, as they are not considered part
>> - of an ABI version.
>> +#. Libraries or APIs marked as :ref:`experimental <experimental_apis>` may be
>> + changed or removed without prior notice, as they are not considered part of
>> + an ABI version. The :ref:`experimental <experimental_apis>` status of an API
>> + is not an indefinite state.
>> #. Updates to the :ref:`minimum hardware requirements <hw_rqmts>`, which drop
>> support for hardware which was previously supported, should be treated as an
>> ABI change.
>> @@ -358,3 +359,16 @@ Libraries
>> Libraries marked as ``experimental`` are entirely not considered part of an ABI
>> version.
>> All functions in such libraries may be changed or removed without prior notice.
>> +
>> +Promotion to stable
>> +~~~~~~~~~~~~~~~~~~~
>> +
>> +Ordinarily APIs marked as ``experimental`` will be promoted to the stable API
>> +once a maintainer and/or the original contributor is satisfied that the API is
>> +reasonably mature. In exceptional circumstances, should an API still be
>
> this seems vague and arbitrary. is there a way we can have a more
> quantitative metric for what "reasonably mature" means.
>
>> +classified as ``experimental`` after two years and is without any prospect of
>> +becoming part of the stable API. The API will then become a candidate for
>> +removal, to avoid the acculumation of abandoned symbols.
>
> i think with the above comment the basis for removal then depends on
> whatever metric is used to determine maturity.
> if it is still changing
> then it seems like it is useful and still evolving so perhaps should not
> be removed but hasn't changed but doesn't meet the metric for being made
> stable then perhaps it becomes a candidate for removal.
Good idea.
I think it is reasonable to add a clause that indicates that any change
to the "API signature" would reset the clock.
However equally any changes to the implementation do not reset the clock.
Would that work?
>
>> +
>> +The promotion or removal of symbols will typically form part of a conversation
>> +between the maintainer and the original contributor.
>
> this should extend beyond just symbols. there are other changes that
> impact the abi where exported symbols don't change. e.g. additions to
> return values sets.>
> thanks for working on this.
>
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] Experimental symbols in eal lib
2021-06-24 12:14 0% ` David Marchand
2021-06-24 12:15 0% ` Kinsella, Ray
@ 2021-06-29 16:50 0% ` Tyler Retzlaff
1 sibling, 0 replies; 200+ results
From: Tyler Retzlaff @ 2021-06-29 16:50 UTC (permalink / raw)
To: David Marchand
Cc: Kinsella, Ray, Thomas Monjalon, Stephen Hemminger, Burakov,
Anatoly, dpdk-dev
On Thu, Jun 24, 2021 at 02:14:16PM +0200, David Marchand wrote:
> On Thu, Jun 24, 2021 at 12:31 PM Kinsella, Ray <mdr@ashroe.eu> wrote:
> >
> > Hi Anatoly & Thomas,
> >
> > The following eal experimental symbols are present in both v21.05 and v19.11 release. These symbols should be considered for promotion to stable as part of the v22 ABI in DPDK 21.11, as they have been experimental for >= 2yrs at this point.
>
> Just an additional comment.
> Marking stable is not the only choice.
> We can also consider hiding such symbols (marking internal) if there
> is no clear usecase out of DPDK.
+1
there has to be a very strong/clear case for promotion to public.
>
>
> --
> David Marchand
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH v1] doc: policy on promotion of experimental APIs
2021-06-29 16:00 21% [dpdk-dev] [PATCH v1] doc: policy on promotion of experimental APIs Ray Kinsella
@ 2021-06-29 16:28 3% ` Tyler Retzlaff
2021-06-29 18:38 0% ` Kinsella, Ray
2021-07-01 10:31 23% ` [dpdk-dev] [PATCH v2] " Ray Kinsella
2021-07-01 10:38 23% ` [dpdk-dev] [PATCH v3] doc: policy on the " Ray Kinsella
2 siblings, 1 reply; 200+ results
From: Tyler Retzlaff @ 2021-06-29 16:28 UTC (permalink / raw)
To: Ray Kinsella; +Cc: dev, ferruh.yigit, thomas, david.marchand, stephen
On Tue, Jun 29, 2021 at 05:00:31PM +0100, Ray Kinsella wrote:
> Clarifying the ABI policy on the promotion of experimental APIS to stable.
> We have a fair number of APIs that have been experimental for more than
> 2 years. This policy ammendment indicates that these APIs should be
> promoted or removed, or should at least form a conservation between the
> maintainer and original contributor.
>
> Signed-off-by: Ray Kinsella <mdr@ashroe.eu>
> ---
> doc/guides/contributing/abi_policy.rst | 20 +++++++++++++++++---
> 1 file changed, 17 insertions(+), 3 deletions(-)
>
> diff --git a/doc/guides/contributing/abi_policy.rst b/doc/guides/contributing/abi_policy.rst
> index 4ad87dbfed..58bc45b8a5 100644
> --- a/doc/guides/contributing/abi_policy.rst
> +++ b/doc/guides/contributing/abi_policy.rst
> @@ -26,9 +26,10 @@ General Guidelines
> symbols is managed with :ref:`ABI Versioning <abi_versioning>`.
> #. The removal of symbols is considered an :ref:`ABI breakage <abi_breakages>`,
> once approved these will form part of the next ABI version.
> -#. Libraries or APIs marked as :ref:`experimental <experimental_apis>` may
> - be changed or removed without prior notice, as they are not considered part
> - of an ABI version.
> +#. Libraries or APIs marked as :ref:`experimental <experimental_apis>` may be
> + changed or removed without prior notice, as they are not considered part of
> + an ABI version. The :ref:`experimental <experimental_apis>` status of an API
> + is not an indefinite state.
> #. Updates to the :ref:`minimum hardware requirements <hw_rqmts>`, which drop
> support for hardware which was previously supported, should be treated as an
> ABI change.
> @@ -358,3 +359,16 @@ Libraries
> Libraries marked as ``experimental`` are entirely not considered part of an ABI
> version.
> All functions in such libraries may be changed or removed without prior notice.
> +
> +Promotion to stable
> +~~~~~~~~~~~~~~~~~~~
> +
> +Ordinarily APIs marked as ``experimental`` will be promoted to the stable API
> +once a maintainer and/or the original contributor is satisfied that the API is
> +reasonably mature. In exceptional circumstances, should an API still be
this seems vague and arbitrary. is there a way we can have a more
quantitative metric for what "reasonably mature" means.
> +classified as ``experimental`` after two years and is without any prospect of
> +becoming part of the stable API. The API will then become a candidate for
> +removal, to avoid the acculumation of abandoned symbols.
i think with the above comment the basis for removal then depends on
whatever metric is used to determine maturity. if it is still changing
then it seems like it is useful and still evolving so perhaps should not
be removed but hasn't changed but doesn't meet the metric for being made
stable then perhaps it becomes a candidate for removal.
> +
> +The promotion or removal of symbols will typically form part of a conversation
> +between the maintainer and the original contributor.
this should extend beyond just symbols. there are other changes that
impact the abi where exported symbols don't change. e.g. additions to
return values sets.
thanks for working on this.
^ permalink raw reply [relevance 3%]
* [dpdk-dev] [PATCH v1] doc: policy on promotion of experimental APIs
@ 2021-06-29 16:00 21% Ray Kinsella
2021-06-29 16:28 3% ` Tyler Retzlaff
` (2 more replies)
0 siblings, 3 replies; 200+ results
From: Ray Kinsella @ 2021-06-29 16:00 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, thomas, david.marchand, stephen, Ray Kinsella
Clarifying the ABI policy on the promotion of experimental APIS to stable.
We have a fair number of APIs that have been experimental for more than
2 years. This policy ammendment indicates that these APIs should be
promoted or removed, or should at least form a conservation between the
maintainer and original contributor.
Signed-off-by: Ray Kinsella <mdr@ashroe.eu>
---
doc/guides/contributing/abi_policy.rst | 20 +++++++++++++++++---
1 file changed, 17 insertions(+), 3 deletions(-)
diff --git a/doc/guides/contributing/abi_policy.rst b/doc/guides/contributing/abi_policy.rst
index 4ad87dbfed..58bc45b8a5 100644
--- a/doc/guides/contributing/abi_policy.rst
+++ b/doc/guides/contributing/abi_policy.rst
@@ -26,9 +26,10 @@ General Guidelines
symbols is managed with :ref:`ABI Versioning <abi_versioning>`.
#. The removal of symbols is considered an :ref:`ABI breakage <abi_breakages>`,
once approved these will form part of the next ABI version.
-#. Libraries or APIs marked as :ref:`experimental <experimental_apis>` may
- be changed or removed without prior notice, as they are not considered part
- of an ABI version.
+#. Libraries or APIs marked as :ref:`experimental <experimental_apis>` may be
+ changed or removed without prior notice, as they are not considered part of
+ an ABI version. The :ref:`experimental <experimental_apis>` status of an API
+ is not an indefinite state.
#. Updates to the :ref:`minimum hardware requirements <hw_rqmts>`, which drop
support for hardware which was previously supported, should be treated as an
ABI change.
@@ -358,3 +359,16 @@ Libraries
Libraries marked as ``experimental`` are entirely not considered part of an ABI
version.
All functions in such libraries may be changed or removed without prior notice.
+
+Promotion to stable
+~~~~~~~~~~~~~~~~~~~
+
+Ordinarily APIs marked as ``experimental`` will be promoted to the stable API
+once a maintainer and/or the original contributor is satisfied that the API is
+reasonably mature. In exceptional circumstances, should an API still be
+classified as ``experimental`` after two years and is without any prospect of
+becoming part of the stable API. The API will then become a candidate for
+removal, to avoid the acculumation of abandoned symbols.
+
+The promotion or removal of symbols will typically form part of a conversation
+between the maintainer and the original contributor.
--
2.26.2
^ permalink raw reply [relevance 21%]
* [dpdk-dev] [PATCH v5 4/7] power: remove thread safety from PMD power API's
2021-06-29 15:48 3% ` [dpdk-dev] [PATCH v5 1/7] power_intrinsics: use callbacks for comparison Anatoly Burakov
@ 2021-06-29 15:48 3% ` Anatoly Burakov
2 siblings, 0 replies; 200+ results
From: Anatoly Burakov @ 2021-06-29 15:48 UTC (permalink / raw)
To: dev, David Hunt; +Cc: konstantin.ananyev, ciara.loftus
Currently, we expect that only one callback can be active at any given
moment, for a particular queue configuration, which is relatively easy
to implement in a thread-safe way. However, we're about to add support
for multiple queues per lcore, which will greatly increase the
possibility of various race conditions.
We could have used something like an RCU for this use case, but absent
of a pressing need for thread safety we'll go the easy way and just
mandate that the API's are to be called when all affected ports are
stopped, and document this limitation. This greatly simplifies the
`rte_power_monitor`-related code.
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
Notes:
v2:
- Add check for stopped queue
- Clarified doc message
- Added release notes
doc/guides/rel_notes/release_21_08.rst | 5 +
lib/power/meson.build | 3 +
lib/power/rte_power_pmd_mgmt.c | 133 ++++++++++---------------
lib/power/rte_power_pmd_mgmt.h | 6 ++
4 files changed, 67 insertions(+), 80 deletions(-)
diff --git a/doc/guides/rel_notes/release_21_08.rst b/doc/guides/rel_notes/release_21_08.rst
index 9d1cfac395..f015c509fc 100644
--- a/doc/guides/rel_notes/release_21_08.rst
+++ b/doc/guides/rel_notes/release_21_08.rst
@@ -88,6 +88,11 @@ API Changes
* eal: the ``rte_power_intrinsics`` API changed to use a callback mechanism.
+* rte_power: The experimental PMD power management API is no longer considered
+ to be thread safe; all Rx queues affected by the API will now need to be
+ stopped before making any changes to the power management scheme.
+
+
ABI Changes
-----------
diff --git a/lib/power/meson.build b/lib/power/meson.build
index c1097d32f1..4f6a242364 100644
--- a/lib/power/meson.build
+++ b/lib/power/meson.build
@@ -21,4 +21,7 @@ headers = files(
'rte_power_pmd_mgmt.h',
'rte_power_guest_channel.h',
)
+if cc.has_argument('-Wno-cast-qual')
+ cflags += '-Wno-cast-qual'
+endif
deps += ['timer', 'ethdev']
diff --git a/lib/power/rte_power_pmd_mgmt.c b/lib/power/rte_power_pmd_mgmt.c
index db03cbf420..9b95cf1794 100644
--- a/lib/power/rte_power_pmd_mgmt.c
+++ b/lib/power/rte_power_pmd_mgmt.c
@@ -40,8 +40,6 @@ struct pmd_queue_cfg {
/**< Callback mode for this queue */
const struct rte_eth_rxtx_callback *cur_cb;
/**< Callback instance */
- volatile bool umwait_in_progress;
- /**< are we currently sleeping? */
uint64_t empty_poll_stats;
/**< Number of empty polls */
} __rte_cache_aligned;
@@ -92,30 +90,11 @@ clb_umwait(uint16_t port_id, uint16_t qidx, struct rte_mbuf **pkts __rte_unused,
struct rte_power_monitor_cond pmc;
uint16_t ret;
- /*
- * we might get a cancellation request while being
- * inside the callback, in which case the wakeup
- * wouldn't work because it would've arrived too early.
- *
- * to get around this, we notify the other thread that
- * we're sleeping, so that it can spin until we're done.
- * unsolicited wakeups are perfectly safe.
- */
- q_conf->umwait_in_progress = true;
-
- rte_atomic_thread_fence(__ATOMIC_SEQ_CST);
-
- /* check if we need to cancel sleep */
- if (q_conf->pwr_mgmt_state == PMD_MGMT_ENABLED) {
- /* use monitoring condition to sleep */
- ret = rte_eth_get_monitor_addr(port_id, qidx,
- &pmc);
- if (ret == 0)
- rte_power_monitor(&pmc, UINT64_MAX);
- }
- q_conf->umwait_in_progress = false;
-
- rte_atomic_thread_fence(__ATOMIC_SEQ_CST);
+ /* use monitoring condition to sleep */
+ ret = rte_eth_get_monitor_addr(port_id, qidx,
+ &pmc);
+ if (ret == 0)
+ rte_power_monitor(&pmc, UINT64_MAX);
}
} else
q_conf->empty_poll_stats = 0;
@@ -177,12 +156,24 @@ clb_scale_freq(uint16_t port_id, uint16_t qidx,
return nb_rx;
}
+static int
+queue_stopped(const uint16_t port_id, const uint16_t queue_id)
+{
+ struct rte_eth_rxq_info qinfo;
+
+ if (rte_eth_rx_queue_info_get(port_id, queue_id, &qinfo) < 0)
+ return -1;
+
+ return qinfo.queue_state == RTE_ETH_QUEUE_STATE_STOPPED;
+}
+
int
rte_power_ethdev_pmgmt_queue_enable(unsigned int lcore_id, uint16_t port_id,
uint16_t queue_id, enum rte_power_pmd_mgmt_type mode)
{
struct pmd_queue_cfg *queue_cfg;
struct rte_eth_dev_info info;
+ rte_rx_callback_fn clb;
int ret;
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
@@ -203,6 +194,14 @@ rte_power_ethdev_pmgmt_queue_enable(unsigned int lcore_id, uint16_t port_id,
goto end;
}
+ /* check if the queue is stopped */
+ ret = queue_stopped(port_id, queue_id);
+ if (ret != 1) {
+ /* error means invalid queue, 0 means queue wasn't stopped */
+ ret = ret < 0 ? -EINVAL : -EBUSY;
+ goto end;
+ }
+
queue_cfg = &port_cfg[port_id][queue_id];
if (queue_cfg->pwr_mgmt_state != PMD_MGMT_DISABLED) {
@@ -232,17 +231,7 @@ rte_power_ethdev_pmgmt_queue_enable(unsigned int lcore_id, uint16_t port_id,
ret = -ENOTSUP;
goto end;
}
- /* initialize data before enabling the callback */
- queue_cfg->empty_poll_stats = 0;
- queue_cfg->cb_mode = mode;
- queue_cfg->umwait_in_progress = false;
- queue_cfg->pwr_mgmt_state = PMD_MGMT_ENABLED;
-
- /* ensure we update our state before callback starts */
- rte_atomic_thread_fence(__ATOMIC_SEQ_CST);
-
- queue_cfg->cur_cb = rte_eth_add_rx_callback(port_id, queue_id,
- clb_umwait, NULL);
+ clb = clb_umwait;
break;
}
case RTE_POWER_MGMT_TYPE_SCALE:
@@ -269,16 +258,7 @@ rte_power_ethdev_pmgmt_queue_enable(unsigned int lcore_id, uint16_t port_id,
ret = -ENOTSUP;
goto end;
}
- /* initialize data before enabling the callback */
- queue_cfg->empty_poll_stats = 0;
- queue_cfg->cb_mode = mode;
- queue_cfg->pwr_mgmt_state = PMD_MGMT_ENABLED;
-
- /* this is not necessary here, but do it anyway */
- rte_atomic_thread_fence(__ATOMIC_SEQ_CST);
-
- queue_cfg->cur_cb = rte_eth_add_rx_callback(port_id,
- queue_id, clb_scale_freq, NULL);
+ clb = clb_scale_freq;
break;
}
case RTE_POWER_MGMT_TYPE_PAUSE:
@@ -286,18 +266,21 @@ rte_power_ethdev_pmgmt_queue_enable(unsigned int lcore_id, uint16_t port_id,
if (global_data.tsc_per_us == 0)
calc_tsc();
- /* initialize data before enabling the callback */
- queue_cfg->empty_poll_stats = 0;
- queue_cfg->cb_mode = mode;
- queue_cfg->pwr_mgmt_state = PMD_MGMT_ENABLED;
-
- /* this is not necessary here, but do it anyway */
- rte_atomic_thread_fence(__ATOMIC_SEQ_CST);
-
- queue_cfg->cur_cb = rte_eth_add_rx_callback(port_id, queue_id,
- clb_pause, NULL);
+ clb = clb_pause;
break;
+ default:
+ RTE_LOG(DEBUG, POWER, "Invalid power management type\n");
+ ret = -EINVAL;
+ goto end;
}
+
+ /* initialize data before enabling the callback */
+ queue_cfg->empty_poll_stats = 0;
+ queue_cfg->cb_mode = mode;
+ queue_cfg->pwr_mgmt_state = PMD_MGMT_ENABLED;
+ queue_cfg->cur_cb = rte_eth_add_rx_callback(port_id, queue_id,
+ clb, NULL);
+
ret = 0;
end:
return ret;
@@ -308,12 +291,20 @@ rte_power_ethdev_pmgmt_queue_disable(unsigned int lcore_id,
uint16_t port_id, uint16_t queue_id)
{
struct pmd_queue_cfg *queue_cfg;
+ int ret;
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
if (lcore_id >= RTE_MAX_LCORE || queue_id >= RTE_MAX_QUEUES_PER_PORT)
return -EINVAL;
+ /* check if the queue is stopped */
+ ret = queue_stopped(port_id, queue_id);
+ if (ret != 1) {
+ /* error means invalid queue, 0 means queue wasn't stopped */
+ return ret < 0 ? -EINVAL : -EBUSY;
+ }
+
/* no need to check queue id as wrong queue id would not be enabled */
queue_cfg = &port_cfg[port_id][queue_id];
@@ -323,27 +314,8 @@ rte_power_ethdev_pmgmt_queue_disable(unsigned int lcore_id,
/* stop any callbacks from progressing */
queue_cfg->pwr_mgmt_state = PMD_MGMT_DISABLED;
- /* ensure we update our state before continuing */
- rte_atomic_thread_fence(__ATOMIC_SEQ_CST);
-
switch (queue_cfg->cb_mode) {
- case RTE_POWER_MGMT_TYPE_MONITOR:
- {
- bool exit = false;
- do {
- /*
- * we may request cancellation while the other thread
- * has just entered the callback but hasn't started
- * sleeping yet, so keep waking it up until we know it's
- * done sleeping.
- */
- if (queue_cfg->umwait_in_progress)
- rte_power_monitor_wakeup(lcore_id);
- else
- exit = true;
- } while (!exit);
- }
- /* fall-through */
+ case RTE_POWER_MGMT_TYPE_MONITOR: /* fall-through */
case RTE_POWER_MGMT_TYPE_PAUSE:
rte_eth_remove_rx_callback(port_id, queue_id,
queue_cfg->cur_cb);
@@ -356,10 +328,11 @@ rte_power_ethdev_pmgmt_queue_disable(unsigned int lcore_id,
break;
}
/*
- * we don't free the RX callback here because it is unsafe to do so
- * unless we know for a fact that all data plane threads have stopped.
+ * the API doc mandates that the user stops all processing on affected
+ * ports before calling any of these API's, so we can assume that the
+ * callbacks can be freed. we're intentionally casting away const-ness.
*/
- queue_cfg->cur_cb = NULL;
+ rte_free((void *)queue_cfg->cur_cb);
return 0;
}
diff --git a/lib/power/rte_power_pmd_mgmt.h b/lib/power/rte_power_pmd_mgmt.h
index 7a0ac24625..444e7b8a66 100644
--- a/lib/power/rte_power_pmd_mgmt.h
+++ b/lib/power/rte_power_pmd_mgmt.h
@@ -43,6 +43,9 @@ enum rte_power_pmd_mgmt_type {
*
* @note This function is not thread-safe.
*
+ * @warning This function must be called when all affected Ethernet queues are
+ * stopped and no Rx/Tx is in progress!
+ *
* @param lcore_id
* The lcore the Rx queue will be polled from.
* @param port_id
@@ -69,6 +72,9 @@ rte_power_ethdev_pmgmt_queue_enable(unsigned int lcore_id,
*
* @note This function is not thread-safe.
*
+ * @warning This function must be called when all affected Ethernet queues are
+ * stopped and no Rx/Tx is in progress!
+ *
* @param lcore_id
* The lcore the Rx queue is polled from.
* @param port_id
--
2.25.1
^ permalink raw reply [relevance 3%]
* [dpdk-dev] [PATCH v5 1/7] power_intrinsics: use callbacks for comparison
@ 2021-06-29 15:48 3% ` Anatoly Burakov
2021-06-29 15:48 3% ` [dpdk-dev] [PATCH v5 4/7] power: remove thread safety from PMD power API's Anatoly Burakov
2 siblings, 0 replies; 200+ results
From: Anatoly Burakov @ 2021-06-29 15:48 UTC (permalink / raw)
To: dev, Timothy McDaniel, Beilei Xing, Jingjing Wu, Qiming Yang,
Qi Zhang, Haiyue Wang, Matan Azrad, Shahaf Shuler,
Viacheslav Ovsiienko, Bruce Richardson, Konstantin Ananyev
Cc: david.hunt, ciara.loftus
Previously, the semantics of power monitor were such that we were
checking current value against the expected value, and if they matched,
then the sleep was aborted. This is somewhat inflexible, because it only
allowed us to check for a specific value in a specific way.
This commit replaces the comparison with a user callback mechanism, so
that any PMD (or other code) using `rte_power_monitor()` can define
their own comparison semantics and decision making on how to detect the
need to abort the entering of power optimized state.
Existing implementations are adjusted to follow the new semantics.
Suggested-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
---
Notes:
v4:
- Return error if callback is set to NULL
- Replace raw number with a macro in monitor condition opaque data
v2:
- Use callback mechanism for more flexibility
- Address feedback from Konstantin
doc/guides/rel_notes/release_21_08.rst | 1 +
drivers/event/dlb2/dlb2.c | 17 ++++++++--
drivers/net/i40e/i40e_rxtx.c | 20 +++++++----
drivers/net/iavf/iavf_rxtx.c | 20 +++++++----
drivers/net/ice/ice_rxtx.c | 20 +++++++----
drivers/net/ixgbe/ixgbe_rxtx.c | 20 +++++++----
drivers/net/mlx5/mlx5_rx.c | 17 ++++++++--
.../include/generic/rte_power_intrinsics.h | 33 +++++++++++++++----
lib/eal/x86/rte_power_intrinsics.c | 17 +++++-----
9 files changed, 121 insertions(+), 44 deletions(-)
diff --git a/doc/guides/rel_notes/release_21_08.rst b/doc/guides/rel_notes/release_21_08.rst
index a6ecfdf3ce..c84ac280f5 100644
--- a/doc/guides/rel_notes/release_21_08.rst
+++ b/doc/guides/rel_notes/release_21_08.rst
@@ -84,6 +84,7 @@ API Changes
Also, make sure to start the actual text at the margin.
=======================================================
+* eal: the ``rte_power_intrinsics`` API changed to use a callback mechanism.
ABI Changes
-----------
diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c
index eca183753f..252bbd8d5e 100644
--- a/drivers/event/dlb2/dlb2.c
+++ b/drivers/event/dlb2/dlb2.c
@@ -3154,6 +3154,16 @@ dlb2_port_credits_inc(struct dlb2_port *qm_port, int num)
}
}
+#define CLB_MASK_IDX 0
+#define CLB_VAL_IDX 1
+static int
+dlb2_monitor_callback(const uint64_t val,
+ const uint64_t opaque[RTE_POWER_MONITOR_OPAQUE_SZ])
+{
+ /* abort if the value matches */
+ return (val & opaque[CLB_MASK_IDX]) == opaque[CLB_VAL_IDX] ? -1 : 0;
+}
+
static inline int
dlb2_dequeue_wait(struct dlb2_eventdev *dlb2,
struct dlb2_eventdev_port *ev_port,
@@ -3194,8 +3204,11 @@ dlb2_dequeue_wait(struct dlb2_eventdev *dlb2,
expected_value = 0;
pmc.addr = monitor_addr;
- pmc.val = expected_value;
- pmc.mask = qe_mask.raw_qe[1];
+ /* store expected value and comparison mask in opaque data */
+ pmc.opaque[CLB_VAL_IDX] = expected_value;
+ pmc.opaque[CLB_MASK_IDX] = qe_mask.raw_qe[1];
+ /* set up callback */
+ pmc.fn = dlb2_monitor_callback;
pmc.size = sizeof(uint64_t);
rte_power_monitor(&pmc, timeout + start_ticks);
diff --git a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c
index 6c58decece..081682f88b 100644
--- a/drivers/net/i40e/i40e_rxtx.c
+++ b/drivers/net/i40e/i40e_rxtx.c
@@ -81,6 +81,18 @@
#define I40E_TX_OFFLOAD_SIMPLE_NOTSUP_MASK \
(PKT_TX_OFFLOAD_MASK ^ I40E_TX_OFFLOAD_SIMPLE_SUP_MASK)
+static int
+i40e_monitor_callback(const uint64_t value,
+ const uint64_t arg[RTE_POWER_MONITOR_OPAQUE_SZ] __rte_unused)
+{
+ const uint64_t m = rte_cpu_to_le_64(1 << I40E_RX_DESC_STATUS_DD_SHIFT);
+ /*
+ * we expect the DD bit to be set to 1 if this descriptor was already
+ * written to.
+ */
+ return (value & m) == m ? -1 : 0;
+}
+
int
i40e_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
{
@@ -93,12 +105,8 @@ i40e_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
/* watch for changes in status bit */
pmc->addr = &rxdp->wb.qword1.status_error_len;
- /*
- * we expect the DD bit to be set to 1 if this descriptor was already
- * written to.
- */
- pmc->val = rte_cpu_to_le_64(1 << I40E_RX_DESC_STATUS_DD_SHIFT);
- pmc->mask = rte_cpu_to_le_64(1 << I40E_RX_DESC_STATUS_DD_SHIFT);
+ /* comparison callback */
+ pmc->fn = i40e_monitor_callback;
/* registers are 64-bit */
pmc->size = sizeof(uint64_t);
diff --git a/drivers/net/iavf/iavf_rxtx.c b/drivers/net/iavf/iavf_rxtx.c
index 0361af0d85..7ed196ec22 100644
--- a/drivers/net/iavf/iavf_rxtx.c
+++ b/drivers/net/iavf/iavf_rxtx.c
@@ -57,6 +57,18 @@ iavf_proto_xtr_type_to_rxdid(uint8_t flex_type)
rxdid_map[flex_type] : IAVF_RXDID_COMMS_OVS_1;
}
+static int
+iavf_monitor_callback(const uint64_t value,
+ const uint64_t arg[RTE_POWER_MONITOR_OPAQUE_SZ] __rte_unused)
+{
+ const uint64_t m = rte_cpu_to_le_64(1 << IAVF_RX_DESC_STATUS_DD_SHIFT);
+ /*
+ * we expect the DD bit to be set to 1 if this descriptor was already
+ * written to.
+ */
+ return (value & m) == m ? -1 : 0;
+}
+
int
iavf_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
{
@@ -69,12 +81,8 @@ iavf_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
/* watch for changes in status bit */
pmc->addr = &rxdp->wb.qword1.status_error_len;
- /*
- * we expect the DD bit to be set to 1 if this descriptor was already
- * written to.
- */
- pmc->val = rte_cpu_to_le_64(1 << IAVF_RX_DESC_STATUS_DD_SHIFT);
- pmc->mask = rte_cpu_to_le_64(1 << IAVF_RX_DESC_STATUS_DD_SHIFT);
+ /* comparison callback */
+ pmc->fn = iavf_monitor_callback;
/* registers are 64-bit */
pmc->size = sizeof(uint64_t);
diff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c
index fc9bb5a3e7..d12437d19d 100644
--- a/drivers/net/ice/ice_rxtx.c
+++ b/drivers/net/ice/ice_rxtx.c
@@ -27,6 +27,18 @@ uint64_t rte_net_ice_dynflag_proto_xtr_ipv6_flow_mask;
uint64_t rte_net_ice_dynflag_proto_xtr_tcp_mask;
uint64_t rte_net_ice_dynflag_proto_xtr_ip_offset_mask;
+static int
+ice_monitor_callback(const uint64_t value,
+ const uint64_t arg[RTE_POWER_MONITOR_OPAQUE_SZ] __rte_unused)
+{
+ const uint64_t m = rte_cpu_to_le_16(1 << ICE_RX_FLEX_DESC_STATUS0_DD_S);
+ /*
+ * we expect the DD bit to be set to 1 if this descriptor was already
+ * written to.
+ */
+ return (value & m) == m ? -1 : 0;
+}
+
int
ice_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
{
@@ -39,12 +51,8 @@ ice_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
/* watch for changes in status bit */
pmc->addr = &rxdp->wb.status_error0;
- /*
- * we expect the DD bit to be set to 1 if this descriptor was already
- * written to.
- */
- pmc->val = rte_cpu_to_le_16(1 << ICE_RX_FLEX_DESC_STATUS0_DD_S);
- pmc->mask = rte_cpu_to_le_16(1 << ICE_RX_FLEX_DESC_STATUS0_DD_S);
+ /* comparison callback */
+ pmc->fn = ice_monitor_callback;
/* register is 16-bit */
pmc->size = sizeof(uint16_t);
diff --git a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers/net/ixgbe/ixgbe_rxtx.c
index d69f36e977..c814a28cb4 100644
--- a/drivers/net/ixgbe/ixgbe_rxtx.c
+++ b/drivers/net/ixgbe/ixgbe_rxtx.c
@@ -1369,6 +1369,18 @@ const uint32_t
RTE_PTYPE_INNER_L3_IPV4_EXT | RTE_PTYPE_INNER_L4_UDP,
};
+static int
+ixgbe_monitor_callback(const uint64_t value,
+ const uint64_t arg[RTE_POWER_MONITOR_OPAQUE_SZ] __rte_unused)
+{
+ const uint64_t m = rte_cpu_to_le_32(IXGBE_RXDADV_STAT_DD);
+ /*
+ * we expect the DD bit to be set to 1 if this descriptor was already
+ * written to.
+ */
+ return (value & m) == m ? -1 : 0;
+}
+
int
ixgbe_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
{
@@ -1381,12 +1393,8 @@ ixgbe_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
/* watch for changes in status bit */
pmc->addr = &rxdp->wb.upper.status_error;
- /*
- * we expect the DD bit to be set to 1 if this descriptor was already
- * written to.
- */
- pmc->val = rte_cpu_to_le_32(IXGBE_RXDADV_STAT_DD);
- pmc->mask = rte_cpu_to_le_32(IXGBE_RXDADV_STAT_DD);
+ /* comparison callback */
+ pmc->fn = ixgbe_monitor_callback;
/* the registers are 32-bit */
pmc->size = sizeof(uint32_t);
diff --git a/drivers/net/mlx5/mlx5_rx.c b/drivers/net/mlx5/mlx5_rx.c
index 777a1d6e45..17370b77dc 100644
--- a/drivers/net/mlx5/mlx5_rx.c
+++ b/drivers/net/mlx5/mlx5_rx.c
@@ -269,6 +269,18 @@ mlx5_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id)
return rx_queue_count(rxq);
}
+#define CLB_VAL_IDX 0
+#define CLB_MSK_IDX 1
+static int
+mlx_monitor_callback(const uint64_t value,
+ const uint64_t opaque[RTE_POWER_MONITOR_OPAQUE_SZ])
+{
+ const uint64_t m = opaque[CLB_MSK_IDX];
+ const uint64_t v = opaque[CLB_VAL_IDX];
+
+ return (value & m) == v ? -1 : 0;
+}
+
int mlx5_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
{
struct mlx5_rxq_data *rxq = rx_queue;
@@ -282,8 +294,9 @@ int mlx5_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
return -rte_errno;
}
pmc->addr = &cqe->op_own;
- pmc->val = !!idx;
- pmc->mask = MLX5_CQE_OWNER_MASK;
+ pmc->opaque[CLB_VAL_IDX] = !!idx;
+ pmc->opaque[CLB_MSK_IDX] = MLX5_CQE_OWNER_MASK;
+ pmc->fn = mlx_monitor_callback;
pmc->size = sizeof(uint8_t);
return 0;
}
diff --git a/lib/eal/include/generic/rte_power_intrinsics.h b/lib/eal/include/generic/rte_power_intrinsics.h
index dddca3d41c..c9aa52a86d 100644
--- a/lib/eal/include/generic/rte_power_intrinsics.h
+++ b/lib/eal/include/generic/rte_power_intrinsics.h
@@ -18,19 +18,38 @@
* which are architecture-dependent.
*/
+/** Size of the opaque data in monitor condition */
+#define RTE_POWER_MONITOR_OPAQUE_SZ 4
+
+/**
+ * Callback definition for monitoring conditions. Callbacks with this signature
+ * will be used by `rte_power_monitor()` to check if the entering of power
+ * optimized state should be aborted.
+ *
+ * @param val
+ * The value read from memory.
+ * @param opaque
+ * Callback-specific data.
+ *
+ * @return
+ * 0 if entering of power optimized state should proceed
+ * -1 if entering of power optimized state should be aborted
+ */
+typedef int (*rte_power_monitor_clb_t)(const uint64_t val,
+ const uint64_t opaque[RTE_POWER_MONITOR_OPAQUE_SZ]);
struct rte_power_monitor_cond {
volatile void *addr; /**< Address to monitor for changes */
- uint64_t val; /**< If the `mask` is non-zero, location pointed
- * to by `addr` will be read and compared
- * against this value.
- */
- uint64_t mask; /**< 64-bit mask to extract value read from `addr` */
- uint8_t size; /**< Data size (in bytes) that will be used to compare
- * expected value (`val`) with data read from the
+ uint8_t size; /**< Data size (in bytes) that will be read from the
* monitored memory location (`addr`). Can be 1, 2,
* 4, or 8. Supplying any other value will result in
* an error.
*/
+ rte_power_monitor_clb_t fn; /**< Callback to be used to check if
+ * entering power optimized state should
+ * be aborted.
+ */
+ uint64_t opaque[RTE_POWER_MONITOR_OPAQUE_SZ];
+ /**< Callback-specific data */
};
/**
diff --git a/lib/eal/x86/rte_power_intrinsics.c b/lib/eal/x86/rte_power_intrinsics.c
index 39ea9fdecd..66fea28897 100644
--- a/lib/eal/x86/rte_power_intrinsics.c
+++ b/lib/eal/x86/rte_power_intrinsics.c
@@ -76,6 +76,7 @@ rte_power_monitor(const struct rte_power_monitor_cond *pmc,
const uint32_t tsc_h = (uint32_t)(tsc_timestamp >> 32);
const unsigned int lcore_id = rte_lcore_id();
struct power_wait_status *s;
+ uint64_t cur_value;
/* prevent user from running this instruction if it's not supported */
if (!wait_supported)
@@ -91,6 +92,9 @@ rte_power_monitor(const struct rte_power_monitor_cond *pmc,
if (__check_val_size(pmc->size) < 0)
return -EINVAL;
+ if (pmc->fn == NULL)
+ return -EINVAL;
+
s = &wait_status[lcore_id];
/* update sleep address */
@@ -110,16 +114,11 @@ rte_power_monitor(const struct rte_power_monitor_cond *pmc,
/* now that we've put this address into monitor, we can unlock */
rte_spinlock_unlock(&s->lock);
- /* if we have a comparison mask, we might not need to sleep at all */
- if (pmc->mask) {
- const uint64_t cur_value = __get_umwait_val(
- pmc->addr, pmc->size);
- const uint64_t masked = cur_value & pmc->mask;
+ cur_value = __get_umwait_val(pmc->addr, pmc->size);
- /* if the masked value is already matching, abort */
- if (masked == pmc->val)
- goto end;
- }
+ /* check if callback indicates we should abort */
+ if (pmc->fn(cur_value, pmc->opaque) != 0)
+ goto end;
/* execute UMWAIT */
asm volatile(".byte 0xf2, 0x0f, 0xae, 0xf7;"
--
2.25.1
^ permalink raw reply [relevance 3%]
* [dpdk-dev] [PATCH v4 4/7] power: remove thread safety from PMD power API's
2021-06-28 15:54 3% ` [dpdk-dev] [PATCH v4 1/7] power_intrinsics: use callbacks for comparison Anatoly Burakov
@ 2021-06-28 15:54 3% ` Anatoly Burakov
2 siblings, 0 replies; 200+ results
From: Anatoly Burakov @ 2021-06-28 15:54 UTC (permalink / raw)
To: dev, David Hunt; +Cc: konstantin.ananyev, ciara.loftus
Currently, we expect that only one callback can be active at any given
moment, for a particular queue configuration, which is relatively easy
to implement in a thread-safe way. However, we're about to add support
for multiple queues per lcore, which will greatly increase the
possibility of various race conditions.
We could have used something like an RCU for this use case, but absent
of a pressing need for thread safety we'll go the easy way and just
mandate that the API's are to be called when all affected ports are
stopped, and document this limitation. This greatly simplifies the
`rte_power_monitor`-related code.
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
Notes:
v2:
- Add check for stopped queue
- Clarified doc message
- Added release notes
doc/guides/rel_notes/release_21_08.rst | 5 +
lib/power/meson.build | 3 +
lib/power/rte_power_pmd_mgmt.c | 133 ++++++++++---------------
lib/power/rte_power_pmd_mgmt.h | 6 ++
4 files changed, 67 insertions(+), 80 deletions(-)
diff --git a/doc/guides/rel_notes/release_21_08.rst b/doc/guides/rel_notes/release_21_08.rst
index 9d1cfac395..f015c509fc 100644
--- a/doc/guides/rel_notes/release_21_08.rst
+++ b/doc/guides/rel_notes/release_21_08.rst
@@ -88,6 +88,11 @@ API Changes
* eal: the ``rte_power_intrinsics`` API changed to use a callback mechanism.
+* rte_power: The experimental PMD power management API is no longer considered
+ to be thread safe; all Rx queues affected by the API will now need to be
+ stopped before making any changes to the power management scheme.
+
+
ABI Changes
-----------
diff --git a/lib/power/meson.build b/lib/power/meson.build
index c1097d32f1..4f6a242364 100644
--- a/lib/power/meson.build
+++ b/lib/power/meson.build
@@ -21,4 +21,7 @@ headers = files(
'rte_power_pmd_mgmt.h',
'rte_power_guest_channel.h',
)
+if cc.has_argument('-Wno-cast-qual')
+ cflags += '-Wno-cast-qual'
+endif
deps += ['timer', 'ethdev']
diff --git a/lib/power/rte_power_pmd_mgmt.c b/lib/power/rte_power_pmd_mgmt.c
index db03cbf420..9b95cf1794 100644
--- a/lib/power/rte_power_pmd_mgmt.c
+++ b/lib/power/rte_power_pmd_mgmt.c
@@ -40,8 +40,6 @@ struct pmd_queue_cfg {
/**< Callback mode for this queue */
const struct rte_eth_rxtx_callback *cur_cb;
/**< Callback instance */
- volatile bool umwait_in_progress;
- /**< are we currently sleeping? */
uint64_t empty_poll_stats;
/**< Number of empty polls */
} __rte_cache_aligned;
@@ -92,30 +90,11 @@ clb_umwait(uint16_t port_id, uint16_t qidx, struct rte_mbuf **pkts __rte_unused,
struct rte_power_monitor_cond pmc;
uint16_t ret;
- /*
- * we might get a cancellation request while being
- * inside the callback, in which case the wakeup
- * wouldn't work because it would've arrived too early.
- *
- * to get around this, we notify the other thread that
- * we're sleeping, so that it can spin until we're done.
- * unsolicited wakeups are perfectly safe.
- */
- q_conf->umwait_in_progress = true;
-
- rte_atomic_thread_fence(__ATOMIC_SEQ_CST);
-
- /* check if we need to cancel sleep */
- if (q_conf->pwr_mgmt_state == PMD_MGMT_ENABLED) {
- /* use monitoring condition to sleep */
- ret = rte_eth_get_monitor_addr(port_id, qidx,
- &pmc);
- if (ret == 0)
- rte_power_monitor(&pmc, UINT64_MAX);
- }
- q_conf->umwait_in_progress = false;
-
- rte_atomic_thread_fence(__ATOMIC_SEQ_CST);
+ /* use monitoring condition to sleep */
+ ret = rte_eth_get_monitor_addr(port_id, qidx,
+ &pmc);
+ if (ret == 0)
+ rte_power_monitor(&pmc, UINT64_MAX);
}
} else
q_conf->empty_poll_stats = 0;
@@ -177,12 +156,24 @@ clb_scale_freq(uint16_t port_id, uint16_t qidx,
return nb_rx;
}
+static int
+queue_stopped(const uint16_t port_id, const uint16_t queue_id)
+{
+ struct rte_eth_rxq_info qinfo;
+
+ if (rte_eth_rx_queue_info_get(port_id, queue_id, &qinfo) < 0)
+ return -1;
+
+ return qinfo.queue_state == RTE_ETH_QUEUE_STATE_STOPPED;
+}
+
int
rte_power_ethdev_pmgmt_queue_enable(unsigned int lcore_id, uint16_t port_id,
uint16_t queue_id, enum rte_power_pmd_mgmt_type mode)
{
struct pmd_queue_cfg *queue_cfg;
struct rte_eth_dev_info info;
+ rte_rx_callback_fn clb;
int ret;
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
@@ -203,6 +194,14 @@ rte_power_ethdev_pmgmt_queue_enable(unsigned int lcore_id, uint16_t port_id,
goto end;
}
+ /* check if the queue is stopped */
+ ret = queue_stopped(port_id, queue_id);
+ if (ret != 1) {
+ /* error means invalid queue, 0 means queue wasn't stopped */
+ ret = ret < 0 ? -EINVAL : -EBUSY;
+ goto end;
+ }
+
queue_cfg = &port_cfg[port_id][queue_id];
if (queue_cfg->pwr_mgmt_state != PMD_MGMT_DISABLED) {
@@ -232,17 +231,7 @@ rte_power_ethdev_pmgmt_queue_enable(unsigned int lcore_id, uint16_t port_id,
ret = -ENOTSUP;
goto end;
}
- /* initialize data before enabling the callback */
- queue_cfg->empty_poll_stats = 0;
- queue_cfg->cb_mode = mode;
- queue_cfg->umwait_in_progress = false;
- queue_cfg->pwr_mgmt_state = PMD_MGMT_ENABLED;
-
- /* ensure we update our state before callback starts */
- rte_atomic_thread_fence(__ATOMIC_SEQ_CST);
-
- queue_cfg->cur_cb = rte_eth_add_rx_callback(port_id, queue_id,
- clb_umwait, NULL);
+ clb = clb_umwait;
break;
}
case RTE_POWER_MGMT_TYPE_SCALE:
@@ -269,16 +258,7 @@ rte_power_ethdev_pmgmt_queue_enable(unsigned int lcore_id, uint16_t port_id,
ret = -ENOTSUP;
goto end;
}
- /* initialize data before enabling the callback */
- queue_cfg->empty_poll_stats = 0;
- queue_cfg->cb_mode = mode;
- queue_cfg->pwr_mgmt_state = PMD_MGMT_ENABLED;
-
- /* this is not necessary here, but do it anyway */
- rte_atomic_thread_fence(__ATOMIC_SEQ_CST);
-
- queue_cfg->cur_cb = rte_eth_add_rx_callback(port_id,
- queue_id, clb_scale_freq, NULL);
+ clb = clb_scale_freq;
break;
}
case RTE_POWER_MGMT_TYPE_PAUSE:
@@ -286,18 +266,21 @@ rte_power_ethdev_pmgmt_queue_enable(unsigned int lcore_id, uint16_t port_id,
if (global_data.tsc_per_us == 0)
calc_tsc();
- /* initialize data before enabling the callback */
- queue_cfg->empty_poll_stats = 0;
- queue_cfg->cb_mode = mode;
- queue_cfg->pwr_mgmt_state = PMD_MGMT_ENABLED;
-
- /* this is not necessary here, but do it anyway */
- rte_atomic_thread_fence(__ATOMIC_SEQ_CST);
-
- queue_cfg->cur_cb = rte_eth_add_rx_callback(port_id, queue_id,
- clb_pause, NULL);
+ clb = clb_pause;
break;
+ default:
+ RTE_LOG(DEBUG, POWER, "Invalid power management type\n");
+ ret = -EINVAL;
+ goto end;
}
+
+ /* initialize data before enabling the callback */
+ queue_cfg->empty_poll_stats = 0;
+ queue_cfg->cb_mode = mode;
+ queue_cfg->pwr_mgmt_state = PMD_MGMT_ENABLED;
+ queue_cfg->cur_cb = rte_eth_add_rx_callback(port_id, queue_id,
+ clb, NULL);
+
ret = 0;
end:
return ret;
@@ -308,12 +291,20 @@ rte_power_ethdev_pmgmt_queue_disable(unsigned int lcore_id,
uint16_t port_id, uint16_t queue_id)
{
struct pmd_queue_cfg *queue_cfg;
+ int ret;
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
if (lcore_id >= RTE_MAX_LCORE || queue_id >= RTE_MAX_QUEUES_PER_PORT)
return -EINVAL;
+ /* check if the queue is stopped */
+ ret = queue_stopped(port_id, queue_id);
+ if (ret != 1) {
+ /* error means invalid queue, 0 means queue wasn't stopped */
+ return ret < 0 ? -EINVAL : -EBUSY;
+ }
+
/* no need to check queue id as wrong queue id would not be enabled */
queue_cfg = &port_cfg[port_id][queue_id];
@@ -323,27 +314,8 @@ rte_power_ethdev_pmgmt_queue_disable(unsigned int lcore_id,
/* stop any callbacks from progressing */
queue_cfg->pwr_mgmt_state = PMD_MGMT_DISABLED;
- /* ensure we update our state before continuing */
- rte_atomic_thread_fence(__ATOMIC_SEQ_CST);
-
switch (queue_cfg->cb_mode) {
- case RTE_POWER_MGMT_TYPE_MONITOR:
- {
- bool exit = false;
- do {
- /*
- * we may request cancellation while the other thread
- * has just entered the callback but hasn't started
- * sleeping yet, so keep waking it up until we know it's
- * done sleeping.
- */
- if (queue_cfg->umwait_in_progress)
- rte_power_monitor_wakeup(lcore_id);
- else
- exit = true;
- } while (!exit);
- }
- /* fall-through */
+ case RTE_POWER_MGMT_TYPE_MONITOR: /* fall-through */
case RTE_POWER_MGMT_TYPE_PAUSE:
rte_eth_remove_rx_callback(port_id, queue_id,
queue_cfg->cur_cb);
@@ -356,10 +328,11 @@ rte_power_ethdev_pmgmt_queue_disable(unsigned int lcore_id,
break;
}
/*
- * we don't free the RX callback here because it is unsafe to do so
- * unless we know for a fact that all data plane threads have stopped.
+ * the API doc mandates that the user stops all processing on affected
+ * ports before calling any of these API's, so we can assume that the
+ * callbacks can be freed. we're intentionally casting away const-ness.
*/
- queue_cfg->cur_cb = NULL;
+ rte_free((void *)queue_cfg->cur_cb);
return 0;
}
diff --git a/lib/power/rte_power_pmd_mgmt.h b/lib/power/rte_power_pmd_mgmt.h
index 7a0ac24625..444e7b8a66 100644
--- a/lib/power/rte_power_pmd_mgmt.h
+++ b/lib/power/rte_power_pmd_mgmt.h
@@ -43,6 +43,9 @@ enum rte_power_pmd_mgmt_type {
*
* @note This function is not thread-safe.
*
+ * @warning This function must be called when all affected Ethernet queues are
+ * stopped and no Rx/Tx is in progress!
+ *
* @param lcore_id
* The lcore the Rx queue will be polled from.
* @param port_id
@@ -69,6 +72,9 @@ rte_power_ethdev_pmgmt_queue_enable(unsigned int lcore_id,
*
* @note This function is not thread-safe.
*
+ * @warning This function must be called when all affected Ethernet queues are
+ * stopped and no Rx/Tx is in progress!
+ *
* @param lcore_id
* The lcore the Rx queue is polled from.
* @param port_id
--
2.25.1
^ permalink raw reply [relevance 3%]
* [dpdk-dev] [PATCH v4 1/7] power_intrinsics: use callbacks for comparison
@ 2021-06-28 15:54 3% ` Anatoly Burakov
2021-06-28 15:54 3% ` [dpdk-dev] [PATCH v4 4/7] power: remove thread safety from PMD power API's Anatoly Burakov
2 siblings, 0 replies; 200+ results
From: Anatoly Burakov @ 2021-06-28 15:54 UTC (permalink / raw)
To: dev, Timothy McDaniel, Beilei Xing, Jingjing Wu, Qiming Yang,
Qi Zhang, Haiyue Wang, Matan Azrad, Shahaf Shuler,
Viacheslav Ovsiienko, Bruce Richardson, Konstantin Ananyev
Cc: david.hunt, ciara.loftus
Previously, the semantics of power monitor were such that we were
checking current value against the expected value, and if they matched,
then the sleep was aborted. This is somewhat inflexible, because it only
allowed us to check for a specific value in a specific way.
This commit replaces the comparison with a user callback mechanism, so
that any PMD (or other code) using `rte_power_monitor()` can define
their own comparison semantics and decision making on how to detect the
need to abort the entering of power optimized state.
Existing implementations are adjusted to follow the new semantics.
Suggested-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
---
Notes:
v4:
- Return error if callback is set to NULL
- Replace raw number with a macro in monitor condition opaque data
v2:
- Use callback mechanism for more flexibility
- Address feedback from Konstantin
doc/guides/rel_notes/release_21_08.rst | 1 +
drivers/event/dlb2/dlb2.c | 17 ++++++++--
drivers/net/i40e/i40e_rxtx.c | 20 +++++++----
drivers/net/iavf/iavf_rxtx.c | 20 +++++++----
drivers/net/ice/ice_rxtx.c | 20 +++++++----
drivers/net/ixgbe/ixgbe_rxtx.c | 20 +++++++----
drivers/net/mlx5/mlx5_rx.c | 17 ++++++++--
.../include/generic/rte_power_intrinsics.h | 33 +++++++++++++++----
lib/eal/x86/rte_power_intrinsics.c | 17 +++++-----
9 files changed, 121 insertions(+), 44 deletions(-)
diff --git a/doc/guides/rel_notes/release_21_08.rst b/doc/guides/rel_notes/release_21_08.rst
index a6ecfdf3ce..c84ac280f5 100644
--- a/doc/guides/rel_notes/release_21_08.rst
+++ b/doc/guides/rel_notes/release_21_08.rst
@@ -84,6 +84,7 @@ API Changes
Also, make sure to start the actual text at the margin.
=======================================================
+* eal: the ``rte_power_intrinsics`` API changed to use a callback mechanism.
ABI Changes
-----------
diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c
index eca183753f..252bbd8d5e 100644
--- a/drivers/event/dlb2/dlb2.c
+++ b/drivers/event/dlb2/dlb2.c
@@ -3154,6 +3154,16 @@ dlb2_port_credits_inc(struct dlb2_port *qm_port, int num)
}
}
+#define CLB_MASK_IDX 0
+#define CLB_VAL_IDX 1
+static int
+dlb2_monitor_callback(const uint64_t val,
+ const uint64_t opaque[RTE_POWER_MONITOR_OPAQUE_SZ])
+{
+ /* abort if the value matches */
+ return (val & opaque[CLB_MASK_IDX]) == opaque[CLB_VAL_IDX] ? -1 : 0;
+}
+
static inline int
dlb2_dequeue_wait(struct dlb2_eventdev *dlb2,
struct dlb2_eventdev_port *ev_port,
@@ -3194,8 +3204,11 @@ dlb2_dequeue_wait(struct dlb2_eventdev *dlb2,
expected_value = 0;
pmc.addr = monitor_addr;
- pmc.val = expected_value;
- pmc.mask = qe_mask.raw_qe[1];
+ /* store expected value and comparison mask in opaque data */
+ pmc.opaque[CLB_VAL_IDX] = expected_value;
+ pmc.opaque[CLB_MASK_IDX] = qe_mask.raw_qe[1];
+ /* set up callback */
+ pmc.fn = dlb2_monitor_callback;
pmc.size = sizeof(uint64_t);
rte_power_monitor(&pmc, timeout + start_ticks);
diff --git a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c
index 6c58decece..081682f88b 100644
--- a/drivers/net/i40e/i40e_rxtx.c
+++ b/drivers/net/i40e/i40e_rxtx.c
@@ -81,6 +81,18 @@
#define I40E_TX_OFFLOAD_SIMPLE_NOTSUP_MASK \
(PKT_TX_OFFLOAD_MASK ^ I40E_TX_OFFLOAD_SIMPLE_SUP_MASK)
+static int
+i40e_monitor_callback(const uint64_t value,
+ const uint64_t arg[RTE_POWER_MONITOR_OPAQUE_SZ] __rte_unused)
+{
+ const uint64_t m = rte_cpu_to_le_64(1 << I40E_RX_DESC_STATUS_DD_SHIFT);
+ /*
+ * we expect the DD bit to be set to 1 if this descriptor was already
+ * written to.
+ */
+ return (value & m) == m ? -1 : 0;
+}
+
int
i40e_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
{
@@ -93,12 +105,8 @@ i40e_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
/* watch for changes in status bit */
pmc->addr = &rxdp->wb.qword1.status_error_len;
- /*
- * we expect the DD bit to be set to 1 if this descriptor was already
- * written to.
- */
- pmc->val = rte_cpu_to_le_64(1 << I40E_RX_DESC_STATUS_DD_SHIFT);
- pmc->mask = rte_cpu_to_le_64(1 << I40E_RX_DESC_STATUS_DD_SHIFT);
+ /* comparison callback */
+ pmc->fn = i40e_monitor_callback;
/* registers are 64-bit */
pmc->size = sizeof(uint64_t);
diff --git a/drivers/net/iavf/iavf_rxtx.c b/drivers/net/iavf/iavf_rxtx.c
index 0361af0d85..7ed196ec22 100644
--- a/drivers/net/iavf/iavf_rxtx.c
+++ b/drivers/net/iavf/iavf_rxtx.c
@@ -57,6 +57,18 @@ iavf_proto_xtr_type_to_rxdid(uint8_t flex_type)
rxdid_map[flex_type] : IAVF_RXDID_COMMS_OVS_1;
}
+static int
+iavf_monitor_callback(const uint64_t value,
+ const uint64_t arg[RTE_POWER_MONITOR_OPAQUE_SZ] __rte_unused)
+{
+ const uint64_t m = rte_cpu_to_le_64(1 << IAVF_RX_DESC_STATUS_DD_SHIFT);
+ /*
+ * we expect the DD bit to be set to 1 if this descriptor was already
+ * written to.
+ */
+ return (value & m) == m ? -1 : 0;
+}
+
int
iavf_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
{
@@ -69,12 +81,8 @@ iavf_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
/* watch for changes in status bit */
pmc->addr = &rxdp->wb.qword1.status_error_len;
- /*
- * we expect the DD bit to be set to 1 if this descriptor was already
- * written to.
- */
- pmc->val = rte_cpu_to_le_64(1 << IAVF_RX_DESC_STATUS_DD_SHIFT);
- pmc->mask = rte_cpu_to_le_64(1 << IAVF_RX_DESC_STATUS_DD_SHIFT);
+ /* comparison callback */
+ pmc->fn = iavf_monitor_callback;
/* registers are 64-bit */
pmc->size = sizeof(uint64_t);
diff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c
index fc9bb5a3e7..d12437d19d 100644
--- a/drivers/net/ice/ice_rxtx.c
+++ b/drivers/net/ice/ice_rxtx.c
@@ -27,6 +27,18 @@ uint64_t rte_net_ice_dynflag_proto_xtr_ipv6_flow_mask;
uint64_t rte_net_ice_dynflag_proto_xtr_tcp_mask;
uint64_t rte_net_ice_dynflag_proto_xtr_ip_offset_mask;
+static int
+ice_monitor_callback(const uint64_t value,
+ const uint64_t arg[RTE_POWER_MONITOR_OPAQUE_SZ] __rte_unused)
+{
+ const uint64_t m = rte_cpu_to_le_16(1 << ICE_RX_FLEX_DESC_STATUS0_DD_S);
+ /*
+ * we expect the DD bit to be set to 1 if this descriptor was already
+ * written to.
+ */
+ return (value & m) == m ? -1 : 0;
+}
+
int
ice_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
{
@@ -39,12 +51,8 @@ ice_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
/* watch for changes in status bit */
pmc->addr = &rxdp->wb.status_error0;
- /*
- * we expect the DD bit to be set to 1 if this descriptor was already
- * written to.
- */
- pmc->val = rte_cpu_to_le_16(1 << ICE_RX_FLEX_DESC_STATUS0_DD_S);
- pmc->mask = rte_cpu_to_le_16(1 << ICE_RX_FLEX_DESC_STATUS0_DD_S);
+ /* comparison callback */
+ pmc->fn = ice_monitor_callback;
/* register is 16-bit */
pmc->size = sizeof(uint16_t);
diff --git a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers/net/ixgbe/ixgbe_rxtx.c
index d69f36e977..c814a28cb4 100644
--- a/drivers/net/ixgbe/ixgbe_rxtx.c
+++ b/drivers/net/ixgbe/ixgbe_rxtx.c
@@ -1369,6 +1369,18 @@ const uint32_t
RTE_PTYPE_INNER_L3_IPV4_EXT | RTE_PTYPE_INNER_L4_UDP,
};
+static int
+ixgbe_monitor_callback(const uint64_t value,
+ const uint64_t arg[RTE_POWER_MONITOR_OPAQUE_SZ] __rte_unused)
+{
+ const uint64_t m = rte_cpu_to_le_32(IXGBE_RXDADV_STAT_DD);
+ /*
+ * we expect the DD bit to be set to 1 if this descriptor was already
+ * written to.
+ */
+ return (value & m) == m ? -1 : 0;
+}
+
int
ixgbe_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
{
@@ -1381,12 +1393,8 @@ ixgbe_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
/* watch for changes in status bit */
pmc->addr = &rxdp->wb.upper.status_error;
- /*
- * we expect the DD bit to be set to 1 if this descriptor was already
- * written to.
- */
- pmc->val = rte_cpu_to_le_32(IXGBE_RXDADV_STAT_DD);
- pmc->mask = rte_cpu_to_le_32(IXGBE_RXDADV_STAT_DD);
+ /* comparison callback */
+ pmc->fn = ixgbe_monitor_callback;
/* the registers are 32-bit */
pmc->size = sizeof(uint32_t);
diff --git a/drivers/net/mlx5/mlx5_rx.c b/drivers/net/mlx5/mlx5_rx.c
index 777a1d6e45..17370b77dc 100644
--- a/drivers/net/mlx5/mlx5_rx.c
+++ b/drivers/net/mlx5/mlx5_rx.c
@@ -269,6 +269,18 @@ mlx5_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id)
return rx_queue_count(rxq);
}
+#define CLB_VAL_IDX 0
+#define CLB_MSK_IDX 1
+static int
+mlx_monitor_callback(const uint64_t value,
+ const uint64_t opaque[RTE_POWER_MONITOR_OPAQUE_SZ])
+{
+ const uint64_t m = opaque[CLB_MSK_IDX];
+ const uint64_t v = opaque[CLB_VAL_IDX];
+
+ return (value & m) == v ? -1 : 0;
+}
+
int mlx5_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
{
struct mlx5_rxq_data *rxq = rx_queue;
@@ -282,8 +294,9 @@ int mlx5_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
return -rte_errno;
}
pmc->addr = &cqe->op_own;
- pmc->val = !!idx;
- pmc->mask = MLX5_CQE_OWNER_MASK;
+ pmc->opaque[CLB_VAL_IDX] = !!idx;
+ pmc->opaque[CLB_MSK_IDX] = MLX5_CQE_OWNER_MASK;
+ pmc->fn = mlx_monitor_callback;
pmc->size = sizeof(uint8_t);
return 0;
}
diff --git a/lib/eal/include/generic/rte_power_intrinsics.h b/lib/eal/include/generic/rte_power_intrinsics.h
index dddca3d41c..c9aa52a86d 100644
--- a/lib/eal/include/generic/rte_power_intrinsics.h
+++ b/lib/eal/include/generic/rte_power_intrinsics.h
@@ -18,19 +18,38 @@
* which are architecture-dependent.
*/
+/** Size of the opaque data in monitor condition */
+#define RTE_POWER_MONITOR_OPAQUE_SZ 4
+
+/**
+ * Callback definition for monitoring conditions. Callbacks with this signature
+ * will be used by `rte_power_monitor()` to check if the entering of power
+ * optimized state should be aborted.
+ *
+ * @param val
+ * The value read from memory.
+ * @param opaque
+ * Callback-specific data.
+ *
+ * @return
+ * 0 if entering of power optimized state should proceed
+ * -1 if entering of power optimized state should be aborted
+ */
+typedef int (*rte_power_monitor_clb_t)(const uint64_t val,
+ const uint64_t opaque[RTE_POWER_MONITOR_OPAQUE_SZ]);
struct rte_power_monitor_cond {
volatile void *addr; /**< Address to monitor for changes */
- uint64_t val; /**< If the `mask` is non-zero, location pointed
- * to by `addr` will be read and compared
- * against this value.
- */
- uint64_t mask; /**< 64-bit mask to extract value read from `addr` */
- uint8_t size; /**< Data size (in bytes) that will be used to compare
- * expected value (`val`) with data read from the
+ uint8_t size; /**< Data size (in bytes) that will be read from the
* monitored memory location (`addr`). Can be 1, 2,
* 4, or 8. Supplying any other value will result in
* an error.
*/
+ rte_power_monitor_clb_t fn; /**< Callback to be used to check if
+ * entering power optimized state should
+ * be aborted.
+ */
+ uint64_t opaque[RTE_POWER_MONITOR_OPAQUE_SZ];
+ /**< Callback-specific data */
};
/**
diff --git a/lib/eal/x86/rte_power_intrinsics.c b/lib/eal/x86/rte_power_intrinsics.c
index 39ea9fdecd..66fea28897 100644
--- a/lib/eal/x86/rte_power_intrinsics.c
+++ b/lib/eal/x86/rte_power_intrinsics.c
@@ -76,6 +76,7 @@ rte_power_monitor(const struct rte_power_monitor_cond *pmc,
const uint32_t tsc_h = (uint32_t)(tsc_timestamp >> 32);
const unsigned int lcore_id = rte_lcore_id();
struct power_wait_status *s;
+ uint64_t cur_value;
/* prevent user from running this instruction if it's not supported */
if (!wait_supported)
@@ -91,6 +92,9 @@ rte_power_monitor(const struct rte_power_monitor_cond *pmc,
if (__check_val_size(pmc->size) < 0)
return -EINVAL;
+ if (pmc->fn == NULL)
+ return -EINVAL;
+
s = &wait_status[lcore_id];
/* update sleep address */
@@ -110,16 +114,11 @@ rte_power_monitor(const struct rte_power_monitor_cond *pmc,
/* now that we've put this address into monitor, we can unlock */
rte_spinlock_unlock(&s->lock);
- /* if we have a comparison mask, we might not need to sleep at all */
- if (pmc->mask) {
- const uint64_t cur_value = __get_umwait_val(
- pmc->addr, pmc->size);
- const uint64_t masked = cur_value & pmc->mask;
+ cur_value = __get_umwait_val(pmc->addr, pmc->size);
- /* if the masked value is already matching, abort */
- if (masked == pmc->val)
- goto end;
- }
+ /* check if callback indicates we should abort */
+ if (pmc->fn(cur_value, pmc->opaque) != 0)
+ goto end;
/* execute UMWAIT */
asm volatile(".byte 0xf2, 0x0f, 0xae, 0xf7;"
--
2.25.1
^ permalink raw reply [relevance 3%]
* [dpdk-dev] [PATCH v3 4/7] power: remove thread safety from PMD power API's
2021-06-28 12:41 3% ` [dpdk-dev] [PATCH v3 1/7] power_intrinsics: use callbacks for comparison Anatoly Burakov
@ 2021-06-28 12:41 3% ` Anatoly Burakov
2 siblings, 0 replies; 200+ results
From: Anatoly Burakov @ 2021-06-28 12:41 UTC (permalink / raw)
To: dev, David Hunt; +Cc: ciara.loftus
Currently, we expect that only one callback can be active at any given
moment, for a particular queue configuration, which is relatively easy
to implement in a thread-safe way. However, we're about to add support
for multiple queues per lcore, which will greatly increase the
possibility of various race conditions.
We could have used something like an RCU for this use case, but absent
of a pressing need for thread safety we'll go the easy way and just
mandate that the API's are to be called when all affected ports are
stopped, and document this limitation. This greatly simplifies the
`rte_power_monitor`-related code.
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
Notes:
v2:
- Add check for stopped queue
- Clarified doc message
- Added release notes
doc/guides/rel_notes/release_21_08.rst | 5 +
lib/power/meson.build | 3 +
lib/power/rte_power_pmd_mgmt.c | 133 ++++++++++---------------
lib/power/rte_power_pmd_mgmt.h | 6 ++
4 files changed, 67 insertions(+), 80 deletions(-)
diff --git a/doc/guides/rel_notes/release_21_08.rst b/doc/guides/rel_notes/release_21_08.rst
index 9d1cfac395..f015c509fc 100644
--- a/doc/guides/rel_notes/release_21_08.rst
+++ b/doc/guides/rel_notes/release_21_08.rst
@@ -88,6 +88,11 @@ API Changes
* eal: the ``rte_power_intrinsics`` API changed to use a callback mechanism.
+* rte_power: The experimental PMD power management API is no longer considered
+ to be thread safe; all Rx queues affected by the API will now need to be
+ stopped before making any changes to the power management scheme.
+
+
ABI Changes
-----------
diff --git a/lib/power/meson.build b/lib/power/meson.build
index c1097d32f1..4f6a242364 100644
--- a/lib/power/meson.build
+++ b/lib/power/meson.build
@@ -21,4 +21,7 @@ headers = files(
'rte_power_pmd_mgmt.h',
'rte_power_guest_channel.h',
)
+if cc.has_argument('-Wno-cast-qual')
+ cflags += '-Wno-cast-qual'
+endif
deps += ['timer', 'ethdev']
diff --git a/lib/power/rte_power_pmd_mgmt.c b/lib/power/rte_power_pmd_mgmt.c
index db03cbf420..9b95cf1794 100644
--- a/lib/power/rte_power_pmd_mgmt.c
+++ b/lib/power/rte_power_pmd_mgmt.c
@@ -40,8 +40,6 @@ struct pmd_queue_cfg {
/**< Callback mode for this queue */
const struct rte_eth_rxtx_callback *cur_cb;
/**< Callback instance */
- volatile bool umwait_in_progress;
- /**< are we currently sleeping? */
uint64_t empty_poll_stats;
/**< Number of empty polls */
} __rte_cache_aligned;
@@ -92,30 +90,11 @@ clb_umwait(uint16_t port_id, uint16_t qidx, struct rte_mbuf **pkts __rte_unused,
struct rte_power_monitor_cond pmc;
uint16_t ret;
- /*
- * we might get a cancellation request while being
- * inside the callback, in which case the wakeup
- * wouldn't work because it would've arrived too early.
- *
- * to get around this, we notify the other thread that
- * we're sleeping, so that it can spin until we're done.
- * unsolicited wakeups are perfectly safe.
- */
- q_conf->umwait_in_progress = true;
-
- rte_atomic_thread_fence(__ATOMIC_SEQ_CST);
-
- /* check if we need to cancel sleep */
- if (q_conf->pwr_mgmt_state == PMD_MGMT_ENABLED) {
- /* use monitoring condition to sleep */
- ret = rte_eth_get_monitor_addr(port_id, qidx,
- &pmc);
- if (ret == 0)
- rte_power_monitor(&pmc, UINT64_MAX);
- }
- q_conf->umwait_in_progress = false;
-
- rte_atomic_thread_fence(__ATOMIC_SEQ_CST);
+ /* use monitoring condition to sleep */
+ ret = rte_eth_get_monitor_addr(port_id, qidx,
+ &pmc);
+ if (ret == 0)
+ rte_power_monitor(&pmc, UINT64_MAX);
}
} else
q_conf->empty_poll_stats = 0;
@@ -177,12 +156,24 @@ clb_scale_freq(uint16_t port_id, uint16_t qidx,
return nb_rx;
}
+static int
+queue_stopped(const uint16_t port_id, const uint16_t queue_id)
+{
+ struct rte_eth_rxq_info qinfo;
+
+ if (rte_eth_rx_queue_info_get(port_id, queue_id, &qinfo) < 0)
+ return -1;
+
+ return qinfo.queue_state == RTE_ETH_QUEUE_STATE_STOPPED;
+}
+
int
rte_power_ethdev_pmgmt_queue_enable(unsigned int lcore_id, uint16_t port_id,
uint16_t queue_id, enum rte_power_pmd_mgmt_type mode)
{
struct pmd_queue_cfg *queue_cfg;
struct rte_eth_dev_info info;
+ rte_rx_callback_fn clb;
int ret;
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
@@ -203,6 +194,14 @@ rte_power_ethdev_pmgmt_queue_enable(unsigned int lcore_id, uint16_t port_id,
goto end;
}
+ /* check if the queue is stopped */
+ ret = queue_stopped(port_id, queue_id);
+ if (ret != 1) {
+ /* error means invalid queue, 0 means queue wasn't stopped */
+ ret = ret < 0 ? -EINVAL : -EBUSY;
+ goto end;
+ }
+
queue_cfg = &port_cfg[port_id][queue_id];
if (queue_cfg->pwr_mgmt_state != PMD_MGMT_DISABLED) {
@@ -232,17 +231,7 @@ rte_power_ethdev_pmgmt_queue_enable(unsigned int lcore_id, uint16_t port_id,
ret = -ENOTSUP;
goto end;
}
- /* initialize data before enabling the callback */
- queue_cfg->empty_poll_stats = 0;
- queue_cfg->cb_mode = mode;
- queue_cfg->umwait_in_progress = false;
- queue_cfg->pwr_mgmt_state = PMD_MGMT_ENABLED;
-
- /* ensure we update our state before callback starts */
- rte_atomic_thread_fence(__ATOMIC_SEQ_CST);
-
- queue_cfg->cur_cb = rte_eth_add_rx_callback(port_id, queue_id,
- clb_umwait, NULL);
+ clb = clb_umwait;
break;
}
case RTE_POWER_MGMT_TYPE_SCALE:
@@ -269,16 +258,7 @@ rte_power_ethdev_pmgmt_queue_enable(unsigned int lcore_id, uint16_t port_id,
ret = -ENOTSUP;
goto end;
}
- /* initialize data before enabling the callback */
- queue_cfg->empty_poll_stats = 0;
- queue_cfg->cb_mode = mode;
- queue_cfg->pwr_mgmt_state = PMD_MGMT_ENABLED;
-
- /* this is not necessary here, but do it anyway */
- rte_atomic_thread_fence(__ATOMIC_SEQ_CST);
-
- queue_cfg->cur_cb = rte_eth_add_rx_callback(port_id,
- queue_id, clb_scale_freq, NULL);
+ clb = clb_scale_freq;
break;
}
case RTE_POWER_MGMT_TYPE_PAUSE:
@@ -286,18 +266,21 @@ rte_power_ethdev_pmgmt_queue_enable(unsigned int lcore_id, uint16_t port_id,
if (global_data.tsc_per_us == 0)
calc_tsc();
- /* initialize data before enabling the callback */
- queue_cfg->empty_poll_stats = 0;
- queue_cfg->cb_mode = mode;
- queue_cfg->pwr_mgmt_state = PMD_MGMT_ENABLED;
-
- /* this is not necessary here, but do it anyway */
- rte_atomic_thread_fence(__ATOMIC_SEQ_CST);
-
- queue_cfg->cur_cb = rte_eth_add_rx_callback(port_id, queue_id,
- clb_pause, NULL);
+ clb = clb_pause;
break;
+ default:
+ RTE_LOG(DEBUG, POWER, "Invalid power management type\n");
+ ret = -EINVAL;
+ goto end;
}
+
+ /* initialize data before enabling the callback */
+ queue_cfg->empty_poll_stats = 0;
+ queue_cfg->cb_mode = mode;
+ queue_cfg->pwr_mgmt_state = PMD_MGMT_ENABLED;
+ queue_cfg->cur_cb = rte_eth_add_rx_callback(port_id, queue_id,
+ clb, NULL);
+
ret = 0;
end:
return ret;
@@ -308,12 +291,20 @@ rte_power_ethdev_pmgmt_queue_disable(unsigned int lcore_id,
uint16_t port_id, uint16_t queue_id)
{
struct pmd_queue_cfg *queue_cfg;
+ int ret;
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
if (lcore_id >= RTE_MAX_LCORE || queue_id >= RTE_MAX_QUEUES_PER_PORT)
return -EINVAL;
+ /* check if the queue is stopped */
+ ret = queue_stopped(port_id, queue_id);
+ if (ret != 1) {
+ /* error means invalid queue, 0 means queue wasn't stopped */
+ return ret < 0 ? -EINVAL : -EBUSY;
+ }
+
/* no need to check queue id as wrong queue id would not be enabled */
queue_cfg = &port_cfg[port_id][queue_id];
@@ -323,27 +314,8 @@ rte_power_ethdev_pmgmt_queue_disable(unsigned int lcore_id,
/* stop any callbacks from progressing */
queue_cfg->pwr_mgmt_state = PMD_MGMT_DISABLED;
- /* ensure we update our state before continuing */
- rte_atomic_thread_fence(__ATOMIC_SEQ_CST);
-
switch (queue_cfg->cb_mode) {
- case RTE_POWER_MGMT_TYPE_MONITOR:
- {
- bool exit = false;
- do {
- /*
- * we may request cancellation while the other thread
- * has just entered the callback but hasn't started
- * sleeping yet, so keep waking it up until we know it's
- * done sleeping.
- */
- if (queue_cfg->umwait_in_progress)
- rte_power_monitor_wakeup(lcore_id);
- else
- exit = true;
- } while (!exit);
- }
- /* fall-through */
+ case RTE_POWER_MGMT_TYPE_MONITOR: /* fall-through */
case RTE_POWER_MGMT_TYPE_PAUSE:
rte_eth_remove_rx_callback(port_id, queue_id,
queue_cfg->cur_cb);
@@ -356,10 +328,11 @@ rte_power_ethdev_pmgmt_queue_disable(unsigned int lcore_id,
break;
}
/*
- * we don't free the RX callback here because it is unsafe to do so
- * unless we know for a fact that all data plane threads have stopped.
+ * the API doc mandates that the user stops all processing on affected
+ * ports before calling any of these API's, so we can assume that the
+ * callbacks can be freed. we're intentionally casting away const-ness.
*/
- queue_cfg->cur_cb = NULL;
+ rte_free((void *)queue_cfg->cur_cb);
return 0;
}
diff --git a/lib/power/rte_power_pmd_mgmt.h b/lib/power/rte_power_pmd_mgmt.h
index 7a0ac24625..444e7b8a66 100644
--- a/lib/power/rte_power_pmd_mgmt.h
+++ b/lib/power/rte_power_pmd_mgmt.h
@@ -43,6 +43,9 @@ enum rte_power_pmd_mgmt_type {
*
* @note This function is not thread-safe.
*
+ * @warning This function must be called when all affected Ethernet queues are
+ * stopped and no Rx/Tx is in progress!
+ *
* @param lcore_id
* The lcore the Rx queue will be polled from.
* @param port_id
@@ -69,6 +72,9 @@ rte_power_ethdev_pmgmt_queue_enable(unsigned int lcore_id,
*
* @note This function is not thread-safe.
*
+ * @warning This function must be called when all affected Ethernet queues are
+ * stopped and no Rx/Tx is in progress!
+ *
* @param lcore_id
* The lcore the Rx queue is polled from.
* @param port_id
--
2.25.1
^ permalink raw reply [relevance 3%]
* [dpdk-dev] [PATCH v3 1/7] power_intrinsics: use callbacks for comparison
@ 2021-06-28 12:41 3% ` Anatoly Burakov
2021-06-28 12:41 3% ` [dpdk-dev] [PATCH v3 4/7] power: remove thread safety from PMD power API's Anatoly Burakov
2 siblings, 0 replies; 200+ results
From: Anatoly Burakov @ 2021-06-28 12:41 UTC (permalink / raw)
To: dev, Timothy McDaniel, Beilei Xing, Jingjing Wu, Qiming Yang,
Qi Zhang, Haiyue Wang, Matan Azrad, Shahaf Shuler,
Viacheslav Ovsiienko, Bruce Richardson, Konstantin Ananyev
Cc: david.hunt, ciara.loftus
Previously, the semantics of power monitor were such that we were
checking current value against the expected value, and if they matched,
then the sleep was aborted. This is somewhat inflexible, because it only
allowed us to check for a specific value.
This commit replaces the comparison with a user callback mechanism, so
that any PMD (or other code) using `rte_power_monitor()` can define
their own comparison semantics and decision making on how to detect the
need to abort the entering of power optimized state.
Existing implementations are adjusted to follow the new semantics.
Suggested-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
Notes:
v2:
- Use callback mechanism for more flexibility
- Address feedback from Konstantin
doc/guides/rel_notes/release_21_08.rst | 1 +
drivers/event/dlb2/dlb2.c | 16 ++++++++--
drivers/net/i40e/i40e_rxtx.c | 19 ++++++++----
drivers/net/iavf/iavf_rxtx.c | 19 ++++++++----
drivers/net/ice/ice_rxtx.c | 19 ++++++++----
drivers/net/ixgbe/ixgbe_rxtx.c | 19 ++++++++----
drivers/net/mlx5/mlx5_rx.c | 16 ++++++++--
.../include/generic/rte_power_intrinsics.h | 29 ++++++++++++++-----
lib/eal/x86/rte_power_intrinsics.c | 9 ++----
9 files changed, 106 insertions(+), 41 deletions(-)
diff --git a/doc/guides/rel_notes/release_21_08.rst b/doc/guides/rel_notes/release_21_08.rst
index a6ecfdf3ce..c84ac280f5 100644
--- a/doc/guides/rel_notes/release_21_08.rst
+++ b/doc/guides/rel_notes/release_21_08.rst
@@ -84,6 +84,7 @@ API Changes
Also, make sure to start the actual text at the margin.
=======================================================
+* eal: the ``rte_power_intrinsics`` API changed to use a callback mechanism.
ABI Changes
-----------
diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c
index eca183753f..14dfac257c 100644
--- a/drivers/event/dlb2/dlb2.c
+++ b/drivers/event/dlb2/dlb2.c
@@ -3154,6 +3154,15 @@ dlb2_port_credits_inc(struct dlb2_port *qm_port, int num)
}
}
+#define CLB_MASK_IDX 0
+#define CLB_VAL_IDX 1
+static int
+dlb2_monitor_callback(const uint64_t val, const uint64_t opaque[4])
+{
+ /* abort if the value matches */
+ return (val & opaque[CLB_MASK_IDX]) == opaque[CLB_VAL_IDX] ? -1 : 0;
+}
+
static inline int
dlb2_dequeue_wait(struct dlb2_eventdev *dlb2,
struct dlb2_eventdev_port *ev_port,
@@ -3194,8 +3203,11 @@ dlb2_dequeue_wait(struct dlb2_eventdev *dlb2,
expected_value = 0;
pmc.addr = monitor_addr;
- pmc.val = expected_value;
- pmc.mask = qe_mask.raw_qe[1];
+ /* store expected value and comparison mask in opaque data */
+ pmc.opaque[CLB_VAL_IDX] = expected_value;
+ pmc.opaque[CLB_MASK_IDX] = qe_mask.raw_qe[1];
+ /* set up callback */
+ pmc.fn = dlb2_monitor_callback;
pmc.size = sizeof(uint64_t);
rte_power_monitor(&pmc, timeout + start_ticks);
diff --git a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c
index 6c58decece..45f3fbf4ec 100644
--- a/drivers/net/i40e/i40e_rxtx.c
+++ b/drivers/net/i40e/i40e_rxtx.c
@@ -81,6 +81,17 @@
#define I40E_TX_OFFLOAD_SIMPLE_NOTSUP_MASK \
(PKT_TX_OFFLOAD_MASK ^ I40E_TX_OFFLOAD_SIMPLE_SUP_MASK)
+static int
+i40e_monitor_callback(const uint64_t value, const uint64_t arg[4] __rte_unused)
+{
+ const uint64_t m = rte_cpu_to_le_64(1 << I40E_RX_DESC_STATUS_DD_SHIFT);
+ /*
+ * we expect the DD bit to be set to 1 if this descriptor was already
+ * written to.
+ */
+ return (value & m) == m ? -1 : 0;
+}
+
int
i40e_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
{
@@ -93,12 +104,8 @@ i40e_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
/* watch for changes in status bit */
pmc->addr = &rxdp->wb.qword1.status_error_len;
- /*
- * we expect the DD bit to be set to 1 if this descriptor was already
- * written to.
- */
- pmc->val = rte_cpu_to_le_64(1 << I40E_RX_DESC_STATUS_DD_SHIFT);
- pmc->mask = rte_cpu_to_le_64(1 << I40E_RX_DESC_STATUS_DD_SHIFT);
+ /* comparison callback */
+ pmc->fn = i40e_monitor_callback;
/* registers are 64-bit */
pmc->size = sizeof(uint64_t);
diff --git a/drivers/net/iavf/iavf_rxtx.c b/drivers/net/iavf/iavf_rxtx.c
index 0361af0d85..6e12ecce07 100644
--- a/drivers/net/iavf/iavf_rxtx.c
+++ b/drivers/net/iavf/iavf_rxtx.c
@@ -57,6 +57,17 @@ iavf_proto_xtr_type_to_rxdid(uint8_t flex_type)
rxdid_map[flex_type] : IAVF_RXDID_COMMS_OVS_1;
}
+static int
+iavf_monitor_callback(const uint64_t value, const uint64_t arg[4] __rte_unused)
+{
+ const uint64_t m = rte_cpu_to_le_64(1 << IAVF_RX_DESC_STATUS_DD_SHIFT);
+ /*
+ * we expect the DD bit to be set to 1 if this descriptor was already
+ * written to.
+ */
+ return (value & m) == m ? -1 : 0;
+}
+
int
iavf_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
{
@@ -69,12 +80,8 @@ iavf_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
/* watch for changes in status bit */
pmc->addr = &rxdp->wb.qword1.status_error_len;
- /*
- * we expect the DD bit to be set to 1 if this descriptor was already
- * written to.
- */
- pmc->val = rte_cpu_to_le_64(1 << IAVF_RX_DESC_STATUS_DD_SHIFT);
- pmc->mask = rte_cpu_to_le_64(1 << IAVF_RX_DESC_STATUS_DD_SHIFT);
+ /* comparison callback */
+ pmc->fn = iavf_monitor_callback;
/* registers are 64-bit */
pmc->size = sizeof(uint64_t);
diff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c
index fc9bb5a3e7..278eb4b9a1 100644
--- a/drivers/net/ice/ice_rxtx.c
+++ b/drivers/net/ice/ice_rxtx.c
@@ -27,6 +27,17 @@ uint64_t rte_net_ice_dynflag_proto_xtr_ipv6_flow_mask;
uint64_t rte_net_ice_dynflag_proto_xtr_tcp_mask;
uint64_t rte_net_ice_dynflag_proto_xtr_ip_offset_mask;
+static int
+ice_monitor_callback(const uint64_t value, const uint64_t arg[4] __rte_unused)
+{
+ const uint64_t m = rte_cpu_to_le_16(1 << ICE_RX_FLEX_DESC_STATUS0_DD_S);
+ /*
+ * we expect the DD bit to be set to 1 if this descriptor was already
+ * written to.
+ */
+ return (value & m) == m ? -1 : 0;
+}
+
int
ice_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
{
@@ -39,12 +50,8 @@ ice_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
/* watch for changes in status bit */
pmc->addr = &rxdp->wb.status_error0;
- /*
- * we expect the DD bit to be set to 1 if this descriptor was already
- * written to.
- */
- pmc->val = rte_cpu_to_le_16(1 << ICE_RX_FLEX_DESC_STATUS0_DD_S);
- pmc->mask = rte_cpu_to_le_16(1 << ICE_RX_FLEX_DESC_STATUS0_DD_S);
+ /* comparison callback */
+ pmc->fn = ice_monitor_callback;
/* register is 16-bit */
pmc->size = sizeof(uint16_t);
diff --git a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers/net/ixgbe/ixgbe_rxtx.c
index d69f36e977..0c5045d9dc 100644
--- a/drivers/net/ixgbe/ixgbe_rxtx.c
+++ b/drivers/net/ixgbe/ixgbe_rxtx.c
@@ -1369,6 +1369,17 @@ const uint32_t
RTE_PTYPE_INNER_L3_IPV4_EXT | RTE_PTYPE_INNER_L4_UDP,
};
+static int
+ixgbe_monitor_callback(const uint64_t value, const uint64_t arg[4] __rte_unused)
+{
+ const uint64_t m = rte_cpu_to_le_32(IXGBE_RXDADV_STAT_DD);
+ /*
+ * we expect the DD bit to be set to 1 if this descriptor was already
+ * written to.
+ */
+ return (value & m) == m ? -1 : 0;
+}
+
int
ixgbe_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
{
@@ -1381,12 +1392,8 @@ ixgbe_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
/* watch for changes in status bit */
pmc->addr = &rxdp->wb.upper.status_error;
- /*
- * we expect the DD bit to be set to 1 if this descriptor was already
- * written to.
- */
- pmc->val = rte_cpu_to_le_32(IXGBE_RXDADV_STAT_DD);
- pmc->mask = rte_cpu_to_le_32(IXGBE_RXDADV_STAT_DD);
+ /* comparison callback */
+ pmc->fn = ixgbe_monitor_callback;
/* the registers are 32-bit */
pmc->size = sizeof(uint32_t);
diff --git a/drivers/net/mlx5/mlx5_rx.c b/drivers/net/mlx5/mlx5_rx.c
index 777a1d6e45..57f6ca1467 100644
--- a/drivers/net/mlx5/mlx5_rx.c
+++ b/drivers/net/mlx5/mlx5_rx.c
@@ -269,6 +269,17 @@ mlx5_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id)
return rx_queue_count(rxq);
}
+#define CLB_VAL_IDX 0
+#define CLB_MSK_IDX 1
+static int
+mlx_monitor_callback(const uint64_t value, const uint64_t opaque[4])
+{
+ const uint64_t m = opaque[CLB_MSK_IDX];
+ const uint64_t v = opaque[CLB_VAL_IDX];
+
+ return (value & m) == v ? -1 : 0;
+}
+
int mlx5_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
{
struct mlx5_rxq_data *rxq = rx_queue;
@@ -282,8 +293,9 @@ int mlx5_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
return -rte_errno;
}
pmc->addr = &cqe->op_own;
- pmc->val = !!idx;
- pmc->mask = MLX5_CQE_OWNER_MASK;
+ pmc->opaque[CLB_VAL_IDX] = !!idx;
+ pmc->opaque[CLB_MSK_IDX] = MLX5_CQE_OWNER_MASK;
+ pmc->fn = mlx_monitor_callback;
pmc->size = sizeof(uint8_t);
return 0;
}
diff --git a/lib/eal/include/generic/rte_power_intrinsics.h b/lib/eal/include/generic/rte_power_intrinsics.h
index dddca3d41c..046667ade6 100644
--- a/lib/eal/include/generic/rte_power_intrinsics.h
+++ b/lib/eal/include/generic/rte_power_intrinsics.h
@@ -18,19 +18,34 @@
* which are architecture-dependent.
*/
+/**
+ * Callback definition for monitoring conditions. Callbacks with this signature
+ * will be used by `rte_power_monitor()` to check if the entering of power
+ * optimized state should be aborted.
+ *
+ * @param val
+ * The value read from memory.
+ * @param opaque
+ * Callback-specific data.
+ *
+ * @return
+ * 0 if entering of power optimized state should proceed
+ * -1 if entering of power optimized state should be aborted
+ */
+typedef int (*rte_power_monitor_clb_t)(const uint64_t val,
+ const uint64_t opaque[4]);
struct rte_power_monitor_cond {
volatile void *addr; /**< Address to monitor for changes */
- uint64_t val; /**< If the `mask` is non-zero, location pointed
- * to by `addr` will be read and compared
- * against this value.
- */
- uint64_t mask; /**< 64-bit mask to extract value read from `addr` */
- uint8_t size; /**< Data size (in bytes) that will be used to compare
- * expected value (`val`) with data read from the
+ uint8_t size; /**< Data size (in bytes) that will be read from the
* monitored memory location (`addr`). Can be 1, 2,
* 4, or 8. Supplying any other value will result in
* an error.
*/
+ rte_power_monitor_clb_t fn; /**< Callback to be used to check if
+ * entering power optimized state should
+ * be aborted.
+ */
+ uint64_t opaque[4]; /**< Callback-specific data */
};
/**
diff --git a/lib/eal/x86/rte_power_intrinsics.c b/lib/eal/x86/rte_power_intrinsics.c
index 39ea9fdecd..3c5c9ce7ad 100644
--- a/lib/eal/x86/rte_power_intrinsics.c
+++ b/lib/eal/x86/rte_power_intrinsics.c
@@ -110,14 +110,11 @@ rte_power_monitor(const struct rte_power_monitor_cond *pmc,
/* now that we've put this address into monitor, we can unlock */
rte_spinlock_unlock(&s->lock);
- /* if we have a comparison mask, we might not need to sleep at all */
- if (pmc->mask) {
+ /* if we have a callback, we might not need to sleep at all */
+ if (pmc->fn) {
const uint64_t cur_value = __get_umwait_val(
pmc->addr, pmc->size);
- const uint64_t masked = cur_value & pmc->mask;
-
- /* if the masked value is already matching, abort */
- if (masked == pmc->val)
+ if (pmc->fn(cur_value, pmc->opaque) != 0)
goto end;
}
--
2.25.1
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] Experimental symbols in kni lib
2021-06-25 13:26 0% ` Igor Ryzhov
@ 2021-06-28 12:23 0% ` Ferruh Yigit
0 siblings, 0 replies; 200+ results
From: Ferruh Yigit @ 2021-06-28 12:23 UTC (permalink / raw)
To: Igor Ryzhov; +Cc: Kinsella, Ray, Thomas Monjalon, Stephen Hemminger, dpdk-dev
On 6/25/2021 2:26 PM, Igor Ryzhov wrote:
> Hi Ferruh, all,
>
> Let's please discuss another approach to setting KNI link status before
> making this API stable:
> http://patches.dpdk.org/project/dpdk/patch/20190925093623.18419-1-iryzhov@nfware.com/
>
> I explained the problem with the current implementation there.
> More than that, using ioctl approach makes it possible to set also speed
> and duplex and use them to implement get_link_ksettings callback.
> I can send patches for both features.
>
Hi Igor, agree to discuss your patch before promoting the API, I will comment on
the outstanding patch.
> Igor
>
> On Thu, Jun 24, 2021 at 4:54 PM Kinsella, Ray <mdr@ashroe.eu> wrote:
>
>> Sounds more than reasonable, +1 from me.
>>
>> Ray K
>>
>> On 24/06/2021 14:24, Ferruh Yigit wrote:
>>> On 6/24/2021 11:42 AM, Kinsella, Ray wrote:
>>>> Hi Ferruh,
>>>>
>>>> The following kni experimental symbols are present in both v21.05 and
>> v19.11 release. These symbols should be considered for promotion to stable
>> as part of the v22 ABI in DPDK 21.11, as they have been experimental for >=
>> 2yrs at this point.
>>>>
>>>> * rte_kni_update_link
>>>>
>>>> Ray K
>>>>
>>>
>>> Hi Ray,
>>>
>>> Thanks for follow up.
>>>
>>> I just checked the API and planning a small behavior update to it.
>>> If the update is accepted, I suggest keeping the API experimental for
>> 21.08 too,
>>> but can mature it on v21.11.
>>>
>>> Thanks,
>>> ferruh
>>>
>>
^ permalink raw reply [relevance 0%]
* [dpdk-dev] 20.11.2 patches review and test
@ 2021-06-26 23:28 1% Xueming Li
2021-06-30 10:33 0% ` Jiang, YuX
2021-07-06 3:26 0% ` [dpdk-dev] [dpdk-stable] " Kalesh Anakkur Purayil
0 siblings, 2 replies; 200+ results
From: Xueming Li @ 2021-06-26 23:28 UTC (permalink / raw)
To: stable
Cc: dev, Abhishek Marathe, Akhil Goyal, Ali Alnubani,
benjamin.walker, David Christensen, hariprasad.govindharajan,
Hemant Agrawal, Ian Stokes, Jerin Jacob, John McNamara,
Ju-Hyoung Lee, Kevin Traynor, Luca Boccassi, Pei Zhang, pingx.yu,
qian.q.xu, Raslan Darawsheh, Thomas Monjalon, yuan.peng,
zhaoyan.chen, xuemingl
Hi all,
Here is a list of patches targeted for stable release 20.11.2.
The planned date for the final release is 6th July.
Please help with testing and validation of your use cases and report
any issues/results with reply-all to this mail. For the final release
the fixes and reported validations will be added to the release notes.
A release candidate tarball can be found at:
https://dpdk.org/browse/dpdk-stable/tag/?id=v20.11.2-rc2
These patches are located at branch 20.11 of dpdk-stable repo:
https://dpdk.org/browse/dpdk-stable/
Thanks.
Xueming Li <xuemingl@nvidia.com>
---
Adam Dybkowski (3):
common/qat: increase IM buffer size for GEN3
compress/qat: enable compression on GEN3
crypto/qat: fix null authentication request
Ajit Khaparde (7):
net/bnxt: fix RSS context cleanup
net/bnxt: check kvargs parsing
net/bnxt: fix resource cleanup
doc: fix formatting in testpmd guide
net/bnxt: fix mismatched type comparison in MAC restore
net/bnxt: check PCI config read
net/bnxt: fix mismatched type comparison in Rx
Alvin Zhang (11):
net/ice: fix VLAN filter with PF
net/i40e: fix input set field mask
net/igc: fix Rx RSS hash offload capability
net/igc: fix Rx error counter for bad length
net/e1000: fix Rx error counter for bad length
net/e1000: fix max Rx packet size
net/igc: fix Rx packet size
net/ice: fix fast mbuf freeing
net/iavf: fix VF to PF command failure handling
net/i40e: fix VF RSS configuration
net/igc: fix speed configuration
Anatoly Burakov (3):
fbarray: fix log message on truncation error
power: do not skip saving original P-state governor
power: save original ACPI governor always
Andrew Boyer (1):
net/ionic: fix completion type in lif init
Andrew Rybchenko (4):
net/failsafe: fix RSS hash offload reporting
net/failsafe: report minimum and maximum MTU
common/sfc_efx: remove GENEVE from supported tunnels
net/sfc: fix mark support in EF100 native Rx datapath
Andy Moreton (2):
common/sfc_efx/base: limit reported MCDI response length
common/sfc_efx/base: add missing MCDI response length checks
Ankur Dwivedi (1):
crypto/octeontx: fix session-less mode
Apeksha Gupta (1):
examples/l2fwd-crypto: skip masked devices
Arek Kusztal (1):
crypto/qat: fix offset for out-of-place scatter-gather
Beilei Xing (1):
net/i40evf: fix packet loss for X722
Bing Zhao (1):
net/mlx5: fix loopback for Direct Verbs queue
Bruce Richardson (2):
build: exclude meson files from examples installation
raw/ioat: fix script for configuring small number of queues
Chaoyong He (1):
doc: fix multiport syntax in nfp guide
Chenbo Xia (1):
examples/vhost: check memory table query
Chengchang Tang (20):
net/hns3: fix HW buffer size on MTU update
net/hns3: fix processing Tx offload flags
net/hns3: fix Tx checksum for UDP packets with special port
net/hns3: fix long task queue pairs reset time
ethdev: validate input in module EEPROM dump
ethdev: validate input in register info
ethdev: validate input in EEPROM info
net/hns3: fix rollback after setting PVID failure
net/hns3: fix timing in resetting queues
net/hns3: fix queue state when concurrent with reset
net/hns3: fix configure FEC when concurrent with reset
net/hns3: fix use of command status enumeration
examples: add eal cleanup to examples
net/bonding: fix adding itself as its slave
net/hns3: fix timing in mailbox
app/testpmd: fix max queue number for Tx offloads
net/tap: fix interrupt vector array size
net/bonding: fix socket ID check
net/tap: check ioctl on restore
examples/timer: fix time interval
Chengwen Feng (50):
net/hns3: fix flow counter value
net/hns3: fix VF mailbox head field
net/hns3: support get device version when dump register
net/hns3: fix some packet types
net/hns3: fix missing outer L4 UDP flag for VXLAN
net/hns3: remove VLAN/QinQ ptypes from support list
test: check thread creation
common/dpaax: fix possible null pointer access
examples/ethtool: remove unused parsing
net/hns3: fix flow director lock
net/e1000/base: fix timeout for shadow RAM write
net/hns3: fix setting default MAC address in bonding of VF
net/hns3: fix possible mismatched response of mailbox
net/hns3: fix VF handling LSC event in secondary process
net/hns3: fix verification of NEON support
mbuf: check shared memory before dumping dynamic space
eventdev: remove redundant thread name setting
eventdev: fix memory leakage on thread creation failure
net/kni: check init result
net/hns3: fix mailbox error message
net/hns3: fix processing link status message on PF
net/hns3: remove unused mailbox macro and struct
net/bonding: fix leak on remove
net/hns3: fix handling link update
net/i40e: fix negative VEB index
net/i40e: remove redundant VSI check in Tx queue setup
net/virtio: fix getline memory leakage
net/hns3: log time delta in decimal format
net/hns3: fix time delta calculation
net/hns3: remove unused macros
net/hns3: fix vector Rx burst limitation
net/hns3: remove read when enabling TM QCN error event
net/hns3: remove unused VMDq code
net/hns3: increase readability in logs
raw/ntb: check SPAD user index
raw/ntb: check memory allocations
ipc: check malloc sync reply result
eal: fix service core list parsing
ipc: use monotonic clock
net/hns3: return error on PCI config write failure
net/hns3: fix log on flow director clear
net/hns3: clear hash map on flow director clear
net/hns3: fix querying flow director counter for out param
net/hns3: fix TM QCN error event report by MSI-X
net/hns3: fix mailbox message ID in log
net/hns3: fix secondary process request start/stop Rx/Tx
net/hns3: fix ordering in secondary process initialization
net/hns3: fail setting FEC if one bit mode is not supported
net/mlx4: fix secondary process initialization ordering
net/mlx5: fix secondary process initialization ordering
Ciara Loftus (1):
net/af_xdp: fix error handling during Rx queue setup
Ciara Power (2):
telemetry: fix race on callbacks list
test/crypto: fix return value of a skipped test
Conor Walsh (1):
examples/l3fwd: fix LPM IPv6 subnets
Cristian Dumitrescu (3):
table: fix actions with different data size
pipeline: fix instruction translation
pipeline: fix endianness conversions
Dapeng Yu (3):
net/igc: remove MTU setting limitation
net/e1000: remove MTU setting limitation
examples/packet_ordering: fix port configuration
David Christensen (1):
config/ppc: reduce number of cores and NUMA nodes
David Harton (1):
net/ena: fix releasing Tx ring mbufs
David Hunt (4):
test/power: fix CPU frequency check
test/power: add turbo mode to frequency check
test/power: fix low frequency test when turbo enabled
test/power: fix turbo test
David Marchand (18):
doc: fix sphinx rtd theme import in GHA
service: clean references to removed symbol
eal: fix evaluation of log level option
ci: hook to GitHub Actions
ci: enable v21 ABI checks
ci: fix package installation in GitHub Actions
ci: ignore APT update failure in GitHub Actions
ci: catch coredumps
vhost: fix offload flags in Rx path
bus/fslmc: remove unused debug macro
eal: fix leak in shared lib mode detection
event/dpaa2: remove unused macros
net/ice/base: fix memory allocation wrapper
net/ice: fix leak on thread termination
devtools: fix orphan symbols check with busybox
net/vhost: restore pseudo TSO support
net/ark: fix leak on thread termination
build: fix drivers selection without Python
Dekel Peled (1):
common/mlx5: fix DevX read output buffer size
Dmitry Kozlyuk (4):
net/pcap: fix format string
eal/windows: add missing SPDX license tag
buildtools: fix all drivers disabled on Windows
examples/rxtx_callbacks: fix port ID format specifier
Ed Czeck (2):
net/ark: update packet director initial state
net/ark: refactor Rx buffer recovery
Elad Nachman (2):
kni: support async user request
kni: fix kernel deadlock with bifurcated device
Feifei Wang (2):
net/i40e: fix parsing packet type for NEON
test/trace: fix race on collected perf data
Ferruh Yigit (9):
power: remove duplicated symbols from map file
log/linux: make default output stderr
license: fix typos
drivers/net: fix FW version query
net/bnx2x: fix build with GCC 11
net/bnx2x: fix build with GCC 11
net/ice/base: fix build with GCC 11
net/tap: fix build with GCC 11
test/table: fix build with GCC 11
Gregory Etelson (2):
app/testpmd: fix tunnel offload flows cleanup
net/mlx5: fix tunnel offload private items location
Guoyang Zhou (1):
net/hinic: fix crash in secondary process
Haiyue Wang (1):
net/ixgbe: fix Rx errors statistics for UDP checksum
Harman Kalra (1):
event/octeontx2: fix device reconfigure for single slot
Heinrich Kuhn (1):
net/nfp: fix reporting of RSS capabilities
Hemant Agrawal (3):
ethdev: add missing buses in device iterator
crypto/dpaa_sec: affine the thread portal affinity
crypto/dpaa2_sec: fix close and uninit functions
Hongbo Zheng (9):
app/testpmd: fix Tx/Rx descriptor query error log
net/hns3: fix FLR miss detection
net/hns3: delete redundant blank line
bpf: fix JSLT validation
common/sfc_efx/base: fix dereferencing null pointer
power: fix sanity checks for guest channel read
net/hns3: fix VF alive notification after config restore
examples/l3fwd-power: fix empty poll thresholds
net/hns3: fix concurrent interrupt handling
Huisong Li (23):
net/hns3: fix device capabilities for copper media type
net/hns3: remove unused parameter markers
net/hns3: fix reporting undefined speed
net/hns3: fix link update when failed to get link info
net/hns3: fix flow control exception
app/testpmd: fix bitmap of link speeds when force speed
net/hns3: fix flow control mode
net/hns3: remove redundant mailbox response
net/hns3: fix DCB mode check
net/hns3: fix VMDq mode check
net/hns3: fix mbuf leakage
net/hns3: fix link status when port is stopped
net/hns3: fix link speed when port is down
app/testpmd: fix forward lcores number for DCB
app/testpmd: fix DCB forwarding configuration
app/testpmd: fix DCB re-configuration
app/testpmd: verify DCB config during forward config
net/hns3: fix Rx/Tx queue numbers check
net/hns3: fix requested FC mode rollback
net/hns3: remove meaningless packet buffer rollback
net/hns3: fix DCB configuration
net/hns3: fix DCB reconfiguration
net/hns3: fix link speed when VF device is down
Ibtisam Tariq (1):
examples/vhost_crypto: remove unused short option
Igor Chauskin (2):
net/ena: switch memcpy to optimized version
net/ena: fix parsing of large LLQ header device argument
Igor Russkikh (2):
net/qede: reduce log verbosity
net/qede: accept bigger RSS table
Ilya Maximets (1):
net/virtio: fix interrupt unregistering for listening socket
Ivan Malov (5):
net/sfc: fix buffer size for flow parse
net: fix comment in IPv6 header
net/sfc: fix error path inconsistency
common/sfc_efx/base: fix indication of MAE encap support
net/sfc: fix outer rule rollback on error
Jerin Jacob (1):
examples: fix pkg-config override
Jiawei Wang (4):
app/testpmd: fix NVGRE encap configuration
net/mlx5: fix resource release for mirror flow
net/mlx5: fix RSS flow item expansion for GRE key
net/mlx5: fix RSS flow item expansion for NVGRE
Jiawei Zhu (1):
net/mlx5: fix Rx segmented packets on mbuf starvation
Jiawen Wu (4):
net/txgbe: remove unused functions
net/txgbe: fix Rx missed packet counter
net/txgbe: update packet type
net/txgbe: fix QinQ strip
Jiayu Hu (2):
vhost: fix queue initialization
vhost: fix redundant vring status change notification
Jie Wang (1):
net/ice: fix VSI array out of bounds access
John Daley (2):
net/enic: fix flow initialization error handling
net/enic: enable GENEVE offload via VNIC configuration
Juraj Linkeš (1):
eal/arm64: fix platform register bit
Kai Ji (2):
test/crypto: fix auth-cipher compare length in OOP
test/crypto: copy offset data to OOP destination buffer
Kalesh AP (23):
net/bnxt: remove unused macro
net/bnxt: fix VNIC configuration
net/bnxt: fix firmware fatal error handling
net/bnxt: fix FW readiness check during recovery
net/bnxt: fix device readiness check
net/bnxt: fix VF info allocation
net/bnxt: fix HWRM and FW incompatibility handling
net/bnxt: mute some failure logs
app/testpmd: check MAC address query
net/bnxt: fix PCI write check
net/bnxt: fix link state operations
net/bnxt: fix timesync when PTP is not supported
net/bnxt: fix memory allocation for command response
net/bnxt: fix double free in port start failure
net/bnxt: fix configuring LRO
net/bnxt: fix health check alarm cancellation
net/bnxt: fix PTP support for Thor
net/bnxt: fix ring count calculation for Thor
net/bnxt: remove unnecessary forward declarations
net/bnxt: remove unused function parameters
net/bnxt: drop unused attribute
net/bnxt: fix single PF per port check
net/bnxt: prevent device access in error state
Kamil Vojanec (1):
net/mlx5/linux: fix firmware version
Kevin Traynor (5):
test/cmdline: fix inputs array
test/crypto: fix build with GCC 11
crypto/zuc: fix build with GCC 11
test: fix build with GCC 11
test/cmdline: silence clang 12 warning
Konstantin Ananyev (1):
acl: fix build with GCC 11
Lance Richardson (8):
net/bnxt: fix Rx buffer posting
net/bnxt: fix Tx length hint threshold
net/bnxt: fix handling of null flow mask
test: fix TCP header initialization
net/bnxt: fix Rx descriptor status
net/bnxt: fix Rx queue count
net/bnxt: fix dynamic VNIC count
eal: fix memory mapping on 32-bit target
Leyi Rong (1):
net/iavf: fix packet length parsing in AVX512
Li Zhang (1):
net/mlx5: fix flow actions index in cache
Luc Pelletier (2):
eal: fix race in control thread creation
eal: fix hang in control thread creation
Marvin Liu (5):
vhost: fix split ring potential buffer overflow
vhost: fix packed ring potential buffer overflow
vhost: fix batch dequeue potential buffer overflow
vhost: fix initialization of temporary header
vhost: fix initialization of async temporary header
Matan Azrad (5):
common/mlx5/linux: add glue function to query WQ
common/mlx5: add DevX command to query WQ
common/mlx5: add DevX commands for queue counters
vdpa/mlx5: fix virtq cleaning
vdpa/mlx5: fix device unplug
Michael Baum (1):
net/mlx5: fix flow age event triggering
Michal Krawczyk (5):
net/ena/base: improve style and comments
net/ena/base: fix type conversions by explicit casting
net/ena/base: destroy multiple wait events
net/ena: fix crash with unsupported device argument
net/ena: indicate Rx RSS hash presence
Min Hu (Connor) (25):
net/hns3: fix MTU config complexity
net/hns3: update HiSilicon copyright syntax
net/hns3: fix copyright date
examples/ptpclient: remove wrong comment
test/bpf: fix error message
doc: fix HiSilicon copyright syntax
net/hns3: remove unused macros
net/hns3: remove unused macro
app/eventdev: fix overflow in lcore list parsing
test/kni: fix a comment
test/kni: check init result
net/hns3: fix typos on comments
net/e1000: fix flow error message object
app/testpmd: fix division by zero on socket memory dump
net/kni: warn on stop failure
app/bbdev: check memory allocation
app/bbdev: fix HARQ error messages
raw/skeleton: add missing check after setting attribute
test/timer: check memzone allocation
app/crypto-perf: check memory allocation
examples/flow_classify: fix NUMA check of port and core
examples/l2fwd-cat: fix NUMA check of port and core
examples/skeleton: fix NUMA check of port and core
test: check flow classifier creation
test: fix division by zero
Murphy Yang (3):
net/ixgbe: fix RSS RETA being reset after port start
net/i40e: fix flow director config after flow validate
net/i40e: fix flow director for common pctypes
Natanael Copa (5):
common/dpaax/caamflib: fix build with musl
bus/dpaa: fix 64-bit arch detection
bus/dpaa: fix build with musl
net/cxgbe: remove use of uint type
app/testpmd: fix build with musl
Nipun Gupta (1):
bus/dpaa: fix statistics reading
Nithin Dabilpuram (3):
vfio: do not merge contiguous areas
vfio: fix DMA mapping granularity for IOVA as VA
test/mem: fix page size for external memory
Olivier Matz (1):
test/mempool: fix object initializer
Pallavi Kadam (1):
bus/pci: skip probing some Windows NDIS devices
Pavan Nikhilesh (4):
test/event: fix timeout accuracy
app/eventdev: fix timeout accuracy
app/eventdev: fix lcore parsing skipping last core
event/octeontx2: fix XAQ pool reconfigure
Pu Xu (1):
ip_frag: fix fragmenting IPv4 packet with header option
Qi Zhang (8):
net/ice/base: fix payload indicator on ptype
net/ice/base: fix uninitialized struct
net/ice/base: cleanup filter list on error
net/ice/base: fix memory allocation for MAC addresses
net/iavf: fix TSO max segment size
doc: fix matching versions in ice guide
net/iavf: fix wrong Tx context descriptor
common/iavf: fix duplicated offload bit
Radha Mohan Chintakuntla (1):
raw/octeontx2_dma: assign PCI device in DPI VF
Raslan Darawsheh (1):
ethdev: update flow item GTP QFI definition
Richael Zhuang (2):
test/power: add delay before checking CPU frequency
test/power: round CPU frequency to check
Robin Zhang (6):
net/i40e: announce request queue capability in PF
doc: update recommended versions for i40e
net/i40e: fix lack of MAC type when set MAC address
net/iavf: fix lack of MAC type when set MAC address
net/iavf: fix primary MAC type when starting port
net/i40e: fix primary MAC type when starting port
Rohit Raj (3):
net/dpaa2: fix getting link status
net/dpaa: fix getting link status
examples/l2fwd-crypto: fix packet length while decryption
Roy Shterman (1):
mem: fix freeing segments in --huge-unlink mode
Satheesh Paul (1):
net/octeontx2: fix VLAN filter
Savinay Dharmappa (1):
sched: fix traffic class oversubscription parameter
Shijith Thotton (3):
eventdev: fix case to initiate crypto adapter service
event/octeontx2: fix crypto adapter queue pair operations
event/octeontx2: configure crypto adapter xaq pool
Siwar Zitouni (1):
net/ice: fix disabling promiscuous mode
Somnath Kotur (5):
net/bnxt: fix xstats get
net/bnxt: fix Rx and Tx timestamps
net/bnxt: fix Tx timestamp init
net/bnxt: refactor multi-queue Rx configuration
net/bnxt: fix Rx timestamp when FIFO pending bit is set
Stanislaw Kardach (6):
test: proceed if timer subsystem already initialized
stack: allow lock-free only on relevant architectures
test/distributor: fix worker notification in burst mode
test/distributor: fix burst flush on worker quit
net/ena: remove endian swap functions
net/ena: report default ring size
Stephen Hemminger (2):
kni: refactor user request processing
net/bnxt: use prefix on global function
Suanming Mou (1):
net/mlx5: fix counter offset detection
Tal Shnaiderman (2):
eal/windows: fix default thread priority
eal/windows: fix return codes of pthread shim layer
Tengfei Zhang (1):
net/pcap: fix file descriptor leak on close
Thinh Tran (1):
test: fix autotest handling of skipped tests
Thomas Monjalon (18):
bus/pci: fix Windows kernel driver categories
eal: fix comment of OS-specific header files
buildtools: fix build with busybox
build: detect execinfo library on Linux
build: remove redundant _GNU_SOURCE definitions
eal: fix build with musl
net/igc: remove use of uint type
event/dlb: fix header includes for musl
examples/bbdev: fix header include for musl
drivers: fix log level after loading
app/regex: fix usage text
app/testpmd: fix usage text
doc: fix names of UIO drivers
doc: fix build with Sphinx 4
bus/pci: support I/O port operations with musl
app: fix exit messages
regex/octeontx2: remove unused include directory
doc: remove PDF requirements
Tianyu Li (1):
net/memif: fix Tx bps statistics for zero-copy
Timothy McDaniel (2):
event/dlb2: remove references to deferred scheduling
doc: fix runtime options in DLB2 guide
Tyler Retzlaff (1):
eal: add C++ include guard for reciprocal header
Vadim Podovinnikov (1):
net/bonding: fix LACP system address check
Venkat Duvvuru (1):
net/bnxt: fix queues per VNIC
Viacheslav Ovsiienko (16):
net/mlx5: fix external buffer pool registration for Rx queue
net/mlx5: fix metadata item validation for ingress flows
net/mlx5: fix hashed list size for tunnel flow groups
net/mlx5: fix UAR allocation diagnostics messages
common/mlx5: add timestamp format support to DevX
vdpa/mlx5: support timestamp format
net/mlx5: fix Rx metadata leftovers
net/mlx5: fix drop action for Direct Rules/Verbs
net/mlx4: fix RSS action with null hash key
net/mlx5: support timestamp format
regex/mlx5: support timestamp format
app/testpmd: fix segment number check
net/mlx5: remove drop queue function prototypes
net/mlx4: fix buffer leakage on device close
net/mlx5: fix probing device in legacy bonding mode
net/mlx5: fix receiving queue timestamp format
Wei Huang (1):
raw/ifpga: fix device name format
Wenjun Wu (3):
net/ice: check some functions return
net/ice: fix RSS hash update
net/ice: fix RSS for L2 packet
Wenwu Ma (1):
net/ice: fix illegal access when removing MAC filter
Wenzhuo Lu (2):
net/iavf: fix crash in AVX512
net/ice: fix crash in AVX512
Wisam Jaddo (1):
app/flow-perf: fix encap/decap actions
Xiao Wang (1):
vdpa/ifc: check PCI config read
Xiaoyu Min (4):
net/mlx5: support RSS expansion for IPv6 GRE
net/mlx5: fix shared inner RSS
net/mlx5: fix missing shared RSS hash types
net/mlx5: fix redundant flow after RSS expansion
Xiaoyun Li (2):
app/testpmd: remove unnecessary UDP tunnel check
net/i40e: fix IPv4 fragment offload
Xueming Li (2):
version: 20.11.2-rc1
net/virtio: fix vectorized Rx queue rearm
Youri Querry (1):
bus/fslmc: fix random portal hangs with qbman 5.0
Yunjian Wang (5):
vfio: fix API description
net/mlx5: fix using flow tunnel before null check
vfio: fix duplicated user mem map
net/mlx4: fix leak when configured repeatedly
net/mlx5: fix leak when configured repeatedly
^ permalink raw reply [relevance 1%]
* [dpdk-dev] 20.11.2 patches review and test
@ 2021-06-26 23:08 1% Xueming Li
0 siblings, 0 replies; 200+ results
From: Xueming Li @ 2021-06-26 23:08 UTC (permalink / raw)
To: stable
Cc: dev, Abhishek Marathe, Akhil Goyal, Ali Alnubani,
benjamin.walker, David Christensen, hariprasad.govindharajan,
Hemant Agrawal, Ian Stokes, Jerin Jacob, John McNamara,
Ju-Hyoung Lee, Kevin Traynor, Luca Boccassi, Pei Zhang, pingx.yu,
qian.q.xu, Raslan Darawsheh, Thomas Monjalon, yuan.peng,
zhaoyan.chen, xuemingl
Hi all,
Here is a list of patches targeted for stable release 20.11.2.
The planned date for the final release is 6th July.
Please help with testing and validation of your use cases and report
any issues/results with reply-all to this mail. For the final release
the fixes and reported validations will be added to the release notes.
A release candidate tarball can be found at:
https://dpdk.org/browse/dpdk-stable/tag/?id=v20.11.2-rc2
These patches are located at branch 20.11 of dpdk-stable repo:
https://dpdk.org/browse/dpdk-stable/
Thanks.
Xueming Li <xuemingl@nvidia.com>
---
Adam Dybkowski (3):
common/qat: increase IM buffer size for GEN3
compress/qat: enable compression on GEN3
crypto/qat: fix null authentication request
Ajit Khaparde (7):
net/bnxt: fix RSS context cleanup
net/bnxt: check kvargs parsing
net/bnxt: fix resource cleanup
doc: fix formatting in testpmd guide
net/bnxt: fix mismatched type comparison in MAC restore
net/bnxt: check PCI config read
net/bnxt: fix mismatched type comparison in Rx
Alvin Zhang (11):
net/ice: fix VLAN filter with PF
net/i40e: fix input set field mask
net/igc: fix Rx RSS hash offload capability
net/igc: fix Rx error counter for bad length
net/e1000: fix Rx error counter for bad length
net/e1000: fix max Rx packet size
net/igc: fix Rx packet size
net/ice: fix fast mbuf freeing
net/iavf: fix VF to PF command failure handling
net/i40e: fix VF RSS configuration
net/igc: fix speed configuration
Anatoly Burakov (3):
fbarray: fix log message on truncation error
power: do not skip saving original P-state governor
power: save original ACPI governor always
Andrew Boyer (1):
net/ionic: fix completion type in lif init
Andrew Rybchenko (4):
net/failsafe: fix RSS hash offload reporting
net/failsafe: report minimum and maximum MTU
common/sfc_efx: remove GENEVE from supported tunnels
net/sfc: fix mark support in EF100 native Rx datapath
Andy Moreton (2):
common/sfc_efx/base: limit reported MCDI response length
common/sfc_efx/base: add missing MCDI response length checks
Ankur Dwivedi (1):
crypto/octeontx: fix session-less mode
Apeksha Gupta (1):
examples/l2fwd-crypto: skip masked devices
Arek Kusztal (1):
crypto/qat: fix offset for out-of-place scatter-gather
Beilei Xing (1):
net/i40evf: fix packet loss for X722
Bing Zhao (1):
net/mlx5: fix loopback for Direct Verbs queue
Bruce Richardson (2):
build: exclude meson files from examples installation
raw/ioat: fix script for configuring small number of queues
Chaoyong He (1):
doc: fix multiport syntax in nfp guide
Chenbo Xia (1):
examples/vhost: check memory table query
Chengchang Tang (20):
net/hns3: fix HW buffer size on MTU update
net/hns3: fix processing Tx offload flags
net/hns3: fix Tx checksum for UDP packets with special port
net/hns3: fix long task queue pairs reset time
ethdev: validate input in module EEPROM dump
ethdev: validate input in register info
ethdev: validate input in EEPROM info
net/hns3: fix rollback after setting PVID failure
net/hns3: fix timing in resetting queues
net/hns3: fix queue state when concurrent with reset
net/hns3: fix configure FEC when concurrent with reset
net/hns3: fix use of command status enumeration
examples: add eal cleanup to examples
net/bonding: fix adding itself as its slave
net/hns3: fix timing in mailbox
app/testpmd: fix max queue number for Tx offloads
net/tap: fix interrupt vector array size
net/bonding: fix socket ID check
net/tap: check ioctl on restore
examples/timer: fix time interval
Chengwen Feng (50):
net/hns3: fix flow counter value
net/hns3: fix VF mailbox head field
net/hns3: support get device version when dump register
net/hns3: fix some packet types
net/hns3: fix missing outer L4 UDP flag for VXLAN
net/hns3: remove VLAN/QinQ ptypes from support list
test: check thread creation
common/dpaax: fix possible null pointer access
examples/ethtool: remove unused parsing
net/hns3: fix flow director lock
net/e1000/base: fix timeout for shadow RAM write
net/hns3: fix setting default MAC address in bonding of VF
net/hns3: fix possible mismatched response of mailbox
net/hns3: fix VF handling LSC event in secondary process
net/hns3: fix verification of NEON support
mbuf: check shared memory before dumping dynamic space
eventdev: remove redundant thread name setting
eventdev: fix memory leakage on thread creation failure
net/kni: check init result
net/hns3: fix mailbox error message
net/hns3: fix processing link status message on PF
net/hns3: remove unused mailbox macro and struct
net/bonding: fix leak on remove
net/hns3: fix handling link update
net/i40e: fix negative VEB index
net/i40e: remove redundant VSI check in Tx queue setup
net/virtio: fix getline memory leakage
net/hns3: log time delta in decimal format
net/hns3: fix time delta calculation
net/hns3: remove unused macros
net/hns3: fix vector Rx burst limitation
net/hns3: remove read when enabling TM QCN error event
net/hns3: remove unused VMDq code
net/hns3: increase readability in logs
raw/ntb: check SPAD user index
raw/ntb: check memory allocations
ipc: check malloc sync reply result
eal: fix service core list parsing
ipc: use monotonic clock
net/hns3: return error on PCI config write failure
net/hns3: fix log on flow director clear
net/hns3: clear hash map on flow director clear
net/hns3: fix querying flow director counter for out param
net/hns3: fix TM QCN error event report by MSI-X
net/hns3: fix mailbox message ID in log
net/hns3: fix secondary process request start/stop Rx/Tx
net/hns3: fix ordering in secondary process initialization
net/hns3: fail setting FEC if one bit mode is not supported
net/mlx4: fix secondary process initialization ordering
net/mlx5: fix secondary process initialization ordering
Ciara Loftus (1):
net/af_xdp: fix error handling during Rx queue setup
Ciara Power (2):
telemetry: fix race on callbacks list
test/crypto: fix return value of a skipped test
Conor Walsh (1):
examples/l3fwd: fix LPM IPv6 subnets
Cristian Dumitrescu (3):
table: fix actions with different data size
pipeline: fix instruction translation
pipeline: fix endianness conversions
Dapeng Yu (3):
net/igc: remove MTU setting limitation
net/e1000: remove MTU setting limitation
examples/packet_ordering: fix port configuration
David Christensen (1):
config/ppc: reduce number of cores and NUMA nodes
David Harton (1):
net/ena: fix releasing Tx ring mbufs
David Hunt (4):
test/power: fix CPU frequency check
test/power: add turbo mode to frequency check
test/power: fix low frequency test when turbo enabled
test/power: fix turbo test
David Marchand (18):
doc: fix sphinx rtd theme import in GHA
service: clean references to removed symbol
eal: fix evaluation of log level option
ci: hook to GitHub Actions
ci: enable v21 ABI checks
ci: fix package installation in GitHub Actions
ci: ignore APT update failure in GitHub Actions
ci: catch coredumps
vhost: fix offload flags in Rx path
bus/fslmc: remove unused debug macro
eal: fix leak in shared lib mode detection
event/dpaa2: remove unused macros
net/ice/base: fix memory allocation wrapper
net/ice: fix leak on thread termination
devtools: fix orphan symbols check with busybox
net/vhost: restore pseudo TSO support
net/ark: fix leak on thread termination
build: fix drivers selection without Python
Dekel Peled (1):
common/mlx5: fix DevX read output buffer size
Dmitry Kozlyuk (4):
net/pcap: fix format string
eal/windows: add missing SPDX license tag
buildtools: fix all drivers disabled on Windows
examples/rxtx_callbacks: fix port ID format specifier
Ed Czeck (2):
net/ark: update packet director initial state
net/ark: refactor Rx buffer recovery
Elad Nachman (2):
kni: support async user request
kni: fix kernel deadlock with bifurcated device
Feifei Wang (2):
net/i40e: fix parsing packet type for NEON
test/trace: fix race on collected perf data
Ferruh Yigit (9):
power: remove duplicated symbols from map file
log/linux: make default output stderr
license: fix typos
drivers/net: fix FW version query
net/bnx2x: fix build with GCC 11
net/bnx2x: fix build with GCC 11
net/ice/base: fix build with GCC 11
net/tap: fix build with GCC 11
test/table: fix build with GCC 11
Gregory Etelson (2):
app/testpmd: fix tunnel offload flows cleanup
net/mlx5: fix tunnel offload private items location
Guoyang Zhou (1):
net/hinic: fix crash in secondary process
Haiyue Wang (1):
net/ixgbe: fix Rx errors statistics for UDP checksum
Harman Kalra (1):
event/octeontx2: fix device reconfigure for single slot
Heinrich Kuhn (1):
net/nfp: fix reporting of RSS capabilities
Hemant Agrawal (3):
ethdev: add missing buses in device iterator
crypto/dpaa_sec: affine the thread portal affinity
crypto/dpaa2_sec: fix close and uninit functions
Hongbo Zheng (9):
app/testpmd: fix Tx/Rx descriptor query error log
net/hns3: fix FLR miss detection
net/hns3: delete redundant blank line
bpf: fix JSLT validation
common/sfc_efx/base: fix dereferencing null pointer
power: fix sanity checks for guest channel read
net/hns3: fix VF alive notification after config restore
examples/l3fwd-power: fix empty poll thresholds
net/hns3: fix concurrent interrupt handling
Huisong Li (23):
net/hns3: fix device capabilities for copper media type
net/hns3: remove unused parameter markers
net/hns3: fix reporting undefined speed
net/hns3: fix link update when failed to get link info
net/hns3: fix flow control exception
app/testpmd: fix bitmap of link speeds when force speed
net/hns3: fix flow control mode
net/hns3: remove redundant mailbox response
net/hns3: fix DCB mode check
net/hns3: fix VMDq mode check
net/hns3: fix mbuf leakage
net/hns3: fix link status when port is stopped
net/hns3: fix link speed when port is down
app/testpmd: fix forward lcores number for DCB
app/testpmd: fix DCB forwarding configuration
app/testpmd: fix DCB re-configuration
app/testpmd: verify DCB config during forward config
net/hns3: fix Rx/Tx queue numbers check
net/hns3: fix requested FC mode rollback
net/hns3: remove meaningless packet buffer rollback
net/hns3: fix DCB configuration
net/hns3: fix DCB reconfiguration
net/hns3: fix link speed when VF device is down
Ibtisam Tariq (1):
examples/vhost_crypto: remove unused short option
Igor Chauskin (2):
net/ena: switch memcpy to optimized version
net/ena: fix parsing of large LLQ header device argument
Igor Russkikh (2):
net/qede: reduce log verbosity
net/qede: accept bigger RSS table
Ilya Maximets (1):
net/virtio: fix interrupt unregistering for listening socket
Ivan Malov (5):
net/sfc: fix buffer size for flow parse
net: fix comment in IPv6 header
net/sfc: fix error path inconsistency
common/sfc_efx/base: fix indication of MAE encap support
net/sfc: fix outer rule rollback on error
Jerin Jacob (1):
examples: fix pkg-config override
Jiawei Wang (4):
app/testpmd: fix NVGRE encap configuration
net/mlx5: fix resource release for mirror flow
net/mlx5: fix RSS flow item expansion for GRE key
net/mlx5: fix RSS flow item expansion for NVGRE
Jiawei Zhu (1):
net/mlx5: fix Rx segmented packets on mbuf starvation
Jiawen Wu (4):
net/txgbe: remove unused functions
net/txgbe: fix Rx missed packet counter
net/txgbe: update packet type
net/txgbe: fix QinQ strip
Jiayu Hu (2):
vhost: fix queue initialization
vhost: fix redundant vring status change notification
Jie Wang (1):
net/ice: fix VSI array out of bounds access
John Daley (2):
net/enic: fix flow initialization error handling
net/enic: enable GENEVE offload via VNIC configuration
Juraj Linkeš (1):
eal/arm64: fix platform register bit
Kai Ji (2):
test/crypto: fix auth-cipher compare length in OOP
test/crypto: copy offset data to OOP destination buffer
Kalesh AP (23):
net/bnxt: remove unused macro
net/bnxt: fix VNIC configuration
net/bnxt: fix firmware fatal error handling
net/bnxt: fix FW readiness check during recovery
net/bnxt: fix device readiness check
net/bnxt: fix VF info allocation
net/bnxt: fix HWRM and FW incompatibility handling
net/bnxt: mute some failure logs
app/testpmd: check MAC address query
net/bnxt: fix PCI write check
net/bnxt: fix link state operations
net/bnxt: fix timesync when PTP is not supported
net/bnxt: fix memory allocation for command response
net/bnxt: fix double free in port start failure
net/bnxt: fix configuring LRO
net/bnxt: fix health check alarm cancellation
net/bnxt: fix PTP support for Thor
net/bnxt: fix ring count calculation for Thor
net/bnxt: remove unnecessary forward declarations
net/bnxt: remove unused function parameters
net/bnxt: drop unused attribute
net/bnxt: fix single PF per port check
net/bnxt: prevent device access in error state
Kamil Vojanec (1):
net/mlx5/linux: fix firmware version
Kevin Traynor (5):
test/cmdline: fix inputs array
test/crypto: fix build with GCC 11
crypto/zuc: fix build with GCC 11
test: fix build with GCC 11
test/cmdline: silence clang 12 warning
Konstantin Ananyev (1):
acl: fix build with GCC 11
Lance Richardson (8):
net/bnxt: fix Rx buffer posting
net/bnxt: fix Tx length hint threshold
net/bnxt: fix handling of null flow mask
test: fix TCP header initialization
net/bnxt: fix Rx descriptor status
net/bnxt: fix Rx queue count
net/bnxt: fix dynamic VNIC count
eal: fix memory mapping on 32-bit target
Leyi Rong (1):
net/iavf: fix packet length parsing in AVX512
Li Zhang (1):
net/mlx5: fix flow actions index in cache
Luc Pelletier (2):
eal: fix race in control thread creation
eal: fix hang in control thread creation
Marvin Liu (5):
vhost: fix split ring potential buffer overflow
vhost: fix packed ring potential buffer overflow
vhost: fix batch dequeue potential buffer overflow
vhost: fix initialization of temporary header
vhost: fix initialization of async temporary header
Matan Azrad (5):
common/mlx5/linux: add glue function to query WQ
common/mlx5: add DevX command to query WQ
common/mlx5: add DevX commands for queue counters
vdpa/mlx5: fix virtq cleaning
vdpa/mlx5: fix device unplug
Michael Baum (1):
net/mlx5: fix flow age event triggering
Michal Krawczyk (5):
net/ena/base: improve style and comments
net/ena/base: fix type conversions by explicit casting
net/ena/base: destroy multiple wait events
net/ena: fix crash with unsupported device argument
net/ena: indicate Rx RSS hash presence
Min Hu (Connor) (25):
net/hns3: fix MTU config complexity
net/hns3: update HiSilicon copyright syntax
net/hns3: fix copyright date
examples/ptpclient: remove wrong comment
test/bpf: fix error message
doc: fix HiSilicon copyright syntax
net/hns3: remove unused macros
net/hns3: remove unused macro
app/eventdev: fix overflow in lcore list parsing
test/kni: fix a comment
test/kni: check init result
net/hns3: fix typos on comments
net/e1000: fix flow error message object
app/testpmd: fix division by zero on socket memory dump
net/kni: warn on stop failure
app/bbdev: check memory allocation
app/bbdev: fix HARQ error messages
raw/skeleton: add missing check after setting attribute
test/timer: check memzone allocation
app/crypto-perf: check memory allocation
examples/flow_classify: fix NUMA check of port and core
examples/l2fwd-cat: fix NUMA check of port and core
examples/skeleton: fix NUMA check of port and core
test: check flow classifier creation
test: fix division by zero
Murphy Yang (3):
net/ixgbe: fix RSS RETA being reset after port start
net/i40e: fix flow director config after flow validate
net/i40e: fix flow director for common pctypes
Natanael Copa (5):
common/dpaax/caamflib: fix build with musl
bus/dpaa: fix 64-bit arch detection
bus/dpaa: fix build with musl
net/cxgbe: remove use of uint type
app/testpmd: fix build with musl
Nipun Gupta (1):
bus/dpaa: fix statistics reading
Nithin Dabilpuram (3):
vfio: do not merge contiguous areas
vfio: fix DMA mapping granularity for IOVA as VA
test/mem: fix page size for external memory
Olivier Matz (1):
test/mempool: fix object initializer
Pallavi Kadam (1):
bus/pci: skip probing some Windows NDIS devices
Pavan Nikhilesh (4):
test/event: fix timeout accuracy
app/eventdev: fix timeout accuracy
app/eventdev: fix lcore parsing skipping last core
event/octeontx2: fix XAQ pool reconfigure
Pu Xu (1):
ip_frag: fix fragmenting IPv4 packet with header option
Qi Zhang (8):
net/ice/base: fix payload indicator on ptype
net/ice/base: fix uninitialized struct
net/ice/base: cleanup filter list on error
net/ice/base: fix memory allocation for MAC addresses
net/iavf: fix TSO max segment size
doc: fix matching versions in ice guide
net/iavf: fix wrong Tx context descriptor
common/iavf: fix duplicated offload bit
Radha Mohan Chintakuntla (1):
raw/octeontx2_dma: assign PCI device in DPI VF
Raslan Darawsheh (1):
ethdev: update flow item GTP QFI definition
Richael Zhuang (2):
test/power: add delay before checking CPU frequency
test/power: round CPU frequency to check
Robin Zhang (6):
net/i40e: announce request queue capability in PF
doc: update recommended versions for i40e
net/i40e: fix lack of MAC type when set MAC address
net/iavf: fix lack of MAC type when set MAC address
net/iavf: fix primary MAC type when starting port
net/i40e: fix primary MAC type when starting port
Rohit Raj (3):
net/dpaa2: fix getting link status
net/dpaa: fix getting link status
examples/l2fwd-crypto: fix packet length while decryption
Roy Shterman (1):
mem: fix freeing segments in --huge-unlink mode
Satheesh Paul (1):
net/octeontx2: fix VLAN filter
Savinay Dharmappa (1):
sched: fix traffic class oversubscription parameter
Shijith Thotton (3):
eventdev: fix case to initiate crypto adapter service
event/octeontx2: fix crypto adapter queue pair operations
event/octeontx2: configure crypto adapter xaq pool
Siwar Zitouni (1):
net/ice: fix disabling promiscuous mode
Somnath Kotur (5):
net/bnxt: fix xstats get
net/bnxt: fix Rx and Tx timestamps
net/bnxt: fix Tx timestamp init
net/bnxt: refactor multi-queue Rx configuration
net/bnxt: fix Rx timestamp when FIFO pending bit is set
Stanislaw Kardach (6):
test: proceed if timer subsystem already initialized
stack: allow lock-free only on relevant architectures
test/distributor: fix worker notification in burst mode
test/distributor: fix burst flush on worker quit
net/ena: remove endian swap functions
net/ena: report default ring size
Stephen Hemminger (2):
kni: refactor user request processing
net/bnxt: use prefix on global function
Suanming Mou (1):
net/mlx5: fix counter offset detection
Tal Shnaiderman (2):
eal/windows: fix default thread priority
eal/windows: fix return codes of pthread shim layer
Tengfei Zhang (1):
net/pcap: fix file descriptor leak on close
Thinh Tran (1):
test: fix autotest handling of skipped tests
Thomas Monjalon (18):
bus/pci: fix Windows kernel driver categories
eal: fix comment of OS-specific header files
buildtools: fix build with busybox
build: detect execinfo library on Linux
build: remove redundant _GNU_SOURCE definitions
eal: fix build with musl
net/igc: remove use of uint type
event/dlb: fix header includes for musl
examples/bbdev: fix header include for musl
drivers: fix log level after loading
app/regex: fix usage text
app/testpmd: fix usage text
doc: fix names of UIO drivers
doc: fix build with Sphinx 4
bus/pci: support I/O port operations with musl
app: fix exit messages
regex/octeontx2: remove unused include directory
doc: remove PDF requirements
Tianyu Li (1):
net/memif: fix Tx bps statistics for zero-copy
Timothy McDaniel (2):
event/dlb2: remove references to deferred scheduling
doc: fix runtime options in DLB2 guide
Tyler Retzlaff (1):
eal: add C++ include guard for reciprocal header
Vadim Podovinnikov (1):
net/bonding: fix LACP system address check
Venkat Duvvuru (1):
net/bnxt: fix queues per VNIC
Viacheslav Ovsiienko (16):
net/mlx5: fix external buffer pool registration for Rx queue
net/mlx5: fix metadata item validation for ingress flows
net/mlx5: fix hashed list size for tunnel flow groups
net/mlx5: fix UAR allocation diagnostics messages
common/mlx5: add timestamp format support to DevX
vdpa/mlx5: support timestamp format
net/mlx5: fix Rx metadata leftovers
net/mlx5: fix drop action for Direct Rules/Verbs
net/mlx4: fix RSS action with null hash key
net/mlx5: support timestamp format
regex/mlx5: support timestamp format
app/testpmd: fix segment number check
net/mlx5: remove drop queue function prototypes
net/mlx4: fix buffer leakage on device close
net/mlx5: fix probing device in legacy bonding mode
net/mlx5: fix receiving queue timestamp format
Wei Huang (1):
raw/ifpga: fix device name format
Wenjun Wu (3):
net/ice: check some functions return
net/ice: fix RSS hash update
net/ice: fix RSS for L2 packet
Wenwu Ma (1):
net/ice: fix illegal access when removing MAC filter
Wenzhuo Lu (2):
net/iavf: fix crash in AVX512
net/ice: fix crash in AVX512
Wisam Jaddo (1):
app/flow-perf: fix encap/decap actions
Xiao Wang (1):
vdpa/ifc: check PCI config read
Xiaoyu Min (4):
net/mlx5: support RSS expansion for IPv6 GRE
net/mlx5: fix shared inner RSS
net/mlx5: fix missing shared RSS hash types
net/mlx5: fix redundant flow after RSS expansion
Xiaoyun Li (2):
app/testpmd: remove unnecessary UDP tunnel check
net/i40e: fix IPv4 fragment offload
Xueming Li (2):
version: 20.11.2-rc1
net/virtio: fix vectorized Rx queue rearm
Youri Querry (1):
bus/fslmc: fix random portal hangs with qbman 5.0
Yunjian Wang (5):
vfio: fix API description
net/mlx5: fix using flow tunnel before null check
vfio: fix duplicated user mem map
net/mlx4: fix leak when configured repeatedly
net/mlx5: fix leak when configured repeatedly
^ permalink raw reply [relevance 1%]
* [dpdk-dev] 20.11.2 patches review and test
@ 2021-06-26 15:41 1% Xueming(Steven) Li
0 siblings, 0 replies; 200+ results
From: Xueming(Steven) Li @ 2021-06-26 15:41 UTC (permalink / raw)
To: stable
Cc: dev, Abhishek Marathe, Akhil Goyal, Ali Alnubani,
benjamin.walker, David Christensen, hariprasad.govindharajan,
Hemant Agrawal, Ian Stokes, Jerin Jacob, John McNamara,
Ju-Hyoung Lee, Kevin Traynor, Luca Boccassi, Pei Zhang, pingx.yu,
qian.q.xu, Raslan Darawsheh, NBU-Contact-Thomas Monjalon,
yuan.peng, zhaoyan.chen
Hi all,
Here is a list of patches targeted for stable release 20.11.2.
The planned date for the final release is 6th July.
Please help with testing and validation of your use cases and report
any issues/results with reply-all to this mail. For the final release
the fixes and reported validations will be added to the release notes.
A release candidate tarball can be found at:
https://dpdk.org/browse/dpdk-stable/tag/?id=v20.11.2-rc2
These patches are located at branch 20.11 of dpdk-stable repo:
https://dpdk.org/browse/dpdk-stable/
Thanks.
Xueming Li <xuemingl@nvidia.com>
---
Adam Dybkowski (3):
common/qat: increase IM buffer size for GEN3
compress/qat: enable compression on GEN3
crypto/qat: fix null authentication request
Ajit Khaparde (7):
net/bnxt: fix RSS context cleanup
net/bnxt: check kvargs parsing
net/bnxt: fix resource cleanup
doc: fix formatting in testpmd guide
net/bnxt: fix mismatched type comparison in MAC restore
net/bnxt: check PCI config read
net/bnxt: fix mismatched type comparison in Rx
Alvin Zhang (11):
net/ice: fix VLAN filter with PF
net/i40e: fix input set field mask
net/igc: fix Rx RSS hash offload capability
net/igc: fix Rx error counter for bad length
net/e1000: fix Rx error counter for bad length
net/e1000: fix max Rx packet size
net/igc: fix Rx packet size
net/ice: fix fast mbuf freeing
net/iavf: fix VF to PF command failure handling
net/i40e: fix VF RSS configuration
net/igc: fix speed configuration
Anatoly Burakov (3):
fbarray: fix log message on truncation error
power: do not skip saving original P-state governor
power: save original ACPI governor always
Andrew Boyer (1):
net/ionic: fix completion type in lif init
Andrew Rybchenko (4):
net/failsafe: fix RSS hash offload reporting
net/failsafe: report minimum and maximum MTU
common/sfc_efx: remove GENEVE from supported tunnels
net/sfc: fix mark support in EF100 native Rx datapath
Andy Moreton (2):
common/sfc_efx/base: limit reported MCDI response length
common/sfc_efx/base: add missing MCDI response length checks
Ankur Dwivedi (1):
crypto/octeontx: fix session-less mode
Apeksha Gupta (1):
examples/l2fwd-crypto: skip masked devices
Arek Kusztal (1):
crypto/qat: fix offset for out-of-place scatter-gather
Beilei Xing (1):
net/i40evf: fix packet loss for X722
Bing Zhao (1):
net/mlx5: fix loopback for Direct Verbs queue
Bruce Richardson (2):
build: exclude meson files from examples installation
raw/ioat: fix script for configuring small number of queues
Chaoyong He (1):
doc: fix multiport syntax in nfp guide
Chenbo Xia (1):
examples/vhost: check memory table query
Chengchang Tang (20):
net/hns3: fix HW buffer size on MTU update
net/hns3: fix processing Tx offload flags
net/hns3: fix Tx checksum for UDP packets with special port
net/hns3: fix long task queue pairs reset time
ethdev: validate input in module EEPROM dump
ethdev: validate input in register info
ethdev: validate input in EEPROM info
net/hns3: fix rollback after setting PVID failure
net/hns3: fix timing in resetting queues
net/hns3: fix queue state when concurrent with reset
net/hns3: fix configure FEC when concurrent with reset
net/hns3: fix use of command status enumeration
examples: add eal cleanup to examples
net/bonding: fix adding itself as its slave
net/hns3: fix timing in mailbox
app/testpmd: fix max queue number for Tx offloads
net/tap: fix interrupt vector array size
net/bonding: fix socket ID check
net/tap: check ioctl on restore
examples/timer: fix time interval
Chengwen Feng (50):
net/hns3: fix flow counter value
net/hns3: fix VF mailbox head field
net/hns3: support get device version when dump register
net/hns3: fix some packet types
net/hns3: fix missing outer L4 UDP flag for VXLAN
net/hns3: remove VLAN/QinQ ptypes from support list
test: check thread creation
common/dpaax: fix possible null pointer access
examples/ethtool: remove unused parsing
net/hns3: fix flow director lock
net/e1000/base: fix timeout for shadow RAM write
net/hns3: fix setting default MAC address in bonding of VF
net/hns3: fix possible mismatched response of mailbox
net/hns3: fix VF handling LSC event in secondary process
net/hns3: fix verification of NEON support
mbuf: check shared memory before dumping dynamic space
eventdev: remove redundant thread name setting
eventdev: fix memory leakage on thread creation failure
net/kni: check init result
net/hns3: fix mailbox error message
net/hns3: fix processing link status message on PF
net/hns3: remove unused mailbox macro and struct
net/bonding: fix leak on remove
net/hns3: fix handling link update
net/i40e: fix negative VEB index
net/i40e: remove redundant VSI check in Tx queue setup
net/virtio: fix getline memory leakage
net/hns3: log time delta in decimal format
net/hns3: fix time delta calculation
net/hns3: remove unused macros
net/hns3: fix vector Rx burst limitation
net/hns3: remove read when enabling TM QCN error event
net/hns3: remove unused VMDq code
net/hns3: increase readability in logs
raw/ntb: check SPAD user index
raw/ntb: check memory allocations
ipc: check malloc sync reply result
eal: fix service core list parsing
ipc: use monotonic clock
net/hns3: return error on PCI config write failure
net/hns3: fix log on flow director clear
net/hns3: clear hash map on flow director clear
net/hns3: fix querying flow director counter for out param
net/hns3: fix TM QCN error event report by MSI-X
net/hns3: fix mailbox message ID in log
net/hns3: fix secondary process request start/stop Rx/Tx
net/hns3: fix ordering in secondary process initialization
net/hns3: fail setting FEC if one bit mode is not supported
net/mlx4: fix secondary process initialization ordering
net/mlx5: fix secondary process initialization ordering
Ciara Loftus (1):
net/af_xdp: fix error handling during Rx queue setup
Ciara Power (2):
telemetry: fix race on callbacks list
test/crypto: fix return value of a skipped test
Conor Walsh (1):
examples/l3fwd: fix LPM IPv6 subnets
Cristian Dumitrescu (3):
table: fix actions with different data size
pipeline: fix instruction translation
pipeline: fix endianness conversions
Dapeng Yu (3):
net/igc: remove MTU setting limitation
net/e1000: remove MTU setting limitation
examples/packet_ordering: fix port configuration
David Christensen (1):
config/ppc: reduce number of cores and NUMA nodes
David Harton (1):
net/ena: fix releasing Tx ring mbufs
David Hunt (4):
test/power: fix CPU frequency check
test/power: add turbo mode to frequency check
test/power: fix low frequency test when turbo enabled
test/power: fix turbo test
David Marchand (18):
doc: fix sphinx rtd theme import in GHA
service: clean references to removed symbol
eal: fix evaluation of log level option
ci: hook to GitHub Actions
ci: enable v21 ABI checks
ci: fix package installation in GitHub Actions
ci: ignore APT update failure in GitHub Actions
ci: catch coredumps
vhost: fix offload flags in Rx path
bus/fslmc: remove unused debug macro
eal: fix leak in shared lib mode detection
event/dpaa2: remove unused macros
net/ice/base: fix memory allocation wrapper
net/ice: fix leak on thread termination
devtools: fix orphan symbols check with busybox
net/vhost: restore pseudo TSO support
net/ark: fix leak on thread termination
build: fix drivers selection without Python
Dekel Peled (1):
common/mlx5: fix DevX read output buffer size
Dmitry Kozlyuk (4):
net/pcap: fix format string
eal/windows: add missing SPDX license tag
buildtools: fix all drivers disabled on Windows
examples/rxtx_callbacks: fix port ID format specifier
Ed Czeck (2):
net/ark: update packet director initial state
net/ark: refactor Rx buffer recovery
Elad Nachman (2):
kni: support async user request
kni: fix kernel deadlock with bifurcated device
Feifei Wang (2):
net/i40e: fix parsing packet type for NEON
test/trace: fix race on collected perf data
Ferruh Yigit (9):
power: remove duplicated symbols from map file
log/linux: make default output stderr
license: fix typos
drivers/net: fix FW version query
net/bnx2x: fix build with GCC 11
net/bnx2x: fix build with GCC 11
net/ice/base: fix build with GCC 11
net/tap: fix build with GCC 11
test/table: fix build with GCC 11
Gregory Etelson (2):
app/testpmd: fix tunnel offload flows cleanup
net/mlx5: fix tunnel offload private items location
Guoyang Zhou (1):
net/hinic: fix crash in secondary process
Haiyue Wang (1):
net/ixgbe: fix Rx errors statistics for UDP checksum
Harman Kalra (1):
event/octeontx2: fix device reconfigure for single slot
Heinrich Kuhn (1):
net/nfp: fix reporting of RSS capabilities
Hemant Agrawal (3):
ethdev: add missing buses in device iterator
crypto/dpaa_sec: affine the thread portal affinity
crypto/dpaa2_sec: fix close and uninit functions
Hongbo Zheng (9):
app/testpmd: fix Tx/Rx descriptor query error log
net/hns3: fix FLR miss detection
net/hns3: delete redundant blank line
bpf: fix JSLT validation
common/sfc_efx/base: fix dereferencing null pointer
power: fix sanity checks for guest channel read
net/hns3: fix VF alive notification after config restore
examples/l3fwd-power: fix empty poll thresholds
net/hns3: fix concurrent interrupt handling
Huisong Li (23):
net/hns3: fix device capabilities for copper media type
net/hns3: remove unused parameter markers
net/hns3: fix reporting undefined speed
net/hns3: fix link update when failed to get link info
net/hns3: fix flow control exception
app/testpmd: fix bitmap of link speeds when force speed
net/hns3: fix flow control mode
net/hns3: remove redundant mailbox response
net/hns3: fix DCB mode check
net/hns3: fix VMDq mode check
net/hns3: fix mbuf leakage
net/hns3: fix link status when port is stopped
net/hns3: fix link speed when port is down
app/testpmd: fix forward lcores number for DCB
app/testpmd: fix DCB forwarding configuration
app/testpmd: fix DCB re-configuration
app/testpmd: verify DCB config during forward config
net/hns3: fix Rx/Tx queue numbers check
net/hns3: fix requested FC mode rollback
net/hns3: remove meaningless packet buffer rollback
net/hns3: fix DCB configuration
net/hns3: fix DCB reconfiguration
net/hns3: fix link speed when VF device is down
Ibtisam Tariq (1):
examples/vhost_crypto: remove unused short option
Igor Chauskin (2):
net/ena: switch memcpy to optimized version
net/ena: fix parsing of large LLQ header device argument
Igor Russkikh (2):
net/qede: reduce log verbosity
net/qede: accept bigger RSS table
Ilya Maximets (1):
net/virtio: fix interrupt unregistering for listening socket
Ivan Malov (5):
net/sfc: fix buffer size for flow parse
net: fix comment in IPv6 header
net/sfc: fix error path inconsistency
common/sfc_efx/base: fix indication of MAE encap support
net/sfc: fix outer rule rollback on error
Jerin Jacob (1):
examples: fix pkg-config override
Jiawei Wang (4):
app/testpmd: fix NVGRE encap configuration
net/mlx5: fix resource release for mirror flow
net/mlx5: fix RSS flow item expansion for GRE key
net/mlx5: fix RSS flow item expansion for NVGRE
Jiawei Zhu (1):
net/mlx5: fix Rx segmented packets on mbuf starvation
Jiawen Wu (4):
net/txgbe: remove unused functions
net/txgbe: fix Rx missed packet counter
net/txgbe: update packet type
net/txgbe: fix QinQ strip
Jiayu Hu (2):
vhost: fix queue initialization
vhost: fix redundant vring status change notification
Jie Wang (1):
net/ice: fix VSI array out of bounds access
John Daley (2):
net/enic: fix flow initialization error handling
net/enic: enable GENEVE offload via VNIC configuration
Juraj Linkeš (1):
eal/arm64: fix platform register bit
Kai Ji (2):
test/crypto: fix auth-cipher compare length in OOP
test/crypto: copy offset data to OOP destination buffer
Kalesh AP (23):
net/bnxt: remove unused macro
net/bnxt: fix VNIC configuration
net/bnxt: fix firmware fatal error handling
net/bnxt: fix FW readiness check during recovery
net/bnxt: fix device readiness check
net/bnxt: fix VF info allocation
net/bnxt: fix HWRM and FW incompatibility handling
net/bnxt: mute some failure logs
app/testpmd: check MAC address query
net/bnxt: fix PCI write check
net/bnxt: fix link state operations
net/bnxt: fix timesync when PTP is not supported
net/bnxt: fix memory allocation for command response
net/bnxt: fix double free in port start failure
net/bnxt: fix configuring LRO
net/bnxt: fix health check alarm cancellation
net/bnxt: fix PTP support for Thor
net/bnxt: fix ring count calculation for Thor
net/bnxt: remove unnecessary forward declarations
net/bnxt: remove unused function parameters
net/bnxt: drop unused attribute
net/bnxt: fix single PF per port check
net/bnxt: prevent device access in error state
Kamil Vojanec (1):
net/mlx5/linux: fix firmware version
Kevin Traynor (5):
test/cmdline: fix inputs array
test/crypto: fix build with GCC 11
crypto/zuc: fix build with GCC 11
test: fix build with GCC 11
test/cmdline: silence clang 12 warning
Konstantin Ananyev (1):
acl: fix build with GCC 11
Lance Richardson (8):
net/bnxt: fix Rx buffer posting
net/bnxt: fix Tx length hint threshold
net/bnxt: fix handling of null flow mask
test: fix TCP header initialization
net/bnxt: fix Rx descriptor status
net/bnxt: fix Rx queue count
net/bnxt: fix dynamic VNIC count
eal: fix memory mapping on 32-bit target
Leyi Rong (1):
net/iavf: fix packet length parsing in AVX512
Li Zhang (1):
net/mlx5: fix flow actions index in cache
Luc Pelletier (2):
eal: fix race in control thread creation
eal: fix hang in control thread creation
Marvin Liu (5):
vhost: fix split ring potential buffer overflow
vhost: fix packed ring potential buffer overflow
vhost: fix batch dequeue potential buffer overflow
vhost: fix initialization of temporary header
vhost: fix initialization of async temporary header
Matan Azrad (5):
common/mlx5/linux: add glue function to query WQ
common/mlx5: add DevX command to query WQ
common/mlx5: add DevX commands for queue counters
vdpa/mlx5: fix virtq cleaning
vdpa/mlx5: fix device unplug
Michael Baum (1):
net/mlx5: fix flow age event triggering
Michal Krawczyk (5):
net/ena/base: improve style and comments
net/ena/base: fix type conversions by explicit casting
net/ena/base: destroy multiple wait events
net/ena: fix crash with unsupported device argument
net/ena: indicate Rx RSS hash presence
Min Hu (Connor) (25):
net/hns3: fix MTU config complexity
net/hns3: update HiSilicon copyright syntax
net/hns3: fix copyright date
examples/ptpclient: remove wrong comment
test/bpf: fix error message
doc: fix HiSilicon copyright syntax
net/hns3: remove unused macros
net/hns3: remove unused macro
app/eventdev: fix overflow in lcore list parsing
test/kni: fix a comment
test/kni: check init result
net/hns3: fix typos on comments
net/e1000: fix flow error message object
app/testpmd: fix division by zero on socket memory dump
net/kni: warn on stop failure
app/bbdev: check memory allocation
app/bbdev: fix HARQ error messages
raw/skeleton: add missing check after setting attribute
test/timer: check memzone allocation
app/crypto-perf: check memory allocation
examples/flow_classify: fix NUMA check of port and core
examples/l2fwd-cat: fix NUMA check of port and core
examples/skeleton: fix NUMA check of port and core
test: check flow classifier creation
test: fix division by zero
Murphy Yang (3):
net/ixgbe: fix RSS RETA being reset after port start
net/i40e: fix flow director config after flow validate
net/i40e: fix flow director for common pctypes
Natanael Copa (5):
common/dpaax/caamflib: fix build with musl
bus/dpaa: fix 64-bit arch detection
bus/dpaa: fix build with musl
net/cxgbe: remove use of uint type
app/testpmd: fix build with musl
Nipun Gupta (1):
bus/dpaa: fix statistics reading
Nithin Dabilpuram (3):
vfio: do not merge contiguous areas
vfio: fix DMA mapping granularity for IOVA as VA
test/mem: fix page size for external memory
Olivier Matz (1):
test/mempool: fix object initializer
Pallavi Kadam (1):
bus/pci: skip probing some Windows NDIS devices
Pavan Nikhilesh (4):
test/event: fix timeout accuracy
app/eventdev: fix timeout accuracy
app/eventdev: fix lcore parsing skipping last core
event/octeontx2: fix XAQ pool reconfigure
Pu Xu (1):
ip_frag: fix fragmenting IPv4 packet with header option
Qi Zhang (8):
net/ice/base: fix payload indicator on ptype
net/ice/base: fix uninitialized struct
net/ice/base: cleanup filter list on error
net/ice/base: fix memory allocation for MAC addresses
net/iavf: fix TSO max segment size
doc: fix matching versions in ice guide
net/iavf: fix wrong Tx context descriptor
common/iavf: fix duplicated offload bit
Radha Mohan Chintakuntla (1):
raw/octeontx2_dma: assign PCI device in DPI VF
Raslan Darawsheh (1):
ethdev: update flow item GTP QFI definition
Richael Zhuang (2):
test/power: add delay before checking CPU frequency
test/power: round CPU frequency to check
Robin Zhang (6):
net/i40e: announce request queue capability in PF
doc: update recommended versions for i40e
net/i40e: fix lack of MAC type when set MAC address
net/iavf: fix lack of MAC type when set MAC address
net/iavf: fix primary MAC type when starting port
net/i40e: fix primary MAC type when starting port
Rohit Raj (3):
net/dpaa2: fix getting link status
net/dpaa: fix getting link status
examples/l2fwd-crypto: fix packet length while decryption
Roy Shterman (1):
mem: fix freeing segments in --huge-unlink mode
Satheesh Paul (1):
net/octeontx2: fix VLAN filter
Savinay Dharmappa (1):
sched: fix traffic class oversubscription parameter
Shijith Thotton (3):
eventdev: fix case to initiate crypto adapter service
event/octeontx2: fix crypto adapter queue pair operations
event/octeontx2: configure crypto adapter xaq pool
Siwar Zitouni (1):
net/ice: fix disabling promiscuous mode
Somnath Kotur (5):
net/bnxt: fix xstats get
net/bnxt: fix Rx and Tx timestamps
net/bnxt: fix Tx timestamp init
net/bnxt: refactor multi-queue Rx configuration
net/bnxt: fix Rx timestamp when FIFO pending bit is set
Stanislaw Kardach (6):
test: proceed if timer subsystem already initialized
stack: allow lock-free only on relevant architectures
test/distributor: fix worker notification in burst mode
test/distributor: fix burst flush on worker quit
net/ena: remove endian swap functions
net/ena: report default ring size
Stephen Hemminger (2):
kni: refactor user request processing
net/bnxt: use prefix on global function
Suanming Mou (1):
net/mlx5: fix counter offset detection
Tal Shnaiderman (2):
eal/windows: fix default thread priority
eal/windows: fix return codes of pthread shim layer
Tengfei Zhang (1):
net/pcap: fix file descriptor leak on close
Thinh Tran (1):
test: fix autotest handling of skipped tests
Thomas Monjalon (18):
bus/pci: fix Windows kernel driver categories
eal: fix comment of OS-specific header files
buildtools: fix build with busybox
build: detect execinfo library on Linux
build: remove redundant _GNU_SOURCE definitions
eal: fix build with musl
net/igc: remove use of uint type
event/dlb: fix header includes for musl
examples/bbdev: fix header include for musl
drivers: fix log level after loading
app/regex: fix usage text
app/testpmd: fix usage text
doc: fix names of UIO drivers
doc: fix build with Sphinx 4
bus/pci: support I/O port operations with musl
app: fix exit messages
regex/octeontx2: remove unused include directory
doc: remove PDF requirements
Tianyu Li (1):
net/memif: fix Tx bps statistics for zero-copy
Timothy McDaniel (2):
event/dlb2: remove references to deferred scheduling
doc: fix runtime options in DLB2 guide
Tyler Retzlaff (1):
eal: add C++ include guard for reciprocal header
Vadim Podovinnikov (1):
net/bonding: fix LACP system address check
Venkat Duvvuru (1):
net/bnxt: fix queues per VNIC
Viacheslav Ovsiienko (16):
net/mlx5: fix external buffer pool registration for Rx queue
net/mlx5: fix metadata item validation for ingress flows
net/mlx5: fix hashed list size for tunnel flow groups
net/mlx5: fix UAR allocation diagnostics messages
common/mlx5: add timestamp format support to DevX
vdpa/mlx5: support timestamp format
net/mlx5: fix Rx metadata leftovers
net/mlx5: fix drop action for Direct Rules/Verbs
net/mlx4: fix RSS action with null hash key
net/mlx5: support timestamp format
regex/mlx5: support timestamp format
app/testpmd: fix segment number check
net/mlx5: remove drop queue function prototypes
net/mlx4: fix buffer leakage on device close
net/mlx5: fix probing device in legacy bonding mode
net/mlx5: fix receiving queue timestamp format
Wei Huang (1):
raw/ifpga: fix device name format
Wenjun Wu (3):
net/ice: check some functions return
net/ice: fix RSS hash update
net/ice: fix RSS for L2 packet
Wenwu Ma (1):
net/ice: fix illegal access when removing MAC filter
Wenzhuo Lu (2):
net/iavf: fix crash in AVX512
net/ice: fix crash in AVX512
Wisam Jaddo (1):
app/flow-perf: fix encap/decap actions
Xiao Wang (1):
vdpa/ifc: check PCI config read
Xiaoyu Min (4):
net/mlx5: support RSS expansion for IPv6 GRE
net/mlx5: fix shared inner RSS
net/mlx5: fix missing shared RSS hash types
net/mlx5: fix redundant flow after RSS expansion
Xiaoyun Li (2):
app/testpmd: remove unnecessary UDP tunnel check
net/i40e: fix IPv4 fragment offload
Xueming Li (2):
version: 20.11.2-rc1
net/virtio: fix vectorized Rx queue rearm
Youri Querry (1):
bus/fslmc: fix random portal hangs with qbman 5.0
Yunjian Wang (5):
vfio: fix API description
net/mlx5: fix using flow tunnel before null check
vfio: fix duplicated user mem map
net/mlx4: fix leak when configured repeatedly
net/mlx5: fix leak when configured repeatedly
^ permalink raw reply [relevance 1%]
* [dpdk-dev] [PATCH v2 4/7] power: remove thread safety from PMD power API's
2021-06-25 14:00 3% ` [dpdk-dev] [PATCH v2 1/7] power_intrinsics: use callbacks for comparison Anatoly Burakov
@ 2021-06-25 14:00 3% ` Anatoly Burakov
2 siblings, 0 replies; 200+ results
From: Anatoly Burakov @ 2021-06-25 14:00 UTC (permalink / raw)
To: dev, David Hunt; +Cc: ciara.loftus
Currently, we expect that only one callback can be active at any given
moment, for a particular queue configuration, which is relatively easy
to implement in a thread-safe way. However, we're about to add support
for multiple queues per lcore, which will greatly increase the
possibility of various race conditions.
We could have used something like an RCU for this use case, but absent
of a pressing need for thread safety we'll go the easy way and just
mandate that the API's are to be called when all affected ports are
stopped, and document this limitation. This greatly simplifies the
`rte_power_monitor`-related code.
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
Notes:
v2:
- Add check for stopped queue
- Clarified doc message
- Added release notes
doc/guides/rel_notes/release_21_08.rst | 5 +
lib/power/meson.build | 3 +
lib/power/rte_power_pmd_mgmt.c | 133 ++++++++++---------------
lib/power/rte_power_pmd_mgmt.h | 6 ++
4 files changed, 67 insertions(+), 80 deletions(-)
diff --git a/doc/guides/rel_notes/release_21_08.rst b/doc/guides/rel_notes/release_21_08.rst
index 9d1cfac395..f015c509fc 100644
--- a/doc/guides/rel_notes/release_21_08.rst
+++ b/doc/guides/rel_notes/release_21_08.rst
@@ -88,6 +88,11 @@ API Changes
* eal: the ``rte_power_intrinsics`` API changed to use a callback mechanism.
+* rte_power: The experimental PMD power management API is no longer considered
+ to be thread safe; all Rx queues affected by the API will now need to be
+ stopped before making any changes to the power management scheme.
+
+
ABI Changes
-----------
diff --git a/lib/power/meson.build b/lib/power/meson.build
index c1097d32f1..4f6a242364 100644
--- a/lib/power/meson.build
+++ b/lib/power/meson.build
@@ -21,4 +21,7 @@ headers = files(
'rte_power_pmd_mgmt.h',
'rte_power_guest_channel.h',
)
+if cc.has_argument('-Wno-cast-qual')
+ cflags += '-Wno-cast-qual'
+endif
deps += ['timer', 'ethdev']
diff --git a/lib/power/rte_power_pmd_mgmt.c b/lib/power/rte_power_pmd_mgmt.c
index db03cbf420..9b95cf1794 100644
--- a/lib/power/rte_power_pmd_mgmt.c
+++ b/lib/power/rte_power_pmd_mgmt.c
@@ -40,8 +40,6 @@ struct pmd_queue_cfg {
/**< Callback mode for this queue */
const struct rte_eth_rxtx_callback *cur_cb;
/**< Callback instance */
- volatile bool umwait_in_progress;
- /**< are we currently sleeping? */
uint64_t empty_poll_stats;
/**< Number of empty polls */
} __rte_cache_aligned;
@@ -92,30 +90,11 @@ clb_umwait(uint16_t port_id, uint16_t qidx, struct rte_mbuf **pkts __rte_unused,
struct rte_power_monitor_cond pmc;
uint16_t ret;
- /*
- * we might get a cancellation request while being
- * inside the callback, in which case the wakeup
- * wouldn't work because it would've arrived too early.
- *
- * to get around this, we notify the other thread that
- * we're sleeping, so that it can spin until we're done.
- * unsolicited wakeups are perfectly safe.
- */
- q_conf->umwait_in_progress = true;
-
- rte_atomic_thread_fence(__ATOMIC_SEQ_CST);
-
- /* check if we need to cancel sleep */
- if (q_conf->pwr_mgmt_state == PMD_MGMT_ENABLED) {
- /* use monitoring condition to sleep */
- ret = rte_eth_get_monitor_addr(port_id, qidx,
- &pmc);
- if (ret == 0)
- rte_power_monitor(&pmc, UINT64_MAX);
- }
- q_conf->umwait_in_progress = false;
-
- rte_atomic_thread_fence(__ATOMIC_SEQ_CST);
+ /* use monitoring condition to sleep */
+ ret = rte_eth_get_monitor_addr(port_id, qidx,
+ &pmc);
+ if (ret == 0)
+ rte_power_monitor(&pmc, UINT64_MAX);
}
} else
q_conf->empty_poll_stats = 0;
@@ -177,12 +156,24 @@ clb_scale_freq(uint16_t port_id, uint16_t qidx,
return nb_rx;
}
+static int
+queue_stopped(const uint16_t port_id, const uint16_t queue_id)
+{
+ struct rte_eth_rxq_info qinfo;
+
+ if (rte_eth_rx_queue_info_get(port_id, queue_id, &qinfo) < 0)
+ return -1;
+
+ return qinfo.queue_state == RTE_ETH_QUEUE_STATE_STOPPED;
+}
+
int
rte_power_ethdev_pmgmt_queue_enable(unsigned int lcore_id, uint16_t port_id,
uint16_t queue_id, enum rte_power_pmd_mgmt_type mode)
{
struct pmd_queue_cfg *queue_cfg;
struct rte_eth_dev_info info;
+ rte_rx_callback_fn clb;
int ret;
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
@@ -203,6 +194,14 @@ rte_power_ethdev_pmgmt_queue_enable(unsigned int lcore_id, uint16_t port_id,
goto end;
}
+ /* check if the queue is stopped */
+ ret = queue_stopped(port_id, queue_id);
+ if (ret != 1) {
+ /* error means invalid queue, 0 means queue wasn't stopped */
+ ret = ret < 0 ? -EINVAL : -EBUSY;
+ goto end;
+ }
+
queue_cfg = &port_cfg[port_id][queue_id];
if (queue_cfg->pwr_mgmt_state != PMD_MGMT_DISABLED) {
@@ -232,17 +231,7 @@ rte_power_ethdev_pmgmt_queue_enable(unsigned int lcore_id, uint16_t port_id,
ret = -ENOTSUP;
goto end;
}
- /* initialize data before enabling the callback */
- queue_cfg->empty_poll_stats = 0;
- queue_cfg->cb_mode = mode;
- queue_cfg->umwait_in_progress = false;
- queue_cfg->pwr_mgmt_state = PMD_MGMT_ENABLED;
-
- /* ensure we update our state before callback starts */
- rte_atomic_thread_fence(__ATOMIC_SEQ_CST);
-
- queue_cfg->cur_cb = rte_eth_add_rx_callback(port_id, queue_id,
- clb_umwait, NULL);
+ clb = clb_umwait;
break;
}
case RTE_POWER_MGMT_TYPE_SCALE:
@@ -269,16 +258,7 @@ rte_power_ethdev_pmgmt_queue_enable(unsigned int lcore_id, uint16_t port_id,
ret = -ENOTSUP;
goto end;
}
- /* initialize data before enabling the callback */
- queue_cfg->empty_poll_stats = 0;
- queue_cfg->cb_mode = mode;
- queue_cfg->pwr_mgmt_state = PMD_MGMT_ENABLED;
-
- /* this is not necessary here, but do it anyway */
- rte_atomic_thread_fence(__ATOMIC_SEQ_CST);
-
- queue_cfg->cur_cb = rte_eth_add_rx_callback(port_id,
- queue_id, clb_scale_freq, NULL);
+ clb = clb_scale_freq;
break;
}
case RTE_POWER_MGMT_TYPE_PAUSE:
@@ -286,18 +266,21 @@ rte_power_ethdev_pmgmt_queue_enable(unsigned int lcore_id, uint16_t port_id,
if (global_data.tsc_per_us == 0)
calc_tsc();
- /* initialize data before enabling the callback */
- queue_cfg->empty_poll_stats = 0;
- queue_cfg->cb_mode = mode;
- queue_cfg->pwr_mgmt_state = PMD_MGMT_ENABLED;
-
- /* this is not necessary here, but do it anyway */
- rte_atomic_thread_fence(__ATOMIC_SEQ_CST);
-
- queue_cfg->cur_cb = rte_eth_add_rx_callback(port_id, queue_id,
- clb_pause, NULL);
+ clb = clb_pause;
break;
+ default:
+ RTE_LOG(DEBUG, POWER, "Invalid power management type\n");
+ ret = -EINVAL;
+ goto end;
}
+
+ /* initialize data before enabling the callback */
+ queue_cfg->empty_poll_stats = 0;
+ queue_cfg->cb_mode = mode;
+ queue_cfg->pwr_mgmt_state = PMD_MGMT_ENABLED;
+ queue_cfg->cur_cb = rte_eth_add_rx_callback(port_id, queue_id,
+ clb, NULL);
+
ret = 0;
end:
return ret;
@@ -308,12 +291,20 @@ rte_power_ethdev_pmgmt_queue_disable(unsigned int lcore_id,
uint16_t port_id, uint16_t queue_id)
{
struct pmd_queue_cfg *queue_cfg;
+ int ret;
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
if (lcore_id >= RTE_MAX_LCORE || queue_id >= RTE_MAX_QUEUES_PER_PORT)
return -EINVAL;
+ /* check if the queue is stopped */
+ ret = queue_stopped(port_id, queue_id);
+ if (ret != 1) {
+ /* error means invalid queue, 0 means queue wasn't stopped */
+ return ret < 0 ? -EINVAL : -EBUSY;
+ }
+
/* no need to check queue id as wrong queue id would not be enabled */
queue_cfg = &port_cfg[port_id][queue_id];
@@ -323,27 +314,8 @@ rte_power_ethdev_pmgmt_queue_disable(unsigned int lcore_id,
/* stop any callbacks from progressing */
queue_cfg->pwr_mgmt_state = PMD_MGMT_DISABLED;
- /* ensure we update our state before continuing */
- rte_atomic_thread_fence(__ATOMIC_SEQ_CST);
-
switch (queue_cfg->cb_mode) {
- case RTE_POWER_MGMT_TYPE_MONITOR:
- {
- bool exit = false;
- do {
- /*
- * we may request cancellation while the other thread
- * has just entered the callback but hasn't started
- * sleeping yet, so keep waking it up until we know it's
- * done sleeping.
- */
- if (queue_cfg->umwait_in_progress)
- rte_power_monitor_wakeup(lcore_id);
- else
- exit = true;
- } while (!exit);
- }
- /* fall-through */
+ case RTE_POWER_MGMT_TYPE_MONITOR: /* fall-through */
case RTE_POWER_MGMT_TYPE_PAUSE:
rte_eth_remove_rx_callback(port_id, queue_id,
queue_cfg->cur_cb);
@@ -356,10 +328,11 @@ rte_power_ethdev_pmgmt_queue_disable(unsigned int lcore_id,
break;
}
/*
- * we don't free the RX callback here because it is unsafe to do so
- * unless we know for a fact that all data plane threads have stopped.
+ * the API doc mandates that the user stops all processing on affected
+ * ports before calling any of these API's, so we can assume that the
+ * callbacks can be freed. we're intentionally casting away const-ness.
*/
- queue_cfg->cur_cb = NULL;
+ rte_free((void *)queue_cfg->cur_cb);
return 0;
}
diff --git a/lib/power/rte_power_pmd_mgmt.h b/lib/power/rte_power_pmd_mgmt.h
index 7a0ac24625..444e7b8a66 100644
--- a/lib/power/rte_power_pmd_mgmt.h
+++ b/lib/power/rte_power_pmd_mgmt.h
@@ -43,6 +43,9 @@ enum rte_power_pmd_mgmt_type {
*
* @note This function is not thread-safe.
*
+ * @warning This function must be called when all affected Ethernet queues are
+ * stopped and no Rx/Tx is in progress!
+ *
* @param lcore_id
* The lcore the Rx queue will be polled from.
* @param port_id
@@ -69,6 +72,9 @@ rte_power_ethdev_pmgmt_queue_enable(unsigned int lcore_id,
*
* @note This function is not thread-safe.
*
+ * @warning This function must be called when all affected Ethernet queues are
+ * stopped and no Rx/Tx is in progress!
+ *
* @param lcore_id
* The lcore the Rx queue is polled from.
* @param port_id
--
2.25.1
^ permalink raw reply [relevance 3%]
* [dpdk-dev] [PATCH v2 1/7] power_intrinsics: use callbacks for comparison
@ 2021-06-25 14:00 3% ` Anatoly Burakov
2021-06-25 14:00 3% ` [dpdk-dev] [PATCH v2 4/7] power: remove thread safety from PMD power API's Anatoly Burakov
2 siblings, 0 replies; 200+ results
From: Anatoly Burakov @ 2021-06-25 14:00 UTC (permalink / raw)
To: dev, Timothy McDaniel, Beilei Xing, Jingjing Wu, Qiming Yang,
Qi Zhang, Haiyue Wang, Matan Azrad, Shahaf Shuler,
Viacheslav Ovsiienko, Bruce Richardson, Konstantin Ananyev
Cc: david.hunt, ciara.loftus
Previously, the semantics of power monitor were such that we were
checking current value against the expected value, and if they matched,
then the sleep was aborted. This is somewhat inflexible, because it only
allowed us to check for a specific value.
This commit replaces the comparison with a user callback mechanism, so
that any PMD (or other code) using `rte_power_monitor()` can define
their own comparison semantics and decision making on how to detect the
need to abort the entering of power optimized state.
Existing implementations are adjusted to follow the new semantics.
Suggested-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
---
Notes:
v2:
- Use callback mechanism for more flexibility
- Address feedback from Konstantin
doc/guides/rel_notes/release_21_08.rst | 1 +
drivers/event/dlb2/dlb2.c | 16 ++++++++--
drivers/net/i40e/i40e_rxtx.c | 19 ++++++++----
drivers/net/iavf/iavf_rxtx.c | 19 ++++++++----
drivers/net/ice/ice_rxtx.c | 19 ++++++++----
drivers/net/ixgbe/ixgbe_rxtx.c | 19 ++++++++----
drivers/net/mlx5/mlx5_rx.c | 16 ++++++++--
.../include/generic/rte_power_intrinsics.h | 29 ++++++++++++++-----
lib/eal/x86/rte_power_intrinsics.c | 9 ++----
9 files changed, 106 insertions(+), 41 deletions(-)
diff --git a/doc/guides/rel_notes/release_21_08.rst b/doc/guides/rel_notes/release_21_08.rst
index a6ecfdf3ce..c84ac280f5 100644
--- a/doc/guides/rel_notes/release_21_08.rst
+++ b/doc/guides/rel_notes/release_21_08.rst
@@ -84,6 +84,7 @@ API Changes
Also, make sure to start the actual text at the margin.
=======================================================
+* eal: the ``rte_power_intrinsics`` API changed to use a callback mechanism.
ABI Changes
-----------
diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c
index eca183753f..14dfac257c 100644
--- a/drivers/event/dlb2/dlb2.c
+++ b/drivers/event/dlb2/dlb2.c
@@ -3154,6 +3154,15 @@ dlb2_port_credits_inc(struct dlb2_port *qm_port, int num)
}
}
+#define CLB_MASK_IDX 0
+#define CLB_VAL_IDX 1
+static int
+dlb2_monitor_callback(const uint64_t val, const uint64_t opaque[4])
+{
+ /* abort if the value matches */
+ return (val & opaque[CLB_MASK_IDX]) == opaque[CLB_VAL_IDX] ? -1 : 0;
+}
+
static inline int
dlb2_dequeue_wait(struct dlb2_eventdev *dlb2,
struct dlb2_eventdev_port *ev_port,
@@ -3194,8 +3203,11 @@ dlb2_dequeue_wait(struct dlb2_eventdev *dlb2,
expected_value = 0;
pmc.addr = monitor_addr;
- pmc.val = expected_value;
- pmc.mask = qe_mask.raw_qe[1];
+ /* store expected value and comparison mask in opaque data */
+ pmc.opaque[CLB_VAL_IDX] = expected_value;
+ pmc.opaque[CLB_MASK_IDX] = qe_mask.raw_qe[1];
+ /* set up callback */
+ pmc.fn = dlb2_monitor_callback;
pmc.size = sizeof(uint64_t);
rte_power_monitor(&pmc, timeout + start_ticks);
diff --git a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c
index 6c58decece..45f3fbf4ec 100644
--- a/drivers/net/i40e/i40e_rxtx.c
+++ b/drivers/net/i40e/i40e_rxtx.c
@@ -81,6 +81,17 @@
#define I40E_TX_OFFLOAD_SIMPLE_NOTSUP_MASK \
(PKT_TX_OFFLOAD_MASK ^ I40E_TX_OFFLOAD_SIMPLE_SUP_MASK)
+static int
+i40e_monitor_callback(const uint64_t value, const uint64_t arg[4] __rte_unused)
+{
+ const uint64_t m = rte_cpu_to_le_64(1 << I40E_RX_DESC_STATUS_DD_SHIFT);
+ /*
+ * we expect the DD bit to be set to 1 if this descriptor was already
+ * written to.
+ */
+ return (value & m) == m ? -1 : 0;
+}
+
int
i40e_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
{
@@ -93,12 +104,8 @@ i40e_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
/* watch for changes in status bit */
pmc->addr = &rxdp->wb.qword1.status_error_len;
- /*
- * we expect the DD bit to be set to 1 if this descriptor was already
- * written to.
- */
- pmc->val = rte_cpu_to_le_64(1 << I40E_RX_DESC_STATUS_DD_SHIFT);
- pmc->mask = rte_cpu_to_le_64(1 << I40E_RX_DESC_STATUS_DD_SHIFT);
+ /* comparison callback */
+ pmc->fn = i40e_monitor_callback;
/* registers are 64-bit */
pmc->size = sizeof(uint64_t);
diff --git a/drivers/net/iavf/iavf_rxtx.c b/drivers/net/iavf/iavf_rxtx.c
index 0361af0d85..6e12ecce07 100644
--- a/drivers/net/iavf/iavf_rxtx.c
+++ b/drivers/net/iavf/iavf_rxtx.c
@@ -57,6 +57,17 @@ iavf_proto_xtr_type_to_rxdid(uint8_t flex_type)
rxdid_map[flex_type] : IAVF_RXDID_COMMS_OVS_1;
}
+static int
+iavf_monitor_callback(const uint64_t value, const uint64_t arg[4] __rte_unused)
+{
+ const uint64_t m = rte_cpu_to_le_64(1 << IAVF_RX_DESC_STATUS_DD_SHIFT);
+ /*
+ * we expect the DD bit to be set to 1 if this descriptor was already
+ * written to.
+ */
+ return (value & m) == m ? -1 : 0;
+}
+
int
iavf_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
{
@@ -69,12 +80,8 @@ iavf_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
/* watch for changes in status bit */
pmc->addr = &rxdp->wb.qword1.status_error_len;
- /*
- * we expect the DD bit to be set to 1 if this descriptor was already
- * written to.
- */
- pmc->val = rte_cpu_to_le_64(1 << IAVF_RX_DESC_STATUS_DD_SHIFT);
- pmc->mask = rte_cpu_to_le_64(1 << IAVF_RX_DESC_STATUS_DD_SHIFT);
+ /* comparison callback */
+ pmc->fn = iavf_monitor_callback;
/* registers are 64-bit */
pmc->size = sizeof(uint64_t);
diff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c
index fc9bb5a3e7..278eb4b9a1 100644
--- a/drivers/net/ice/ice_rxtx.c
+++ b/drivers/net/ice/ice_rxtx.c
@@ -27,6 +27,17 @@ uint64_t rte_net_ice_dynflag_proto_xtr_ipv6_flow_mask;
uint64_t rte_net_ice_dynflag_proto_xtr_tcp_mask;
uint64_t rte_net_ice_dynflag_proto_xtr_ip_offset_mask;
+static int
+ice_monitor_callback(const uint64_t value, const uint64_t arg[4] __rte_unused)
+{
+ const uint64_t m = rte_cpu_to_le_16(1 << ICE_RX_FLEX_DESC_STATUS0_DD_S);
+ /*
+ * we expect the DD bit to be set to 1 if this descriptor was already
+ * written to.
+ */
+ return (value & m) == m ? -1 : 0;
+}
+
int
ice_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
{
@@ -39,12 +50,8 @@ ice_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
/* watch for changes in status bit */
pmc->addr = &rxdp->wb.status_error0;
- /*
- * we expect the DD bit to be set to 1 if this descriptor was already
- * written to.
- */
- pmc->val = rte_cpu_to_le_16(1 << ICE_RX_FLEX_DESC_STATUS0_DD_S);
- pmc->mask = rte_cpu_to_le_16(1 << ICE_RX_FLEX_DESC_STATUS0_DD_S);
+ /* comparison callback */
+ pmc->fn = ice_monitor_callback;
/* register is 16-bit */
pmc->size = sizeof(uint16_t);
diff --git a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers/net/ixgbe/ixgbe_rxtx.c
index d69f36e977..0c5045d9dc 100644
--- a/drivers/net/ixgbe/ixgbe_rxtx.c
+++ b/drivers/net/ixgbe/ixgbe_rxtx.c
@@ -1369,6 +1369,17 @@ const uint32_t
RTE_PTYPE_INNER_L3_IPV4_EXT | RTE_PTYPE_INNER_L4_UDP,
};
+static int
+ixgbe_monitor_callback(const uint64_t value, const uint64_t arg[4] __rte_unused)
+{
+ const uint64_t m = rte_cpu_to_le_32(IXGBE_RXDADV_STAT_DD);
+ /*
+ * we expect the DD bit to be set to 1 if this descriptor was already
+ * written to.
+ */
+ return (value & m) == m ? -1 : 0;
+}
+
int
ixgbe_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
{
@@ -1381,12 +1392,8 @@ ixgbe_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
/* watch for changes in status bit */
pmc->addr = &rxdp->wb.upper.status_error;
- /*
- * we expect the DD bit to be set to 1 if this descriptor was already
- * written to.
- */
- pmc->val = rte_cpu_to_le_32(IXGBE_RXDADV_STAT_DD);
- pmc->mask = rte_cpu_to_le_32(IXGBE_RXDADV_STAT_DD);
+ /* comparison callback */
+ pmc->fn = ixgbe_monitor_callback;
/* the registers are 32-bit */
pmc->size = sizeof(uint32_t);
diff --git a/drivers/net/mlx5/mlx5_rx.c b/drivers/net/mlx5/mlx5_rx.c
index 6cd71a44eb..f31a1ec839 100644
--- a/drivers/net/mlx5/mlx5_rx.c
+++ b/drivers/net/mlx5/mlx5_rx.c
@@ -269,6 +269,17 @@ mlx5_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id)
return rx_queue_count(rxq);
}
+#define CLB_VAL_IDX 0
+#define CLB_MSK_IDX 1
+static int
+mlx_monitor_callback(const uint64_t value, const uint64_t opaque[4])
+{
+ const uint64_t m = opaque[CLB_MSK_IDX];
+ const uint64_t v = opaque[CLB_VAL_IDX];
+
+ return (value & m) == v ? -1 : 0;
+}
+
int mlx5_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
{
struct mlx5_rxq_data *rxq = rx_queue;
@@ -282,8 +293,9 @@ int mlx5_get_monitor_addr(void *rx_queue, struct rte_power_monitor_cond *pmc)
return -rte_errno;
}
pmc->addr = &cqe->op_own;
- pmc->val = !!idx;
- pmc->mask = MLX5_CQE_OWNER_MASK;
+ pmc->opaque[CLB_VAL_IDX] = !!idx;
+ pmc->opaque[CLB_MSK_IDX] = MLX5_CQE_OWNER_MASK;
+ pmc->fn = mlx_monitor_callback;
pmc->size = sizeof(uint8_t);
return 0;
}
diff --git a/lib/eal/include/generic/rte_power_intrinsics.h b/lib/eal/include/generic/rte_power_intrinsics.h
index dddca3d41c..046667ade6 100644
--- a/lib/eal/include/generic/rte_power_intrinsics.h
+++ b/lib/eal/include/generic/rte_power_intrinsics.h
@@ -18,19 +18,34 @@
* which are architecture-dependent.
*/
+/**
+ * Callback definition for monitoring conditions. Callbacks with this signature
+ * will be used by `rte_power_monitor()` to check if the entering of power
+ * optimized state should be aborted.
+ *
+ * @param val
+ * The value read from memory.
+ * @param opaque
+ * Callback-specific data.
+ *
+ * @return
+ * 0 if entering of power optimized state should proceed
+ * -1 if entering of power optimized state should be aborted
+ */
+typedef int (*rte_power_monitor_clb_t)(const uint64_t val,
+ const uint64_t opaque[4]);
struct rte_power_monitor_cond {
volatile void *addr; /**< Address to monitor for changes */
- uint64_t val; /**< If the `mask` is non-zero, location pointed
- * to by `addr` will be read and compared
- * against this value.
- */
- uint64_t mask; /**< 64-bit mask to extract value read from `addr` */
- uint8_t size; /**< Data size (in bytes) that will be used to compare
- * expected value (`val`) with data read from the
+ uint8_t size; /**< Data size (in bytes) that will be read from the
* monitored memory location (`addr`). Can be 1, 2,
* 4, or 8. Supplying any other value will result in
* an error.
*/
+ rte_power_monitor_clb_t fn; /**< Callback to be used to check if
+ * entering power optimized state should
+ * be aborted.
+ */
+ uint64_t opaque[4]; /**< Callback-specific data */
};
/**
diff --git a/lib/eal/x86/rte_power_intrinsics.c b/lib/eal/x86/rte_power_intrinsics.c
index 39ea9fdecd..3c5c9ce7ad 100644
--- a/lib/eal/x86/rte_power_intrinsics.c
+++ b/lib/eal/x86/rte_power_intrinsics.c
@@ -110,14 +110,11 @@ rte_power_monitor(const struct rte_power_monitor_cond *pmc,
/* now that we've put this address into monitor, we can unlock */
rte_spinlock_unlock(&s->lock);
- /* if we have a comparison mask, we might not need to sleep at all */
- if (pmc->mask) {
+ /* if we have a callback, we might not need to sleep at all */
+ if (pmc->fn) {
const uint64_t cur_value = __get_umwait_val(
pmc->addr, pmc->size);
- const uint64_t masked = cur_value & pmc->mask;
-
- /* if the masked value is already matching, abort */
- if (masked == pmc->val)
+ if (pmc->fn(cur_value, pmc->opaque) != 0)
goto end;
}
--
2.25.1
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] Experimental symbols in kni lib
2021-06-24 13:54 0% ` Kinsella, Ray
@ 2021-06-25 13:26 0% ` Igor Ryzhov
2021-06-28 12:23 0% ` Ferruh Yigit
0 siblings, 1 reply; 200+ results
From: Igor Ryzhov @ 2021-06-25 13:26 UTC (permalink / raw)
To: Ferruh Yigit; +Cc: Kinsella, Ray, Thomas Monjalon, Stephen Hemminger, dpdk-dev
Hi Ferruh, all,
Let's please discuss another approach to setting KNI link status before
making this API stable:
http://patches.dpdk.org/project/dpdk/patch/20190925093623.18419-1-iryzhov@nfware.com/
I explained the problem with the current implementation there.
More than that, using ioctl approach makes it possible to set also speed
and duplex and use them to implement get_link_ksettings callback.
I can send patches for both features.
Igor
On Thu, Jun 24, 2021 at 4:54 PM Kinsella, Ray <mdr@ashroe.eu> wrote:
> Sounds more than reasonable, +1 from me.
>
> Ray K
>
> On 24/06/2021 14:24, Ferruh Yigit wrote:
> > On 6/24/2021 11:42 AM, Kinsella, Ray wrote:
> >> Hi Ferruh,
> >>
> >> The following kni experimental symbols are present in both v21.05 and
> v19.11 release. These symbols should be considered for promotion to stable
> as part of the v22 ABI in DPDK 21.11, as they have been experimental for >=
> 2yrs at this point.
> >>
> >> * rte_kni_update_link
> >>
> >> Ray K
> >>
> >
> > Hi Ray,
> >
> > Thanks for follow up.
> >
> > I just checked the API and planning a small behavior update to it.
> > If the update is accepted, I suggest keeping the API experimental for
> 21.08 too,
> > but can mature it on v21.11.
> >
> > Thanks,
> > ferruh
> >
>
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] Experimental symbols in compressdev lib
2021-06-25 7:49 0% ` David Marchand
@ 2021-06-25 9:14 0% ` Kinsella, Ray
0 siblings, 0 replies; 200+ results
From: Kinsella, Ray @ 2021-06-25 9:14 UTC (permalink / raw)
To: David Marchand, Fiona Trahe, Ashish Gupta
Cc: Thomas Monjalon, Stephen Hemminger, dpdk-dev
On 25/06/2021 08:49, David Marchand wrote:
> On Thu, Jun 24, 2021 at 12:33 PM Kinsella, Ray <mdr@ashroe.eu> wrote:
>>
>> Hi Fiona & Ashish,
>>
>> The following compressdev experimental symbols are present in both v21.05 and v19.11 release. These symbols should be considered for promotion to stable as part of the v22 ABI in DPDK 21.11, as they have been experimental for >= 2yrs at this point.
>>
>> * rte_compressdev_capability_get
>> * rte_compressdev_close
>> * rte_compressdev_configure
>> * rte_compressdev_count
>> * rte_compressdev_dequeue_burst
>> * rte_compressdev_devices_get
>> * rte_compressdev_enqueue_burst
>> * rte_compressdev_get_dev_id
>> * rte_compressdev_get_feature_name
>> * rte_compressdev_info_get
>> * rte_compressdev_name_get
>> * rte_compressdev_pmd_allocate
>> * rte_compressdev_pmd_create
>> * rte_compressdev_pmd_destroy
>> * rte_compressdev_pmd_get_named_dev
>> * rte_compressdev_pmd_parse_input_args
>> * rte_compressdev_pmd_release_device
>> * rte_compressdev_private_xform_create
>> * rte_compressdev_private_xform_free
>> * rte_compressdev_queue_pair_count
>> * rte_compressdev_queue_pair_setup
>> * rte_compressdev_socket_id
>> * rte_compressdev_start
>> * rte_compressdev_stats_get
>> * rte_compressdev_stats_reset
>> * rte_compressdev_stop
>> * rte_compressdev_stream_create
>> * rte_compressdev_stream_free
>> * rte_comp_get_feature_name
>> * rte_comp_op_alloc
>> * rte_comp_op_bulk_alloc
>> * rte_comp_op_bulk_free
>> * rte_comp_op_free
>> * rte_comp_op_pool_create
>>
>
> Part of the symbols listed here are driver-only (at least the *_pmd_*
> symbols) and should be marked internal.
>
+1 agreed.
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH v1] doc: update ABI in MAINTAINERS file
2021-06-22 15:50 12% [dpdk-dev] [PATCH v1] doc: update ABI in MAINTAINERS file Ray Kinsella
@ 2021-06-25 8:08 7% ` Ferruh Yigit
0 siblings, 0 replies; 200+ results
From: Ferruh Yigit @ 2021-06-25 8:08 UTC (permalink / raw)
To: Ray Kinsella, dev; +Cc: stephen, thomas, ktraynor, bruce.richardson
On 6/22/2021 4:50 PM, Ray Kinsella wrote:
> Update to ABI MAINTAINERS.
>
> Signed-off-by: Ray Kinsella <mdr@ashroe.eu>
> ---
> MAINTAINERS | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 5877a16971..dab8883a4f 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -117,7 +117,6 @@ F: .ci/
>
> ABI Policy & Versioning
> M: Ray Kinsella <mdr@ashroe.eu>
> -M: Neil Horman <nhorman@tuxdriver.com>
> F: lib/eal/include/rte_compat.h
> F: lib/eal/include/rte_function_versioning.h
> F: doc/guides/contributing/abi_*.rst
>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
Tried to reach out Neil multiple times for ABI issues without success.
^ permalink raw reply [relevance 7%]
* Re: [dpdk-dev] Experimental symbols in compressdev lib
2021-06-24 10:32 3% [dpdk-dev] Experimental symbols in compressdev lib Kinsella, Ray
2021-06-24 10:55 0% ` Trahe, Fiona
@ 2021-06-25 7:49 0% ` David Marchand
2021-06-25 9:14 0% ` Kinsella, Ray
1 sibling, 1 reply; 200+ results
From: David Marchand @ 2021-06-25 7:49 UTC (permalink / raw)
To: Fiona Trahe, Ashish Gupta
Cc: Kinsella, Ray, Thomas Monjalon, Stephen Hemminger, dpdk-dev
On Thu, Jun 24, 2021 at 12:33 PM Kinsella, Ray <mdr@ashroe.eu> wrote:
>
> Hi Fiona & Ashish,
>
> The following compressdev experimental symbols are present in both v21.05 and v19.11 release. These symbols should be considered for promotion to stable as part of the v22 ABI in DPDK 21.11, as they have been experimental for >= 2yrs at this point.
>
> * rte_compressdev_capability_get
> * rte_compressdev_close
> * rte_compressdev_configure
> * rte_compressdev_count
> * rte_compressdev_dequeue_burst
> * rte_compressdev_devices_get
> * rte_compressdev_enqueue_burst
> * rte_compressdev_get_dev_id
> * rte_compressdev_get_feature_name
> * rte_compressdev_info_get
> * rte_compressdev_name_get
> * rte_compressdev_pmd_allocate
> * rte_compressdev_pmd_create
> * rte_compressdev_pmd_destroy
> * rte_compressdev_pmd_get_named_dev
> * rte_compressdev_pmd_parse_input_args
> * rte_compressdev_pmd_release_device
> * rte_compressdev_private_xform_create
> * rte_compressdev_private_xform_free
> * rte_compressdev_queue_pair_count
> * rte_compressdev_queue_pair_setup
> * rte_compressdev_socket_id
> * rte_compressdev_start
> * rte_compressdev_stats_get
> * rte_compressdev_stats_reset
> * rte_compressdev_stop
> * rte_compressdev_stream_create
> * rte_compressdev_stream_free
> * rte_comp_get_feature_name
> * rte_comp_op_alloc
> * rte_comp_op_bulk_alloc
> * rte_comp_op_bulk_free
> * rte_comp_op_free
> * rte_comp_op_pool_create
>
Part of the symbols listed here are driver-only (at least the *_pmd_*
symbols) and should be marked internal.
--
David Marchand
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] Experimental symbols in bbdev lib
2021-06-24 10:35 3% [dpdk-dev] Experimental symbols in bbdev lib Kinsella, Ray
2021-06-24 15:42 3% ` Chautru, Nicolas
@ 2021-06-25 7:48 0% ` David Marchand
1 sibling, 0 replies; 200+ results
From: David Marchand @ 2021-06-25 7:48 UTC (permalink / raw)
To: Nicolas Chautru
Cc: Kinsella, Ray, Thomas Monjalon, Stephen Hemminger, dpdk-dev,
Maxime Coquelin
On Thu, Jun 24, 2021 at 12:35 PM Kinsella, Ray <mdr@ashroe.eu> wrote:
>
> Hi Nicolas
>
> The following bbdev experimental symbols are present in both v21.05 and v19.11 release. These symbols should be considered for promotion to stable as part of the v22 ABI in DPDK 21.11, as they have been experimental for >= 2yrs at this point.
>
> * rte_bbdev_allocate
> * rte_bbdev_callback_register
> * rte_bbdev_callback_unregister
> * rte_bbdev_close
> * rte_bbdev_count
> * rte_bbdev_dec_op_alloc_bulk
> * rte_bbdev_dec_op_free_bulk
> * rte_bbdev_dequeue_dec_ops
> * rte_bbdev_dequeue_enc_ops
> * rte_bbdev_devices
> * rte_bbdev_enc_op_alloc_bulk
> * rte_bbdev_enc_op_free_bulk
> * rte_bbdev_enqueue_dec_ops
> * rte_bbdev_enqueue_enc_ops
> * rte_bbdev_find_next
> * rte_bbdev_get_named_dev
> * rte_bbdev_info_get
> * rte_bbdev_intr_enable
> * rte_bbdev_is_valid
> * rte_bbdev_op_pool_create
> * rte_bbdev_op_type_str
> * rte_bbdev_pmd_callback_process
> * rte_bbdev_queue_configure
> * rte_bbdev_queue_info_get
> * rte_bbdev_queue_intr_ctl
> * rte_bbdev_queue_intr_disable
> * rte_bbdev_queue_intr_enable
> * rte_bbdev_queue_start
> * rte_bbdev_queue_stop
> * rte_bbdev_release
> * rte_bbdev_setup_queues
> * rte_bbdev_start
> * rte_bbdev_stats_get
> * rte_bbdev_stats_reset
> * rte_bbdev_stop
Regardless of removing the experimental status on this API, part of
the symbols listed here are driver-only and should be marked internal.
--
David Marchand
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] Experimental symbols in bbdev lib
2021-06-24 15:42 3% ` Chautru, Nicolas
@ 2021-06-24 19:27 3% ` Kinsella, Ray
0 siblings, 0 replies; 200+ results
From: Kinsella, Ray @ 2021-06-24 19:27 UTC (permalink / raw)
To: Chautru, Nicolas, Thomas Monjalon, Stephen Hemminger, dpdk-dev
Hi Nicolas,
I could equally ask is there is any concern with this being a tracked ABI?
The API has seen zero changes in two years - IMHO we'd need a very good reason not standardize it.
As there has been ample opportunities for others to chime in.
git log --format=oneline --follow v19.11..v21.05 -- lib/bbdev/version.map
99a2dd955fba6e4cc23b77d590a033650ced9c45 lib: remove librte_ prefix from directory names
63b3907833d87288bbc74f370e22f2929ec34594 build: remove library name from version map file name
Ray K
On 24/06/2021 16:42, Chautru, Nicolas wrote:
> Hi Ray,
>
> That request was considered for 20.11. But this was deferred by the community while waiting for other vendors who may be willing to contribute their own PMDs.
> Any specific concern with this not being on a tracked ABI?
>
> Thanks
> Nic
>
>
>> -----Original Message-----
>> From: Kinsella, Ray <mdr@ashroe.eu>
>> Sent: Thursday, June 24, 2021 3:35 AM
>> To: Chautru, Nicolas <nicolas.chautru@intel.com>; Thomas Monjalon
>> <thomas@monjalon.net>; Stephen Hemminger
>> <stephen@networkplumber.org>; dpdk-dev <dev@dpdk.org>
>> Subject: Experimental symbols in bbdev lib
>>
>> Hi Nicolas
>>
>> The following bbdev experimental symbols are present in both v21.05 and
>> v19.11 release. These symbols should be considered for promotion to stable
>> as part of the v22 ABI in DPDK 21.11, as they have been experimental for >=
>> 2yrs at this point.
>>
>> * rte_bbdev_allocate
>> * rte_bbdev_callback_register
>> * rte_bbdev_callback_unregister
>> * rte_bbdev_close
>> * rte_bbdev_count
>> * rte_bbdev_dec_op_alloc_bulk
>> * rte_bbdev_dec_op_free_bulk
>> * rte_bbdev_dequeue_dec_ops
>> * rte_bbdev_dequeue_enc_ops
>> * rte_bbdev_devices
>> * rte_bbdev_enc_op_alloc_bulk
>> * rte_bbdev_enc_op_free_bulk
>> * rte_bbdev_enqueue_dec_ops
>> * rte_bbdev_enqueue_enc_ops
>> * rte_bbdev_find_next
>> * rte_bbdev_get_named_dev
>> * rte_bbdev_info_get
>> * rte_bbdev_intr_enable
>> * rte_bbdev_is_valid
>> * rte_bbdev_op_pool_create
>> * rte_bbdev_op_type_str
>> * rte_bbdev_pmd_callback_process
>> * rte_bbdev_queue_configure
>> * rte_bbdev_queue_info_get
>> * rte_bbdev_queue_intr_ctl
>> * rte_bbdev_queue_intr_disable
>> * rte_bbdev_queue_intr_enable
>> * rte_bbdev_queue_start
>> * rte_bbdev_queue_stop
>> * rte_bbdev_release
>> * rte_bbdev_setup_queues
>> * rte_bbdev_start
>> * rte_bbdev_stats_get
>> * rte_bbdev_stats_reset
>> * rte_bbdev_stop
>>
>> Ray K
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] Experimental symbols in sched lib
2021-06-24 10:33 3% [dpdk-dev] Experimental symbols in sched lib Kinsella, Ray
@ 2021-06-24 19:21 0% ` Singh, Jasvinder
0 siblings, 0 replies; 200+ results
From: Singh, Jasvinder @ 2021-06-24 19:21 UTC (permalink / raw)
To: Kinsella, Ray
Cc: Dumitrescu, Cristian, Thomas Monjalon, Stephen Hemminger, dpdk-dev
> On 24 Jun 2021, at 11:33, Kinsella, Ray <mdr@ashroe.eu> wrote:
>
> Hi Cristian & Jasvinder,
>
> The following sched experimental symbols are present in both v21.05 and v19.11 release. These symbols should be considered for promotion to stable as part of the v22 ABI in DPDK 21.11, as they have been experimental for >= 2yrs at this point.
>
> * rte_sched_subport_pipe_profile_add
>
> Ray K
I’ll send patch to remove experimental tag. Thanks for the heads up.
>
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] Experimental symbols in bbdev lib
2021-06-24 10:35 3% [dpdk-dev] Experimental symbols in bbdev lib Kinsella, Ray
@ 2021-06-24 15:42 3% ` Chautru, Nicolas
2021-06-24 19:27 3% ` Kinsella, Ray
2021-06-25 7:48 0% ` David Marchand
1 sibling, 1 reply; 200+ results
From: Chautru, Nicolas @ 2021-06-24 15:42 UTC (permalink / raw)
To: Kinsella, Ray, Thomas Monjalon, Stephen Hemminger, dpdk-dev
Hi Ray,
That request was considered for 20.11. But this was deferred by the community while waiting for other vendors who may be willing to contribute their own PMDs.
Any specific concern with this not being on a tracked ABI?
Thanks
Nic
> -----Original Message-----
> From: Kinsella, Ray <mdr@ashroe.eu>
> Sent: Thursday, June 24, 2021 3:35 AM
> To: Chautru, Nicolas <nicolas.chautru@intel.com>; Thomas Monjalon
> <thomas@monjalon.net>; Stephen Hemminger
> <stephen@networkplumber.org>; dpdk-dev <dev@dpdk.org>
> Subject: Experimental symbols in bbdev lib
>
> Hi Nicolas
>
> The following bbdev experimental symbols are present in both v21.05 and
> v19.11 release. These symbols should be considered for promotion to stable
> as part of the v22 ABI in DPDK 21.11, as they have been experimental for >=
> 2yrs at this point.
>
> * rte_bbdev_allocate
> * rte_bbdev_callback_register
> * rte_bbdev_callback_unregister
> * rte_bbdev_close
> * rte_bbdev_count
> * rte_bbdev_dec_op_alloc_bulk
> * rte_bbdev_dec_op_free_bulk
> * rte_bbdev_dequeue_dec_ops
> * rte_bbdev_dequeue_enc_ops
> * rte_bbdev_devices
> * rte_bbdev_enc_op_alloc_bulk
> * rte_bbdev_enc_op_free_bulk
> * rte_bbdev_enqueue_dec_ops
> * rte_bbdev_enqueue_enc_ops
> * rte_bbdev_find_next
> * rte_bbdev_get_named_dev
> * rte_bbdev_info_get
> * rte_bbdev_intr_enable
> * rte_bbdev_is_valid
> * rte_bbdev_op_pool_create
> * rte_bbdev_op_type_str
> * rte_bbdev_pmd_callback_process
> * rte_bbdev_queue_configure
> * rte_bbdev_queue_info_get
> * rte_bbdev_queue_intr_ctl
> * rte_bbdev_queue_intr_disable
> * rte_bbdev_queue_intr_enable
> * rte_bbdev_queue_start
> * rte_bbdev_queue_stop
> * rte_bbdev_release
> * rte_bbdev_setup_queues
> * rte_bbdev_start
> * rte_bbdev_stats_get
> * rte_bbdev_stats_reset
> * rte_bbdev_stop
>
> Ray K
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] Experimental symbols in kni lib
2021-06-24 13:24 0% ` Ferruh Yigit
@ 2021-06-24 13:54 0% ` Kinsella, Ray
2021-06-25 13:26 0% ` Igor Ryzhov
0 siblings, 1 reply; 200+ results
From: Kinsella, Ray @ 2021-06-24 13:54 UTC (permalink / raw)
To: Ferruh Yigit, Thomas Monjalon, Stephen Hemminger, dpdk-dev
Sounds more than reasonable, +1 from me.
Ray K
On 24/06/2021 14:24, Ferruh Yigit wrote:
> On 6/24/2021 11:42 AM, Kinsella, Ray wrote:
>> Hi Ferruh,
>>
>> The following kni experimental symbols are present in both v21.05 and v19.11 release. These symbols should be considered for promotion to stable as part of the v22 ABI in DPDK 21.11, as they have been experimental for >= 2yrs at this point.
>>
>> * rte_kni_update_link
>>
>> Ray K
>>
>
> Hi Ray,
>
> Thanks for follow up.
>
> I just checked the API and planning a small behavior update to it.
> If the update is accepted, I suggest keeping the API experimental for 21.08 too,
> but can mature it on v21.11.
>
> Thanks,
> ferruh
>
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] Experimental symbols in kni lib
2021-06-24 10:42 3% [dpdk-dev] Experimental symbols in kni lib Kinsella, Ray
@ 2021-06-24 13:24 0% ` Ferruh Yigit
2021-06-24 13:54 0% ` Kinsella, Ray
0 siblings, 1 reply; 200+ results
From: Ferruh Yigit @ 2021-06-24 13:24 UTC (permalink / raw)
To: Kinsella, Ray, Thomas Monjalon, Stephen Hemminger, dpdk-dev
On 6/24/2021 11:42 AM, Kinsella, Ray wrote:
> Hi Ferruh,
>
> The following kni experimental symbols are present in both v21.05 and v19.11 release. These symbols should be considered for promotion to stable as part of the v22 ABI in DPDK 21.11, as they have been experimental for >= 2yrs at this point.
>
> * rte_kni_update_link
>
> Ray K
>
Hi Ray,
Thanks for follow up.
I just checked the API and planning a small behavior update to it.
If the update is accepted, I suggest keeping the API experimental for 21.08 too,
but can mature it on v21.11.
Thanks,
ferruh
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [EXT] Re: Experimental symbols in security lib
2021-06-24 10:49 0% ` Kinsella, Ray
@ 2021-06-24 12:22 0% ` Akhil Goyal
0 siblings, 0 replies; 200+ results
From: Akhil Goyal @ 2021-06-24 12:22 UTC (permalink / raw)
To: Kinsella, Ray, Declan Doherty, Thomas Monjalon,
Stephen Hemminger, dpdk-dev
Cc: Anoob Joseph, Konstantin Ananyev, Hemant Agrawal,
Nithin Kumar Dabilpuram, Fan Zhang, matan
Hi Ray,
> ----------------------------------------------------------------------
> (correcting Goyals address, apologies for the resend)
>
> On 24/06/2021 11:28, Kinsella, Ray wrote:
> > Hi Declan and Goyal,
> >
> > The following security experimental symbols are present in both v21.05
> and v19.11 release. These symbols should be considered for promotion to
> stable as part of the v22 ABI in DPDK 21.11, as they have been experimental
> for >= 2yrs at this point.
Thanks for reminding this, I will plan to move it to stable API in 21.11 timeframe.
Adding more people in cc in case of any objections.
> >
> > * rte_security_get_userdata
> > * rte_security_session_stats_get
> > * rte_security_session_update
> >
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] Experimental symbols in eal lib
2021-06-24 12:14 0% ` David Marchand
@ 2021-06-24 12:15 0% ` Kinsella, Ray
2021-06-29 16:50 0% ` Tyler Retzlaff
1 sibling, 0 replies; 200+ results
From: Kinsella, Ray @ 2021-06-24 12:15 UTC (permalink / raw)
To: David Marchand
Cc: Thomas Monjalon, Stephen Hemminger, Burakov, Anatoly, dpdk-dev
Good point, that one is very up to the lib maintainer to make that call.
Ray K
On 24/06/2021 13:14, David Marchand wrote:
> On Thu, Jun 24, 2021 at 12:31 PM Kinsella, Ray <mdr@ashroe.eu> wrote:
>>
>> Hi Anatoly & Thomas,
>>
>> The following eal experimental symbols are present in both v21.05 and v19.11 release. These symbols should be considered for promotion to stable as part of the v22 ABI in DPDK 21.11, as they have been experimental for >= 2yrs at this point.
>
> Just an additional comment.
> Marking stable is not the only choice.
> We can also consider hiding such symbols (marking internal) if there
> is no clear usecase out of DPDK.
>
>
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] Experimental symbols in eal lib
2021-06-24 10:31 3% [dpdk-dev] Experimental symbols in eal lib Kinsella, Ray
@ 2021-06-24 12:14 0% ` David Marchand
2021-06-24 12:15 0% ` Kinsella, Ray
2021-06-29 16:50 0% ` Tyler Retzlaff
0 siblings, 2 replies; 200+ results
From: David Marchand @ 2021-06-24 12:14 UTC (permalink / raw)
To: Kinsella, Ray
Cc: Thomas Monjalon, Stephen Hemminger, Burakov, Anatoly, dpdk-dev
On Thu, Jun 24, 2021 at 12:31 PM Kinsella, Ray <mdr@ashroe.eu> wrote:
>
> Hi Anatoly & Thomas,
>
> The following eal experimental symbols are present in both v21.05 and v19.11 release. These symbols should be considered for promotion to stable as part of the v22 ABI in DPDK 21.11, as they have been experimental for >= 2yrs at this point.
Just an additional comment.
Marking stable is not the only choice.
We can also consider hiding such symbols (marking internal) if there
is no clear usecase out of DPDK.
--
David Marchand
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] Experimental symbols in vhost lib
2021-06-24 10:30 3% [dpdk-dev] Experimental symbols in vhost lib Kinsella, Ray
@ 2021-06-24 11:04 0% ` Xia, Chenbo
0 siblings, 0 replies; 200+ results
From: Xia, Chenbo @ 2021-06-24 11:04 UTC (permalink / raw)
To: Kinsella, Ray, Maxime Coquelin, Thomas Monjalon,
Stephen Hemminger, dpdk-dev
Hi Ray,
> -----Original Message-----
> From: Kinsella, Ray <mdr@ashroe.eu>
> Sent: Thursday, June 24, 2021 6:30 PM
> To: Maxime Coquelin <maxime.coquelin@redhat.com>; Xia, Chenbo
> <chenbo.xia@intel.com>; Thomas Monjalon <thomas@monjalon.net>; Stephen
> Hemminger <stephen@networkplumber.org>; dpdk-dev <dev@dpdk.org>
> Subject: Experimental symbols in vhost lib
>
> Hi Maxime and Chenbo,
>
> The following vhost experimental symbols are present in both v21.05 and v19.11
> release. These symbols should be considered for promotion to stable as part of
> the v22 ABI in DPDK 21.11, as they have been experimental for >= 2yrs at this
> point.
[...]
Thanks for the heads up! I will discuss with Maxime on the experimental symbols.
Chenbo
> Ray K
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] Experimental symbols in compressdev lib
2021-06-24 10:32 3% [dpdk-dev] Experimental symbols in compressdev lib Kinsella, Ray
@ 2021-06-24 10:55 0% ` Trahe, Fiona
2021-06-25 7:49 0% ` David Marchand
1 sibling, 0 replies; 200+ results
From: Trahe, Fiona @ 2021-06-24 10:55 UTC (permalink / raw)
To: Kinsella, Ray, Ashish Gupta, Thomas Monjalon, Stephen Hemminger,
dpdk-dev
Cc: Trahe, Fiona
Hi Ray,
Sounds reasonable, however I'm not curently working on this project, so will have to leave to others to propose.
Fiona
> -----Original Message-----
> From: Kinsella, Ray <mdr@ashroe.eu>
> Sent: Thursday, June 24, 2021 11:33 AM
> To: Trahe, Fiona <fiona.trahe@intel.com>; Ashish Gupta <ashish.gupta@marvell.com>; Thomas
> Monjalon <thomas@monjalon.net>; Stephen Hemminger <stephen@networkplumber.org>; dpdk-dev
> <dev@dpdk.org>
> Subject: Experimental symbols in compressdev lib
>
> Hi Fiona & Ashish,
>
> The following compressdev experimental symbols are present in both v21.05 and v19.11 release.
> These symbols should be considered for promotion to stable as part of the v22 ABI in DPDK 21.11, as
> they have been experimental for >= 2yrs at this point.
>
> * rte_compressdev_capability_get
> * rte_compressdev_close
> * rte_compressdev_configure
> * rte_compressdev_count
> * rte_compressdev_dequeue_burst
> * rte_compressdev_devices_get
> * rte_compressdev_enqueue_burst
> * rte_compressdev_get_dev_id
> * rte_compressdev_get_feature_name
> * rte_compressdev_info_get
> * rte_compressdev_name_get
> * rte_compressdev_pmd_allocate
> * rte_compressdev_pmd_create
> * rte_compressdev_pmd_destroy
> * rte_compressdev_pmd_get_named_dev
> * rte_compressdev_pmd_parse_input_args
> * rte_compressdev_pmd_release_device
> * rte_compressdev_private_xform_create
> * rte_compressdev_private_xform_free
> * rte_compressdev_queue_pair_count
> * rte_compressdev_queue_pair_setup
> * rte_compressdev_socket_id
> * rte_compressdev_start
> * rte_compressdev_stats_get
> * rte_compressdev_stats_reset
> * rte_compressdev_stop
> * rte_compressdev_stream_create
> * rte_compressdev_stream_free
> * rte_comp_get_feature_name
> * rte_comp_op_alloc
> * rte_comp_op_bulk_alloc
> * rte_comp_op_bulk_free
> * rte_comp_op_free
> * rte_comp_op_pool_create
>
> Ray K
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] Experimental symbols in security lib
2021-06-24 10:28 3% [dpdk-dev] Experimental symbols in security lib Kinsella, Ray
@ 2021-06-24 10:49 0% ` Kinsella, Ray
2021-06-24 12:22 0% ` [dpdk-dev] [EXT] " Akhil Goyal
0 siblings, 1 reply; 200+ results
From: Kinsella, Ray @ 2021-06-24 10:49 UTC (permalink / raw)
To: Declan Doherty, Thomas Monjalon, Stephen Hemminger, dpdk-dev,
Akhil,Goyal,
(correcting Goyals address, apologies for the resend)
On 24/06/2021 11:28, Kinsella, Ray wrote:
> Hi Declan and Goyal,
>
> The following security experimental symbols are present in both v21.05 and v19.11 release. These symbols should be considered for promotion to stable as part of the v22 ABI in DPDK 21.11, as they have been experimental for >= 2yrs at this point.
>
> * rte_security_get_userdata
> * rte_security_session_stats_get
> * rte_security_session_update
>
> Ray K
>
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] Experimental symbols in hash lib
[not found] <c6c3ce36-9585-6fcb-8899-719d6b8a368b@ashroe.eu>
@ 2021-06-24 10:47 0% ` Kinsella, Ray
0 siblings, 0 replies; 200+ results
From: Kinsella, Ray @ 2021-06-24 10:47 UTC (permalink / raw)
To: Yipeng Wang, Sameh Gobriel, Richardson, Bruce, Medvedkin,
Vladimir, dpdk-dev
+ dpdk dev
(missed the dev list the first time, apologies).
On 24/06/2021 11:41, Kinsella, Ray wrote:
> Hi Yipeng, Sameh, Bruce and Vladimir,
>
> The following hash experimental symbols are present in both v21.05 and v19.11 release. These symbols should be considered for promotion to stable as part of the v22 ABI in DPDK 21.11, as they have been experimental for >= 2yrs at this point.
>
> * rte_hash_free_key_with_position
>
> Ray K
>
^ permalink raw reply [relevance 0%]
* [dpdk-dev] Experimental symbols in fib lib
@ 2021-06-24 10:46 3% Kinsella, Ray
0 siblings, 0 replies; 200+ results
From: Kinsella, Ray @ 2021-06-24 10:46 UTC (permalink / raw)
To: Medvedkin, Vladimir, Thomas Monjalon, Stephen Hemminger, dpdk-dev
Hi Vladimir,
The following fib experimental symbols are present in both v21.05 and v19.11 release. These symbols should be considered for promotion to stable as part of the v22 ABI in DPDK 21.11, as they have been experimental for >= 2yrs at this point.
* rte_fib_add
* rte_fib_create
* rte_fib_delete
* rte_fib_find_existing
* rte_fib_free
* rte_fib_lookup_bulk
* rte_fib_get_dp
* rte_fib_get_rib
* rte_fib6_add
* rte_fib6_create
* rte_fib6_delete
* rte_fib6_find_existing
* rte_fib6_free
* rte_fib6_lookup_bulk
* rte_fib6_get_dp
* rte_fib6_get_rib
Ray K
^ permalink raw reply [relevance 3%]
* [dpdk-dev] Experimental symbols in metrics lib
@ 2021-06-24 10:44 3% Kinsella, Ray
0 siblings, 0 replies; 200+ results
From: Kinsella, Ray @ 2021-06-24 10:44 UTC (permalink / raw)
To: Thomas Monjalon, Stephen Hemminger, dpdk-dev
Hi Thomas,
The following metrics experimental symbols are present in both v21.05 and v19.11 release. These symbols should be considered for promotion to stable as part of the v22 ABI in DPDK 21.11, as they have been experimental for >= 2yrs at this point.
* rte_metrics_deinit
Ray K
^ permalink raw reply [relevance 3%]
* [dpdk-dev] Experimental symbols in kni lib
@ 2021-06-24 10:42 3% Kinsella, Ray
2021-06-24 13:24 0% ` Ferruh Yigit
0 siblings, 1 reply; 200+ results
From: Kinsella, Ray @ 2021-06-24 10:42 UTC (permalink / raw)
To: Yigit, Ferruh, Thomas Monjalon, Stephen Hemminger, dpdk-dev
Hi Ferruh,
The following kni experimental symbols are present in both v21.05 and v19.11 release. These symbols should be considered for promotion to stable as part of the v22 ABI in DPDK 21.11, as they have been experimental for >= 2yrs at this point.
* rte_kni_update_link
Ray K
^ permalink raw reply [relevance 3%]
* [dpdk-dev] Experimental symbols in power lib
@ 2021-06-24 10:39 3% Kinsella, Ray
0 siblings, 0 replies; 200+ results
From: Kinsella, Ray @ 2021-06-24 10:39 UTC (permalink / raw)
To: David Hunt, Thomas Monjalon, Stephen Hemminger, dpdk-dev
Hi David,
The following power experimental symbols are present in both v21.05 and v19.11 release. These symbols should be considered for promotion to stable as part of the v22 ABI in DPDK 21.11, as they have been experimental for >= 2yrs at this point.
* rte_empty_poll_detection
* rte_power_empty_poll_stat_fetch
* rte_power_empty_poll_stat_free
* rte_power_empty_poll_stat_init
* rte_power_empty_poll_stat_update
* rte_power_guest_channel_receive_msg
* rte_power_poll_stat_fetch
* rte_power_poll_stat_update
Ray K
^ permalink raw reply [relevance 3%]
* [dpdk-dev] Experimental Symbols in kvargs
@ 2021-06-24 10:36 3% Kinsella, Ray
0 siblings, 0 replies; 200+ results
From: Kinsella, Ray @ 2021-06-24 10:36 UTC (permalink / raw)
To: Olivier Matz, Stephen Hemminger, Thomas Monjalon, dpdk-dev
Hi Oliver,
The following kvargs experimental symbols are present in both v21.05 and v19.11 release. These symbols should be considered for promotion to stable as part of the v22 ABI in DPDK 21.11, as they have been experimental for >= 2yrs at this point.
* rte_kvargs_parse_delim
* rte_kvargs_strcmp
Ray K
^ permalink raw reply [relevance 3%]
* [dpdk-dev] Experimental Symbols in ethdev lib
@ 2021-06-24 10:36 3% Kinsella, Ray
0 siblings, 0 replies; 200+ results
From: Kinsella, Ray @ 2021-06-24 10:36 UTC (permalink / raw)
To: Thomas Monjalon, Yigit, Ferruh, Andrew Rybchenko, dpdk-dev
Hi Thomas, Ferruh and Andrew,
The following ethdev experimental symbols are present in both v21.05 and v19.11 release. These symbols should be considered for promotion to stable as part of the v22 ABI in DPDK 21.11, as they have been experimental for >= 2yrs at this point.
* rte_mtr_capabilities_get,
* rte_mtr_create,
* rte_mtr_destroy,
* rte_mtr_meter_disable,
* rte_mtr_meter_dscp_table_update,
* rte_mtr_meter_enable,
* rte_mtr_meter_profile_add,
* rte_mtr_meter_profile_delete,
* rte_mtr_meter_profile_update,
* rte_mtr_stats_read,
* rte_mtr_stats_update,
* rte_eth_dev_is_removed,
* rte_eth_dev_owner_delete,
* rte_eth_dev_owner_get,
* rte_eth_dev_owner_new,
* rte_eth_dev_owner_set,
* rte_eth_dev_owner_unset,
* rte_eth_dev_get_module_eeprom,
* rte_eth_dev_get_module_info,
* rte_eth_dev_rx_intr_ctl_q_get_fd,
* rte_flow_conv,
* rte_eth_find_next_of,
* rte_eth_find_next_sibling,
* rte_eth_read_clock,
* rte_eth_dev_hairpin_capability_get,
* rte_eth_rx_burst_mode_get,
* rte_eth_rx_hairpin_queue_setup,
* rte_eth_tx_burst_mode_get,
* rte_eth_tx_hairpin_queue_setup,
* rte_flow_dynf_metadata_offs,
* rte_flow_dynf_metadata_mask,
* rte_flow_dynf_metadata_register,
* rte_eth_dev_set_ptypes
Ray K
^ permalink raw reply [relevance 3%]
* [dpdk-dev] Experimental symbols in bbdev lib
@ 2021-06-24 10:35 3% Kinsella, Ray
2021-06-24 15:42 3% ` Chautru, Nicolas
2021-06-25 7:48 0% ` David Marchand
0 siblings, 2 replies; 200+ results
From: Kinsella, Ray @ 2021-06-24 10:35 UTC (permalink / raw)
To: Nicolas Chautru, Thomas Monjalon, Stephen Hemminger, dpdk-dev
Hi Nicolas
The following bbdev experimental symbols are present in both v21.05 and v19.11 release. These symbols should be considered for promotion to stable as part of the v22 ABI in DPDK 21.11, as they have been experimental for >= 2yrs at this point.
* rte_bbdev_allocate
* rte_bbdev_callback_register
* rte_bbdev_callback_unregister
* rte_bbdev_close
* rte_bbdev_count
* rte_bbdev_dec_op_alloc_bulk
* rte_bbdev_dec_op_free_bulk
* rte_bbdev_dequeue_dec_ops
* rte_bbdev_dequeue_enc_ops
* rte_bbdev_devices
* rte_bbdev_enc_op_alloc_bulk
* rte_bbdev_enc_op_free_bulk
* rte_bbdev_enqueue_dec_ops
* rte_bbdev_enqueue_enc_ops
* rte_bbdev_find_next
* rte_bbdev_get_named_dev
* rte_bbdev_info_get
* rte_bbdev_intr_enable
* rte_bbdev_is_valid
* rte_bbdev_op_pool_create
* rte_bbdev_op_type_str
* rte_bbdev_pmd_callback_process
* rte_bbdev_queue_configure
* rte_bbdev_queue_info_get
* rte_bbdev_queue_intr_ctl
* rte_bbdev_queue_intr_disable
* rte_bbdev_queue_intr_enable
* rte_bbdev_queue_start
* rte_bbdev_queue_stop
* rte_bbdev_release
* rte_bbdev_setup_queues
* rte_bbdev_start
* rte_bbdev_stats_get
* rte_bbdev_stats_reset
* rte_bbdev_stop
Ray K
^ permalink raw reply [relevance 3%]
* [dpdk-dev] Experimental symbols in ip_frag
@ 2021-06-24 10:34 3% Kinsella, Ray
0 siblings, 0 replies; 200+ results
From: Kinsella, Ray @ 2021-06-24 10:34 UTC (permalink / raw)
To: Ananyev, Konstantin, Thomas Monjalon, Stephen Hemminger, dpdk-dev
Hi Konstantin
The following ip_frag experimental symbols are present in both v21.05 and v19.11 release. These symbols should be considered for promotion to stable as part of the v22 ABI in DPDK 21.11, as they have been experimental for >= 2yrs at this point.
* rte_frag_table_del_expired_entries
Ray K
^ permalink raw reply [relevance 3%]
* [dpdk-dev] Experimental symbols in pipeline lib
@ 2021-06-24 10:34 3% Kinsella, Ray
0 siblings, 0 replies; 200+ results
From: Kinsella, Ray @ 2021-06-24 10:34 UTC (permalink / raw)
To: Cristian Dumitrescu, Thomas Monjalon, Stephen Hemminger, dpdk-dev
Hi Cristian,
The following pipeline experimental symbols are present in both v21.05 and v19.11 release. These symbols should be considered for promotion to stable as part of the v22 ABI in DPDK 21.11, as they have been experimental for >= 2yrs at this point.
* rte_port_in_action_create
* rte_port_in_action_fre
* rte_port_in_action_params_get
* rte_port_in_action_profile_action_register
* rte_port_in_action_profile_create
* rte_port_in_action_profile_free
* rte_port_in_action_profile_freeze
* rte_table_action_apply
* rte_table_action_create
* rte_table_action_dscp_table_update
* rte_table_action_free
* rte_table_action_meter_profile_add
* rte_table_action_meter_profile_delete
* rte_table_action_meter_read
* rte_table_action_profile_action_register
* rte_table_action_profile_create
* rte_table_action_profile_free
* rte_table_action_profile_freeze
* rte_table_action_stats_read
* rte_table_action_table_params_get,
* rte_table_action_time_read
* rte_table_action_ttl_read
* rte_table_action_crypto_sym_session_get
Ray K
^ permalink raw reply [relevance 3%]
* [dpdk-dev] Experimental symbols in rib lib
@ 2021-06-24 10:34 3% Kinsella, Ray
0 siblings, 0 replies; 200+ results
From: Kinsella, Ray @ 2021-06-24 10:34 UTC (permalink / raw)
To: Medvedkin, Vladimir, Thomas Monjalon, Stephen Hemminger, dpdk-dev
Hi Vladimir
The following rib experimental symbols are present in both v21.05 and v19.11 release. These symbols should be considered for promotion to stable as part of the v22 ABI in DPDK 21.11, as they have been experimental for >= 2yrs at this point.
* rte_rib_create,
* rte_rib_find_existing,
* rte_rib_free,
* rte_rib_get_depth,
* rte_rib_get_ext,
* rte_rib_get_ip,
* rte_rib_get_nh,
* rte_rib_get_nxt,
* rte_rib_insert,
* rte_rib_lookup,
* rte_rib_lookup_parent,
* rte_rib_lookup_exact,
* rte_rib_set_nh,
* rte_rib_remove,
* rte_rib6_create,
* rte_rib6_find_existing,
* rte_rib6_free,
* rte_rib6_get_depth,
* rte_rib6_get_ext,
* rte_rib6_get_ip,
* rte_rib6_get_nh,
* rte_rib6_get_nxt,
* rte_rib6_insert,
* rte_rib6_lookup,
* rte_rib6_lookup_parent,
* rte_rib6_lookup_exact,
* rte_rib6_set_nh,
* rte_rib6_remove
Ray K
^ permalink raw reply [relevance 3%]
* [dpdk-dev] Experimental symbols in cryptodev lib
@ 2021-06-24 10:33 3% Kinsella, Ray
0 siblings, 0 replies; 200+ results
From: Kinsella, Ray @ 2021-06-24 10:33 UTC (permalink / raw)
To: Declan Doherty, Thomas Monjalon, Stephen Hemminger, dpdk-dev
Hi Declan,
The following cryptodev experimental symbols are present in both v21.05 and v19.11 release. These symbols should be considered for promotion to stable as part of the v22 ABI in DPDK 21.11, as they have been experimental for >= 2yrs at this point.
* rte_cryptodev_asym_capability_get
* rte_cryptodev_asym_get_header_session_size
* rte_cryptodev_asym_get_private_session_size
* rte_cryptodev_asym_get_xform_enum
* rte_cryptodev_asym_session_clear
* rte_cryptodev_asym_session_create
* rte_cryptodev_asym_session_free
* rte_cryptodev_asym_session_init
* rte_cryptodev_asym_xform_capability_check_modlen
* rte_cryptodev_asym_xform_capability_check_optype
* rte_cryptodev_sym_get_existing_header_session_size
* rte_cryptodev_sym_session_get_user_data
* rte_cryptodev_sym_session_pool_create
* rte_cryptodev_sym_session_set_user_data
* rte_crypto_asym_op_strings
* rte_crypto_asym_xform_strings
Ray K
^ permalink raw reply [relevance 3%]
* [dpdk-dev] Experimental symbols in sched lib
@ 2021-06-24 10:33 3% Kinsella, Ray
2021-06-24 19:21 0% ` Singh, Jasvinder
0 siblings, 1 reply; 200+ results
From: Kinsella, Ray @ 2021-06-24 10:33 UTC (permalink / raw)
To: Cristian Dumitrescu, Thomas Monjalon, Stephen Hemminger, Singh,
Jasvinder, dpdk-dev
Hi Cristian & Jasvinder,
The following sched experimental symbols are present in both v21.05 and v19.11 release. These symbols should be considered for promotion to stable as part of the v22 ABI in DPDK 21.11, as they have been experimental for >= 2yrs at this point.
* rte_sched_subport_pipe_profile_add
Ray K
^ permalink raw reply [relevance 3%]
* [dpdk-dev] Experimental symbols in compressdev lib
@ 2021-06-24 10:32 3% Kinsella, Ray
2021-06-24 10:55 0% ` Trahe, Fiona
2021-06-25 7:49 0% ` David Marchand
0 siblings, 2 replies; 200+ results
From: Kinsella, Ray @ 2021-06-24 10:32 UTC (permalink / raw)
To: Fiona Trahe, Ashish Gupta, Thomas Monjalon, Stephen Hemminger, dpdk-dev
Hi Fiona & Ashish,
The following compressdev experimental symbols are present in both v21.05 and v19.11 release. These symbols should be considered for promotion to stable as part of the v22 ABI in DPDK 21.11, as they have been experimental for >= 2yrs at this point.
* rte_compressdev_capability_get
* rte_compressdev_close
* rte_compressdev_configure
* rte_compressdev_count
* rte_compressdev_dequeue_burst
* rte_compressdev_devices_get
* rte_compressdev_enqueue_burst
* rte_compressdev_get_dev_id
* rte_compressdev_get_feature_name
* rte_compressdev_info_get
* rte_compressdev_name_get
* rte_compressdev_pmd_allocate
* rte_compressdev_pmd_create
* rte_compressdev_pmd_destroy
* rte_compressdev_pmd_get_named_dev
* rte_compressdev_pmd_parse_input_args
* rte_compressdev_pmd_release_device
* rte_compressdev_private_xform_create
* rte_compressdev_private_xform_free
* rte_compressdev_queue_pair_count
* rte_compressdev_queue_pair_setup
* rte_compressdev_socket_id
* rte_compressdev_start
* rte_compressdev_stats_get
* rte_compressdev_stats_reset
* rte_compressdev_stop
* rte_compressdev_stream_create
* rte_compressdev_stream_free
* rte_comp_get_feature_name
* rte_comp_op_alloc
* rte_comp_op_bulk_alloc
* rte_comp_op_bulk_free
* rte_comp_op_free
* rte_comp_op_pool_create
Ray K
^ permalink raw reply [relevance 3%]
* [dpdk-dev] Experimental symbols in port lib
@ 2021-06-24 10:31 3% Kinsella, Ray
0 siblings, 0 replies; 200+ results
From: Kinsella, Ray @ 2021-06-24 10:31 UTC (permalink / raw)
To: Cristian Dumitrescu, Thomas Monjalon, Stephen Hemminger, dpdk-dev
Hi Cristian
The following port experimental symbols are present in both v21.05 and v19.11 release. These symbols should be considered for promotion to stable as part of the v22 ABI in DPDK 21.11, as they have been experimental for >= 2yrs at this point.
* rte_port_eventdev_writer_nodrop_ops
* rte_port_eventdev_writer_ops
Ray K
^ permalink raw reply [relevance 3%]
* [dpdk-dev] Experimental symbols in eal lib
@ 2021-06-24 10:31 3% Kinsella, Ray
2021-06-24 12:14 0% ` David Marchand
0 siblings, 1 reply; 200+ results
From: Kinsella, Ray @ 2021-06-24 10:31 UTC (permalink / raw)
To: Thomas Monjalon, Stephen Hemminger, Burakov, Anatoly, dpdk-dev
Hi Anatoly & Thomas,
The following eal experimental symbols are present in both v21.05 and v19.11 release. These symbols should be considered for promotion to stable as part of the v22 ABI in DPDK 21.11, as they have been experimental for >= 2yrs at this point.
* rte_mp_action_register
* rte_mp_action_unregister
* rte_mp_reply
* rte_mp_sendmsg
* rte_dev_event_callback_register
* rte_dev_event_callback_unregister
* rte_dev_event_monitor_start
* rte_dev_event_monitor_stop
* rte_fbarray_attach
* rte_fbarray_destroy
* rte_fbarray_detach
* rte_fbarray_dump_metadata
* rte_fbarray_find_contig_free
* rte_fbarray_find_contig_used
* rte_fbarray_find_idx
* rte_fbarray_find_next_free
* rte_fbarray_find_next_n_free
* rte_fbarray_find_next_n_used
* rte_fbarray_find_next_used
* rte_fbarray_get
* rte_fbarray_init
* rte_fbarray_is_used
* rte_fbarray_set_free
* rte_fbarray_set_used
* rte_log_register_type_and_pick_level
* rte_malloc_dump_heaps
* rte_mem_alloc_validator_register
* rte_mem_alloc_validator_unregister
* rte_mem_check_dma_mask
* rte_mem_event_callback_register
* rte_mem_event_callback_unregister
* rte_mem_iova2virt
* rte_mem_virt2memseg
* rte_mem_virt2memseg_list
* rte_memseg_contig_walk
* rte_memseg_list_walk
* rte_memseg_walk
* rte_mp_request_async
* rte_mp_request_sync
* rte_class_find
* rte_class_find_by_name
* rte_class_register
* rte_class_unregister
* rte_dev_iterator_init
* rte_dev_iterator_next
* rte_fbarray_find_prev_free
* rte_fbarray_find_prev_n_free
* rte_fbarray_find_prev_n_used
* rte_fbarray_find_prev_used
* rte_fbarray_find_rev_contig_free
* rte_fbarray_find_rev_contig_used
* rte_memseg_contig_walk_thread_unsafe
* rte_memseg_list_walk_thread_unsafe
* rte_memseg_walk_thread_unsafe
* rte_delay_us_sleep
* rte_dev_event_callback_process
* rte_dev_hotplug_handle_disable
* rte_dev_hotplug_handle_enable
* rte_malloc_heap_create
* rte_malloc_heap_destroy
* rte_malloc_heap_get_socket
* rte_malloc_heap_memory_add
* rte_malloc_heap_memory_attach
* rte_malloc_heap_memory_detach
* rte_malloc_heap_memory_remove
* rte_malloc_heap_socket_is_external
* rte_mem_check_dma_mask_thread_unsafe
* rte_mem_set_dma_mask
* rte_memseg_get_fd
* rte_memseg_get_fd_offset
* rte_memseg_get_fd_offset_thread_unsafe
* rte_memseg_get_fd_thread_unsafe
* rte_extmem_attach
* rte_extmem_detach
* rte_extmem_register
* rte_extmem_unregister
* rte_dev_dma_map
* rte_dev_dma_unmap
* rte_fbarray_find_biggest_free
* rte_fbarray_find_biggest_used
* rte_fbarray_find_rev_biggest_free
* rte_fbarray_find_rev_biggest_used
* rte_intr_callback_unregister_pending
* rte_realloc_socket
* rte_intr_ack
* rte_lcore_cpuset
* rte_lcore_to_cpu_id
* rte_mcfg_timer_lock
* rte_mcfg_timer_unlock
* rte_rand_max
Ray K
^ permalink raw reply [relevance 3%]
* [dpdk-dev] Experimental symbols in flow_classify lib
@ 2021-06-24 10:30 3% Kinsella, Ray
0 siblings, 0 replies; 200+ results
From: Kinsella, Ray @ 2021-06-24 10:30 UTC (permalink / raw)
To: Iremonger, Bernard, Thomas Monjalon, Stephen Hemminger, dpdk-dev
Hi Bernard,
The following flow_classify experimental symbols are present in both v21.05 and v19.11 release. These symbols should be considered for promotion to stable as part of the v22 ABI in DPDK 21.11, as they have been experimental for >= 2yrs at this point.
* rte_flow_classifier_create
* rte_flow_classifier_free
* rte_flow_classifier_query
* rte_flow_classify_table_create
* rte_flow_classify_table_entry_add
* rte_flow_classify_table_entry_delete
* rte_flow_classify_validate
Ray K
^ permalink raw reply [relevance 3%]
* [dpdk-dev] Experimental symbols in vhost lib
@ 2021-06-24 10:30 3% Kinsella, Ray
2021-06-24 11:04 0% ` Xia, Chenbo
0 siblings, 1 reply; 200+ results
From: Kinsella, Ray @ 2021-06-24 10:30 UTC (permalink / raw)
To: Maxime Coquelin, Chenbo Xia, Thomas Monjalon, Stephen Hemminger,
dpdk-dev
Hi Maxime and Chenbo,
The following vhost experimental symbols are present in both v21.05 and v19.11 release. These symbols should be considered for promotion to stable as part of the v22 ABI in DPDK 21.11, as they have been experimental for >= 2yrs at this point.
* rte_vhost_driver_get_protocol_features
* rte_vhost_driver_get_queue_num
* rte_vhost_crypto_create
* rte_vhost_crypto_free
* rte_vhost_crypto_fetch_requests
* rte_vhost_crypto_finalize_requests
* rte_vhost_crypto_set_zero_copy
* rte_vhost_va_from_guest_pa
* rte_vhost_extern_callback_register
* rte_vhost_driver_set_protocol_features
* rte_vhost_set_inflight_desc_split
* rte_vhost_set_inflight_desc_packed
* rte_vhost_set_last_inflight_io_split
* rte_vhost_set_last_inflight_io_packed
* rte_vhost_clr_inflight_desc_split
* rte_vhost_clr_inflight_desc_packed
* rte_vhost_get_vhost_ring_inflight
* rte_vhost_get_vring_base_from_inflight
Ray K
^ permalink raw reply [relevance 3%]
* [dpdk-dev] Experimental symbols in mbuf lib
@ 2021-06-24 10:29 3% Kinsella, Ray
0 siblings, 0 replies; 200+ results
From: Kinsella, Ray @ 2021-06-24 10:29 UTC (permalink / raw)
To: Olivier Matz, Thomas Monjalon, Stephen Hemminger, dpdk-dev
Hi Oliver,
The following mbuf experimental symbols are present in both v21.05 and v19.11 release. These symbols should be considered for promotion to stable as part of the v22 ABI in DPDK 21.11, as they have been experimental for >= 2yrs at this point.
* rte_mbuf_check
* rte_mbuf_dynfield_lookup
* rte_mbuf_dynfield_register
* rte_mbuf_dynfield_register_offset
* rte_mbuf_dynflag_lookup
* rte_mbuf_dynflag_register
* rte_mbuf_dynflag_register_bitnum
* rte_mbuf_dyn_dump
* rte_pktmbuf_copy
* rte_pktmbuf_free_bulk
Ray K
^ permalink raw reply [relevance 3%]
* [dpdk-dev] Experimental symbols in net lib
@ 2021-06-24 10:29 3% Kinsella, Ray
0 siblings, 0 replies; 200+ results
From: Kinsella, Ray @ 2021-06-24 10:29 UTC (permalink / raw)
To: Olivier Matz, Thomas Monjalon, Stephen Hemminger, dpdk-dev
Hi Oliver,
The following net experimental symbols are present in both v21.05 and v19.11 release. These symbols should be considered for promotion to stable as part of the v22 ABI in DPDK 21.11, as they have been experimental for >= 2yrs at this point.
* rte_net_make_rarp_packet
* rte_net_skip_ip6_ext
* rte_ether_unformat_addr
Ray K
^ permalink raw reply [relevance 3%]
* [dpdk-dev] Experimental symbols in security lib
@ 2021-06-24 10:28 3% Kinsella, Ray
2021-06-24 10:49 0% ` Kinsella, Ray
0 siblings, 1 reply; 200+ results
From: Kinsella, Ray @ 2021-06-24 10:28 UTC (permalink / raw)
To: Declan Doherty, Akhil Goyal, Thomas Monjalon, Stephen Hemminger,
dpdk-dev
Hi Declan and Goyal,
The following security experimental symbols are present in both v21.05 and v19.11 release. These symbols should be considered for promotion to stable as part of the v22 ABI in DPDK 21.11, as they have been experimental for >= 2yrs at this point.
* rte_security_get_userdata
* rte_security_session_stats_get
* rte_security_session_update
Ray K
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [PATCH v4 2/2] bus/auxiliary: introduce auxiliary bus
2021-06-24 6:37 3% ` Thomas Monjalon
@ 2021-06-24 8:42 3% ` Xueming(Steven) Li
0 siblings, 0 replies; 200+ results
From: Xueming(Steven) Li @ 2021-06-24 8:42 UTC (permalink / raw)
To: NBU-Contact-Thomas Monjalon
Cc: Parav Pandit, dev, Wang Haiyue, Kinsella Ray, david.marchand,
ferruh.yigit
Thanks for clarification, will update in next version.
________________________________
From: Thomas Monjalon <thomas@monjalon.net>
Sent: Thursday, June 24, 2021 2:37:19 PM
To: Xueming(Steven) Li <xuemingl@nvidia.com>
Cc: Parav Pandit <parav@nvidia.com>; dev@dpdk.org <dev@dpdk.org>; Wang Haiyue <haiyue.wang@intel.com>; Kinsella Ray <mdr@ashroe.eu>; david.marchand@redhat.com <david.marchand@redhat.com>; ferruh.yigit@intel.com <ferruh.yigit@intel.com>
Subject: Re: [dpdk-dev] [PATCH v4 2/2] bus/auxiliary: introduce auxiliary bus
23/06/2021 16:52, Xueming(Steven) Li:
> From: Thomas Monjalon <thomas@monjalon.net>
> > 23/06/2021 01:50, Xueming(Steven) Li:
> > > From: Thomas Monjalon <thomas@monjalon.net>
> > > > 13/06/2021 14:58, Xueming Li:
> > > > > --- /dev/null
> > > > > +++ b/drivers/bus/auxiliary/version.map
> > > > > @@ -0,0 +1,7 @@
> > > > > +EXPERIMENTAL {
> > > > > + global:
> > > > > +
> > > > > + # added in 21.08
> > > > > + rte_auxiliary_register;
> > > > > + rte_auxiliary_unregister;
> > > > > +};
> > > >
> > > > After more thoughts, shouldn't it be an internal symbol?
> > > > It is used only by DPDK drivers.
> > >
> > > So users will not be able to compose their own driver and register
> > > with auxiliary bus?z
> >
> > Yes, that's an interesting question actually.
> > We can continue with experimental/stable status of driver ABI, but we should invent a new ABI flag like DRIVER, so there is no stability
> > policy on such symbol.
>
> Not quite understand here, why we want to export the function but no ABI guarantee? the api shouldn't change frequently IMHO.
Sorry my message was not clear.
I am OK to keep "EXPERIMENTAL" in this patch.
But in future, we don't want to make driver interface as part
of the stable ABI because it makes evolution harder for no good reason:
nobody is asking for a stable interface with drivers.
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [PATCH v4 2/2] bus/auxiliary: introduce auxiliary bus
2021-06-23 14:52 3% ` Xueming(Steven) Li
@ 2021-06-24 6:37 3% ` Thomas Monjalon
2021-06-24 8:42 3% ` Xueming(Steven) Li
0 siblings, 1 reply; 200+ results
From: Thomas Monjalon @ 2021-06-24 6:37 UTC (permalink / raw)
To: Xueming(Steven) Li
Cc: Parav Pandit, dev, Wang Haiyue, Kinsella Ray, david.marchand,
ferruh.yigit
23/06/2021 16:52, Xueming(Steven) Li:
> From: Thomas Monjalon <thomas@monjalon.net>
> > 23/06/2021 01:50, Xueming(Steven) Li:
> > > From: Thomas Monjalon <thomas@monjalon.net>
> > > > 13/06/2021 14:58, Xueming Li:
> > > > > --- /dev/null
> > > > > +++ b/drivers/bus/auxiliary/version.map
> > > > > @@ -0,0 +1,7 @@
> > > > > +EXPERIMENTAL {
> > > > > + global:
> > > > > +
> > > > > + # added in 21.08
> > > > > + rte_auxiliary_register;
> > > > > + rte_auxiliary_unregister;
> > > > > +};
> > > >
> > > > After more thoughts, shouldn't it be an internal symbol?
> > > > It is used only by DPDK drivers.
> > >
> > > So users will not be able to compose their own driver and register
> > > with auxiliary bus?z
> >
> > Yes, that's an interesting question actually.
> > We can continue with experimental/stable status of driver ABI, but we should invent a new ABI flag like DRIVER, so there is no stability
> > policy on such symbol.
>
> Not quite understand here, why we want to export the function but no ABI guarantee? the api shouldn't change frequently IMHO.
Sorry my message was not clear.
I am OK to keep "EXPERIMENTAL" in this patch.
But in future, we don't want to make driver interface as part
of the stable ABI because it makes evolution harder for no good reason:
nobody is asking for a stable interface with drivers.
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [PATCH v4 2/2] bus/auxiliary: introduce auxiliary bus
2021-06-23 8:15 4% ` Thomas Monjalon
@ 2021-06-23 14:52 3% ` Xueming(Steven) Li
2021-06-24 6:37 3% ` Thomas Monjalon
0 siblings, 1 reply; 200+ results
From: Xueming(Steven) Li @ 2021-06-23 14:52 UTC (permalink / raw)
To: NBU-Contact-Thomas Monjalon
Cc: Parav Pandit, dev, Wang Haiyue, Kinsella Ray, david.marchand,
ferruh.yigit
> -----Original Message-----
> From: Thomas Monjalon <thomas@monjalon.net>
> Sent: Wednesday, June 23, 2021 4:15 PM
> To: Xueming(Steven) Li <xuemingl@nvidia.com>
> Cc: Parav Pandit <parav@nvidia.com>; dev@dpdk.org; Wang Haiyue <haiyue.wang@intel.com>; Kinsella Ray <mdr@ashroe.eu>;
> david.marchand@redhat.com; ferruh.yigit@intel.com
> Subject: Re: [dpdk-dev] [PATCH v4 2/2] bus/auxiliary: introduce auxiliary bus
>
> 23/06/2021 01:50, Xueming(Steven) Li:
> > From: Thomas Monjalon <thomas@monjalon.net>
> > > 13/06/2021 14:58, Xueming Li:
> > > > --- /dev/null
> > > > +++ b/drivers/bus/auxiliary/version.map
> > > > @@ -0,0 +1,7 @@
> > > > +EXPERIMENTAL {
> > > > + global:
> > > > +
> > > > + # added in 21.08
> > > > + rte_auxiliary_register;
> > > > + rte_auxiliary_unregister;
> > > > +};
> > >
> > > After more thoughts, shouldn't it be an internal symbol?
> > > It is used only by DPDK drivers.
> >
> > So users will not be able to compose their own driver and register
> > with auxiliary bus?z
>
> Yes, that's an interesting question actually.
> We can continue with experimental/stable status of driver ABI, but we should invent a new ABI flag like DRIVER, so there is no stability
> policy on such symbol.
Not quite understand here, why we want to export the function but no ABI guarantee? the api shouldn't change frequently IMHO.
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [PATCH v4 2/2] bus/auxiliary: introduce auxiliary bus
@ 2021-06-23 8:15 4% ` Thomas Monjalon
2021-06-23 14:52 3% ` Xueming(Steven) Li
0 siblings, 1 reply; 200+ results
From: Thomas Monjalon @ 2021-06-23 8:15 UTC (permalink / raw)
To: Xueming(Steven) Li
Cc: Parav Pandit, dev, Wang Haiyue, Kinsella Ray, david.marchand,
ferruh.yigit
23/06/2021 01:50, Xueming(Steven) Li:
> From: Thomas Monjalon <thomas@monjalon.net>
> > 13/06/2021 14:58, Xueming Li:
> > > --- /dev/null
> > > +++ b/drivers/bus/auxiliary/version.map
> > > @@ -0,0 +1,7 @@
> > > +EXPERIMENTAL {
> > > + global:
> > > +
> > > + # added in 21.08
> > > + rte_auxiliary_register;
> > > + rte_auxiliary_unregister;
> > > +};
> >
> > After more thoughts, shouldn't it be an internal symbol?
> > It is used only by DPDK drivers.
>
> So users will not be able to compose their own driver and register with auxiliary bus?z
Yes, that's an interesting question actually.
We can continue with experimental/stable status of driver ABI,
but we should invent a new ABI flag like DRIVER,
so there is no stability policy on such symbol.
^ permalink raw reply [relevance 4%]
* [dpdk-dev] [PATCH v1] doc: update ABI in MAINTAINERS file
@ 2021-06-22 15:50 12% Ray Kinsella
2021-06-25 8:08 7% ` Ferruh Yigit
0 siblings, 1 reply; 200+ results
From: Ray Kinsella @ 2021-06-22 15:50 UTC (permalink / raw)
To: dev; +Cc: stephen, ferruh.yigit, thomas, ktraynor, bruce.richardson, mdr
Update to ABI MAINTAINERS.
Signed-off-by: Ray Kinsella <mdr@ashroe.eu>
---
MAINTAINERS | 1 -
1 file changed, 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 5877a16971..dab8883a4f 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -117,7 +117,6 @@ F: .ci/
ABI Policy & Versioning
M: Ray Kinsella <mdr@ashroe.eu>
-M: Neil Horman <nhorman@tuxdriver.com>
F: lib/eal/include/rte_compat.h
F: lib/eal/include/rte_function_versioning.h
F: doc/guides/contributing/abi_*.rst
--
2.26.2
^ permalink raw reply [relevance 12%]
* [dpdk-dev] [PATCH v5] devtools: script to track map symbols
2021-06-18 16:36 5% [dpdk-dev] [PATCH] devtools: script to track map symbols Ray Kinsella
2021-06-21 15:25 6% ` [dpdk-dev] [PATCH v3] " Ray Kinsella
2021-06-21 15:35 6% ` [dpdk-dev] [PATCH v4] " Ray Kinsella
@ 2021-06-22 10:19 6% ` Ray Kinsella
2 siblings, 0 replies; 200+ results
From: Ray Kinsella @ 2021-06-22 10:19 UTC (permalink / raw)
To: dev; +Cc: stephen, ferruh.yigit, thomas, ktraynor, bruce.richardson, mdr
Script to track growth of stable and experimental symbols
over releases since v19.11.
Signed-off-by: Ray Kinsella <mdr@ashroe.eu>
---
v2: reworked to fix pylint errors
v3: sent with the correct in-reply-to
v4: fix typos picked up by the CI
v5: fix terminal_size & directory args
devtools/count_symbols.py | 262 ++++++++++++++++++++++++++++++++++++++
1 file changed, 262 insertions(+)
create mode 100755 devtools/count_symbols.py
diff --git a/devtools/count_symbols.py b/devtools/count_symbols.py
new file mode 100755
index 0000000000..96990f609f
--- /dev/null
+++ b/devtools/count_symbols.py
@@ -0,0 +1,262 @@
+#!/usr/bin/env python3
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2021 Intel Corporation
+'''Tool to count the number of symbols in each DPDK release'''
+from pathlib import Path
+import sys
+import os
+import subprocess
+import argparse
+import re
+import datetime
+
+try:
+ from parsley import makeGrammar
+except ImportError:
+ print('This script uses the package Parsley to parse C Mapfiles.\n'
+ 'This can be installed with \"pip install parsley".')
+ sys.exit()
+
+MAP_GRAMMAR = r"""
+
+ws = (' ' | '\r' | '\n' | '\t')*
+
+ABI_VER = ({})
+DPDK_VER = ('DPDK_' ABI_VER)
+ABI_NAME = ('INTERNAL' | 'EXPERIMENTAL' | DPDK_VER)
+comment = '#' (~'\n' anything)+ '\n'
+symbol = (~(';' | '}}' | '#') anything )+:c ';' -> ''.join(c)
+global = 'global:'
+local = 'local: *;'
+symbols = comment* symbol:s ws comment* -> s
+
+abi = (abi_section+):m -> dict(m)
+abi_section = (ws ABI_NAME:e ws '{{' ws global* (~local ws symbols)*:s ws local* ws '}}' ws DPDK_VER* ';' ws) -> (e,s)
+"""
+
+def get_abi_versions():
+ '''Returns a string of possible dpdk abi versions'''
+
+ year = datetime.date.today().year - 2000
+ tags = " |".join(['\'{}\''.format(i) \
+ for i in reversed(range(21, year + 1)) ])
+ tags = tags + ' | \'20.0.1\' | \'20.0\' | \'20\''
+
+ return tags
+
+def get_dpdk_releases():
+ '''Returns a list of dpdk release tags names since v19.11'''
+
+ year = datetime.date.today().year - 2000
+ year_range = "|".join("{}".format(i) for i in range(19,year + 1))
+ pattern = re.compile(r'^\"v(' + year_range + r')\.\d{2}\"$')
+
+ cmd = ['git', 'for-each-ref', '--sort=taggerdate', '--format', '"%(tag)"']
+ try:
+ result = subprocess.run(cmd, \
+ stdout=subprocess.PIPE, \
+ stderr=subprocess.PIPE,
+ check=True)
+ except subprocess.CalledProcessError:
+ print("Failed to interogate git for release tags")
+ sys.exit()
+
+
+ tags = result.stdout.decode('utf-8').split('\n')
+
+ # find the non-rcs between now and v19.11
+ tags = [ tag.replace('\"','') \
+ for tag in reversed(tags) \
+ if pattern.match(tag) ][:-3]
+
+ return tags
+
+def fix_directory_name(path):
+ '''Prepend librte to the source directory name'''
+ mapfilepath1 = str(path.parent.name)
+ mapfilepath2 = str(path.parents[1])
+ mapfilepath = mapfilepath2 + '/librte_' + mapfilepath1
+
+ return mapfilepath
+
+def directory_renamed(path, rel):
+ '''Fix removal of the librte_ from the directory names'''
+
+ mapfilepath = fix_directory_name(path)
+ tagfile = '{}:{}/{}'.format(rel, mapfilepath, path.name)
+
+ try:
+ result = subprocess.run(['git', 'show', tagfile], \
+ stdout=subprocess.PIPE, \
+ stderr=subprocess.PIPE,
+ check=True)
+ except subprocess.CalledProcessError:
+ result = None
+
+ return result
+
+def mapfile_renamed(path, rel):
+ '''Fix renaming of the map file'''
+ newfile = None
+
+ result = subprocess.run(['git', 'ls-tree', \
+ rel, str(path.parent) + '/'], \
+ stdout=subprocess.PIPE, \
+ stderr=subprocess.PIPE,
+ check=True)
+ dentries = result.stdout.decode('utf-8')
+ dentries = dentries.split('\n')
+
+ # filter entries looking for the map file
+ dentries = [dentry for dentry in dentries if dentry.endswith('.map')]
+ if len(dentries) > 1 or len(dentries) == 0:
+ return None
+
+ dparts = dentries[0].split('/')
+ newfile = dparts[len(dparts) - 1]
+
+ if newfile is not None:
+ tagfile = '{}:{}/{}'.format(rel, path.parent, newfile)
+
+ try:
+ result = subprocess.run(['git', 'show', tagfile], \
+ stdout=subprocess.PIPE, \
+ stderr=subprocess.PIPE,
+ check=True)
+ except subprocess.CalledProcessError:
+ result = None
+
+ else:
+ result = None
+
+ return result
+
+def mapfile_and_directory_renamed(path, rel):
+ '''Fix renaming of the map file & the source directory'''
+ mapfilepath = Path("{}/{}".format(fix_directory_name(path),path.name))
+
+ return mapfile_renamed(mapfilepath, rel)
+
+def get_terminal_rows():
+ '''Find the number of rows in the terminal'''
+
+ return os.get_terminal_size().lines
+
+class FormatOutput():
+ '''Format the output to supported formats'''
+ output_fmt = ""
+ column_fmt = ""
+
+ def __init__(self, format_output, dpdk_releases):
+ self.OUTPUT_FORMATS[format_output](self,dpdk_releases)
+ self.column_titles = ['mapfile'] + dpdk_releases
+
+ self.terminal_rows = get_terminal_rows()
+ self.row = 0
+
+ def set_terminal_output(self,dpdk_rel):
+ '''Set the output format to Tabbed Separated Values'''
+
+ self.output_fmt = '{:<50}' + \
+ ''.join(['{:<6}{:<6}'] * (len(dpdk_rel)))
+ self.column_fmt = '{:50}' + \
+ ''.join(['{:<12}'] * (len(dpdk_rel)))
+
+ def set_csv_output(self,dpdk_rel):
+ '''Set the output format to Comma Separated Values'''
+
+ self.output_fmt = '{},' + \
+ ','.join(['{},{}'] * (len(dpdk_rel)))
+ self.column_fmt = '{},' + \
+ ','.join(['{},'] * (len(dpdk_rel)))
+
+ def print_columns(self):
+ '''Print column rows with release names'''
+ print(self.column_fmt.format(*self.column_titles))
+ self.row += 1
+
+ def print_row(self,symbols):
+ '''Print row of symbol values'''
+ print(self.output_fmt.format(*symbols))
+ self.row += 1
+
+ if((self.terminal_rows>0) and ((self.row % self.terminal_rows) == 0)):
+ self.print_columns()
+
+ OUTPUT_FORMATS = { None: set_terminal_output, \
+ 'terminal': set_terminal_output, \
+ 'csv': set_csv_output }
+
+SRC_DIRECTORIES = 'drivers,lib'
+IGNORE_SECTIONS = ['EXPERIMENTAL','INTERNAL']
+FIX_STRATEGIES = [directory_renamed, \
+ mapfile_renamed, \
+ mapfile_and_directory_renamed]
+
+def count_release_symbols(map_parser, release, mapfile_path):
+ '''Count the symbols for a given release and mapfile'''
+ csym = [0] * 2
+ abi_sections = None
+
+ tagfile = '{}:{}'.format(release,mapfile_path)
+ try:
+ result = subprocess.run(['git', 'show', tagfile], \
+ stdout=subprocess.PIPE, \
+ stderr=subprocess.PIPE,
+ check=True)
+ except subprocess.CalledProcessError:
+ result = None
+
+ for fix_strategy in FIX_STRATEGIES:
+ if result is not None:
+ break
+ result = fix_strategy(mapfile_path, release)
+
+ if result is not None:
+ mapfile = result.stdout.decode('utf-8')
+ abi_sections = map_parser(mapfile).abi()
+
+ if abi_sections is not None:
+ # which versions are present, and we care about
+ found_ver = [ver \
+ for ver in abi_sections \
+ if ver not in IGNORE_SECTIONS]
+
+ for ver in found_ver:
+ csym[0] += len(abi_sections[ver])
+
+ # count experimental symbols
+ if 'EXPERIMENTAL' in abi_sections:
+ csym[1] = len(abi_sections['EXPERIMENTAL'])
+
+ return csym
+
+def main():
+ '''Main entry point'''
+
+ parser = argparse.ArgumentParser(description='Count symbols in DPDK Libs')
+ parser.add_argument('--format-output', choices=['terminal','csv'], \
+ default='terminal')
+ parser.add_argument('--directory', choices=SRC_DIRECTORIES.split(','),
+ default=SRC_DIRECTORIES)
+ args = parser.parse_args()
+
+ dpdk_releases = get_dpdk_releases()
+ format_output = FormatOutput(args.format_output, dpdk_releases)
+
+ map_grammar = MAP_GRAMMAR.format(get_abi_versions())
+ map_parser = makeGrammar(map_grammar, {})
+
+ format_output.print_columns()
+ for src_dir in args.directory.split(','):
+ for path in Path(src_dir).rglob('*.map'):
+ relsym = [str(path)]
+
+ for release in dpdk_releases:
+ csym = count_release_symbols(map_parser, release, path)
+ relsym += csym
+
+ format_output.print_row(relsym)
+
+if __name__ == '__main__':
+ main()
--
2.26.2
^ permalink raw reply [relevance 6%]
* Re: [dpdk-dev] [PATCH v1 1/2] devtools: add relative path support for ABI compatibility check
2021-06-01 1:56 17% ` [dpdk-dev] [PATCH v1 1/2] devtools: add " Feifei Wang
2021-06-22 2:08 4% ` [dpdk-dev] 回复: " Feifei Wang
@ 2021-06-22 9:19 4% ` Bruce Richardson
1 sibling, 0 replies; 200+ results
From: Bruce Richardson @ 2021-06-22 9:19 UTC (permalink / raw)
To: Feifei Wang; +Cc: dev, nd, Phil Yang, Juraj Linkeš, Ruifeng Wang
On Tue, Jun 01, 2021 at 09:56:52AM +0800, Feifei Wang wrote:
> From: Phil Yang <phil.yang@arm.com>
>
> Because dpdk guide does not limit the relative path for ABI
> compatibility check, users maybe set 'DPDK_ABI_REF_DIR' as a relative
> path:
>
> ~/dpdk/devtools$ DPDK_ABI_REF_VERSION=v19.11 DPDK_ABI_REF_DIR=build-gcc-shared
> ./test-meson-builds.sh
>
> And if the DESTDIR is not an absolute path, ninja complains:
> + install_target build-gcc-shared/v19.11/build build-gcc-shared/v19.11/build-gcc-shared
> + rm -rf build-gcc-shared/v19.11/build-gcc-shared
> + echo 'DESTDIR=build-gcc-shared/v19.11/build-gcc-shared ninja -C build-gcc-shared/v19.11/build install'
> + DESTDIR=build-gcc-shared/v19.11/build-gcc-shared
> + ninja -C build-gcc-shared/v19.11/build install
> ...
> ValueError: dst_dir must be absolute, got build-gcc-shared/v19.11/build-gcc-shared/usr/local/share/dpdk/
> examples/bbdev_app
> ...
> Error: install directory 'build-gcc-shared/v19.11/build-gcc-shared' does not exist.
>
> To fix this, add relative path support using 'readlink -f'.
>
> Signed-off-by: Phil Yang <phil.yang@arm.com>
> Signed-off-by: Feifei Wang <feifei.wang2@arm.com>
> Reviewed-by: Juraj Linkeš <juraj.linkes@pantheon.tech>
> Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
> ---
> devtools/test-meson-builds.sh | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/devtools/test-meson-builds.sh b/devtools/test-meson-builds.sh
> index daf817ac3e..43b906598d 100755
> --- a/devtools/test-meson-builds.sh
> +++ b/devtools/test-meson-builds.sh
> @@ -168,7 +168,8 @@ build () # <directory> <target cc | cross file> <ABI check> [meson options]
> config $srcdir $builds_dir/$targetdir $cross --werror $*
> compile $builds_dir/$targetdir
> if [ -n "$DPDK_ABI_REF_VERSION" -a "$abicheck" = ABI ] ; then
> - abirefdir=${DPDK_ABI_REF_DIR:-reference}/$DPDK_ABI_REF_VERSION
> + abirefdir=$(readlink -f \
> + ${DPDK_ABI_REF_DIR:-reference}/$DPDK_ABI_REF_VERSION)
> if [ ! -d $abirefdir/$targetdir ]; then
> # clone current sources
> if [ ! -d $abirefdir/src ]; then
This looks a simple enough change.
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
^ permalink raw reply [relevance 4%]
* [dpdk-dev] 回复: [PATCH v1 1/2] devtools: add relative path support for ABI compatibility check
2021-06-01 1:56 17% ` [dpdk-dev] [PATCH v1 1/2] devtools: add " Feifei Wang
@ 2021-06-22 2:08 4% ` Feifei Wang
2021-06-22 9:19 4% ` [dpdk-dev] " Bruce Richardson
1 sibling, 0 replies; 200+ results
From: Feifei Wang @ 2021-06-22 2:08 UTC (permalink / raw)
To: Feifei Wang, Bruce Richardson
Cc: dev, nd, Phil Yang, Juraj Linkeš, Ruifeng Wang, nd
Hi, Bruce
Would you please help review this patch series?
Thanks.
Best Regards
Feifei
> -----邮件原件-----
> 发件人: Feifei Wang <feifei.wang2@arm.com>
> 发送时间: 2021年6月1日 9:57
> 收件人: Bruce Richardson <bruce.richardson@intel.com>
> 抄送: dev@dpdk.org; nd <nd@arm.com>; Phil Yang <Phil.Yang@arm.com>;
> Feifei Wang <Feifei.Wang2@arm.com>; Juraj Linkeš
> <juraj.linkes@pantheon.tech>; Ruifeng Wang <Ruifeng.Wang@arm.com>
> 主题: [PATCH v1 1/2] devtools: add relative path support for ABI
> compatibility check
>
> From: Phil Yang <phil.yang@arm.com>
>
> Because dpdk guide does not limit the relative path for ABI compatibility
> check, users maybe set 'DPDK_ABI_REF_DIR' as a relative
> path:
>
> ~/dpdk/devtools$ DPDK_ABI_REF_VERSION=v19.11
> DPDK_ABI_REF_DIR=build-gcc-shared ./test-meson-builds.sh
>
> And if the DESTDIR is not an absolute path, ninja complains:
> + install_target build-gcc-shared/v19.11/build
> + build-gcc-shared/v19.11/build-gcc-shared
> + rm -rf build-gcc-shared/v19.11/build-gcc-shared
> + echo 'DESTDIR=build-gcc-shared/v19.11/build-gcc-shared ninja -C build-gcc-
> shared/v19.11/build install'
> + DESTDIR=build-gcc-shared/v19.11/build-gcc-shared
> + ninja -C build-gcc-shared/v19.11/build install
> ...
> ValueError: dst_dir must be absolute, got build-gcc-shared/v19.11/build-gcc-
> shared/usr/local/share/dpdk/
> examples/bbdev_app
> ...
> Error: install directory 'build-gcc-shared/v19.11/build-gcc-shared' does not
> exist.
>
> To fix this, add relative path support using 'readlink -f'.
>
> Signed-off-by: Phil Yang <phil.yang@arm.com>
> Signed-off-by: Feifei Wang <feifei.wang2@arm.com>
> Reviewed-by: Juraj Linkeš <juraj.linkes@pantheon.tech>
> Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
> ---
> devtools/test-meson-builds.sh | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/devtools/test-meson-builds.sh b/devtools/test-meson-builds.sh
> index daf817ac3e..43b906598d 100755
> --- a/devtools/test-meson-builds.sh
> +++ b/devtools/test-meson-builds.sh
> @@ -168,7 +168,8 @@ build () # <directory> <target cc | cross file> <ABI
> check> [meson options]
> config $srcdir $builds_dir/$targetdir $cross --werror $*
> compile $builds_dir/$targetdir
> if [ -n "$DPDK_ABI_REF_VERSION" -a "$abicheck" = ABI ] ; then
> - abirefdir=${DPDK_ABI_REF_DIR:-
> reference}/$DPDK_ABI_REF_VERSION
> + abirefdir=$(readlink -f \
> + ${DPDK_ABI_REF_DIR:-
> reference}/$DPDK_ABI_REF_VERSION)
> if [ ! -d $abirefdir/$targetdir ]; then
> # clone current sources
> if [ ! -d $abirefdir/src ]; then
> --
> 2.25.1
^ permalink raw reply [relevance 4%]
* [dpdk-dev] [PATCH v4] devtools: script to track map symbols
2021-06-18 16:36 5% [dpdk-dev] [PATCH] devtools: script to track map symbols Ray Kinsella
2021-06-21 15:25 6% ` [dpdk-dev] [PATCH v3] " Ray Kinsella
@ 2021-06-21 15:35 6% ` Ray Kinsella
2021-06-22 10:19 6% ` [dpdk-dev] [PATCH v5] " Ray Kinsella
2 siblings, 0 replies; 200+ results
From: Ray Kinsella @ 2021-06-21 15:35 UTC (permalink / raw)
To: dev; +Cc: stephen, ferruh.yigit, thomas, ktraynor, bruce.richardson, mdr
Script to track growth of stable and experimental symbols
over releases since v19.11.
Signed-off-by: Ray Kinsella <mdr@ashroe.eu>
---
v2: reworked to fix pylint errors
v3: sent with the correct in-reply-to
v4: fix typos picked up by the CI
devtools/count_symbols.py | 262 ++++++++++++++++++++++++++++++++++++++
1 file changed, 262 insertions(+)
create mode 100755 devtools/count_symbols.py
diff --git a/devtools/count_symbols.py b/devtools/count_symbols.py
new file mode 100755
index 0000000000..6194df0318
--- /dev/null
+++ b/devtools/count_symbols.py
@@ -0,0 +1,262 @@
+#!/usr/bin/env python3
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2021 Intel Corporation
+'''Tool to count the number of symbols in each DPDK release'''
+from pathlib import Path
+import sys
+import os
+import subprocess
+import argparse
+import re
+import datetime
+
+try:
+ from parsley import makeGrammar
+except ImportError:
+ print('This script uses the package Parsley to parse C Mapfiles.\n'
+ 'This can be installed with \"pip install parsley".')
+ sys.exit()
+
+MAP_GRAMMAR = r"""
+
+ws = (' ' | '\r' | '\n' | '\t')*
+
+ABI_VER = ({})
+DPDK_VER = ('DPDK_' ABI_VER)
+ABI_NAME = ('INTERNAL' | 'EXPERIMENTAL' | DPDK_VER)
+comment = '#' (~'\n' anything)+ '\n'
+symbol = (~(';' | '}}' | '#') anything )+:c ';' -> ''.join(c)
+global = 'global:'
+local = 'local: *;'
+symbols = comment* symbol:s ws comment* -> s
+
+abi = (abi_section+):m -> dict(m)
+abi_section = (ws ABI_NAME:e ws '{{' ws global* (~local ws symbols)*:s ws local* ws '}}' ws DPDK_VER* ';' ws) -> (e,s)
+"""
+
+def get_abi_versions():
+ '''Returns a string of possible dpdk abi versions'''
+
+ year = datetime.date.today().year - 2000
+ tags = " |".join(['\'{}\''.format(i) \
+ for i in reversed(range(21, year + 1)) ])
+ tags = tags + ' | \'20.0.1\' | \'20.0\' | \'20\''
+
+ return tags
+
+def get_dpdk_releases():
+ '''Returns a list of dpdk release tags names since v19.11'''
+
+ year = datetime.date.today().year - 2000
+ year_range = "|".join("{}".format(i) for i in range(19,year + 1))
+ pattern = re.compile(r'^\"v(' + year_range + r')\.\d{2}\"$')
+
+ cmd = ['git', 'for-each-ref', '--sort=taggerdate', '--format', '"%(tag)"']
+ try:
+ result = subprocess.run(cmd, \
+ stdout=subprocess.PIPE, \
+ stderr=subprocess.PIPE,
+ check=True)
+ except subprocess.CalledProcessError:
+ print("Failed to interogate git for release tags")
+ sys.exit()
+
+ tags = result.stdout.decode('utf-8').split('\n')
+
+ # find the non-rcs between now and v19.11
+ tags = [ tag.replace('\"','') \
+ for tag in reversed(tags) \
+ if pattern.match(tag) ][:-3]
+
+ return tags
+
+def fix_directory_name(path):
+ '''Prepend librte to the source directory name'''
+ mapfilepath1 = str(path.parent.name)
+ mapfilepath2 = str(path.parents[1])
+ mapfilepath = mapfilepath2 + '/librte_' + mapfilepath1
+
+ return mapfilepath
+
+def directory_renamed(path, rel):
+ '''Fix removal of the librte_ from the directory names'''
+
+ mapfilepath = fix_directory_name(path)
+ tagfile = '{}:{}/{}'.format(rel, mapfilepath, path.name)
+
+ try:
+ result = subprocess.run(['git', 'show', tagfile], \
+ stdout=subprocess.PIPE, \
+ stderr=subprocess.PIPE,
+ check=True)
+ except subprocess.CalledProcessError:
+ result = None
+
+ return result
+
+def mapfile_renamed(path, rel):
+ '''Fix renaming of the map file'''
+ newfile = None
+
+ result = subprocess.run(['git', 'ls-tree', \
+ rel, str(path.parent) + '/'], \
+ stdout=subprocess.PIPE, \
+ stderr=subprocess.PIPE,
+ check=True)
+ dentries = result.stdout.decode('utf-8')
+ dentries = dentries.split('\n')
+
+ # filter entries looking for the map file
+ dentries = [dentry for dentry in dentries if dentry.endswith('.map')]
+ if len(dentries) > 1 or len(dentries) == 0:
+ return None
+
+ dparts = dentries[0].split('/')
+ newfile = dparts[len(dparts) - 1]
+
+ if newfile is not None:
+ tagfile = '{}:{}/{}'.format(rel, path.parent, newfile)
+
+ try:
+ result = subprocess.run(['git', 'show', tagfile], \
+ stdout=subprocess.PIPE, \
+ stderr=subprocess.PIPE,
+ check=True)
+ except subprocess.CalledProcessError:
+ result = None
+
+ else:
+ result = None
+
+ return result
+
+def mapfile_and_directory_renamed(path, rel):
+ '''Fix renaming of the map file & the source directory'''
+ mapfilepath = Path("{}/{}".format(fix_directory_name(path),path.name))
+
+ return mapfile_renamed(mapfilepath, rel)
+
+def get_terminal_rows():
+ '''Find the number of rows in the terminal'''
+
+ rows, _ = os.popen('stty size', 'r').read().split()
+ return int(rows)
+
+class FormatOutput():
+ '''Format the output to supported formats'''
+ output_fmt = ""
+ column_fmt = ""
+
+ def __init__(self, format_output, dpdk_releases):
+ self.OUTPUT_FORMATS[format_output](self,dpdk_releases)
+ self.column_titles = ['mapfile'] + dpdk_releases
+
+ self.terminal_rows = get_terminal_rows()
+ self.row = 0
+
+ def set_terminal_output(self,dpdk_rel):
+ '''Set the output format to Tabbed Separated Values'''
+
+ self.output_fmt = '{:<50}' + \
+ ''.join(['{:<6}{:<6}'] * (len(dpdk_rel)))
+ self.column_fmt = '{:50}' + \
+ ''.join(['{:<12}'] * (len(dpdk_rel)))
+
+ def set_csv_output(self,dpdk_rel):
+ '''Set the output format to Comma Separated Values'''
+
+ self.output_fmt = '{},' + \
+ ','.join(['{},{}'] * (len(dpdk_rel)))
+ self.column_fmt = '{},' + \
+ ','.join(['{},'] * (len(dpdk_rel)))
+
+ def print_columns(self):
+ '''Print column rows with release names'''
+ print(self.column_fmt.format(*self.column_titles))
+ self.row += 1
+
+ def print_row(self,symbols):
+ '''Print row of symbol values'''
+ print(self.output_fmt.format(*symbols))
+ self.row += 1
+
+ if((self.terminal_rows>0) and ((self.row % self.terminal_rows) == 0)):
+ self.print_columns()
+
+ OUTPUT_FORMATS = { None: set_terminal_output, \
+ 'terminal': set_terminal_output, \
+ 'csv': set_csv_output }
+
+SRC_DIRECTORIES = 'drivers, lib'
+IGNORE_SECTIONS = ['EXPERIMENTAL','INTERNAL']
+FIX_STRATEGIES = [directory_renamed, \
+ mapfile_renamed, \
+ mapfile_and_directory_renamed]
+
+def count_release_symbols(map_parser, release, mapfile_path):
+ '''Count the symbols for a given release and mapfile'''
+ csym = [0] * 2
+ abi_sections = None
+
+ tagfile = '{}:{}'.format(release,mapfile_path)
+ try:
+ result = subprocess.run(['git', 'show', tagfile], \
+ stdout=subprocess.PIPE, \
+ stderr=subprocess.PIPE,
+ check=True)
+ except subprocess.CalledProcessError:
+ result = None
+
+ for fix_strategy in FIX_STRATEGIES:
+ if result is not None:
+ break
+ result = fix_strategy(mapfile_path, release)
+
+ if result is not None:
+ mapfile = result.stdout.decode('utf-8')
+ abi_sections = map_parser(mapfile).abi()
+
+ if abi_sections is not None:
+ # which versions are present, and we care about
+ found_ver = [ver \
+ for ver in abi_sections \
+ if ver not in IGNORE_SECTIONS]
+
+ for ver in found_ver:
+ csym[0] += len(abi_sections[ver])
+
+ # count experimental symbols
+ if 'EXPERIMENTAL' in abi_sections:
+ csym[1] = len(abi_sections['EXPERIMENTAL'])
+
+ return csym
+
+def main():
+ '''Main entry point'''
+
+ parser = argparse.ArgumentParser(description='Count symbols in DPDK Libs')
+ parser.add_argument('--format-output', choices=['terminal','csv'], \
+ default='terminal')
+ parser.add_argument('--directory', choices=SRC_DIRECTORIES,
+ default=SRC_DIRECTORIES)
+ args = parser.parse_args()
+
+ dpdk_releases = get_dpdk_releases()
+ format_output = FormatOutput(args.format_output, dpdk_releases)
+
+ map_grammar = MAP_GRAMMAR.format(get_abi_versions())
+ map_parser = makeGrammar(map_grammar, {})
+
+ format_output.print_columns()
+ for src_dir in args.directory.split(','):
+ for path in Path(src_dir).rglob('*.map'):
+ relsym = [str(path)]
+
+ for release in dpdk_releases:
+ csym = count_release_symbols(map_parser, release, path)
+ relsym += csym
+
+ format_output.print_row(relsym)
+
+if __name__ == '__main__':
+ main()
--
2.26.2
^ permalink raw reply [relevance 6%]
* Re: [dpdk-dev] [PATCH] parray: introduce internal API for dynamic arrays
2021-06-21 15:32 0% ` Ferruh Yigit
@ 2021-06-21 15:37 0% ` Ananyev, Konstantin
0 siblings, 0 replies; 200+ results
From: Ananyev, Konstantin @ 2021-06-21 15:37 UTC (permalink / raw)
To: Yigit, Ferruh, Thomas Monjalon, Richardson, Bruce
Cc: Morten Brørup, dev, olivier.matz, andrew.rybchenko,
honnappa.nagarahalli, jerinj, gakhil
>
> On 6/21/2021 3:42 PM, Ananyev, Konstantin wrote:
> >
> >>>>>>>> One more thought here - if we are talking about rte_ethdev[] in particular, I think we can:
> >>>>>>>> 1. move public function pointers (rx_pkt_burst(), etc.) from rte_ethdev into a separate flat array.
> >>>>>>>> We can keep it public to still use inline functions for 'fast' calls rte_eth_rx_burst(), etc. to avoid
> >>>>>>>> any regressions.
> >>>>>>>> That could still be flat array with max_size specified at application startup.
> >>>>>>>> 2. Hide rest of rte_ethdev struct in .c.
> >>>>>>>> That will allow us to change the struct itself and the whole rte_ethdev[] table in a way we like
> >>>>>>>> (flat array, vector, hash, linked list) without ABI/API breakages.
> >>>>>>>>
> >>>>>>>> Yes, it would require all PMDs to change prototype for pkt_rx_burst() function
> >>>>>>>> (to accept port_id, queue_id instead of queue pointer), but the change is mechanical one.
> >>>>>>>> Probably some macro can be provided to simplify it.
> >>>>>>>>
> >>>>>>>
> >>>>>>> We are already planning some tasks for ABI stability for v21.11, I think
> >>>>>>> splitting 'struct rte_eth_dev' can be part of that task, it enables hiding more
> >>>>>>> internal data.
> >>>>>>
> >>>>>> Ok, sounds good.
> >>>>>>
> >>>>>>>
> >>>>>>>> The only significant complication I can foresee with implementing that approach -
> >>>>>>>> we'll need a an array of 'fast' function pointers per queue, not per device as we have now
> >>>>>>>> (to avoid extra indirection for callback implementation).
> >>>>>>>> Though as a bonus we'll have ability to use different RX/TX funcions per queue.
> >>>>>>>>
> >>>>>>>
> >>>>>>> What do you think split Rx/Tx callback into its own struct too?
> >>>>>>>
> >>>>>>> Overall 'rte_eth_dev' can be split into three as:
> >>>>>>> 1. rte_eth_dev
> >>>>>>> 2. rte_eth_dev_burst
> >>>>>>> 3. rte_eth_dev_cb
> >>>>>>>
> >>>>>>> And we can hide 1 from applications even with the inline functions.
> >>>>>>
> >>>>>> As discussed off-line, I think:
> >>>>>> it is possible.
> >>>>>> My absolute preference would be to have just 1/2 (with CB hidden).
> >>>>>
> >>>>> How can we hide the callbacks since they are used by inline burst functions.
> >>>>
> >>>> I probably I owe a better explanation to what I meant in first mail.
> >>>> Otherwise it sounds confusing.
> >>>> I'll try to write a more detailed one in next few days.
> >>>
> >>> Actually I gave it another thought over weekend, and might be we can
> >>> hide rte_eth_dev_cb even in a simpler way. I'd use eth_rx_burst() as
> >>> an example, but the same principle applies to other 'fast' functions.
> >>>
> >>> 1. Needed changes for PMDs rx_pkt_burst():
> >>> a) change function prototype to accept 'uint16_t port_id' and 'uint16_t queue_id',
> >>> instead of current 'void *'.
> >>> b) Each PMD rx_pkt_burst() will have to call rte_eth_rx_epilog() function at return.
> >>> This inline function will do all CB calls for that queue.
> >>>
> >>> To be more specific, let say we have some PMD: xyz with RX function:
> >>>
> >>> uint16_t
> >>> xyz_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
> >>> {
> >>> struct xyz_rx_queue *rxq = rx_queue;
> >>> uint16_t nb_rx = 0;
> >>>
> >>> /* do actual stuff here */
> >>> ....
> >>> return nb_rx;
> >>> }
> >>>
> >>> It will be transformed to:
> >>>
> >>> uint16_t
> >>> xyz_recv_pkts(uint16_t port_id, uint16_t queue_id, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
> >>> {
> >>> struct xyz_rx_queue *rxq;
> >>> uint16_t nb_rx;
> >>>
> >>> rxq = _rte_eth_rx_prolog(port_id, queue_id);
> >>> if (rxq == NULL)
> >>> return 0;
> >>> nb_rx = _xyz_real_recv_pkts(rxq, rx_pkts, nb_pkts);
> >>> return _rte_eth_rx_epilog(port_id, queue_id, rx_pkts, nb_pkts);
> >>> }
> >>>
> >>> And somewhere in ethdev_private.h:
> >>>
> >>> static inline void *
> >>> _rte_eth_rx_prolog(uint16_t port_id, uint16_t queue_id);
> >>> {
> >>> struct rte_eth_dev *dev = &rte_eth_devices[port_id];
> >>>
> >>> #ifdef RTE_ETHDEV_DEBUG_RX
> >>> RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
> >>> RTE_FUNC_PTR_OR_ERR_RET(*dev->rx_pkt_burst, NULL);
> >>>
> >>> if (queue_id >= dev->data->nb_rx_queues) {
> >>> RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
> >>> return NULL;
> >>> }
> >>> #endif
> >>> return dev->data->rx_queues[queue_id];
> >>> }
> >>>
> >>> static inline uint16_t
> >>> _rte_eth_rx_epilog(uint16_t port_id, uint16_t queue_id, struct rte_mbuf **rx_pkts, const uint16_t nb_pkts);
> >>> {
> >>> struct rte_eth_dev *dev = &rte_eth_devices[port_id];
> >>>
> >>> #ifdef RTE_ETHDEV_RXTX_CALLBACKS
> >>> struct rte_eth_rxtx_callback *cb;
> >>>
> >>> /* __ATOMIC_RELEASE memory order was used when the
> >>> * call back was inserted into the list.
> >>> * Since there is a clear dependency between loading
> >>> * cb and cb->fn/cb->next, __ATOMIC_ACQUIRE memory order is
> >>> * not required.
> >>> */
> >>> cb = __atomic_load_n(&dev->post_rx_burst_cbs[queue_id],
> >>> __ATOMIC_RELAXED);
> >>>
> >>> if (unlikely(cb != NULL)) {
> >>> do {
> >>> nb_rx = cb->fn.rx(port_id, queue_id, rx_pkts, nb_rx,
> >>> nb_pkts, cb->param);
> >>> cb = cb->next;
> >>> } while (cb != NULL);
> >>> }
> >>> #endif
> >>>
> >>> rte_ethdev_trace_rx_burst(port_id, queue_id, (void **)rx_pkts, nb_rx);
> >>> return nb_rx;
> >>> }
> >>>
> >>> Now, as you said above, in rte_ethdev.h we will keep only a flat array
> >>> with pointers to 'fast' functions:
> >>> struct {
> >>> eth_rx_burst_t rx_pkt_burst
> >>> eth_tx_burst_t tx_pkt_burst;
> >>> eth_tx_prep_t tx_pkt_prepare;
> >>> .....
> >>> } rte_eth_dev_burst[];
> >>>
> >>> And rte_eth_rx_burst() will look like:
> >>>
> >>> static inline uint16_t
> >>> rte_eth_rx_burst(uint16_t port_id, uint16_t queue_id,
> >>> struct rte_mbuf **rx_pkts, const uint16_t nb_pkts)
> >>> {
> >>> if (port_id >= RTE_MAX_ETHPORTS)
> >>> return 0;
> >>> return rte_eth_dev_burst[port_id](port_id, queue_id, rx_pkts, nb_pkts);
> >>> }
> >>>
> >>> Yes, it will require changes in *all* PMDs, but as I said before the changes will be a mechanic ones.
> >>>
> >>
> >> I did not like the idea to push to calling Rx/TX callbacks responsibility to the
> >> drivers, I think it should be in the ethdev layer.
> >
> > Well, I'd say it is an ethdev layer function that has to be called by PMD 😊
> >
> >>
> >> What about making 'rte_eth_rx_epilog' an API and call from 'rte_eth_rx_burst()',
> >> which will add another function call for Rx/Tx callback but shouldn't affect the
> >> Rx/Tx burst.
> >
> > But then we either need to expose call-back information to the user or pay the penalty
> > for extra function call, correct?
> >
>
> Right. As a middle ground, we can keep Rx/Tx burst functions as inline, but have
> the Rx/Tx callback part of it as function, so get the hit only for callbacks.
To avoid the hit we need to expose CB data to the user.
At least number of call-backs currently installed for each queue.
^ permalink raw reply [relevance 0%]
* [dpdk-dev] [PATCH v3] devtools: script to track map symbols
2021-06-18 16:36 5% [dpdk-dev] [PATCH] devtools: script to track map symbols Ray Kinsella
@ 2021-06-21 15:25 6% ` Ray Kinsella
2021-06-21 15:35 6% ` [dpdk-dev] [PATCH v4] " Ray Kinsella
2021-06-22 10:19 6% ` [dpdk-dev] [PATCH v5] " Ray Kinsella
2 siblings, 0 replies; 200+ results
From: Ray Kinsella @ 2021-06-21 15:25 UTC (permalink / raw)
To: dev; +Cc: stephen, ferruh.yigit, thomas, ktraynor, bruce.richardson, mdr
Script to track growth of stable and experimental symbols
over releases since v19.11.
Signed-off-by: Ray Kinsella <mdr@ashroe.eu>
---
v2: reworked to fix pylint errors
v3: sent with the current in-reply-to
devtools/count_symbols.py | 262 ++++++++++++++++++++++++++++++++++++++
1 file changed, 262 insertions(+)
create mode 100755 devtools/count_symbols.py
diff --git a/devtools/count_symbols.py b/devtools/count_symbols.py
new file mode 100755
index 0000000000..30be09754f
--- /dev/null
+++ b/devtools/count_symbols.py
@@ -0,0 +1,262 @@
+#!/usr/bin/env python3
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2021 Intel Corporation
+'''Tool to count the number of symbols in each DPDK release'''
+from pathlib import Path
+import sys
+import os
+import subprocess
+import argparse
+import re
+import datetime
+
+try:
+ from parsley import makeGrammar
+except ImportError:
+ print('This script uses the package Parsley to parse C Mapfiles.\n'
+ 'This can be installed with \"pip install parsley".')
+ sys.exit()
+
+MAP_GRAMMAR = r"""
+
+ws = (' ' | '\r' | '\n' | '\t')*
+
+ABI_VER = ({})
+DPDK_VER = ('DPDK_' ABI_VER)
+ABI_NAME = ('INTERNAL' | 'EXPERIMENTAL' | DPDK_VER)
+comment = '#' (~'\n' anything)+ '\n'
+symbol = (~(';' | '}}' | '#') anything )+:c ';' -> ''.join(c)
+global = 'global:'
+local = 'local: *;'
+symbols = comment* symbol:s ws comment* -> s
+
+abi = (abi_section+):m -> dict(m)
+abi_section = (ws ABI_NAME:e ws '{{' ws global* (~local ws symbols)*:s ws local* ws '}}' ws DPDK_VER* ';' ws) -> (e,s)
+"""
+
+def get_abi_versions():
+ '''Returns a string of possible dpdk abi versions'''
+
+ year = datetime.date.today().year - 2000
+ tags = " |".join(['\'{}\''.format(i) \
+ for i in reversed(range(21, year + 1)) ])
+ tags = tags + ' | \'20.0.1\' | \'20.0\' | \'20\''
+
+ return tags
+
+def get_dpdk_releases():
+ '''Returns a list of dpdk release tags names since v19.11'''
+
+ year = datetime.date.today().year - 2000
+ year_range = "|".join("{}".format(i) for i in range(19,year + 1))
+ pattern = re.compile(r'^\"v(' + year_range + r')\.\d{2}\"$')
+
+ cmd = ['git', 'for-each-ref', '--sort=taggerdate', '--format', '"%(tag)"']
+ try:
+ result = subprocess.run(cmd, \
+ stdout=subprocess.PIPE, \
+ stderr=subprocess.PIPE,
+ check=True)
+ except subprocess.CalledProcessError:
+ print("Failed to interogate git for release tags")
+ sys.exit()
+
+ tags = result.stdout.decode('utf-8').split('\n')
+
+ # find the non-rcs between now and v19.11
+ tags = [ tag.replace('\"','') \
+ for tag in reversed(tags) \
+ if pattern.match(tag) ][:-3]
+
+ return tags
+
+def fix_directory_name(path):
+ '''Prepend librte to the source directory name'''
+ mapfilepath1 = str(path.parent.name)
+ mapfilepath2 = str(path.parents[1])
+ mapfilepath = mapfilepath2 + '/librte_' + mapfilepath1
+
+ return mapfilepath
+
+def directory_renamed(path, rel):
+ '''Fix removal of the librte_ from the directory names'''
+
+ mapfilepath = fix_directory_name(path)
+ tagfile = '{}:{}/{}'.format(rel, mapfilepath, path.name)
+
+ try:
+ result = subprocess.run(['git', 'show', tagfile], \
+ stdout=subprocess.PIPE, \
+ stderr=subprocess.PIPE,
+ check=True)
+ except subprocess.CalledProcessError:
+ result = None
+
+ return result
+
+def mapfile_renamed(path, rel):
+ '''Fix renaming of map files'''
+ newfile = None
+
+ result = subprocess.run(['git', 'ls-tree', \
+ rel, str(path.parent) + '/'], \
+ stdout=subprocess.PIPE, \
+ stderr=subprocess.PIPE,
+ check=True)
+ dentries = result.stdout.decode('utf-8')
+ dentries = dentries.split('\n')
+
+ # filter entries looking for the map file
+ dentries = [dentry for dentry in dentries if dentry.endswith('.map')]
+ if len(dentries) > 1 or len(dentries) == 0:
+ return None
+
+ dparts = dentries[0].split('/')
+ newfile = dparts[len(dparts) - 1]
+
+ if newfile is not None:
+ tagfile = '{}:{}/{}'.format(rel, path.parent, newfile)
+
+ try:
+ result = subprocess.run(['git', 'show', tagfile], \
+ stdout=subprocess.PIPE, \
+ stderr=subprocess.PIPE,
+ check=True)
+ except subprocess.CalledProcessError:
+ result = None
+
+ else:
+ result = None
+
+ return result
+
+def mapfile_and_directory_renamed(path, rel):
+ '''Fix renaming of the map file & the source directory'''
+ mapfilepath = Path("{}/{}".format(fix_directory_name(path),path.name))
+
+ return mapfile_renamed(mapfilepath, rel)
+
+def get_terminal_rows():
+ '''Find the number of rows in the terminal'''
+
+ rows, _ = os.popen('stty size', 'r').read().split()
+ return int(rows)
+
+class FormatOutput():
+ '''Format the output to supported formats'''
+ output_fmt = ""
+ column_fmt = ""
+
+ def __init__(self, format_output, dpdk_releases):
+ self.OUTPUT_FORMATS[format_output](self,dpdk_releases)
+ self.column_titles = ['mapfile'] + dpdk_releases
+
+ self.terminal_rows = get_terminal_rows()
+ self.row = 0
+
+ def set_terminal_output(self,dpdk_rel):
+ '''Set the output format to Tabbed Seperated Values'''
+
+ self.output_fmt = '{:<50}' + \
+ ''.join(['{:<6}{:<6}'] * (len(dpdk_rel)))
+ self.column_fmt = '{:50}' + \
+ ''.join(['{:<12}'] * (len(dpdk_rel)))
+
+ def set_csv_output(self,dpdk_rel):
+ '''Set the output format to Comma Seperated Values'''
+
+ self.output_fmt = '{},' + \
+ ','.join(['{},{}'] * (len(dpdk_rel)))
+ self.column_fmt = '{},' + \
+ ','.join(['{},'] * (len(dpdk_rel)))
+
+ def print_columns(self):
+ '''Print column rows with release names'''
+ print(self.column_fmt.format(*self.column_titles))
+ self.row += 1
+
+ def print_row(self,symbols):
+ '''Print row of symbol values'''
+ print(self.output_fmt.format(*symbols))
+ self.row += 1
+
+ if((self.terminal_rows>0) and ((self.row % self.terminal_rows) == 0)):
+ self.print_columns()
+
+ OUTPUT_FORMATS = { None: set_terminal_output, \
+ 'terminal': set_terminal_output, \
+ 'csv': set_csv_output }
+
+SRC_DIRECTORIES = 'drivers, lib'
+IGNORE_SECTIONS = ['EXPERIMENTAL','INTERNAL']
+FIX_STRATEGIES = [directory_renamed, \
+ mapfile_renamed, \
+ mapfile_and_directory_renamed]
+
+def count_release_symbols(map_parser, release, mapfile_path):
+ '''Count the symbols for a given release and mapfile'''
+ csym = [0] * 2
+ abi_sections = None
+
+ tagfile = '{}:{}'.format(release,mapfile_path)
+ try:
+ result = subprocess.run(['git', 'show', tagfile], \
+ stdout=subprocess.PIPE, \
+ stderr=subprocess.PIPE,
+ check=True)
+ except subprocess.CalledProcessError:
+ result = None
+
+ for fix_strategy in FIX_STRATEGIES:
+ if result is not None:
+ break
+ result = fix_strategy(mapfile_path, release)
+
+ if result is not None:
+ mapfile = result.stdout.decode('utf-8')
+ abi_sections = map_parser(mapfile).abi()
+
+ if abi_sections is not None:
+ # which versions are present, and we care about
+ found_ver = [ver \
+ for ver in abi_sections \
+ if ver not in IGNORE_SECTIONS]
+
+ for ver in found_ver:
+ csym[0] += len(abi_sections[ver])
+
+ # count experimental symbols
+ if 'EXPERIMENTAL' in abi_sections:
+ csym[1] = len(abi_sections['EXPERIMENTAL'])
+
+ return csym
+
+def main():
+ '''Main entry point'''
+
+ parser = argparse.ArgumentParser(description='Count symbols in DPDK Libs')
+ parser.add_argument('--format-output', choices=['terminal','csv'], \
+ default='terminal')
+ parser.add_argument('--directory', choices=SRC_DIRECTORIES,
+ default=SRC_DIRECTORIES)
+ args = parser.parse_args()
+
+ dpdk_releases = get_dpdk_releases()
+ format_output = FormatOutput(args.format_output, dpdk_releases)
+
+ map_grammar = MAP_GRAMMAR.format(get_abi_versions())
+ map_parser = makeGrammar(map_grammar, {})
+
+ format_output.print_columns()
+ for src_dir in args.directory.split(','):
+ for path in Path(src_dir).rglob('*.map'):
+ relsym = [str(path)]
+
+ for release in dpdk_releases:
+ csym = count_release_symbols(map_parser, release, path)
+ relsym += csym
+
+ format_output.print_row(relsym)
+
+if __name__ == '__main__':
+ main()
--
2.26.2
^ permalink raw reply [relevance 6%]
* Re: [dpdk-dev] [PATCH] parray: introduce internal API for dynamic arrays
2021-06-21 14:42 0% ` Ananyev, Konstantin
@ 2021-06-21 15:32 0% ` Ferruh Yigit
2021-06-21 15:37 0% ` Ananyev, Konstantin
0 siblings, 1 reply; 200+ results
From: Ferruh Yigit @ 2021-06-21 15:32 UTC (permalink / raw)
To: Ananyev, Konstantin, Thomas Monjalon, Richardson, Bruce
Cc: Morten Brørup, dev, olivier.matz, andrew.rybchenko,
honnappa.nagarahalli, jerinj, gakhil
On 6/21/2021 3:42 PM, Ananyev, Konstantin wrote:
>
>>>>>>>> One more thought here - if we are talking about rte_ethdev[] in particular, I think we can:
>>>>>>>> 1. move public function pointers (rx_pkt_burst(), etc.) from rte_ethdev into a separate flat array.
>>>>>>>> We can keep it public to still use inline functions for 'fast' calls rte_eth_rx_burst(), etc. to avoid
>>>>>>>> any regressions.
>>>>>>>> That could still be flat array with max_size specified at application startup.
>>>>>>>> 2. Hide rest of rte_ethdev struct in .c.
>>>>>>>> That will allow us to change the struct itself and the whole rte_ethdev[] table in a way we like
>>>>>>>> (flat array, vector, hash, linked list) without ABI/API breakages.
>>>>>>>>
>>>>>>>> Yes, it would require all PMDs to change prototype for pkt_rx_burst() function
>>>>>>>> (to accept port_id, queue_id instead of queue pointer), but the change is mechanical one.
>>>>>>>> Probably some macro can be provided to simplify it.
>>>>>>>>
>>>>>>>
>>>>>>> We are already planning some tasks for ABI stability for v21.11, I think
>>>>>>> splitting 'struct rte_eth_dev' can be part of that task, it enables hiding more
>>>>>>> internal data.
>>>>>>
>>>>>> Ok, sounds good.
>>>>>>
>>>>>>>
>>>>>>>> The only significant complication I can foresee with implementing that approach -
>>>>>>>> we'll need a an array of 'fast' function pointers per queue, not per device as we have now
>>>>>>>> (to avoid extra indirection for callback implementation).
>>>>>>>> Though as a bonus we'll have ability to use different RX/TX funcions per queue.
>>>>>>>>
>>>>>>>
>>>>>>> What do you think split Rx/Tx callback into its own struct too?
>>>>>>>
>>>>>>> Overall 'rte_eth_dev' can be split into three as:
>>>>>>> 1. rte_eth_dev
>>>>>>> 2. rte_eth_dev_burst
>>>>>>> 3. rte_eth_dev_cb
>>>>>>>
>>>>>>> And we can hide 1 from applications even with the inline functions.
>>>>>>
>>>>>> As discussed off-line, I think:
>>>>>> it is possible.
>>>>>> My absolute preference would be to have just 1/2 (with CB hidden).
>>>>>
>>>>> How can we hide the callbacks since they are used by inline burst functions.
>>>>
>>>> I probably I owe a better explanation to what I meant in first mail.
>>>> Otherwise it sounds confusing.
>>>> I'll try to write a more detailed one in next few days.
>>>
>>> Actually I gave it another thought over weekend, and might be we can
>>> hide rte_eth_dev_cb even in a simpler way. I'd use eth_rx_burst() as
>>> an example, but the same principle applies to other 'fast' functions.
>>>
>>> 1. Needed changes for PMDs rx_pkt_burst():
>>> a) change function prototype to accept 'uint16_t port_id' and 'uint16_t queue_id',
>>> instead of current 'void *'.
>>> b) Each PMD rx_pkt_burst() will have to call rte_eth_rx_epilog() function at return.
>>> This inline function will do all CB calls for that queue.
>>>
>>> To be more specific, let say we have some PMD: xyz with RX function:
>>>
>>> uint16_t
>>> xyz_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
>>> {
>>> struct xyz_rx_queue *rxq = rx_queue;
>>> uint16_t nb_rx = 0;
>>>
>>> /* do actual stuff here */
>>> ....
>>> return nb_rx;
>>> }
>>>
>>> It will be transformed to:
>>>
>>> uint16_t
>>> xyz_recv_pkts(uint16_t port_id, uint16_t queue_id, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
>>> {
>>> struct xyz_rx_queue *rxq;
>>> uint16_t nb_rx;
>>>
>>> rxq = _rte_eth_rx_prolog(port_id, queue_id);
>>> if (rxq == NULL)
>>> return 0;
>>> nb_rx = _xyz_real_recv_pkts(rxq, rx_pkts, nb_pkts);
>>> return _rte_eth_rx_epilog(port_id, queue_id, rx_pkts, nb_pkts);
>>> }
>>>
>>> And somewhere in ethdev_private.h:
>>>
>>> static inline void *
>>> _rte_eth_rx_prolog(uint16_t port_id, uint16_t queue_id);
>>> {
>>> struct rte_eth_dev *dev = &rte_eth_devices[port_id];
>>>
>>> #ifdef RTE_ETHDEV_DEBUG_RX
>>> RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
>>> RTE_FUNC_PTR_OR_ERR_RET(*dev->rx_pkt_burst, NULL);
>>>
>>> if (queue_id >= dev->data->nb_rx_queues) {
>>> RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
>>> return NULL;
>>> }
>>> #endif
>>> return dev->data->rx_queues[queue_id];
>>> }
>>>
>>> static inline uint16_t
>>> _rte_eth_rx_epilog(uint16_t port_id, uint16_t queue_id, struct rte_mbuf **rx_pkts, const uint16_t nb_pkts);
>>> {
>>> struct rte_eth_dev *dev = &rte_eth_devices[port_id];
>>>
>>> #ifdef RTE_ETHDEV_RXTX_CALLBACKS
>>> struct rte_eth_rxtx_callback *cb;
>>>
>>> /* __ATOMIC_RELEASE memory order was used when the
>>> * call back was inserted into the list.
>>> * Since there is a clear dependency between loading
>>> * cb and cb->fn/cb->next, __ATOMIC_ACQUIRE memory order is
>>> * not required.
>>> */
>>> cb = __atomic_load_n(&dev->post_rx_burst_cbs[queue_id],
>>> __ATOMIC_RELAXED);
>>>
>>> if (unlikely(cb != NULL)) {
>>> do {
>>> nb_rx = cb->fn.rx(port_id, queue_id, rx_pkts, nb_rx,
>>> nb_pkts, cb->param);
>>> cb = cb->next;
>>> } while (cb != NULL);
>>> }
>>> #endif
>>>
>>> rte_ethdev_trace_rx_burst(port_id, queue_id, (void **)rx_pkts, nb_rx);
>>> return nb_rx;
>>> }
>>>
>>> Now, as you said above, in rte_ethdev.h we will keep only a flat array
>>> with pointers to 'fast' functions:
>>> struct {
>>> eth_rx_burst_t rx_pkt_burst
>>> eth_tx_burst_t tx_pkt_burst;
>>> eth_tx_prep_t tx_pkt_prepare;
>>> .....
>>> } rte_eth_dev_burst[];
>>>
>>> And rte_eth_rx_burst() will look like:
>>>
>>> static inline uint16_t
>>> rte_eth_rx_burst(uint16_t port_id, uint16_t queue_id,
>>> struct rte_mbuf **rx_pkts, const uint16_t nb_pkts)
>>> {
>>> if (port_id >= RTE_MAX_ETHPORTS)
>>> return 0;
>>> return rte_eth_dev_burst[port_id](port_id, queue_id, rx_pkts, nb_pkts);
>>> }
>>>
>>> Yes, it will require changes in *all* PMDs, but as I said before the changes will be a mechanic ones.
>>>
>>
>> I did not like the idea to push to calling Rx/TX callbacks responsibility to the
>> drivers, I think it should be in the ethdev layer.
>
> Well, I'd say it is an ethdev layer function that has to be called by PMD 😊
>
>>
>> What about making 'rte_eth_rx_epilog' an API and call from 'rte_eth_rx_burst()',
>> which will add another function call for Rx/Tx callback but shouldn't affect the
>> Rx/Tx burst.
>
> But then we either need to expose call-back information to the user or pay the penalty
> for extra function call, correct?
>
Right. As a middle ground, we can keep Rx/Tx burst functions as inline, but have
the Rx/Tx callback part of it as function, so get the hit only for callbacks.
^ permalink raw reply [relevance 0%]
* [dpdk-dev] [PATCH] devtools: script to track map symbols
@ 2021-06-21 15:11 5% ` Ray Kinsella
0 siblings, 0 replies; 200+ results
From: Ray Kinsella @ 2021-06-21 15:11 UTC (permalink / raw)
To: dev; +Cc: stephen, ferruh.yigit, thomas, ktraynor, bruce.richardson, mdr
Script to track growth of stable and experimental symbols
over releases since v19.11.
Signed-off-by: Ray Kinsella <mdr@ashroe.eu>
---
devtools/count_symbols.py | 230 ++++++++++++++++++++++++++++++++++++++
1 file changed, 230 insertions(+)
create mode 100755 devtools/count_symbols.py
diff --git a/devtools/count_symbols.py b/devtools/count_symbols.py
new file mode 100755
index 0000000000..7b29651044
--- /dev/null
+++ b/devtools/count_symbols.py
@@ -0,0 +1,230 @@
+#!/usr/bin/env python3
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2021 Intel Corporation
+from pathlib import Path
+import sys, os
+import subprocess
+import argparse
+import re
+import datetime
+
+try:
+ from parsley import makeGrammar
+except ImportError:
+ print('This script uses the package Parsley to parse C Mapfiles.\n'
+ 'This can be installed with \"pip install parsley".')
+ exit()
+
+symbolMapGrammar = r"""
+
+ws = (' ' | '\r' | '\n' | '\t')*
+
+ABI_VER = ({})
+DPDK_VER = ('DPDK_' ABI_VER)
+ABI_NAME = ('INTERNAL' | 'EXPERIMENTAL' | DPDK_VER)
+comment = '#' (~'\n' anything)+ '\n'
+symbol = (~(';' | '}}' | '#') anything )+:c ';' -> ''.join(c)
+global = 'global:'
+local = 'local: *;'
+symbols = comment* symbol:s ws comment* -> s
+
+abi = (abi_section+):m -> dict(m)
+abi_section = (ws ABI_NAME:e ws '{{' ws global* (~local ws symbols)*:s ws local* ws '}}' ws DPDK_VER* ';' ws) -> (e,s)
+"""
+
+#abi_ver = ['21', '20.0.1', '20.0', '20']
+
+def get_abi_versions():
+ year = datetime.date.today().year - 2000
+ s=" |".join(['\'{}\''.format(i) for i in reversed(range(21, year + 1)) ])
+ s = s + ' | \'20.0.1\' | \'20.0\' | \'20\''
+
+ return s
+
+def get_dpdk_releases():
+ year = datetime.date.today().year - 2000
+ s="|".join("{}".format(i) for i in range(19,year + 1))
+ pattern = re.compile('^\"v(' + s + ')\.\d{2}\"$')
+
+ cmd = ['git', 'for-each-ref', '--sort=taggerdate', '--format', '"%(tag)"']
+ result = subprocess.run(cmd, \
+ stdout=subprocess.PIPE, \
+ stderr=subprocess.PIPE)
+ if result.stderr.startswith(b'fatal'):
+ result = None
+
+ tags = result.stdout.decode('utf-8').split('\n')
+
+ # find the non-rcs between now and v19.11
+ tags = [ tag.replace('\"','') \
+ for tag in reversed(tags) \
+ if pattern.match(tag) ][:-3]
+
+ return tags
+
+
+def get_terminal_rows():
+ rows, _ = os.popen('stty size', 'r').read().split()
+ return int(rows)
+
+def fix_directory_name(path):
+ mapfilepath1 = str(path.parent.name)
+ mapfilepath2 = str(path.parents[1])
+ mapfilepath = mapfilepath2 + '/librte_' + mapfilepath1
+
+ return mapfilepath
+
+# fix removal of the librte_ from the directory names
+def directory_renamed(path, rel):
+ mapfilepath = fix_directory_name(path)
+ tagfile = '{}:{}/{}'.format(rel, mapfilepath, path.name)
+
+ result = subprocess.run(['git', 'show', tagfile], \
+ stdout=subprocess.PIPE, \
+ stderr=subprocess.PIPE)
+ if result.stderr.startswith(b'fatal'):
+ result = None
+
+ return result
+
+# fix renaming of map files
+def mapfile_renamed(path, rel):
+ newfile = None
+
+ result = subprocess.run(['git', 'ls-tree', \
+ rel, str(path.parent) + '/'], \
+ stdout=subprocess.PIPE, \
+ stderr=subprocess.PIPE)
+ dentries = result.stdout.decode('utf-8')
+ dentries = dentries.split('\n')
+
+ # filter entries looking for the map file
+ dentries = [dentry for dentry in dentries if dentry.endswith('.map')]
+ if len(dentries) > 1 or len(dentries) == 0:
+ return None
+
+ dparts = dentries[0].split('/')
+ newfile = dparts[len(dparts) - 1]
+
+ if(newfile is not None):
+ tagfile = '{}:{}/{}'.format(rel, path.parent, newfile)
+
+ result = subprocess.run(['git', 'show', tagfile], \
+ stdout=subprocess.PIPE, \
+ stderr=subprocess.PIPE)
+ if result.stderr.startswith(b'fatal'):
+ result = None
+
+ else:
+ result = None
+
+ return result
+
+# renaming of the map file & renaming of directory
+def mapfile_and_directory_renamed(path, rel):
+ mapfilepath = Path("{}/{}".format(fix_directory_name(path),path.name))
+
+ return mapfile_renamed(mapfilepath, rel)
+
+fix_strategies = [directory_renamed, \
+ mapfile_renamed, \
+ mapfile_and_directory_renamed]
+
+fmt = col_fmt = ""
+
+def set_terminal_output(dpdk_rel):
+ global fmt, col_fmt
+
+ fmt = '{:<50}'
+ col_fmt = fmt
+ for rel in dpdk_rel:
+ fmt += '{:<6}{:<6}'
+ col_fmt += '{:<12}'
+
+def set_csv_output(dpdk_rel):
+ global fmt, col_fmt
+
+ fmt = '{},'
+ col_fmt = fmt
+ for rel in dpdk_rel:
+ fmt += '{},{},'
+ col_fmt += '{},,'
+
+output_formats = { None: set_terminal_output, \
+ 'terminal': set_terminal_output, \
+ 'csv': set_csv_output }
+directories = 'drivers, lib'
+
+def main():
+ global fmt, col_fmt, symbolMapGrammar
+
+ parser = argparse.ArgumentParser(description='Count symbols in DPDK Libs')
+ parser.add_argument('--format-output', choices=['terminal','csv'], \
+ default='terminal')
+ parser.add_argument('--directory', choices=directories,
+ default=directories)
+ args = parser.parse_args()
+
+ dpdk_rel = get_dpdk_releases()
+
+ # set the output format
+ output_formats[args.format_output](dpdk_rel)
+
+ column_titles = ['mapfile'] + dpdk_rel
+ print(col_fmt.format(*column_titles))
+
+ symbolMapGrammar = symbolMapGrammar.format(get_abi_versions())
+ MAPParser = makeGrammar(symbolMapGrammar, {})
+
+ terminal_rows = get_terminal_rows()
+ row = 0
+
+ for src_dir in args.directory.split(','):
+ for path in Path(src_dir).rglob('*.map'):
+ csym = [0] * 2
+ relsym = [str(path)]
+
+ for rel in dpdk_rel:
+ i = csym[0] = csym[1] = 0
+ abi_sections = None
+
+ tagfile = '{}:{}'.format(rel,path)
+ result = subprocess.run(['git', 'show', tagfile], \
+ stdout=subprocess.PIPE, \
+ stderr=subprocess.PIPE)
+
+ if result.stderr.startswith(b'fatal'):
+ result = None
+
+ while(result is None and i < len(fix_strategies)):
+ result = fix_strategies[i](path, rel)
+ i += 1
+
+ if result is not None:
+ mapfile = result.stdout.decode('utf-8')
+ abi_sections = MAPParser(mapfile).abi()
+
+ if abi_sections is not None:
+ # which versions are present, and we care about
+ ignore = ['EXPERIMENTAL','INTERNAL']
+ found_ver = [ver \
+ for ver in abi_sections \
+ if ver not in ignore]
+
+ for ver in found_ver:
+ csym[0] += len(abi_sections[ver])
+
+ # count experimental symbols
+ if 'EXPERIMENTAL' in abi_sections:
+ csym[1] = len(abi_sections['EXPERIMENTAL'])
+
+ relsym += csym
+
+ print(fmt.format(*relsym))
+ row += 1
+
+ if((terminal_rows>0) and ((row % terminal_rows) == 0)):
+ print(col_fmt.format(*column_titles))
+
+if __name__ == '__main__':
+ main()
--
2.26.2
^ permalink raw reply [relevance 5%]
* Re: [dpdk-dev] [PATCH] parray: introduce internal API for dynamic arrays
2021-06-21 14:05 0% ` Ferruh Yigit
@ 2021-06-21 14:42 0% ` Ananyev, Konstantin
2021-06-21 15:32 0% ` Ferruh Yigit
0 siblings, 1 reply; 200+ results
From: Ananyev, Konstantin @ 2021-06-21 14:42 UTC (permalink / raw)
To: Yigit, Ferruh, Thomas Monjalon, Richardson, Bruce
Cc: Morten Brørup, dev, olivier.matz, andrew.rybchenko,
honnappa.nagarahalli, jerinj, gakhil
> >>>>>> One more thought here - if we are talking about rte_ethdev[] in particular, I think we can:
> >>>>>> 1. move public function pointers (rx_pkt_burst(), etc.) from rte_ethdev into a separate flat array.
> >>>>>> We can keep it public to still use inline functions for 'fast' calls rte_eth_rx_burst(), etc. to avoid
> >>>>>> any regressions.
> >>>>>> That could still be flat array with max_size specified at application startup.
> >>>>>> 2. Hide rest of rte_ethdev struct in .c.
> >>>>>> That will allow us to change the struct itself and the whole rte_ethdev[] table in a way we like
> >>>>>> (flat array, vector, hash, linked list) without ABI/API breakages.
> >>>>>>
> >>>>>> Yes, it would require all PMDs to change prototype for pkt_rx_burst() function
> >>>>>> (to accept port_id, queue_id instead of queue pointer), but the change is mechanical one.
> >>>>>> Probably some macro can be provided to simplify it.
> >>>>>>
> >>>>>
> >>>>> We are already planning some tasks for ABI stability for v21.11, I think
> >>>>> splitting 'struct rte_eth_dev' can be part of that task, it enables hiding more
> >>>>> internal data.
> >>>>
> >>>> Ok, sounds good.
> >>>>
> >>>>>
> >>>>>> The only significant complication I can foresee with implementing that approach -
> >>>>>> we'll need a an array of 'fast' function pointers per queue, not per device as we have now
> >>>>>> (to avoid extra indirection for callback implementation).
> >>>>>> Though as a bonus we'll have ability to use different RX/TX funcions per queue.
> >>>>>>
> >>>>>
> >>>>> What do you think split Rx/Tx callback into its own struct too?
> >>>>>
> >>>>> Overall 'rte_eth_dev' can be split into three as:
> >>>>> 1. rte_eth_dev
> >>>>> 2. rte_eth_dev_burst
> >>>>> 3. rte_eth_dev_cb
> >>>>>
> >>>>> And we can hide 1 from applications even with the inline functions.
> >>>>
> >>>> As discussed off-line, I think:
> >>>> it is possible.
> >>>> My absolute preference would be to have just 1/2 (with CB hidden).
> >>>
> >>> How can we hide the callbacks since they are used by inline burst functions.
> >>
> >> I probably I owe a better explanation to what I meant in first mail.
> >> Otherwise it sounds confusing.
> >> I'll try to write a more detailed one in next few days.
> >
> > Actually I gave it another thought over weekend, and might be we can
> > hide rte_eth_dev_cb even in a simpler way. I'd use eth_rx_burst() as
> > an example, but the same principle applies to other 'fast' functions.
> >
> > 1. Needed changes for PMDs rx_pkt_burst():
> > a) change function prototype to accept 'uint16_t port_id' and 'uint16_t queue_id',
> > instead of current 'void *'.
> > b) Each PMD rx_pkt_burst() will have to call rte_eth_rx_epilog() function at return.
> > This inline function will do all CB calls for that queue.
> >
> > To be more specific, let say we have some PMD: xyz with RX function:
> >
> > uint16_t
> > xyz_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
> > {
> > struct xyz_rx_queue *rxq = rx_queue;
> > uint16_t nb_rx = 0;
> >
> > /* do actual stuff here */
> > ....
> > return nb_rx;
> > }
> >
> > It will be transformed to:
> >
> > uint16_t
> > xyz_recv_pkts(uint16_t port_id, uint16_t queue_id, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
> > {
> > struct xyz_rx_queue *rxq;
> > uint16_t nb_rx;
> >
> > rxq = _rte_eth_rx_prolog(port_id, queue_id);
> > if (rxq == NULL)
> > return 0;
> > nb_rx = _xyz_real_recv_pkts(rxq, rx_pkts, nb_pkts);
> > return _rte_eth_rx_epilog(port_id, queue_id, rx_pkts, nb_pkts);
> > }
> >
> > And somewhere in ethdev_private.h:
> >
> > static inline void *
> > _rte_eth_rx_prolog(uint16_t port_id, uint16_t queue_id);
> > {
> > struct rte_eth_dev *dev = &rte_eth_devices[port_id];
> >
> > #ifdef RTE_ETHDEV_DEBUG_RX
> > RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
> > RTE_FUNC_PTR_OR_ERR_RET(*dev->rx_pkt_burst, NULL);
> >
> > if (queue_id >= dev->data->nb_rx_queues) {
> > RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
> > return NULL;
> > }
> > #endif
> > return dev->data->rx_queues[queue_id];
> > }
> >
> > static inline uint16_t
> > _rte_eth_rx_epilog(uint16_t port_id, uint16_t queue_id, struct rte_mbuf **rx_pkts, const uint16_t nb_pkts);
> > {
> > struct rte_eth_dev *dev = &rte_eth_devices[port_id];
> >
> > #ifdef RTE_ETHDEV_RXTX_CALLBACKS
> > struct rte_eth_rxtx_callback *cb;
> >
> > /* __ATOMIC_RELEASE memory order was used when the
> > * call back was inserted into the list.
> > * Since there is a clear dependency between loading
> > * cb and cb->fn/cb->next, __ATOMIC_ACQUIRE memory order is
> > * not required.
> > */
> > cb = __atomic_load_n(&dev->post_rx_burst_cbs[queue_id],
> > __ATOMIC_RELAXED);
> >
> > if (unlikely(cb != NULL)) {
> > do {
> > nb_rx = cb->fn.rx(port_id, queue_id, rx_pkts, nb_rx,
> > nb_pkts, cb->param);
> > cb = cb->next;
> > } while (cb != NULL);
> > }
> > #endif
> >
> > rte_ethdev_trace_rx_burst(port_id, queue_id, (void **)rx_pkts, nb_rx);
> > return nb_rx;
> > }
> >
> > Now, as you said above, in rte_ethdev.h we will keep only a flat array
> > with pointers to 'fast' functions:
> > struct {
> > eth_rx_burst_t rx_pkt_burst
> > eth_tx_burst_t tx_pkt_burst;
> > eth_tx_prep_t tx_pkt_prepare;
> > .....
> > } rte_eth_dev_burst[];
> >
> > And rte_eth_rx_burst() will look like:
> >
> > static inline uint16_t
> > rte_eth_rx_burst(uint16_t port_id, uint16_t queue_id,
> > struct rte_mbuf **rx_pkts, const uint16_t nb_pkts)
> > {
> > if (port_id >= RTE_MAX_ETHPORTS)
> > return 0;
> > return rte_eth_dev_burst[port_id](port_id, queue_id, rx_pkts, nb_pkts);
> > }
> >
> > Yes, it will require changes in *all* PMDs, but as I said before the changes will be a mechanic ones.
> >
>
> I did not like the idea to push to calling Rx/TX callbacks responsibility to the
> drivers, I think it should be in the ethdev layer.
Well, I'd say it is an ethdev layer function that has to be called by PMD 😊
>
> What about making 'rte_eth_rx_epilog' an API and call from 'rte_eth_rx_burst()',
> which will add another function call for Rx/Tx callback but shouldn't affect the
> Rx/Tx burst.
But then we either need to expose call-back information to the user or pay the penalty
for extra function call, correct?
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH] parray: introduce internal API for dynamic arrays
2021-06-21 11:06 0% ` Ananyev, Konstantin
@ 2021-06-21 14:05 0% ` Ferruh Yigit
2021-06-21 14:42 0% ` Ananyev, Konstantin
0 siblings, 1 reply; 200+ results
From: Ferruh Yigit @ 2021-06-21 14:05 UTC (permalink / raw)
To: Ananyev, Konstantin, Thomas Monjalon, Richardson, Bruce
Cc: Morten Brørup, dev, olivier.matz, andrew.rybchenko,
honnappa.nagarahalli, jerinj, gakhil
On 6/21/2021 12:06 PM, Ananyev, Konstantin wrote:
>
> Hi everyone,
>
>>>>>> One more thought here - if we are talking about rte_ethdev[] in particular, I think we can:
>>>>>> 1. move public function pointers (rx_pkt_burst(), etc.) from rte_ethdev into a separate flat array.
>>>>>> We can keep it public to still use inline functions for 'fast' calls rte_eth_rx_burst(), etc. to avoid
>>>>>> any regressions.
>>>>>> That could still be flat array with max_size specified at application startup.
>>>>>> 2. Hide rest of rte_ethdev struct in .c.
>>>>>> That will allow us to change the struct itself and the whole rte_ethdev[] table in a way we like
>>>>>> (flat array, vector, hash, linked list) without ABI/API breakages.
>>>>>>
>>>>>> Yes, it would require all PMDs to change prototype for pkt_rx_burst() function
>>>>>> (to accept port_id, queue_id instead of queue pointer), but the change is mechanical one.
>>>>>> Probably some macro can be provided to simplify it.
>>>>>>
>>>>>
>>>>> We are already planning some tasks for ABI stability for v21.11, I think
>>>>> splitting 'struct rte_eth_dev' can be part of that task, it enables hiding more
>>>>> internal data.
>>>>
>>>> Ok, sounds good.
>>>>
>>>>>
>>>>>> The only significant complication I can foresee with implementing that approach -
>>>>>> we'll need a an array of 'fast' function pointers per queue, not per device as we have now
>>>>>> (to avoid extra indirection for callback implementation).
>>>>>> Though as a bonus we'll have ability to use different RX/TX funcions per queue.
>>>>>>
>>>>>
>>>>> What do you think split Rx/Tx callback into its own struct too?
>>>>>
>>>>> Overall 'rte_eth_dev' can be split into three as:
>>>>> 1. rte_eth_dev
>>>>> 2. rte_eth_dev_burst
>>>>> 3. rte_eth_dev_cb
>>>>>
>>>>> And we can hide 1 from applications even with the inline functions.
>>>>
>>>> As discussed off-line, I think:
>>>> it is possible.
>>>> My absolute preference would be to have just 1/2 (with CB hidden).
>>>
>>> How can we hide the callbacks since they are used by inline burst functions.
>>
>> I probably I owe a better explanation to what I meant in first mail.
>> Otherwise it sounds confusing.
>> I'll try to write a more detailed one in next few days.
>
> Actually I gave it another thought over weekend, and might be we can
> hide rte_eth_dev_cb even in a simpler way. I'd use eth_rx_burst() as
> an example, but the same principle applies to other 'fast' functions.
>
> 1. Needed changes for PMDs rx_pkt_burst():
> a) change function prototype to accept 'uint16_t port_id' and 'uint16_t queue_id',
> instead of current 'void *'.
> b) Each PMD rx_pkt_burst() will have to call rte_eth_rx_epilog() function at return.
> This inline function will do all CB calls for that queue.
>
> To be more specific, let say we have some PMD: xyz with RX function:
>
> uint16_t
> xyz_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
> {
> struct xyz_rx_queue *rxq = rx_queue;
> uint16_t nb_rx = 0;
>
> /* do actual stuff here */
> ....
> return nb_rx;
> }
>
> It will be transformed to:
>
> uint16_t
> xyz_recv_pkts(uint16_t port_id, uint16_t queue_id, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
> {
> struct xyz_rx_queue *rxq;
> uint16_t nb_rx;
>
> rxq = _rte_eth_rx_prolog(port_id, queue_id);
> if (rxq == NULL)
> return 0;
> nb_rx = _xyz_real_recv_pkts(rxq, rx_pkts, nb_pkts);
> return _rte_eth_rx_epilog(port_id, queue_id, rx_pkts, nb_pkts);
> }
>
> And somewhere in ethdev_private.h:
>
> static inline void *
> _rte_eth_rx_prolog(uint16_t port_id, uint16_t queue_id);
> {
> struct rte_eth_dev *dev = &rte_eth_devices[port_id];
>
> #ifdef RTE_ETHDEV_DEBUG_RX
> RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
> RTE_FUNC_PTR_OR_ERR_RET(*dev->rx_pkt_burst, NULL);
>
> if (queue_id >= dev->data->nb_rx_queues) {
> RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
> return NULL;
> }
> #endif
> return dev->data->rx_queues[queue_id];
> }
>
> static inline uint16_t
> _rte_eth_rx_epilog(uint16_t port_id, uint16_t queue_id, struct rte_mbuf **rx_pkts, const uint16_t nb_pkts);
> {
> struct rte_eth_dev *dev = &rte_eth_devices[port_id];
>
> #ifdef RTE_ETHDEV_RXTX_CALLBACKS
> struct rte_eth_rxtx_callback *cb;
>
> /* __ATOMIC_RELEASE memory order was used when the
> * call back was inserted into the list.
> * Since there is a clear dependency between loading
> * cb and cb->fn/cb->next, __ATOMIC_ACQUIRE memory order is
> * not required.
> */
> cb = __atomic_load_n(&dev->post_rx_burst_cbs[queue_id],
> __ATOMIC_RELAXED);
>
> if (unlikely(cb != NULL)) {
> do {
> nb_rx = cb->fn.rx(port_id, queue_id, rx_pkts, nb_rx,
> nb_pkts, cb->param);
> cb = cb->next;
> } while (cb != NULL);
> }
> #endif
>
> rte_ethdev_trace_rx_burst(port_id, queue_id, (void **)rx_pkts, nb_rx);
> return nb_rx;
> }
>
> Now, as you said above, in rte_ethdev.h we will keep only a flat array
> with pointers to 'fast' functions:
> struct {
> eth_rx_burst_t rx_pkt_burst
> eth_tx_burst_t tx_pkt_burst;
> eth_tx_prep_t tx_pkt_prepare;
> .....
> } rte_eth_dev_burst[];
>
> And rte_eth_rx_burst() will look like:
>
> static inline uint16_t
> rte_eth_rx_burst(uint16_t port_id, uint16_t queue_id,
> struct rte_mbuf **rx_pkts, const uint16_t nb_pkts)
> {
> if (port_id >= RTE_MAX_ETHPORTS)
> return 0;
> return rte_eth_dev_burst[port_id](port_id, queue_id, rx_pkts, nb_pkts);
> }
>
> Yes, it will require changes in *all* PMDs, but as I said before the changes will be a mechanic ones.
>
I did not like the idea to push to calling Rx/TX callbacks responsibility to the
drivers, I think it should be in the ethdev layer.
What about making 'rte_eth_rx_epilog' an API and call from 'rte_eth_rx_burst()',
which will add another function call for Rx/Tx callback but shouldn't affect the
Rx/Tx burst.
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH] parray: introduce internal API for dynamic arrays
2021-06-18 10:41 0% ` Ananyev, Konstantin
2021-06-18 10:49 0% ` Ferruh Yigit
@ 2021-06-21 11:06 0% ` Ananyev, Konstantin
2021-06-21 14:05 0% ` Ferruh Yigit
1 sibling, 1 reply; 200+ results
From: Ananyev, Konstantin @ 2021-06-21 11:06 UTC (permalink / raw)
To: Yigit, Ferruh, Thomas Monjalon, Richardson, Bruce
Cc: Morten Brørup, dev, olivier.matz, andrew.rybchenko,
honnappa.nagarahalli, jerinj, gakhil
Hi everyone,
> > >>> One more thought here - if we are talking about rte_ethdev[] in particular, I think we can:
> > >>> 1. move public function pointers (rx_pkt_burst(), etc.) from rte_ethdev into a separate flat array.
> > >>> We can keep it public to still use inline functions for 'fast' calls rte_eth_rx_burst(), etc. to avoid
> > >>> any regressions.
> > >>> That could still be flat array with max_size specified at application startup.
> > >>> 2. Hide rest of rte_ethdev struct in .c.
> > >>> That will allow us to change the struct itself and the whole rte_ethdev[] table in a way we like
> > >>> (flat array, vector, hash, linked list) without ABI/API breakages.
> > >>>
> > >>> Yes, it would require all PMDs to change prototype for pkt_rx_burst() function
> > >>> (to accept port_id, queue_id instead of queue pointer), but the change is mechanical one.
> > >>> Probably some macro can be provided to simplify it.
> > >>>
> > >>
> > >> We are already planning some tasks for ABI stability for v21.11, I think
> > >> splitting 'struct rte_eth_dev' can be part of that task, it enables hiding more
> > >> internal data.
> > >
> > > Ok, sounds good.
> > >
> > >>
> > >>> The only significant complication I can foresee with implementing that approach -
> > >>> we'll need a an array of 'fast' function pointers per queue, not per device as we have now
> > >>> (to avoid extra indirection for callback implementation).
> > >>> Though as a bonus we'll have ability to use different RX/TX funcions per queue.
> > >>>
> > >>
> > >> What do you think split Rx/Tx callback into its own struct too?
> > >>
> > >> Overall 'rte_eth_dev' can be split into three as:
> > >> 1. rte_eth_dev
> > >> 2. rte_eth_dev_burst
> > >> 3. rte_eth_dev_cb
> > >>
> > >> And we can hide 1 from applications even with the inline functions.
> > >
> > > As discussed off-line, I think:
> > > it is possible.
> > > My absolute preference would be to have just 1/2 (with CB hidden).
> >
> > How can we hide the callbacks since they are used by inline burst functions.
>
> I probably I owe a better explanation to what I meant in first mail.
> Otherwise it sounds confusing.
> I'll try to write a more detailed one in next few days.
Actually I gave it another thought over weekend, and might be we can
hide rte_eth_dev_cb even in a simpler way. I'd use eth_rx_burst() as
an example, but the same principle applies to other 'fast' functions.
1. Needed changes for PMDs rx_pkt_burst():
a) change function prototype to accept 'uint16_t port_id' and 'uint16_t queue_id',
instead of current 'void *'.
b) Each PMD rx_pkt_burst() will have to call rte_eth_rx_epilog() function at return.
This inline function will do all CB calls for that queue.
To be more specific, let say we have some PMD: xyz with RX function:
uint16_t
xyz_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
{
struct xyz_rx_queue *rxq = rx_queue;
uint16_t nb_rx = 0;
/* do actual stuff here */
....
return nb_rx;
}
It will be transformed to:
uint16_t
xyz_recv_pkts(uint16_t port_id, uint16_t queue_id, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
{
struct xyz_rx_queue *rxq;
uint16_t nb_rx;
rxq = _rte_eth_rx_prolog(port_id, queue_id);
if (rxq == NULL)
return 0;
nb_rx = _xyz_real_recv_pkts(rxq, rx_pkts, nb_pkts);
return _rte_eth_rx_epilog(port_id, queue_id, rx_pkts, nb_pkts);
}
And somewhere in ethdev_private.h:
static inline void *
_rte_eth_rx_prolog(uint16_t port_id, uint16_t queue_id);
{
struct rte_eth_dev *dev = &rte_eth_devices[port_id];
#ifdef RTE_ETHDEV_DEBUG_RX
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
RTE_FUNC_PTR_OR_ERR_RET(*dev->rx_pkt_burst, NULL);
if (queue_id >= dev->data->nb_rx_queues) {
RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
return NULL;
}
#endif
return dev->data->rx_queues[queue_id];
}
static inline uint16_t
_rte_eth_rx_epilog(uint16_t port_id, uint16_t queue_id, struct rte_mbuf **rx_pkts, const uint16_t nb_pkts);
{
struct rte_eth_dev *dev = &rte_eth_devices[port_id];
#ifdef RTE_ETHDEV_RXTX_CALLBACKS
struct rte_eth_rxtx_callback *cb;
/* __ATOMIC_RELEASE memory order was used when the
* call back was inserted into the list.
* Since there is a clear dependency between loading
* cb and cb->fn/cb->next, __ATOMIC_ACQUIRE memory order is
* not required.
*/
cb = __atomic_load_n(&dev->post_rx_burst_cbs[queue_id],
__ATOMIC_RELAXED);
if (unlikely(cb != NULL)) {
do {
nb_rx = cb->fn.rx(port_id, queue_id, rx_pkts, nb_rx,
nb_pkts, cb->param);
cb = cb->next;
} while (cb != NULL);
}
#endif
rte_ethdev_trace_rx_burst(port_id, queue_id, (void **)rx_pkts, nb_rx);
return nb_rx;
}
Now, as you said above, in rte_ethdev.h we will keep only a flat array
with pointers to 'fast' functions:
struct {
eth_rx_burst_t rx_pkt_burst
eth_tx_burst_t tx_pkt_burst;
eth_tx_prep_t tx_pkt_prepare;
.....
} rte_eth_dev_burst[];
And rte_eth_rx_burst() will look like:
static inline uint16_t
rte_eth_rx_burst(uint16_t port_id, uint16_t queue_id,
struct rte_mbuf **rx_pkts, const uint16_t nb_pkts)
{
if (port_id >= RTE_MAX_ETHPORTS)
return 0;
return rte_eth_dev_burst[port_id](port_id, queue_id, rx_pkts, nb_pkts);
}
Yes, it will require changes in *all* PMDs, but as I said before the changes will be a mechanic ones.
^ permalink raw reply [relevance 0%]
* [dpdk-dev] [RFC PATCH v3 0/3] Add PIE support for HQoS library
2021-06-15 9:01 3% ` [dpdk-dev] [RFC PATCH v2 " Liguzinski, WojciechX
@ 2021-06-21 7:35 3% ` Liguzinski, WojciechX
2021-07-05 8:04 3% ` [dpdk-dev] [RFC PATCH v4 " Liguzinski, WojciechX
0 siblings, 1 reply; 200+ results
From: Liguzinski, WojciechX @ 2021-06-21 7:35 UTC (permalink / raw)
To: dev, jasvinder.singh, cristian.dumitrescu; +Cc: savinay.dharmappa, megha.ajmera
DPDK sched library is equipped with mechanism that secures it from the bufferbloat problem
which is a situation when excess buffers in the network cause high latency and latency
variation. Currently, it supports RED for active queue management (which is designed
to control the queue length but it does not control latency directly and is now being
obsoleted). However, more advanced queue management is required to address this problem
and provide desirable quality of service to users.
This solution (RFC) proposes usage of new algorithm called "PIE" (Proportional Integral
controller Enhanced) that can effectively and directly control queuing latency to address
the bufferbloat problem.
The implementation of mentioned functionality includes modification of existing and
adding a new set of data structures to the library, adding PIE related APIs.
This affects structures in public API/ABI. That is why deprecation notice is going
to be prepared and sent.
Liguzinski, WojciechX (3):
sched: add PIE based congestion management
example/qos_sched: add PIE support
example/ip_pipeline: add PIE support
config/rte_config.h | 1 -
drivers/net/softnic/rte_eth_softnic_tm.c | 6 +-
examples/ip_pipeline/tmgr.c | 6 +-
examples/qos_sched/app_thread.c | 1 -
examples/qos_sched/cfg_file.c | 82 ++++-
examples/qos_sched/init.c | 7 +-
examples/qos_sched/profile.cfg | 196 ++++++++----
lib/sched/meson.build | 10 +-
lib/sched/rte_pie.c | 78 +++++
lib/sched/rte_pie.h | 388 +++++++++++++++++++++++
lib/sched/rte_sched.c | 229 +++++++++----
lib/sched/rte_sched.h | 53 +++-
12 files changed, 876 insertions(+), 181 deletions(-)
create mode 100644 lib/sched/rte_pie.c
create mode 100644 lib/sched/rte_pie.h
--
2.17.1
^ permalink raw reply [relevance 3%]
* [dpdk-dev] [PATCH v2 0/6] Enable the internal EAL thread API
2021-06-18 21:54 4% ` [dpdk-dev] [PATCH 2/6] eal: add function for control thread creation Narcisa Ana Maria Vasile
@ 2021-06-19 1:57 4% ` Narcisa Ana Maria Vasile
2021-06-19 1:57 4% ` [dpdk-dev] [PATCH v2 2/6] eal: add function for control thread creation Narcisa Ana Maria Vasile
1 sibling, 1 reply; 200+ results
From: Narcisa Ana Maria Vasile @ 2021-06-19 1:57 UTC (permalink / raw)
To: dev, thomas, dmitry.kozliuk, khot, navasile, dmitrym, roretzla,
talshn, ocardona
Cc: bruce.richardson, david.marchand, pallavi.kadam
From: Narcisa Vasile <navasile@microsoft.com>
This patchset enables the new EAL thread API.
The newly defined thread attributes, priority and affinity,
are used in eal/windows when creating the threads. Similarly,
some changes have been done in eal/linux/eal.c and eal/freebsd/eal.c
to initialize priority to a default value and set thread attributes.
The user is offered the option of either using the rte_thread_* API or
a 3rd party thread library, through a meson flag
called "use_external_thread_lib".
By default, this flag is set to FALSE, which means Windows libraries
and applications will use the EAL rte_thread_* API
defined in windows/rte_thread.c for managing threads.
When the flag is set to TRUE, the common/rte_thread.c file is compiled
and an external thread library is used.
This patchset adds a new function for creating control threads that
uses the new thread API.
It enables the usage of the new function in Windows code and common code.
The old function is kept to avoid ABI break, however, its definition
is commented away on Windows, since the pthread_t and pthread_attr_t
arguments that it receives have been replaced with the new API on Windows.
This allows testing the "eal: Add EAL API for threading" that this
patchset depends on.
The ethdev lib also contains some changes that break the ABI.
Enabling the new EAL thread API will probably require going through
the proper process of ABI changes.
Depends-on: series-17402 ("eal: Add EAL API for threading")
v2:
- fix typo in SetThreadDescription_type function pointer
- add Depends-on on all patches to fix apply errors.
- modify cover letter
Narcisa Vasile (6):
eal: add function that sets thread name
eal: add function for control thread creation
Enable the new EAL thread API in app, drivers and examples
lib: enable the new EAL thread API
eal: set affinity and priority attributes
Allow choice between internal EAL thread API and external lib
app/test/process.h | 8 +-
app/test/test_lcores.c | 18 +-
app/test/test_link_bonding.c | 14 +-
app/test/test_lpm_perf.c | 12 +-
config/meson.build | 1 -
drivers/bus/dpaa/base/qbman/bman_driver.c | 5 +-
drivers/bus/dpaa/base/qbman/dpaa_sys.c | 14 +-
drivers/bus/dpaa/base/qbman/process.c | 6 +-
drivers/bus/dpaa/dpaa_bus.c | 14 +-
drivers/bus/fslmc/portal/dpaa2_hw_dpio.c | 19 +-
drivers/common/dpaax/compat.h | 2 +-
drivers/common/mlx5/windows/mlx5_common_os.h | 1 +
drivers/compress/mlx5/mlx5_compress.c | 10 +-
drivers/event/dlb2/dlb2.c | 2 +-
drivers/event/dlb2/pf/base/dlb2_osdep.h | 7 +-
drivers/mempool/dpaa/dpaa_mempool.c | 2 +-
drivers/net/af_xdp/rte_eth_af_xdp.c | 18 +-
drivers/net/ark/ark_ethdev.c | 4 +-
drivers/net/ark/ark_pktgen.c | 4 +-
drivers/net/atlantic/atl_ethdev.c | 4 +-
drivers/net/atlantic/atl_types.h | 4 +-
.../net/atlantic/hw_atl/hw_atl_utils_fw2x.c | 26 +--
drivers/net/axgbe/axgbe_common.h | 2 +-
drivers/net/axgbe/axgbe_dev.c | 8 +-
drivers/net/axgbe/axgbe_ethdev.c | 8 +-
drivers/net/axgbe/axgbe_ethdev.h | 8 +-
drivers/net/axgbe/axgbe_i2c.c | 4 +-
drivers/net/axgbe/axgbe_mdio.c | 8 +-
drivers/net/axgbe/axgbe_phy_impl.c | 6 +-
drivers/net/bnxt/bnxt.h | 16 +-
drivers/net/bnxt/bnxt_cpr.c | 4 +-
drivers/net/bnxt/bnxt_ethdev.c | 54 ++---
drivers/net/bnxt/bnxt_irq.c | 8 +-
drivers/net/bnxt/bnxt_reps.c | 10 +-
drivers/net/bnxt/tf_ulp/bnxt_ulp.c | 34 ++--
drivers/net/bnxt/tf_ulp/bnxt_ulp.h | 4 +-
drivers/net/bnxt/tf_ulp/ulp_fc_mgr.c | 28 +--
drivers/net/bnxt/tf_ulp/ulp_fc_mgr.h | 2 +-
drivers/net/dpaa/dpaa_ethdev.c | 2 +-
drivers/net/dpaa/dpaa_rxtx.c | 2 +-
drivers/net/ena/base/ena_plat_dpdk.h | 15 +-
drivers/net/enic/enic.h | 2 +-
drivers/net/ice/ice_dcf_parent.c | 8 +-
drivers/net/ixgbe/ixgbe_ethdev.c | 6 +-
drivers/net/ixgbe/ixgbe_ethdev.h | 2 +-
drivers/net/mlx5/linux/mlx5_os.c | 2 +-
drivers/net/mlx5/mlx5.c | 20 +-
drivers/net/mlx5/mlx5.h | 2 +-
drivers/net/mlx5/mlx5_txpp.c | 8 +-
drivers/net/mlx5/windows/mlx5_flow_os.c | 10 +-
drivers/net/mlx5/windows/mlx5_os.c | 2 +-
drivers/net/qede/base/bcm_osal.h | 8 +-
drivers/net/vhost/rte_eth_vhost.c | 24 +--
.../net/virtio/virtio_user/virtio_user_dev.c | 30 +--
.../net/virtio/virtio_user/virtio_user_dev.h | 2 +-
drivers/vdpa/ifc/ifcvf_vdpa.c | 49 +++--
drivers/vdpa/mlx5/mlx5_vdpa.c | 24 +--
drivers/vdpa/mlx5/mlx5_vdpa.h | 4 +-
drivers/vdpa/mlx5/mlx5_vdpa_event.c | 51 ++---
examples/kni/main.c | 1 +
.../pthread_shim/pthread_shim.h | 1 +
lib/eal/common/eal_common_options.c | 6 +-
lib/eal/common/eal_common_thread.c | 105 +++++++++-
lib/eal/common/eal_common_trace.c | 1 +
lib/eal/common/eal_private.h | 2 +-
lib/eal/common/eal_thread.h | 6 +
lib/eal/common/malloc_mp.c | 2 +
lib/eal/common/rte_thread.c | 17 ++
lib/eal/freebsd/eal.c | 53 +++--
lib/eal/freebsd/eal_alarm.c | 12 +-
lib/eal/freebsd/eal_interrupts.c | 6 +-
lib/eal/freebsd/eal_thread.c | 10 +-
lib/eal/include/rte_lcore.h | 6 +
lib/eal/include/rte_per_lcore.h | 2 +-
lib/eal/include/rte_thread.h | 45 ++++
lib/eal/linux/eal.c | 55 +++--
lib/eal/linux/eal_alarm.c | 10 +-
lib/eal/linux/eal_interrupts.c | 8 +-
lib/eal/linux/eal_thread.c | 11 +-
lib/eal/linux/eal_timer.c | 6 +-
lib/eal/version.map | 6 +-
lib/eal/windows/eal.c | 44 +++-
lib/eal/windows/eal_interrupts.c | 10 +-
lib/eal/windows/eal_thread.c | 35 +---
lib/eal/windows/eal_windows.h | 10 -
lib/eal/windows/include/pthread.h | 192 ------------------
lib/eal/windows/include/rte_windows.h | 1 +
lib/eal/windows/meson.build | 7 +-
lib/eal/windows/rte_thread.c | 60 ++++++
lib/ethdev/rte_ethdev.c | 4 +-
lib/ethdev/rte_ethdev_core.h | 4 +-
lib/ethdev/rte_flow.c | 4 +-
lib/eventdev/rte_event_eth_rx_adapter.c | 1 +
lib/vhost/vhost.c | 1 +
meson_options.txt | 2 +
95 files changed, 764 insertions(+), 654 deletions(-)
delete mode 100644 lib/eal/windows/include/pthread.h
--
2.31.0.vfs.0.1
^ permalink raw reply [relevance 4%]
* [dpdk-dev] [PATCH v2 2/6] eal: add function for control thread creation
2021-06-19 1:57 4% ` [dpdk-dev] [PATCH v2 0/6] Enable the internal EAL thread API Narcisa Ana Maria Vasile
@ 2021-06-19 1:57 4% ` Narcisa Ana Maria Vasile
0 siblings, 0 replies; 200+ results
From: Narcisa Ana Maria Vasile @ 2021-06-19 1:57 UTC (permalink / raw)
To: dev, thomas, dmitry.kozliuk, khot, navasile, dmitrym, roretzla,
talshn, ocardona
Cc: bruce.richardson, david.marchand, pallavi.kadam
From: Narcisa Vasile <navasile@microsoft.com>
The existing rte_ctrl_thread_create() function will be replaced
with rte_thread_ctrl_thread_create() that uses the internal
EAL thread API.
This patch only introduces the new control thread creation
function. Replacing of the old function needs to be done according
to the ABI change procedures, to avoid an ABI break.
Depends-on: series-17402 ("eal: Add EAL API for threading")
Signed-off-by: Narcisa Vasile <navasile@microsoft.com>
---
lib/eal/common/eal_common_thread.c | 81 ++++++++++++++++++++++++++++++
lib/eal/include/rte_thread.h | 27 ++++++++++
lib/eal/version.map | 1 +
3 files changed, 109 insertions(+)
diff --git a/lib/eal/common/eal_common_thread.c b/lib/eal/common/eal_common_thread.c
index 1a52f42a2b..79545c67d9 100644
--- a/lib/eal/common/eal_common_thread.c
+++ b/lib/eal/common/eal_common_thread.c
@@ -259,6 +259,87 @@ rte_ctrl_thread_create(pthread_t *thread, const char *name,
return -ret;
}
+struct rte_thread_ctrl_ctx {
+ rte_thread_func start_routine;
+ void *arg;
+ const char *name;
+};
+
+static void *ctrl_thread_wrapper(void *arg)
+{
+ struct internal_config *conf = eal_get_internal_configuration();
+ rte_cpuset_t *cpuset = &conf->ctrl_cpuset;
+ struct rte_thread_ctrl_ctx *ctx = arg;
+ rte_thread_func start_routine = ctx->start_routine;
+ void *routine_arg = ctx->arg;
+
+ __rte_thread_init(rte_lcore_id(), cpuset);
+
+ if (ctx->name != NULL) {
+ if (rte_thread_name_set(rte_thread_self(), ctx->name) < 0)
+ RTE_LOG(DEBUG, EAL, "Cannot set name for ctrl thread\n");
+ }
+
+ free(arg);
+
+ return start_routine(routine_arg);
+}
+
+int
+rte_thread_ctrl_thread_create(rte_thread_t *thread, const char *name,
+ rte_thread_func start_routine, void *arg)
+{
+ int ret;
+ rte_thread_attr_t attr;
+ struct internal_config *conf = eal_get_internal_configuration();
+ rte_cpuset_t *cpuset = &conf->ctrl_cpuset;
+ struct rte_thread_ctrl_ctx *ctx = NULL;
+
+ if (start_routine == NULL) {
+ ret = EINVAL;
+ goto cleanup;
+ }
+
+ ctx = malloc(sizeof(*ctx));
+ if (ctx == NULL) {
+ ret = ENOMEM;
+ goto cleanup;
+ }
+
+ ctx->start_routine = start_routine;
+ ctx->arg = arg;
+ ctx->name = name;
+
+ ret = rte_thread_attr_init(&attr);
+ if (ret != 0) {
+ RTE_LOG(DEBUG, EAL, "Cannot init ctrl thread attributes\n");
+ goto cleanup;
+ }
+
+ ret = rte_thread_attr_set_affinity(&attr, cpuset);
+ if (ret != 0) {
+ RTE_LOG(DEBUG, EAL, "Cannot set afifnity attribute for ctrl thread\n");
+ goto cleanup;
+ }
+ ret = rte_thread_attr_set_priority(&attr, RTE_THREAD_PRIORITY_NORMAL);
+ if (ret != 0) {
+ RTE_LOG(DEBUG, EAL, "Cannot set priority attribute for ctrl thread\n");
+ goto cleanup;
+ }
+
+ ret = rte_thread_create(thread, &attr, ctrl_thread_wrapper, ctx);
+ if (ret != 0) {
+ RTE_LOG(DEBUG, EAL, "Cannot create ctrl thread\n");
+ goto cleanup;
+ }
+
+ return 0;
+
+cleanup:
+ free(ctx);
+ return ret;
+}
+
int
rte_thread_register(void)
{
diff --git a/lib/eal/include/rte_thread.h b/lib/eal/include/rte_thread.h
index c65cfd8c9e..4da800ae27 100644
--- a/lib/eal/include/rte_thread.h
+++ b/lib/eal/include/rte_thread.h
@@ -457,6 +457,33 @@ int rte_thread_barrier_destroy(rte_thread_barrier *barrier);
__rte_experimental
int rte_thread_name_set(rte_thread_t thread_id, const char *name);
+/**
+ * Create a control thread.
+ *
+ * Set affinity and thread name. The affinity of the new thread is based
+ * on the CPU affinity retrieved at the time rte_eal_init() was called,
+ * the dataplane and service lcores are then excluded.
+ *
+ * @param thread
+ * Filled with the thread id of the new created thread.
+ *
+ * @param name
+ * The name of the control thread (max 16 characters including '\0').
+ *
+ * @param start_routine
+ * Function to be executed by the new thread.
+ *
+ * @param arg
+ * Argument passed to start_routine.
+ *
+ * @return
+ * On success, return 0;
+ * On failure, return a positive errno-style error number.
+ */
+__rte_experimental
+int rte_thread_ctrl_thread_create(rte_thread_t *thread, const char *name,
+ rte_thread_func start_routine, void *arg);
+
/**
* Create a TLS data key visible to all threads in the process.
* the created key is later used to get/set a value.
diff --git a/lib/eal/version.map b/lib/eal/version.map
index 2a566c04af..02455a1c8d 100644
--- a/lib/eal/version.map
+++ b/lib/eal/version.map
@@ -444,6 +444,7 @@ EXPERIMENTAL {
rte_thread_barrier_wait;
rte_thread_barrier_destroy;
rte_thread_name_set;
+ rte_thread_ctrl_thread_create;
};
INTERNAL {
--
2.31.0.vfs.0.1
^ permalink raw reply [relevance 4%]
* [dpdk-dev] [PATCH 2/6] eal: add function for control thread creation
@ 2021-06-18 21:54 4% ` Narcisa Ana Maria Vasile
2021-06-19 1:57 4% ` [dpdk-dev] [PATCH v2 0/6] Enable the internal EAL thread API Narcisa Ana Maria Vasile
1 sibling, 0 replies; 200+ results
From: Narcisa Ana Maria Vasile @ 2021-06-18 21:54 UTC (permalink / raw)
To: dev, thomas, dmitry.kozliuk, khot, navasile, dmitrym, roretzla,
talshn, ocardona
Cc: bruce.richardson, david.marchand, pallavi.kadam
From: Narcisa Vasile <navasile@microsoft.com>
The existing rte_ctrl_thread_create() function will be replaced
with rte_thread_ctrl_thread_create() that uses the internal
EAL thread API.
This patch only introduces the new control thread creation
function. Replacing of the old function needs to be done according
to the ABI change procedures, to avoid an ABI break.
Signed-off-by: Narcisa Vasile <navasile@microsoft.com>
---
lib/eal/common/eal_common_thread.c | 81 ++++++++++++++++++++++++++++++
lib/eal/include/rte_thread.h | 27 ++++++++++
lib/eal/version.map | 1 +
3 files changed, 109 insertions(+)
diff --git a/lib/eal/common/eal_common_thread.c b/lib/eal/common/eal_common_thread.c
index 1a52f42a2b..79545c67d9 100644
--- a/lib/eal/common/eal_common_thread.c
+++ b/lib/eal/common/eal_common_thread.c
@@ -259,6 +259,87 @@ rte_ctrl_thread_create(pthread_t *thread, const char *name,
return -ret;
}
+struct rte_thread_ctrl_ctx {
+ rte_thread_func start_routine;
+ void *arg;
+ const char *name;
+};
+
+static void *ctrl_thread_wrapper(void *arg)
+{
+ struct internal_config *conf = eal_get_internal_configuration();
+ rte_cpuset_t *cpuset = &conf->ctrl_cpuset;
+ struct rte_thread_ctrl_ctx *ctx = arg;
+ rte_thread_func start_routine = ctx->start_routine;
+ void *routine_arg = ctx->arg;
+
+ __rte_thread_init(rte_lcore_id(), cpuset);
+
+ if (ctx->name != NULL) {
+ if (rte_thread_name_set(rte_thread_self(), ctx->name) < 0)
+ RTE_LOG(DEBUG, EAL, "Cannot set name for ctrl thread\n");
+ }
+
+ free(arg);
+
+ return start_routine(routine_arg);
+}
+
+int
+rte_thread_ctrl_thread_create(rte_thread_t *thread, const char *name,
+ rte_thread_func start_routine, void *arg)
+{
+ int ret;
+ rte_thread_attr_t attr;
+ struct internal_config *conf = eal_get_internal_configuration();
+ rte_cpuset_t *cpuset = &conf->ctrl_cpuset;
+ struct rte_thread_ctrl_ctx *ctx = NULL;
+
+ if (start_routine == NULL) {
+ ret = EINVAL;
+ goto cleanup;
+ }
+
+ ctx = malloc(sizeof(*ctx));
+ if (ctx == NULL) {
+ ret = ENOMEM;
+ goto cleanup;
+ }
+
+ ctx->start_routine = start_routine;
+ ctx->arg = arg;
+ ctx->name = name;
+
+ ret = rte_thread_attr_init(&attr);
+ if (ret != 0) {
+ RTE_LOG(DEBUG, EAL, "Cannot init ctrl thread attributes\n");
+ goto cleanup;
+ }
+
+ ret = rte_thread_attr_set_affinity(&attr, cpuset);
+ if (ret != 0) {
+ RTE_LOG(DEBUG, EAL, "Cannot set afifnity attribute for ctrl thread\n");
+ goto cleanup;
+ }
+ ret = rte_thread_attr_set_priority(&attr, RTE_THREAD_PRIORITY_NORMAL);
+ if (ret != 0) {
+ RTE_LOG(DEBUG, EAL, "Cannot set priority attribute for ctrl thread\n");
+ goto cleanup;
+ }
+
+ ret = rte_thread_create(thread, &attr, ctrl_thread_wrapper, ctx);
+ if (ret != 0) {
+ RTE_LOG(DEBUG, EAL, "Cannot create ctrl thread\n");
+ goto cleanup;
+ }
+
+ return 0;
+
+cleanup:
+ free(ctx);
+ return ret;
+}
+
int
rte_thread_register(void)
{
diff --git a/lib/eal/include/rte_thread.h b/lib/eal/include/rte_thread.h
index c65cfd8c9e..4da800ae27 100644
--- a/lib/eal/include/rte_thread.h
+++ b/lib/eal/include/rte_thread.h
@@ -457,6 +457,33 @@ int rte_thread_barrier_destroy(rte_thread_barrier *barrier);
__rte_experimental
int rte_thread_name_set(rte_thread_t thread_id, const char *name);
+/**
+ * Create a control thread.
+ *
+ * Set affinity and thread name. The affinity of the new thread is based
+ * on the CPU affinity retrieved at the time rte_eal_init() was called,
+ * the dataplane and service lcores are then excluded.
+ *
+ * @param thread
+ * Filled with the thread id of the new created thread.
+ *
+ * @param name
+ * The name of the control thread (max 16 characters including '\0').
+ *
+ * @param start_routine
+ * Function to be executed by the new thread.
+ *
+ * @param arg
+ * Argument passed to start_routine.
+ *
+ * @return
+ * On success, return 0;
+ * On failure, return a positive errno-style error number.
+ */
+__rte_experimental
+int rte_thread_ctrl_thread_create(rte_thread_t *thread, const char *name,
+ rte_thread_func start_routine, void *arg);
+
/**
* Create a TLS data key visible to all threads in the process.
* the created key is later used to get/set a value.
diff --git a/lib/eal/version.map b/lib/eal/version.map
index 2a566c04af..02455a1c8d 100644
--- a/lib/eal/version.map
+++ b/lib/eal/version.map
@@ -444,6 +444,7 @@ EXPERIMENTAL {
rte_thread_barrier_wait;
rte_thread_barrier_destroy;
rte_thread_name_set;
+ rte_thread_ctrl_thread_create;
};
INTERNAL {
--
2.31.0.vfs.0.1
^ permalink raw reply [relevance 4%]
* Re: [dpdk-dev] [PATCH v9 10/10] Enable the new EAL thread API
2021-06-08 7:45 5% ` David Marchand
@ 2021-06-18 21:53 0% ` Narcisa Ana Maria Vasile
0 siblings, 0 replies; 200+ results
From: Narcisa Ana Maria Vasile @ 2021-06-18 21:53 UTC (permalink / raw)
To: David Marchand
Cc: dev, Thomas Monjalon, Dmitry Kozlyuk, Khoa To, navasile,
Dmitry Malloy (MESHCHANINOV),
roretzla, Tal Shnaiderman, Omar Cardona, Bruce Richardson,
Pallavi Kadam
On Tue, Jun 08, 2021 at 09:45:44AM +0200, David Marchand wrote:
> On Tue, Jun 8, 2021 at 7:50 AM Narcisa Ana Maria Vasile
> <navasile@linux.microsoft.com> wrote:
> >
> > On Fri, Jun 04, 2021 at 04:44:34PM -0700, Narcisa Ana Maria Vasile wrote:
> > > From: Narcisa Vasile <navasile@microsoft.com>
> > >
> > > Rename pthread_* occurrences with the new rte_thread_* API.
> > > Enable the new API in the build system.
> > >
> > > Signed-off-by: Narcisa Vasile <navasile@microsoft.com>
> > > ---
> >
> > I'll send v10.
> > Can someone please help with an example on how to check for ABI breaks? Thank you!
> >
> > I've run:
> > DPDK_ABI_REF_VERSION=v21.05 DPDK_ABI_REF_DIR=~/ref ./devtools/test-meson-builds.sh
> > which doesn't give any warnings about the ABI break.
>
> This should work the way you tried if you have working toolchains and
> libabigail installed.
> Something is off in your env.
>
> Side note: ovsrobot is out those days (we have some trouble in one of
> RH labs and it happens ovsrobot is hosted there), but you could try
> with a github repo of yours + GHA, and the ABI failure should be
> caught too.
>
>
> I just tried on my rhel7 (gcc 4.8.5 + libabigail 1.8.2) with your
> series applied.
> $ DPDK_ABI_REF_VERSION=v21.05
> DPDK_ABI_REF_DIR=~/git/pub/dpdk.org/reference
> ./devtools/test-meson-builds.sh
> ...
> Error: ABI issue reported for 'abidiff --suppr
> /home/dmarchan/git/pub/dpdk.org/devtools/../devtools/libabigail.abignore
> --no-added-syms --headers-dir1
> /home/dmarchan/git/pub/dpdk.org/reference/v21.05/build-gcc-shared/usr/local/include
> --headers-dir2 /home/dmarchan/git/pub/dpdk.org/build-gcc-shared/install/usr/local/include
> /home/dmarchan/git/pub/dpdk.org/reference/v21.05/build-gcc-shared/dump/librte_eal.dump
> /home/dmarchan/git/pub/dpdk.org/build-gcc-shared/install/dump/librte_eal.dump'
> ABIDIFF_ABI_CHANGE, this change requires a review (abidiff flagged
> this as a potential issue).
>
>
> $ abidiff --suppr
> /home/dmarchan/git/pub/dpdk.org/devtools/../devtools/libabigail.abignore
> --no-added-syms --headers-dir1
> /home/dmarchan/git/pub/dpdk.org/reference/v21.05/build-gcc-shared/usr/local/include
> --headers-dir2 /home/dmarchan/git/pub/dpdk.org/build-gcc-shared/install/usr/local/include
> /home/dmarchan/git/pub/dpdk.org/reference/v21.05/build-gcc-shared/dump/librte_eal.dump
> /home/dmarchan/git/pub/dpdk.org/build-gcc-shared/install/dump/librte_eal.dump
> Functions changes summary: 0 Removed, 2 Changed (1 filtered out), 0
> Added (20 filtered out) functions
> Variables changes summary: 0 Removed, 0 Changed, 0 Added variable
>
> 2 functions with some indirect sub-type change:
>
> [C] 'function int rte_ctrl_thread_create(pthread_t*, const char*,
> const pthread_attr_t*, void* (void*)*, void*)' at rte_lcore.h:443:1
> has some indirect sub-type changes:
> parameter 1 of type 'pthread_t*' changed:
> in pointed to type 'typedef pthread_t' at rte_thread.h:42:1:
> typedef name changed from pthread_t to rte_thread_t at rte_thread.h:42:1
> underlying type 'unsigned long int' changed:
> entity changed from 'unsigned long int' to 'struct
> rte_thread_tag' at rte_thread.h:40:1
> type size hasn't changed
> parameter 3 of type 'const pthread_attr_t*' changed:
> in pointed to type 'const pthread_attr_t':
> 'const pthread_attr_t' changed to 'const rte_thread_attr_t'
>
> [C] 'function int rte_thread_setname(pthread_t, const char*)' at
> rte_lcore.h:377:1 has some indirect sub-type changes:
> parameter 1 of type 'typedef pthread_t' changed:
> typedef name changed from pthread_t to rte_thread_t at rte_thread.h:42:1
> underlying type 'unsigned long int' changed:
> entity changed from 'unsigned long int' to 'struct
> rte_thread_tag' at rte_thread.h:40:1
> type size hasn't changed
>
>
>
> Can you check that in your env build-gcc-shared/ and the build
> directory for references are configured with debug symbols?
> You should see:
> $ meson configure build-gcc-shared | awk '$1=="buildtype" {print $2}'
> debugoptimized
> $ meson configure reference/v21.05/build | awk '$1=="buildtype" {print $2}'
> debugoptimized
>
>
Thank you very much David! There was something wrong with my local reference.
Using your commands, I am able to run the tools now.
>
^ permalink raw reply [relevance 0%]
* [dpdk-dev] [PATCH v10 0/9] eal: Add EAL API for threading
2021-06-04 23:44 2% ` [dpdk-dev] [PATCH v9 " Narcisa Ana Maria Vasile
@ 2021-06-18 21:26 3% ` Narcisa Ana Maria Vasile
2 siblings, 0 replies; 200+ results
From: Narcisa Ana Maria Vasile @ 2021-06-18 21:26 UTC (permalink / raw)
To: dev, thomas, dmitry.kozliuk, khot, navasile, dmitrym, roretzla,
talshn, ocardona
Cc: bruce.richardson, david.marchand, pallavi.kadam
From: Narcisa Vasile <navasile@microsoft.com>
EAL thread API
**Problem Statement**
DPDK currently uses the pthread interface to create and manage threads.
Windows does not support the POSIX thread programming model,
so it currently relies on a header file that hides the Windows
calls under pthread matched interfaces.
Given that EAL should isolate the environment specifics from
the applications and libraries and mediate all the communication
with the operating systems, a new EAL interface
is needed for thread management.
**Goals**
* Introduce a generic EAL API for threading support that will remove
the current Windows pthread.h shim.
* Replace references to pthread_* across the DPDK codebase with the new
RTE_THREAD_* API.
* Allow users to choose between using the RTE_THREAD_* API or a
3rd party thread library through a configuration option.
**Design plan**
New API main files:
* rte_thread.h (librte_eal/include)
* rte_thread.c (librte_eal/windows)
* rte_thread.c (librte_eal/common)
**A schematic example of the design**
--------------------------------------------------
lib/librte_eal/include/rte_thread.h
int rte_thread_create();
lib/librte_eal/common/rte_thread.c
int rte_thread_create()
{
return pthread_create();
}
lib/librte_eal/windows/rte_thread.c
int rte_thread_create()
{
return CreateThread();
}
-----------------------------------------------------
**Thread attributes**
When or after a thread is created, specific characteristics of the thread
can be adjusted. Given that the thread characteristics that are of interest
for DPDK applications are affinity and priority, the following structure
that represents thread attributes has been defined:
typedef struct
{
enum rte_thread_priority priority;
rte_cpuset_t cpuset;
} rte_thread_attr_t;
The *rte_thread_create()* function can optionally receive
an rte_thread_attr_t object that will cause the thread to be created
with the affinity and priority described by the attributes object.
If no rte_thread_attr_t is passed (parameter is NULL),
the default affinity and priority are used.
An rte_thread_attr_t object can also be set to the default values
by calling *rte_thread_attr_init()*.
*Priority* is represented through an enum that currently advertises
two values for priority:
- RTE_THREAD_PRIORITY_NORMAL
- RTE_THREAD_PRIORITY_REALTIME_CRITICAL
The enum can be extended to allow for multiple priority levels.
rte_thread_set_priority - sets the priority of a thread
rte_thread_attr_set_priority - updates an rte_thread_attr_t object
with a new value for priority
The user can choose thread priority through an EAL parameter,
when starting an application. If EAL parameter is not used,
the per-platform default value for thread priority is used.
Otherwise administrator has an option to set one of available options:
--thread-prio normal
--thread-prio realtime
Example:
./dpdk-l2fwd -l 0-3 -n 4 –thread-prio normal -- -q 8 -p ffff
*Affinity* is described by the already known “rte_cpuset_t” type.
rte_thread_attr_set/get_affinity - sets/gets the affinity field in a
rte_thread_attr_t object
rte_thread_set/get_affinity – sets/gets the affinity of a thread
**Errors**
A translation function that maps Windows error codes to errno-style
error codes is provided.
**Future work**
The long term plan is for EAL to provide full threading support:
* Add support for conditional variables
* Add support for pthread_mutex_trylock
* Additional functionality offered by pthread_*
(such as pthread_setname_np, etc.)
v10:
- Remove patch no. 10. It will be broken down in subpatches
and sent as a different patchset that depends on this one.
This is done due to the ABI breaks that would be caused by patch 10.
- Replace unix/rte_thread.c with common/rte_thread.c
- Remove initializations that may prevent compiler from issuing useful
warnings.
- Remove rte_thread_types.h and rte_windows_thread_types.h
- Remove unneeded priority macros (EAL_THREAD_PRIORITY*)
- Remove functions that retrieves thread handle from process handle
- Remove rte_thread_cancel() until same behavior is obtained on
all platforms.
- Fix rte_thread_detach() function description,
return value and remove empty line.
- Reimplement mutex functions. Add compatible representation for mutex
identifier. Add macro to replace static mutex initialization instances.
- Fix commit messages (lines too long, remove unicode symbols)
v9:
- Sign patches
v8:
- Rebase
- Add rte_thread_detach() API
- Set default priority, when user did not specify a value
v7:
Based on DmitryK's review:
- Change thread id representation
- Change mutex id representation
- Implement static mutex inititalizer for Windows
- Change barrier identifier representation
- Improve commit messages
- Add missing doxygen comments
- Split error translation function
- Improve name for affinity function
- Remove cpuset_size parameter
- Fix eal_create_cpu_map function
- Map EAL priority values to OS specific values
- Add thread wrapper for start routine
- Do not export rte_thread_cancel() on Windows
- Cleanup, fix comments, fix typos.
v6:
- improve error-translation function
- call the error translation function in rte_thread_value_get()
v5:
- update cover letter with more details on the priority argument
v4:
- fix function description
- rebase
v3:
- rebase
v2:
- revert changes that break ABI
- break up changes into smaller patches
- fix coding style issues
- fix issues with errors
- fix parameter type in examples/kni.c
Narcisa Vasile (9):
eal: add basic threading functions
eal: add thread attributes
eal/windows: translate Windows errors to errno-style errors
eal: implement functions for thread affinity management
eal: implement thread priority management functions
eal: add thread lifetime management
eal: implement functions for mutex management
eal: implement functions for thread barrier management
eal: add EAL argument for setting thread priority
lib/eal/common/eal_common_options.c | 28 +-
lib/eal/common/eal_internal_cfg.h | 2 +
lib/eal/common/eal_options.h | 2 +
lib/eal/common/meson.build | 1 +
lib/eal/common/rte_thread.c | 445 +++++++++++++++++++++
lib/eal/include/rte_thread.h | 406 ++++++++++++++++++-
lib/eal/unix/meson.build | 1 -
lib/eal/unix/rte_thread.c | 92 -----
lib/eal/version.map | 20 +
lib/eal/windows/eal_lcore.c | 176 ++++++---
lib/eal/windows/eal_windows.h | 10 +
lib/eal/windows/include/sched.h | 2 +-
lib/eal/windows/rte_thread.c | 588 ++++++++++++++++++++++++++--
13 files changed, 1599 insertions(+), 174 deletions(-)
create mode 100644 lib/eal/common/rte_thread.c
delete mode 100644 lib/eal/unix/rte_thread.c
--
2.31.0.vfs.0.1
^ permalink raw reply [relevance 3%]
* [dpdk-dev] [PATCH] devtools: script to track map symbols
@ 2021-06-18 16:36 5% Ray Kinsella
2021-06-21 15:25 6% ` [dpdk-dev] [PATCH v3] " Ray Kinsella
` (2 more replies)
0 siblings, 3 replies; 200+ results
From: Ray Kinsella @ 2021-06-18 16:36 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, thomas, ktraynor, bruce.richardson, mdr
Script to track growth of stable and experimental symbols
over releases since v19.11.
Signed-off-by: Ray Kinsella <mdr@ashroe.eu>
---
devtools/count_symbols.py | 230 ++++++++++++++++++++++++++++++++++++++
1 file changed, 230 insertions(+)
create mode 100755 devtools/count_symbols.py
diff --git a/devtools/count_symbols.py b/devtools/count_symbols.py
new file mode 100755
index 0000000000..7b29651044
--- /dev/null
+++ b/devtools/count_symbols.py
@@ -0,0 +1,230 @@
+#!/usr/bin/env python3
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2021 Intel Corporation
+from pathlib import Path
+import sys, os
+import subprocess
+import argparse
+import re
+import datetime
+
+try:
+ from parsley import makeGrammar
+except ImportError:
+ print('This script uses the package Parsley to parse C Mapfiles.\n'
+ 'This can be installed with \"pip install parsley".')
+ exit()
+
+symbolMapGrammar = r"""
+
+ws = (' ' | '\r' | '\n' | '\t')*
+
+ABI_VER = ({})
+DPDK_VER = ('DPDK_' ABI_VER)
+ABI_NAME = ('INTERNAL' | 'EXPERIMENTAL' | DPDK_VER)
+comment = '#' (~'\n' anything)+ '\n'
+symbol = (~(';' | '}}' | '#') anything )+:c ';' -> ''.join(c)
+global = 'global:'
+local = 'local: *;'
+symbols = comment* symbol:s ws comment* -> s
+
+abi = (abi_section+):m -> dict(m)
+abi_section = (ws ABI_NAME:e ws '{{' ws global* (~local ws symbols)*:s ws local* ws '}}' ws DPDK_VER* ';' ws) -> (e,s)
+"""
+
+#abi_ver = ['21', '20.0.1', '20.0', '20']
+
+def get_abi_versions():
+ year = datetime.date.today().year - 2000
+ s=" |".join(['\'{}\''.format(i) for i in reversed(range(21, year + 1)) ])
+ s = s + ' | \'20.0.1\' | \'20.0\' | \'20\''
+
+ return s
+
+def get_dpdk_releases():
+ year = datetime.date.today().year - 2000
+ s="|".join("{}".format(i) for i in range(19,year + 1))
+ pattern = re.compile('^\"v(' + s + ')\.\d{2}\"$')
+
+ cmd = ['git', 'for-each-ref', '--sort=taggerdate', '--format', '"%(tag)"']
+ result = subprocess.run(cmd, \
+ stdout=subprocess.PIPE, \
+ stderr=subprocess.PIPE)
+ if result.stderr.startswith(b'fatal'):
+ result = None
+
+ tags = result.stdout.decode('utf-8').split('\n')
+
+ # find the non-rcs between now and v19.11
+ tags = [ tag.replace('\"','') \
+ for tag in reversed(tags) \
+ if pattern.match(tag) ][:-3]
+
+ return tags
+
+
+def get_terminal_rows():
+ rows, _ = os.popen('stty size', 'r').read().split()
+ return int(rows)
+
+def fix_directory_name(path):
+ mapfilepath1 = str(path.parent.name)
+ mapfilepath2 = str(path.parents[1])
+ mapfilepath = mapfilepath2 + '/librte_' + mapfilepath1
+
+ return mapfilepath
+
+# fix removal of the librte_ from the directory names
+def directory_renamed(path, rel):
+ mapfilepath = fix_directory_name(path)
+ tagfile = '{}:{}/{}'.format(rel, mapfilepath, path.name)
+
+ result = subprocess.run(['git', 'show', tagfile], \
+ stdout=subprocess.PIPE, \
+ stderr=subprocess.PIPE)
+ if result.stderr.startswith(b'fatal'):
+ result = None
+
+ return result
+
+# fix renaming of map files
+def mapfile_renamed(path, rel):
+ newfile = None
+
+ result = subprocess.run(['git', 'ls-tree', \
+ rel, str(path.parent) + '/'], \
+ stdout=subprocess.PIPE, \
+ stderr=subprocess.PIPE)
+ dentries = result.stdout.decode('utf-8')
+ dentries = dentries.split('\n')
+
+ # filter entries looking for the map file
+ dentries = [dentry for dentry in dentries if dentry.endswith('.map')]
+ if len(dentries) > 1 or len(dentries) == 0:
+ return None
+
+ dparts = dentries[0].split('/')
+ newfile = dparts[len(dparts) - 1]
+
+ if(newfile is not None):
+ tagfile = '{}:{}/{}'.format(rel, path.parent, newfile)
+
+ result = subprocess.run(['git', 'show', tagfile], \
+ stdout=subprocess.PIPE, \
+ stderr=subprocess.PIPE)
+ if result.stderr.startswith(b'fatal'):
+ result = None
+
+ else:
+ result = None
+
+ return result
+
+# renaming of the map file & renaming of directory
+def mapfile_and_directory_renamed(path, rel):
+ mapfilepath = Path("{}/{}".format(fix_directory_name(path),path.name))
+
+ return mapfile_renamed(mapfilepath, rel)
+
+fix_strategies = [directory_renamed, \
+ mapfile_renamed, \
+ mapfile_and_directory_renamed]
+
+fmt = col_fmt = ""
+
+def set_terminal_output(dpdk_rel):
+ global fmt, col_fmt
+
+ fmt = '{:<50}'
+ col_fmt = fmt
+ for rel in dpdk_rel:
+ fmt += '{:<6}{:<6}'
+ col_fmt += '{:<12}'
+
+def set_csv_output(dpdk_rel):
+ global fmt, col_fmt
+
+ fmt = '{},'
+ col_fmt = fmt
+ for rel in dpdk_rel:
+ fmt += '{},{},'
+ col_fmt += '{},,'
+
+output_formats = { None: set_terminal_output, \
+ 'terminal': set_terminal_output, \
+ 'csv': set_csv_output }
+directories = 'drivers, lib'
+
+def main():
+ global fmt, col_fmt, symbolMapGrammar
+
+ parser = argparse.ArgumentParser(description='Count symbols in DPDK Libs')
+ parser.add_argument('--format-output', choices=['terminal','csv'], \
+ default='terminal')
+ parser.add_argument('--directory', choices=directories,
+ default=directories)
+ args = parser.parse_args()
+
+ dpdk_rel = get_dpdk_releases()
+
+ # set the output format
+ output_formats[args.format_output](dpdk_rel)
+
+ column_titles = ['mapfile'] + dpdk_rel
+ print(col_fmt.format(*column_titles))
+
+ symbolMapGrammar = symbolMapGrammar.format(get_abi_versions())
+ MAPParser = makeGrammar(symbolMapGrammar, {})
+
+ terminal_rows = get_terminal_rows()
+ row = 0
+
+ for src_dir in args.directory.split(','):
+ for path in Path(src_dir).rglob('*.map'):
+ csym = [0] * 2
+ relsym = [str(path)]
+
+ for rel in dpdk_rel:
+ i = csym[0] = csym[1] = 0
+ abi_sections = None
+
+ tagfile = '{}:{}'.format(rel,path)
+ result = subprocess.run(['git', 'show', tagfile], \
+ stdout=subprocess.PIPE, \
+ stderr=subprocess.PIPE)
+
+ if result.stderr.startswith(b'fatal'):
+ result = None
+
+ while(result is None and i < len(fix_strategies)):
+ result = fix_strategies[i](path, rel)
+ i += 1
+
+ if result is not None:
+ mapfile = result.stdout.decode('utf-8')
+ abi_sections = MAPParser(mapfile).abi()
+
+ if abi_sections is not None:
+ # which versions are present, and we care about
+ ignore = ['EXPERIMENTAL','INTERNAL']
+ found_ver = [ver \
+ for ver in abi_sections \
+ if ver not in ignore]
+
+ for ver in found_ver:
+ csym[0] += len(abi_sections[ver])
+
+ # count experimental symbols
+ if 'EXPERIMENTAL' in abi_sections:
+ csym[1] = len(abi_sections['EXPERIMENTAL'])
+
+ relsym += csym
+
+ print(fmt.format(*relsym))
+ row += 1
+
+ if((terminal_rows>0) and ((row % terminal_rows) == 0)):
+ print(col_fmt.format(*column_titles))
+
+if __name__ == '__main__':
+ main()
--
2.26.2
^ permalink raw reply [relevance 5%]
* Re: [dpdk-dev] [PATCH] parray: introduce internal API for dynamic arrays
2021-06-18 10:41 0% ` Ananyev, Konstantin
@ 2021-06-18 10:49 0% ` Ferruh Yigit
2021-06-21 11:06 0% ` Ananyev, Konstantin
1 sibling, 0 replies; 200+ results
From: Ferruh Yigit @ 2021-06-18 10:49 UTC (permalink / raw)
To: Ananyev, Konstantin, Thomas Monjalon, Richardson, Bruce
Cc: Morten Brørup, dev, olivier.matz, andrew.rybchenko,
honnappa.nagarahalli, jerinj, gakhil
On 6/18/2021 11:41 AM, Ananyev, Konstantin wrote:
>
>>>>>>>
>>>>>>> 14/06/2021 15:15, Bruce Richardson:
>>>>>>>> On Mon, Jun 14, 2021 at 02:22:42PM +0200, Morten Brørup wrote:
>>>>>>>>>> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Thomas Monjalon
>>>>>>>>>> Sent: Monday, 14 June 2021 12.59
>>>>>>>>>>
>>>>>>>>>> Performance of access in a fixed-size array is very good
>>>>>>>>>> because of cache locality
>>>>>>>>>> and because there is a single pointer to dereference.
>>>>>>>>>> The only drawback is the lack of flexibility:
>>>>>>>>>> the size of such an array cannot be increase at runtime.
>>>>>>>>>>
>>>>>>>>>> An approach to this problem is to allocate the array at runtime,
>>>>>>>>>> being as efficient as static arrays, but still limited to a maximum.
>>>>>>>>>>
>>>>>>>>>> That's why the API rte_parray is introduced,
>>>>>>>>>> allowing to declare an array of pointer which can be resized
>>>>>>>>>> dynamically
>>>>>>>>>> and automatically at runtime while keeping a good read performance.
>>>>>>>>>>
>>>>>>>>>> After resize, the previous array is kept until the next resize
>>>>>>>>>> to avoid crashs during a read without any lock.
>>>>>>>>>>
>>>>>>>>>> Each element is a pointer to a memory chunk dynamically allocated.
>>>>>>>>>> This is not good for cache locality but it allows to keep the same
>>>>>>>>>> memory per element, no matter how the array is resized.
>>>>>>>>>> Cache locality could be improved with mempools.
>>>>>>>>>> The other drawback is having to dereference one more pointer
>>>>>>>>>> to read an element.
>>>>>>>>>>
>>>>>>>>>> There is not much locks, so the API is for internal use only.
>>>>>>>>>> This API may be used to completely remove some compilation-time
>>>>>>>>>> maximums.
>>>>>>>>>
>>>>>>>>> I get the purpose and overall intention of this library.
>>>>>>>>>
>>>>>>>>> I probably already mentioned that I prefer "embedded style programming" with fixed size arrays, rather than runtime
>> configurability.
>>>>>> It's
>>>>>>> my personal opinion, and the DPDK Tech Board clearly prefers reducing the amount of compile time configurability, so there is no
>> way
>>>> for
>>>>>>> me to stop this progress, and I do not intend to oppose to this library. :-)
>>>>>>>>>
>>>>>>>>> This library is likely to become a core library of DPDK, so I think it is important getting it right. Could you please mention a few
>>>>>> examples
>>>>>>> where you think this internal library should be used, and where it should not be used. Then it is easier to discuss if the border line
>>>> between
>>>>>>> control path and data plane is correct. E.g. this library is not intended to be used for dynamically sized packet queues that grow and
>>>> shrink
>>>>>> in
>>>>>>> the fast path.
>>>>>>>>>
>>>>>>>>> If the library becomes a core DPDK library, it should probably be public instead of internal. E.g. if the library is used to make
>>>>>>> RTE_MAX_ETHPORTS dynamic instead of compile time fixed, then some applications might also need dynamically sized arrays for
>> their
>>>>>>> application specific per-port runtime data, and this library could serve that purpose too.
>>>>>>>>>
>>>>>>>>
>>>>>>>> Thanks Thomas for starting this discussion and Morten for follow-up.
>>>>>>>>
>>>>>>>> My thinking is as follows, and I'm particularly keeping in mind the cases
>>>>>>>> of e.g. RTE_MAX_ETHPORTS, as a leading candidate here.
>>>>>>>>
>>>>>>>> While I dislike the hard-coded limits in DPDK, I'm also not convinced that
>>>>>>>> we should switch away from the flat arrays or that we need fully dynamic
>>>>>>>> arrays that grow/shrink at runtime for ethdevs. I would suggest a half-way
>>>>>>>> house here, where we keep the ethdevs as an array, but one allocated/sized
>>>>>>>> at runtime rather than statically. This would allow us to have a
>>>>>>>> compile-time default value, but, for use cases that need it, allow use of a
>>>>>>>> flag e.g. "max-ethdevs" to change the size of the parameter given to the
>>>>>>>> malloc call for the array. This max limit could then be provided to apps
>>>>>>>> too if they want to match any array sizes. [Alternatively those apps could
>>>>>>>> check the provided size and error out if the size has been increased beyond
>>>>>>>> what the app is designed to use?]. There would be no extra dereferences per
>>>>>>>> rx/tx burst call in this scenario so performance should be the same as
>>>>>>>> before (potentially better if array is in hugepage memory, I suppose).
>>>>>>>
>>>>>>> I think we need some benchmarks to decide what is the best tradeoff.
>>>>>>> I spent time on this implementation, but sorry I won't have time for benchmarks.
>>>>>>> Volunteers?
>>>>>>
>>>>>> I had only a quick look at your approach so far.
>>>>>> But from what I can read, in MT environment your suggestion will require
>>>>>> extra synchronization for each read-write access to such parray element (lock, rcu, ...).
>>>>>> I think what Bruce suggests will be much ligther, easier to implement and less error prone.
>>>>>> At least for rte_ethdevs[] and friends.
>>>>>> Konstantin
>>>>>
>>>>> One more thought here - if we are talking about rte_ethdev[] in particular, I think we can:
>>>>> 1. move public function pointers (rx_pkt_burst(), etc.) from rte_ethdev into a separate flat array.
>>>>> We can keep it public to still use inline functions for 'fast' calls rte_eth_rx_burst(), etc. to avoid
>>>>> any regressions.
>>>>> That could still be flat array with max_size specified at application startup.
>>>>> 2. Hide rest of rte_ethdev struct in .c.
>>>>> That will allow us to change the struct itself and the whole rte_ethdev[] table in a way we like
>>>>> (flat array, vector, hash, linked list) without ABI/API breakages.
>>>>>
>>>>> Yes, it would require all PMDs to change prototype for pkt_rx_burst() function
>>>>> (to accept port_id, queue_id instead of queue pointer), but the change is mechanical one.
>>>>> Probably some macro can be provided to simplify it.
>>>>>
>>>>
>>>> We are already planning some tasks for ABI stability for v21.11, I think
>>>> splitting 'struct rte_eth_dev' can be part of that task, it enables hiding more
>>>> internal data.
>>>
>>> Ok, sounds good.
>>>
>>>>
>>>>> The only significant complication I can foresee with implementing that approach -
>>>>> we'll need a an array of 'fast' function pointers per queue, not per device as we have now
>>>>> (to avoid extra indirection for callback implementation).
>>>>> Though as a bonus we'll have ability to use different RX/TX funcions per queue.
>>>>>
>>>>
>>>> What do you think split Rx/Tx callback into its own struct too?
>>>>
>>>> Overall 'rte_eth_dev' can be split into three as:
>>>> 1. rte_eth_dev
>>>> 2. rte_eth_dev_burst
>>>> 3. rte_eth_dev_cb
>>>>
>>>> And we can hide 1 from applications even with the inline functions.
>>>
>>> As discussed off-line, I think:
>>> it is possible.
>>> My absolute preference would be to have just 1/2 (with CB hidden).
>>
>> How can we hide the callbacks since they are used by inline burst functions.
>
> I probably I owe a better explanation to what I meant in first mail.
> Otherwise it sounds confusing.
> I'll try to write a more detailed one in next few days.
>
>>> But even with 1/2/3 in place I think it would be a good step forward.
>>> Probably worth to start with 1/2/3 first and then see how difficult it
>>> would be to switch to 1/2.
>>
>> What do you mean by switch to 1/2?
>
> When we'll have just:
> 1. rte_eth_dev (hidden in .c)
> 2. rte_eth_dev_burst (visible)
>
> And no specific public struct/array for callbacks - they will be hidden in rte_eth_dev.
>
If we can hide them, agree this is better.
>>
>> If we keep having inline functions, and split struct as above three structs, we
>> can only hide 1, and 2/3 will be still visible to apps because of inline
>> functions. This way we will be able to hide more still having same performance.
>
> I understand that, and as I said above - I think it is a good step forward.
> Though even better would be to hide rte_eth_dev_cb too.
>
>>
>>> Do you plan to start working on it?
>>>
>>
>> We are gathering the list of the tasks for the ABI stability, most probably they
>> will be worked on during v21.11. I can take this one.
>
> Cool, please keep me in a loop.
> I'll try to free some cycles for 21.11 to get involved and help (if needed off-course).
That would be great, thanks.
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH] parray: introduce internal API for dynamic arrays
2021-06-17 15:44 3% ` Ferruh Yigit
@ 2021-06-18 10:41 0% ` Ananyev, Konstantin
2021-06-18 10:49 0% ` Ferruh Yigit
2021-06-21 11:06 0% ` Ananyev, Konstantin
0 siblings, 2 replies; 200+ results
From: Ananyev, Konstantin @ 2021-06-18 10:41 UTC (permalink / raw)
To: Yigit, Ferruh, Thomas Monjalon, Richardson, Bruce
Cc: Morten Brørup, dev, olivier.matz, andrew.rybchenko,
honnappa.nagarahalli, jerinj, gakhil
> >>>>>
> >>>>> 14/06/2021 15:15, Bruce Richardson:
> >>>>>> On Mon, Jun 14, 2021 at 02:22:42PM +0200, Morten Brørup wrote:
> >>>>>>>> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Thomas Monjalon
> >>>>>>>> Sent: Monday, 14 June 2021 12.59
> >>>>>>>>
> >>>>>>>> Performance of access in a fixed-size array is very good
> >>>>>>>> because of cache locality
> >>>>>>>> and because there is a single pointer to dereference.
> >>>>>>>> The only drawback is the lack of flexibility:
> >>>>>>>> the size of such an array cannot be increase at runtime.
> >>>>>>>>
> >>>>>>>> An approach to this problem is to allocate the array at runtime,
> >>>>>>>> being as efficient as static arrays, but still limited to a maximum.
> >>>>>>>>
> >>>>>>>> That's why the API rte_parray is introduced,
> >>>>>>>> allowing to declare an array of pointer which can be resized
> >>>>>>>> dynamically
> >>>>>>>> and automatically at runtime while keeping a good read performance.
> >>>>>>>>
> >>>>>>>> After resize, the previous array is kept until the next resize
> >>>>>>>> to avoid crashs during a read without any lock.
> >>>>>>>>
> >>>>>>>> Each element is a pointer to a memory chunk dynamically allocated.
> >>>>>>>> This is not good for cache locality but it allows to keep the same
> >>>>>>>> memory per element, no matter how the array is resized.
> >>>>>>>> Cache locality could be improved with mempools.
> >>>>>>>> The other drawback is having to dereference one more pointer
> >>>>>>>> to read an element.
> >>>>>>>>
> >>>>>>>> There is not much locks, so the API is for internal use only.
> >>>>>>>> This API may be used to completely remove some compilation-time
> >>>>>>>> maximums.
> >>>>>>>
> >>>>>>> I get the purpose and overall intention of this library.
> >>>>>>>
> >>>>>>> I probably already mentioned that I prefer "embedded style programming" with fixed size arrays, rather than runtime
> configurability.
> >>>> It's
> >>>>> my personal opinion, and the DPDK Tech Board clearly prefers reducing the amount of compile time configurability, so there is no
> way
> >> for
> >>>>> me to stop this progress, and I do not intend to oppose to this library. :-)
> >>>>>>>
> >>>>>>> This library is likely to become a core library of DPDK, so I think it is important getting it right. Could you please mention a few
> >>>> examples
> >>>>> where you think this internal library should be used, and where it should not be used. Then it is easier to discuss if the border line
> >> between
> >>>>> control path and data plane is correct. E.g. this library is not intended to be used for dynamically sized packet queues that grow and
> >> shrink
> >>>> in
> >>>>> the fast path.
> >>>>>>>
> >>>>>>> If the library becomes a core DPDK library, it should probably be public instead of internal. E.g. if the library is used to make
> >>>>> RTE_MAX_ETHPORTS dynamic instead of compile time fixed, then some applications might also need dynamically sized arrays for
> their
> >>>>> application specific per-port runtime data, and this library could serve that purpose too.
> >>>>>>>
> >>>>>>
> >>>>>> Thanks Thomas for starting this discussion and Morten for follow-up.
> >>>>>>
> >>>>>> My thinking is as follows, and I'm particularly keeping in mind the cases
> >>>>>> of e.g. RTE_MAX_ETHPORTS, as a leading candidate here.
> >>>>>>
> >>>>>> While I dislike the hard-coded limits in DPDK, I'm also not convinced that
> >>>>>> we should switch away from the flat arrays or that we need fully dynamic
> >>>>>> arrays that grow/shrink at runtime for ethdevs. I would suggest a half-way
> >>>>>> house here, where we keep the ethdevs as an array, but one allocated/sized
> >>>>>> at runtime rather than statically. This would allow us to have a
> >>>>>> compile-time default value, but, for use cases that need it, allow use of a
> >>>>>> flag e.g. "max-ethdevs" to change the size of the parameter given to the
> >>>>>> malloc call for the array. This max limit could then be provided to apps
> >>>>>> too if they want to match any array sizes. [Alternatively those apps could
> >>>>>> check the provided size and error out if the size has been increased beyond
> >>>>>> what the app is designed to use?]. There would be no extra dereferences per
> >>>>>> rx/tx burst call in this scenario so performance should be the same as
> >>>>>> before (potentially better if array is in hugepage memory, I suppose).
> >>>>>
> >>>>> I think we need some benchmarks to decide what is the best tradeoff.
> >>>>> I spent time on this implementation, but sorry I won't have time for benchmarks.
> >>>>> Volunteers?
> >>>>
> >>>> I had only a quick look at your approach so far.
> >>>> But from what I can read, in MT environment your suggestion will require
> >>>> extra synchronization for each read-write access to such parray element (lock, rcu, ...).
> >>>> I think what Bruce suggests will be much ligther, easier to implement and less error prone.
> >>>> At least for rte_ethdevs[] and friends.
> >>>> Konstantin
> >>>
> >>> One more thought here - if we are talking about rte_ethdev[] in particular, I think we can:
> >>> 1. move public function pointers (rx_pkt_burst(), etc.) from rte_ethdev into a separate flat array.
> >>> We can keep it public to still use inline functions for 'fast' calls rte_eth_rx_burst(), etc. to avoid
> >>> any regressions.
> >>> That could still be flat array with max_size specified at application startup.
> >>> 2. Hide rest of rte_ethdev struct in .c.
> >>> That will allow us to change the struct itself and the whole rte_ethdev[] table in a way we like
> >>> (flat array, vector, hash, linked list) without ABI/API breakages.
> >>>
> >>> Yes, it would require all PMDs to change prototype for pkt_rx_burst() function
> >>> (to accept port_id, queue_id instead of queue pointer), but the change is mechanical one.
> >>> Probably some macro can be provided to simplify it.
> >>>
> >>
> >> We are already planning some tasks for ABI stability for v21.11, I think
> >> splitting 'struct rte_eth_dev' can be part of that task, it enables hiding more
> >> internal data.
> >
> > Ok, sounds good.
> >
> >>
> >>> The only significant complication I can foresee with implementing that approach -
> >>> we'll need a an array of 'fast' function pointers per queue, not per device as we have now
> >>> (to avoid extra indirection for callback implementation).
> >>> Though as a bonus we'll have ability to use different RX/TX funcions per queue.
> >>>
> >>
> >> What do you think split Rx/Tx callback into its own struct too?
> >>
> >> Overall 'rte_eth_dev' can be split into three as:
> >> 1. rte_eth_dev
> >> 2. rte_eth_dev_burst
> >> 3. rte_eth_dev_cb
> >>
> >> And we can hide 1 from applications even with the inline functions.
> >
> > As discussed off-line, I think:
> > it is possible.
> > My absolute preference would be to have just 1/2 (with CB hidden).
>
> How can we hide the callbacks since they are used by inline burst functions.
I probably I owe a better explanation to what I meant in first mail.
Otherwise it sounds confusing.
I'll try to write a more detailed one in next few days.
> > But even with 1/2/3 in place I think it would be a good step forward.
> > Probably worth to start with 1/2/3 first and then see how difficult it
> > would be to switch to 1/2.
>
> What do you mean by switch to 1/2?
When we'll have just:
1. rte_eth_dev (hidden in .c)
2. rte_eth_dev_burst (visible)
And no specific public struct/array for callbacks - they will be hidden in rte_eth_dev.
>
> If we keep having inline functions, and split struct as above three structs, we
> can only hide 1, and 2/3 will be still visible to apps because of inline
> functions. This way we will be able to hide more still having same performance.
I understand that, and as I said above - I think it is a good step forward.
Though even better would be to hide rte_eth_dev_cb too.
>
> > Do you plan to start working on it?
> >
>
> We are gathering the list of the tasks for the ABI stability, most probably they
> will be worked on during v21.11. I can take this one.
Cool, please keep me in a loop.
I'll try to free some cycles for 21.11 to get involved and help (if needed off-course).
Konstantin
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH] parray: introduce internal API for dynamic arrays
2021-06-17 17:05 0% ` Ananyev, Konstantin
@ 2021-06-18 10:28 0% ` Ferruh Yigit
0 siblings, 0 replies; 200+ results
From: Ferruh Yigit @ 2021-06-18 10:28 UTC (permalink / raw)
To: Ananyev, Konstantin, Morten Brørup, Thomas Monjalon,
Richardson, Bruce
Cc: dev, olivier.matz, andrew.rybchenko, honnappa.nagarahalli,
jerinj, gakhil
On 6/17/2021 6:05 PM, Ananyev, Konstantin wrote:
>
>
>> On 6/17/2021 4:17 PM, Morten Brørup wrote:
>>>> From: Ananyev, Konstantin [mailto:konstantin.ananyev@intel.com]
>>>> Sent: Thursday, 17 June 2021 16.59
>>>>
>>>>>>>>
>>>>>>>> 14/06/2021 15:15, Bruce Richardson:
>>>>>>>>> On Mon, Jun 14, 2021 at 02:22:42PM +0200, Morten Brørup wrote:
>>>>>>>>>>> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Thomas
>>>> Monjalon
>>>>>>>>>>> Sent: Monday, 14 June 2021 12.59
>>>>>>>>>>>
>>>>>>>>>>> Performance of access in a fixed-size array is very good
>>>>>>>>>>> because of cache locality
>>>>>>>>>>> and because there is a single pointer to dereference.
>>>>>>>>>>> The only drawback is the lack of flexibility:
>>>>>>>>>>> the size of such an array cannot be increase at runtime.
>>>>>>>>>>>
>>>>>>>>>>> An approach to this problem is to allocate the array at
>>>> runtime,
>>>>>>>>>>> being as efficient as static arrays, but still limited to a
>>>> maximum.
>>>>>>>>>>>
>>>>>>>>>>> That's why the API rte_parray is introduced,
>>>>>>>>>>> allowing to declare an array of pointer which can be resized
>>>>>>>>>>> dynamically
>>>>>>>>>>> and automatically at runtime while keeping a good read
>>>> performance.
>>>>>>>>>>>
>>>>>>>>>>> After resize, the previous array is kept until the next resize
>>>>>>>>>>> to avoid crashs during a read without any lock.
>>>>>>>>>>>
>>>>>>>>>>> Each element is a pointer to a memory chunk dynamically
>>>> allocated.
>>>>>>>>>>> This is not good for cache locality but it allows to keep the
>>>> same
>>>>>>>>>>> memory per element, no matter how the array is resized.
>>>>>>>>>>> Cache locality could be improved with mempools.
>>>>>>>>>>> The other drawback is having to dereference one more pointer
>>>>>>>>>>> to read an element.
>>>>>>>>>>>
>>>>>>>>>>> There is not much locks, so the API is for internal use only.
>>>>>>>>>>> This API may be used to completely remove some compilation-
>>>> time
>>>>>>>>>>> maximums.
>>>>>>>>>>
>>>>>>>>>> I get the purpose and overall intention of this library.
>>>>>>>>>>
>>>>>>>>>> I probably already mentioned that I prefer "embedded style
>>>> programming" with fixed size arrays, rather than runtime
>>>> configurability.
>>>>>>> It's
>>>>>>>> my personal opinion, and the DPDK Tech Board clearly prefers
>>>> reducing the amount of compile time configurability, so there is no way
>>>>> for
>>>>>>>> me to stop this progress, and I do not intend to oppose to this
>>>> library. :-)
>>>>>>>>>>
>>>>>>>>>> This library is likely to become a core library of DPDK, so I
>>>> think it is important getting it right. Could you please mention a few
>>>>>>> examples
>>>>>>>> where you think this internal library should be used, and where
>>>> it should not be used. Then it is easier to discuss if the border line
>>>>> between
>>>>>>>> control path and data plane is correct. E.g. this library is not
>>>> intended to be used for dynamically sized packet queues that grow and
>>>>> shrink
>>>>>>> in
>>>>>>>> the fast path.
>>>>>>>>>>
>>>>>>>>>> If the library becomes a core DPDK library, it should probably
>>>> be public instead of internal. E.g. if the library is used to make
>>>>>>>> RTE_MAX_ETHPORTS dynamic instead of compile time fixed, then some
>>>> applications might also need dynamically sized arrays for their
>>>>>>>> application specific per-port runtime data, and this library
>>>> could serve that purpose too.
>>>>>>>>>>
>>>>>>>>>
>>>>>>>>> Thanks Thomas for starting this discussion and Morten for
>>>> follow-up.
>>>>>>>>>
>>>>>>>>> My thinking is as follows, and I'm particularly keeping in mind
>>>> the cases
>>>>>>>>> of e.g. RTE_MAX_ETHPORTS, as a leading candidate here.
>>>>>>>>>
>>>>>>>>> While I dislike the hard-coded limits in DPDK, I'm also not
>>>> convinced that
>>>>>>>>> we should switch away from the flat arrays or that we need fully
>>>> dynamic
>>>>>>>>> arrays that grow/shrink at runtime for ethdevs. I would suggest
>>>> a half-way
>>>>>>>>> house here, where we keep the ethdevs as an array, but one
>>>> allocated/sized
>>>>>>>>> at runtime rather than statically. This would allow us to have a
>>>>>>>>> compile-time default value, but, for use cases that need it,
>>>> allow use of a
>>>>>>>>> flag e.g. "max-ethdevs" to change the size of the parameter
>>>> given to the
>>>>>>>>> malloc call for the array. This max limit could then be
>>>> provided to apps
>>>>>>>>> too if they want to match any array sizes. [Alternatively those
>>>> apps could
>>>>>>>>> check the provided size and error out if the size has been
>>>> increased beyond
>>>>>>>>> what the app is designed to use?]. There would be no extra
>>>> dereferences per
>>>>>>>>> rx/tx burst call in this scenario so performance should be the
>>>> same as
>>>>>>>>> before (potentially better if array is in hugepage memory, I
>>>> suppose).
>>>>>>>>
>>>>>>>> I think we need some benchmarks to decide what is the best
>>>> tradeoff.
>>>>>>>> I spent time on this implementation, but sorry I won't have time
>>>> for benchmarks.
>>>>>>>> Volunteers?
>>>>>>>
>>>>>>> I had only a quick look at your approach so far.
>>>>>>> But from what I can read, in MT environment your suggestion will
>>>> require
>>>>>>> extra synchronization for each read-write access to such parray
>>>> element (lock, rcu, ...).
>>>>>>> I think what Bruce suggests will be much ligther, easier to
>>>> implement and less error prone.
>>>>>>> At least for rte_ethdevs[] and friends.
>>>>>>> Konstantin
>>>>>>
>>>>>> One more thought here - if we are talking about rte_ethdev[] in
>>>> particular, I think we can:
>>>>>> 1. move public function pointers (rx_pkt_burst(), etc.) from
>>>> rte_ethdev into a separate flat array.
>>>>>> We can keep it public to still use inline functions for 'fast'
>>>> calls rte_eth_rx_burst(), etc. to avoid
>>>>>> any regressions.
>>>>>> That could still be flat array with max_size specified at
>>>> application startup.
>>>>>> 2. Hide rest of rte_ethdev struct in .c.
>>>>>> That will allow us to change the struct itself and the whole
>>>> rte_ethdev[] table in a way we like
>>>>>> (flat array, vector, hash, linked list) without ABI/API breakages.
>>>>>>
>>>>>> Yes, it would require all PMDs to change prototype for
>>>> pkt_rx_burst() function
>>>>>> (to accept port_id, queue_id instead of queue pointer), but the
>>>> change is mechanical one.
>>>>>> Probably some macro can be provided to simplify it.
>>>>>>
>>>>>
>>>>> We are already planning some tasks for ABI stability for v21.11, I
>>>> think
>>>>> splitting 'struct rte_eth_dev' can be part of that task, it enables
>>>> hiding more
>>>>> internal data.
>>>>
>>>> Ok, sounds good.
>>>>
>>>>>
>>>>>> The only significant complication I can foresee with implementing
>>>> that approach -
>>>>>> we'll need a an array of 'fast' function pointers per queue, not
>>>> per device as we have now
>>>>>> (to avoid extra indirection for callback implementation).
>>>>>> Though as a bonus we'll have ability to use different RX/TX
>>>> funcions per queue.
>>>>>>
>>>>>
>>>>> What do you think split Rx/Tx callback into its own struct too?
>>>>>
>>>>> Overall 'rte_eth_dev' can be split into three as:
>>>>> 1. rte_eth_dev
>>>>> 2. rte_eth_dev_burst
>>>>> 3. rte_eth_dev_cb
>>>>>
>>>>> And we can hide 1 from applications even with the inline functions.
>>>>
>>>> As discussed off-line, I think:
>>>> it is possible.
>>>> My absolute preference would be to have just 1/2 (with CB hidden).
>>>> But even with 1/2/3 in place I think it would be a good step forward.
>>>> Probably worth to start with 1/2/3 first and then see how difficult it
>>>> would be to switch to 1/2.
>>>> Do you plan to start working on it?
>>>>
>>>> Konstantin
>>>
>>> If you do proceed with this, be very careful. E.g. the inlined rx/tx burst functions should not touch more cache lines than they do today -
>> especially if there are many active ports. The inlined rx/tx burst functions are very simple, so thorough code review (and possibly also of the
>> resulting assembly) is appropriate. Simple performance testing might not detect if more cache lines are accessed than before the
>> modifications.
>>>
>>> Don't get me wrong... I do consider this an improvement of the ethdev library; I'm only asking you to take extra care!
>>>
>>
>> ack
>>
>> If we split as above, I think device specific data 'struct rte_eth_dev_data'
>> should be part of 1 (rte_eth_dev). Which means Rx/Tx inline functions access
>> additional cache line.
>>
>> To prevent this, what about duplicating 'data' in 2 (rte_eth_dev_burst)?
>
> I think it would be better to change rx_pkt_burst() to accept port_id and queue_id,
> instead of void *.
> I.E:
> typedef uint16_t (*eth_rx_burst_t)(uint16_t port_id, uint16_t queue_id, struct rte_mbuf **rx_pkts, uint16_t nb_pkts);
>
May not need to add 'port_id', since in the callback you are already in the
driver scope and all required device specific variables already accessible via
help of queue struct.
> And we can do actual de-referencing of private rxq data inside the actual rx function.
>
Yes we can replace queue struct with 'queue_id', and do the referencing in the
Rx instead of burst API, but what is the benefit of it?
>> We have
>> enough space for it to fit into single cache line, currently it is:
>> struct rte_eth_dev {
>> eth_rx_burst_t rx_pkt_burst; /* 0 8 */
>> eth_tx_burst_t tx_pkt_burst; /* 8 8 */
>> eth_tx_prep_t tx_pkt_prepare; /* 16 8 */
>> eth_rx_queue_count_t rx_queue_count; /* 24 8 */
>> eth_rx_descriptor_done_t rx_descriptor_done; /* 32 8 */
>> eth_rx_descriptor_status_t rx_descriptor_status; /* 40 8 */
>> eth_tx_descriptor_status_t tx_descriptor_status; /* 48 8 */
>> struct rte_eth_dev_data * data; /* 56 8 */
>> /* --- cacheline 1 boundary (64 bytes) --- */
>>
>> 'rx_descriptor_done' is deprecated and will be removed;
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH] parray: introduce internal API for dynamic arrays
2021-06-17 16:55 0% ` Morten Brørup
@ 2021-06-18 10:21 0% ` Ferruh Yigit
0 siblings, 0 replies; 200+ results
From: Ferruh Yigit @ 2021-06-18 10:21 UTC (permalink / raw)
To: Morten Brørup, Ananyev, Konstantin, Thomas Monjalon,
Richardson, Bruce
Cc: dev, olivier.matz, andrew.rybchenko, honnappa.nagarahalli,
jerinj, gakhil
On 6/17/2021 5:55 PM, Morten Brørup wrote:
>> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Ferruh Yigit
>> Sent: Thursday, 17 June 2021 18.13
>>
>> On 6/17/2021 4:17 PM, Morten Brørup wrote:
>>>> From: Ananyev, Konstantin [mailto:konstantin.ananyev@intel.com]
>>>> Sent: Thursday, 17 June 2021 16.59
>>>>
>>>>>>>>
>>>>>>>> 14/06/2021 15:15, Bruce Richardson:
>>>>>>>>> On Mon, Jun 14, 2021 at 02:22:42PM +0200, Morten Brørup wrote:
>>>>>>>>>>> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Thomas
>>>> Monjalon
>>>>>>>>>>> Sent: Monday, 14 June 2021 12.59
>>>>>>>>>>>
>>>>>>>>>>> Performance of access in a fixed-size array is very good
>>>>>>>>>>> because of cache locality
>>>>>>>>>>> and because there is a single pointer to dereference.
>>>>>>>>>>> The only drawback is the lack of flexibility:
>>>>>>>>>>> the size of such an array cannot be increase at runtime.
>>>>>>>>>>>
>>>>>>>>>>> An approach to this problem is to allocate the array at
>>>> runtime,
>>>>>>>>>>> being as efficient as static arrays, but still limited to a
>>>> maximum.
>>>>>>>>>>>
>>>>>>>>>>> That's why the API rte_parray is introduced,
>>>>>>>>>>> allowing to declare an array of pointer which can be resized
>>>>>>>>>>> dynamically
>>>>>>>>>>> and automatically at runtime while keeping a good read
>>>> performance.
>>>>>>>>>>>
>>>>>>>>>>> After resize, the previous array is kept until the next
>> resize
>>>>>>>>>>> to avoid crashs during a read without any lock.
>>>>>>>>>>>
>>>>>>>>>>> Each element is a pointer to a memory chunk dynamically
>>>> allocated.
>>>>>>>>>>> This is not good for cache locality but it allows to keep the
>>>> same
>>>>>>>>>>> memory per element, no matter how the array is resized.
>>>>>>>>>>> Cache locality could be improved with mempools.
>>>>>>>>>>> The other drawback is having to dereference one more pointer
>>>>>>>>>>> to read an element.
>>>>>>>>>>>
>>>>>>>>>>> There is not much locks, so the API is for internal use only.
>>>>>>>>>>> This API may be used to completely remove some compilation-
>>>> time
>>>>>>>>>>> maximums.
>>>>>>>>>>
>>>>>>>>>> I get the purpose and overall intention of this library.
>>>>>>>>>>
>>>>>>>>>> I probably already mentioned that I prefer "embedded style
>>>> programming" with fixed size arrays, rather than runtime
>>>> configurability.
>>>>>>> It's
>>>>>>>> my personal opinion, and the DPDK Tech Board clearly prefers
>>>> reducing the amount of compile time configurability, so there is no
>> way
>>>>> for
>>>>>>>> me to stop this progress, and I do not intend to oppose to this
>>>> library. :-)
>>>>>>>>>>
>>>>>>>>>> This library is likely to become a core library of DPDK, so I
>>>> think it is important getting it right. Could you please mention a
>> few
>>>>>>> examples
>>>>>>>> where you think this internal library should be used, and where
>>>> it should not be used. Then it is easier to discuss if the border
>> line
>>>>> between
>>>>>>>> control path and data plane is correct. E.g. this library is not
>>>> intended to be used for dynamically sized packet queues that grow
>> and
>>>>> shrink
>>>>>>> in
>>>>>>>> the fast path.
>>>>>>>>>>
>>>>>>>>>> If the library becomes a core DPDK library, it should probably
>>>> be public instead of internal. E.g. if the library is used to make
>>>>>>>> RTE_MAX_ETHPORTS dynamic instead of compile time fixed, then
>> some
>>>> applications might also need dynamically sized arrays for their
>>>>>>>> application specific per-port runtime data, and this library
>>>> could serve that purpose too.
>>>>>>>>>>
>>>>>>>>>
>>>>>>>>> Thanks Thomas for starting this discussion and Morten for
>>>> follow-up.
>>>>>>>>>
>>>>>>>>> My thinking is as follows, and I'm particularly keeping in mind
>>>> the cases
>>>>>>>>> of e.g. RTE_MAX_ETHPORTS, as a leading candidate here.
>>>>>>>>>
>>>>>>>>> While I dislike the hard-coded limits in DPDK, I'm also not
>>>> convinced that
>>>>>>>>> we should switch away from the flat arrays or that we need
>> fully
>>>> dynamic
>>>>>>>>> arrays that grow/shrink at runtime for ethdevs. I would suggest
>>>> a half-way
>>>>>>>>> house here, where we keep the ethdevs as an array, but one
>>>> allocated/sized
>>>>>>>>> at runtime rather than statically. This would allow us to have
>> a
>>>>>>>>> compile-time default value, but, for use cases that need it,
>>>> allow use of a
>>>>>>>>> flag e.g. "max-ethdevs" to change the size of the parameter
>>>> given to the
>>>>>>>>> malloc call for the array. This max limit could then be
>>>> provided to apps
>>>>>>>>> too if they want to match any array sizes. [Alternatively those
>>>> apps could
>>>>>>>>> check the provided size and error out if the size has been
>>>> increased beyond
>>>>>>>>> what the app is designed to use?]. There would be no extra
>>>> dereferences per
>>>>>>>>> rx/tx burst call in this scenario so performance should be the
>>>> same as
>>>>>>>>> before (potentially better if array is in hugepage memory, I
>>>> suppose).
>>>>>>>>
>>>>>>>> I think we need some benchmarks to decide what is the best
>>>> tradeoff.
>>>>>>>> I spent time on this implementation, but sorry I won't have time
>>>> for benchmarks.
>>>>>>>> Volunteers?
>>>>>>>
>>>>>>> I had only a quick look at your approach so far.
>>>>>>> But from what I can read, in MT environment your suggestion will
>>>> require
>>>>>>> extra synchronization for each read-write access to such parray
>>>> element (lock, rcu, ...).
>>>>>>> I think what Bruce suggests will be much ligther, easier to
>>>> implement and less error prone.
>>>>>>> At least for rte_ethdevs[] and friends.
>>>>>>> Konstantin
>>>>>>
>>>>>> One more thought here - if we are talking about rte_ethdev[] in
>>>> particular, I think we can:
>>>>>> 1. move public function pointers (rx_pkt_burst(), etc.) from
>>>> rte_ethdev into a separate flat array.
>>>>>> We can keep it public to still use inline functions for 'fast'
>>>> calls rte_eth_rx_burst(), etc. to avoid
>>>>>> any regressions.
>>>>>> That could still be flat array with max_size specified at
>>>> application startup.
>>>>>> 2. Hide rest of rte_ethdev struct in .c.
>>>>>> That will allow us to change the struct itself and the whole
>>>> rte_ethdev[] table in a way we like
>>>>>> (flat array, vector, hash, linked list) without ABI/API breakages.
>>>>>>
>>>>>> Yes, it would require all PMDs to change prototype for
>>>> pkt_rx_burst() function
>>>>>> (to accept port_id, queue_id instead of queue pointer), but the
>>>> change is mechanical one.
>>>>>> Probably some macro can be provided to simplify it.
>>>>>>
>>>>>
>>>>> We are already planning some tasks for ABI stability for v21.11, I
>>>> think
>>>>> splitting 'struct rte_eth_dev' can be part of that task, it enables
>>>> hiding more
>>>>> internal data.
>>>>
>>>> Ok, sounds good.
>>>>
>>>>>
>>>>>> The only significant complication I can foresee with implementing
>>>> that approach -
>>>>>> we'll need a an array of 'fast' function pointers per queue, not
>>>> per device as we have now
>>>>>> (to avoid extra indirection for callback implementation).
>>>>>> Though as a bonus we'll have ability to use different RX/TX
>>>> funcions per queue.
>>>>>>
>>>>>
>>>>> What do you think split Rx/Tx callback into its own struct too?
>>>>>
>>>>> Overall 'rte_eth_dev' can be split into three as:
>>>>> 1. rte_eth_dev
>>>>> 2. rte_eth_dev_burst
>>>>> 3. rte_eth_dev_cb
>>>>>
>>>>> And we can hide 1 from applications even with the inline functions.
>>>>
>>>> As discussed off-line, I think:
>>>> it is possible.
>>>> My absolute preference would be to have just 1/2 (with CB hidden).
>>>> But even with 1/2/3 in place I think it would be a good step
>> forward.
>>>> Probably worth to start with 1/2/3 first and then see how difficult
>> it
>>>> would be to switch to 1/2.
>>>> Do you plan to start working on it?
>>>>
>>>> Konstantin
>>>
>>> If you do proceed with this, be very careful. E.g. the inlined rx/tx
>> burst functions should not touch more cache lines than they do today -
>> especially if there are many active ports. The inlined rx/tx burst
>> functions are very simple, so thorough code review (and possibly also
>> of the resulting assembly) is appropriate. Simple performance testing
>> might not detect if more cache lines are accessed than before the
>> modifications.
>>>
>>> Don't get me wrong... I do consider this an improvement of the ethdev
>> library; I'm only asking you to take extra care!
>>>
>>
>> ack
>>
>> If we split as above, I think device specific data 'struct
>> rte_eth_dev_data'
>> should be part of 1 (rte_eth_dev). Which means Rx/Tx inline functions
>> access
>> additional cache line.
>>
>> To prevent this, what about duplicating 'data' in 2
>> (rte_eth_dev_burst)? We have
>> enough space for it to fit into single cache line, currently it is:
>> struct rte_eth_dev {
>> eth_rx_burst_t rx_pkt_burst; /* 0 8
>> */
>> eth_tx_burst_t tx_pkt_burst; /* 8 8
>> */
>> eth_tx_prep_t tx_pkt_prepare; /* 16 8
>> */
>> eth_rx_queue_count_t rx_queue_count; /* 24 8
>> */
>> eth_rx_descriptor_done_t rx_descriptor_done; /* 32 8
>> */
>> eth_rx_descriptor_status_t rx_descriptor_status; /* 40 8
>> */
>> eth_tx_descriptor_status_t tx_descriptor_status; /* 48 8
>> */
>> struct rte_eth_dev_data * data; /* 56 8
>> */
>> /* --- cacheline 1 boundary (64 bytes) --- */
>>
>> 'rx_descriptor_done' is deprecated and will be removed;
>
> Makes sense.
>
> Also consider moving 'data' to the top of the new struct, so there is room to add future functions below. (Without growing to more than the one cache line size, one new function can be added when 'rx_descriptor_done' has been removed.)
>
+1
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH] parray: introduce internal API for dynamic arrays
2021-06-17 16:12 0% ` Ferruh Yigit
2021-06-17 16:55 0% ` Morten Brørup
@ 2021-06-17 17:05 0% ` Ananyev, Konstantin
2021-06-18 10:28 0% ` Ferruh Yigit
1 sibling, 1 reply; 200+ results
From: Ananyev, Konstantin @ 2021-06-17 17:05 UTC (permalink / raw)
To: Yigit, Ferruh, Morten Brørup, Thomas Monjalon, Richardson, Bruce
Cc: dev, olivier.matz, andrew.rybchenko, honnappa.nagarahalli,
jerinj, gakhil
> On 6/17/2021 4:17 PM, Morten Brørup wrote:
> >> From: Ananyev, Konstantin [mailto:konstantin.ananyev@intel.com]
> >> Sent: Thursday, 17 June 2021 16.59
> >>
> >>>>>>
> >>>>>> 14/06/2021 15:15, Bruce Richardson:
> >>>>>>> On Mon, Jun 14, 2021 at 02:22:42PM +0200, Morten Brørup wrote:
> >>>>>>>>> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Thomas
> >> Monjalon
> >>>>>>>>> Sent: Monday, 14 June 2021 12.59
> >>>>>>>>>
> >>>>>>>>> Performance of access in a fixed-size array is very good
> >>>>>>>>> because of cache locality
> >>>>>>>>> and because there is a single pointer to dereference.
> >>>>>>>>> The only drawback is the lack of flexibility:
> >>>>>>>>> the size of such an array cannot be increase at runtime.
> >>>>>>>>>
> >>>>>>>>> An approach to this problem is to allocate the array at
> >> runtime,
> >>>>>>>>> being as efficient as static arrays, but still limited to a
> >> maximum.
> >>>>>>>>>
> >>>>>>>>> That's why the API rte_parray is introduced,
> >>>>>>>>> allowing to declare an array of pointer which can be resized
> >>>>>>>>> dynamically
> >>>>>>>>> and automatically at runtime while keeping a good read
> >> performance.
> >>>>>>>>>
> >>>>>>>>> After resize, the previous array is kept until the next resize
> >>>>>>>>> to avoid crashs during a read without any lock.
> >>>>>>>>>
> >>>>>>>>> Each element is a pointer to a memory chunk dynamically
> >> allocated.
> >>>>>>>>> This is not good for cache locality but it allows to keep the
> >> same
> >>>>>>>>> memory per element, no matter how the array is resized.
> >>>>>>>>> Cache locality could be improved with mempools.
> >>>>>>>>> The other drawback is having to dereference one more pointer
> >>>>>>>>> to read an element.
> >>>>>>>>>
> >>>>>>>>> There is not much locks, so the API is for internal use only.
> >>>>>>>>> This API may be used to completely remove some compilation-
> >> time
> >>>>>>>>> maximums.
> >>>>>>>>
> >>>>>>>> I get the purpose and overall intention of this library.
> >>>>>>>>
> >>>>>>>> I probably already mentioned that I prefer "embedded style
> >> programming" with fixed size arrays, rather than runtime
> >> configurability.
> >>>>> It's
> >>>>>> my personal opinion, and the DPDK Tech Board clearly prefers
> >> reducing the amount of compile time configurability, so there is no way
> >>> for
> >>>>>> me to stop this progress, and I do not intend to oppose to this
> >> library. :-)
> >>>>>>>>
> >>>>>>>> This library is likely to become a core library of DPDK, so I
> >> think it is important getting it right. Could you please mention a few
> >>>>> examples
> >>>>>> where you think this internal library should be used, and where
> >> it should not be used. Then it is easier to discuss if the border line
> >>> between
> >>>>>> control path and data plane is correct. E.g. this library is not
> >> intended to be used for dynamically sized packet queues that grow and
> >>> shrink
> >>>>> in
> >>>>>> the fast path.
> >>>>>>>>
> >>>>>>>> If the library becomes a core DPDK library, it should probably
> >> be public instead of internal. E.g. if the library is used to make
> >>>>>> RTE_MAX_ETHPORTS dynamic instead of compile time fixed, then some
> >> applications might also need dynamically sized arrays for their
> >>>>>> application specific per-port runtime data, and this library
> >> could serve that purpose too.
> >>>>>>>>
> >>>>>>>
> >>>>>>> Thanks Thomas for starting this discussion and Morten for
> >> follow-up.
> >>>>>>>
> >>>>>>> My thinking is as follows, and I'm particularly keeping in mind
> >> the cases
> >>>>>>> of e.g. RTE_MAX_ETHPORTS, as a leading candidate here.
> >>>>>>>
> >>>>>>> While I dislike the hard-coded limits in DPDK, I'm also not
> >> convinced that
> >>>>>>> we should switch away from the flat arrays or that we need fully
> >> dynamic
> >>>>>>> arrays that grow/shrink at runtime for ethdevs. I would suggest
> >> a half-way
> >>>>>>> house here, where we keep the ethdevs as an array, but one
> >> allocated/sized
> >>>>>>> at runtime rather than statically. This would allow us to have a
> >>>>>>> compile-time default value, but, for use cases that need it,
> >> allow use of a
> >>>>>>> flag e.g. "max-ethdevs" to change the size of the parameter
> >> given to the
> >>>>>>> malloc call for the array. This max limit could then be
> >> provided to apps
> >>>>>>> too if they want to match any array sizes. [Alternatively those
> >> apps could
> >>>>>>> check the provided size and error out if the size has been
> >> increased beyond
> >>>>>>> what the app is designed to use?]. There would be no extra
> >> dereferences per
> >>>>>>> rx/tx burst call in this scenario so performance should be the
> >> same as
> >>>>>>> before (potentially better if array is in hugepage memory, I
> >> suppose).
> >>>>>>
> >>>>>> I think we need some benchmarks to decide what is the best
> >> tradeoff.
> >>>>>> I spent time on this implementation, but sorry I won't have time
> >> for benchmarks.
> >>>>>> Volunteers?
> >>>>>
> >>>>> I had only a quick look at your approach so far.
> >>>>> But from what I can read, in MT environment your suggestion will
> >> require
> >>>>> extra synchronization for each read-write access to such parray
> >> element (lock, rcu, ...).
> >>>>> I think what Bruce suggests will be much ligther, easier to
> >> implement and less error prone.
> >>>>> At least for rte_ethdevs[] and friends.
> >>>>> Konstantin
> >>>>
> >>>> One more thought here - if we are talking about rte_ethdev[] in
> >> particular, I think we can:
> >>>> 1. move public function pointers (rx_pkt_burst(), etc.) from
> >> rte_ethdev into a separate flat array.
> >>>> We can keep it public to still use inline functions for 'fast'
> >> calls rte_eth_rx_burst(), etc. to avoid
> >>>> any regressions.
> >>>> That could still be flat array with max_size specified at
> >> application startup.
> >>>> 2. Hide rest of rte_ethdev struct in .c.
> >>>> That will allow us to change the struct itself and the whole
> >> rte_ethdev[] table in a way we like
> >>>> (flat array, vector, hash, linked list) without ABI/API breakages.
> >>>>
> >>>> Yes, it would require all PMDs to change prototype for
> >> pkt_rx_burst() function
> >>>> (to accept port_id, queue_id instead of queue pointer), but the
> >> change is mechanical one.
> >>>> Probably some macro can be provided to simplify it.
> >>>>
> >>>
> >>> We are already planning some tasks for ABI stability for v21.11, I
> >> think
> >>> splitting 'struct rte_eth_dev' can be part of that task, it enables
> >> hiding more
> >>> internal data.
> >>
> >> Ok, sounds good.
> >>
> >>>
> >>>> The only significant complication I can foresee with implementing
> >> that approach -
> >>>> we'll need a an array of 'fast' function pointers per queue, not
> >> per device as we have now
> >>>> (to avoid extra indirection for callback implementation).
> >>>> Though as a bonus we'll have ability to use different RX/TX
> >> funcions per queue.
> >>>>
> >>>
> >>> What do you think split Rx/Tx callback into its own struct too?
> >>>
> >>> Overall 'rte_eth_dev' can be split into three as:
> >>> 1. rte_eth_dev
> >>> 2. rte_eth_dev_burst
> >>> 3. rte_eth_dev_cb
> >>>
> >>> And we can hide 1 from applications even with the inline functions.
> >>
> >> As discussed off-line, I think:
> >> it is possible.
> >> My absolute preference would be to have just 1/2 (with CB hidden).
> >> But even with 1/2/3 in place I think it would be a good step forward.
> >> Probably worth to start with 1/2/3 first and then see how difficult it
> >> would be to switch to 1/2.
> >> Do you plan to start working on it?
> >>
> >> Konstantin
> >
> > If you do proceed with this, be very careful. E.g. the inlined rx/tx burst functions should not touch more cache lines than they do today -
> especially if there are many active ports. The inlined rx/tx burst functions are very simple, so thorough code review (and possibly also of the
> resulting assembly) is appropriate. Simple performance testing might not detect if more cache lines are accessed than before the
> modifications.
> >
> > Don't get me wrong... I do consider this an improvement of the ethdev library; I'm only asking you to take extra care!
> >
>
> ack
>
> If we split as above, I think device specific data 'struct rte_eth_dev_data'
> should be part of 1 (rte_eth_dev). Which means Rx/Tx inline functions access
> additional cache line.
>
> To prevent this, what about duplicating 'data' in 2 (rte_eth_dev_burst)?
I think it would be better to change rx_pkt_burst() to accept port_id and queue_id,
instead of void *.
I.E:
typedef uint16_t (*eth_rx_burst_t)(uint16_t port_id, uint16_t queue_id, struct rte_mbuf **rx_pkts, uint16_t nb_pkts);
And we can do actual de-referencing of private rxq data inside the actual rx function.
> We have
> enough space for it to fit into single cache line, currently it is:
> struct rte_eth_dev {
> eth_rx_burst_t rx_pkt_burst; /* 0 8 */
> eth_tx_burst_t tx_pkt_burst; /* 8 8 */
> eth_tx_prep_t tx_pkt_prepare; /* 16 8 */
> eth_rx_queue_count_t rx_queue_count; /* 24 8 */
> eth_rx_descriptor_done_t rx_descriptor_done; /* 32 8 */
> eth_rx_descriptor_status_t rx_descriptor_status; /* 40 8 */
> eth_tx_descriptor_status_t tx_descriptor_status; /* 48 8 */
> struct rte_eth_dev_data * data; /* 56 8 */
> /* --- cacheline 1 boundary (64 bytes) --- */
>
> 'rx_descriptor_done' is deprecated and will be removed;
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH] parray: introduce internal API for dynamic arrays
2021-06-17 16:12 0% ` Ferruh Yigit
@ 2021-06-17 16:55 0% ` Morten Brørup
2021-06-18 10:21 0% ` Ferruh Yigit
2021-06-17 17:05 0% ` Ananyev, Konstantin
1 sibling, 1 reply; 200+ results
From: Morten Brørup @ 2021-06-17 16:55 UTC (permalink / raw)
To: Ferruh Yigit, Ananyev, Konstantin, Thomas Monjalon, Richardson, Bruce
Cc: dev, olivier.matz, andrew.rybchenko, honnappa.nagarahalli,
jerinj, gakhil
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Ferruh Yigit
> Sent: Thursday, 17 June 2021 18.13
>
> On 6/17/2021 4:17 PM, Morten Brørup wrote:
> >> From: Ananyev, Konstantin [mailto:konstantin.ananyev@intel.com]
> >> Sent: Thursday, 17 June 2021 16.59
> >>
> >>>>>>
> >>>>>> 14/06/2021 15:15, Bruce Richardson:
> >>>>>>> On Mon, Jun 14, 2021 at 02:22:42PM +0200, Morten Brørup wrote:
> >>>>>>>>> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Thomas
> >> Monjalon
> >>>>>>>>> Sent: Monday, 14 June 2021 12.59
> >>>>>>>>>
> >>>>>>>>> Performance of access in a fixed-size array is very good
> >>>>>>>>> because of cache locality
> >>>>>>>>> and because there is a single pointer to dereference.
> >>>>>>>>> The only drawback is the lack of flexibility:
> >>>>>>>>> the size of such an array cannot be increase at runtime.
> >>>>>>>>>
> >>>>>>>>> An approach to this problem is to allocate the array at
> >> runtime,
> >>>>>>>>> being as efficient as static arrays, but still limited to a
> >> maximum.
> >>>>>>>>>
> >>>>>>>>> That's why the API rte_parray is introduced,
> >>>>>>>>> allowing to declare an array of pointer which can be resized
> >>>>>>>>> dynamically
> >>>>>>>>> and automatically at runtime while keeping a good read
> >> performance.
> >>>>>>>>>
> >>>>>>>>> After resize, the previous array is kept until the next
> resize
> >>>>>>>>> to avoid crashs during a read without any lock.
> >>>>>>>>>
> >>>>>>>>> Each element is a pointer to a memory chunk dynamically
> >> allocated.
> >>>>>>>>> This is not good for cache locality but it allows to keep the
> >> same
> >>>>>>>>> memory per element, no matter how the array is resized.
> >>>>>>>>> Cache locality could be improved with mempools.
> >>>>>>>>> The other drawback is having to dereference one more pointer
> >>>>>>>>> to read an element.
> >>>>>>>>>
> >>>>>>>>> There is not much locks, so the API is for internal use only.
> >>>>>>>>> This API may be used to completely remove some compilation-
> >> time
> >>>>>>>>> maximums.
> >>>>>>>>
> >>>>>>>> I get the purpose and overall intention of this library.
> >>>>>>>>
> >>>>>>>> I probably already mentioned that I prefer "embedded style
> >> programming" with fixed size arrays, rather than runtime
> >> configurability.
> >>>>> It's
> >>>>>> my personal opinion, and the DPDK Tech Board clearly prefers
> >> reducing the amount of compile time configurability, so there is no
> way
> >>> for
> >>>>>> me to stop this progress, and I do not intend to oppose to this
> >> library. :-)
> >>>>>>>>
> >>>>>>>> This library is likely to become a core library of DPDK, so I
> >> think it is important getting it right. Could you please mention a
> few
> >>>>> examples
> >>>>>> where you think this internal library should be used, and where
> >> it should not be used. Then it is easier to discuss if the border
> line
> >>> between
> >>>>>> control path and data plane is correct. E.g. this library is not
> >> intended to be used for dynamically sized packet queues that grow
> and
> >>> shrink
> >>>>> in
> >>>>>> the fast path.
> >>>>>>>>
> >>>>>>>> If the library becomes a core DPDK library, it should probably
> >> be public instead of internal. E.g. if the library is used to make
> >>>>>> RTE_MAX_ETHPORTS dynamic instead of compile time fixed, then
> some
> >> applications might also need dynamically sized arrays for their
> >>>>>> application specific per-port runtime data, and this library
> >> could serve that purpose too.
> >>>>>>>>
> >>>>>>>
> >>>>>>> Thanks Thomas for starting this discussion and Morten for
> >> follow-up.
> >>>>>>>
> >>>>>>> My thinking is as follows, and I'm particularly keeping in mind
> >> the cases
> >>>>>>> of e.g. RTE_MAX_ETHPORTS, as a leading candidate here.
> >>>>>>>
> >>>>>>> While I dislike the hard-coded limits in DPDK, I'm also not
> >> convinced that
> >>>>>>> we should switch away from the flat arrays or that we need
> fully
> >> dynamic
> >>>>>>> arrays that grow/shrink at runtime for ethdevs. I would suggest
> >> a half-way
> >>>>>>> house here, where we keep the ethdevs as an array, but one
> >> allocated/sized
> >>>>>>> at runtime rather than statically. This would allow us to have
> a
> >>>>>>> compile-time default value, but, for use cases that need it,
> >> allow use of a
> >>>>>>> flag e.g. "max-ethdevs" to change the size of the parameter
> >> given to the
> >>>>>>> malloc call for the array. This max limit could then be
> >> provided to apps
> >>>>>>> too if they want to match any array sizes. [Alternatively those
> >> apps could
> >>>>>>> check the provided size and error out if the size has been
> >> increased beyond
> >>>>>>> what the app is designed to use?]. There would be no extra
> >> dereferences per
> >>>>>>> rx/tx burst call in this scenario so performance should be the
> >> same as
> >>>>>>> before (potentially better if array is in hugepage memory, I
> >> suppose).
> >>>>>>
> >>>>>> I think we need some benchmarks to decide what is the best
> >> tradeoff.
> >>>>>> I spent time on this implementation, but sorry I won't have time
> >> for benchmarks.
> >>>>>> Volunteers?
> >>>>>
> >>>>> I had only a quick look at your approach so far.
> >>>>> But from what I can read, in MT environment your suggestion will
> >> require
> >>>>> extra synchronization for each read-write access to such parray
> >> element (lock, rcu, ...).
> >>>>> I think what Bruce suggests will be much ligther, easier to
> >> implement and less error prone.
> >>>>> At least for rte_ethdevs[] and friends.
> >>>>> Konstantin
> >>>>
> >>>> One more thought here - if we are talking about rte_ethdev[] in
> >> particular, I think we can:
> >>>> 1. move public function pointers (rx_pkt_burst(), etc.) from
> >> rte_ethdev into a separate flat array.
> >>>> We can keep it public to still use inline functions for 'fast'
> >> calls rte_eth_rx_burst(), etc. to avoid
> >>>> any regressions.
> >>>> That could still be flat array with max_size specified at
> >> application startup.
> >>>> 2. Hide rest of rte_ethdev struct in .c.
> >>>> That will allow us to change the struct itself and the whole
> >> rte_ethdev[] table in a way we like
> >>>> (flat array, vector, hash, linked list) without ABI/API breakages.
> >>>>
> >>>> Yes, it would require all PMDs to change prototype for
> >> pkt_rx_burst() function
> >>>> (to accept port_id, queue_id instead of queue pointer), but the
> >> change is mechanical one.
> >>>> Probably some macro can be provided to simplify it.
> >>>>
> >>>
> >>> We are already planning some tasks for ABI stability for v21.11, I
> >> think
> >>> splitting 'struct rte_eth_dev' can be part of that task, it enables
> >> hiding more
> >>> internal data.
> >>
> >> Ok, sounds good.
> >>
> >>>
> >>>> The only significant complication I can foresee with implementing
> >> that approach -
> >>>> we'll need a an array of 'fast' function pointers per queue, not
> >> per device as we have now
> >>>> (to avoid extra indirection for callback implementation).
> >>>> Though as a bonus we'll have ability to use different RX/TX
> >> funcions per queue.
> >>>>
> >>>
> >>> What do you think split Rx/Tx callback into its own struct too?
> >>>
> >>> Overall 'rte_eth_dev' can be split into three as:
> >>> 1. rte_eth_dev
> >>> 2. rte_eth_dev_burst
> >>> 3. rte_eth_dev_cb
> >>>
> >>> And we can hide 1 from applications even with the inline functions.
> >>
> >> As discussed off-line, I think:
> >> it is possible.
> >> My absolute preference would be to have just 1/2 (with CB hidden).
> >> But even with 1/2/3 in place I think it would be a good step
> forward.
> >> Probably worth to start with 1/2/3 first and then see how difficult
> it
> >> would be to switch to 1/2.
> >> Do you plan to start working on it?
> >>
> >> Konstantin
> >
> > If you do proceed with this, be very careful. E.g. the inlined rx/tx
> burst functions should not touch more cache lines than they do today -
> especially if there are many active ports. The inlined rx/tx burst
> functions are very simple, so thorough code review (and possibly also
> of the resulting assembly) is appropriate. Simple performance testing
> might not detect if more cache lines are accessed than before the
> modifications.
> >
> > Don't get me wrong... I do consider this an improvement of the ethdev
> library; I'm only asking you to take extra care!
> >
>
> ack
>
> If we split as above, I think device specific data 'struct
> rte_eth_dev_data'
> should be part of 1 (rte_eth_dev). Which means Rx/Tx inline functions
> access
> additional cache line.
>
> To prevent this, what about duplicating 'data' in 2
> (rte_eth_dev_burst)? We have
> enough space for it to fit into single cache line, currently it is:
> struct rte_eth_dev {
> eth_rx_burst_t rx_pkt_burst; /* 0 8
> */
> eth_tx_burst_t tx_pkt_burst; /* 8 8
> */
> eth_tx_prep_t tx_pkt_prepare; /* 16 8
> */
> eth_rx_queue_count_t rx_queue_count; /* 24 8
> */
> eth_rx_descriptor_done_t rx_descriptor_done; /* 32 8
> */
> eth_rx_descriptor_status_t rx_descriptor_status; /* 40 8
> */
> eth_tx_descriptor_status_t tx_descriptor_status; /* 48 8
> */
> struct rte_eth_dev_data * data; /* 56 8
> */
> /* --- cacheline 1 boundary (64 bytes) --- */
>
> 'rx_descriptor_done' is deprecated and will be removed;
Makes sense.
Also consider moving 'data' to the top of the new struct, so there is room to add future functions below. (Without growing to more than the one cache line size, one new function can be added when 'rx_descriptor_done' has been removed.)
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH] net: introduce IPv4 ihl and version fields
2021-06-14 16:36 4% ` Andrew Rybchenko
@ 2021-06-17 16:29 0% ` Ferruh Yigit
0 siblings, 0 replies; 200+ results
From: Ferruh Yigit @ 2021-06-17 16:29 UTC (permalink / raw)
To: Andrew Rybchenko, Olivier Matz, Gregory Etelson
Cc: Iremonger, Bernard, Morten Brørup, dev, Matan Azrad,
Ori Kam, Raslan Darawsheh, Asaf Penso, Thomas Monjalon
On 6/14/2021 5:36 PM, Andrew Rybchenko wrote:
> On 6/10/21 12:22 PM, Olivier Matz wrote:
>> Hi Gregory,
>>
>> On Thu, Jun 10, 2021 at 04:10:25AM +0000, Gregory Etelson wrote:
>>> Hello,
>>>
>>> There was no activity that patch for a long time.
>>> The patch is marked as failed, but we verified failed tests and concluded
>>> that the failures can be ignored.
>>> https://patchwork.dpdk.org/project/dpdk/patch/20210527152858.13312-1-getelson@nvidia.com/
>>>
>>> How should I proceed with this case ?
>>> Please advise.
>>>
>>
>> I like the idea of this patch: to me it is more convenient to access to
>> these fields with a bitfield. I don't see a problem about using
>> bitfields here, glibc or FreeBSD netinet/ip.h are doing the same.
>>
>> However, as stated previously, this patch breaks the initialization API.
>
> Very good point. I guess we overlooked it in a number of patches
> with fix RTE flow API items to start from corresponding network
> headers. We used unions there to avoid ABI breakage, but it looks
> like we have broken initialization API anyway.
>
Hi Andrew,
What is broken with the flow API item updates, can you please give a sample?
> We should decide if initialization ABI breakage is a show-stopper
> for RTE flow API items switching to use network protocol headers.
>
>> The DPDK ABI/API policy is described here:
>> http://doc.dpdk.org/guides/contributing/abi_policy.html#the-dpdk-abi-policy
>>
>>> From this document:
>>
>> The API should only be changed for significant reasons, such as
>> performance enhancements. API breakages due to changes such as
>> reorganizing public structure fields for aesthetic or readability
>> purposes should be avoided.
>>
>> So to follow the project policy, I think we should reject this path.
>>
>> Regards,
>> Olivier
>>
>
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH] parray: introduce internal API for dynamic arrays
2021-06-17 15:17 0% ` Morten Brørup
@ 2021-06-17 16:12 0% ` Ferruh Yigit
2021-06-17 16:55 0% ` Morten Brørup
2021-06-17 17:05 0% ` Ananyev, Konstantin
0 siblings, 2 replies; 200+ results
From: Ferruh Yigit @ 2021-06-17 16:12 UTC (permalink / raw)
To: Morten Brørup, Ananyev, Konstantin, Thomas Monjalon,
Richardson, Bruce
Cc: dev, olivier.matz, andrew.rybchenko, honnappa.nagarahalli,
jerinj, gakhil
On 6/17/2021 4:17 PM, Morten Brørup wrote:
>> From: Ananyev, Konstantin [mailto:konstantin.ananyev@intel.com]
>> Sent: Thursday, 17 June 2021 16.59
>>
>>>>>>
>>>>>> 14/06/2021 15:15, Bruce Richardson:
>>>>>>> On Mon, Jun 14, 2021 at 02:22:42PM +0200, Morten Brørup wrote:
>>>>>>>>> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Thomas
>> Monjalon
>>>>>>>>> Sent: Monday, 14 June 2021 12.59
>>>>>>>>>
>>>>>>>>> Performance of access in a fixed-size array is very good
>>>>>>>>> because of cache locality
>>>>>>>>> and because there is a single pointer to dereference.
>>>>>>>>> The only drawback is the lack of flexibility:
>>>>>>>>> the size of such an array cannot be increase at runtime.
>>>>>>>>>
>>>>>>>>> An approach to this problem is to allocate the array at
>> runtime,
>>>>>>>>> being as efficient as static arrays, but still limited to a
>> maximum.
>>>>>>>>>
>>>>>>>>> That's why the API rte_parray is introduced,
>>>>>>>>> allowing to declare an array of pointer which can be resized
>>>>>>>>> dynamically
>>>>>>>>> and automatically at runtime while keeping a good read
>> performance.
>>>>>>>>>
>>>>>>>>> After resize, the previous array is kept until the next resize
>>>>>>>>> to avoid crashs during a read without any lock.
>>>>>>>>>
>>>>>>>>> Each element is a pointer to a memory chunk dynamically
>> allocated.
>>>>>>>>> This is not good for cache locality but it allows to keep the
>> same
>>>>>>>>> memory per element, no matter how the array is resized.
>>>>>>>>> Cache locality could be improved with mempools.
>>>>>>>>> The other drawback is having to dereference one more pointer
>>>>>>>>> to read an element.
>>>>>>>>>
>>>>>>>>> There is not much locks, so the API is for internal use only.
>>>>>>>>> This API may be used to completely remove some compilation-
>> time
>>>>>>>>> maximums.
>>>>>>>>
>>>>>>>> I get the purpose and overall intention of this library.
>>>>>>>>
>>>>>>>> I probably already mentioned that I prefer "embedded style
>> programming" with fixed size arrays, rather than runtime
>> configurability.
>>>>> It's
>>>>>> my personal opinion, and the DPDK Tech Board clearly prefers
>> reducing the amount of compile time configurability, so there is no way
>>> for
>>>>>> me to stop this progress, and I do not intend to oppose to this
>> library. :-)
>>>>>>>>
>>>>>>>> This library is likely to become a core library of DPDK, so I
>> think it is important getting it right. Could you please mention a few
>>>>> examples
>>>>>> where you think this internal library should be used, and where
>> it should not be used. Then it is easier to discuss if the border line
>>> between
>>>>>> control path and data plane is correct. E.g. this library is not
>> intended to be used for dynamically sized packet queues that grow and
>>> shrink
>>>>> in
>>>>>> the fast path.
>>>>>>>>
>>>>>>>> If the library becomes a core DPDK library, it should probably
>> be public instead of internal. E.g. if the library is used to make
>>>>>> RTE_MAX_ETHPORTS dynamic instead of compile time fixed, then some
>> applications might also need dynamically sized arrays for their
>>>>>> application specific per-port runtime data, and this library
>> could serve that purpose too.
>>>>>>>>
>>>>>>>
>>>>>>> Thanks Thomas for starting this discussion and Morten for
>> follow-up.
>>>>>>>
>>>>>>> My thinking is as follows, and I'm particularly keeping in mind
>> the cases
>>>>>>> of e.g. RTE_MAX_ETHPORTS, as a leading candidate here.
>>>>>>>
>>>>>>> While I dislike the hard-coded limits in DPDK, I'm also not
>> convinced that
>>>>>>> we should switch away from the flat arrays or that we need fully
>> dynamic
>>>>>>> arrays that grow/shrink at runtime for ethdevs. I would suggest
>> a half-way
>>>>>>> house here, where we keep the ethdevs as an array, but one
>> allocated/sized
>>>>>>> at runtime rather than statically. This would allow us to have a
>>>>>>> compile-time default value, but, for use cases that need it,
>> allow use of a
>>>>>>> flag e.g. "max-ethdevs" to change the size of the parameter
>> given to the
>>>>>>> malloc call for the array. This max limit could then be
>> provided to apps
>>>>>>> too if they want to match any array sizes. [Alternatively those
>> apps could
>>>>>>> check the provided size and error out if the size has been
>> increased beyond
>>>>>>> what the app is designed to use?]. There would be no extra
>> dereferences per
>>>>>>> rx/tx burst call in this scenario so performance should be the
>> same as
>>>>>>> before (potentially better if array is in hugepage memory, I
>> suppose).
>>>>>>
>>>>>> I think we need some benchmarks to decide what is the best
>> tradeoff.
>>>>>> I spent time on this implementation, but sorry I won't have time
>> for benchmarks.
>>>>>> Volunteers?
>>>>>
>>>>> I had only a quick look at your approach so far.
>>>>> But from what I can read, in MT environment your suggestion will
>> require
>>>>> extra synchronization for each read-write access to such parray
>> element (lock, rcu, ...).
>>>>> I think what Bruce suggests will be much ligther, easier to
>> implement and less error prone.
>>>>> At least for rte_ethdevs[] and friends.
>>>>> Konstantin
>>>>
>>>> One more thought here - if we are talking about rte_ethdev[] in
>> particular, I think we can:
>>>> 1. move public function pointers (rx_pkt_burst(), etc.) from
>> rte_ethdev into a separate flat array.
>>>> We can keep it public to still use inline functions for 'fast'
>> calls rte_eth_rx_burst(), etc. to avoid
>>>> any regressions.
>>>> That could still be flat array with max_size specified at
>> application startup.
>>>> 2. Hide rest of rte_ethdev struct in .c.
>>>> That will allow us to change the struct itself and the whole
>> rte_ethdev[] table in a way we like
>>>> (flat array, vector, hash, linked list) without ABI/API breakages.
>>>>
>>>> Yes, it would require all PMDs to change prototype for
>> pkt_rx_burst() function
>>>> (to accept port_id, queue_id instead of queue pointer), but the
>> change is mechanical one.
>>>> Probably some macro can be provided to simplify it.
>>>>
>>>
>>> We are already planning some tasks for ABI stability for v21.11, I
>> think
>>> splitting 'struct rte_eth_dev' can be part of that task, it enables
>> hiding more
>>> internal data.
>>
>> Ok, sounds good.
>>
>>>
>>>> The only significant complication I can foresee with implementing
>> that approach -
>>>> we'll need a an array of 'fast' function pointers per queue, not
>> per device as we have now
>>>> (to avoid extra indirection for callback implementation).
>>>> Though as a bonus we'll have ability to use different RX/TX
>> funcions per queue.
>>>>
>>>
>>> What do you think split Rx/Tx callback into its own struct too?
>>>
>>> Overall 'rte_eth_dev' can be split into three as:
>>> 1. rte_eth_dev
>>> 2. rte_eth_dev_burst
>>> 3. rte_eth_dev_cb
>>>
>>> And we can hide 1 from applications even with the inline functions.
>>
>> As discussed off-line, I think:
>> it is possible.
>> My absolute preference would be to have just 1/2 (with CB hidden).
>> But even with 1/2/3 in place I think it would be a good step forward.
>> Probably worth to start with 1/2/3 first and then see how difficult it
>> would be to switch to 1/2.
>> Do you plan to start working on it?
>>
>> Konstantin
>
> If you do proceed with this, be very careful. E.g. the inlined rx/tx burst functions should not touch more cache lines than they do today - especially if there are many active ports. The inlined rx/tx burst functions are very simple, so thorough code review (and possibly also of the resulting assembly) is appropriate. Simple performance testing might not detect if more cache lines are accessed than before the modifications.
>
> Don't get me wrong... I do consider this an improvement of the ethdev library; I'm only asking you to take extra care!
>
ack
If we split as above, I think device specific data 'struct rte_eth_dev_data'
should be part of 1 (rte_eth_dev). Which means Rx/Tx inline functions access
additional cache line.
To prevent this, what about duplicating 'data' in 2 (rte_eth_dev_burst)? We have
enough space for it to fit into single cache line, currently it is:
struct rte_eth_dev {
eth_rx_burst_t rx_pkt_burst; /* 0 8 */
eth_tx_burst_t tx_pkt_burst; /* 8 8 */
eth_tx_prep_t tx_pkt_prepare; /* 16 8 */
eth_rx_queue_count_t rx_queue_count; /* 24 8 */
eth_rx_descriptor_done_t rx_descriptor_done; /* 32 8 */
eth_rx_descriptor_status_t rx_descriptor_status; /* 40 8 */
eth_tx_descriptor_status_t tx_descriptor_status; /* 48 8 */
struct rte_eth_dev_data * data; /* 56 8 */
/* --- cacheline 1 boundary (64 bytes) --- */
'rx_descriptor_done' is deprecated and will be removed;
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH] parray: introduce internal API for dynamic arrays
2021-06-17 14:58 0% ` Ananyev, Konstantin
2021-06-17 15:17 0% ` Morten Brørup
@ 2021-06-17 15:44 3% ` Ferruh Yigit
2021-06-18 10:41 0% ` Ananyev, Konstantin
1 sibling, 1 reply; 200+ results
From: Ferruh Yigit @ 2021-06-17 15:44 UTC (permalink / raw)
To: Ananyev, Konstantin, Thomas Monjalon, Richardson, Bruce
Cc: Morten Brørup, dev, olivier.matz, andrew.rybchenko,
honnappa.nagarahalli, jerinj, gakhil
On 6/17/2021 3:58 PM, Ananyev, Konstantin wrote:
>
>
>>>>>
>>>>> 14/06/2021 15:15, Bruce Richardson:
>>>>>> On Mon, Jun 14, 2021 at 02:22:42PM +0200, Morten Brørup wrote:
>>>>>>>> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Thomas Monjalon
>>>>>>>> Sent: Monday, 14 June 2021 12.59
>>>>>>>>
>>>>>>>> Performance of access in a fixed-size array is very good
>>>>>>>> because of cache locality
>>>>>>>> and because there is a single pointer to dereference.
>>>>>>>> The only drawback is the lack of flexibility:
>>>>>>>> the size of such an array cannot be increase at runtime.
>>>>>>>>
>>>>>>>> An approach to this problem is to allocate the array at runtime,
>>>>>>>> being as efficient as static arrays, but still limited to a maximum.
>>>>>>>>
>>>>>>>> That's why the API rte_parray is introduced,
>>>>>>>> allowing to declare an array of pointer which can be resized
>>>>>>>> dynamically
>>>>>>>> and automatically at runtime while keeping a good read performance.
>>>>>>>>
>>>>>>>> After resize, the previous array is kept until the next resize
>>>>>>>> to avoid crashs during a read without any lock.
>>>>>>>>
>>>>>>>> Each element is a pointer to a memory chunk dynamically allocated.
>>>>>>>> This is not good for cache locality but it allows to keep the same
>>>>>>>> memory per element, no matter how the array is resized.
>>>>>>>> Cache locality could be improved with mempools.
>>>>>>>> The other drawback is having to dereference one more pointer
>>>>>>>> to read an element.
>>>>>>>>
>>>>>>>> There is not much locks, so the API is for internal use only.
>>>>>>>> This API may be used to completely remove some compilation-time
>>>>>>>> maximums.
>>>>>>>
>>>>>>> I get the purpose and overall intention of this library.
>>>>>>>
>>>>>>> I probably already mentioned that I prefer "embedded style programming" with fixed size arrays, rather than runtime configurability.
>>>> It's
>>>>> my personal opinion, and the DPDK Tech Board clearly prefers reducing the amount of compile time configurability, so there is no way
>> for
>>>>> me to stop this progress, and I do not intend to oppose to this library. :-)
>>>>>>>
>>>>>>> This library is likely to become a core library of DPDK, so I think it is important getting it right. Could you please mention a few
>>>> examples
>>>>> where you think this internal library should be used, and where it should not be used. Then it is easier to discuss if the border line
>> between
>>>>> control path and data plane is correct. E.g. this library is not intended to be used for dynamically sized packet queues that grow and
>> shrink
>>>> in
>>>>> the fast path.
>>>>>>>
>>>>>>> If the library becomes a core DPDK library, it should probably be public instead of internal. E.g. if the library is used to make
>>>>> RTE_MAX_ETHPORTS dynamic instead of compile time fixed, then some applications might also need dynamically sized arrays for their
>>>>> application specific per-port runtime data, and this library could serve that purpose too.
>>>>>>>
>>>>>>
>>>>>> Thanks Thomas for starting this discussion and Morten for follow-up.
>>>>>>
>>>>>> My thinking is as follows, and I'm particularly keeping in mind the cases
>>>>>> of e.g. RTE_MAX_ETHPORTS, as a leading candidate here.
>>>>>>
>>>>>> While I dislike the hard-coded limits in DPDK, I'm also not convinced that
>>>>>> we should switch away from the flat arrays or that we need fully dynamic
>>>>>> arrays that grow/shrink at runtime for ethdevs. I would suggest a half-way
>>>>>> house here, where we keep the ethdevs as an array, but one allocated/sized
>>>>>> at runtime rather than statically. This would allow us to have a
>>>>>> compile-time default value, but, for use cases that need it, allow use of a
>>>>>> flag e.g. "max-ethdevs" to change the size of the parameter given to the
>>>>>> malloc call for the array. This max limit could then be provided to apps
>>>>>> too if they want to match any array sizes. [Alternatively those apps could
>>>>>> check the provided size and error out if the size has been increased beyond
>>>>>> what the app is designed to use?]. There would be no extra dereferences per
>>>>>> rx/tx burst call in this scenario so performance should be the same as
>>>>>> before (potentially better if array is in hugepage memory, I suppose).
>>>>>
>>>>> I think we need some benchmarks to decide what is the best tradeoff.
>>>>> I spent time on this implementation, but sorry I won't have time for benchmarks.
>>>>> Volunteers?
>>>>
>>>> I had only a quick look at your approach so far.
>>>> But from what I can read, in MT environment your suggestion will require
>>>> extra synchronization for each read-write access to such parray element (lock, rcu, ...).
>>>> I think what Bruce suggests will be much ligther, easier to implement and less error prone.
>>>> At least for rte_ethdevs[] and friends.
>>>> Konstantin
>>>
>>> One more thought here - if we are talking about rte_ethdev[] in particular, I think we can:
>>> 1. move public function pointers (rx_pkt_burst(), etc.) from rte_ethdev into a separate flat array.
>>> We can keep it public to still use inline functions for 'fast' calls rte_eth_rx_burst(), etc. to avoid
>>> any regressions.
>>> That could still be flat array with max_size specified at application startup.
>>> 2. Hide rest of rte_ethdev struct in .c.
>>> That will allow us to change the struct itself and the whole rte_ethdev[] table in a way we like
>>> (flat array, vector, hash, linked list) without ABI/API breakages.
>>>
>>> Yes, it would require all PMDs to change prototype for pkt_rx_burst() function
>>> (to accept port_id, queue_id instead of queue pointer), but the change is mechanical one.
>>> Probably some macro can be provided to simplify it.
>>>
>>
>> We are already planning some tasks for ABI stability for v21.11, I think
>> splitting 'struct rte_eth_dev' can be part of that task, it enables hiding more
>> internal data.
>
> Ok, sounds good.
>
>>
>>> The only significant complication I can foresee with implementing that approach -
>>> we'll need a an array of 'fast' function pointers per queue, not per device as we have now
>>> (to avoid extra indirection for callback implementation).
>>> Though as a bonus we'll have ability to use different RX/TX funcions per queue.
>>>
>>
>> What do you think split Rx/Tx callback into its own struct too?
>>
>> Overall 'rte_eth_dev' can be split into three as:
>> 1. rte_eth_dev
>> 2. rte_eth_dev_burst
>> 3. rte_eth_dev_cb
>>
>> And we can hide 1 from applications even with the inline functions.
>
> As discussed off-line, I think:
> it is possible.
> My absolute preference would be to have just 1/2 (with CB hidden).
How can we hide the callbacks since they are used by inline burst functions.
> But even with 1/2/3 in place I think it would be a good step forward.
> Probably worth to start with 1/2/3 first and then see how difficult it
> would be to switch to 1/2.
What do you mean by switch to 1/2?
If we keep having inline functions, and split struct as above three structs, we
can only hide 1, and 2/3 will be still visible to apps because of inline
functions. This way we will be able to hide more still having same performance.
> Do you plan to start working on it?
>
We are gathering the list of the tasks for the ABI stability, most probably they
will be worked on during v21.11. I can take this one.
> Konstantin
>
>
>
>
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [PATCH] parray: introduce internal API for dynamic arrays
2021-06-17 14:58 0% ` Ananyev, Konstantin
@ 2021-06-17 15:17 0% ` Morten Brørup
2021-06-17 16:12 0% ` Ferruh Yigit
2021-06-17 15:44 3% ` Ferruh Yigit
1 sibling, 1 reply; 200+ results
From: Morten Brørup @ 2021-06-17 15:17 UTC (permalink / raw)
To: Ananyev, Konstantin, Yigit, Ferruh, Thomas Monjalon, Richardson, Bruce
Cc: dev, olivier.matz, andrew.rybchenko, honnappa.nagarahalli,
jerinj, gakhil
> From: Ananyev, Konstantin [mailto:konstantin.ananyev@intel.com]
> Sent: Thursday, 17 June 2021 16.59
>
> > >>>
> > >>> 14/06/2021 15:15, Bruce Richardson:
> > >>>> On Mon, Jun 14, 2021 at 02:22:42PM +0200, Morten Brørup wrote:
> > >>>>>> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Thomas
> Monjalon
> > >>>>>> Sent: Monday, 14 June 2021 12.59
> > >>>>>>
> > >>>>>> Performance of access in a fixed-size array is very good
> > >>>>>> because of cache locality
> > >>>>>> and because there is a single pointer to dereference.
> > >>>>>> The only drawback is the lack of flexibility:
> > >>>>>> the size of such an array cannot be increase at runtime.
> > >>>>>>
> > >>>>>> An approach to this problem is to allocate the array at
> runtime,
> > >>>>>> being as efficient as static arrays, but still limited to a
> maximum.
> > >>>>>>
> > >>>>>> That's why the API rte_parray is introduced,
> > >>>>>> allowing to declare an array of pointer which can be resized
> > >>>>>> dynamically
> > >>>>>> and automatically at runtime while keeping a good read
> performance.
> > >>>>>>
> > >>>>>> After resize, the previous array is kept until the next resize
> > >>>>>> to avoid crashs during a read without any lock.
> > >>>>>>
> > >>>>>> Each element is a pointer to a memory chunk dynamically
> allocated.
> > >>>>>> This is not good for cache locality but it allows to keep the
> same
> > >>>>>> memory per element, no matter how the array is resized.
> > >>>>>> Cache locality could be improved with mempools.
> > >>>>>> The other drawback is having to dereference one more pointer
> > >>>>>> to read an element.
> > >>>>>>
> > >>>>>> There is not much locks, so the API is for internal use only.
> > >>>>>> This API may be used to completely remove some compilation-
> time
> > >>>>>> maximums.
> > >>>>>
> > >>>>> I get the purpose and overall intention of this library.
> > >>>>>
> > >>>>> I probably already mentioned that I prefer "embedded style
> programming" with fixed size arrays, rather than runtime
> configurability.
> > >> It's
> > >>> my personal opinion, and the DPDK Tech Board clearly prefers
> reducing the amount of compile time configurability, so there is no way
> > for
> > >>> me to stop this progress, and I do not intend to oppose to this
> library. :-)
> > >>>>>
> > >>>>> This library is likely to become a core library of DPDK, so I
> think it is important getting it right. Could you please mention a few
> > >> examples
> > >>> where you think this internal library should be used, and where
> it should not be used. Then it is easier to discuss if the border line
> > between
> > >>> control path and data plane is correct. E.g. this library is not
> intended to be used for dynamically sized packet queues that grow and
> > shrink
> > >> in
> > >>> the fast path.
> > >>>>>
> > >>>>> If the library becomes a core DPDK library, it should probably
> be public instead of internal. E.g. if the library is used to make
> > >>> RTE_MAX_ETHPORTS dynamic instead of compile time fixed, then some
> applications might also need dynamically sized arrays for their
> > >>> application specific per-port runtime data, and this library
> could serve that purpose too.
> > >>>>>
> > >>>>
> > >>>> Thanks Thomas for starting this discussion and Morten for
> follow-up.
> > >>>>
> > >>>> My thinking is as follows, and I'm particularly keeping in mind
> the cases
> > >>>> of e.g. RTE_MAX_ETHPORTS, as a leading candidate here.
> > >>>>
> > >>>> While I dislike the hard-coded limits in DPDK, I'm also not
> convinced that
> > >>>> we should switch away from the flat arrays or that we need fully
> dynamic
> > >>>> arrays that grow/shrink at runtime for ethdevs. I would suggest
> a half-way
> > >>>> house here, where we keep the ethdevs as an array, but one
> allocated/sized
> > >>>> at runtime rather than statically. This would allow us to have a
> > >>>> compile-time default value, but, for use cases that need it,
> allow use of a
> > >>>> flag e.g. "max-ethdevs" to change the size of the parameter
> given to the
> > >>>> malloc call for the array. This max limit could then be
> provided to apps
> > >>>> too if they want to match any array sizes. [Alternatively those
> apps could
> > >>>> check the provided size and error out if the size has been
> increased beyond
> > >>>> what the app is designed to use?]. There would be no extra
> dereferences per
> > >>>> rx/tx burst call in this scenario so performance should be the
> same as
> > >>>> before (potentially better if array is in hugepage memory, I
> suppose).
> > >>>
> > >>> I think we need some benchmarks to decide what is the best
> tradeoff.
> > >>> I spent time on this implementation, but sorry I won't have time
> for benchmarks.
> > >>> Volunteers?
> > >>
> > >> I had only a quick look at your approach so far.
> > >> But from what I can read, in MT environment your suggestion will
> require
> > >> extra synchronization for each read-write access to such parray
> element (lock, rcu, ...).
> > >> I think what Bruce suggests will be much ligther, easier to
> implement and less error prone.
> > >> At least for rte_ethdevs[] and friends.
> > >> Konstantin
> > >
> > > One more thought here - if we are talking about rte_ethdev[] in
> particular, I think we can:
> > > 1. move public function pointers (rx_pkt_burst(), etc.) from
> rte_ethdev into a separate flat array.
> > > We can keep it public to still use inline functions for 'fast'
> calls rte_eth_rx_burst(), etc. to avoid
> > > any regressions.
> > > That could still be flat array with max_size specified at
> application startup.
> > > 2. Hide rest of rte_ethdev struct in .c.
> > > That will allow us to change the struct itself and the whole
> rte_ethdev[] table in a way we like
> > > (flat array, vector, hash, linked list) without ABI/API breakages.
> > >
> > > Yes, it would require all PMDs to change prototype for
> pkt_rx_burst() function
> > > (to accept port_id, queue_id instead of queue pointer), but the
> change is mechanical one.
> > > Probably some macro can be provided to simplify it.
> > >
> >
> > We are already planning some tasks for ABI stability for v21.11, I
> think
> > splitting 'struct rte_eth_dev' can be part of that task, it enables
> hiding more
> > internal data.
>
> Ok, sounds good.
>
> >
> > > The only significant complication I can foresee with implementing
> that approach -
> > > we'll need a an array of 'fast' function pointers per queue, not
> per device as we have now
> > > (to avoid extra indirection for callback implementation).
> > > Though as a bonus we'll have ability to use different RX/TX
> funcions per queue.
> > >
> >
> > What do you think split Rx/Tx callback into its own struct too?
> >
> > Overall 'rte_eth_dev' can be split into three as:
> > 1. rte_eth_dev
> > 2. rte_eth_dev_burst
> > 3. rte_eth_dev_cb
> >
> > And we can hide 1 from applications even with the inline functions.
>
> As discussed off-line, I think:
> it is possible.
> My absolute preference would be to have just 1/2 (with CB hidden).
> But even with 1/2/3 in place I think it would be a good step forward.
> Probably worth to start with 1/2/3 first and then see how difficult it
> would be to switch to 1/2.
> Do you plan to start working on it?
>
> Konstantin
If you do proceed with this, be very careful. E.g. the inlined rx/tx burst functions should not touch more cache lines than they do today - especially if there are many active ports. The inlined rx/tx burst functions are very simple, so thorough code review (and possibly also of the resulting assembly) is appropriate. Simple performance testing might not detect if more cache lines are accessed than before the modifications.
Don't get me wrong... I do consider this an improvement of the ethdev library; I'm only asking you to take extra care!
-Morten
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH] net: introduce IPv4 ihl and version fields
2021-05-27 15:56 3% ` Morten Brørup
@ 2021-06-17 15:02 3% ` Tyler Retzlaff
1 sibling, 0 replies; 200+ results
From: Tyler Retzlaff @ 2021-06-17 15:02 UTC (permalink / raw)
To: Gregory Etelson
Cc: dev, matan, orika, rasland, Bernard Iremonger, Olivier Matz
On Thu, May 27, 2021 at 06:28:58PM +0300, Gregory Etelson wrote:
> diff --git a/lib/net/rte_ip.h b/lib/net/rte_ip.h
> index 4b728969c1..684bb028b2 100644
> --- a/lib/net/rte_ip.h
> +++ b/lib/net/rte_ip.h
> @@ -38,7 +38,21 @@ extern "C" {
> * IPv4 Header
> */
> struct rte_ipv4_hdr {
> - uint8_t version_ihl; /**< version and header length */
> + __extension__
this patch reduces compiler portability, though not strictly objecting
so long as the community accepts that it may lead to conditional
compilation having to be introduced in a future change.
please also be mindful of the impact of __attribute__ ((__packed__)) in
the presence of bitfields on gcc when evaluating abi compatibility.
> + union {
> + uint8_t version_ihl; /**< version and header length */
> + struct {
> +#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
> + uint8_t ihl:4;
> + uint8_t version:4;
> +#elif RTE_BYTE_ORDER == RTE_BIG_ENDIAN
> + uint8_t version:4;
> + uint8_t ihl:4;
> +#else
> +#error "setup endian definition"
> +#endif
> + };
> + };
> uint8_t type_of_service; /**< type of service */
> rte_be16_t total_length; /**< length of packet */
> rte_be16_t packet_id; /**< packet ID */
> --
> 2.31.1
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [PATCH] parray: introduce internal API for dynamic arrays
2021-06-17 13:08 3% ` Ferruh Yigit
@ 2021-06-17 14:58 0% ` Ananyev, Konstantin
2021-06-17 15:17 0% ` Morten Brørup
2021-06-17 15:44 3% ` Ferruh Yigit
0 siblings, 2 replies; 200+ results
From: Ananyev, Konstantin @ 2021-06-17 14:58 UTC (permalink / raw)
To: Yigit, Ferruh, Thomas Monjalon, Richardson, Bruce
Cc: Morten Brørup, dev, olivier.matz, andrew.rybchenko,
honnappa.nagarahalli, jerinj, gakhil
> >>>
> >>> 14/06/2021 15:15, Bruce Richardson:
> >>>> On Mon, Jun 14, 2021 at 02:22:42PM +0200, Morten Brørup wrote:
> >>>>>> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Thomas Monjalon
> >>>>>> Sent: Monday, 14 June 2021 12.59
> >>>>>>
> >>>>>> Performance of access in a fixed-size array is very good
> >>>>>> because of cache locality
> >>>>>> and because there is a single pointer to dereference.
> >>>>>> The only drawback is the lack of flexibility:
> >>>>>> the size of such an array cannot be increase at runtime.
> >>>>>>
> >>>>>> An approach to this problem is to allocate the array at runtime,
> >>>>>> being as efficient as static arrays, but still limited to a maximum.
> >>>>>>
> >>>>>> That's why the API rte_parray is introduced,
> >>>>>> allowing to declare an array of pointer which can be resized
> >>>>>> dynamically
> >>>>>> and automatically at runtime while keeping a good read performance.
> >>>>>>
> >>>>>> After resize, the previous array is kept until the next resize
> >>>>>> to avoid crashs during a read without any lock.
> >>>>>>
> >>>>>> Each element is a pointer to a memory chunk dynamically allocated.
> >>>>>> This is not good for cache locality but it allows to keep the same
> >>>>>> memory per element, no matter how the array is resized.
> >>>>>> Cache locality could be improved with mempools.
> >>>>>> The other drawback is having to dereference one more pointer
> >>>>>> to read an element.
> >>>>>>
> >>>>>> There is not much locks, so the API is for internal use only.
> >>>>>> This API may be used to completely remove some compilation-time
> >>>>>> maximums.
> >>>>>
> >>>>> I get the purpose and overall intention of this library.
> >>>>>
> >>>>> I probably already mentioned that I prefer "embedded style programming" with fixed size arrays, rather than runtime configurability.
> >> It's
> >>> my personal opinion, and the DPDK Tech Board clearly prefers reducing the amount of compile time configurability, so there is no way
> for
> >>> me to stop this progress, and I do not intend to oppose to this library. :-)
> >>>>>
> >>>>> This library is likely to become a core library of DPDK, so I think it is important getting it right. Could you please mention a few
> >> examples
> >>> where you think this internal library should be used, and where it should not be used. Then it is easier to discuss if the border line
> between
> >>> control path and data plane is correct. E.g. this library is not intended to be used for dynamically sized packet queues that grow and
> shrink
> >> in
> >>> the fast path.
> >>>>>
> >>>>> If the library becomes a core DPDK library, it should probably be public instead of internal. E.g. if the library is used to make
> >>> RTE_MAX_ETHPORTS dynamic instead of compile time fixed, then some applications might also need dynamically sized arrays for their
> >>> application specific per-port runtime data, and this library could serve that purpose too.
> >>>>>
> >>>>
> >>>> Thanks Thomas for starting this discussion and Morten for follow-up.
> >>>>
> >>>> My thinking is as follows, and I'm particularly keeping in mind the cases
> >>>> of e.g. RTE_MAX_ETHPORTS, as a leading candidate here.
> >>>>
> >>>> While I dislike the hard-coded limits in DPDK, I'm also not convinced that
> >>>> we should switch away from the flat arrays or that we need fully dynamic
> >>>> arrays that grow/shrink at runtime for ethdevs. I would suggest a half-way
> >>>> house here, where we keep the ethdevs as an array, but one allocated/sized
> >>>> at runtime rather than statically. This would allow us to have a
> >>>> compile-time default value, but, for use cases that need it, allow use of a
> >>>> flag e.g. "max-ethdevs" to change the size of the parameter given to the
> >>>> malloc call for the array. This max limit could then be provided to apps
> >>>> too if they want to match any array sizes. [Alternatively those apps could
> >>>> check the provided size and error out if the size has been increased beyond
> >>>> what the app is designed to use?]. There would be no extra dereferences per
> >>>> rx/tx burst call in this scenario so performance should be the same as
> >>>> before (potentially better if array is in hugepage memory, I suppose).
> >>>
> >>> I think we need some benchmarks to decide what is the best tradeoff.
> >>> I spent time on this implementation, but sorry I won't have time for benchmarks.
> >>> Volunteers?
> >>
> >> I had only a quick look at your approach so far.
> >> But from what I can read, in MT environment your suggestion will require
> >> extra synchronization for each read-write access to such parray element (lock, rcu, ...).
> >> I think what Bruce suggests will be much ligther, easier to implement and less error prone.
> >> At least for rte_ethdevs[] and friends.
> >> Konstantin
> >
> > One more thought here - if we are talking about rte_ethdev[] in particular, I think we can:
> > 1. move public function pointers (rx_pkt_burst(), etc.) from rte_ethdev into a separate flat array.
> > We can keep it public to still use inline functions for 'fast' calls rte_eth_rx_burst(), etc. to avoid
> > any regressions.
> > That could still be flat array with max_size specified at application startup.
> > 2. Hide rest of rte_ethdev struct in .c.
> > That will allow us to change the struct itself and the whole rte_ethdev[] table in a way we like
> > (flat array, vector, hash, linked list) without ABI/API breakages.
> >
> > Yes, it would require all PMDs to change prototype for pkt_rx_burst() function
> > (to accept port_id, queue_id instead of queue pointer), but the change is mechanical one.
> > Probably some macro can be provided to simplify it.
> >
>
> We are already planning some tasks for ABI stability for v21.11, I think
> splitting 'struct rte_eth_dev' can be part of that task, it enables hiding more
> internal data.
Ok, sounds good.
>
> > The only significant complication I can foresee with implementing that approach -
> > we'll need a an array of 'fast' function pointers per queue, not per device as we have now
> > (to avoid extra indirection for callback implementation).
> > Though as a bonus we'll have ability to use different RX/TX funcions per queue.
> >
>
> What do you think split Rx/Tx callback into its own struct too?
>
> Overall 'rte_eth_dev' can be split into three as:
> 1. rte_eth_dev
> 2. rte_eth_dev_burst
> 3. rte_eth_dev_cb
>
> And we can hide 1 from applications even with the inline functions.
As discussed off-line, I think:
it is possible.
My absolute preference would be to have just 1/2 (with CB hidden).
But even with 1/2/3 in place I think it would be a good step forward.
Probably worth to start with 1/2/3 first and then see how difficult it
would be to switch to 1/2.
Do you plan to start working on it?
Konstantin
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH] parray: introduce internal API for dynamic arrays
2021-06-14 15:54 3% ` Ananyev, Konstantin
@ 2021-06-17 13:08 3% ` Ferruh Yigit
2021-06-17 14:58 0% ` Ananyev, Konstantin
0 siblings, 1 reply; 200+ results
From: Ferruh Yigit @ 2021-06-17 13:08 UTC (permalink / raw)
To: Ananyev, Konstantin, Thomas Monjalon, Richardson, Bruce
Cc: Morten Brørup, dev, olivier.matz, andrew.rybchenko,
honnappa.nagarahalli, jerinj, gakhil
On 6/14/2021 4:54 PM, Ananyev, Konstantin wrote:
>
>
>>>
>>> 14/06/2021 15:15, Bruce Richardson:
>>>> On Mon, Jun 14, 2021 at 02:22:42PM +0200, Morten Brørup wrote:
>>>>>> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Thomas Monjalon
>>>>>> Sent: Monday, 14 June 2021 12.59
>>>>>>
>>>>>> Performance of access in a fixed-size array is very good
>>>>>> because of cache locality
>>>>>> and because there is a single pointer to dereference.
>>>>>> The only drawback is the lack of flexibility:
>>>>>> the size of such an array cannot be increase at runtime.
>>>>>>
>>>>>> An approach to this problem is to allocate the array at runtime,
>>>>>> being as efficient as static arrays, but still limited to a maximum.
>>>>>>
>>>>>> That's why the API rte_parray is introduced,
>>>>>> allowing to declare an array of pointer which can be resized
>>>>>> dynamically
>>>>>> and automatically at runtime while keeping a good read performance.
>>>>>>
>>>>>> After resize, the previous array is kept until the next resize
>>>>>> to avoid crashs during a read without any lock.
>>>>>>
>>>>>> Each element is a pointer to a memory chunk dynamically allocated.
>>>>>> This is not good for cache locality but it allows to keep the same
>>>>>> memory per element, no matter how the array is resized.
>>>>>> Cache locality could be improved with mempools.
>>>>>> The other drawback is having to dereference one more pointer
>>>>>> to read an element.
>>>>>>
>>>>>> There is not much locks, so the API is for internal use only.
>>>>>> This API may be used to completely remove some compilation-time
>>>>>> maximums.
>>>>>
>>>>> I get the purpose and overall intention of this library.
>>>>>
>>>>> I probably already mentioned that I prefer "embedded style programming" with fixed size arrays, rather than runtime configurability.
>> It's
>>> my personal opinion, and the DPDK Tech Board clearly prefers reducing the amount of compile time configurability, so there is no way for
>>> me to stop this progress, and I do not intend to oppose to this library. :-)
>>>>>
>>>>> This library is likely to become a core library of DPDK, so I think it is important getting it right. Could you please mention a few
>> examples
>>> where you think this internal library should be used, and where it should not be used. Then it is easier to discuss if the border line between
>>> control path and data plane is correct. E.g. this library is not intended to be used for dynamically sized packet queues that grow and shrink
>> in
>>> the fast path.
>>>>>
>>>>> If the library becomes a core DPDK library, it should probably be public instead of internal. E.g. if the library is used to make
>>> RTE_MAX_ETHPORTS dynamic instead of compile time fixed, then some applications might also need dynamically sized arrays for their
>>> application specific per-port runtime data, and this library could serve that purpose too.
>>>>>
>>>>
>>>> Thanks Thomas for starting this discussion and Morten for follow-up.
>>>>
>>>> My thinking is as follows, and I'm particularly keeping in mind the cases
>>>> of e.g. RTE_MAX_ETHPORTS, as a leading candidate here.
>>>>
>>>> While I dislike the hard-coded limits in DPDK, I'm also not convinced that
>>>> we should switch away from the flat arrays or that we need fully dynamic
>>>> arrays that grow/shrink at runtime for ethdevs. I would suggest a half-way
>>>> house here, where we keep the ethdevs as an array, but one allocated/sized
>>>> at runtime rather than statically. This would allow us to have a
>>>> compile-time default value, but, for use cases that need it, allow use of a
>>>> flag e.g. "max-ethdevs" to change the size of the parameter given to the
>>>> malloc call for the array. This max limit could then be provided to apps
>>>> too if they want to match any array sizes. [Alternatively those apps could
>>>> check the provided size and error out if the size has been increased beyond
>>>> what the app is designed to use?]. There would be no extra dereferences per
>>>> rx/tx burst call in this scenario so performance should be the same as
>>>> before (potentially better if array is in hugepage memory, I suppose).
>>>
>>> I think we need some benchmarks to decide what is the best tradeoff.
>>> I spent time on this implementation, but sorry I won't have time for benchmarks.
>>> Volunteers?
>>
>> I had only a quick look at your approach so far.
>> But from what I can read, in MT environment your suggestion will require
>> extra synchronization for each read-write access to such parray element (lock, rcu, ...).
>> I think what Bruce suggests will be much ligther, easier to implement and less error prone.
>> At least for rte_ethdevs[] and friends.
>> Konstantin
>
> One more thought here - if we are talking about rte_ethdev[] in particular, I think we can:
> 1. move public function pointers (rx_pkt_burst(), etc.) from rte_ethdev into a separate flat array.
> We can keep it public to still use inline functions for 'fast' calls rte_eth_rx_burst(), etc. to avoid
> any regressions.
> That could still be flat array with max_size specified at application startup.
> 2. Hide rest of rte_ethdev struct in .c.
> That will allow us to change the struct itself and the whole rte_ethdev[] table in a way we like
> (flat array, vector, hash, linked list) without ABI/API breakages.
>
> Yes, it would require all PMDs to change prototype for pkt_rx_burst() function
> (to accept port_id, queue_id instead of queue pointer), but the change is mechanical one.
> Probably some macro can be provided to simplify it.
>
We are already planning some tasks for ABI stability for v21.11, I think
splitting 'struct rte_eth_dev' can be part of that task, it enables hiding more
internal data.
> The only significant complication I can foresee with implementing that approach -
> we'll need a an array of 'fast' function pointers per queue, not per device as we have now
> (to avoid extra indirection for callback implementation).
> Though as a bonus we'll have ability to use different RX/TX funcions per queue.
>
What do you think split Rx/Tx callback into its own struct too?
Overall 'rte_eth_dev' can be split into three as:
1. rte_eth_dev
2. rte_eth_dev_burst
3. rte_eth_dev_cb
And we can hide 1 from applications even with the inline functions.
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [PATCH] parray: introduce internal API for dynamic arrays
2021-06-16 13:02 0% ` Bruce Richardson
@ 2021-06-16 15:01 0% ` Morten Brørup
0 siblings, 0 replies; 200+ results
From: Morten Brørup @ 2021-06-16 15:01 UTC (permalink / raw)
To: Bruce Richardson
Cc: Jerin Jacob, Thomas Monjalon, dpdk-dev, Olivier Matz,
Andrew Rybchenko, Honnappa Nagarahalli, Ananyev, Konstantin,
Ferruh Yigit, Jerin Jacob, Akhil Goyal
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Bruce Richardson
> Sent: Wednesday, 16 June 2021 15.03
>
> On Wed, Jun 16, 2021 at 01:27:17PM +0200, Morten Brørup wrote:
> > > From: Jerin Jacob [mailto:jerinjacobk@gmail.com]
> > > Sent: Wednesday, 16 June 2021 11.42
> > >
> > > On Tue, Jun 15, 2021 at 12:18 PM Thomas Monjalon
> <thomas@monjalon.net>
> > > wrote:
> > > >
> > > > 14/06/2021 17:48, Morten Brørup:
> > > > > > From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Thomas
> > > Monjalon
> > > > > It would be much simpler to just increase RTE_MAX_ETHPORTS to
> > > something big enough to hold a sufficiently large array. And
> possibly
> > > add an rte_max_ethports variable to indicate the number of
> populated
> > > entries in the array, for use when iterating over the array.
> > > > >
> > > > > Can we come up with another example than RTE_MAX_ETHPORTS where
> > > this library provides a better benefit?
> > > >
> > > > What is big enough?
> > > > Is 640KB enough for RAM? ;)
> > >
> > > If I understand it correctly, Linux process allocates 640KB due to
> > > that fact currently
> > > struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS] is global and
> it
> > > is from BSS.
> >
> > Correct.
> >
> > > If we make this from heap i.e use malloc() to allocate this memory
> > > then in my understanding Linux
> > > really won't allocate the real page for backend memory until
> unless,
> > > someone write/read to this memory.
> >
> > If the array is allocated from the heap, its members will be accessed
> though a pointer to the array, e.g. in rte_eth_rx/tx_burst(). This
> might affect performance, which is probably why the array is allocated
> the way it is.
> >
>
> It depends on whether the array contains pointers to malloced elements
> or
> the array itself is just a single malloced array of all the structures.
> While I think the parray proposal referred to the former - which would
> have
> an extra level of indirection - the switch we are discussing here is
> the
> latter which should have no performance difference, since the method of
> accessing the elements will be the same, only with the base address
> pointing to a different area of memory.
I was not talking about an array of pointers. And it is not the same:
int arr[27];
int * parr = arr;
// direct access
int dir(int i) { return arr[i]; }
// indirect access
int indir(int i) { return parr[i]; }
The direct access knows the address of arr, so it will compile to:
movsx rdi, edi
mov eax, DWORD PTR arr[0+rdi*4]
ret
The indirect access needs to first read the memory location holding the pointer to the array, and then it can read the array member, so it will compile to:
mov rax, QWORD PTR parr[rip]
movsx rdi, edi
mov eax, DWORD PTR [rax+rdi*4]
ret
>
> > Although it might be worth investigating how much it actually affects
> the performance.
> >
> > So we need to do something else if we want to conserve memory and
> still allow a large rte_eth_devices[] array.
> >
> > Looking at struct rte_eth_dev, we could reduce its size as follows:
> >
> > 1. Change the two callback arrays
> post_rx/pre_tx_burst_cbs[RTE_MAX_QUEUES_PER_PORT] to pointers to
> callback arrays, which are allocated from the heap.
> > With the default RTE_MAX_QUEUES_PER_PORT of 1024, these two arrays
> are the sinners that make the struct rte_eth_dev use so much memory.
> This modification would save 16 KB (minus 16 bytes for the pointers to
> the two arrays) per port.
> > Furthermore, these callback arrays would only need to be allocated if
> the application is compiled with callbacks enabled (#define
> RTE_ETHDEV_RXTX_CALLBACKS). And they would only need to be sized to the
> actual number of queues for the port.
> >
> > The disadvantage is that this would add another level of indirection,
> although only for applications compiled with callbacks enabled.
> >
> This seems reasonable to at least investigate.
>
> > 2. Remove reserved_64s[4] and reserved_ptrs[4]. This would save 64
> bytes per port. Not much, but worth considering if we are changing the
> API/ABI anyway.
> >
> I strongly dislike reserved fields to I would tend to favour these.
> However, it does possibly reduce future compatibility if we do need to
> add
> something to ethdev.
There should be an official policy about adding reserved fields for future compatibility. I'm against adding them, unless it can be argued that they are likely to match what is needed in the future; in the real world there is no way to know if they match future requirements.
>
> Another option is to split ethdev into fast-path and non-fastpath parts
> -
> similar to Konstantin's suggestion of just having an array of the ops.
> We
> can have an array of minimal structures with fastpath ops and queue
> pointers, for example, with an ethdev-private pointer to the rest of
> the
> struct elsewhere in memory. Since that second struct would be allocated
> on-demand, the size of the ethdev array can be scaled with far smaller
> footprint.
>
> /Bruce
The rte_eth_dev structures are really well organized now. E.g. the rx/tx function pointers and the pointer to the shared memory data of the driver are in the same cache line. We must be very careful if we change them.
Also, rte_ethdev.h and rte_ethdev_core.h are easy to read and understand.
-Morten
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH] parray: introduce internal API for dynamic arrays
2021-06-16 11:27 3% ` Morten Brørup
2021-06-16 12:00 0% ` Jerin Jacob
@ 2021-06-16 13:02 0% ` Bruce Richardson
2021-06-16 15:01 0% ` Morten Brørup
1 sibling, 1 reply; 200+ results
From: Bruce Richardson @ 2021-06-16 13:02 UTC (permalink / raw)
To: Morten Brørup
Cc: Jerin Jacob, Thomas Monjalon, dpdk-dev, Olivier Matz,
Andrew Rybchenko, Honnappa Nagarahalli, Ananyev, Konstantin,
Ferruh Yigit, Jerin Jacob, Akhil Goyal
On Wed, Jun 16, 2021 at 01:27:17PM +0200, Morten Brørup wrote:
> > From: Jerin Jacob [mailto:jerinjacobk@gmail.com]
> > Sent: Wednesday, 16 June 2021 11.42
> >
> > On Tue, Jun 15, 2021 at 12:18 PM Thomas Monjalon <thomas@monjalon.net>
> > wrote:
> > >
> > > 14/06/2021 17:48, Morten Brørup:
> > > > > From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Thomas
> > Monjalon
> > > > It would be much simpler to just increase RTE_MAX_ETHPORTS to
> > something big enough to hold a sufficiently large array. And possibly
> > add an rte_max_ethports variable to indicate the number of populated
> > entries in the array, for use when iterating over the array.
> > > >
> > > > Can we come up with another example than RTE_MAX_ETHPORTS where
> > this library provides a better benefit?
> > >
> > > What is big enough?
> > > Is 640KB enough for RAM? ;)
> >
> > If I understand it correctly, Linux process allocates 640KB due to
> > that fact currently
> > struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS] is global and it
> > is from BSS.
>
> Correct.
>
> > If we make this from heap i.e use malloc() to allocate this memory
> > then in my understanding Linux
> > really won't allocate the real page for backend memory until unless,
> > someone write/read to this memory.
>
> If the array is allocated from the heap, its members will be accessed though a pointer to the array, e.g. in rte_eth_rx/tx_burst(). This might affect performance, which is probably why the array is allocated the way it is.
>
It depends on whether the array contains pointers to malloced elements or
the array itself is just a single malloced array of all the structures.
While I think the parray proposal referred to the former - which would have
an extra level of indirection - the switch we are discussing here is the
latter which should have no performance difference, since the method of
accessing the elements will be the same, only with the base address
pointing to a different area of memory.
> Although it might be worth investigating how much it actually affects the performance.
>
> So we need to do something else if we want to conserve memory and still allow a large rte_eth_devices[] array.
>
> Looking at struct rte_eth_dev, we could reduce its size as follows:
>
> 1. Change the two callback arrays post_rx/pre_tx_burst_cbs[RTE_MAX_QUEUES_PER_PORT] to pointers to callback arrays, which are allocated from the heap.
> With the default RTE_MAX_QUEUES_PER_PORT of 1024, these two arrays are the sinners that make the struct rte_eth_dev use so much memory. This modification would save 16 KB (minus 16 bytes for the pointers to the two arrays) per port.
> Furthermore, these callback arrays would only need to be allocated if the application is compiled with callbacks enabled (#define RTE_ETHDEV_RXTX_CALLBACKS). And they would only need to be sized to the actual number of queues for the port.
>
> The disadvantage is that this would add another level of indirection, although only for applications compiled with callbacks enabled.
>
This seems reasonable to at least investigate.
> 2. Remove reserved_64s[4] and reserved_ptrs[4]. This would save 64 bytes per port. Not much, but worth considering if we are changing the API/ABI anyway.
>
I strongly dislike reserved fields to I would tend to favour these.
However, it does possibly reduce future compatibility if we do need to add
something to ethdev.
Another option is to split ethdev into fast-path and non-fastpath parts -
similar to Konstantin's suggestion of just having an array of the ops. We
can have an array of minimal structures with fastpath ops and queue
pointers, for example, with an ethdev-private pointer to the rest of the
struct elsewhere in memory. Since that second struct would be allocated
on-demand, the size of the ethdev array can be scaled with far smaller
footprint.
/Bruce
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH] parray: introduce internal API for dynamic arrays
2021-06-16 11:27 3% ` Morten Brørup
@ 2021-06-16 12:00 0% ` Jerin Jacob
2021-06-16 13:02 0% ` Bruce Richardson
1 sibling, 0 replies; 200+ results
From: Jerin Jacob @ 2021-06-16 12:00 UTC (permalink / raw)
To: Morten Brørup
Cc: Thomas Monjalon, Bruce Richardson, dpdk-dev, Olivier Matz,
Andrew Rybchenko, Honnappa Nagarahalli, Ananyev, Konstantin,
Ferruh Yigit, Jerin Jacob, Akhil Goyal
On Wed, Jun 16, 2021 at 4:57 PM Morten Brørup <mb@smartsharesystems.com> wrote:
>
> > From: Jerin Jacob [mailto:jerinjacobk@gmail.com]
> > Sent: Wednesday, 16 June 2021 11.42
> >
> > On Tue, Jun 15, 2021 at 12:18 PM Thomas Monjalon <thomas@monjalon.net>
> > wrote:
> > >
> > > 14/06/2021 17:48, Morten Brørup:
> > > > > From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Thomas
> > Monjalon
> > > > It would be much simpler to just increase RTE_MAX_ETHPORTS to
> > something big enough to hold a sufficiently large array. And possibly
> > add an rte_max_ethports variable to indicate the number of populated
> > entries in the array, for use when iterating over the array.
> > > >
> > > > Can we come up with another example than RTE_MAX_ETHPORTS where
> > this library provides a better benefit?
> > >
> > > What is big enough?
> > > Is 640KB enough for RAM? ;)
> >
> > If I understand it correctly, Linux process allocates 640KB due to
> > that fact currently
> > struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS] is global and it
> > is from BSS.
>
> Correct.
>
> > If we make this from heap i.e use malloc() to allocate this memory
> > then in my understanding Linux
> > really won't allocate the real page for backend memory until unless,
> > someone write/read to this memory.
>
> If the array is allocated from the heap, its members will be accessed though a pointer to the array, e.g. in rte_eth_rx/tx_burst(). This might affect performance, which is probably why the array is allocated the way it is.
>
> Although it might be worth investigating how much it actually affects the performance.
it should not. From CPU and compiler PoV it is same.
if see cryptodev, it is using following
static struct rte_cryptodev rte_crypto_devices[RTE_CRYPTO_MAX_DEVS];
struct rte_cryptodev *rte_cryptodevs = rte_crypto_devices;
And accessing rte_cryptodevs[].
Also, this structure is not cache aligned. Probably need to fix it.
> So we need to do something else if we want to conserve memory and still allow a large rte_eth_devices[] array.
>
> Looking at struct rte_eth_dev, we could reduce its size as follows:
>
> 1. Change the two callback arrays post_rx/pre_tx_burst_cbs[RTE_MAX_QUEUES_PER_PORT] to pointers to callback arrays, which are allocated from the heap.
> With the default RTE_MAX_QUEUES_PER_PORT of 1024, these two arrays are the sinners that make the struct rte_eth_dev use so much memory. This modification would save 16 KB (minus 16 bytes for the pointers to the two arrays) per port.
> Furthermore, these callback arrays would only need to be allocated if the application is compiled with callbacks enabled (#define RTE_ETHDEV_RXTX_CALLBACKS). And they would only need to be sized to the actual number of queues for the port.
>
> The disadvantage is that this would add another level of indirection, although only for applications compiled with callbacks enabled.
I think, we don't need one more indirection if all allocated from the
heap. as memory is not wasted if not touched by CPU.
>
> 2. Remove reserved_64s[4] and reserved_ptrs[4]. This would save 64 bytes per port. Not much, but worth considering if we are changing the API/ABI anyway.
>
>
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH] parray: introduce internal API for dynamic arrays
@ 2021-06-16 11:27 3% ` Morten Brørup
2021-06-16 12:00 0% ` Jerin Jacob
2021-06-16 13:02 0% ` Bruce Richardson
0 siblings, 2 replies; 200+ results
From: Morten Brørup @ 2021-06-16 11:27 UTC (permalink / raw)
To: Jerin Jacob, Thomas Monjalon
Cc: Bruce Richardson, dpdk-dev, Olivier Matz, Andrew Rybchenko,
Honnappa Nagarahalli, Ananyev, Konstantin, Ferruh Yigit,
Jerin Jacob, Akhil Goyal
> From: Jerin Jacob [mailto:jerinjacobk@gmail.com]
> Sent: Wednesday, 16 June 2021 11.42
>
> On Tue, Jun 15, 2021 at 12:18 PM Thomas Monjalon <thomas@monjalon.net>
> wrote:
> >
> > 14/06/2021 17:48, Morten Brørup:
> > > > From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Thomas
> Monjalon
> > > It would be much simpler to just increase RTE_MAX_ETHPORTS to
> something big enough to hold a sufficiently large array. And possibly
> add an rte_max_ethports variable to indicate the number of populated
> entries in the array, for use when iterating over the array.
> > >
> > > Can we come up with another example than RTE_MAX_ETHPORTS where
> this library provides a better benefit?
> >
> > What is big enough?
> > Is 640KB enough for RAM? ;)
>
> If I understand it correctly, Linux process allocates 640KB due to
> that fact currently
> struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS] is global and it
> is from BSS.
Correct.
> If we make this from heap i.e use malloc() to allocate this memory
> then in my understanding Linux
> really won't allocate the real page for backend memory until unless,
> someone write/read to this memory.
If the array is allocated from the heap, its members will be accessed though a pointer to the array, e.g. in rte_eth_rx/tx_burst(). This might affect performance, which is probably why the array is allocated the way it is.
Although it might be worth investigating how much it actually affects the performance.
So we need to do something else if we want to conserve memory and still allow a large rte_eth_devices[] array.
Looking at struct rte_eth_dev, we could reduce its size as follows:
1. Change the two callback arrays post_rx/pre_tx_burst_cbs[RTE_MAX_QUEUES_PER_PORT] to pointers to callback arrays, which are allocated from the heap.
With the default RTE_MAX_QUEUES_PER_PORT of 1024, these two arrays are the sinners that make the struct rte_eth_dev use so much memory. This modification would save 16 KB (minus 16 bytes for the pointers to the two arrays) per port.
Furthermore, these callback arrays would only need to be allocated if the application is compiled with callbacks enabled (#define RTE_ETHDEV_RXTX_CALLBACKS). And they would only need to be sized to the actual number of queues for the port.
The disadvantage is that this would add another level of indirection, although only for applications compiled with callbacks enabled.
2. Remove reserved_64s[4] and reserved_ptrs[4]. This would save 64 bytes per port. Not much, but worth considering if we are changing the API/ABI anyway.
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [RFC v3 0/6] Add mdev (Mediated device) support in DPDK
2021-06-15 7:48 0% ` Thomas Monjalon
@ 2021-06-15 10:44 0% ` Xia, Chenbo
0 siblings, 0 replies; 200+ results
From: Xia, Chenbo @ 2021-06-15 10:44 UTC (permalink / raw)
To: Thomas Monjalon
Cc: dev, Liang, Cunming, Wu, Jingjing, Burakov, Anatoly, Yigit,
Ferruh, mdr, nhorman, Richardson, Bruce, david.marchand, stephen,
Ananyev, Konstantin, jgg, parav, xuemingl
Hi Thomas,
> -----Original Message-----
> From: Thomas Monjalon <thomas@monjalon.net>
> Sent: Tuesday, June 15, 2021 3:48 PM
> To: Xia, Chenbo <chenbo.xia@intel.com>
> Cc: dev@dpdk.org; Liang, Cunming <cunming.liang@intel.com>; Wu, Jingjing
> <jingjing.wu@intel.com>; Burakov, Anatoly <anatoly.burakov@intel.com>; Yigit,
> Ferruh <ferruh.yigit@intel.com>; mdr@ashroe.eu; nhorman@tuxdriver.com;
> Richardson, Bruce <bruce.richardson@intel.com>; david.marchand@redhat.com;
> stephen@networkplumber.org; Ananyev, Konstantin <konstantin.ananyev@intel.com>;
> jgg@nvidia.com; parav@nvidia.com; xuemingl@nvidia.com
> Subject: Re: [dpdk-dev] [RFC v3 0/6] Add mdev (Mediated device) support in
> DPDK
>
> 15/06/2021 04:49, Xia, Chenbo:
> > From: Thomas Monjalon <thomas@monjalon.net>
> > > 01/06/2021 05:06, Chenbo Xia:
> > > > Hi everyone,
> > > >
> > > > This is a draft implementation of the mdev (Mediated device [1])
> > > > support in DPDK PCI bus driver. Mdev is a way to virtualize devices
> > > > in Linux kernel. Based on the device-api (mdev_type/device_api),
> > > > there could be different types of mdev devices (e.g. vfio-pci).
> > >
> > > Please could you illustrate with an usage of mdev in DPDK?
> > > What does it enable which is not possible today?
> >
> > The main purpose is for DPDK to drive mdev-based devices, which is not
> > possible today.
> >
> > I'd take PCI devices for an example. Currently DPDK can only drive devices
> > of physical pci bus under /sys/bus/pci and kernel exposes the pci devices
> > to APP in that way.
> >
> > But there are PCI devices using vfio-mdev as a software framework to expose
> > Mdev to APP under /sys/bus/mdev. Devices could choose this way of
> virtualizing
> > itself to let multiple APPs share one physical device. For example, Intel
> > Scalable IOV technology is known to use vfio-mdev as SW framework for
> Scalable
> > IOV enabled devices (and Intel net/crypto/raw devices support this tech).
> For
> > those mdev-based devices, DPDK needs support on the bus layer to
> scan/plug/probe/..
> > them, which is the main effort this patchset does. There are also other
> devices
> > using the vfio-mdev framework, AFAIK, Nvidia's GPU is the first one using
> mdev
> > and Intel's GPU virtualization also uses it.
>
> Yes mdev was designed for virtualization I think.
> The use of mdev for Scalable IOV without virtualization
> may be seen as an abuse by Linux maintainers,
> as they currently seem to prefer the auxiliary bus (which is a real bus).
>
> Mellanox got a push back when trying to use mdev for the same purpose
> (Scalable Function, also called Sub-Function) in the kernel.
> The Linux community decided to use the auxiliary bus.
>
> Any other feedback on the choice mdev vs aux?
OK. Thanks for the info. Much appreciated.
I could investigate a bit about the choice and later come back to you.
> Is there any kernel code supporting this mdev model for Intel devices?
Now there's only intel GPU. But I think you care more about devices that DPDK could
drive: a dma device (DPDK's name ioat under raw/ioat) is on its way upstreaming
(https://www.spinics.net/lists/kvm/msg244417.html)
Thanks,
Chenbo
>
> > > > In this patchset, the PCI bus driver is extended to support scanning
> > > > and probing the mdev devices whose device-api is "vfio-pci".
> > > >
> > > > +---------+
> > > > | PCI bus |
> > > > +----+----+
> > > > |
> > > > +--------+-------+-------+--------+
> > > > | | | |
> > > > Physical PCI devices ... Mediated PCI devices ...
> > > >
> > > > The first four patches in this patchset are mainly preparation of mdev
> > > > bus support. The left two patches are the key implementation of mdev bus.
> > > >
> > > > The implementation of mdev bus in DPDK has several options:
> > > >
> > > > 1: Embed mdev bus in current pci bus
> > > >
> > > > This patchset takes this option for an example. Mdev has several
> > > > device types: pci/platform/amba/ccw/ap. DPDK currently only cares
> > > > pci devices in all mdev device types so we could embed the mdev bus
> > > > into current pci bus. Then pci bus with mdev support will scan/plug/
> > > > unplug/.. not only normal pci devices but also mediated pci devices.
> > >
> > > I think it is a different bus.
> > > It would be cleaner to not touch the PCI bus.
> > > Having a separate bus will allow an easy way to identify a device
> > > with the new generic devargs syntax, example:
> > > bus=mdev,uuid=XXX
> > > or more complex:
> > > bus=mdev,uuid=XXX/class=crypto/driver=qat,foo=bar
> >
> > OK. Agree on cleaner to not touch PCI bus. And there may also be a
> 'type=pci'
> > as mdev has several types in its definition (pci/ap/platform/ccw/...).
> >
> > > > 2: A new mdev bus that scans mediated pci devices and probes mdev driver
> to
> > > > plug-in pci devices to pci bus
> > > >
> > > > If we took this option, a new mdev bus will be implemented to scan
> > > > mediated pci devices and a new mdev driver for pci devices will be
> > > > implemented in pci bus to plug-in mediated pci devices to pci bus.
> > > >
> > > > Our RFC v1 takes this option:
> > > > http://patchwork.dpdk.org/project/dpdk/cover/20190403071844.21126-1-
> > > tiwei.bie@intel.com/
> > > >
> > > > Note that: for either option 1 or 2, device drivers do not know the
> > > > implementation difference but only use structs/functions exposed by
> > > > pci bus. Mediated pci devices are different from normal pci devices
> > > > on: 1. Mediated pci devices use UUID as address but normal ones use
> BDF.
> > > > 2. Mediated pci devices may have some capabilities that normal pci
> > > > devices do not have. For example, mediated pci devices could have
> > > > regions that have sparse mmap capability, which allows a region to
> have
> > > > multiple mmap areas. Another example is mediated pci devices may have
> > > > regions/part of regions not mmaped but need to access them. Above
> > > > difference will change the current ABI (i.e., struct rte_pci_device).
> > > > Please check 5th and 6th patch for details.
> > > >
> > > > 3. A brand new mdev bus that does everything
> > > >
> > > > This option will implement a new and standalone mdev bus. This option
> > > > does not need any changes in current pci bus but only needs some
> shared
> > > > code (linux vfio part) in pci bus. Drivers of devices that support
> mdev
> > > > will register itself as a mdev driver and do not rely on pci bus
> anymore.
> > > > This option, IMHO, will make the code clean. The only potential
> problem
> > > > may be code duplication, which could be solved by making code of
> linux
> > > > vfio part of pci bus common and shared.
> > >
> > > Yes I prefer this third option.
> > > We can find an elegant way of sharing some VFIO code between buses.
> >
> > Yes, I have not thought about the details of the code sharing but will try
> to make
> > it elegant.
>
> Great, thanks.
>
^ permalink raw reply [relevance 0%]
* [dpdk-dev] [RFC PATCH v2 0/3] Add PIE support for HQoS library
2021-06-09 10:53 3% ` [dpdk-dev] [RFC PATCH v1 " Liguzinski, WojciechX
@ 2021-06-15 9:01 3% ` Liguzinski, WojciechX
2021-06-21 7:35 3% ` [dpdk-dev] [RFC PATCH v3 " Liguzinski, WojciechX
0 siblings, 1 reply; 200+ results
From: Liguzinski, WojciechX @ 2021-06-15 9:01 UTC (permalink / raw)
To: dev, jasvinder.singh, cristian.dumitrescu; +Cc: savinay.dharmappa, megha.ajmera
DPDK sched library is equipped with mechanism that secures it from the bufferbloat problem
which is a situation when excess buffers in the network cause high latency and latency
variation. Currently, it supports RED for active queue management (which is designed
to control the queue length but it does not control latency directly and is now being
obsoleted). However, more advanced queue management is required to address this problem
and provide desirable quality of service to users.
This solution (RFC) proposes usage of new algorithm called "PIE" (Proportional Integral
controller Enhanced) that can effectively and directly control queuing latency to address
the bufferbloat problem.
The implementation of mentioned functionality includes modification of existing and
adding a new set of data structures to the library, adding PIE related APIs.
This affects structures in public API/ABI. That is why deprecation notice is going
to be prepared and sent.
Liguzinski, WojciechX (3):
sched: add PIE based congestion management
example/qos_sched: add PIE support
example/ip_pipeline: add PIE support
config/rte_config.h | 1 -
drivers/net/softnic/rte_eth_softnic_tm.c | 6 +-
examples/ip_pipeline/tmgr.c | 6 +-
examples/qos_sched/app_thread.c | 1 -
examples/qos_sched/cfg_file.c | 82 ++++-
examples/qos_sched/init.c | 7 +-
examples/qos_sched/profile.cfg | 196 ++++++++----
lib/sched/meson.build | 10 +-
lib/sched/rte_pie.c | 78 +++++
lib/sched/rte_pie.h | 389 +++++++++++++++++++++++
lib/sched/rte_sched.c | 229 +++++++++----
lib/sched/rte_sched.h | 53 ++-
12 files changed, 877 insertions(+), 181 deletions(-)
create mode 100644 lib/sched/rte_pie.c
create mode 100644 lib/sched/rte_pie.h
--
2.17.1
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [RFC v3 0/6] Add mdev (Mediated device) support in DPDK
2021-06-15 2:49 0% ` Xia, Chenbo
@ 2021-06-15 7:48 0% ` Thomas Monjalon
2021-06-15 10:44 0% ` Xia, Chenbo
0 siblings, 1 reply; 200+ results
From: Thomas Monjalon @ 2021-06-15 7:48 UTC (permalink / raw)
To: Xia, Chenbo
Cc: dev, Liang, Cunming, Wu, Jingjing, Burakov, Anatoly, Yigit,
Ferruh, mdr, nhorman, Richardson, Bruce, david.marchand, stephen,
Ananyev, Konstantin, jgg, parav, xuemingl
15/06/2021 04:49, Xia, Chenbo:
> From: Thomas Monjalon <thomas@monjalon.net>
> > 01/06/2021 05:06, Chenbo Xia:
> > > Hi everyone,
> > >
> > > This is a draft implementation of the mdev (Mediated device [1])
> > > support in DPDK PCI bus driver. Mdev is a way to virtualize devices
> > > in Linux kernel. Based on the device-api (mdev_type/device_api),
> > > there could be different types of mdev devices (e.g. vfio-pci).
> >
> > Please could you illustrate with an usage of mdev in DPDK?
> > What does it enable which is not possible today?
>
> The main purpose is for DPDK to drive mdev-based devices, which is not
> possible today.
>
> I'd take PCI devices for an example. Currently DPDK can only drive devices
> of physical pci bus under /sys/bus/pci and kernel exposes the pci devices
> to APP in that way.
>
> But there are PCI devices using vfio-mdev as a software framework to expose
> Mdev to APP under /sys/bus/mdev. Devices could choose this way of virtualizing
> itself to let multiple APPs share one physical device. For example, Intel
> Scalable IOV technology is known to use vfio-mdev as SW framework for Scalable
> IOV enabled devices (and Intel net/crypto/raw devices support this tech). For
> those mdev-based devices, DPDK needs support on the bus layer to scan/plug/probe/..
> them, which is the main effort this patchset does. There are also other devices
> using the vfio-mdev framework, AFAIK, Nvidia's GPU is the first one using mdev
> and Intel's GPU virtualization also uses it.
Yes mdev was designed for virtualization I think.
The use of mdev for Scalable IOV without virtualization
may be seen as an abuse by Linux maintainers,
as they currently seem to prefer the auxiliary bus (which is a real bus).
Mellanox got a push back when trying to use mdev for the same purpose
(Scalable Function, also called Sub-Function) in the kernel.
The Linux community decided to use the auxiliary bus.
Any other feedback on the choice mdev vs aux?
Is there any kernel code supporting this mdev model for Intel devices?
> > > In this patchset, the PCI bus driver is extended to support scanning
> > > and probing the mdev devices whose device-api is "vfio-pci".
> > >
> > > +---------+
> > > | PCI bus |
> > > +----+----+
> > > |
> > > +--------+-------+-------+--------+
> > > | | | |
> > > Physical PCI devices ... Mediated PCI devices ...
> > >
> > > The first four patches in this patchset are mainly preparation of mdev
> > > bus support. The left two patches are the key implementation of mdev bus.
> > >
> > > The implementation of mdev bus in DPDK has several options:
> > >
> > > 1: Embed mdev bus in current pci bus
> > >
> > > This patchset takes this option for an example. Mdev has several
> > > device types: pci/platform/amba/ccw/ap. DPDK currently only cares
> > > pci devices in all mdev device types so we could embed the mdev bus
> > > into current pci bus. Then pci bus with mdev support will scan/plug/
> > > unplug/.. not only normal pci devices but also mediated pci devices.
> >
> > I think it is a different bus.
> > It would be cleaner to not touch the PCI bus.
> > Having a separate bus will allow an easy way to identify a device
> > with the new generic devargs syntax, example:
> > bus=mdev,uuid=XXX
> > or more complex:
> > bus=mdev,uuid=XXX/class=crypto/driver=qat,foo=bar
>
> OK. Agree on cleaner to not touch PCI bus. And there may also be a 'type=pci'
> as mdev has several types in its definition (pci/ap/platform/ccw/...).
>
> > > 2: A new mdev bus that scans mediated pci devices and probes mdev driver to
> > > plug-in pci devices to pci bus
> > >
> > > If we took this option, a new mdev bus will be implemented to scan
> > > mediated pci devices and a new mdev driver for pci devices will be
> > > implemented in pci bus to plug-in mediated pci devices to pci bus.
> > >
> > > Our RFC v1 takes this option:
> > > http://patchwork.dpdk.org/project/dpdk/cover/20190403071844.21126-1-
> > tiwei.bie@intel.com/
> > >
> > > Note that: for either option 1 or 2, device drivers do not know the
> > > implementation difference but only use structs/functions exposed by
> > > pci bus. Mediated pci devices are different from normal pci devices
> > > on: 1. Mediated pci devices use UUID as address but normal ones use BDF.
> > > 2. Mediated pci devices may have some capabilities that normal pci
> > > devices do not have. For example, mediated pci devices could have
> > > regions that have sparse mmap capability, which allows a region to have
> > > multiple mmap areas. Another example is mediated pci devices may have
> > > regions/part of regions not mmaped but need to access them. Above
> > > difference will change the current ABI (i.e., struct rte_pci_device).
> > > Please check 5th and 6th patch for details.
> > >
> > > 3. A brand new mdev bus that does everything
> > >
> > > This option will implement a new and standalone mdev bus. This option
> > > does not need any changes in current pci bus but only needs some shared
> > > code (linux vfio part) in pci bus. Drivers of devices that support mdev
> > > will register itself as a mdev driver and do not rely on pci bus anymore.
> > > This option, IMHO, will make the code clean. The only potential problem
> > > may be code duplication, which could be solved by making code of linux
> > > vfio part of pci bus common and shared.
> >
> > Yes I prefer this third option.
> > We can find an elegant way of sharing some VFIO code between buses.
>
> Yes, I have not thought about the details of the code sharing but will try to make
> it elegant.
Great, thanks.
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [RFC v3 0/6] Add mdev (Mediated device) support in DPDK
2021-06-11 7:15 0% ` Thomas Monjalon
@ 2021-06-15 2:49 0% ` Xia, Chenbo
2021-06-15 7:48 0% ` Thomas Monjalon
0 siblings, 1 reply; 200+ results
From: Xia, Chenbo @ 2021-06-15 2:49 UTC (permalink / raw)
To: Thomas Monjalon
Cc: dev, Liang, Cunming, Wu, Jingjing, Burakov, Anatoly, Yigit,
Ferruh, mdr, nhorman, Richardson, Bruce, david.marchand, stephen,
Ananyev, Konstantin
Hi Thomas,
> -----Original Message-----
> From: Thomas Monjalon <thomas@monjalon.net>
> Sent: Friday, June 11, 2021 3:16 PM
> To: Xia, Chenbo <chenbo.xia@intel.com>
> Cc: dev@dpdk.org; Liang, Cunming <cunming.liang@intel.com>; Wu, Jingjing
> <jingjing.wu@intel.com>; Burakov, Anatoly <anatoly.burakov@intel.com>; Yigit,
> Ferruh <ferruh.yigit@intel.com>; mdr@ashroe.eu; nhorman@tuxdriver.com;
> Richardson, Bruce <bruce.richardson@intel.com>; david.marchand@redhat.com;
> stephen@networkplumber.org; Ananyev, Konstantin <konstantin.ananyev@intel.com>
> Subject: Re: [dpdk-dev] [RFC v3 0/6] Add mdev (Mediated device) support in
> DPDK
>
> 01/06/2021 05:06, Chenbo Xia:
> > Hi everyone,
> >
> > This is a draft implementation of the mdev (Mediated device [1])
> > support in DPDK PCI bus driver. Mdev is a way to virtualize devices
> > in Linux kernel. Based on the device-api (mdev_type/device_api),
> > there could be different types of mdev devices (e.g. vfio-pci).
>
> Please could you illustrate with an usage of mdev in DPDK?
> What does it enable which is not possible today?
The main purpose is for DPDK to drive mdev-based devices, which is not
possible today.
I'd take PCI devices for an example. Currently DPDK can only drive devices
of physical pci bus under /sys/bus/pci and kernel exposes the pci devices
to APP in that way.
But there are PCI devices using vfio-mdev as a software framework to expose
Mdev to APP under /sys/bus/mdev. Devices could choose this way of virtualizing
itself to let multiple APPs share one physical device. For example, Intel
Scalable IOV technology is known to use vfio-mdev as SW framework for Scalable
IOV enabled devices (and Intel net/crypto/raw devices support this tech). For
those mdev-based devices, DPDK needs support on the bus layer to scan/plug/probe/..
them, which is the main effort this patchset does. There are also other devices
using the vfio-mdev framework, AFAIK, Nvidia's GPU is the first one using mdev
and Intel's GPU virtualization also uses it.
>
> > In this patchset, the PCI bus driver is extended to support scanning
> > and probing the mdev devices whose device-api is "vfio-pci".
> >
> > +---------+
> > | PCI bus |
> > +----+----+
> > |
> > +--------+-------+-------+--------+
> > | | | |
> > Physical PCI devices ... Mediated PCI devices ...
> >
> > The first four patches in this patchset are mainly preparation of mdev
> > bus support. The left two patches are the key implementation of mdev bus.
> >
> > The implementation of mdev bus in DPDK has several options:
> >
> > 1: Embed mdev bus in current pci bus
> >
> > This patchset takes this option for an example. Mdev has several
> > device types: pci/platform/amba/ccw/ap. DPDK currently only cares
> > pci devices in all mdev device types so we could embed the mdev bus
> > into current pci bus. Then pci bus with mdev support will scan/plug/
> > unplug/.. not only normal pci devices but also mediated pci devices.
>
> I think it is a different bus.
> It would be cleaner to not touch the PCI bus.
> Having a separate bus will allow an easy way to identify a device
> with the new generic devargs syntax, example:
> bus=mdev,uuid=XXX
> or more complex:
> bus=mdev,uuid=XXX/class=crypto/driver=qat,foo=bar
OK. Agree on cleaner to not touch PCI bus. And there may also be a 'type=pci'
as mdev has several types in its definition (pci/ap/platform/ccw/...).
>
> > 2: A new mdev bus that scans mediated pci devices and probes mdev driver to
> > plug-in pci devices to pci bus
> >
> > If we took this option, a new mdev bus will be implemented to scan
> > mediated pci devices and a new mdev driver for pci devices will be
> > implemented in pci bus to plug-in mediated pci devices to pci bus.
> >
> > Our RFC v1 takes this option:
> > http://patchwork.dpdk.org/project/dpdk/cover/20190403071844.21126-1-
> tiwei.bie@intel.com/
> >
> > Note that: for either option 1 or 2, device drivers do not know the
> > implementation difference but only use structs/functions exposed by
> > pci bus. Mediated pci devices are different from normal pci devices
> > on: 1. Mediated pci devices use UUID as address but normal ones use BDF.
> > 2. Mediated pci devices may have some capabilities that normal pci
> > devices do not have. For example, mediated pci devices could have
> > regions that have sparse mmap capability, which allows a region to have
> > multiple mmap areas. Another example is mediated pci devices may have
> > regions/part of regions not mmaped but need to access them. Above
> > difference will change the current ABI (i.e., struct rte_pci_device).
> > Please check 5th and 6th patch for details.
> >
> > 3. A brand new mdev bus that does everything
> >
> > This option will implement a new and standalone mdev bus. This option
> > does not need any changes in current pci bus but only needs some shared
> > code (linux vfio part) in pci bus. Drivers of devices that support mdev
> > will register itself as a mdev driver and do not rely on pci bus anymore.
> > This option, IMHO, will make the code clean. The only potential problem
> > may be code duplication, which could be solved by making code of linux
> > vfio part of pci bus common and shared.
>
> Yes I prefer this third option.
> We can find an elegant way of sharing some VFIO code between buses.
Yes, I have not thought about the details of the code sharing but will try to make
it elegant.
Thanks,
Chenbo
>
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH] net: introduce IPv4 ihl and version fields
2021-06-10 9:22 4% ` Olivier Matz
@ 2021-06-14 16:36 4% ` Andrew Rybchenko
2021-06-17 16:29 0% ` Ferruh Yigit
0 siblings, 1 reply; 200+ results
From: Andrew Rybchenko @ 2021-06-14 16:36 UTC (permalink / raw)
To: Olivier Matz, Gregory Etelson
Cc: Iremonger, Bernard, Morten Brørup, dev, Matan Azrad,
Ori Kam, Raslan Darawsheh, Asaf Penso, Thomas Monjalon,
Ferruh Yigit
On 6/10/21 12:22 PM, Olivier Matz wrote:
> Hi Gregory,
>
> On Thu, Jun 10, 2021 at 04:10:25AM +0000, Gregory Etelson wrote:
>> Hello,
>>
>> There was no activity that patch for a long time.
>> The patch is marked as failed, but we verified failed tests and concluded that the failures can be ignored.
>> https://patchwork.dpdk.org/project/dpdk/patch/20210527152858.13312-1-getelson@nvidia.com/
>> How should I proceed with this case ?
>> Please advise.
>>
>
> I like the idea of this patch: to me it is more convenient to access to
> these fields with a bitfield. I don't see a problem about using
> bitfields here, glibc or FreeBSD netinet/ip.h are doing the same.
>
> However, as stated previously, this patch breaks the initialization API.
Very good point. I guess we overlooked it in a number of patches
with fix RTE flow API items to start from corresponding network
headers. We used unions there to avoid ABI breakage, but it looks
like we have broken initialization API anyway.
We should decide if initialization ABI breakage is a show-stopper
for RTE flow API items switching to use network protocol headers.
> The DPDK ABI/API policy is described here:
> http://doc.dpdk.org/guides/contributing/abi_policy.html#the-dpdk-abi-policy
>
>>From this document:
>
> The API should only be changed for significant reasons, such as
> performance enhancements. API breakages due to changes such as
> reorganizing public structure fields for aesthetic or readability
> purposes should be avoided.
>
> So to follow the project policy, I think we should reject this path.
>
> Regards,
> Olivier
>
^ permalink raw reply [relevance 4%]
* Re: [dpdk-dev] [PATCH] parray: introduce internal API for dynamic arrays
@ 2021-06-14 15:54 3% ` Ananyev, Konstantin
2021-06-17 13:08 3% ` Ferruh Yigit
0 siblings, 1 reply; 200+ results
From: Ananyev, Konstantin @ 2021-06-14 15:54 UTC (permalink / raw)
To: Ananyev, Konstantin, Thomas Monjalon, Richardson, Bruce
Cc: Morten Brørup, dev, olivier.matz, andrew.rybchenko,
honnappa.nagarahalli, Yigit, Ferruh, jerinj, gakhil
> >
> > 14/06/2021 15:15, Bruce Richardson:
> > > On Mon, Jun 14, 2021 at 02:22:42PM +0200, Morten Brørup wrote:
> > > > > From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Thomas Monjalon
> > > > > Sent: Monday, 14 June 2021 12.59
> > > > >
> > > > > Performance of access in a fixed-size array is very good
> > > > > because of cache locality
> > > > > and because there is a single pointer to dereference.
> > > > > The only drawback is the lack of flexibility:
> > > > > the size of such an array cannot be increase at runtime.
> > > > >
> > > > > An approach to this problem is to allocate the array at runtime,
> > > > > being as efficient as static arrays, but still limited to a maximum.
> > > > >
> > > > > That's why the API rte_parray is introduced,
> > > > > allowing to declare an array of pointer which can be resized
> > > > > dynamically
> > > > > and automatically at runtime while keeping a good read performance.
> > > > >
> > > > > After resize, the previous array is kept until the next resize
> > > > > to avoid crashs during a read without any lock.
> > > > >
> > > > > Each element is a pointer to a memory chunk dynamically allocated.
> > > > > This is not good for cache locality but it allows to keep the same
> > > > > memory per element, no matter how the array is resized.
> > > > > Cache locality could be improved with mempools.
> > > > > The other drawback is having to dereference one more pointer
> > > > > to read an element.
> > > > >
> > > > > There is not much locks, so the API is for internal use only.
> > > > > This API may be used to completely remove some compilation-time
> > > > > maximums.
> > > >
> > > > I get the purpose and overall intention of this library.
> > > >
> > > > I probably already mentioned that I prefer "embedded style programming" with fixed size arrays, rather than runtime configurability.
> It's
> > my personal opinion, and the DPDK Tech Board clearly prefers reducing the amount of compile time configurability, so there is no way for
> > me to stop this progress, and I do not intend to oppose to this library. :-)
> > > >
> > > > This library is likely to become a core library of DPDK, so I think it is important getting it right. Could you please mention a few
> examples
> > where you think this internal library should be used, and where it should not be used. Then it is easier to discuss if the border line between
> > control path and data plane is correct. E.g. this library is not intended to be used for dynamically sized packet queues that grow and shrink
> in
> > the fast path.
> > > >
> > > > If the library becomes a core DPDK library, it should probably be public instead of internal. E.g. if the library is used to make
> > RTE_MAX_ETHPORTS dynamic instead of compile time fixed, then some applications might also need dynamically sized arrays for their
> > application specific per-port runtime data, and this library could serve that purpose too.
> > > >
> > >
> > > Thanks Thomas for starting this discussion and Morten for follow-up.
> > >
> > > My thinking is as follows, and I'm particularly keeping in mind the cases
> > > of e.g. RTE_MAX_ETHPORTS, as a leading candidate here.
> > >
> > > While I dislike the hard-coded limits in DPDK, I'm also not convinced that
> > > we should switch away from the flat arrays or that we need fully dynamic
> > > arrays that grow/shrink at runtime for ethdevs. I would suggest a half-way
> > > house here, where we keep the ethdevs as an array, but one allocated/sized
> > > at runtime rather than statically. This would allow us to have a
> > > compile-time default value, but, for use cases that need it, allow use of a
> > > flag e.g. "max-ethdevs" to change the size of the parameter given to the
> > > malloc call for the array. This max limit could then be provided to apps
> > > too if they want to match any array sizes. [Alternatively those apps could
> > > check the provided size and error out if the size has been increased beyond
> > > what the app is designed to use?]. There would be no extra dereferences per
> > > rx/tx burst call in this scenario so performance should be the same as
> > > before (potentially better if array is in hugepage memory, I suppose).
> >
> > I think we need some benchmarks to decide what is the best tradeoff.
> > I spent time on this implementation, but sorry I won't have time for benchmarks.
> > Volunteers?
>
> I had only a quick look at your approach so far.
> But from what I can read, in MT environment your suggestion will require
> extra synchronization for each read-write access to such parray element (lock, rcu, ...).
> I think what Bruce suggests will be much ligther, easier to implement and less error prone.
> At least for rte_ethdevs[] and friends.
> Konstantin
One more thought here - if we are talking about rte_ethdev[] in particular, I think we can:
1. move public function pointers (rx_pkt_burst(), etc.) from rte_ethdev into a separate flat array.
We can keep it public to still use inline functions for 'fast' calls rte_eth_rx_burst(), etc. to avoid
any regressions.
That could still be flat array with max_size specified at application startup.
2. Hide rest of rte_ethdev struct in .c.
That will allow us to change the struct itself and the whole rte_ethdev[] table in a way we like
(flat array, vector, hash, linked list) without ABI/API breakages.
Yes, it would require all PMDs to change prototype for pkt_rx_burst() function
(to accept port_id, queue_id instead of queue pointer), but the change is mechanical one.
Probably some macro can be provided to simplify it.
The only significant complication I can foresee with implementing that approach -
we'll need a an array of 'fast' function pointers per queue, not per device as we have now
(to avoid extra indirection for callback implementation).
Though as a bonus we'll have ability to use different RX/TX funcions per queue.
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] 20.11.2 patches review and test
2021-06-08 13:10 0% ` Xueming(Steven) Li
@ 2021-06-14 12:39 0% ` Xueming(Steven) Li
0 siblings, 0 replies; 200+ results
From: Xueming(Steven) Li @ 2021-06-14 12:39 UTC (permalink / raw)
To: Kevin Traynor
Cc: dev, John McNamara, Luca Boccassi, NBU-Contact-Thomas Monjalon,
Christian Ehrhardt, Ferruh Yigit, David Marchand
> -----Original Message-----
> From: Xueming(Steven) Li
> Sent: Tuesday, June 8, 2021 9:10 PM
> To: Kevin Traynor <ktraynor@redhat.com>
> Cc: dev@dpdk.org; John McNamara <john.mcnamara@intel.com>; Luca Boccassi <bluca@debian.org>; NBU-Contact-Thomas
> Monjalon <thomas@monjalon.net>; Christian Ehrhardt <christian.ehrhardt@canonical.com>; Ferruh Yigit <ferruh.yigit@intel.com>;
> David Marchand <david.marchand@redhat.com>
> Subject: RE: 20.11.2 patches review and test
>
>
>
> > -----Original Message-----
> > From: Kevin Traynor <ktraynor@redhat.com>
> > Sent: Tuesday, June 8, 2021 7:31 PM
> > To: Xueming(Steven) Li <xuemingl@nvidia.com>
> > Cc: dev@dpdk.org; John McNamara <john.mcnamara@intel.com>; Luca
> > Boccassi <bluca@debian.org>; NBU-Contact-Thomas Monjalon
> > <thomas@monjalon.net>; Christian Ehrhardt
> > <christian.ehrhardt@canonical.com>; Ferruh Yigit
> > <ferruh.yigit@intel.com>; David Marchand <david.marchand@redhat.com>
> > Subject: Re: 20.11.2 patches review and test
> >
> > (reduced Cc)
> >
> > Hi Steven,
> >
> > On 01/06/2021 08:54, Xueming(Steven) Li wrote:
> > > Hi all,
> > >
> > > Here is a list of patches targeted for stable release 20.11.2.
> > >
> > > The planned date for the final release is 15th June.
> > >
> > > Please help with testing and validation of your use cases and report
> > > any issues/results with reply-all to this mail. For the final
> > > release the fixes and reported validations will be added to the release notes.
> > >
> > > A release candidate tarball can be found at:
> > >
> > > https://dpdk.org/browse/dpdk-stable/tag/?id=v20.11.2-rc1
> > >
> > > These patches are located at branch 20.11 of dpdk-stable repo:
> > > https://dpdk.org/browse/dpdk-stable/
> > >
> >
> > Is the list of patches up to 21.05? Did you drop the fixes for
> > GCC11/clang12? I didn't see them here or in the failed list. I think there is a couple that didn't get the right tags, but the ones that did
> seem missing too.
>
> You are correct, some fixes from v21.05rc1 - v21.05 are missing.
> Seems an issue caused by ./devtools/git-log-fixes.sh, if running scripts with other branches checked out, some patches are hidden.
Fixed the scripts with 2 patches:
1. look for stable version tag with name pattern.
2. auto resolve branch used to lookup fixes.
http://patchwork.dpdk.org/project/dpdk/list/?series=17303
> I will make another scan soon.
>
> >
> > It would mean that 20.11.2 would not compile on the latest Fedora (34) with the distro packaged compiler versions.
> >
> > Kevin.
> >
> > >
> > > Thanks.
> > >
> > > Xueming Li <xuemingl@nvidia.com>
> > >
> > > ---
> > > Ajit Khaparde (3):
> > > net/bnxt: fix RSS context cleanup
> > > net/bnxt: check kvargs parsing
> > > net/bnxt: fix resource cleanup
> > >
> > > Alvin Zhang (7):
> > > net/ice: fix VLAN filter with PF
> > > net/i40e: fix input set field mask
> > > net/igc: fix Rx RSS hash offload capability
> > > net/igc: fix Rx error counter for bad length
> > > net/e1000: fix Rx error counter for bad length
> > > net/e1000: fix max Rx packet size
> > > net/igc: fix Rx packet size
> > >
> > > Anatoly Burakov (2):
> > > fbarray: fix log message on truncation error
> > > power: do not skip saving original P-state governor
> > >
> > > Andrew Boyer (1):
> > > net/ionic: fix completion type in lif init
> > >
> > > Andrew Rybchenko (3):
> > > net/failsafe: fix RSS hash offload reporting
> > > net/failsafe: report minimum and maximum MTU
> > > common/sfc_efx: remove GENEVE from supported tunnels
> > >
> > > Ankur Dwivedi (1):
> > > crypto/octeontx: fix session-less mode
> > >
> > > Apeksha Gupta (1):
> > > examples/l2fwd-crypto: skip masked devices
> > >
> > > Arek Kusztal (1):
> > > crypto/qat: fix offset for out-of-place scatter-gather
> > >
> > > Beilei Xing (1):
> > > net/i40evf: fix packet loss for X722
> > >
> > > Bruce Richardson (1):
> > > build: exclude meson files from examples installation
> > >
> > > Chenbo Xia (1):
> > > examples/vhost: check memory table query
> > >
> > > Chengchang Tang (15):
> > > net/hns3: fix HW buffer size on MTU update
> > > net/hns3: fix processing Tx offload flags
> > > net/hns3: fix Tx checksum for UDP packets with special port
> > > net/hns3: fix long task queue pairs reset time
> > > ethdev: validate input in module EEPROM dump
> > > ethdev: validate input in register info
> > > ethdev: validate input in EEPROM info
> > > net/hns3: fix rollback after setting PVID failure
> > > net/hns3: fix timing in resetting queues
> > > net/hns3: fix queue state when concurrent with reset
> > > net/hns3: fix configure FEC when concurrent with reset
> > > net/hns3: fix use of command status enumeration
> > > examples: add eal cleanup to examples
> > > net/bonding: fix adding itself as its slave
> > > net/hns3: fix timing in mailbox
> > >
> > > Chengwen Feng (15):
> > > net/hns3: fix flow counter value
> > > net/hns3: fix VF mailbox head field
> > > net/hns3: support get device version when dump register
> > > net/hns3: fix some packet types
> > > net/hns3: fix missing outer L4 UDP flag for VXLAN
> > > net/hns3: remove VLAN/QinQ ptypes from support list
> > > test: check thread creation
> > > common/dpaax: fix possible null pointer access
> > > examples/ethtool: remove unused parsing
> > > net/hns3: fix flow director lock
> > > net/e1000/base: fix timeout for shadow RAM write
> > > net/hns3: fix setting default MAC address in bonding of VF
> > > net/hns3: fix possible mismatched response of mailbox
> > > net/hns3: fix VF handling LSC event in secondary process
> > > net/hns3: fix verification of NEON support
> > >
> > > Ciara Loftus (1):
> > > net/af_xdp: fix error handling during Rx queue setup
> > >
> > > Conor Walsh (1):
> > > examples/l3fwd: fix LPM IPv6 subnets
> > >
> > > Cristian Dumitrescu (3):
> > > table: fix actions with different data size
> > > pipeline: fix instruction translation
> > > pipeline: fix endianness conversions
> > >
> > > Dapeng Yu (3):
> > > net/igc: remove MTU setting limitation
> > > net/e1000: remove MTU setting limitation
> > > examples/packet_ordering: fix port configuration
> > >
> > > David Harton (1):
> > > net/ena: fix releasing Tx ring mbufs
> > >
> > > David Marchand (8):
> > > doc: fix sphinx rtd theme import in GHA
> > > service: clean references to removed symbol
> > > eal: fix evaluation of log level option
> > > ci: hook to GitHub Actions
> > > ci: enable v21 ABI checks
> > > ci: fix package installation in GitHub Actions
> > > ci: ignore APT update failure in GitHub Actions
> > > ci: catch coredumps
> > >
> > > Dekel Peled (1):
> > > common/mlx5: fix DevX read output buffer size
> > >
> > > Dmitry Kozlyuk (3):
> > > net/pcap: fix format string
> > > eal/windows: add missing SPDX license tag
> > > buildtools: fix all drivers disabled on Windows
> > >
> > > Ed Czeck (2):
> > > net/ark: update packet director initial state
> > > net/ark: refactor Rx buffer recovery
> > >
> > > Elad Nachman (2):
> > > kni: support async user request
> > > kni: fix kernel deadlock with bifurcated device
> > >
> > > Feifei Wang (2):
> > > net/i40e: fix parsing packet type for NEON
> > > test/trace: fix race on collected perf data
> > >
> > > Ferruh Yigit (3):
> > > power: remove duplicated symbols from map file
> > > log/linux: make default output stderr
> > > license: fix typos
> > >
> > > Guoyang Zhou (1):
> > > net/hinic: fix crash in secondary process
> > >
> > > Haiyue Wang (1):
> > > net/ixgbe: fix Rx errors statistics for UDP checksum
> > >
> > > Harman Kalra (1):
> > > event/octeontx2: fix device reconfigure for single slot
> > >
> > > Hongbo Zheng (3):
> > > app/testpmd: fix Tx/Rx descriptor query error log
> > > net/hns3: fix FLR miss detection
> > > net/hns3: delete redundant blank line
> > >
> > > Huisong Li (11):
> > > net/hns3: fix device capabilities for copper media type
> > > net/hns3: remove unused parameter markers
> > > net/hns3: fix reporting undefined speed
> > > net/hns3: fix link update when failed to get link info
> > > net/hns3: fix flow control exception
> > > app/testpmd: fix bitmap of link speeds when force speed
> > > net/hns3: fix flow control mode
> > > net/hns3: remove redundant mailbox response
> > > net/hns3: fix DCB mode check
> > > net/hns3: fix VMDq mode check
> > > net/hns3: fix mbuf leakage
> > >
> > > Ibtisam Tariq (1):
> > > examples/vhost_crypto: remove unused short option
> > >
> > > Igor Russkikh (2):
> > > net/qede: reduce log verbosity
> > > net/qede: accept bigger RSS table
> > >
> > > Ilya Maximets (1):
> > > net/virtio: fix interrupt unregistering for listening socket
> > >
> > > Ivan Malov (5):
> > > net/sfc: fix buffer size for flow parse
> > > net: fix comment in IPv6 header
> > > net/sfc: fix error path inconsistency
> > > common/sfc_efx/base: fix indication of MAE encap support
> > > net/sfc: fix outer rule rollback on error
> > >
> > > Jiawei Wang (2):
> > > app/testpmd: fix NVGRE encap configuration
> > > net/mlx5: fix resource release for mirror flow
> > >
> > > Jiawei Zhu (1):
> > > net/mlx5: fix Rx segmented packets on mbuf starvation
> > >
> > > Jiawen Wu (3):
> > > net/txgbe: remove unused functions
> > > net/txgbe: fix Rx missed packet counter
> > > net/txgbe: update packet type
> > >
> > > John Daley (1):
> > > net/enic: fix flow initialization error handling
> > >
> > > Kalesh AP (18):
> > > net/bnxt: remove unused macro
> > > net/bnxt: fix VNIC configuration
> > > net/bnxt: fix firmware fatal error handling
> > > net/bnxt: fix FW readiness check during recovery
> > > net/bnxt: fix device readiness check
> > > net/bnxt: fix VF info allocation
> > > net/bnxt: fix HWRM and FW incompatibility handling
> > > net/bnxt: mute some failure logs
> > > app/testpmd: check MAC address query
> > > net/bnxt: fix PCI write check
> > > net/bnxt: fix link state operations
> > > net/bnxt: fix timesync when PTP is not supported
> > > net/bnxt: fix memory allocation for command response
> > > net/bnxt: fix double free in port start failure
> > > net/bnxt: fix configuring LRO
> > > net/bnxt: fix health check alarm cancellation
> > > net/bnxt: fix PTP support for Thor
> > > net/bnxt: fix ring count calculation for Thor
> > >
> > > Kevin Traynor (1):
> > > test/cmdline: fix inputs array
> > >
> > > Lance Richardson (6):
> > > net/bnxt: fix Rx buffer posting
> > > net/bnxt: fix Tx length hint threshold
> > > net/bnxt: fix handling of null flow mask
> > > test: fix TCP header initialization
> > > net/bnxt: fix Rx descriptor status
> > > net/bnxt: fix Rx queue count
> > >
> > > Leyi Rong (1):
> > > net/iavf: fix packet length parsing in AVX512
> > >
> > > Li Zhang (1):
> > > net/mlx5: fix flow actions index in cache
> > >
> > > Luc Pelletier (2):
> > > eal: fix race in control thread creation
> > > eal: fix hang in control thread creation
> > >
> > > Marvin Liu (5):
> > > vhost: fix split ring potential buffer overflow
> > > vhost: fix packed ring potential buffer overflow
> > > vhost: fix batch dequeue potential buffer overflow
> > > vhost: fix initialization of temporary header
> > > vhost: fix initialization of async temporary header
> > >
> > > Matan Azrad (4):
> > > common/mlx5/linux: add glue function to query WQ
> > > common/mlx5: add DevX command to query WQ
> > > common/mlx5: add DevX commands for queue counters
> > > vdpa/mlx5: fix virtq cleaning
> > >
> > > Min Hu (Connor) (8):
> > > net/hns3: fix MTU config complexity
> > > net/hns3: update HiSilicon copyright syntax
> > > net/hns3: fix copyright date
> > > examples/ptpclient: remove wrong comment
> > > test/bpf: fix error message
> > > doc: fix HiSilicon copyright syntax
> > > net/hns3: remove unused macros
> > > net/hns3: remove unused macro
> > >
> > > Murphy Yang (3):
> > > net/ixgbe: fix RSS RETA being reset after port start
> > > net/i40e: fix flow director config after flow validate
> > > net/i40e: fix flow director for common pctypes
> > >
> > > Natanael Copa (5):
> > > common/dpaax/caamflib: fix build with musl
> > > bus/dpaa: fix 64-bit arch detection
> > > bus/dpaa: fix build with musl
> > > net/cxgbe: remove use of uint type
> > > app/testpmd: fix build with musl
> > >
> > > Nipun Gupta (1):
> > > bus/dpaa: fix statistics reading
> > >
> > > Nithin Dabilpuram (3):
> > > vfio: do not merge contiguous areas
> > > vfio: fix DMA mapping granularity for IOVA as VA
> > > test/mem: fix page size for external memory
> > >
> > > Pallavi Kadam (1):
> > > bus/pci: skip probing some Windows NDIS devices
> > >
> > > Pavan Nikhilesh (2):
> > > test/event: fix timeout accuracy
> > > app/eventdev: fix timeout accuracy
> > >
> > > Pu Xu (1):
> > > ip_frag: fix fragmenting IPv4 packet with header option
> > >
> > > Qi Zhang (7):
> > > net/ice/base: fix payload indicator on ptype
> > > net/ice/base: fix uninitialized struct
> > > net/ice/base: cleanup filter list on error
> > > net/ice/base: fix memory allocation for MAC addresses
> > > net/iavf: fix TSO max segment size
> > > doc: fix matching versions in ice guide
> > > net/iavf: fix wrong Tx context descriptor
> > >
> > > Radha Mohan Chintakuntla (1):
> > > raw/octeontx2_dma: assign PCI device in DPI VF
> > >
> > > Raslan Darawsheh (1):
> > > ethdev: update flow item GTP QFI definition
> > >
> > > Richael Zhuang (2):
> > > test/power: add delay before checking CPU frequency
> > > test/power: round CPU frequency to check
> > >
> > > Robin Zhang (4):
> > > net/i40e: announce request queue capability in PF
> > > doc: update recommended versions for i40e
> > > net/i40e: fix lack of MAC type when set MAC address
> > > net/iavf: fix lack of MAC type when set MAC address
> > >
> > > Rohit Raj (3):
> > > net/dpaa2: fix getting link status
> > > net/dpaa: fix getting link status
> > > examples/l2fwd-crypto: fix packet length while decryption
> > >
> > > Roy Shterman (1):
> > > mem: fix freeing segments in --huge-unlink mode
> > >
> > > Satheesh Paul (1):
> > > net/octeontx2: fix VLAN filter
> > >
> > > Savinay Dharmappa (1):
> > > sched: fix traffic class oversubscription parameter
> > >
> > > Shijith Thotton (1):
> > > eventdev: fix case to initiate crypto adapter service
> > >
> > > Siwar Zitouni (1):
> > > net/ice: fix disabling promiscuous mode
> > Somnath Kotur (3):
> > > net/bnxt: fix xstats get
> > > net/bnxt: fix Rx and Tx timestamps
> > > net/bnxt: fix Tx timestamp init
> > >
> > > Stanislaw Kardach (1):
> > > test: proceed if timer subsystem already initialized
> > >
> > > Stephen Hemminger (1):
> > > kni: refactor user request processing
> > >
> > > Tal Shnaiderman (2):
> > > eal/windows: fix default thread priority
> > > eal/windows: fix return codes of pthread shim layer
> > >
> > > Tengfei Zhang (1):
> > > net/pcap: fix file descriptor leak on close
> > >
> > > Thinh Tran (1):
> > > test: fix autotest handling of skipped tests
> > >
> > > Thomas Monjalon (16):
> > > bus/pci: fix Windows kernel driver categories
> > > eal: fix comment of OS-specific header files
> > > buildtools: fix build with busybox
> > > build: detect execinfo library on Linux
> > > build: remove redundant _GNU_SOURCE definitions
> > > eal: fix build with musl
> > > net/igc: remove use of uint type
> > > event/dlb: fix header includes for musl
> > > examples/bbdev: fix header include for musl
> > > drivers: fix log level after loading
> > > app/regex: fix usage text
> > > app/testpmd: fix usage text
> > > doc: fix names of UIO drivers
> > > doc: fix build with Sphinx 4
> > > bus/pci: support I/O port operations with musl
> > > app: fix exit messages
> > >
> > > Tyler Retzlaff (1):
> > > eal: add C++ include guard for reciprocal header
> > >
> > > Vadim Podovinnikov (1):
> > > net/bonding: fix LACP system address check
> > >
> > > Venkat Duvvuru (1):
> > > net/bnxt: fix queues per VNIC
> > >
> > > Viacheslav Ovsiienko (11):
> > > net/mlx5: fix external buffer pool registration for Rx queue
> > > net/mlx5: fix metadata item validation for ingress flows
> > > net/mlx5: fix hashed list size for tunnel flow groups
> > > net/mlx5: fix UAR allocation diagnostics messages
> > > common/mlx5: add timestamp format support to DevX
> > > vdpa/mlx5: support timestamp format
> > > net/mlx5: fix Rx metadata leftovers
> > > net/mlx5: fix drop action for Direct Rules/Verbs
> > > net/mlx4: fix RSS action with null hash key
> > > net/mlx5: support timestamp format
> > > regex/mlx5: support timestamp format
> > >
> > > Wenjun Wu (2):
> > > net/ice: check some functions return
> > > net/ice: fix RSS hash update
> > >
> > > Wenwu Ma (1):
> > > net/ice: fix illegal access when removing MAC filter
> > >
> > > Wenzhuo Lu (2):
> > > net/iavf: fix crash in AVX512
> > > net/ice: fix crash in AVX512
> > >
> > > Wisam Jaddo (1):
> > > app/flow-perf: fix encap/decap actions
> > >
> > > Xiao Wang (1):
> > > vdpa/ifc: check PCI config read
> > >
> > > Xiaoyu Min (4):
> > > net/mlx5: support RSS expansion for IPv6 GRE
> > > net/mlx5: fix shared inner RSS
> > > net/mlx5: fix missing shared RSS hash types
> > > net/mlx5: fix redundant flow after RSS expansion
> > >
> > > Xiaoyun Li (2):
> > > app/testpmd: remove unnecessary UDP tunnel check
> > > net/i40e: fix IPv4 fragment offload
> > >
> > > Youri Querry (1):
> > > bus/fslmc: fix random portal hangs with qbman 5.0
> > >
> > > Yunjian Wang (3):
> > > vfio: fix API description
> > > net/mlx5: fix using flow tunnel before null check
> > > vfio: fix duplicated user mem map
> > >
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] 20.11.2 patches review and test
2021-06-10 8:53 0% ` Christian Ehrhardt
@ 2021-06-14 12:35 0% ` Xueming(Steven) Li
0 siblings, 0 replies; 200+ results
From: Xueming(Steven) Li @ 2021-06-14 12:35 UTC (permalink / raw)
To: Christian Ehrhardt
Cc: dpdk stable, dev, Abhishek Marathe, Akhil Goyal, Ali Alnubani,
benjamin.walker, David Christensen, hariprasad.govindharajan,
Hemant Agrawal, Ian Stokes, Jerin Jacob, John McNamara,
Ju-Hyoung Lee, Kevin Traynor, Luca Boccassi, Pei Zhang, pingx.yu,
qian.q.xu, Raslan Darawsheh, NBU-Contact-Thomas Monjalon,
yuan.peng, zhaoyan.chen
> -----Original Message-----
> From: Christian Ehrhardt <christian.ehrhardt@canonical.com>
> Sent: Thursday, June 10, 2021 4:54 PM
> To: Xueming(Steven) Li <xuemingl@nvidia.com>
> Cc: dpdk stable <stable@dpdk.org>; dev@dpdk.org; Abhishek Marathe <Abhishek.Marathe@microsoft.com>; Akhil Goyal
> <akhil.goyal@nxp.com>; Ali Alnubani <alialnu@nvidia.com>; benjamin.walker@intel.com; David Christensen
> <drc@linux.vnet.ibm.com>; hariprasad.govindharajan@intel.com; Hemant Agrawal <hemant.agrawal@nxp.com>; Ian Stokes
> <ian.stokes@intel.com>; Jerin Jacob <jerinj@marvell.com>; John McNamara <john.mcnamara@intel.com>; Ju-Hyoung Lee
> <juhlee@microsoft.com>; Kevin Traynor <ktraynor@redhat.com>; Luca Boccassi <bluca@debian.org>; Pei Zhang
> <pezhang@redhat.com>; pingx.yu@intel.com; qian.q.xu@intel.com; Raslan Darawsheh <rasland@nvidia.com>; NBU-Contact-Thomas
> Monjalon <thomas@monjalon.net>; yuan.peng@intel.com; zhaoyan.chen@intel.com
> Subject: Re: [dpdk-dev] 20.11.2 patches review and test
>
> On Wed, Jun 9, 2021 at 1:56 PM Xueming(Steven) Li <xuemingl@nvidia.com> wrote:
> >
> > Hi all,
> >
> > Thanks Kevin's feedback, there are some patches missing between v21.05-rc1..v21.05.
> > Will roll out rc2 to include them all, please hold test and verification.
>
> Hi,
> chances are quite high that nowadays SLES15-SP3 will be broken for
> 20.11.2 as well.
> The fix isn't final yet (I had an early one applied and it failed for other SLES releases).
> I'd recommend watching the thread "[PATCH] kni: fix compilation on SLES15-SP3"
> and once concluded pull that into your next RC as well.
Sure, thanks for reminding!
>
> > Best Regards,
> > Xueming
> >
> >
> > > -----Original Message-----
> > > From: Xueming(Steven) Li <xuemingl@nvidia.com>
> > > Sent: Tuesday, June 1, 2021 3:55 PM
> > > Cc: dev@dpdk.org; Abhishek Marathe <Abhishek.Marathe@microsoft.com>;
> > > Akhil Goyal <akhil.goyal@nxp.com>; Ali Alnubani
> > > <alialnu@nvidia.com>; benjamin.walker@intel.com; David Christensen
> > > <drc@linux.vnet.ibm.com>; hariprasad.govindharajan@intel.com; Hemant
> > > Agrawal <hemant.agrawal@nxp.com>; Ian Stokes <ian.stokes@intel.com>;
> > > Jerin Jacob <jerinj@marvell.com>; John McNamara
> > > <john.mcnamara@intel.com>; Ju-Hyoung Lee <juhlee@microsoft.com>;
> > > Kevin Traynor <ktraynor@redhat.com>; Luca Boccassi
> > > <bluca@debian.org>; Pei Zhang <pezhang@redhat.com>;
> > > pingx.yu@intel.com; qian.q.xu@intel.com; Raslan Darawsheh
> > > <rasland@nvidia.com>; NBU-Contact-Thomas Monjalon
> > > <thomas@monjalon.net>; yuan.peng@intel.com; zhaoyan.chen@intel.com;
> > > Xueming(Steven) Li <xuemingl@nvidia.com>
> > > Subject: 20.11.2 patches review and test
> > >
> > > Hi all,
> > >
> > > Here is a list of patches targeted for stable release 20.11.2.
> > >
> > > The planned date for the final release is 15th June.
> > >
> > > Please help with testing and validation of your use cases and report
> > > any issues/results with reply-all to this mail. For the final release the fixes and reported validations will be added to the release
> notes.
> > >
> > > A release candidate tarball can be found at:
> > >
> > > https://dpdk.org/browse/dpdk-stable/tag/?id=v20.11.2-rc1
> > >
> > > These patches are located at branch 20.11 of dpdk-stable repo:
> > > https://dpdk.org/browse/dpdk-stable/
> > >
> > >
> > > Thanks.
> > >
> > > Xueming Li <xuemingl@nvidia.com>
> > >
> > > ---
> > > Ajit Khaparde (3):
> > > net/bnxt: fix RSS context cleanup
> > > net/bnxt: check kvargs parsing
> > > net/bnxt: fix resource cleanup
> > >
> > > Alvin Zhang (7):
> > > net/ice: fix VLAN filter with PF
> > > net/i40e: fix input set field mask
> > > net/igc: fix Rx RSS hash offload capability
> > > net/igc: fix Rx error counter for bad length
> > > net/e1000: fix Rx error counter for bad length
> > > net/e1000: fix max Rx packet size
> > > net/igc: fix Rx packet size
> > >
> > > Anatoly Burakov (2):
> > > fbarray: fix log message on truncation error
> > > power: do not skip saving original P-state governor
> > >
> > > Andrew Boyer (1):
> > > net/ionic: fix completion type in lif init
> > >
> > > Andrew Rybchenko (3):
> > > net/failsafe: fix RSS hash offload reporting
> > > net/failsafe: report minimum and maximum MTU
> > > common/sfc_efx: remove GENEVE from supported tunnels
> > >
> > > Ankur Dwivedi (1):
> > > crypto/octeontx: fix session-less mode
> > >
> > > Apeksha Gupta (1):
> > > examples/l2fwd-crypto: skip masked devices
> > >
> > > Arek Kusztal (1):
> > > crypto/qat: fix offset for out-of-place scatter-gather
> > >
> > > Beilei Xing (1):
> > > net/i40evf: fix packet loss for X722
> > >
> > > Bruce Richardson (1):
> > > build: exclude meson files from examples installation
> > >
> > > Chenbo Xia (1):
> > > examples/vhost: check memory table query
> > >
> > > Chengchang Tang (15):
> > > net/hns3: fix HW buffer size on MTU update
> > > net/hns3: fix processing Tx offload flags
> > > net/hns3: fix Tx checksum for UDP packets with special port
> > > net/hns3: fix long task queue pairs reset time
> > > ethdev: validate input in module EEPROM dump
> > > ethdev: validate input in register info
> > > ethdev: validate input in EEPROM info
> > > net/hns3: fix rollback after setting PVID failure
> > > net/hns3: fix timing in resetting queues
> > > net/hns3: fix queue state when concurrent with reset
> > > net/hns3: fix configure FEC when concurrent with reset
> > > net/hns3: fix use of command status enumeration
> > > examples: add eal cleanup to examples
> > > net/bonding: fix adding itself as its slave
> > > net/hns3: fix timing in mailbox
> > >
> > > Chengwen Feng (15):
> > > net/hns3: fix flow counter value
> > > net/hns3: fix VF mailbox head field
> > > net/hns3: support get device version when dump register
> > > net/hns3: fix some packet types
> > > net/hns3: fix missing outer L4 UDP flag for VXLAN
> > > net/hns3: remove VLAN/QinQ ptypes from support list
> > > test: check thread creation
> > > common/dpaax: fix possible null pointer access
> > > examples/ethtool: remove unused parsing
> > > net/hns3: fix flow director lock
> > > net/e1000/base: fix timeout for shadow RAM write
> > > net/hns3: fix setting default MAC address in bonding of VF
> > > net/hns3: fix possible mismatched response of mailbox
> > > net/hns3: fix VF handling LSC event in secondary process
> > > net/hns3: fix verification of NEON support
> > >
> > > Ciara Loftus (1):
> > > net/af_xdp: fix error handling during Rx queue setup
> > >
> > > Conor Walsh (1):
> > > examples/l3fwd: fix LPM IPv6 subnets
> > >
> > > Cristian Dumitrescu (3):
> > > table: fix actions with different data size
> > > pipeline: fix instruction translation
> > > pipeline: fix endianness conversions
> > >
> > > Dapeng Yu (3):
> > > net/igc: remove MTU setting limitation
> > > net/e1000: remove MTU setting limitation
> > > examples/packet_ordering: fix port configuration
> > >
> > > David Harton (1):
> > > net/ena: fix releasing Tx ring mbufs
> > >
> > > David Marchand (8):
> > > doc: fix sphinx rtd theme import in GHA
> > > service: clean references to removed symbol
> > > eal: fix evaluation of log level option
> > > ci: hook to GitHub Actions
> > > ci: enable v21 ABI checks
> > > ci: fix package installation in GitHub Actions
> > > ci: ignore APT update failure in GitHub Actions
> > > ci: catch coredumps
> > >
> > > Dekel Peled (1):
> > > common/mlx5: fix DevX read output buffer size
> > >
> > > Dmitry Kozlyuk (3):
> > > net/pcap: fix format string
> > > eal/windows: add missing SPDX license tag
> > > buildtools: fix all drivers disabled on Windows
> > >
> > > Ed Czeck (2):
> > > net/ark: update packet director initial state
> > > net/ark: refactor Rx buffer recovery
> > >
> > > Elad Nachman (2):
> > > kni: support async user request
> > > kni: fix kernel deadlock with bifurcated device
> > >
> > > Feifei Wang (2):
> > > net/i40e: fix parsing packet type for NEON
> > > test/trace: fix race on collected perf data
> > >
> > > Ferruh Yigit (3):
> > > power: remove duplicated symbols from map file
> > > log/linux: make default output stderr
> > > license: fix typos
> > >
> > > Guoyang Zhou (1):
> > > net/hinic: fix crash in secondary process
> > >
> > > Haiyue Wang (1):
> > > net/ixgbe: fix Rx errors statistics for UDP checksum
> > >
> > > Harman Kalra (1):
> > > event/octeontx2: fix device reconfigure for single slot
> > >
> > > Hongbo Zheng (3):
> > > app/testpmd: fix Tx/Rx descriptor query error log
> > > net/hns3: fix FLR miss detection
> > > net/hns3: delete redundant blank line
> > >
> > > Huisong Li (11):
> > > net/hns3: fix device capabilities for copper media type
> > > net/hns3: remove unused parameter markers
> > > net/hns3: fix reporting undefined speed
> > > net/hns3: fix link update when failed to get link info
> > > net/hns3: fix flow control exception
> > > app/testpmd: fix bitmap of link speeds when force speed
> > > net/hns3: fix flow control mode
> > > net/hns3: remove redundant mailbox response
> > > net/hns3: fix DCB mode check
> > > net/hns3: fix VMDq mode check
> > > net/hns3: fix mbuf leakage
> > >
> > > Ibtisam Tariq (1):
> > > examples/vhost_crypto: remove unused short option
> > >
> > > Igor Russkikh (2):
> > > net/qede: reduce log verbosity
> > > net/qede: accept bigger RSS table
> > >
> > > Ilya Maximets (1):
> > > net/virtio: fix interrupt unregistering for listening socket
> > >
> > > Ivan Malov (5):
> > > net/sfc: fix buffer size for flow parse
> > > net: fix comment in IPv6 header
> > > net/sfc: fix error path inconsistency
> > > common/sfc_efx/base: fix indication of MAE encap support
> > > net/sfc: fix outer rule rollback on error
> > >
> > > Jiawei Wang (2):
> > > app/testpmd: fix NVGRE encap configuration
> > > net/mlx5: fix resource release for mirror flow
> > >
> > > Jiawei Zhu (1):
> > > net/mlx5: fix Rx segmented packets on mbuf starvation
> > >
> > > Jiawen Wu (3):
> > > net/txgbe: remove unused functions
> > > net/txgbe: fix Rx missed packet counter
> > > net/txgbe: update packet type
> > >
> > > John Daley (1):
> > > net/enic: fix flow initialization error handling
> > >
> > > Kalesh AP (18):
> > > net/bnxt: remove unused macro
> > > net/bnxt: fix VNIC configuration
> > > net/bnxt: fix firmware fatal error handling
> > > net/bnxt: fix FW readiness check during recovery
> > > net/bnxt: fix device readiness check
> > > net/bnxt: fix VF info allocation
> > > net/bnxt: fix HWRM and FW incompatibility handling
> > > net/bnxt: mute some failure logs
> > > app/testpmd: check MAC address query
> > > net/bnxt: fix PCI write check
> > > net/bnxt: fix link state operations
> > > net/bnxt: fix timesync when PTP is not supported
> > > net/bnxt: fix memory allocation for command response
> > > net/bnxt: fix double free in port start failure
> > > net/bnxt: fix configuring LRO
> > > net/bnxt: fix health check alarm cancellation
> > > net/bnxt: fix PTP support for Thor
> > > net/bnxt: fix ring count calculation for Thor
> > >
> > > Kevin Traynor (1):
> > > test/cmdline: fix inputs array
> > >
> > > Lance Richardson (6):
> > > net/bnxt: fix Rx buffer posting
> > > net/bnxt: fix Tx length hint threshold
> > > net/bnxt: fix handling of null flow mask
> > > test: fix TCP header initialization
> > > net/bnxt: fix Rx descriptor status
> > > net/bnxt: fix Rx queue count
> > >
> > > Leyi Rong (1):
> > > net/iavf: fix packet length parsing in AVX512
> > >
> > > Li Zhang (1):
> > > net/mlx5: fix flow actions index in cache
> > >
> > > Luc Pelletier (2):
> > > eal: fix race in control thread creation
> > > eal: fix hang in control thread creation
> > >
> > > Marvin Liu (5):
> > > vhost: fix split ring potential buffer overflow
> > > vhost: fix packed ring potential buffer overflow
> > > vhost: fix batch dequeue potential buffer overflow
> > > vhost: fix initialization of temporary header
> > > vhost: fix initialization of async temporary header
> > >
> > > Matan Azrad (4):
> > > common/mlx5/linux: add glue function to query WQ
> > > common/mlx5: add DevX command to query WQ
> > > common/mlx5: add DevX commands for queue counters
> > > vdpa/mlx5: fix virtq cleaning
> > >
> > > Min Hu (Connor) (8):
> > > net/hns3: fix MTU config complexity
> > > net/hns3: update HiSilicon copyright syntax
> > > net/hns3: fix copyright date
> > > examples/ptpclient: remove wrong comment
> > > test/bpf: fix error message
> > > doc: fix HiSilicon copyright syntax
> > > net/hns3: remove unused macros
> > > net/hns3: remove unused macro
> > >
> > > Murphy Yang (3):
> > > net/ixgbe: fix RSS RETA being reset after port start
> > > net/i40e: fix flow director config after flow validate
> > > net/i40e: fix flow director for common pctypes
> > >
> > > Natanael Copa (5):
> > > common/dpaax/caamflib: fix build with musl
> > > bus/dpaa: fix 64-bit arch detection
> > > bus/dpaa: fix build with musl
> > > net/cxgbe: remove use of uint type
> > > app/testpmd: fix build with musl
> > >
> > > Nipun Gupta (1):
> > > bus/dpaa: fix statistics reading
> > >
> > > Nithin Dabilpuram (3):
> > > vfio: do not merge contiguous areas
> > > vfio: fix DMA mapping granularity for IOVA as VA
> > > test/mem: fix page size for external memory
> > >
> > > Pallavi Kadam (1):
> > > bus/pci: skip probing some Windows NDIS devices
> > >
> > > Pavan Nikhilesh (2):
> > > test/event: fix timeout accuracy
> > > app/eventdev: fix timeout accuracy
> > >
> > > Pu Xu (1):
> > > ip_frag: fix fragmenting IPv4 packet with header option
> > >
> > > Qi Zhang (7):
> > > net/ice/base: fix payload indicator on ptype
> > > net/ice/base: fix uninitialized struct
> > > net/ice/base: cleanup filter list on error
> > > net/ice/base: fix memory allocation for MAC addresses
> > > net/iavf: fix TSO max segment size
> > > doc: fix matching versions in ice guide
> > > net/iavf: fix wrong Tx context descriptor
> > >
> > > Radha Mohan Chintakuntla (1):
> > > raw/octeontx2_dma: assign PCI device in DPI VF
> > >
> > > Raslan Darawsheh (1):
> > > ethdev: update flow item GTP QFI definition
> > >
> > > Richael Zhuang (2):
> > > test/power: add delay before checking CPU frequency
> > > test/power: round CPU frequency to check
> > >
> > > Robin Zhang (4):
> > > net/i40e: announce request queue capability in PF
> > > doc: update recommended versions for i40e
> > > net/i40e: fix lack of MAC type when set MAC address
> > > net/iavf: fix lack of MAC type when set MAC address
> > >
> > > Rohit Raj (3):
> > > net/dpaa2: fix getting link status
> > > net/dpaa: fix getting link status
> > > examples/l2fwd-crypto: fix packet length while decryption
> > >
> > > Roy Shterman (1):
> > > mem: fix freeing segments in --huge-unlink mode
> > >
> > > Satheesh Paul (1):
> > > net/octeontx2: fix VLAN filter
> > >
> > > Savinay Dharmappa (1):
> > > sched: fix traffic class oversubscription parameter
> > >
> > > Shijith Thotton (1):
> > > eventdev: fix case to initiate crypto adapter service
> > >
> > > Siwar Zitouni (1):
> > > net/ice: fix disabling promiscuous mode Somnath Kotur (3):
> > > net/bnxt: fix xstats get
> > > net/bnxt: fix Rx and Tx timestamps
> > > net/bnxt: fix Tx timestamp init
> > >
> > > Stanislaw Kardach (1):
> > > test: proceed if timer subsystem already initialized
> > >
> > > Stephen Hemminger (1):
> > > kni: refactor user request processing
> > >
> > > Tal Shnaiderman (2):
> > > eal/windows: fix default thread priority
> > > eal/windows: fix return codes of pthread shim layer
> > >
> > > Tengfei Zhang (1):
> > > net/pcap: fix file descriptor leak on close
> > >
> > > Thinh Tran (1):
> > > test: fix autotest handling of skipped tests
> > >
> > > Thomas Monjalon (16):
> > > bus/pci: fix Windows kernel driver categories
> > > eal: fix comment of OS-specific header files
> > > buildtools: fix build with busybox
> > > build: detect execinfo library on Linux
> > > build: remove redundant _GNU_SOURCE definitions
> > > eal: fix build with musl
> > > net/igc: remove use of uint type
> > > event/dlb: fix header includes for musl
> > > examples/bbdev: fix header include for musl
> > > drivers: fix log level after loading
> > > app/regex: fix usage text
> > > app/testpmd: fix usage text
> > > doc: fix names of UIO drivers
> > > doc: fix build with Sphinx 4
> > > bus/pci: support I/O port operations with musl
> > > app: fix exit messages
> > >
> > > Tyler Retzlaff (1):
> > > eal: add C++ include guard for reciprocal header
> > >
> > > Vadim Podovinnikov (1):
> > > net/bonding: fix LACP system address check
> > >
> > > Venkat Duvvuru (1):
> > > net/bnxt: fix queues per VNIC
> > >
> > > Viacheslav Ovsiienko (11):
> > > net/mlx5: fix external buffer pool registration for Rx queue
> > > net/mlx5: fix metadata item validation for ingress flows
> > > net/mlx5: fix hashed list size for tunnel flow groups
> > > net/mlx5: fix UAR allocation diagnostics messages
> > > common/mlx5: add timestamp format support to DevX
> > > vdpa/mlx5: support timestamp format
> > > net/mlx5: fix Rx metadata leftovers
> > > net/mlx5: fix drop action for Direct Rules/Verbs
> > > net/mlx4: fix RSS action with null hash key
> > > net/mlx5: support timestamp format
> > > regex/mlx5: support timestamp format
> > >
> > > Wenjun Wu (2):
> > > net/ice: check some functions return
> > > net/ice: fix RSS hash update
> > >
> > > Wenwu Ma (1):
> > > net/ice: fix illegal access when removing MAC filter
> > >
> > > Wenzhuo Lu (2):
> > > net/iavf: fix crash in AVX512
> > > net/ice: fix crash in AVX512
> > >
> > > Wisam Jaddo (1):
> > > app/flow-perf: fix encap/decap actions
> > >
> > > Xiao Wang (1):
> > > vdpa/ifc: check PCI config read
> > >
> > > Xiaoyu Min (4):
> > > net/mlx5: support RSS expansion for IPv6 GRE
> > > net/mlx5: fix shared inner RSS
> > > net/mlx5: fix missing shared RSS hash types
> > > net/mlx5: fix redundant flow after RSS expansion
> > >
> > > Xiaoyun Li (2):
> > > app/testpmd: remove unnecessary UDP tunnel check
> > > net/i40e: fix IPv4 fragment offload
> > >
> > > Youri Querry (1):
> > > bus/fslmc: fix random portal hangs with qbman 5.0
> > >
> > > Yunjian Wang (3):
> > > vfio: fix API description
> > > net/mlx5: fix using flow tunnel before null check
> > > vfio: fix duplicated user mem map
>
>
>
> --
> Christian Ehrhardt
> Staff Engineer, Ubuntu Server
> Canonical Ltd
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH v9 07/10] eal: implement functions for mutex management
2021-06-09 22:37 0% ` Dmitry Kozlyuk
@ 2021-06-12 2:39 0% ` Narcisa Ana Maria Vasile
0 siblings, 0 replies; 200+ results
From: Narcisa Ana Maria Vasile @ 2021-06-12 2:39 UTC (permalink / raw)
To: Dmitry Kozlyuk
Cc: dev, thomas, khot, navasile, dmitrym, roretzla, talshn, ocardona,
bruce.richardson, david.marchand, pallavi.kadam
On Thu, Jun 10, 2021 at 01:37:17AM +0300, Dmitry Kozlyuk wrote:
> 2021-06-09 02:04 (UTC+0300), Dmitry Kozlyuk:
> > 2021-06-04 16:44 (UTC-0700), Narcisa Ana Maria Vasile:
> > [...]
> > > diff --git a/lib/eal/include/rte_thread_types.h b/lib/eal/include/rte_thread_types.h
> > > index d67b24a563..7bb0d2948c 100644
> > > --- a/lib/eal/include/rte_thread_types.h
> > > +++ b/lib/eal/include/rte_thread_types.h
> > > @@ -7,4 +7,8 @@
> > >
> > > #include <pthread.h>
> > >
> > > +#define RTE_THREAD_MUTEX_INITIALIZER PTHREAD_MUTEX_INITIALIZER
> > > +
> > > +typedef pthread_mutex_t rte_thread_mutex_t;
> > > +
> > > #endif /* _RTE_THREAD_TYPES_H_ */
> > > diff --git a/lib/eal/windows/include/rte_windows_thread_types.h b/lib/eal/windows/include/rte_windows_thread_types.h
> > > index 60e6d94553..c6c8502bfb 100644
> > > --- a/lib/eal/windows/include/rte_windows_thread_types.h
> > > +++ b/lib/eal/windows/include/rte_windows_thread_types.h
> > > @@ -7,4 +7,13 @@
> > >
> > > #include <rte_windows.h>
> > >
> > > +#define WINDOWS_MUTEX_INITIALIZER (void*)-1
> > > +#define RTE_THREAD_MUTEX_INITIALIZER {WINDOWS_MUTEX_INITIALIZER}
> > > +
> > > +struct thread_mutex_t {
> > > + void* mutex_id;
> > > +};
> > > +
> > > +typedef struct thread_mutex_t rte_thread_mutex_t;
> > > +
> > > #endif /* _RTE_THREAD_TYPES_H_ */
> >
> > In previous patches rte_thread content was made opaque and of equal size
> > for pthread (most implementations) and non-pthread variant.
> > AFAIU, we agree on the requirement of compatible ABI between variants,
> > that is, a compiled app can work with any threading variant of DPDK.
> > Above definition of `rte_thread_mutex_t` does not satisfy it.
> > Or do we only promise API compatibility?
> > This is the most important question now.
>
> From Windows community call 2021-06-10, for everyone's information.
>
> 1. Yes, binary compatibility is a requirement.
>
> 2. Static mutex initializer for Windows is tricky (an old topic).
> This patch proposes `rte_mutex` to hold a pointer to actual mutex
> and use NULL as static initializer, then allocate on first use.
> At the same time we want to use the same initializer for pthread variant.
> This means it would also need indirection, allocation, and tricky logic.
>
> My opinion:
>
> New threading API can just be without static initilizer.
> All it usages in DPDK could be converted to dynamic initialization
> either in appropriate function or using `RTE_INIT`.
> Maybe create a convenient macro to declare a static mutex and its
> initialization code, what do others think?
>
> RTE_STATIC_MUTEX(private_lock)
>
> Expanding to:
>
> static RTE_DECLARE_MUTEX(private_lock)
> RTE_DEFINE_MUTEX(private_lock)
>
>
> Expanding to:
>
> static rte_mutex private_lock;
>
> RTE_INIT(__rte_private_lock_init)
> {
> RTE_VERIFY(rte_thread_mutex_init(&private_lock));
> }
>
> As a bonus it removes the need of `rte_*_thread_types.h`.
Thank you Dmitry, I think this is the best and most elegant solution.
I will use a pointer to represent the mutex:
typedef struct rte_thread_mutex_tag {
void* mutex_id;
} rte_thread_mutex;
..and use the macro for static initializations as you described.
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [RFC v3 0/6] Add mdev (Mediated device) support in DPDK
2021-06-01 3:06 2% ` [dpdk-dev] [RFC v3 0/6] Add mdev (Mediated device) support in DPDK Chenbo Xia
@ 2021-06-11 7:15 0% ` Thomas Monjalon
2021-06-15 2:49 0% ` Xia, Chenbo
0 siblings, 1 reply; 200+ results
From: Thomas Monjalon @ 2021-06-11 7:15 UTC (permalink / raw)
To: Chenbo Xia
Cc: dev, cunming.liang, jingjing.wu, anatoly.burakov, ferruh.yigit,
mdr, nhorman, bruce.richardson, david.marchand, stephen,
konstantin.ananyev
01/06/2021 05:06, Chenbo Xia:
> Hi everyone,
>
> This is a draft implementation of the mdev (Mediated device [1])
> support in DPDK PCI bus driver. Mdev is a way to virtualize devices
> in Linux kernel. Based on the device-api (mdev_type/device_api),
> there could be different types of mdev devices (e.g. vfio-pci).
Please could you illustrate with an usage of mdev in DPDK?
What does it enable which is not possible today?
> In this patchset, the PCI bus driver is extended to support scanning
> and probing the mdev devices whose device-api is "vfio-pci".
>
> +---------+
> | PCI bus |
> +----+----+
> |
> +--------+-------+-------+--------+
> | | | |
> Physical PCI devices ... Mediated PCI devices ...
>
> The first four patches in this patchset are mainly preparation of mdev
> bus support. The left two patches are the key implementation of mdev bus.
>
> The implementation of mdev bus in DPDK has several options:
>
> 1: Embed mdev bus in current pci bus
>
> This patchset takes this option for an example. Mdev has several
> device types: pci/platform/amba/ccw/ap. DPDK currently only cares
> pci devices in all mdev device types so we could embed the mdev bus
> into current pci bus. Then pci bus with mdev support will scan/plug/
> unplug/.. not only normal pci devices but also mediated pci devices.
I think it is a different bus.
It would be cleaner to not touch the PCI bus.
Having a separate bus will allow an easy way to identify a device
with the new generic devargs syntax, example:
bus=mdev,uuid=XXX
or more complex:
bus=mdev,uuid=XXX/class=crypto/driver=qat,foo=bar
> 2: A new mdev bus that scans mediated pci devices and probes mdev driver to
> plug-in pci devices to pci bus
>
> If we took this option, a new mdev bus will be implemented to scan
> mediated pci devices and a new mdev driver for pci devices will be
> implemented in pci bus to plug-in mediated pci devices to pci bus.
>
> Our RFC v1 takes this option:
> http://patchwork.dpdk.org/project/dpdk/cover/20190403071844.21126-1-tiwei.bie@intel.com/
>
> Note that: for either option 1 or 2, device drivers do not know the
> implementation difference but only use structs/functions exposed by
> pci bus. Mediated pci devices are different from normal pci devices
> on: 1. Mediated pci devices use UUID as address but normal ones use BDF.
> 2. Mediated pci devices may have some capabilities that normal pci
> devices do not have. For example, mediated pci devices could have
> regions that have sparse mmap capability, which allows a region to have
> multiple mmap areas. Another example is mediated pci devices may have
> regions/part of regions not mmaped but need to access them. Above
> difference will change the current ABI (i.e., struct rte_pci_device).
> Please check 5th and 6th patch for details.
>
> 3. A brand new mdev bus that does everything
>
> This option will implement a new and standalone mdev bus. This option
> does not need any changes in current pci bus but only needs some shared
> code (linux vfio part) in pci bus. Drivers of devices that support mdev
> will register itself as a mdev driver and do not rely on pci bus anymore.
> This option, IMHO, will make the code clean. The only potential problem
> may be code duplication, which could be solved by making code of linux
> vfio part of pci bus common and shared.
Yes I prefer this third option.
We can find an elegant way of sharing some VFIO code between buses.
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH] net: introduce IPv4 ihl and version fields
2021-06-10 4:10 0% ` Gregory Etelson
@ 2021-06-10 9:22 4% ` Olivier Matz
2021-06-14 16:36 4% ` Andrew Rybchenko
0 siblings, 1 reply; 200+ results
From: Olivier Matz @ 2021-06-10 9:22 UTC (permalink / raw)
To: Gregory Etelson
Cc: Iremonger, Bernard, Morten Brørup, dev, Matan Azrad,
Ori Kam, Raslan Darawsheh, Asaf Penso
Hi Gregory,
On Thu, Jun 10, 2021 at 04:10:25AM +0000, Gregory Etelson wrote:
> Hello,
>
> There was no activity that patch for a long time.
> The patch is marked as failed, but we verified failed tests and concluded that the failures can be ignored.
> https://patchwork.dpdk.org/project/dpdk/patch/20210527152858.13312-1-getelson@nvidia.com/
> How should I proceed with this case ?
> Please advise.
>
I like the idea of this patch: to me it is more convenient to access to
these fields with a bitfield. I don't see a problem about using
bitfields here, glibc or FreeBSD netinet/ip.h are doing the same.
However, as stated previously, this patch breaks the initialization API.
The DPDK ABI/API policy is described here:
http://doc.dpdk.org/guides/contributing/abi_policy.html#the-dpdk-abi-policy
From this document:
The API should only be changed for significant reasons, such as
performance enhancements. API breakages due to changes such as
reorganizing public structure fields for aesthetic or readability
purposes should be avoided.
So to follow the project policy, I think we should reject this path.
Regards,
Olivier
^ permalink raw reply [relevance 4%]
* Re: [dpdk-dev] 20.11.2 patches review and test
2021-06-09 11:56 0% ` Xueming(Steven) Li
@ 2021-06-10 8:53 0% ` Christian Ehrhardt
2021-06-14 12:35 0% ` Xueming(Steven) Li
0 siblings, 1 reply; 200+ results
From: Christian Ehrhardt @ 2021-06-10 8:53 UTC (permalink / raw)
To: Xueming(Steven) Li
Cc: dpdk stable, dev, Abhishek Marathe, Akhil Goyal, Ali Alnubani,
benjamin.walker, David Christensen, hariprasad.govindharajan,
Hemant Agrawal, Ian Stokes, Jerin Jacob, John McNamara,
Ju-Hyoung Lee, Kevin Traynor, Luca Boccassi, Pei Zhang, pingx.yu,
qian.q.xu, Raslan Darawsheh, NBU-Contact-Thomas Monjalon,
yuan.peng, zhaoyan.chen
On Wed, Jun 9, 2021 at 1:56 PM Xueming(Steven) Li <xuemingl@nvidia.com> wrote:
>
> Hi all,
>
> Thanks Kevin's feedback, there are some patches missing between v21.05-rc1..v21.05.
> Will roll out rc2 to include them all, please hold test and verification.
Hi,
chances are quite high that nowadays SLES15-SP3 will be broken for
20.11.2 as well.
The fix isn't final yet (I had an early one applied and it failed for
other SLES releases).
I'd recommend watching the thread "[PATCH] kni: fix compilation on SLES15-SP3"
and once concluded pull that into your next RC as well.
> Best Regards,
> Xueming
>
>
> > -----Original Message-----
> > From: Xueming(Steven) Li <xuemingl@nvidia.com>
> > Sent: Tuesday, June 1, 2021 3:55 PM
> > Cc: dev@dpdk.org; Abhishek Marathe <Abhishek.Marathe@microsoft.com>; Akhil Goyal <akhil.goyal@nxp.com>; Ali Alnubani
> > <alialnu@nvidia.com>; benjamin.walker@intel.com; David Christensen <drc@linux.vnet.ibm.com>;
> > hariprasad.govindharajan@intel.com; Hemant Agrawal <hemant.agrawal@nxp.com>; Ian Stokes <ian.stokes@intel.com>; Jerin Jacob
> > <jerinj@marvell.com>; John McNamara <john.mcnamara@intel.com>; Ju-Hyoung Lee <juhlee@microsoft.com>; Kevin Traynor
> > <ktraynor@redhat.com>; Luca Boccassi <bluca@debian.org>; Pei Zhang <pezhang@redhat.com>; pingx.yu@intel.com;
> > qian.q.xu@intel.com; Raslan Darawsheh <rasland@nvidia.com>; NBU-Contact-Thomas Monjalon <thomas@monjalon.net>;
> > yuan.peng@intel.com; zhaoyan.chen@intel.com; Xueming(Steven) Li <xuemingl@nvidia.com>
> > Subject: 20.11.2 patches review and test
> >
> > Hi all,
> >
> > Here is a list of patches targeted for stable release 20.11.2.
> >
> > The planned date for the final release is 15th June.
> >
> > Please help with testing and validation of your use cases and report any issues/results with reply-all to this mail. For the final release
> > the fixes and reported validations will be added to the release notes.
> >
> > A release candidate tarball can be found at:
> >
> > https://dpdk.org/browse/dpdk-stable/tag/?id=v20.11.2-rc1
> >
> > These patches are located at branch 20.11 of dpdk-stable repo:
> > https://dpdk.org/browse/dpdk-stable/
> >
> >
> > Thanks.
> >
> > Xueming Li <xuemingl@nvidia.com>
> >
> > ---
> > Ajit Khaparde (3):
> > net/bnxt: fix RSS context cleanup
> > net/bnxt: check kvargs parsing
> > net/bnxt: fix resource cleanup
> >
> > Alvin Zhang (7):
> > net/ice: fix VLAN filter with PF
> > net/i40e: fix input set field mask
> > net/igc: fix Rx RSS hash offload capability
> > net/igc: fix Rx error counter for bad length
> > net/e1000: fix Rx error counter for bad length
> > net/e1000: fix max Rx packet size
> > net/igc: fix Rx packet size
> >
> > Anatoly Burakov (2):
> > fbarray: fix log message on truncation error
> > power: do not skip saving original P-state governor
> >
> > Andrew Boyer (1):
> > net/ionic: fix completion type in lif init
> >
> > Andrew Rybchenko (3):
> > net/failsafe: fix RSS hash offload reporting
> > net/failsafe: report minimum and maximum MTU
> > common/sfc_efx: remove GENEVE from supported tunnels
> >
> > Ankur Dwivedi (1):
> > crypto/octeontx: fix session-less mode
> >
> > Apeksha Gupta (1):
> > examples/l2fwd-crypto: skip masked devices
> >
> > Arek Kusztal (1):
> > crypto/qat: fix offset for out-of-place scatter-gather
> >
> > Beilei Xing (1):
> > net/i40evf: fix packet loss for X722
> >
> > Bruce Richardson (1):
> > build: exclude meson files from examples installation
> >
> > Chenbo Xia (1):
> > examples/vhost: check memory table query
> >
> > Chengchang Tang (15):
> > net/hns3: fix HW buffer size on MTU update
> > net/hns3: fix processing Tx offload flags
> > net/hns3: fix Tx checksum for UDP packets with special port
> > net/hns3: fix long task queue pairs reset time
> > ethdev: validate input in module EEPROM dump
> > ethdev: validate input in register info
> > ethdev: validate input in EEPROM info
> > net/hns3: fix rollback after setting PVID failure
> > net/hns3: fix timing in resetting queues
> > net/hns3: fix queue state when concurrent with reset
> > net/hns3: fix configure FEC when concurrent with reset
> > net/hns3: fix use of command status enumeration
> > examples: add eal cleanup to examples
> > net/bonding: fix adding itself as its slave
> > net/hns3: fix timing in mailbox
> >
> > Chengwen Feng (15):
> > net/hns3: fix flow counter value
> > net/hns3: fix VF mailbox head field
> > net/hns3: support get device version when dump register
> > net/hns3: fix some packet types
> > net/hns3: fix missing outer L4 UDP flag for VXLAN
> > net/hns3: remove VLAN/QinQ ptypes from support list
> > test: check thread creation
> > common/dpaax: fix possible null pointer access
> > examples/ethtool: remove unused parsing
> > net/hns3: fix flow director lock
> > net/e1000/base: fix timeout for shadow RAM write
> > net/hns3: fix setting default MAC address in bonding of VF
> > net/hns3: fix possible mismatched response of mailbox
> > net/hns3: fix VF handling LSC event in secondary process
> > net/hns3: fix verification of NEON support
> >
> > Ciara Loftus (1):
> > net/af_xdp: fix error handling during Rx queue setup
> >
> > Conor Walsh (1):
> > examples/l3fwd: fix LPM IPv6 subnets
> >
> > Cristian Dumitrescu (3):
> > table: fix actions with different data size
> > pipeline: fix instruction translation
> > pipeline: fix endianness conversions
> >
> > Dapeng Yu (3):
> > net/igc: remove MTU setting limitation
> > net/e1000: remove MTU setting limitation
> > examples/packet_ordering: fix port configuration
> >
> > David Harton (1):
> > net/ena: fix releasing Tx ring mbufs
> >
> > David Marchand (8):
> > doc: fix sphinx rtd theme import in GHA
> > service: clean references to removed symbol
> > eal: fix evaluation of log level option
> > ci: hook to GitHub Actions
> > ci: enable v21 ABI checks
> > ci: fix package installation in GitHub Actions
> > ci: ignore APT update failure in GitHub Actions
> > ci: catch coredumps
> >
> > Dekel Peled (1):
> > common/mlx5: fix DevX read output buffer size
> >
> > Dmitry Kozlyuk (3):
> > net/pcap: fix format string
> > eal/windows: add missing SPDX license tag
> > buildtools: fix all drivers disabled on Windows
> >
> > Ed Czeck (2):
> > net/ark: update packet director initial state
> > net/ark: refactor Rx buffer recovery
> >
> > Elad Nachman (2):
> > kni: support async user request
> > kni: fix kernel deadlock with bifurcated device
> >
> > Feifei Wang (2):
> > net/i40e: fix parsing packet type for NEON
> > test/trace: fix race on collected perf data
> >
> > Ferruh Yigit (3):
> > power: remove duplicated symbols from map file
> > log/linux: make default output stderr
> > license: fix typos
> >
> > Guoyang Zhou (1):
> > net/hinic: fix crash in secondary process
> >
> > Haiyue Wang (1):
> > net/ixgbe: fix Rx errors statistics for UDP checksum
> >
> > Harman Kalra (1):
> > event/octeontx2: fix device reconfigure for single slot
> >
> > Hongbo Zheng (3):
> > app/testpmd: fix Tx/Rx descriptor query error log
> > net/hns3: fix FLR miss detection
> > net/hns3: delete redundant blank line
> >
> > Huisong Li (11):
> > net/hns3: fix device capabilities for copper media type
> > net/hns3: remove unused parameter markers
> > net/hns3: fix reporting undefined speed
> > net/hns3: fix link update when failed to get link info
> > net/hns3: fix flow control exception
> > app/testpmd: fix bitmap of link speeds when force speed
> > net/hns3: fix flow control mode
> > net/hns3: remove redundant mailbox response
> > net/hns3: fix DCB mode check
> > net/hns3: fix VMDq mode check
> > net/hns3: fix mbuf leakage
> >
> > Ibtisam Tariq (1):
> > examples/vhost_crypto: remove unused short option
> >
> > Igor Russkikh (2):
> > net/qede: reduce log verbosity
> > net/qede: accept bigger RSS table
> >
> > Ilya Maximets (1):
> > net/virtio: fix interrupt unregistering for listening socket
> >
> > Ivan Malov (5):
> > net/sfc: fix buffer size for flow parse
> > net: fix comment in IPv6 header
> > net/sfc: fix error path inconsistency
> > common/sfc_efx/base: fix indication of MAE encap support
> > net/sfc: fix outer rule rollback on error
> >
> > Jiawei Wang (2):
> > app/testpmd: fix NVGRE encap configuration
> > net/mlx5: fix resource release for mirror flow
> >
> > Jiawei Zhu (1):
> > net/mlx5: fix Rx segmented packets on mbuf starvation
> >
> > Jiawen Wu (3):
> > net/txgbe: remove unused functions
> > net/txgbe: fix Rx missed packet counter
> > net/txgbe: update packet type
> >
> > John Daley (1):
> > net/enic: fix flow initialization error handling
> >
> > Kalesh AP (18):
> > net/bnxt: remove unused macro
> > net/bnxt: fix VNIC configuration
> > net/bnxt: fix firmware fatal error handling
> > net/bnxt: fix FW readiness check during recovery
> > net/bnxt: fix device readiness check
> > net/bnxt: fix VF info allocation
> > net/bnxt: fix HWRM and FW incompatibility handling
> > net/bnxt: mute some failure logs
> > app/testpmd: check MAC address query
> > net/bnxt: fix PCI write check
> > net/bnxt: fix link state operations
> > net/bnxt: fix timesync when PTP is not supported
> > net/bnxt: fix memory allocation for command response
> > net/bnxt: fix double free in port start failure
> > net/bnxt: fix configuring LRO
> > net/bnxt: fix health check alarm cancellation
> > net/bnxt: fix PTP support for Thor
> > net/bnxt: fix ring count calculation for Thor
> >
> > Kevin Traynor (1):
> > test/cmdline: fix inputs array
> >
> > Lance Richardson (6):
> > net/bnxt: fix Rx buffer posting
> > net/bnxt: fix Tx length hint threshold
> > net/bnxt: fix handling of null flow mask
> > test: fix TCP header initialization
> > net/bnxt: fix Rx descriptor status
> > net/bnxt: fix Rx queue count
> >
> > Leyi Rong (1):
> > net/iavf: fix packet length parsing in AVX512
> >
> > Li Zhang (1):
> > net/mlx5: fix flow actions index in cache
> >
> > Luc Pelletier (2):
> > eal: fix race in control thread creation
> > eal: fix hang in control thread creation
> >
> > Marvin Liu (5):
> > vhost: fix split ring potential buffer overflow
> > vhost: fix packed ring potential buffer overflow
> > vhost: fix batch dequeue potential buffer overflow
> > vhost: fix initialization of temporary header
> > vhost: fix initialization of async temporary header
> >
> > Matan Azrad (4):
> > common/mlx5/linux: add glue function to query WQ
> > common/mlx5: add DevX command to query WQ
> > common/mlx5: add DevX commands for queue counters
> > vdpa/mlx5: fix virtq cleaning
> >
> > Min Hu (Connor) (8):
> > net/hns3: fix MTU config complexity
> > net/hns3: update HiSilicon copyright syntax
> > net/hns3: fix copyright date
> > examples/ptpclient: remove wrong comment
> > test/bpf: fix error message
> > doc: fix HiSilicon copyright syntax
> > net/hns3: remove unused macros
> > net/hns3: remove unused macro
> >
> > Murphy Yang (3):
> > net/ixgbe: fix RSS RETA being reset after port start
> > net/i40e: fix flow director config after flow validate
> > net/i40e: fix flow director for common pctypes
> >
> > Natanael Copa (5):
> > common/dpaax/caamflib: fix build with musl
> > bus/dpaa: fix 64-bit arch detection
> > bus/dpaa: fix build with musl
> > net/cxgbe: remove use of uint type
> > app/testpmd: fix build with musl
> >
> > Nipun Gupta (1):
> > bus/dpaa: fix statistics reading
> >
> > Nithin Dabilpuram (3):
> > vfio: do not merge contiguous areas
> > vfio: fix DMA mapping granularity for IOVA as VA
> > test/mem: fix page size for external memory
> >
> > Pallavi Kadam (1):
> > bus/pci: skip probing some Windows NDIS devices
> >
> > Pavan Nikhilesh (2):
> > test/event: fix timeout accuracy
> > app/eventdev: fix timeout accuracy
> >
> > Pu Xu (1):
> > ip_frag: fix fragmenting IPv4 packet with header option
> >
> > Qi Zhang (7):
> > net/ice/base: fix payload indicator on ptype
> > net/ice/base: fix uninitialized struct
> > net/ice/base: cleanup filter list on error
> > net/ice/base: fix memory allocation for MAC addresses
> > net/iavf: fix TSO max segment size
> > doc: fix matching versions in ice guide
> > net/iavf: fix wrong Tx context descriptor
> >
> > Radha Mohan Chintakuntla (1):
> > raw/octeontx2_dma: assign PCI device in DPI VF
> >
> > Raslan Darawsheh (1):
> > ethdev: update flow item GTP QFI definition
> >
> > Richael Zhuang (2):
> > test/power: add delay before checking CPU frequency
> > test/power: round CPU frequency to check
> >
> > Robin Zhang (4):
> > net/i40e: announce request queue capability in PF
> > doc: update recommended versions for i40e
> > net/i40e: fix lack of MAC type when set MAC address
> > net/iavf: fix lack of MAC type when set MAC address
> >
> > Rohit Raj (3):
> > net/dpaa2: fix getting link status
> > net/dpaa: fix getting link status
> > examples/l2fwd-crypto: fix packet length while decryption
> >
> > Roy Shterman (1):
> > mem: fix freeing segments in --huge-unlink mode
> >
> > Satheesh Paul (1):
> > net/octeontx2: fix VLAN filter
> >
> > Savinay Dharmappa (1):
> > sched: fix traffic class oversubscription parameter
> >
> > Shijith Thotton (1):
> > eventdev: fix case to initiate crypto adapter service
> >
> > Siwar Zitouni (1):
> > net/ice: fix disabling promiscuous mode
> > Somnath Kotur (3):
> > net/bnxt: fix xstats get
> > net/bnxt: fix Rx and Tx timestamps
> > net/bnxt: fix Tx timestamp init
> >
> > Stanislaw Kardach (1):
> > test: proceed if timer subsystem already initialized
> >
> > Stephen Hemminger (1):
> > kni: refactor user request processing
> >
> > Tal Shnaiderman (2):
> > eal/windows: fix default thread priority
> > eal/windows: fix return codes of pthread shim layer
> >
> > Tengfei Zhang (1):
> > net/pcap: fix file descriptor leak on close
> >
> > Thinh Tran (1):
> > test: fix autotest handling of skipped tests
> >
> > Thomas Monjalon (16):
> > bus/pci: fix Windows kernel driver categories
> > eal: fix comment of OS-specific header files
> > buildtools: fix build with busybox
> > build: detect execinfo library on Linux
> > build: remove redundant _GNU_SOURCE definitions
> > eal: fix build with musl
> > net/igc: remove use of uint type
> > event/dlb: fix header includes for musl
> > examples/bbdev: fix header include for musl
> > drivers: fix log level after loading
> > app/regex: fix usage text
> > app/testpmd: fix usage text
> > doc: fix names of UIO drivers
> > doc: fix build with Sphinx 4
> > bus/pci: support I/O port operations with musl
> > app: fix exit messages
> >
> > Tyler Retzlaff (1):
> > eal: add C++ include guard for reciprocal header
> >
> > Vadim Podovinnikov (1):
> > net/bonding: fix LACP system address check
> >
> > Venkat Duvvuru (1):
> > net/bnxt: fix queues per VNIC
> >
> > Viacheslav Ovsiienko (11):
> > net/mlx5: fix external buffer pool registration for Rx queue
> > net/mlx5: fix metadata item validation for ingress flows
> > net/mlx5: fix hashed list size for tunnel flow groups
> > net/mlx5: fix UAR allocation diagnostics messages
> > common/mlx5: add timestamp format support to DevX
> > vdpa/mlx5: support timestamp format
> > net/mlx5: fix Rx metadata leftovers
> > net/mlx5: fix drop action for Direct Rules/Verbs
> > net/mlx4: fix RSS action with null hash key
> > net/mlx5: support timestamp format
> > regex/mlx5: support timestamp format
> >
> > Wenjun Wu (2):
> > net/ice: check some functions return
> > net/ice: fix RSS hash update
> >
> > Wenwu Ma (1):
> > net/ice: fix illegal access when removing MAC filter
> >
> > Wenzhuo Lu (2):
> > net/iavf: fix crash in AVX512
> > net/ice: fix crash in AVX512
> >
> > Wisam Jaddo (1):
> > app/flow-perf: fix encap/decap actions
> >
> > Xiao Wang (1):
> > vdpa/ifc: check PCI config read
> >
> > Xiaoyu Min (4):
> > net/mlx5: support RSS expansion for IPv6 GRE
> > net/mlx5: fix shared inner RSS
> > net/mlx5: fix missing shared RSS hash types
> > net/mlx5: fix redundant flow after RSS expansion
> >
> > Xiaoyun Li (2):
> > app/testpmd: remove unnecessary UDP tunnel check
> > net/i40e: fix IPv4 fragment offload
> >
> > Youri Querry (1):
> > bus/fslmc: fix random portal hangs with qbman 5.0
> >
> > Yunjian Wang (3):
> > vfio: fix API description
> > net/mlx5: fix using flow tunnel before null check
> > vfio: fix duplicated user mem map
--
Christian Ehrhardt
Staff Engineer, Ubuntu Server
Canonical Ltd
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH] net: introduce IPv4 ihl and version fields
2021-06-02 9:51 0% ` Gregory Etelson
@ 2021-06-10 4:10 0% ` Gregory Etelson
2021-06-10 9:22 4% ` Olivier Matz
0 siblings, 1 reply; 200+ results
From: Gregory Etelson @ 2021-06-10 4:10 UTC (permalink / raw)
To: Iremonger, Bernard, Olivier Matz, Morten Brørup, dev
Cc: Matan Azrad, Ori Kam, Raslan Darawsheh, Asaf Penso
Hello,
There was no activity that patch for a long time.
The patch is marked as failed, but we verified failed tests and concluded that the failures can be ignored.
https://patchwork.dpdk.org/project/dpdk/patch/20210527152858.13312-1-getelson@nvidia.com/
How should I proceed with this case ?
Please advise.
Thank you.
Regards,
Gregory
> -----Original Message-----
> From: Gregory Etelson
> Sent: Wednesday, June 2, 2021 12:52
> To: Morten Brørup <mb@smartsharesystems.com>; Iremonger, Bernard
> <bernard.iremonger@intel.com>; dev@dpdk.org
> Cc: Matan Azrad <matan@nvidia.com>; Ori Kam <orika@nvidia.com>;
> Raslan Darawsheh <rasland@nvidia.com>; Olivier Matz
> <olivier.matz@6wind.com>; Thomas Monjalon <tmonjalon@nvidia.com>
> Subject: RE: [dpdk-dev] [PATCH] net: introduce IPv4 ihl and version fields
>
> Hello,
>
> Is there another concern about that patch ?
> Please comment.
>
> Regards,
> Gregory
>
> > -----Original Message-----
> > From: Gregory Etelson
> > Sent: Monday, May 31, 2021 14:10
> > To: Ananyev, Konstantin <konstantin.ananyev@intel.com>; Morten
> Brørup
> > <mb@smartsharesystems.com>; dev@dpdk.org
> > Cc: Matan Azrad <matan@nvidia.com>; Ori Kam <orika@nvidia.com>;
> Raslan
> > Darawsheh <rasland@nvidia.com>; Iremonger, Bernard
> > <bernard.iremonger@intel.com>; Olivier Matz
> <olivier.matz@6wind.com>
> > Subject: RE: [dpdk-dev] [PATCH] net: introduce IPv4 ihl and version
> > fields
> >
> > > > > > > > RTE IPv4 header definition combines the `version' and `ihl'
> > > > > > > > fields into a single structure member.
> > > > > > > > This patch introduces dedicated structure members for both
> > > > > > `version'
> > > > > > > > and `ihl' IPv4 fields. Separated header fields definitions
> > > > > > > > allow to create simplified code to match on the IHL value
> > > > > > > > in a flow
> > > rule.
> > > > > > > > The original `version_ihl' structure member is kept for
> > > > > > > > backward compatibility.
> > > > > > > >
> > > > > > > > Signed-off-by: Gregory Etelson <getelson@nvidia.com>
> > > > > > > > ---
> > > > > > > > app/test/test_flow_classify.c | 8 ++++----
> > > > > > > > lib/net/rte_ip.h | 16 +++++++++++++++-
> > > > > > > > 2 files changed, 19 insertions(+), 5 deletions(-)
> > > > > > > >
> > > > > > > > diff --git a/app/test/test_flow_classify.c
> > > > > > > > b/app/test/test_flow_classify.c index
> > > > > > > > 951606f248..4f64be5357
> > > > > > > > 100644
> > > > > > > > --- a/app/test/test_flow_classify.c
> > > > > > > > +++ b/app/test/test_flow_classify.c
> > > > > > > > @@ -95,7 +95,7 @@ static struct rte_acl_field_def
> > > > > > > > ipv4_defs[NUM_FIELDS_IPV4] = {
> > > > > > > > * dst mask 255.255.255.00 / udp src is 32 dst is 33 / end"
> > > > > > > > */
> > > > > > > > static struct rte_flow_item_ipv4 ipv4_udp_spec_1 = {
> > > > > > > > - { 0, 0, 0, 0, 0, 0, IPPROTO_UDP, 0,
> > > > > > > > + { { .version_ihl = 0}, 0, 0, 0, 0, 0, IPPROTO_UDP, 0,
> > > > > > > > RTE_IPV4(2, 2, 2, 3), RTE_IPV4(2, 2, 2, 7)} };
> > > > > > > > static const struct rte_flow_item_ipv4 ipv4_mask_24 = { @@
> > > > > > > > -131,7
> > > > > > > > +131,7 @@ static struct rte_flow_item end_item = {
> > > > > RTE_FLOW_ITEM_TYPE_END,
> > > > > > > > * dst mask 255.255.255.00 / tcp src is 16 dst is 17 / end"
> > > > > > > > */
> > > > > > > > static struct rte_flow_item_ipv4 ipv4_tcp_spec_1 = {
> > > > > > > > - { 0, 0, 0, 0, 0, 0, IPPROTO_TCP, 0,
> > > > > > > > + { { .version_ihl = 0}, 0, 0, 0, 0, 0, IPPROTO_TCP, 0,
> > > > > > > > RTE_IPV4(1, 2, 3, 4), RTE_IPV4(5, 6, 7, 8)} };
> > > > > > > >
> > > > > > > > @@ -150,8 +150,8 @@ static struct rte_flow_item
> > > > > > > > tcp_item_1 = { RTE_FLOW_ITEM_TYPE_TCP,
> > > > > > > > * dst mask 255.255.255.00 / sctp src is 16 dst is 17/ end"
> > > > > > > > */
> > > > > > > > static struct rte_flow_item_ipv4 ipv4_sctp_spec_1 = {
> > > > > > > > - { 0, 0, 0, 0, 0, 0, IPPROTO_SCTP, 0, RTE_IPV4(11, 12,
> > > > > > > > 13, 14),
> > > > > > > > - RTE_IPV4(15, 16, 17, 18)}
> > > > > > > > + { { .version_ihl = 0}, 0, 0, 0, 0, 0, IPPROTO_SCTP, 0,
> > > > > > > > + RTE_IPV4(11, 12, 13, 14), RTE_IPV4(15, 16, 17, 18)}
> > > > > > > > };
> > > > > > > >
> > > > > > > > static struct rte_flow_item_sctp sctp_spec_1 = { diff
> > > > > > > > --git a/lib/net/rte_ip.h b/lib/net/rte_ip.h index
> > > > > > > > 4b728969c1..684bb028b2
> > > > > > > > 100644
> > > > > > > > --- a/lib/net/rte_ip.h
> > > > > > > > +++ b/lib/net/rte_ip.h
> > > > > > > > @@ -38,7 +38,21 @@ extern "C" {
> > > > > > > > * IPv4 Header
> > > > > > > > */
> > > > > > > > struct rte_ipv4_hdr {
> > > > > > > > - uint8_t version_ihl; /**< version and header length */
> > > > > > > > + __extension__
> > > > > > > > + union {
> > > > > > > > + uint8_t version_ihl; /**< version and header length */
> > > > > > > > + struct {
> > > > > > > > +#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
> > > > > > > > + uint8_t ihl:4;
> > > > > > > > + uint8_t version:4; #elif RTE_BYTE_ORDER
> > > > > > > > +== RTE_BIG_ENDIAN
> > > > > > > > + uint8_t version:4;
> > > > > > > > + uint8_t ihl:4; #else #error "setup
> > > > > > > > +endian definition"
> > > > > > > > +#endif
> > > > > > > > + };
> > > > > > > > + };
> > > > > > > > uint8_t type_of_service; /**< type of service */
> > > > > > > > rte_be16_t total_length; /**< length of packet */
> > > > > > > > rte_be16_t packet_id; /**< packet ID */
> > > > > > > > --
> > > > > > > > 2.31.1
> > > > > > > >
> > > > > > >
> > > > > > > This does not break the ABI, but it could be discussed if it
> > > > > > > breaks
> > > > > > the API due to the required structure initialization changes
> > > > > > shown in
> > > > > > > test_flow_classify.c.
> > > > > >
> > > > > > Yep, I guess it might be classified as API change.
> > > > > > Another thing that concerns me - it is not the only place in
> > > > > > IPv4 header when we unite multiple bit-fields into one field:
> > > > > > type_of_service, fragment_offset.
> > > > > > If we start splitting ipv4 fields into actual bitfields, I
> > > > > > suppose we'll end-up splitting these ones too.
> > > > > > But I am not sure it will pay off - as compiler not always
> > > > > > generates optimal code for reading/updating bitfields.
> > > > > > Did you consider just adding extra macros to simplify access
> > > > > > to these fields (like RTE_IPV4_HDR_(GET_SET)_*), instead?
> > > > > >
> > > > >
> > > > > Let's please not introduce accessor macros for bitfields. If we
> > > > > don't introduce bitfields like these, I would rather stick with
> > > > > the current _MASK, _SHIFT and _FLAG defines.
> > > > >
> > > > > Yes, this change will lead to the introduction of more
> > > > > bitfields, both here and in other places. We already accepted it
> > > > > in the eCPRI structure (/lib/net/rte_ecpri.h), so why not just
> generally accept it.
> > > > >
> > > > > Are modern compilers really worse at handling a bitfield defined
> > > > > like this, compared to handling a single uint8_t with hand coding?
> > > > > I consider your concern very important, so I'm only asking if it
> > > > > is still relevant, to avoid making decisions based on past
> > > > > experience that might be outdated. (I admit to falling into that
> > > > > trap myself, once in a while.)
> > > > >
> > > >
> > > > I compared x86 code generated with gcc-9, gcc-10 and clang-10 for
> > > > these
> > > 2 functions:
> > > > void test_ipv4_hdr_byte(struct rte_ipv4_hdr *h, uint8_t version,
> > > > uint8_t ihl) {
> > > > h->version_ihl = ((version & 0x0f) << 4) | (ihl & 0x0f); }
> > > > void test_ipv4_hdr_bits(struct rte_ipv4_hdr *h, uint8_t version,
> > > > uint8_t
> > > > ihl) {
> > > > h->version = version & 0x0f;
> > > > h->ihl = ihl & 0x0f;
> > > > }
> > > > meson configuration flags: --default-library=static
> > > > --buildtype=release Each compiler produced identical code for both
> > > functions.
> > >
> > > For that particular case (2 bit-fields packed tightly into one byte)
> > > compilers usually perform quite well. At least I never saw issues
> > > for such
> > case.
> > > Bit-fields that do cross byte boundaries - that might be a trouble.
> > >
> >
> > Can we keep both implementations, the combined byte and the bit-field,
> > grouped into a union ? In that case application or PMD can select
> > access method that fits.
> >
> > > >
> > > >
> > > > > > > I think this patch is an improvement, and that such
> > > > > > > structure
> > > > > > modifications should be generally accepted, so:
> > > > > > >
> > > > > > > Acked-by: Morten Brørup <mb@smartsharesystems.com>
> > > > > >
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH v9 07/10] eal: implement functions for mutex management
2021-06-08 23:04 3% ` Dmitry Kozlyuk
@ 2021-06-09 22:37 0% ` Dmitry Kozlyuk
2021-06-12 2:39 0% ` Narcisa Ana Maria Vasile
0 siblings, 1 reply; 200+ results
From: Dmitry Kozlyuk @ 2021-06-09 22:37 UTC (permalink / raw)
To: Narcisa Ana Maria Vasile
Cc: dev, thomas, khot, navasile, dmitrym, roretzla, talshn, ocardona,
bruce.richardson, david.marchand, pallavi.kadam
2021-06-09 02:04 (UTC+0300), Dmitry Kozlyuk:
> 2021-06-04 16:44 (UTC-0700), Narcisa Ana Maria Vasile:
> [...]
> > diff --git a/lib/eal/include/rte_thread_types.h b/lib/eal/include/rte_thread_types.h
> > index d67b24a563..7bb0d2948c 100644
> > --- a/lib/eal/include/rte_thread_types.h
> > +++ b/lib/eal/include/rte_thread_types.h
> > @@ -7,4 +7,8 @@
> >
> > #include <pthread.h>
> >
> > +#define RTE_THREAD_MUTEX_INITIALIZER PTHREAD_MUTEX_INITIALIZER
> > +
> > +typedef pthread_mutex_t rte_thread_mutex_t;
> > +
> > #endif /* _RTE_THREAD_TYPES_H_ */
> > diff --git a/lib/eal/windows/include/rte_windows_thread_types.h b/lib/eal/windows/include/rte_windows_thread_types.h
> > index 60e6d94553..c6c8502bfb 100644
> > --- a/lib/eal/windows/include/rte_windows_thread_types.h
> > +++ b/lib/eal/windows/include/rte_windows_thread_types.h
> > @@ -7,4 +7,13 @@
> >
> > #include <rte_windows.h>
> >
> > +#define WINDOWS_MUTEX_INITIALIZER (void*)-1
> > +#define RTE_THREAD_MUTEX_INITIALIZER {WINDOWS_MUTEX_INITIALIZER}
> > +
> > +struct thread_mutex_t {
> > + void* mutex_id;
> > +};
> > +
> > +typedef struct thread_mutex_t rte_thread_mutex_t;
> > +
> > #endif /* _RTE_THREAD_TYPES_H_ */
>
> In previous patches rte_thread content was made opaque and of equal size
> for pthread (most implementations) and non-pthread variant.
> AFAIU, we agree on the requirement of compatible ABI between variants,
> that is, a compiled app can work with any threading variant of DPDK.
> Above definition of `rte_thread_mutex_t` does not satisfy it.
> Or do we only promise API compatibility?
> This is the most important question now.
From Windows community call 2021-06-10, for everyone's information.
1. Yes, binary compatibility is a requirement.
2. Static mutex initializer for Windows is tricky (an old topic).
This patch proposes `rte_mutex` to hold a pointer to actual mutex
and use NULL as static initializer, then allocate on first use.
At the same time we want to use the same initializer for pthread variant.
This means it would also need indirection, allocation, and tricky logic.
My opinion:
New threading API can just be without static initilizer.
All it usages in DPDK could be converted to dynamic initialization
either in appropriate function or using `RTE_INIT`.
Maybe create a convenient macro to declare a static mutex and its
initialization code, what do others think?
RTE_STATIC_MUTEX(private_lock)
Expanding to:
static RTE_DECLARE_MUTEX(private_lock)
RTE_DEFINE_MUTEX(private_lock)
Expanding to:
static rte_mutex private_lock;
RTE_INIT(__rte_private_lock_init)
{
RTE_VERIFY(rte_thread_mutex_init(&private_lock));
}
As a bonus it removes the need of `rte_*_thread_types.h`.
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] 20.11.2 patches review and test
2021-06-01 7:54 1% [dpdk-dev] 20.11.2 patches review and test Xueming(Steven) Li
` (2 preceding siblings ...)
2021-06-08 11:31 0% ` Kevin Traynor
@ 2021-06-09 11:56 0% ` Xueming(Steven) Li
2021-06-10 8:53 0% ` Christian Ehrhardt
3 siblings, 1 reply; 200+ results
From: Xueming(Steven) Li @ 2021-06-09 11:56 UTC (permalink / raw)
To: dpdk stable
Cc: dev, Abhishek Marathe, Akhil Goyal, Ali Alnubani,
benjamin.walker, David Christensen, hariprasad.govindharajan,
Hemant Agrawal, Ian Stokes, Jerin Jacob, John McNamara,
Ju-Hyoung Lee, Kevin Traynor, Luca Boccassi, Pei Zhang, pingx.yu,
qian.q.xu, Raslan Darawsheh, NBU-Contact-Thomas Monjalon,
yuan.peng, zhaoyan.chen
Hi all,
Thanks Kevin's feedback, there are some patches missing between v21.05-rc1..v21.05.
Will roll out rc2 to include them all, please hold test and verification.
Best Regards,
Xueming
> -----Original Message-----
> From: Xueming(Steven) Li <xuemingl@nvidia.com>
> Sent: Tuesday, June 1, 2021 3:55 PM
> Cc: dev@dpdk.org; Abhishek Marathe <Abhishek.Marathe@microsoft.com>; Akhil Goyal <akhil.goyal@nxp.com>; Ali Alnubani
> <alialnu@nvidia.com>; benjamin.walker@intel.com; David Christensen <drc@linux.vnet.ibm.com>;
> hariprasad.govindharajan@intel.com; Hemant Agrawal <hemant.agrawal@nxp.com>; Ian Stokes <ian.stokes@intel.com>; Jerin Jacob
> <jerinj@marvell.com>; John McNamara <john.mcnamara@intel.com>; Ju-Hyoung Lee <juhlee@microsoft.com>; Kevin Traynor
> <ktraynor@redhat.com>; Luca Boccassi <bluca@debian.org>; Pei Zhang <pezhang@redhat.com>; pingx.yu@intel.com;
> qian.q.xu@intel.com; Raslan Darawsheh <rasland@nvidia.com>; NBU-Contact-Thomas Monjalon <thomas@monjalon.net>;
> yuan.peng@intel.com; zhaoyan.chen@intel.com; Xueming(Steven) Li <xuemingl@nvidia.com>
> Subject: 20.11.2 patches review and test
>
> Hi all,
>
> Here is a list of patches targeted for stable release 20.11.2.
>
> The planned date for the final release is 15th June.
>
> Please help with testing and validation of your use cases and report any issues/results with reply-all to this mail. For the final release
> the fixes and reported validations will be added to the release notes.
>
> A release candidate tarball can be found at:
>
> https://dpdk.org/browse/dpdk-stable/tag/?id=v20.11.2-rc1
>
> These patches are located at branch 20.11 of dpdk-stable repo:
> https://dpdk.org/browse/dpdk-stable/
>
>
> Thanks.
>
> Xueming Li <xuemingl@nvidia.com>
>
> ---
> Ajit Khaparde (3):
> net/bnxt: fix RSS context cleanup
> net/bnxt: check kvargs parsing
> net/bnxt: fix resource cleanup
>
> Alvin Zhang (7):
> net/ice: fix VLAN filter with PF
> net/i40e: fix input set field mask
> net/igc: fix Rx RSS hash offload capability
> net/igc: fix Rx error counter for bad length
> net/e1000: fix Rx error counter for bad length
> net/e1000: fix max Rx packet size
> net/igc: fix Rx packet size
>
> Anatoly Burakov (2):
> fbarray: fix log message on truncation error
> power: do not skip saving original P-state governor
>
> Andrew Boyer (1):
> net/ionic: fix completion type in lif init
>
> Andrew Rybchenko (3):
> net/failsafe: fix RSS hash offload reporting
> net/failsafe: report minimum and maximum MTU
> common/sfc_efx: remove GENEVE from supported tunnels
>
> Ankur Dwivedi (1):
> crypto/octeontx: fix session-less mode
>
> Apeksha Gupta (1):
> examples/l2fwd-crypto: skip masked devices
>
> Arek Kusztal (1):
> crypto/qat: fix offset for out-of-place scatter-gather
>
> Beilei Xing (1):
> net/i40evf: fix packet loss for X722
>
> Bruce Richardson (1):
> build: exclude meson files from examples installation
>
> Chenbo Xia (1):
> examples/vhost: check memory table query
>
> Chengchang Tang (15):
> net/hns3: fix HW buffer size on MTU update
> net/hns3: fix processing Tx offload flags
> net/hns3: fix Tx checksum for UDP packets with special port
> net/hns3: fix long task queue pairs reset time
> ethdev: validate input in module EEPROM dump
> ethdev: validate input in register info
> ethdev: validate input in EEPROM info
> net/hns3: fix rollback after setting PVID failure
> net/hns3: fix timing in resetting queues
> net/hns3: fix queue state when concurrent with reset
> net/hns3: fix configure FEC when concurrent with reset
> net/hns3: fix use of command status enumeration
> examples: add eal cleanup to examples
> net/bonding: fix adding itself as its slave
> net/hns3: fix timing in mailbox
>
> Chengwen Feng (15):
> net/hns3: fix flow counter value
> net/hns3: fix VF mailbox head field
> net/hns3: support get device version when dump register
> net/hns3: fix some packet types
> net/hns3: fix missing outer L4 UDP flag for VXLAN
> net/hns3: remove VLAN/QinQ ptypes from support list
> test: check thread creation
> common/dpaax: fix possible null pointer access
> examples/ethtool: remove unused parsing
> net/hns3: fix flow director lock
> net/e1000/base: fix timeout for shadow RAM write
> net/hns3: fix setting default MAC address in bonding of VF
> net/hns3: fix possible mismatched response of mailbox
> net/hns3: fix VF handling LSC event in secondary process
> net/hns3: fix verification of NEON support
>
> Ciara Loftus (1):
> net/af_xdp: fix error handling during Rx queue setup
>
> Conor Walsh (1):
> examples/l3fwd: fix LPM IPv6 subnets
>
> Cristian Dumitrescu (3):
> table: fix actions with different data size
> pipeline: fix instruction translation
> pipeline: fix endianness conversions
>
> Dapeng Yu (3):
> net/igc: remove MTU setting limitation
> net/e1000: remove MTU setting limitation
> examples/packet_ordering: fix port configuration
>
> David Harton (1):
> net/ena: fix releasing Tx ring mbufs
>
> David Marchand (8):
> doc: fix sphinx rtd theme import in GHA
> service: clean references to removed symbol
> eal: fix evaluation of log level option
> ci: hook to GitHub Actions
> ci: enable v21 ABI checks
> ci: fix package installation in GitHub Actions
> ci: ignore APT update failure in GitHub Actions
> ci: catch coredumps
>
> Dekel Peled (1):
> common/mlx5: fix DevX read output buffer size
>
> Dmitry Kozlyuk (3):
> net/pcap: fix format string
> eal/windows: add missing SPDX license tag
> buildtools: fix all drivers disabled on Windows
>
> Ed Czeck (2):
> net/ark: update packet director initial state
> net/ark: refactor Rx buffer recovery
>
> Elad Nachman (2):
> kni: support async user request
> kni: fix kernel deadlock with bifurcated device
>
> Feifei Wang (2):
> net/i40e: fix parsing packet type for NEON
> test/trace: fix race on collected perf data
>
> Ferruh Yigit (3):
> power: remove duplicated symbols from map file
> log/linux: make default output stderr
> license: fix typos
>
> Guoyang Zhou (1):
> net/hinic: fix crash in secondary process
>
> Haiyue Wang (1):
> net/ixgbe: fix Rx errors statistics for UDP checksum
>
> Harman Kalra (1):
> event/octeontx2: fix device reconfigure for single slot
>
> Hongbo Zheng (3):
> app/testpmd: fix Tx/Rx descriptor query error log
> net/hns3: fix FLR miss detection
> net/hns3: delete redundant blank line
>
> Huisong Li (11):
> net/hns3: fix device capabilities for copper media type
> net/hns3: remove unused parameter markers
> net/hns3: fix reporting undefined speed
> net/hns3: fix link update when failed to get link info
> net/hns3: fix flow control exception
> app/testpmd: fix bitmap of link speeds when force speed
> net/hns3: fix flow control mode
> net/hns3: remove redundant mailbox response
> net/hns3: fix DCB mode check
> net/hns3: fix VMDq mode check
> net/hns3: fix mbuf leakage
>
> Ibtisam Tariq (1):
> examples/vhost_crypto: remove unused short option
>
> Igor Russkikh (2):
> net/qede: reduce log verbosity
> net/qede: accept bigger RSS table
>
> Ilya Maximets (1):
> net/virtio: fix interrupt unregistering for listening socket
>
> Ivan Malov (5):
> net/sfc: fix buffer size for flow parse
> net: fix comment in IPv6 header
> net/sfc: fix error path inconsistency
> common/sfc_efx/base: fix indication of MAE encap support
> net/sfc: fix outer rule rollback on error
>
> Jiawei Wang (2):
> app/testpmd: fix NVGRE encap configuration
> net/mlx5: fix resource release for mirror flow
>
> Jiawei Zhu (1):
> net/mlx5: fix Rx segmented packets on mbuf starvation
>
> Jiawen Wu (3):
> net/txgbe: remove unused functions
> net/txgbe: fix Rx missed packet counter
> net/txgbe: update packet type
>
> John Daley (1):
> net/enic: fix flow initialization error handling
>
> Kalesh AP (18):
> net/bnxt: remove unused macro
> net/bnxt: fix VNIC configuration
> net/bnxt: fix firmware fatal error handling
> net/bnxt: fix FW readiness check during recovery
> net/bnxt: fix device readiness check
> net/bnxt: fix VF info allocation
> net/bnxt: fix HWRM and FW incompatibility handling
> net/bnxt: mute some failure logs
> app/testpmd: check MAC address query
> net/bnxt: fix PCI write check
> net/bnxt: fix link state operations
> net/bnxt: fix timesync when PTP is not supported
> net/bnxt: fix memory allocation for command response
> net/bnxt: fix double free in port start failure
> net/bnxt: fix configuring LRO
> net/bnxt: fix health check alarm cancellation
> net/bnxt: fix PTP support for Thor
> net/bnxt: fix ring count calculation for Thor
>
> Kevin Traynor (1):
> test/cmdline: fix inputs array
>
> Lance Richardson (6):
> net/bnxt: fix Rx buffer posting
> net/bnxt: fix Tx length hint threshold
> net/bnxt: fix handling of null flow mask
> test: fix TCP header initialization
> net/bnxt: fix Rx descriptor status
> net/bnxt: fix Rx queue count
>
> Leyi Rong (1):
> net/iavf: fix packet length parsing in AVX512
>
> Li Zhang (1):
> net/mlx5: fix flow actions index in cache
>
> Luc Pelletier (2):
> eal: fix race in control thread creation
> eal: fix hang in control thread creation
>
> Marvin Liu (5):
> vhost: fix split ring potential buffer overflow
> vhost: fix packed ring potential buffer overflow
> vhost: fix batch dequeue potential buffer overflow
> vhost: fix initialization of temporary header
> vhost: fix initialization of async temporary header
>
> Matan Azrad (4):
> common/mlx5/linux: add glue function to query WQ
> common/mlx5: add DevX command to query WQ
> common/mlx5: add DevX commands for queue counters
> vdpa/mlx5: fix virtq cleaning
>
> Min Hu (Connor) (8):
> net/hns3: fix MTU config complexity
> net/hns3: update HiSilicon copyright syntax
> net/hns3: fix copyright date
> examples/ptpclient: remove wrong comment
> test/bpf: fix error message
> doc: fix HiSilicon copyright syntax
> net/hns3: remove unused macros
> net/hns3: remove unused macro
>
> Murphy Yang (3):
> net/ixgbe: fix RSS RETA being reset after port start
> net/i40e: fix flow director config after flow validate
> net/i40e: fix flow director for common pctypes
>
> Natanael Copa (5):
> common/dpaax/caamflib: fix build with musl
> bus/dpaa: fix 64-bit arch detection
> bus/dpaa: fix build with musl
> net/cxgbe: remove use of uint type
> app/testpmd: fix build with musl
>
> Nipun Gupta (1):
> bus/dpaa: fix statistics reading
>
> Nithin Dabilpuram (3):
> vfio: do not merge contiguous areas
> vfio: fix DMA mapping granularity for IOVA as VA
> test/mem: fix page size for external memory
>
> Pallavi Kadam (1):
> bus/pci: skip probing some Windows NDIS devices
>
> Pavan Nikhilesh (2):
> test/event: fix timeout accuracy
> app/eventdev: fix timeout accuracy
>
> Pu Xu (1):
> ip_frag: fix fragmenting IPv4 packet with header option
>
> Qi Zhang (7):
> net/ice/base: fix payload indicator on ptype
> net/ice/base: fix uninitialized struct
> net/ice/base: cleanup filter list on error
> net/ice/base: fix memory allocation for MAC addresses
> net/iavf: fix TSO max segment size
> doc: fix matching versions in ice guide
> net/iavf: fix wrong Tx context descriptor
>
> Radha Mohan Chintakuntla (1):
> raw/octeontx2_dma: assign PCI device in DPI VF
>
> Raslan Darawsheh (1):
> ethdev: update flow item GTP QFI definition
>
> Richael Zhuang (2):
> test/power: add delay before checking CPU frequency
> test/power: round CPU frequency to check
>
> Robin Zhang (4):
> net/i40e: announce request queue capability in PF
> doc: update recommended versions for i40e
> net/i40e: fix lack of MAC type when set MAC address
> net/iavf: fix lack of MAC type when set MAC address
>
> Rohit Raj (3):
> net/dpaa2: fix getting link status
> net/dpaa: fix getting link status
> examples/l2fwd-crypto: fix packet length while decryption
>
> Roy Shterman (1):
> mem: fix freeing segments in --huge-unlink mode
>
> Satheesh Paul (1):
> net/octeontx2: fix VLAN filter
>
> Savinay Dharmappa (1):
> sched: fix traffic class oversubscription parameter
>
> Shijith Thotton (1):
> eventdev: fix case to initiate crypto adapter service
>
> Siwar Zitouni (1):
> net/ice: fix disabling promiscuous mode
> Somnath Kotur (3):
> net/bnxt: fix xstats get
> net/bnxt: fix Rx and Tx timestamps
> net/bnxt: fix Tx timestamp init
>
> Stanislaw Kardach (1):
> test: proceed if timer subsystem already initialized
>
> Stephen Hemminger (1):
> kni: refactor user request processing
>
> Tal Shnaiderman (2):
> eal/windows: fix default thread priority
> eal/windows: fix return codes of pthread shim layer
>
> Tengfei Zhang (1):
> net/pcap: fix file descriptor leak on close
>
> Thinh Tran (1):
> test: fix autotest handling of skipped tests
>
> Thomas Monjalon (16):
> bus/pci: fix Windows kernel driver categories
> eal: fix comment of OS-specific header files
> buildtools: fix build with busybox
> build: detect execinfo library on Linux
> build: remove redundant _GNU_SOURCE definitions
> eal: fix build with musl
> net/igc: remove use of uint type
> event/dlb: fix header includes for musl
> examples/bbdev: fix header include for musl
> drivers: fix log level after loading
> app/regex: fix usage text
> app/testpmd: fix usage text
> doc: fix names of UIO drivers
> doc: fix build with Sphinx 4
> bus/pci: support I/O port operations with musl
> app: fix exit messages
>
> Tyler Retzlaff (1):
> eal: add C++ include guard for reciprocal header
>
> Vadim Podovinnikov (1):
> net/bonding: fix LACP system address check
>
> Venkat Duvvuru (1):
> net/bnxt: fix queues per VNIC
>
> Viacheslav Ovsiienko (11):
> net/mlx5: fix external buffer pool registration for Rx queue
> net/mlx5: fix metadata item validation for ingress flows
> net/mlx5: fix hashed list size for tunnel flow groups
> net/mlx5: fix UAR allocation diagnostics messages
> common/mlx5: add timestamp format support to DevX
> vdpa/mlx5: support timestamp format
> net/mlx5: fix Rx metadata leftovers
> net/mlx5: fix drop action for Direct Rules/Verbs
> net/mlx4: fix RSS action with null hash key
> net/mlx5: support timestamp format
> regex/mlx5: support timestamp format
>
> Wenjun Wu (2):
> net/ice: check some functions return
> net/ice: fix RSS hash update
>
> Wenwu Ma (1):
> net/ice: fix illegal access when removing MAC filter
>
> Wenzhuo Lu (2):
> net/iavf: fix crash in AVX512
> net/ice: fix crash in AVX512
>
> Wisam Jaddo (1):
> app/flow-perf: fix encap/decap actions
>
> Xiao Wang (1):
> vdpa/ifc: check PCI config read
>
> Xiaoyu Min (4):
> net/mlx5: support RSS expansion for IPv6 GRE
> net/mlx5: fix shared inner RSS
> net/mlx5: fix missing shared RSS hash types
> net/mlx5: fix redundant flow after RSS expansion
>
> Xiaoyun Li (2):
> app/testpmd: remove unnecessary UDP tunnel check
> net/i40e: fix IPv4 fragment offload
>
> Youri Querry (1):
> bus/fslmc: fix random portal hangs with qbman 5.0
>
> Yunjian Wang (3):
> vfio: fix API description
> net/mlx5: fix using flow tunnel before null check
> vfio: fix duplicated user mem map
^ permalink raw reply [relevance 0%]
* [dpdk-dev] [RFC PATCH v1 0/3] Add PIE support for HQoS library
2021-05-24 16:19 0% ` Stephen Hemminger
2021-05-25 8:56 0% ` Morten Brørup
@ 2021-06-09 10:53 3% ` Liguzinski, WojciechX
2021-06-15 9:01 3% ` [dpdk-dev] [RFC PATCH v2 " Liguzinski, WojciechX
2 siblings, 1 reply; 200+ results
From: Liguzinski, WojciechX @ 2021-06-09 10:53 UTC (permalink / raw)
To: dev, jasvinder.singh, cristian.dumitrescu; +Cc: savinay.dharmappa, megha.ajmera
DPDK sched library is equipped with mechanism that secures it from the bufferbloat problem
which is a situation when excess buffers in the network cause high latency and latency
variation. Currently, it supports RED for active queue management (which is designed
to control the queue length but it does not control latency directly and is now being
obsoleted). However, more advanced queue management is required to address this problem
and provide desirable quality of service to users.
This solution (RFC) proposes usage of new algorithm called "PIE" (Proportional Integral
controller Enhanced) that can effectively and directly control queuing latency to address
the bufferbloat problem.
The implementation of mentioned functionality includes modification of existing and
adding a new set of data structures to the library, adding PIE related APIs.
This affects structures in public API/ABI. That is why deprecation notice is going
to be prepared and sent.
Liguzinski, WojciechX (3):
sched: add PIE based congestion management
example/qos_sched: add PIE support
example/ip_pipeline: add PIE support
config/rte_config.h | 1 -
drivers/net/softnic/rte_eth_softnic_tm.c | 6 +-
examples/ip_pipeline/tmgr.c | 6 +-
examples/qos_sched/app_thread.c | 1 -
examples/qos_sched/cfg_file.c | 82 ++++-
examples/qos_sched/init.c | 7 +-
examples/qos_sched/profile.cfg | 196 ++++++++----
lib/sched/meson.build | 10 +-
lib/sched/rte_pie.c | 79 +++++
lib/sched/rte_pie.h | 387 +++++++++++++++++++++++
lib/sched/rte_sched.c | 229 ++++++++++----
lib/sched/rte_sched.h | 53 +++-
12 files changed, 876 insertions(+), 181 deletions(-)
create mode 100644 lib/sched/rte_pie.c
create mode 100644 lib/sched/rte_pie.h
--
2.17.1
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [PATCH v9 07/10] eal: implement functions for mutex management
@ 2021-06-08 23:04 3% ` Dmitry Kozlyuk
2021-06-09 22:37 0% ` Dmitry Kozlyuk
0 siblings, 1 reply; 200+ results
From: Dmitry Kozlyuk @ 2021-06-08 23:04 UTC (permalink / raw)
To: Narcisa Ana Maria Vasile
Cc: dev, thomas, khot, navasile, dmitrym, roretzla, talshn, ocardona,
bruce.richardson, david.marchand, pallavi.kadam
2021-06-04 16:44 (UTC-0700), Narcisa Ana Maria Vasile:
[...]
> diff --git a/lib/eal/include/rte_thread_types.h b/lib/eal/include/rte_thread_types.h
> index d67b24a563..7bb0d2948c 100644
> --- a/lib/eal/include/rte_thread_types.h
> +++ b/lib/eal/include/rte_thread_types.h
> @@ -7,4 +7,8 @@
>
> #include <pthread.h>
>
> +#define RTE_THREAD_MUTEX_INITIALIZER PTHREAD_MUTEX_INITIALIZER
> +
> +typedef pthread_mutex_t rte_thread_mutex_t;
> +
> #endif /* _RTE_THREAD_TYPES_H_ */
> diff --git a/lib/eal/windows/include/rte_windows_thread_types.h b/lib/eal/windows/include/rte_windows_thread_types.h
> index 60e6d94553..c6c8502bfb 100644
> --- a/lib/eal/windows/include/rte_windows_thread_types.h
> +++ b/lib/eal/windows/include/rte_windows_thread_types.h
> @@ -7,4 +7,13 @@
>
> #include <rte_windows.h>
>
> +#define WINDOWS_MUTEX_INITIALIZER (void*)-1
> +#define RTE_THREAD_MUTEX_INITIALIZER {WINDOWS_MUTEX_INITIALIZER}
> +
> +struct thread_mutex_t {
> + void* mutex_id;
> +};
> +
> +typedef struct thread_mutex_t rte_thread_mutex_t;
> +
> #endif /* _RTE_THREAD_TYPES_H_ */
In previous patches rte_thread content was made opaque and of equal size
for pthread (most implementations) and non-pthread variant.
AFAIU, we agree on the requirement of compatible ABI between variants,
that is, a compiled app can work with any threading variant of DPDK.
Above definition of `rte_thread_mutex_t` does not satisfy it.
Or do we only promise API compatibility?
This is the most important question now.
Also: DPDK should not export names without `rte_` prefix,
i. e. `WINDOWS_MUTEX_INITIALIZER` and `thread_mutex_t`.
Besides, why `_t`?
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] 20.11.2 patches review and test
2021-06-08 11:31 0% ` Kevin Traynor
@ 2021-06-08 13:10 0% ` Xueming(Steven) Li
2021-06-14 12:39 0% ` Xueming(Steven) Li
0 siblings, 1 reply; 200+ results
From: Xueming(Steven) Li @ 2021-06-08 13:10 UTC (permalink / raw)
To: Kevin Traynor
Cc: dev, John McNamara, Luca Boccassi, NBU-Contact-Thomas Monjalon,
Christian Ehrhardt, Ferruh Yigit, David Marchand
> -----Original Message-----
> From: Kevin Traynor <ktraynor@redhat.com>
> Sent: Tuesday, June 8, 2021 7:31 PM
> To: Xueming(Steven) Li <xuemingl@nvidia.com>
> Cc: dev@dpdk.org; John McNamara <john.mcnamara@intel.com>; Luca Boccassi <bluca@debian.org>; NBU-Contact-Thomas
> Monjalon <thomas@monjalon.net>; Christian Ehrhardt <christian.ehrhardt@canonical.com>; Ferruh Yigit <ferruh.yigit@intel.com>;
> David Marchand <david.marchand@redhat.com>
> Subject: Re: 20.11.2 patches review and test
>
> (reduced Cc)
>
> Hi Steven,
>
> On 01/06/2021 08:54, Xueming(Steven) Li wrote:
> > Hi all,
> >
> > Here is a list of patches targeted for stable release 20.11.2.
> >
> > The planned date for the final release is 15th June.
> >
> > Please help with testing and validation of your use cases and report
> > any issues/results with reply-all to this mail. For the final release
> > the fixes and reported validations will be added to the release notes.
> >
> > A release candidate tarball can be found at:
> >
> > https://dpdk.org/browse/dpdk-stable/tag/?id=v20.11.2-rc1
> >
> > These patches are located at branch 20.11 of dpdk-stable repo:
> > https://dpdk.org/browse/dpdk-stable/
> >
>
> Is the list of patches up to 21.05? Did you drop the fixes for GCC11/clang12? I didn't see them here or in the failed list. I think there is a
> couple that didn't get the right tags, but the ones that did seem missing too.
You are correct, some fixes from v21.05rc1 - v21.05 are missing.
Seems an issue caused by ./devtools/git-log-fixes.sh, if running scripts with other branches checked out, some patches are hidden.
I will make another scan soon.
>
> It would mean that 20.11.2 would not compile on the latest Fedora (34) with the distro packaged compiler versions.
>
> Kevin.
>
> >
> > Thanks.
> >
> > Xueming Li <xuemingl@nvidia.com>
> >
> > ---
> > Ajit Khaparde (3):
> > net/bnxt: fix RSS context cleanup
> > net/bnxt: check kvargs parsing
> > net/bnxt: fix resource cleanup
> >
> > Alvin Zhang (7):
> > net/ice: fix VLAN filter with PF
> > net/i40e: fix input set field mask
> > net/igc: fix Rx RSS hash offload capability
> > net/igc: fix Rx error counter for bad length
> > net/e1000: fix Rx error counter for bad length
> > net/e1000: fix max Rx packet size
> > net/igc: fix Rx packet size
> >
> > Anatoly Burakov (2):
> > fbarray: fix log message on truncation error
> > power: do not skip saving original P-state governor
> >
> > Andrew Boyer (1):
> > net/ionic: fix completion type in lif init
> >
> > Andrew Rybchenko (3):
> > net/failsafe: fix RSS hash offload reporting
> > net/failsafe: report minimum and maximum MTU
> > common/sfc_efx: remove GENEVE from supported tunnels
> >
> > Ankur Dwivedi (1):
> > crypto/octeontx: fix session-less mode
> >
> > Apeksha Gupta (1):
> > examples/l2fwd-crypto: skip masked devices
> >
> > Arek Kusztal (1):
> > crypto/qat: fix offset for out-of-place scatter-gather
> >
> > Beilei Xing (1):
> > net/i40evf: fix packet loss for X722
> >
> > Bruce Richardson (1):
> > build: exclude meson files from examples installation
> >
> > Chenbo Xia (1):
> > examples/vhost: check memory table query
> >
> > Chengchang Tang (15):
> > net/hns3: fix HW buffer size on MTU update
> > net/hns3: fix processing Tx offload flags
> > net/hns3: fix Tx checksum for UDP packets with special port
> > net/hns3: fix long task queue pairs reset time
> > ethdev: validate input in module EEPROM dump
> > ethdev: validate input in register info
> > ethdev: validate input in EEPROM info
> > net/hns3: fix rollback after setting PVID failure
> > net/hns3: fix timing in resetting queues
> > net/hns3: fix queue state when concurrent with reset
> > net/hns3: fix configure FEC when concurrent with reset
> > net/hns3: fix use of command status enumeration
> > examples: add eal cleanup to examples
> > net/bonding: fix adding itself as its slave
> > net/hns3: fix timing in mailbox
> >
> > Chengwen Feng (15):
> > net/hns3: fix flow counter value
> > net/hns3: fix VF mailbox head field
> > net/hns3: support get device version when dump register
> > net/hns3: fix some packet types
> > net/hns3: fix missing outer L4 UDP flag for VXLAN
> > net/hns3: remove VLAN/QinQ ptypes from support list
> > test: check thread creation
> > common/dpaax: fix possible null pointer access
> > examples/ethtool: remove unused parsing
> > net/hns3: fix flow director lock
> > net/e1000/base: fix timeout for shadow RAM write
> > net/hns3: fix setting default MAC address in bonding of VF
> > net/hns3: fix possible mismatched response of mailbox
> > net/hns3: fix VF handling LSC event in secondary process
> > net/hns3: fix verification of NEON support
> >
> > Ciara Loftus (1):
> > net/af_xdp: fix error handling during Rx queue setup
> >
> > Conor Walsh (1):
> > examples/l3fwd: fix LPM IPv6 subnets
> >
> > Cristian Dumitrescu (3):
> > table: fix actions with different data size
> > pipeline: fix instruction translation
> > pipeline: fix endianness conversions
> >
> > Dapeng Yu (3):
> > net/igc: remove MTU setting limitation
> > net/e1000: remove MTU setting limitation
> > examples/packet_ordering: fix port configuration
> >
> > David Harton (1):
> > net/ena: fix releasing Tx ring mbufs
> >
> > David Marchand (8):
> > doc: fix sphinx rtd theme import in GHA
> > service: clean references to removed symbol
> > eal: fix evaluation of log level option
> > ci: hook to GitHub Actions
> > ci: enable v21 ABI checks
> > ci: fix package installation in GitHub Actions
> > ci: ignore APT update failure in GitHub Actions
> > ci: catch coredumps
> >
> > Dekel Peled (1):
> > common/mlx5: fix DevX read output buffer size
> >
> > Dmitry Kozlyuk (3):
> > net/pcap: fix format string
> > eal/windows: add missing SPDX license tag
> > buildtools: fix all drivers disabled on Windows
> >
> > Ed Czeck (2):
> > net/ark: update packet director initial state
> > net/ark: refactor Rx buffer recovery
> >
> > Elad Nachman (2):
> > kni: support async user request
> > kni: fix kernel deadlock with bifurcated device
> >
> > Feifei Wang (2):
> > net/i40e: fix parsing packet type for NEON
> > test/trace: fix race on collected perf data
> >
> > Ferruh Yigit (3):
> > power: remove duplicated symbols from map file
> > log/linux: make default output stderr
> > license: fix typos
> >
> > Guoyang Zhou (1):
> > net/hinic: fix crash in secondary process
> >
> > Haiyue Wang (1):
> > net/ixgbe: fix Rx errors statistics for UDP checksum
> >
> > Harman Kalra (1):
> > event/octeontx2: fix device reconfigure for single slot
> >
> > Hongbo Zheng (3):
> > app/testpmd: fix Tx/Rx descriptor query error log
> > net/hns3: fix FLR miss detection
> > net/hns3: delete redundant blank line
> >
> > Huisong Li (11):
> > net/hns3: fix device capabilities for copper media type
> > net/hns3: remove unused parameter markers
> > net/hns3: fix reporting undefined speed
> > net/hns3: fix link update when failed to get link info
> > net/hns3: fix flow control exception
> > app/testpmd: fix bitmap of link speeds when force speed
> > net/hns3: fix flow control mode
> > net/hns3: remove redundant mailbox response
> > net/hns3: fix DCB mode check
> > net/hns3: fix VMDq mode check
> > net/hns3: fix mbuf leakage
> >
> > Ibtisam Tariq (1):
> > examples/vhost_crypto: remove unused short option
> >
> > Igor Russkikh (2):
> > net/qede: reduce log verbosity
> > net/qede: accept bigger RSS table
> >
> > Ilya Maximets (1):
> > net/virtio: fix interrupt unregistering for listening socket
> >
> > Ivan Malov (5):
> > net/sfc: fix buffer size for flow parse
> > net: fix comment in IPv6 header
> > net/sfc: fix error path inconsistency
> > common/sfc_efx/base: fix indication of MAE encap support
> > net/sfc: fix outer rule rollback on error
> >
> > Jiawei Wang (2):
> > app/testpmd: fix NVGRE encap configuration
> > net/mlx5: fix resource release for mirror flow
> >
> > Jiawei Zhu (1):
> > net/mlx5: fix Rx segmented packets on mbuf starvation
> >
> > Jiawen Wu (3):
> > net/txgbe: remove unused functions
> > net/txgbe: fix Rx missed packet counter
> > net/txgbe: update packet type
> >
> > John Daley (1):
> > net/enic: fix flow initialization error handling
> >
> > Kalesh AP (18):
> > net/bnxt: remove unused macro
> > net/bnxt: fix VNIC configuration
> > net/bnxt: fix firmware fatal error handling
> > net/bnxt: fix FW readiness check during recovery
> > net/bnxt: fix device readiness check
> > net/bnxt: fix VF info allocation
> > net/bnxt: fix HWRM and FW incompatibility handling
> > net/bnxt: mute some failure logs
> > app/testpmd: check MAC address query
> > net/bnxt: fix PCI write check
> > net/bnxt: fix link state operations
> > net/bnxt: fix timesync when PTP is not supported
> > net/bnxt: fix memory allocation for command response
> > net/bnxt: fix double free in port start failure
> > net/bnxt: fix configuring LRO
> > net/bnxt: fix health check alarm cancellation
> > net/bnxt: fix PTP support for Thor
> > net/bnxt: fix ring count calculation for Thor
> >
> > Kevin Traynor (1):
> > test/cmdline: fix inputs array
> >
> > Lance Richardson (6):
> > net/bnxt: fix Rx buffer posting
> > net/bnxt: fix Tx length hint threshold
> > net/bnxt: fix handling of null flow mask
> > test: fix TCP header initialization
> > net/bnxt: fix Rx descriptor status
> > net/bnxt: fix Rx queue count
> >
> > Leyi Rong (1):
> > net/iavf: fix packet length parsing in AVX512
> >
> > Li Zhang (1):
> > net/mlx5: fix flow actions index in cache
> >
> > Luc Pelletier (2):
> > eal: fix race in control thread creation
> > eal: fix hang in control thread creation
> >
> > Marvin Liu (5):
> > vhost: fix split ring potential buffer overflow
> > vhost: fix packed ring potential buffer overflow
> > vhost: fix batch dequeue potential buffer overflow
> > vhost: fix initialization of temporary header
> > vhost: fix initialization of async temporary header
> >
> > Matan Azrad (4):
> > common/mlx5/linux: add glue function to query WQ
> > common/mlx5: add DevX command to query WQ
> > common/mlx5: add DevX commands for queue counters
> > vdpa/mlx5: fix virtq cleaning
> >
> > Min Hu (Connor) (8):
> > net/hns3: fix MTU config complexity
> > net/hns3: update HiSilicon copyright syntax
> > net/hns3: fix copyright date
> > examples/ptpclient: remove wrong comment
> > test/bpf: fix error message
> > doc: fix HiSilicon copyright syntax
> > net/hns3: remove unused macros
> > net/hns3: remove unused macro
> >
> > Murphy Yang (3):
> > net/ixgbe: fix RSS RETA being reset after port start
> > net/i40e: fix flow director config after flow validate
> > net/i40e: fix flow director for common pctypes
> >
> > Natanael Copa (5):
> > common/dpaax/caamflib: fix build with musl
> > bus/dpaa: fix 64-bit arch detection
> > bus/dpaa: fix build with musl
> > net/cxgbe: remove use of uint type
> > app/testpmd: fix build with musl
> >
> > Nipun Gupta (1):
> > bus/dpaa: fix statistics reading
> >
> > Nithin Dabilpuram (3):
> > vfio: do not merge contiguous areas
> > vfio: fix DMA mapping granularity for IOVA as VA
> > test/mem: fix page size for external memory
> >
> > Pallavi Kadam (1):
> > bus/pci: skip probing some Windows NDIS devices
> >
> > Pavan Nikhilesh (2):
> > test/event: fix timeout accuracy
> > app/eventdev: fix timeout accuracy
> >
> > Pu Xu (1):
> > ip_frag: fix fragmenting IPv4 packet with header option
> >
> > Qi Zhang (7):
> > net/ice/base: fix payload indicator on ptype
> > net/ice/base: fix uninitialized struct
> > net/ice/base: cleanup filter list on error
> > net/ice/base: fix memory allocation for MAC addresses
> > net/iavf: fix TSO max segment size
> > doc: fix matching versions in ice guide
> > net/iavf: fix wrong Tx context descriptor
> >
> > Radha Mohan Chintakuntla (1):
> > raw/octeontx2_dma: assign PCI device in DPI VF
> >
> > Raslan Darawsheh (1):
> > ethdev: update flow item GTP QFI definition
> >
> > Richael Zhuang (2):
> > test/power: add delay before checking CPU frequency
> > test/power: round CPU frequency to check
> >
> > Robin Zhang (4):
> > net/i40e: announce request queue capability in PF
> > doc: update recommended versions for i40e
> > net/i40e: fix lack of MAC type when set MAC address
> > net/iavf: fix lack of MAC type when set MAC address
> >
> > Rohit Raj (3):
> > net/dpaa2: fix getting link status
> > net/dpaa: fix getting link status
> > examples/l2fwd-crypto: fix packet length while decryption
> >
> > Roy Shterman (1):
> > mem: fix freeing segments in --huge-unlink mode
> >
> > Satheesh Paul (1):
> > net/octeontx2: fix VLAN filter
> >
> > Savinay Dharmappa (1):
> > sched: fix traffic class oversubscription parameter
> >
> > Shijith Thotton (1):
> > eventdev: fix case to initiate crypto adapter service
> >
> > Siwar Zitouni (1):
> > net/ice: fix disabling promiscuous mode
> Somnath Kotur (3):
> > net/bnxt: fix xstats get
> > net/bnxt: fix Rx and Tx timestamps
> > net/bnxt: fix Tx timestamp init
> >
> > Stanislaw Kardach (1):
> > test: proceed if timer subsystem already initialized
> >
> > Stephen Hemminger (1):
> > kni: refactor user request processing
> >
> > Tal Shnaiderman (2):
> > eal/windows: fix default thread priority
> > eal/windows: fix return codes of pthread shim layer
> >
> > Tengfei Zhang (1):
> > net/pcap: fix file descriptor leak on close
> >
> > Thinh Tran (1):
> > test: fix autotest handling of skipped tests
> >
> > Thomas Monjalon (16):
> > bus/pci: fix Windows kernel driver categories
> > eal: fix comment of OS-specific header files
> > buildtools: fix build with busybox
> > build: detect execinfo library on Linux
> > build: remove redundant _GNU_SOURCE definitions
> > eal: fix build with musl
> > net/igc: remove use of uint type
> > event/dlb: fix header includes for musl
> > examples/bbdev: fix header include for musl
> > drivers: fix log level after loading
> > app/regex: fix usage text
> > app/testpmd: fix usage text
> > doc: fix names of UIO drivers
> > doc: fix build with Sphinx 4
> > bus/pci: support I/O port operations with musl
> > app: fix exit messages
> >
> > Tyler Retzlaff (1):
> > eal: add C++ include guard for reciprocal header
> >
> > Vadim Podovinnikov (1):
> > net/bonding: fix LACP system address check
> >
> > Venkat Duvvuru (1):
> > net/bnxt: fix queues per VNIC
> >
> > Viacheslav Ovsiienko (11):
> > net/mlx5: fix external buffer pool registration for Rx queue
> > net/mlx5: fix metadata item validation for ingress flows
> > net/mlx5: fix hashed list size for tunnel flow groups
> > net/mlx5: fix UAR allocation diagnostics messages
> > common/mlx5: add timestamp format support to DevX
> > vdpa/mlx5: support timestamp format
> > net/mlx5: fix Rx metadata leftovers
> > net/mlx5: fix drop action for Direct Rules/Verbs
> > net/mlx4: fix RSS action with null hash key
> > net/mlx5: support timestamp format
> > regex/mlx5: support timestamp format
> >
> > Wenjun Wu (2):
> > net/ice: check some functions return
> > net/ice: fix RSS hash update
> >
> > Wenwu Ma (1):
> > net/ice: fix illegal access when removing MAC filter
> >
> > Wenzhuo Lu (2):
> > net/iavf: fix crash in AVX512
> > net/ice: fix crash in AVX512
> >
> > Wisam Jaddo (1):
> > app/flow-perf: fix encap/decap actions
> >
> > Xiao Wang (1):
> > vdpa/ifc: check PCI config read
> >
> > Xiaoyu Min (4):
> > net/mlx5: support RSS expansion for IPv6 GRE
> > net/mlx5: fix shared inner RSS
> > net/mlx5: fix missing shared RSS hash types
> > net/mlx5: fix redundant flow after RSS expansion
> >
> > Xiaoyun Li (2):
> > app/testpmd: remove unnecessary UDP tunnel check
> > net/i40e: fix IPv4 fragment offload
> >
> > Youri Querry (1):
> > bus/fslmc: fix random portal hangs with qbman 5.0
> >
> > Yunjian Wang (3):
> > vfio: fix API description
> > net/mlx5: fix using flow tunnel before null check
> > vfio: fix duplicated user mem map
> >
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] 20.11.2 patches review and test
2021-06-01 7:54 1% [dpdk-dev] 20.11.2 patches review and test Xueming(Steven) Li
2021-06-08 8:52 0% ` Jiang, YuX
2021-06-08 10:28 0% ` Pei Zhang
@ 2021-06-08 11:31 0% ` Kevin Traynor
2021-06-08 13:10 0% ` Xueming(Steven) Li
2021-06-09 11:56 0% ` Xueming(Steven) Li
3 siblings, 1 reply; 200+ results
From: Kevin Traynor @ 2021-06-08 11:31 UTC (permalink / raw)
To: Xueming(Steven) Li
Cc: dev, John McNamara, Luca Boccassi, NBU-Contact-Thomas Monjalon,
Christian Ehrhardt, Ferruh Yigit, David Marchand
(reduced Cc)
Hi Steven,
On 01/06/2021 08:54, Xueming(Steven) Li wrote:
> Hi all,
>
> Here is a list of patches targeted for stable release 20.11.2.
>
> The planned date for the final release is 15th June.
>
> Please help with testing and validation of your use cases and report
> any issues/results with reply-all to this mail. For the final release
> the fixes and reported validations will be added to the release notes.
>
> A release candidate tarball can be found at:
>
> https://dpdk.org/browse/dpdk-stable/tag/?id=v20.11.2-rc1
>
> These patches are located at branch 20.11 of dpdk-stable repo:
> https://dpdk.org/browse/dpdk-stable/
>
Is the list of patches up to 21.05? Did you drop the fixes for
GCC11/clang12? I didn't see them here or in the failed list. I think
there is a couple that didn't get the right tags, but the ones that did
seem missing too.
It would mean that 20.11.2 would not compile on the latest Fedora (34)
with the distro packaged compiler versions.
Kevin.
>
> Thanks.
>
> Xueming Li <xuemingl@nvidia.com>
>
> ---
> Ajit Khaparde (3):
> net/bnxt: fix RSS context cleanup
> net/bnxt: check kvargs parsing
> net/bnxt: fix resource cleanup
>
> Alvin Zhang (7):
> net/ice: fix VLAN filter with PF
> net/i40e: fix input set field mask
> net/igc: fix Rx RSS hash offload capability
> net/igc: fix Rx error counter for bad length
> net/e1000: fix Rx error counter for bad length
> net/e1000: fix max Rx packet size
> net/igc: fix Rx packet size
>
> Anatoly Burakov (2):
> fbarray: fix log message on truncation error
> power: do not skip saving original P-state governor
>
> Andrew Boyer (1):
> net/ionic: fix completion type in lif init
>
> Andrew Rybchenko (3):
> net/failsafe: fix RSS hash offload reporting
> net/failsafe: report minimum and maximum MTU
> common/sfc_efx: remove GENEVE from supported tunnels
>
> Ankur Dwivedi (1):
> crypto/octeontx: fix session-less mode
>
> Apeksha Gupta (1):
> examples/l2fwd-crypto: skip masked devices
>
> Arek Kusztal (1):
> crypto/qat: fix offset for out-of-place scatter-gather
>
> Beilei Xing (1):
> net/i40evf: fix packet loss for X722
>
> Bruce Richardson (1):
> build: exclude meson files from examples installation
>
> Chenbo Xia (1):
> examples/vhost: check memory table query
>
> Chengchang Tang (15):
> net/hns3: fix HW buffer size on MTU update
> net/hns3: fix processing Tx offload flags
> net/hns3: fix Tx checksum for UDP packets with special port
> net/hns3: fix long task queue pairs reset time
> ethdev: validate input in module EEPROM dump
> ethdev: validate input in register info
> ethdev: validate input in EEPROM info
> net/hns3: fix rollback after setting PVID failure
> net/hns3: fix timing in resetting queues
> net/hns3: fix queue state when concurrent with reset
> net/hns3: fix configure FEC when concurrent with reset
> net/hns3: fix use of command status enumeration
> examples: add eal cleanup to examples
> net/bonding: fix adding itself as its slave
> net/hns3: fix timing in mailbox
>
> Chengwen Feng (15):
> net/hns3: fix flow counter value
> net/hns3: fix VF mailbox head field
> net/hns3: support get device version when dump register
> net/hns3: fix some packet types
> net/hns3: fix missing outer L4 UDP flag for VXLAN
> net/hns3: remove VLAN/QinQ ptypes from support list
> test: check thread creation
> common/dpaax: fix possible null pointer access
> examples/ethtool: remove unused parsing
> net/hns3: fix flow director lock
> net/e1000/base: fix timeout for shadow RAM write
> net/hns3: fix setting default MAC address in bonding of VF
> net/hns3: fix possible mismatched response of mailbox
> net/hns3: fix VF handling LSC event in secondary process
> net/hns3: fix verification of NEON support
>
> Ciara Loftus (1):
> net/af_xdp: fix error handling during Rx queue setup
>
> Conor Walsh (1):
> examples/l3fwd: fix LPM IPv6 subnets
>
> Cristian Dumitrescu (3):
> table: fix actions with different data size
> pipeline: fix instruction translation
> pipeline: fix endianness conversions
>
> Dapeng Yu (3):
> net/igc: remove MTU setting limitation
> net/e1000: remove MTU setting limitation
> examples/packet_ordering: fix port configuration
>
> David Harton (1):
> net/ena: fix releasing Tx ring mbufs
>
> David Marchand (8):
> doc: fix sphinx rtd theme import in GHA
> service: clean references to removed symbol
> eal: fix evaluation of log level option
> ci: hook to GitHub Actions
> ci: enable v21 ABI checks
> ci: fix package installation in GitHub Actions
> ci: ignore APT update failure in GitHub Actions
> ci: catch coredumps
>
> Dekel Peled (1):
> common/mlx5: fix DevX read output buffer size
>
> Dmitry Kozlyuk (3):
> net/pcap: fix format string
> eal/windows: add missing SPDX license tag
> buildtools: fix all drivers disabled on Windows
>
> Ed Czeck (2):
> net/ark: update packet director initial state
> net/ark: refactor Rx buffer recovery
>
> Elad Nachman (2):
> kni: support async user request
> kni: fix kernel deadlock with bifurcated device
>
> Feifei Wang (2):
> net/i40e: fix parsing packet type for NEON
> test/trace: fix race on collected perf data
>
> Ferruh Yigit (3):
> power: remove duplicated symbols from map file
> log/linux: make default output stderr
> license: fix typos
>
> Guoyang Zhou (1):
> net/hinic: fix crash in secondary process
>
> Haiyue Wang (1):
> net/ixgbe: fix Rx errors statistics for UDP checksum
>
> Harman Kalra (1):
> event/octeontx2: fix device reconfigure for single slot
>
> Hongbo Zheng (3):
> app/testpmd: fix Tx/Rx descriptor query error log
> net/hns3: fix FLR miss detection
> net/hns3: delete redundant blank line
>
> Huisong Li (11):
> net/hns3: fix device capabilities for copper media type
> net/hns3: remove unused parameter markers
> net/hns3: fix reporting undefined speed
> net/hns3: fix link update when failed to get link info
> net/hns3: fix flow control exception
> app/testpmd: fix bitmap of link speeds when force speed
> net/hns3: fix flow control mode
> net/hns3: remove redundant mailbox response
> net/hns3: fix DCB mode check
> net/hns3: fix VMDq mode check
> net/hns3: fix mbuf leakage
>
> Ibtisam Tariq (1):
> examples/vhost_crypto: remove unused short option
>
> Igor Russkikh (2):
> net/qede: reduce log verbosity
> net/qede: accept bigger RSS table
>
> Ilya Maximets (1):
> net/virtio: fix interrupt unregistering for listening socket
>
> Ivan Malov (5):
> net/sfc: fix buffer size for flow parse
> net: fix comment in IPv6 header
> net/sfc: fix error path inconsistency
> common/sfc_efx/base: fix indication of MAE encap support
> net/sfc: fix outer rule rollback on error
>
> Jiawei Wang (2):
> app/testpmd: fix NVGRE encap configuration
> net/mlx5: fix resource release for mirror flow
>
> Jiawei Zhu (1):
> net/mlx5: fix Rx segmented packets on mbuf starvation
>
> Jiawen Wu (3):
> net/txgbe: remove unused functions
> net/txgbe: fix Rx missed packet counter
> net/txgbe: update packet type
>
> John Daley (1):
> net/enic: fix flow initialization error handling
>
> Kalesh AP (18):
> net/bnxt: remove unused macro
> net/bnxt: fix VNIC configuration
> net/bnxt: fix firmware fatal error handling
> net/bnxt: fix FW readiness check during recovery
> net/bnxt: fix device readiness check
> net/bnxt: fix VF info allocation
> net/bnxt: fix HWRM and FW incompatibility handling
> net/bnxt: mute some failure logs
> app/testpmd: check MAC address query
> net/bnxt: fix PCI write check
> net/bnxt: fix link state operations
> net/bnxt: fix timesync when PTP is not supported
> net/bnxt: fix memory allocation for command response
> net/bnxt: fix double free in port start failure
> net/bnxt: fix configuring LRO
> net/bnxt: fix health check alarm cancellation
> net/bnxt: fix PTP support for Thor
> net/bnxt: fix ring count calculation for Thor
>
> Kevin Traynor (1):
> test/cmdline: fix inputs array
>
> Lance Richardson (6):
> net/bnxt: fix Rx buffer posting
> net/bnxt: fix Tx length hint threshold
> net/bnxt: fix handling of null flow mask
> test: fix TCP header initialization
> net/bnxt: fix Rx descriptor status
> net/bnxt: fix Rx queue count
>
> Leyi Rong (1):
> net/iavf: fix packet length parsing in AVX512
>
> Li Zhang (1):
> net/mlx5: fix flow actions index in cache
>
> Luc Pelletier (2):
> eal: fix race in control thread creation
> eal: fix hang in control thread creation
>
> Marvin Liu (5):
> vhost: fix split ring potential buffer overflow
> vhost: fix packed ring potential buffer overflow
> vhost: fix batch dequeue potential buffer overflow
> vhost: fix initialization of temporary header
> vhost: fix initialization of async temporary header
>
> Matan Azrad (4):
> common/mlx5/linux: add glue function to query WQ
> common/mlx5: add DevX command to query WQ
> common/mlx5: add DevX commands for queue counters
> vdpa/mlx5: fix virtq cleaning
>
> Min Hu (Connor) (8):
> net/hns3: fix MTU config complexity
> net/hns3: update HiSilicon copyright syntax
> net/hns3: fix copyright date
> examples/ptpclient: remove wrong comment
> test/bpf: fix error message
> doc: fix HiSilicon copyright syntax
> net/hns3: remove unused macros
> net/hns3: remove unused macro
>
> Murphy Yang (3):
> net/ixgbe: fix RSS RETA being reset after port start
> net/i40e: fix flow director config after flow validate
> net/i40e: fix flow director for common pctypes
>
> Natanael Copa (5):
> common/dpaax/caamflib: fix build with musl
> bus/dpaa: fix 64-bit arch detection
> bus/dpaa: fix build with musl
> net/cxgbe: remove use of uint type
> app/testpmd: fix build with musl
>
> Nipun Gupta (1):
> bus/dpaa: fix statistics reading
>
> Nithin Dabilpuram (3):
> vfio: do not merge contiguous areas
> vfio: fix DMA mapping granularity for IOVA as VA
> test/mem: fix page size for external memory
>
> Pallavi Kadam (1):
> bus/pci: skip probing some Windows NDIS devices
>
> Pavan Nikhilesh (2):
> test/event: fix timeout accuracy
> app/eventdev: fix timeout accuracy
>
> Pu Xu (1):
> ip_frag: fix fragmenting IPv4 packet with header option
>
> Qi Zhang (7):
> net/ice/base: fix payload indicator on ptype
> net/ice/base: fix uninitialized struct
> net/ice/base: cleanup filter list on error
> net/ice/base: fix memory allocation for MAC addresses
> net/iavf: fix TSO max segment size
> doc: fix matching versions in ice guide
> net/iavf: fix wrong Tx context descriptor
>
> Radha Mohan Chintakuntla (1):
> raw/octeontx2_dma: assign PCI device in DPI VF
>
> Raslan Darawsheh (1):
> ethdev: update flow item GTP QFI definition
>
> Richael Zhuang (2):
> test/power: add delay before checking CPU frequency
> test/power: round CPU frequency to check
>
> Robin Zhang (4):
> net/i40e: announce request queue capability in PF
> doc: update recommended versions for i40e
> net/i40e: fix lack of MAC type when set MAC address
> net/iavf: fix lack of MAC type when set MAC address
>
> Rohit Raj (3):
> net/dpaa2: fix getting link status
> net/dpaa: fix getting link status
> examples/l2fwd-crypto: fix packet length while decryption
>
> Roy Shterman (1):
> mem: fix freeing segments in --huge-unlink mode
>
> Satheesh Paul (1):
> net/octeontx2: fix VLAN filter
>
> Savinay Dharmappa (1):
> sched: fix traffic class oversubscription parameter
>
> Shijith Thotton (1):
> eventdev: fix case to initiate crypto adapter service
>
> Siwar Zitouni (1):
> net/ice: fix disabling promiscuous mode Somnath Kotur (3):
> net/bnxt: fix xstats get
> net/bnxt: fix Rx and Tx timestamps
> net/bnxt: fix Tx timestamp init
>
> Stanislaw Kardach (1):
> test: proceed if timer subsystem already initialized
>
> Stephen Hemminger (1):
> kni: refactor user request processing
>
> Tal Shnaiderman (2):
> eal/windows: fix default thread priority
> eal/windows: fix return codes of pthread shim layer
>
> Tengfei Zhang (1):
> net/pcap: fix file descriptor leak on close
>
> Thinh Tran (1):
> test: fix autotest handling of skipped tests
>
> Thomas Monjalon (16):
> bus/pci: fix Windows kernel driver categories
> eal: fix comment of OS-specific header files
> buildtools: fix build with busybox
> build: detect execinfo library on Linux
> build: remove redundant _GNU_SOURCE definitions
> eal: fix build with musl
> net/igc: remove use of uint type
> event/dlb: fix header includes for musl
> examples/bbdev: fix header include for musl
> drivers: fix log level after loading
> app/regex: fix usage text
> app/testpmd: fix usage text
> doc: fix names of UIO drivers
> doc: fix build with Sphinx 4
> bus/pci: support I/O port operations with musl
> app: fix exit messages
>
> Tyler Retzlaff (1):
> eal: add C++ include guard for reciprocal header
>
> Vadim Podovinnikov (1):
> net/bonding: fix LACP system address check
>
> Venkat Duvvuru (1):
> net/bnxt: fix queues per VNIC
>
> Viacheslav Ovsiienko (11):
> net/mlx5: fix external buffer pool registration for Rx queue
> net/mlx5: fix metadata item validation for ingress flows
> net/mlx5: fix hashed list size for tunnel flow groups
> net/mlx5: fix UAR allocation diagnostics messages
> common/mlx5: add timestamp format support to DevX
> vdpa/mlx5: support timestamp format
> net/mlx5: fix Rx metadata leftovers
> net/mlx5: fix drop action for Direct Rules/Verbs
> net/mlx4: fix RSS action with null hash key
> net/mlx5: support timestamp format
> regex/mlx5: support timestamp format
>
> Wenjun Wu (2):
> net/ice: check some functions return
> net/ice: fix RSS hash update
>
> Wenwu Ma (1):
> net/ice: fix illegal access when removing MAC filter
>
> Wenzhuo Lu (2):
> net/iavf: fix crash in AVX512
> net/ice: fix crash in AVX512
>
> Wisam Jaddo (1):
> app/flow-perf: fix encap/decap actions
>
> Xiao Wang (1):
> vdpa/ifc: check PCI config read
>
> Xiaoyu Min (4):
> net/mlx5: support RSS expansion for IPv6 GRE
> net/mlx5: fix shared inner RSS
> net/mlx5: fix missing shared RSS hash types
> net/mlx5: fix redundant flow after RSS expansion
>
> Xiaoyun Li (2):
> app/testpmd: remove unnecessary UDP tunnel check
> net/i40e: fix IPv4 fragment offload
>
> Youri Querry (1):
> bus/fslmc: fix random portal hangs with qbman 5.0
>
> Yunjian Wang (3):
> vfio: fix API description
> net/mlx5: fix using flow tunnel before null check
> vfio: fix duplicated user mem map
>
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] 20.11.2 patches review and test
2021-06-01 7:54 1% [dpdk-dev] 20.11.2 patches review and test Xueming(Steven) Li
2021-06-08 8:52 0% ` Jiang, YuX
@ 2021-06-08 10:28 0% ` Pei Zhang
2021-06-08 11:31 0% ` Kevin Traynor
2021-06-09 11:56 0% ` Xueming(Steven) Li
3 siblings, 0 replies; 200+ results
From: Pei Zhang @ 2021-06-08 10:28 UTC (permalink / raw)
To: Xueming(Steven) Li
Cc: dev, Abhishek Marathe, Akhil Goyal, Ali Alnubani,
benjamin.walker, David Christensen, hariprasad.govindharajan,
Hemant Agrawal, Ian Stokes, Jerin Jacob, John McNamara,
Ju-Hyoung Lee, Kevin Traynor, Luca Boccassi, pingx.yu, qian.q.xu,
Raslan Darawsheh, NBU-Contact-Thomas Monjalon, yuan.peng,
zhaoyan.chen
Hello Xueming,
The testing with dpdk 20.11.2-rc1 from Red Hat looks good. We tested below
16 scenarios and all got PASS on RHEL8:
(1)Guest with device assignment(PF) throughput testing(1G hugepage size):
PASS
(2)Guest with device assignment(PF) throughput testing(2M hugepage size) :
PASS
(3)Guest with device assignment(VF) throughput testing: PASS
(4)PVP (host dpdk testpmd as vswitch) 1Q: throughput testing: PASS
(5)PVP vhost-user 2Q throughput testing: PASS
(6)PVP vhost-user 1Q - cross numa node throughput testing: PASS
(7)Guest with vhost-user 2 queues throughput testing: PASS
(8)vhost-user reconnect with dpdk-client, qemu-server: qemu reconnect: PASS
(9)vhost-user reconnect with dpdk-client, qemu-server: ovs reconnect: PASS
(10)PVP 1Q live migration testing: PASS
(11)PVP 1Q cross numa node live migration testing: PASS
(12)Guest with ovs+dpdk+vhost-user 1Q live migration testing: PASS
(13)Guest with ovs+dpdk+vhost-user 1Q live migration testing (2M): PASS
(14)Guest with ovs+dpdk+vhost-user 2Q live migration testing: PASS
(15)Host PF + DPDK testing: PASS
(16)Host VF + DPDK testing: PASS
Versions:
kernel 4.18
qemu 6.0
dpdk: git://dpdk.org/dpdk-stable
# git log -1
commit ad11991368c46d818f5bdfe014106173d88179be (HEAD, tag: v20.11.2-rc1,
origin/20.11)
Author: Xueming Li <xuemingl@nvidia.com>
Date: Tue Jun 1 14:12:07 2021 +0800
version: 20.11.2-rc1
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
NICs: X540-AT2 NIC(ixgbe, 10G)
Best regards,
Pei
On Tue, Jun 1, 2021 at 3:55 PM Xueming(Steven) Li <xuemingl@nvidia.com>
wrote:
> Hi all,
>
> Here is a list of patches targeted for stable release 20.11.2.
>
> The planned date for the final release is 15th June.
>
> Please help with testing and validation of your use cases and report
> any issues/results with reply-all to this mail. For the final release
> the fixes and reported validations will be added to the release notes.
>
> A release candidate tarball can be found at:
>
> https://dpdk.org/browse/dpdk-stable/tag/?id=v20.11.2-rc1
>
> These patches are located at branch 20.11 of dpdk-stable repo:
> https://dpdk.org/browse/dpdk-stable/
>
>
> Thanks.
>
> Xueming Li <xuemingl@nvidia.com>
>
> ---
> Ajit Khaparde (3):
> net/bnxt: fix RSS context cleanup
> net/bnxt: check kvargs parsing
> net/bnxt: fix resource cleanup
>
> Alvin Zhang (7):
> net/ice: fix VLAN filter with PF
> net/i40e: fix input set field mask
> net/igc: fix Rx RSS hash offload capability
> net/igc: fix Rx error counter for bad length
> net/e1000: fix Rx error counter for bad length
> net/e1000: fix max Rx packet size
> net/igc: fix Rx packet size
>
> Anatoly Burakov (2):
> fbarray: fix log message on truncation error
> power: do not skip saving original P-state governor
>
> Andrew Boyer (1):
> net/ionic: fix completion type in lif init
>
> Andrew Rybchenko (3):
> net/failsafe: fix RSS hash offload reporting
> net/failsafe: report minimum and maximum MTU
> common/sfc_efx: remove GENEVE from supported tunnels
>
> Ankur Dwivedi (1):
> crypto/octeontx: fix session-less mode
>
> Apeksha Gupta (1):
> examples/l2fwd-crypto: skip masked devices
>
> Arek Kusztal (1):
> crypto/qat: fix offset for out-of-place scatter-gather
>
> Beilei Xing (1):
> net/i40evf: fix packet loss for X722
>
> Bruce Richardson (1):
> build: exclude meson files from examples installation
>
> Chenbo Xia (1):
> examples/vhost: check memory table query
>
> Chengchang Tang (15):
> net/hns3: fix HW buffer size on MTU update
> net/hns3: fix processing Tx offload flags
> net/hns3: fix Tx checksum for UDP packets with special port
> net/hns3: fix long task queue pairs reset time
> ethdev: validate input in module EEPROM dump
> ethdev: validate input in register info
> ethdev: validate input in EEPROM info
> net/hns3: fix rollback after setting PVID failure
> net/hns3: fix timing in resetting queues
> net/hns3: fix queue state when concurrent with reset
> net/hns3: fix configure FEC when concurrent with reset
> net/hns3: fix use of command status enumeration
> examples: add eal cleanup to examples
> net/bonding: fix adding itself as its slave
> net/hns3: fix timing in mailbox
>
> Chengwen Feng (15):
> net/hns3: fix flow counter value
> net/hns3: fix VF mailbox head field
> net/hns3: support get device version when dump register
> net/hns3: fix some packet types
> net/hns3: fix missing outer L4 UDP flag for VXLAN
> net/hns3: remove VLAN/QinQ ptypes from support list
> test: check thread creation
> common/dpaax: fix possible null pointer access
> examples/ethtool: remove unused parsing
> net/hns3: fix flow director lock
> net/e1000/base: fix timeout for shadow RAM write
> net/hns3: fix setting default MAC address in bonding of VF
> net/hns3: fix possible mismatched response of mailbox
> net/hns3: fix VF handling LSC event in secondary process
> net/hns3: fix verification of NEON support
>
> Ciara Loftus (1):
> net/af_xdp: fix error handling during Rx queue setup
>
> Conor Walsh (1):
> examples/l3fwd: fix LPM IPv6 subnets
>
> Cristian Dumitrescu (3):
> table: fix actions with different data size
> pipeline: fix instruction translation
> pipeline: fix endianness conversions
>
> Dapeng Yu (3):
> net/igc: remove MTU setting limitation
> net/e1000: remove MTU setting limitation
> examples/packet_ordering: fix port configuration
>
> David Harton (1):
> net/ena: fix releasing Tx ring mbufs
>
> David Marchand (8):
> doc: fix sphinx rtd theme import in GHA
> service: clean references to removed symbol
> eal: fix evaluation of log level option
> ci: hook to GitHub Actions
> ci: enable v21 ABI checks
> ci: fix package installation in GitHub Actions
> ci: ignore APT update failure in GitHub Actions
> ci: catch coredumps
>
> Dekel Peled (1):
> common/mlx5: fix DevX read output buffer size
>
> Dmitry Kozlyuk (3):
> net/pcap: fix format string
> eal/windows: add missing SPDX license tag
> buildtools: fix all drivers disabled on Windows
>
> Ed Czeck (2):
> net/ark: update packet director initial state
> net/ark: refactor Rx buffer recovery
>
> Elad Nachman (2):
> kni: support async user request
> kni: fix kernel deadlock with bifurcated device
>
> Feifei Wang (2):
> net/i40e: fix parsing packet type for NEON
> test/trace: fix race on collected perf data
>
> Ferruh Yigit (3):
> power: remove duplicated symbols from map file
> log/linux: make default output stderr
> license: fix typos
>
> Guoyang Zhou (1):
> net/hinic: fix crash in secondary process
>
> Haiyue Wang (1):
> net/ixgbe: fix Rx errors statistics for UDP checksum
>
> Harman Kalra (1):
> event/octeontx2: fix device reconfigure for single slot
>
> Hongbo Zheng (3):
> app/testpmd: fix Tx/Rx descriptor query error log
> net/hns3: fix FLR miss detection
> net/hns3: delete redundant blank line
>
> Huisong Li (11):
> net/hns3: fix device capabilities for copper media type
> net/hns3: remove unused parameter markers
> net/hns3: fix reporting undefined speed
> net/hns3: fix link update when failed to get link info
> net/hns3: fix flow control exception
> app/testpmd: fix bitmap of link speeds when force speed
> net/hns3: fix flow control mode
> net/hns3: remove redundant mailbox response
> net/hns3: fix DCB mode check
> net/hns3: fix VMDq mode check
> net/hns3: fix mbuf leakage
>
> Ibtisam Tariq (1):
> examples/vhost_crypto: remove unused short option
>
> Igor Russkikh (2):
> net/qede: reduce log verbosity
> net/qede: accept bigger RSS table
>
> Ilya Maximets (1):
> net/virtio: fix interrupt unregistering for listening socket
>
> Ivan Malov (5):
> net/sfc: fix buffer size for flow parse
> net: fix comment in IPv6 header
> net/sfc: fix error path inconsistency
> common/sfc_efx/base: fix indication of MAE encap support
> net/sfc: fix outer rule rollback on error
>
> Jiawei Wang (2):
> app/testpmd: fix NVGRE encap configuration
> net/mlx5: fix resource release for mirror flow
>
> Jiawei Zhu (1):
> net/mlx5: fix Rx segmented packets on mbuf starvation
>
> Jiawen Wu (3):
> net/txgbe: remove unused functions
> net/txgbe: fix Rx missed packet counter
> net/txgbe: update packet type
>
> John Daley (1):
> net/enic: fix flow initialization error handling
>
> Kalesh AP (18):
> net/bnxt: remove unused macro
> net/bnxt: fix VNIC configuration
> net/bnxt: fix firmware fatal error handling
> net/bnxt: fix FW readiness check during recovery
> net/bnxt: fix device readiness check
> net/bnxt: fix VF info allocation
> net/bnxt: fix HWRM and FW incompatibility handling
> net/bnxt: mute some failure logs
> app/testpmd: check MAC address query
> net/bnxt: fix PCI write check
> net/bnxt: fix link state operations
> net/bnxt: fix timesync when PTP is not supported
> net/bnxt: fix memory allocation for command response
> net/bnxt: fix double free in port start failure
> net/bnxt: fix configuring LRO
> net/bnxt: fix health check alarm cancellation
> net/bnxt: fix PTP support for Thor
> net/bnxt: fix ring count calculation for Thor
>
> Kevin Traynor (1):
> test/cmdline: fix inputs array
>
> Lance Richardson (6):
> net/bnxt: fix Rx buffer posting
> net/bnxt: fix Tx length hint threshold
> net/bnxt: fix handling of null flow mask
> test: fix TCP header initialization
> net/bnxt: fix Rx descriptor status
> net/bnxt: fix Rx queue count
>
> Leyi Rong (1):
> net/iavf: fix packet length parsing in AVX512
>
> Li Zhang (1):
> net/mlx5: fix flow actions index in cache
>
> Luc Pelletier (2):
> eal: fix race in control thread creation
> eal: fix hang in control thread creation
>
> Marvin Liu (5):
> vhost: fix split ring potential buffer overflow
> vhost: fix packed ring potential buffer overflow
> vhost: fix batch dequeue potential buffer overflow
> vhost: fix initialization of temporary header
> vhost: fix initialization of async temporary header
>
> Matan Azrad (4):
> common/mlx5/linux: add glue function to query WQ
> common/mlx5: add DevX command to query WQ
> common/mlx5: add DevX commands for queue counters
> vdpa/mlx5: fix virtq cleaning
>
> Min Hu (Connor) (8):
> net/hns3: fix MTU config complexity
> net/hns3: update HiSilicon copyright syntax
> net/hns3: fix copyright date
> examples/ptpclient: remove wrong comment
> test/bpf: fix error message
> doc: fix HiSilicon copyright syntax
> net/hns3: remove unused macros
> net/hns3: remove unused macro
>
> Murphy Yang (3):
> net/ixgbe: fix RSS RETA being reset after port start
> net/i40e: fix flow director config after flow validate
> net/i40e: fix flow director for common pctypes
>
> Natanael Copa (5):
> common/dpaax/caamflib: fix build with musl
> bus/dpaa: fix 64-bit arch detection
> bus/dpaa: fix build with musl
> net/cxgbe: remove use of uint type
> app/testpmd: fix build with musl
>
> Nipun Gupta (1):
> bus/dpaa: fix statistics reading
>
> Nithin Dabilpuram (3):
> vfio: do not merge contiguous areas
> vfio: fix DMA mapping granularity for IOVA as VA
> test/mem: fix page size for external memory
>
> Pallavi Kadam (1):
> bus/pci: skip probing some Windows NDIS devices
>
> Pavan Nikhilesh (2):
> test/event: fix timeout accuracy
> app/eventdev: fix timeout accuracy
>
> Pu Xu (1):
> ip_frag: fix fragmenting IPv4 packet with header option
>
> Qi Zhang (7):
> net/ice/base: fix payload indicator on ptype
> net/ice/base: fix uninitialized struct
> net/ice/base: cleanup filter list on error
> net/ice/base: fix memory allocation for MAC addresses
> net/iavf: fix TSO max segment size
> doc: fix matching versions in ice guide
> net/iavf: fix wrong Tx context descriptor
>
> Radha Mohan Chintakuntla (1):
> raw/octeontx2_dma: assign PCI device in DPI VF
>
> Raslan Darawsheh (1):
> ethdev: update flow item GTP QFI definition
>
> Richael Zhuang (2):
> test/power: add delay before checking CPU frequency
> test/power: round CPU frequency to check
>
> Robin Zhang (4):
> net/i40e: announce request queue capability in PF
> doc: update recommended versions for i40e
> net/i40e: fix lack of MAC type when set MAC address
> net/iavf: fix lack of MAC type when set MAC address
>
> Rohit Raj (3):
> net/dpaa2: fix getting link status
> net/dpaa: fix getting link status
> examples/l2fwd-crypto: fix packet length while decryption
>
> Roy Shterman (1):
> mem: fix freeing segments in --huge-unlink mode
>
> Satheesh Paul (1):
> net/octeontx2: fix VLAN filter
>
> Savinay Dharmappa (1):
> sched: fix traffic class oversubscription parameter
>
> Shijith Thotton (1):
> eventdev: fix case to initiate crypto adapter service
>
> Siwar Zitouni (1):
> net/ice: fix disabling promiscuous mode
>
>
>
>
>
>
>
>
> Somnath Kotur (3):
> net/bnxt: fix xstats get
> net/bnxt: fix Rx and Tx timestamps
> net/bnxt: fix Tx timestamp init
>
> Stanislaw Kardach (1):
> test: proceed if timer subsystem already initialized
>
> Stephen Hemminger (1):
> kni: refactor user request processing
>
> Tal Shnaiderman (2):
> eal/windows: fix default thread priority
> eal/windows: fix return codes of pthread shim layer
>
> Tengfei Zhang (1):
> net/pcap: fix file descriptor leak on close
>
> Thinh Tran (1):
> test: fix autotest handling of skipped tests
>
> Thomas Monjalon (16):
> bus/pci: fix Windows kernel driver categories
> eal: fix comment of OS-specific header files
> buildtools: fix build with busybox
> build: detect execinfo library on Linux
> build: remove redundant _GNU_SOURCE definitions
> eal: fix build with musl
> net/igc: remove use of uint type
> event/dlb: fix header includes for musl
> examples/bbdev: fix header include for musl
> drivers: fix log level after loading
> app/regex: fix usage text
> app/testpmd: fix usage text
> doc: fix names of UIO drivers
> doc: fix build with Sphinx 4
> bus/pci: support I/O port operations with musl
> app: fix exit messages
>
> Tyler Retzlaff (1):
> eal: add C++ include guard for reciprocal header
>
> Vadim Podovinnikov (1):
> net/bonding: fix LACP system address check
>
> Venkat Duvvuru (1):
> net/bnxt: fix queues per VNIC
>
> Viacheslav Ovsiienko (11):
> net/mlx5: fix external buffer pool registration for Rx queue
> net/mlx5: fix metadata item validation for ingress flows
> net/mlx5: fix hashed list size for tunnel flow groups
> net/mlx5: fix UAR allocation diagnostics messages
> common/mlx5: add timestamp format support to DevX
> vdpa/mlx5: support timestamp format
> net/mlx5: fix Rx metadata leftovers
> net/mlx5: fix drop action for Direct Rules/Verbs
> net/mlx4: fix RSS action with null hash key
> net/mlx5: support timestamp format
> regex/mlx5: support timestamp format
>
> Wenjun Wu (2):
> net/ice: check some functions return
> net/ice: fix RSS hash update
>
> Wenwu Ma (1):
> net/ice: fix illegal access when removing MAC filter
>
> Wenzhuo Lu (2):
> net/iavf: fix crash in AVX512
> net/ice: fix crash in AVX512
>
> Wisam Jaddo (1):
> app/flow-perf: fix encap/decap actions
>
> Xiao Wang (1):
> vdpa/ifc: check PCI config read
>
> Xiaoyu Min (4):
> net/mlx5: support RSS expansion for IPv6 GRE
> net/mlx5: fix shared inner RSS
> net/mlx5: fix missing shared RSS hash types
> net/mlx5: fix redundant flow after RSS expansion
>
> Xiaoyun Li (2):
> app/testpmd: remove unnecessary UDP tunnel check
> net/i40e: fix IPv4 fragment offload
>
> Youri Querry (1):
> bus/fslmc: fix random portal hangs with qbman 5.0
>
> Yunjian Wang (3):
> vfio: fix API description
> net/mlx5: fix using flow tunnel before null check
> vfio: fix duplicated user mem map
>
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] 20.11.2 patches review and test
2021-06-01 7:54 1% [dpdk-dev] 20.11.2 patches review and test Xueming(Steven) Li
@ 2021-06-08 8:52 0% ` Jiang, YuX
2021-06-08 10:28 0% ` Pei Zhang
` (2 subsequent siblings)
3 siblings, 0 replies; 200+ results
From: Jiang, YuX @ 2021-06-08 8:52 UTC (permalink / raw)
To: Xueming(Steven) Li
Cc: dev, Abhishek Marathe, Akhil Goyal, Ali Alnubani, Walker,
Benjamin, David Christensen, Govindharajan, Hariprasad,
Hemant Agrawal, Stokes, Ian, Jerin Jacob, Mcnamara, John,
Ju-Hyoung Lee, Kevin Traynor, Luca Boccassi, Pei Zhang, Yu,
PingX, Xu, Qian Q, Raslan Darawsheh, NBU-Contact-Thomas Monjalon,
Peng, Yuan, Chen, Zhaoyan
Hi Steven,
Testing with dpdk v20.11.2-rc1 from Intel looks good, no critical issue is found. All of them are known issues. More details as below:
# Basic Intel(R) NIC testing
*PF(i40e, ixgbe): test scenarios including rte_flow/TSO/Jumboframe/checksum offload/Tunnel, etc. Listed but not all.
- Below two known issues are found.
> (1)https://bugs.dpdk.org/show_bug.cgi?id=687 : unit_tests_power/power_cpufreq: unit test failed. This issue is found in 21.05 and dev has patches to fix it but not merged into main.
> (2)ddp_gtp_qregion/fd_gtpu_ipv4_dstip: flow director does not work. This issue is found in 21.05 and dev has patches to fix it but not merged into main.
*VF(i40e,ixgbe): test scenarios including vf-rte_flow/TSO/Jumboframe/checksum offload/Tunnel, Listed but not all.
- No new issues are found.
*PF/VF(ice): test scenarios including switch features/Flow Director/Advanced RSS/ACL/DCF/Flexible Descriptor and so on, Listed but not all.
- Below 4 known DPDK issues are found.
> (1)rxtx_offload/rxoffload_port: Pkt1 can't be distributed to the same queue. This issue is found in 21.05. Dev has patches to fix it, but not merged into main.
> (2)dcf_lifecycle/handle_acl_filter_05: after reset port the mac changed. This issue is found in 21.05 and fixed in 21.05, apply below patch series passed in lts20.11.2.
Patches link:
https://patchwork.dpdk.org/project/dpdk/list/?series=16712&state=%2A&archive=both
> (3)cvl_advanced_iavf_rss: change the SCTP port value, the hash value remains unchanged. This issue is found in 20.11-rc3, not fixed yet.
> (4)Can't create 512 acl rules after creating a full mask switch rule. This issue is also occurred in dpdk 20.11 and not fixed yet.
* Build or compile:
* Build: cover the build test combination with latest GCC/Clang/ICC version and the popular OS revision such as Ubuntu20.04, CentOS8.3 and so on. Listed but not all.
- All passed expect build failed on Fedora34 with GCC11 and Clang12.
> GCC11 issue: https://bugs.dpdk.org/show_bug.cgi?id=692 : bnx2x build fail on Fedora 34 with gcc 11.
This issue is found in 21.05 on Fedora34 with GCC 11. Has patches to fix in 21.05 and merged into main, but apply failed in lts20.11.2.
Patches link:
http://patchwork.dpdk.org/project/dpdk/list/?series=16927&state=%2A&archive=both (apply failed)
http://patchwork.dpdk.org/project/dpdk/patch/20210505085314.54750-1-ktraynor@redhat.com/
http://patchwork.dpdk.org/project/dpdk/patch/20210514150834.227474-1-ktraynor@redhat.com/
http://patchwork.dpdk.org/project/dpdk/patch/20210517155739.800371-1-ferruh.yigit@intel.com/
> Clang12 issue: app/test/dpdk-test.p/test_cmdline_num.c.o build failed on Fedora34 with Clang12, but build passed on Fedora33 with Clang11. Should we create bugzilla to track this issue?
* Compile: cover the CFLAGES(O0/O1/O2/O3) with popular OS such as Ubuntu20.04 and CentOS 8.3.
- No test this.
* Intel NIC single core/NIC performance: test scenarios including PF/VF single core performance test(AVX2+AVX512) test and so on. Listed but not all.
- All passed. No big data drop.
# Basic cryptodev and virtio testing
* Virtio: both function and performance test are covered. Such as PVP/Virtio_loopback/virtio-user loopback/virtio-net VM2VM perf testing, etc.. Listed but not all.
- One known issues as below:
> (1)The UDP fragmentation offload feature of Virtio-net device can’t be turned on in the VM, kernel issue, bugzilla has been submited: https://bugzilla.kernel.org/show_bug.cgi?id=207075 , not fixed yet.
* Cryptodev:
- Function test: test scenarios including Cryptodev API testing/CompressDev ISA-L/QAT/ZLIB PMD Testing/FIPS, etc. Listed but not all.
- All passed.
- Performance test: test scenarios including Thoughput Performance /Cryptodev Latency, etc. Listed but not all.
- No big data drop.
dpdk: https://dpdk.org/browse/dpdk-stable/
commit ad11991368c46d818f5bdfe014106173d88179be (HEAD, tag: v20.11.2-rc1, origin/20.11)
Author: Xueming Li <xuemingl@nvidia.com>
Date: Tue Jun 1 14:12:07 2021 +0800
version: 20.11.2-rc1
Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Best regards,
Yu Jiang
>-----Original Message-----
>From: dev <dev-bounces@dpdk.org> On Behalf Of Xueming(Steven) Li
>Sent: Tuesday, June 1, 2021 3:55 PM
>Cc: dev@dpdk.org; Abhishek Marathe <Abhishek.Marathe@microsoft.com>;
>Akhil Goyal <akhil.goyal@nxp.com>; Ali Alnubani <alialnu@nvidia.com>;
>Walker, Benjamin <benjamin.walker@intel.com>; David Christensen
><drc@linux.vnet.ibm.com>; Govindharajan, Hariprasad
><hariprasad.govindharajan@intel.com>; Hemant Agrawal
><hemant.agrawal@nxp.com>; Stokes, Ian <ian.stokes@intel.com>; Jerin
>Jacob <jerinj@marvell.com>; Mcnamara, John <john.mcnamara@intel.com>;
>Ju-Hyoung Lee <juhlee@microsoft.com>; Kevin Traynor
><ktraynor@redhat.com>; Luca Boccassi <bluca@debian.org>; Pei Zhang
><pezhang@redhat.com>; Yu, PingX <pingx.yu@intel.com>; Xu, Qian Q
><qian.q.xu@intel.com>; Raslan Darawsheh <rasland@nvidia.com>; NBU-
>Contact-Thomas Monjalon <thomas@monjalon.net>; Peng, Yuan
><yuan.peng@intel.com>; Chen, Zhaoyan <zhaoyan.chen@intel.com>;
>Xueming(Steven) Li <xuemingl@nvidia.com>
>Subject: [dpdk-dev] 20.11.2 patches review and test
>
>Hi all,
>
>Here is a list of patches targeted for stable release 20.11.2.
>
>The planned date for the final release is 15th June.
>
>Please help with testing and validation of your use cases and report any
>issues/results with reply-all to this mail. For the final release the fixes and
>reported validations will be added to the release notes.
>
>A release candidate tarball can be found at:
>
> https://dpdk.org/browse/dpdk-stable/tag/?id=v20.11.2-rc1
>
>These patches are located at branch 20.11 of dpdk-stable repo:
> https://dpdk.org/browse/dpdk-stable/
>
>
>Thanks.
>
>Xueming Li <xuemingl@nvidia.com>
>
>---
>Ajit Khaparde (3):
> net/bnxt: fix RSS context cleanup
> net/bnxt: check kvargs parsing
> net/bnxt: fix resource cleanup
>
>Alvin Zhang (7):
> net/ice: fix VLAN filter with PF
> net/i40e: fix input set field mask
> net/igc: fix Rx RSS hash offload capability
> net/igc: fix Rx error counter for bad length
> net/e1000: fix Rx error counter for bad length
> net/e1000: fix max Rx packet size
> net/igc: fix Rx packet size
>
>Anatoly Burakov (2):
> fbarray: fix log message on truncation error
> power: do not skip saving original P-state governor
>
>Andrew Boyer (1):
> net/ionic: fix completion type in lif init
>
>Andrew Rybchenko (3):
> net/failsafe: fix RSS hash offload reporting
> net/failsafe: report minimum and maximum MTU
> common/sfc_efx: remove GENEVE from supported tunnels
>
>Ankur Dwivedi (1):
> crypto/octeontx: fix session-less mode
>
>Apeksha Gupta (1):
> examples/l2fwd-crypto: skip masked devices
>
>Arek Kusztal (1):
> crypto/qat: fix offset for out-of-place scatter-gather
>
>Beilei Xing (1):
> net/i40evf: fix packet loss for X722
>
>Bruce Richardson (1):
> build: exclude meson files from examples installation
>
>Chenbo Xia (1):
> examples/vhost: check memory table query
>
>Chengchang Tang (15):
> net/hns3: fix HW buffer size on MTU update
> net/hns3: fix processing Tx offload flags
> net/hns3: fix Tx checksum for UDP packets with special port
> net/hns3: fix long task queue pairs reset time
> ethdev: validate input in module EEPROM dump
> ethdev: validate input in register info
> ethdev: validate input in EEPROM info
> net/hns3: fix rollback after setting PVID failure
> net/hns3: fix timing in resetting queues
> net/hns3: fix queue state when concurrent with reset
> net/hns3: fix configure FEC when concurrent with reset
> net/hns3: fix use of command status enumeration
> examples: add eal cleanup to examples
> net/bonding: fix adding itself as its slave
> net/hns3: fix timing in mailbox
>
>Chengwen Feng (15):
> net/hns3: fix flow counter value
> net/hns3: fix VF mailbox head field
> net/hns3: support get device version when dump register
> net/hns3: fix some packet types
> net/hns3: fix missing outer L4 UDP flag for VXLAN
> net/hns3: remove VLAN/QinQ ptypes from support list
> test: check thread creation
> common/dpaax: fix possible null pointer access
> examples/ethtool: remove unused parsing
> net/hns3: fix flow director lock
> net/e1000/base: fix timeout for shadow RAM write
> net/hns3: fix setting default MAC address in bonding of VF
> net/hns3: fix possible mismatched response of mailbox
> net/hns3: fix VF handling LSC event in secondary process
> net/hns3: fix verification of NEON support
>
>Ciara Loftus (1):
> net/af_xdp: fix error handling during Rx queue setup
>
>Conor Walsh (1):
> examples/l3fwd: fix LPM IPv6 subnets
>
>Cristian Dumitrescu (3):
> table: fix actions with different data size
> pipeline: fix instruction translation
> pipeline: fix endianness conversions
>
>Dapeng Yu (3):
> net/igc: remove MTU setting limitation
> net/e1000: remove MTU setting limitation
> examples/packet_ordering: fix port configuration
>
>David Harton (1):
> net/ena: fix releasing Tx ring mbufs
>
>David Marchand (8):
> doc: fix sphinx rtd theme import in GHA
> service: clean references to removed symbol
> eal: fix evaluation of log level option
> ci: hook to GitHub Actions
> ci: enable v21 ABI checks
> ci: fix package installation in GitHub Actions
> ci: ignore APT update failure in GitHub Actions
> ci: catch coredumps
>
>Dekel Peled (1):
> common/mlx5: fix DevX read output buffer size
>
>Dmitry Kozlyuk (3):
> net/pcap: fix format string
> eal/windows: add missing SPDX license tag
> buildtools: fix all drivers disabled on Windows
>
>Ed Czeck (2):
> net/ark: update packet director initial state
> net/ark: refactor Rx buffer recovery
>
>Elad Nachman (2):
> kni: support async user request
> kni: fix kernel deadlock with bifurcated device
>
>Feifei Wang (2):
> net/i40e: fix parsing packet type for NEON
> test/trace: fix race on collected perf data
>
>Ferruh Yigit (3):
> power: remove duplicated symbols from map file
> log/linux: make default output stderr
> license: fix typos
>
>Guoyang Zhou (1):
> net/hinic: fix crash in secondary process
>
>Haiyue Wang (1):
> net/ixgbe: fix Rx errors statistics for UDP checksum
>
>Harman Kalra (1):
> event/octeontx2: fix device reconfigure for single slot
>
>Hongbo Zheng (3):
> app/testpmd: fix Tx/Rx descriptor query error log
> net/hns3: fix FLR miss detection
> net/hns3: delete redundant blank line
>
>Huisong Li (11):
> net/hns3: fix device capabilities for copper media type
> net/hns3: remove unused parameter markers
> net/hns3: fix reporting undefined speed
> net/hns3: fix link update when failed to get link info
> net/hns3: fix flow control exception
> app/testpmd: fix bitmap of link speeds when force speed
> net/hns3: fix flow control mode
> net/hns3: remove redundant mailbox response
> net/hns3: fix DCB mode check
> net/hns3: fix VMDq mode check
> net/hns3: fix mbuf leakage
>
>Ibtisam Tariq (1):
> examples/vhost_crypto: remove unused short option
>
>Igor Russkikh (2):
> net/qede: reduce log verbosity
> net/qede: accept bigger RSS table
>
>Ilya Maximets (1):
> net/virtio: fix interrupt unregistering for listening socket
>
>Ivan Malov (5):
> net/sfc: fix buffer size for flow parse
> net: fix comment in IPv6 header
> net/sfc: fix error path inconsistency
> common/sfc_efx/base: fix indication of MAE encap support
> net/sfc: fix outer rule rollback on error
>
>Jiawei Wang (2):
> app/testpmd: fix NVGRE encap configuration
> net/mlx5: fix resource release for mirror flow
>
>Jiawei Zhu (1):
> net/mlx5: fix Rx segmented packets on mbuf starvation
>
>Jiawen Wu (3):
> net/txgbe: remove unused functions
> net/txgbe: fix Rx missed packet counter
> net/txgbe: update packet type
>
>John Daley (1):
> net/enic: fix flow initialization error handling
>
>Kalesh AP (18):
> net/bnxt: remove unused macro
> net/bnxt: fix VNIC configuration
> net/bnxt: fix firmware fatal error handling
> net/bnxt: fix FW readiness check during recovery
> net/bnxt: fix device readiness check
> net/bnxt: fix VF info allocation
> net/bnxt: fix HWRM and FW incompatibility handling
> net/bnxt: mute some failure logs
> app/testpmd: check MAC address query
> net/bnxt: fix PCI write check
> net/bnxt: fix link state operations
> net/bnxt: fix timesync when PTP is not supported
> net/bnxt: fix memory allocation for command response
> net/bnxt: fix double free in port start failure
> net/bnxt: fix configuring LRO
> net/bnxt: fix health check alarm cancellation
> net/bnxt: fix PTP support for Thor
> net/bnxt: fix ring count calculation for Thor
>
>Kevin Traynor (1):
> test/cmdline: fix inputs array
>
>Lance Richardson (6):
> net/bnxt: fix Rx buffer posting
> net/bnxt: fix Tx length hint threshold
> net/bnxt: fix handling of null flow mask
> test: fix TCP header initialization
> net/bnxt: fix Rx descriptor status
> net/bnxt: fix Rx queue count
>
>Leyi Rong (1):
> net/iavf: fix packet length parsing in AVX512
>
>Li Zhang (1):
> net/mlx5: fix flow actions index in cache
>
>Luc Pelletier (2):
> eal: fix race in control thread creation
> eal: fix hang in control thread creation
>
>Marvin Liu (5):
> vhost: fix split ring potential buffer overflow
> vhost: fix packed ring potential buffer overflow
> vhost: fix batch dequeue potential buffer overflow
> vhost: fix initialization of temporary header
> vhost: fix initialization of async temporary header
>
>Matan Azrad (4):
> common/mlx5/linux: add glue function to query WQ
> common/mlx5: add DevX command to query WQ
> common/mlx5: add DevX commands for queue counters
> vdpa/mlx5: fix virtq cleaning
>
>Min Hu (Connor) (8):
> net/hns3: fix MTU config complexity
> net/hns3: update HiSilicon copyright syntax
> net/hns3: fix copyright date
> examples/ptpclient: remove wrong comment
> test/bpf: fix error message
> doc: fix HiSilicon copyright syntax
> net/hns3: remove unused macros
> net/hns3: remove unused macro
>
>Murphy Yang (3):
> net/ixgbe: fix RSS RETA being reset after port start
> net/i40e: fix flow director config after flow validate
> net/i40e: fix flow director for common pctypes
>
>Natanael Copa (5):
> common/dpaax/caamflib: fix build with musl
> bus/dpaa: fix 64-bit arch detection
> bus/dpaa: fix build with musl
> net/cxgbe: remove use of uint type
> app/testpmd: fix build with musl
>
>Nipun Gupta (1):
> bus/dpaa: fix statistics reading
>
>Nithin Dabilpuram (3):
> vfio: do not merge contiguous areas
> vfio: fix DMA mapping granularity for IOVA as VA
> test/mem: fix page size for external memory
>
>Pallavi Kadam (1):
> bus/pci: skip probing some Windows NDIS devices
>
>Pavan Nikhilesh (2):
> test/event: fix timeout accuracy
> app/eventdev: fix timeout accuracy
>
>Pu Xu (1):
> ip_frag: fix fragmenting IPv4 packet with header option
>
>Qi Zhang (7):
> net/ice/base: fix payload indicator on ptype
> net/ice/base: fix uninitialized struct
> net/ice/base: cleanup filter list on error
> net/ice/base: fix memory allocation for MAC addresses
> net/iavf: fix TSO max segment size
> doc: fix matching versions in ice guide
> net/iavf: fix wrong Tx context descriptor
>
>Radha Mohan Chintakuntla (1):
> raw/octeontx2_dma: assign PCI device in DPI VF
>
>Raslan Darawsheh (1):
> ethdev: update flow item GTP QFI definition
>
>Richael Zhuang (2):
> test/power: add delay before checking CPU frequency
> test/power: round CPU frequency to check
>
>Robin Zhang (4):
> net/i40e: announce request queue capability in PF
> doc: update recommended versions for i40e
> net/i40e: fix lack of MAC type when set MAC address
> net/iavf: fix lack of MAC type when set MAC address
>
>Rohit Raj (3):
> net/dpaa2: fix getting link status
> net/dpaa: fix getting link status
> examples/l2fwd-crypto: fix packet length while decryption
>
>Roy Shterman (1):
> mem: fix freeing segments in --huge-unlink mode
>
>Satheesh Paul (1):
> net/octeontx2: fix VLAN filter
>
>Savinay Dharmappa (1):
> sched: fix traffic class oversubscription parameter
>
>Shijith Thotton (1):
> eventdev: fix case to initiate crypto adapter service
>
>Siwar Zitouni (1):
> net/ice: fix disabling promiscuous mode
>Somnath Kotur (3):
> net/bnxt: fix xstats get
> net/bnxt: fix Rx and Tx timestamps
> net/bnxt: fix Tx timestamp init
>
>Stanislaw Kardach (1):
> test: proceed if timer subsystem already initialized
>
>Stephen Hemminger (1):
> kni: refactor user request processing
>
>Tal Shnaiderman (2):
> eal/windows: fix default thread priority
> eal/windows: fix return codes of pthread shim layer
>
>Tengfei Zhang (1):
> net/pcap: fix file descriptor leak on close
>
>Thinh Tran (1):
> test: fix autotest handling of skipped tests
>
>Thomas Monjalon (16):
> bus/pci: fix Windows kernel driver categories
> eal: fix comment of OS-specific header files
> buildtools: fix build with busybox
> build: detect execinfo library on Linux
> build: remove redundant _GNU_SOURCE definitions
> eal: fix build with musl
> net/igc: remove use of uint type
> event/dlb: fix header includes for musl
> examples/bbdev: fix header include for musl
> drivers: fix log level after loading
> app/regex: fix usage text
> app/testpmd: fix usage text
> doc: fix names of UIO drivers
> doc: fix build with Sphinx 4
> bus/pci: support I/O port operations with musl
> app: fix exit messages
>
>Tyler Retzlaff (1):
> eal: add C++ include guard for reciprocal header
>
>Vadim Podovinnikov (1):
> net/bonding: fix LACP system address check
>
>Venkat Duvvuru (1):
> net/bnxt: fix queues per VNIC
>
>Viacheslav Ovsiienko (11):
> net/mlx5: fix external buffer pool registration for Rx queue
> net/mlx5: fix metadata item validation for ingress flows
> net/mlx5: fix hashed list size for tunnel flow groups
> net/mlx5: fix UAR allocation diagnostics messages
> common/mlx5: add timestamp format support to DevX
> vdpa/mlx5: support timestamp format
> net/mlx5: fix Rx metadata leftovers
> net/mlx5: fix drop action for Direct Rules/Verbs
> net/mlx4: fix RSS action with null hash key
> net/mlx5: support timestamp format
> regex/mlx5: support timestamp format
>
>Wenjun Wu (2):
> net/ice: check some functions return
> net/ice: fix RSS hash update
>
>Wenwu Ma (1):
> net/ice: fix illegal access when removing MAC filter
>
>Wenzhuo Lu (2):
> net/iavf: fix crash in AVX512
> net/ice: fix crash in AVX512
>
>Wisam Jaddo (1):
> app/flow-perf: fix encap/decap actions
>
>Xiao Wang (1):
> vdpa/ifc: check PCI config read
>
>Xiaoyu Min (4):
> net/mlx5: support RSS expansion for IPv6 GRE
> net/mlx5: fix shared inner RSS
> net/mlx5: fix missing shared RSS hash types
> net/mlx5: fix redundant flow after RSS expansion
>
>Xiaoyun Li (2):
> app/testpmd: remove unnecessary UDP tunnel check
> net/i40e: fix IPv4 fragment offload
>
>Youri Querry (1):
> bus/fslmc: fix random portal hangs with qbman 5.0
>
>Yunjian Wang (3):
> vfio: fix API description
> net/mlx5: fix using flow tunnel before null check
> vfio: fix duplicated user mem map
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH v9 10/10] Enable the new EAL thread API
2021-06-08 5:50 5% ` Narcisa Ana Maria Vasile
@ 2021-06-08 7:45 5% ` David Marchand
2021-06-18 21:53 0% ` Narcisa Ana Maria Vasile
0 siblings, 1 reply; 200+ results
From: David Marchand @ 2021-06-08 7:45 UTC (permalink / raw)
To: Narcisa Ana Maria Vasile
Cc: dev, Thomas Monjalon, Dmitry Kozlyuk, Khoa To, navasile,
Dmitry Malloy (MESHCHANINOV),
roretzla, Tal Shnaiderman, Omar Cardona, Bruce Richardson,
Pallavi Kadam
On Tue, Jun 8, 2021 at 7:50 AM Narcisa Ana Maria Vasile
<navasile@linux.microsoft.com> wrote:
>
> On Fri, Jun 04, 2021 at 04:44:34PM -0700, Narcisa Ana Maria Vasile wrote:
> > From: Narcisa Vasile <navasile@microsoft.com>
> >
> > Rename pthread_* occurrences with the new rte_thread_* API.
> > Enable the new API in the build system.
> >
> > Signed-off-by: Narcisa Vasile <navasile@microsoft.com>
> > ---
>
> I'll send v10.
> Can someone please help with an example on how to check for ABI breaks? Thank you!
>
> I've run:
> DPDK_ABI_REF_VERSION=v21.05 DPDK_ABI_REF_DIR=~/ref ./devtools/test-meson-builds.sh
> which doesn't give any warnings about the ABI break.
This should work the way you tried if you have working toolchains and
libabigail installed.
Something is off in your env.
Side note: ovsrobot is out those days (we have some trouble in one of
RH labs and it happens ovsrobot is hosted there), but you could try
with a github repo of yours + GHA, and the ABI failure should be
caught too.
I just tried on my rhel7 (gcc 4.8.5 + libabigail 1.8.2) with your
series applied.
$ DPDK_ABI_REF_VERSION=v21.05
DPDK_ABI_REF_DIR=~/git/pub/dpdk.org/reference
./devtools/test-meson-builds.sh
...
Error: ABI issue reported for 'abidiff --suppr
/home/dmarchan/git/pub/dpdk.org/devtools/../devtools/libabigail.abignore
--no-added-syms --headers-dir1
/home/dmarchan/git/pub/dpdk.org/reference/v21.05/build-gcc-shared/usr/local/include
--headers-dir2 /home/dmarchan/git/pub/dpdk.org/build-gcc-shared/install/usr/local/include
/home/dmarchan/git/pub/dpdk.org/reference/v21.05/build-gcc-shared/dump/librte_eal.dump
/home/dmarchan/git/pub/dpdk.org/build-gcc-shared/install/dump/librte_eal.dump'
ABIDIFF_ABI_CHANGE, this change requires a review (abidiff flagged
this as a potential issue).
$ abidiff --suppr
/home/dmarchan/git/pub/dpdk.org/devtools/../devtools/libabigail.abignore
--no-added-syms --headers-dir1
/home/dmarchan/git/pub/dpdk.org/reference/v21.05/build-gcc-shared/usr/local/include
--headers-dir2 /home/dmarchan/git/pub/dpdk.org/build-gcc-shared/install/usr/local/include
/home/dmarchan/git/pub/dpdk.org/reference/v21.05/build-gcc-shared/dump/librte_eal.dump
/home/dmarchan/git/pub/dpdk.org/build-gcc-shared/install/dump/librte_eal.dump
Functions changes summary: 0 Removed, 2 Changed (1 filtered out), 0
Added (20 filtered out) functions
Variables changes summary: 0 Removed, 0 Changed, 0 Added variable
2 functions with some indirect sub-type change:
[C] 'function int rte_ctrl_thread_create(pthread_t*, const char*,
const pthread_attr_t*, void* (void*)*, void*)' at rte_lcore.h:443:1
has some indirect sub-type changes:
parameter 1 of type 'pthread_t*' changed:
in pointed to type 'typedef pthread_t' at rte_thread.h:42:1:
typedef name changed from pthread_t to rte_thread_t at rte_thread.h:42:1
underlying type 'unsigned long int' changed:
entity changed from 'unsigned long int' to 'struct
rte_thread_tag' at rte_thread.h:40:1
type size hasn't changed
parameter 3 of type 'const pthread_attr_t*' changed:
in pointed to type 'const pthread_attr_t':
'const pthread_attr_t' changed to 'const rte_thread_attr_t'
[C] 'function int rte_thread_setname(pthread_t, const char*)' at
rte_lcore.h:377:1 has some indirect sub-type changes:
parameter 1 of type 'typedef pthread_t' changed:
typedef name changed from pthread_t to rte_thread_t at rte_thread.h:42:1
underlying type 'unsigned long int' changed:
entity changed from 'unsigned long int' to 'struct
rte_thread_tag' at rte_thread.h:40:1
type size hasn't changed
Can you check that in your env build-gcc-shared/ and the build
directory for references are configured with debug symbols?
You should see:
$ meson configure build-gcc-shared | awk '$1=="buildtype" {print $2}'
debugoptimized
$ meson configure reference/v21.05/build | awk '$1=="buildtype" {print $2}'
debugoptimized
>
> I've cloned the dpdk repo in "~/ref" and checkout v21.05 tag.
> "~/dpdk" is on a local branch that contains my changes:
>
> "./devtools/check-abi.sh ~/ref ~/dpdk" - didn't work.
>
> I've then used gen-abi.sh (with a small change to skip the *.symbols,
> since abidw can't handle them) to generate the *.dump files. Reruning check-abi.sh
gen-abi.sh is an internal script that works for an installed dpdk, not
a build directory.
$ ./devtools/gen-abi.sh
Usage: ./devtools/gen-abi.sh installdir
> worked this time, but didn't show the ABI break. This is the entire output:
>
> ------
> WARNING: could not identify an include directory for /home/administrator/ref, expect false positives...
> WARNING: could not identify an include directory for /home/administrator/dpdk, expect false positives...
check-abi.sh tries to find an include/ directory to filter changes on
private structures.
But there are multiple include/ dirs in a build directory, so the
script gives up on trying to filter and logs a warning.
This is not clearly written but, like gen-abi.sh, check-abi.sh works
on an installed directory.
> Functions changes summary: 0 Removed, 0 Changed, 0 Added function
> Variables changes summary: 0 Removed, 0 Changed, 0 Added variable
> Variable symbols changes summary: 0 Removed, 0 Added variable symbol not referenced by debug info
> ------
>
> I've also tried to compare each file:
> abidiff --suppr ./devtools/libabigail.abignore --no-added-syms ~/ref/dump/librte_eal.dump ~/dpdk/dump/librte_eal.dump
>
Without debug info, libabigail won't catch/report much but symbol
removals, or basic changes in function signatures.
--
David Marchand
^ permalink raw reply [relevance 5%]
* Re: [dpdk-dev] [PATCH v9 10/10] Enable the new EAL thread API
@ 2021-06-08 5:50 5% ` Narcisa Ana Maria Vasile
2021-06-08 7:45 5% ` David Marchand
0 siblings, 1 reply; 200+ results
From: Narcisa Ana Maria Vasile @ 2021-06-08 5:50 UTC (permalink / raw)
To: dev, thomas, dmitry.kozliuk, khot, navasile, dmitrym, roretzla,
talshn, ocardona
Cc: bruce.richardson, david.marchand, pallavi.kadam
On Fri, Jun 04, 2021 at 04:44:34PM -0700, Narcisa Ana Maria Vasile wrote:
> From: Narcisa Vasile <navasile@microsoft.com>
>
> Rename pthread_* occurrences with the new rte_thread_* API.
> Enable the new API in the build system.
>
> Signed-off-by: Narcisa Vasile <navasile@microsoft.com>
> ---
I'll send v10.
Can someone please help with an example on how to check for ABI breaks? Thank you!
I've run:
DPDK_ABI_REF_VERSION=v21.05 DPDK_ABI_REF_DIR=~/ref ./devtools/test-meson-builds.sh
which doesn't give any warnings about the ABI break.
I've cloned the dpdk repo in "~/ref" and checkout v21.05 tag.
"~/dpdk" is on a local branch that contains my changes:
"./devtools/check-abi.sh ~/ref ~/dpdk" - didn't work.
I've then used gen-abi.sh (with a small change to skip the *.symbols,
since abidw can't handle them) to generate the *.dump files. Reruning check-abi.sh
worked this time, but didn't show the ABI break. This is the entire output:
------
WARNING: could not identify an include directory for /home/administrator/ref, expect false positives...
WARNING: could not identify an include directory for /home/administrator/dpdk, expect false positives...
Functions changes summary: 0 Removed, 0 Changed, 0 Added function
Variables changes summary: 0 Removed, 0 Changed, 0 Added variable
Variable symbols changes summary: 0 Removed, 0 Added variable symbol not referenced by debug info
------
I've also tried to compare each file:
abidiff --suppr ./devtools/libabigail.abignore --no-added-syms ~/ref/dump/librte_eal.dump ~/dpdk/dump/librte_eal.dump
^ permalink raw reply [relevance 5%]
* Re: [dpdk-dev] [RFC PATCH 0/3] Add PIE support for HQoS library
2021-05-25 8:56 0% ` Morten Brørup
@ 2021-06-07 13:01 0% ` Liguzinski, WojciechX
0 siblings, 0 replies; 200+ results
From: Liguzinski, WojciechX @ 2021-06-07 13:01 UTC (permalink / raw)
To: Morten Brørup, Singh, Jasvinder, Dumitrescu, Cristian
Cc: Dharmappa, Savinay, dev
> -----Original Message-----
> From: Morten Brørup <mb@smartsharesystems.com>
> Sent: Tuesday, May 25, 2021 10:57 AM
> To: Liguzinski, WojciechX <wojciechx.liguzinski@intel.com>; dev@dpdk.org; Singh, Jasvinder <jasvinder.singh@intel.com>; Dumitrescu, Cristian <cristian.dumitrescu@intel.com>
> Cc: Dharmappa, Savinay <savinay.dharmappa@intel.com>
> Subject: RE: [dpdk-dev] [RFC PATCH 0/3] Add PIE support for HQoS library
>
> > From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Liguzinski,
> > WojciechX
> > Sent: Monday, 24 May 2021 12.58
> >
> > DPDK sched library is equipped with mechanism that secures it from the
> > bufferbloat problem which is a situation when excess buffers in the
> > network cause high latency and latency variation. Currently, it
> > supports RED for queue congestion control
>
> The correct term is "active queue management", not "queue congestion control".
Good point. I will correct the naming.
>
> > (which is designed
> > to control the queue length but it does not control latency directly
> > and is now being obsoleted ).
>
> Some might prefer other algorithms, such as PIE, CoDel, CAKE, etc., but RED is not obsolete!
I didn't write that it is obsolete, I just shortened what was written in the RFC (8033) on page 4:
"(...) AQM schemes, such as Random Early Detection
(RED) [RED] as suggested in [RFC2309] (which is now obsoleted by
[RFC7567]), have been around for well over a decade. RED is
implemented in a wide variety of network devices, both in hardware
and software. Unfortunately, due to the fact that RED needs careful
tuning of its parameters for various network conditions, most network
operators don't turn RED on. (...)"
Apologies if I weren't precise when thinking about such a summary. :-)
>
> > However, more advanced queue management is required to address this
> > problem and provide desirable quality of service to users.
> >
> > This solution (RFC) proposes usage of new algorithm called "PIE"
> > (Proportional Integral
> > controller Enhanced) that can effectively and directly control queuing
> > latency to address the bufferbloat problem.
> >
> > The implementation of mentioned functionality includes modification of
> > existing and adding a new set of data structures to the library,
> > adding PIE related APIs.
> > This affects structures in public API/ABI. That is why deprecation
> > notice is going to be prepared and sent.
> >
> >
> > Liguzinski, WojciechX (3):
> > sched: add pie based congestion management
> > example/qos_sched: add pie support
> > example/ip_pipeline: add pie support
>
> It's "PIE", not "pie". :-)
Sure, I will make a proper naming corrections ;-)
>
> Nonetheless, the RFC looks good!
>
> -Morten
Thanks,
Wojciech
^ permalink raw reply [relevance 0%]
* [dpdk-dev] [PATCH v9 00/10] eal: Add EAL API for threading
2021-06-04 23:38 2% ` [dpdk-dev] [PATCH v8 " Narcisa Ana Maria Vasile
@ 2021-06-04 23:44 2% ` Narcisa Ana Maria Vasile
` (2 more replies)
0 siblings, 3 replies; 200+ results
From: Narcisa Ana Maria Vasile @ 2021-06-04 23:44 UTC (permalink / raw)
To: dev, thomas, dmitry.kozliuk, khot, navasile, dmitrym, roretzla,
talshn, ocardona
Cc: bruce.richardson, david.marchand, pallavi.kadam
From: Narcisa Vasile <navasile@microsoft.com>
EAL thread API
**Problem Statement**
DPDK currently uses the pthread interface to create and manage threads.
Windows does not support the POSIX thread programming model, so it currently
relies on a header file that hides the Windows calls under
pthread matched interfaces. Given that EAL should isolate the environment
specifics from the applications and libraries and mediate
all the communication with the operating systems, a new EAL interface
is needed for thread management.
**Goals**
* Introduce a generic EAL API for threading support that will remove
the current Windows pthread.h shim.
* Replace references to pthread_* across the DPDK codebase with the new
RTE_THREAD_* API.
* Allow users to choose between using the RTE_THREAD_* API or a
3rd party thread library through a configuration option.
**Design plan**
New API main files:
* rte_thread.h (librte_eal/include)
* rte_thread_types.h (librte_eal/include)
* rte_thread_windows_types.h (librte_eal/windows/include)
* rte_thread.c (librte_eal/windows)
* rte_thread.c (librte_eal/common)
For flexibility, the user is offered the option of either using the RTE_THREAD_* API or
a 3rd party thread library, through a meson flag “use_external_thread_lib”.
By default, this flag is set to FALSE, which means Windows libraries and applications
will use the RTE_THREAD_* API for managing threads.
If compiling on Windows and the “use_external_thread_lib” is *not* set,
the following files will be parsed:
* include/rte_thread.h
* windows/include/rte_thread_windows_types.h
* windows/rte_thread.c
In all other cases, the compilation/parsing includes the following files:
* include/rte_thread.h
* include/rte_thread_types.h
* common/rte_thread.c
**A schematic example of the design**
--------------------------------------------------
lib/librte_eal/include/rte_thread.h
int rte_thread_create();
lib/librte_eal/common/rte_thread.c
int rte_thread_create()
{
return pthread_create();
}
lib/librte_eal/windows/rte_thread.c
int rte_thread_create()
{
return CreateThread();
}
lib/librte_eal/windows/meson.build
if get_option('use_external_thread_lib')
sources += 'librte_eal/common/rte_thread.c'
else
sources += 'librte_eal/windows/rte_thread.c'
endif
-----------------------------------------------------
**Thread attributes**
When or after a thread is created, specific characteristics of the thread
can be adjusted. Given that the thread characteristics that are of interest
for DPDK applications are affinity and priority, the following structure
that represents thread attributes has been defined:
typedef struct
{
enum rte_thread_priority priority;
rte_cpuset_t cpuset;
} rte_thread_attr_t;
The *rte_thread_create()* function can optionally receive an rte_thread_attr_t
object that will cause the thread to be created with the affinity and priority
described by the attributes object. If no rte_thread_attr_t is passed
(parameter is NULL), the default affinity and priority are used.
An rte_thread_attr_t object can also be set to the default values
by calling *rte_thread_attr_init()*.
*Priority* is represented through an enum that currently advertises
two values for priority:
- RTE_THREAD_PRIORITY_NORMAL
- RTE_THREAD_PRIORITY_REALTIME_CRITICAL
The enum can be extended to allow for multiple priority levels.
rte_thread_set_priority - sets the priority of a thread
rte_thread_attr_set_priority - updates an rte_thread_attr_t object
with a new value for priority
The user can choose thread priority through an EAL parameter,
when starting an application. If EAL parameter is not used,
the per-platform default value for thread priority is used.
Otherwise administrator has an option to set one of available options:
--thread-prio normal
--thread-prio realtime
Example:
./dpdk-l2fwd -l 0-3 -n 4 –thread-prio normal -- -q 8 -p ffff
*Affinity* is described by the already known “rte_cpuset_t” type.
rte_thread_attr_set/get_affinity - sets/gets the affinity field in a
rte_thread_attr_t object
rte_thread_set/get_affinity – sets/gets the affinity of a thread
**Errors**
A translation function that maps Windows error codes to errno-style
error codes is provided.
**Future work**
Note that this patchset was focused on introducing new API that will
remove the Windows pthread.h shim. In DPDK, there are still a few references
to pthread_* that were not implemented in the shim.
The long term plan is for EAL to provide full threading support:
* Adding support for conditional variables
* Additional functionality offered by pthread_* (such as pthread_setname_np, etc.)
* Static mutex initializers are not used on Windows. If we must continue
using them, they need to be platform dependent and an implementation will
need to be provided for Windows.
v9:
- Sign patches
v8:
- Rebase
- Add rte_thread_detach() API
- Set default priority, when user did not specify a value
v7:
Based on DmitryK's review:
- Change thread id representation
- Change mutex id representation
- Implement static mutex inititalizer for Windows
- Change barrier identifier representation
- Improve commit messages
- Add missing doxygen comments
- Split error translation function
- Improve name for affinity function
- Remove cpuset_size parameter
- Fix eal_create_cpu_map function
- Map EAL priority values to OS specific values
- Add thread wrapper for start routine
- Do not export rte_thread_cancel() on Windows
- Cleanup, fix comments, fix typos.
v6:
- improve error-translation function
- call the error translation function in rte_thread_value_get()
v5:
- update cover letter with more details on the priority argument
v4:
- fix function description
- rebase
v3:
- rebase
v2:
- revert changes that break ABI
- break up changes into smaller patches
- fix coding style issues
- fix issues with errors
- fix parameter type in examples/kni.c
Narcisa Vasile (10):
eal: add thread id and simple thread functions
eal: add thread attributes
eal/windows: translate Windows errors to errno-style errors
eal: implement functions for thread affinity management
eal: implement thread priority management functions
eal: add thread lifetime management
eal: implement functions for mutex management
eal: implement functions for thread barrier management
eal: add EAL argument for setting thread priority
Enable the new EAL thread API
app/test/process.h | 8 +-
app/test/test_lcores.c | 16 +-
app/test/test_link_bonding.c | 10 +-
app/test/test_lpm_perf.c | 12 +-
config/meson.build | 4 +
drivers/bus/dpaa/base/qbman/bman_driver.c | 5 +-
drivers/bus/dpaa/base/qbman/dpaa_sys.c | 14 +-
drivers/bus/dpaa/base/qbman/process.c | 6 +-
drivers/bus/dpaa/dpaa_bus.c | 14 +-
drivers/bus/fslmc/portal/dpaa2_hw_dpio.c | 19 +-
drivers/compress/mlx5/mlx5_compress.c | 10 +-
drivers/event/dlb2/pf/base/dlb2_osdep.h | 4 +-
drivers/net/af_xdp/rte_eth_af_xdp.c | 18 +-
drivers/net/ark/ark_ethdev.c | 2 +-
drivers/net/ark/ark_pktgen.c | 4 +-
drivers/net/atlantic/atl_ethdev.c | 4 +-
drivers/net/atlantic/atl_types.h | 5 +-
.../net/atlantic/hw_atl/hw_atl_utils_fw2x.c | 26 +-
drivers/net/axgbe/axgbe_common.h | 2 +-
drivers/net/axgbe/axgbe_dev.c | 8 +-
drivers/net/axgbe/axgbe_ethdev.c | 8 +-
drivers/net/axgbe/axgbe_ethdev.h | 8 +-
drivers/net/axgbe/axgbe_i2c.c | 4 +-
drivers/net/axgbe/axgbe_mdio.c | 8 +-
drivers/net/axgbe/axgbe_phy_impl.c | 6 +-
drivers/net/bnxt/bnxt.h | 16 +-
drivers/net/bnxt/bnxt_cpr.c | 4 +-
drivers/net/bnxt/bnxt_ethdev.c | 52 +-
drivers/net/bnxt/bnxt_irq.c | 8 +-
drivers/net/bnxt/bnxt_reps.c | 10 +-
drivers/net/bnxt/tf_ulp/bnxt_ulp.c | 34 +-
drivers/net/bnxt/tf_ulp/bnxt_ulp.h | 4 +-
drivers/net/bnxt/tf_ulp/ulp_fc_mgr.c | 24 +-
drivers/net/bnxt/tf_ulp/ulp_fc_mgr.h | 2 +-
drivers/net/ena/base/ena_plat_dpdk.h | 12 +-
drivers/net/enic/enic.h | 2 +-
drivers/net/ice/ice_dcf_parent.c | 6 +-
drivers/net/ipn3ke/ipn3ke_representor.c | 6 +-
drivers/net/ixgbe/ixgbe_ethdev.c | 2 +-
drivers/net/ixgbe/ixgbe_ethdev.h | 2 +-
drivers/net/kni/rte_eth_kni.c | 8 +-
drivers/net/mlx5/linux/mlx5_os.c | 2 +-
drivers/net/mlx5/mlx5.c | 20 +-
drivers/net/mlx5/mlx5.h | 2 +-
drivers/net/mlx5/mlx5_txpp.c | 8 +-
drivers/net/mlx5/windows/mlx5_flow_os.c | 10 +-
drivers/net/mlx5/windows/mlx5_os.c | 2 +-
drivers/net/qede/base/bcm_osal.h | 8 +-
drivers/net/vhost/rte_eth_vhost.c | 24 +-
.../net/virtio/virtio_user/virtio_user_dev.c | 30 +-
.../net/virtio/virtio_user/virtio_user_dev.h | 2 +-
drivers/raw/ifpga/ifpga_rawdev.c | 6 +-
drivers/vdpa/ifc/ifcvf_vdpa.c | 46 +-
drivers/vdpa/mlx5/mlx5_vdpa.c | 24 +-
drivers/vdpa/mlx5/mlx5_vdpa.h | 4 +-
drivers/vdpa/mlx5/mlx5_vdpa_event.c | 46 +-
examples/kni/main.c | 6 +-
.../performance-thread/pthread_shim/main.c | 2 +-
examples/vhost/main.c | 2 +-
examples/vhost_blk/vhost_blk.c | 12 +-
lib/eal/common/eal_common_options.c | 34 +-
lib/eal/common/eal_common_proc.c | 48 +-
lib/eal/common/eal_common_thread.c | 42 +-
lib/eal/common/eal_common_trace.c | 2 +-
lib/eal/common/eal_internal_cfg.h | 2 +
lib/eal/common/eal_options.h | 2 +
lib/eal/common/eal_private.h | 2 +-
lib/eal/common/eal_thread.h | 6 +
lib/eal/common/malloc_mp.c | 32 +-
lib/eal/common/meson.build | 1 +
lib/eal/common/rte_thread.c | 422 +++++++++++
lib/eal/freebsd/eal.c | 42 +-
lib/eal/freebsd/eal_alarm.c | 12 +-
lib/eal/freebsd/eal_interrupts.c | 4 +-
lib/eal/freebsd/eal_thread.c | 14 +-
lib/eal/include/meson.build | 1 +
lib/eal/include/rte_lcore.h | 8 +-
lib/eal/include/rte_per_lcore.h | 2 -
lib/eal/include/rte_thread.h | 378 +++++++++-
lib/eal/include/rte_thread_types.h | 14 +
lib/eal/linux/eal.c | 46 +-
lib/eal/linux/eal_alarm.c | 10 +-
lib/eal/linux/eal_interrupts.c | 4 +-
lib/eal/linux/eal_thread.c | 18 +-
lib/eal/linux/eal_timer.c | 2 +-
lib/eal/unix/meson.build | 1 -
lib/eal/unix/rte_thread.c | 92 ---
lib/eal/version.map | 22 +
lib/eal/windows/eal.c | 43 +-
lib/eal/windows/eal_interrupts.c | 10 +-
lib/eal/windows/eal_lcore.c | 169 +++--
lib/eal/windows/eal_thread.c | 28 +-
lib/eal/windows/eal_windows.h | 20 +-
lib/eal/windows/include/meson.build | 1 +
lib/eal/windows/include/pthread.h | 192 -----
.../include/rte_windows_thread_types.h | 19 +
lib/eal/windows/include/sched.h | 2 +-
lib/eal/windows/meson.build | 7 +-
lib/eal/windows/rte_thread.c | 678 +++++++++++++++++-
lib/ethdev/rte_ethdev.c | 4 +-
lib/ethdev/rte_ethdev_core.h | 5 +-
lib/ethdev/rte_flow.c | 4 +-
lib/eventdev/rte_event_eth_rx_adapter.c | 6 +-
lib/vhost/fd_man.c | 40 +-
lib/vhost/fd_man.h | 6 +-
lib/vhost/socket.c | 130 ++--
lib/vhost/vhost.c | 10 +-
meson_options.txt | 2 +
108 files changed, 2345 insertions(+), 967 deletions(-)
create mode 100644 lib/eal/common/rte_thread.c
create mode 100644 lib/eal/include/rte_thread_types.h
delete mode 100644 lib/eal/unix/rte_thread.c
delete mode 100644 lib/eal/windows/include/pthread.h
create mode 100644 lib/eal/windows/include/rte_windows_thread_types.h
--
2.31.0.vfs.0.1
^ permalink raw reply [relevance 2%]
* [dpdk-dev] [PATCH v8 00/10] eal: Add EAL API for threading
2021-06-01 20:55 2% ` [dpdk-dev] [PATCH v7 00/10] eal: Add EAL " Narcisa Ana Maria Vasile
@ 2021-06-04 23:38 2% ` Narcisa Ana Maria Vasile
2021-06-04 23:44 2% ` [dpdk-dev] [PATCH v9 " Narcisa Ana Maria Vasile
0 siblings, 1 reply; 200+ results
From: Narcisa Ana Maria Vasile @ 2021-06-04 23:38 UTC (permalink / raw)
To: dev, thomas, dmitry.kozliuk, khot, navasile, dmitrym, roretzla,
talshn, ocardona
Cc: bruce.richardson, david.marchand, pallavi.kadam
From: Narcisa Vasile <navasile@microsoft.com>
EAL thread API
**Problem Statement**
DPDK currently uses the pthread interface to create and manage threads.
Windows does not support the POSIX thread programming model, so it currently
relies on a header file that hides the Windows calls under
pthread matched interfaces. Given that EAL should isolate the environment
specifics from the applications and libraries and mediate
all the communication with the operating systems, a new EAL interface
is needed for thread management.
**Goals**
* Introduce a generic EAL API for threading support that will remove
the current Windows pthread.h shim.
* Replace references to pthread_* across the DPDK codebase with the new
RTE_THREAD_* API.
* Allow users to choose between using the RTE_THREAD_* API or a
3rd party thread library through a configuration option.
**Design plan**
New API main files:
* rte_thread.h (librte_eal/include)
* rte_thread_types.h (librte_eal/include)
* rte_thread_windows_types.h (librte_eal/windows/include)
* rte_thread.c (librte_eal/windows)
* rte_thread.c (librte_eal/common)
For flexibility, the user is offered the option of either using the RTE_THREAD_* API or
a 3rd party thread library, through a meson flag “use_external_thread_lib”.
By default, this flag is set to FALSE, which means Windows libraries and applications
will use the RTE_THREAD_* API for managing threads.
If compiling on Windows and the “use_external_thread_lib” is *not* set,
the following files will be parsed:
* include/rte_thread.h
* windows/include/rte_thread_windows_types.h
* windows/rte_thread.c
In all other cases, the compilation/parsing includes the following files:
* include/rte_thread.h
* include/rte_thread_types.h
* common/rte_thread.c
**A schematic example of the design**
--------------------------------------------------
lib/librte_eal/include/rte_thread.h
int rte_thread_create();
lib/librte_eal/common/rte_thread.c
int rte_thread_create()
{
return pthread_create();
}
lib/librte_eal/windows/rte_thread.c
int rte_thread_create()
{
return CreateThread();
}
lib/librte_eal/windows/meson.build
if get_option('use_external_thread_lib')
sources += 'librte_eal/common/rte_thread.c'
else
sources += 'librte_eal/windows/rte_thread.c'
endif
-----------------------------------------------------
**Thread attributes**
When or after a thread is created, specific characteristics of the thread
can be adjusted. Given that the thread characteristics that are of interest
for DPDK applications are affinity and priority, the following structure
that represents thread attributes has been defined:
typedef struct
{
enum rte_thread_priority priority;
rte_cpuset_t cpuset;
} rte_thread_attr_t;
The *rte_thread_create()* function can optionally receive an rte_thread_attr_t
object that will cause the thread to be created with the affinity and priority
described by the attributes object. If no rte_thread_attr_t is passed
(parameter is NULL), the default affinity and priority are used.
An rte_thread_attr_t object can also be set to the default values
by calling *rte_thread_attr_init()*.
*Priority* is represented through an enum that currently advertises
two values for priority:
- RTE_THREAD_PRIORITY_NORMAL
- RTE_THREAD_PRIORITY_REALTIME_CRITICAL
The enum can be extended to allow for multiple priority levels.
rte_thread_set_priority - sets the priority of a thread
rte_thread_attr_set_priority - updates an rte_thread_attr_t object
with a new value for priority
The user can choose thread priority through an EAL parameter,
when starting an application. If EAL parameter is not used,
the per-platform default value for thread priority is used.
Otherwise administrator has an option to set one of available options:
--thread-prio normal
--thread-prio realtime
Example:
./dpdk-l2fwd -l 0-3 -n 4 –thread-prio normal -- -q 8 -p ffff
*Affinity* is described by the already known “rte_cpuset_t” type.
rte_thread_attr_set/get_affinity - sets/gets the affinity field in a
rte_thread_attr_t object
rte_thread_set/get_affinity – sets/gets the affinity of a thread
**Errors**
A translation function that maps Windows error codes to errno-style
error codes is provided.
**Future work**
Note that this patchset was focused on introducing new API that will
remove the Windows pthread.h shim. In DPDK, there are still a few references
to pthread_* that were not implemented in the shim.
The long term plan is for EAL to provide full threading support:
* Adding support for conditional variables
* Additional functionality offered by pthread_* (such as pthread_setname_np, etc.)
* Static mutex initializers are not used on Windows. If we must continue
using them, they need to be platform dependent and an implementation will
need to be provided for Windows.
v8:
- Rebase
- Add rte_thread_detach() API
- Set default priority, when user did not specify a value
v7:
Based on DmitryK's review:
- Change thread id representation
- Change mutex id representation
- Implement static mutex inititalizer for Windows
- Change barrier identifier representation
- Improve commit messages
- Add missing doxygen comments
- Split error translation function
- Improve name for affinity function
- Remove cpuset_size parameter
- Fix eal_create_cpu_map function
- Map EAL priority values to OS specific values
- Add thread wrapper for start routine
- Do not export rte_thread_cancel() on Windows
- Cleanup, fix comments, fix typos.
v6:
- improve error-translation function
- call the error translation function in rte_thread_value_get()
v5:
- update cover letter with more details on the priority argument
v4:
- fix function description
- rebase
v3:
- rebase
v2:
- revert changes that break ABI
- break up changes into smaller patches
- fix coding style issues
- fix issues with errors
- fix parameter type in examples/kni.c
Narcisa Vasile (10):
eal: add thread id and simple thread functions
eal: add thread attributes
eal/windows: translate Windows errors to errno-style errors
eal: implement functions for thread affinity management
eal: implement thread priority management functions
eal: add thread lifetime management
eal: implement functions for mutex management
eal: implement functions for thread barrier management
eal: add EAL argument for setting thread priority
Enable the new EAL thread API
app/test/process.h | 8 +-
app/test/test_lcores.c | 16 +-
app/test/test_link_bonding.c | 10 +-
app/test/test_lpm_perf.c | 12 +-
config/meson.build | 4 +
drivers/bus/dpaa/base/qbman/bman_driver.c | 5 +-
drivers/bus/dpaa/base/qbman/dpaa_sys.c | 14 +-
drivers/bus/dpaa/base/qbman/process.c | 6 +-
drivers/bus/dpaa/dpaa_bus.c | 14 +-
drivers/bus/fslmc/portal/dpaa2_hw_dpio.c | 19 +-
drivers/compress/mlx5/mlx5_compress.c | 10 +-
drivers/event/dlb2/pf/base/dlb2_osdep.h | 4 +-
drivers/net/af_xdp/rte_eth_af_xdp.c | 18 +-
drivers/net/ark/ark_ethdev.c | 2 +-
drivers/net/ark/ark_pktgen.c | 4 +-
drivers/net/atlantic/atl_ethdev.c | 4 +-
drivers/net/atlantic/atl_types.h | 5 +-
.../net/atlantic/hw_atl/hw_atl_utils_fw2x.c | 26 +-
drivers/net/axgbe/axgbe_common.h | 2 +-
drivers/net/axgbe/axgbe_dev.c | 8 +-
drivers/net/axgbe/axgbe_ethdev.c | 8 +-
drivers/net/axgbe/axgbe_ethdev.h | 8 +-
drivers/net/axgbe/axgbe_i2c.c | 4 +-
drivers/net/axgbe/axgbe_mdio.c | 8 +-
drivers/net/axgbe/axgbe_phy_impl.c | 6 +-
drivers/net/bnxt/bnxt.h | 16 +-
drivers/net/bnxt/bnxt_cpr.c | 4 +-
drivers/net/bnxt/bnxt_ethdev.c | 52 +-
drivers/net/bnxt/bnxt_irq.c | 8 +-
drivers/net/bnxt/bnxt_reps.c | 10 +-
drivers/net/bnxt/tf_ulp/bnxt_ulp.c | 34 +-
drivers/net/bnxt/tf_ulp/bnxt_ulp.h | 4 +-
drivers/net/bnxt/tf_ulp/ulp_fc_mgr.c | 24 +-
drivers/net/bnxt/tf_ulp/ulp_fc_mgr.h | 2 +-
drivers/net/ena/base/ena_plat_dpdk.h | 12 +-
drivers/net/enic/enic.h | 2 +-
drivers/net/ice/ice_dcf_parent.c | 6 +-
drivers/net/ipn3ke/ipn3ke_representor.c | 6 +-
drivers/net/ixgbe/ixgbe_ethdev.c | 2 +-
drivers/net/ixgbe/ixgbe_ethdev.h | 2 +-
drivers/net/kni/rte_eth_kni.c | 8 +-
drivers/net/mlx5/linux/mlx5_os.c | 2 +-
drivers/net/mlx5/mlx5.c | 20 +-
drivers/net/mlx5/mlx5.h | 2 +-
drivers/net/mlx5/mlx5_txpp.c | 8 +-
drivers/net/mlx5/windows/mlx5_flow_os.c | 10 +-
drivers/net/mlx5/windows/mlx5_os.c | 2 +-
drivers/net/qede/base/bcm_osal.h | 8 +-
drivers/net/vhost/rte_eth_vhost.c | 24 +-
.../net/virtio/virtio_user/virtio_user_dev.c | 30 +-
.../net/virtio/virtio_user/virtio_user_dev.h | 2 +-
drivers/raw/ifpga/ifpga_rawdev.c | 6 +-
drivers/vdpa/ifc/ifcvf_vdpa.c | 46 +-
drivers/vdpa/mlx5/mlx5_vdpa.c | 24 +-
drivers/vdpa/mlx5/mlx5_vdpa.h | 4 +-
drivers/vdpa/mlx5/mlx5_vdpa_event.c | 46 +-
examples/kni/main.c | 6 +-
.../performance-thread/pthread_shim/main.c | 2 +-
examples/vhost/main.c | 2 +-
examples/vhost_blk/vhost_blk.c | 12 +-
lib/eal/common/eal_common_options.c | 34 +-
lib/eal/common/eal_common_proc.c | 48 +-
lib/eal/common/eal_common_thread.c | 42 +-
lib/eal/common/eal_common_trace.c | 2 +-
lib/eal/common/eal_internal_cfg.h | 2 +
lib/eal/common/eal_options.h | 2 +
lib/eal/common/eal_private.h | 2 +-
lib/eal/common/eal_thread.h | 6 +
lib/eal/common/malloc_mp.c | 32 +-
lib/eal/common/meson.build | 1 +
lib/eal/common/rte_thread.c | 422 +++++++++++
lib/eal/freebsd/eal.c | 42 +-
lib/eal/freebsd/eal_alarm.c | 12 +-
lib/eal/freebsd/eal_interrupts.c | 4 +-
lib/eal/freebsd/eal_thread.c | 14 +-
lib/eal/include/meson.build | 1 +
lib/eal/include/rte_lcore.h | 8 +-
lib/eal/include/rte_per_lcore.h | 2 -
lib/eal/include/rte_thread.h | 378 +++++++++-
lib/eal/include/rte_thread_types.h | 14 +
lib/eal/linux/eal.c | 46 +-
lib/eal/linux/eal_alarm.c | 10 +-
lib/eal/linux/eal_interrupts.c | 4 +-
lib/eal/linux/eal_thread.c | 18 +-
lib/eal/linux/eal_timer.c | 2 +-
lib/eal/unix/meson.build | 1 -
lib/eal/unix/rte_thread.c | 92 ---
lib/eal/version.map | 22 +
lib/eal/windows/eal.c | 43 +-
lib/eal/windows/eal_interrupts.c | 10 +-
lib/eal/windows/eal_lcore.c | 169 +++--
lib/eal/windows/eal_thread.c | 28 +-
lib/eal/windows/eal_windows.h | 20 +-
lib/eal/windows/include/meson.build | 1 +
lib/eal/windows/include/pthread.h | 192 -----
.../include/rte_windows_thread_types.h | 19 +
lib/eal/windows/include/sched.h | 2 +-
lib/eal/windows/meson.build | 7 +-
lib/eal/windows/rte_thread.c | 678 +++++++++++++++++-
lib/ethdev/rte_ethdev.c | 4 +-
lib/ethdev/rte_ethdev_core.h | 5 +-
lib/ethdev/rte_flow.c | 4 +-
lib/eventdev/rte_event_eth_rx_adapter.c | 6 +-
lib/vhost/fd_man.c | 40 +-
lib/vhost/fd_man.h | 6 +-
lib/vhost/socket.c | 130 ++--
lib/vhost/vhost.c | 10 +-
meson_options.txt | 2 +
108 files changed, 2345 insertions(+), 967 deletions(-)
create mode 100644 lib/eal/common/rte_thread.c
create mode 100644 lib/eal/include/rte_thread_types.h
delete mode 100644 lib/eal/unix/rte_thread.c
delete mode 100644 lib/eal/windows/include/pthread.h
create mode 100644 lib/eal/windows/include/rte_windows_thread_types.h
--
2.31.0.vfs.0.1
^ permalink raw reply [relevance 2%]
* Re: [dpdk-dev] [RFC PATCH] ethdev: clarify flow action PORT ID semantics
2021-06-03 10:33 3% ` Andrew Rybchenko
@ 2021-06-03 11:05 0% ` Ilya Maximets
0 siblings, 0 replies; 200+ results
From: Ilya Maximets @ 2021-06-03 11:05 UTC (permalink / raw)
To: Andrew Rybchenko, Ilya Maximets, Ivan Malov, dev
Cc: Eli Britstein, Smadar Fuks, Hyong Youb Kim, Ori Kam, Jerin Jacob,
John Daley, Thomas Monjalon, Ferruh Yigit
On 6/3/21 12:33 PM, Andrew Rybchenko wrote:
> On 6/3/21 12:29 PM, Ilya Maximets wrote:
>> On 6/2/21 9:35 PM, Ivan Malov wrote:
>>> On 02/06/2021 20:35, Ilya Maximets wrote:
>>>> (Dropped Broadcom folks from CC. Mail server refuses to accept their
>>>> emails for some reason: "Recipient address rejected: Domain not found."
>>>> Please, try to ad them back on reply.)
>>>>
>>>> On 6/2/21 6:26 PM, Andrew Rybchenko wrote:
>>>>> On 6/2/21 3:46 PM, Ilya Maximets wrote:
>>>>>> On 6/1/21 4:28 PM, Ivan Malov wrote:
>>>>>>> Hi Ilya,
>>>>>>>
>>>>>>> Thank you for reviewing the proposal at such short notice. I'm afraid that prior discussions overlook the simple fact that the whole problem is not limited to just VF representors. Action PORT_ID is also used with respect to the admin PF's ethdev, which "represents itself" (and by no means it represents the underlying physical/network port). In this case, one cannot state that the application treats it as a physical port, just like one states that the application perceives representors as VFs themselves.
>>>>>>
>>>>>>
>>>>>> I don't think that it was overlooked. If device is in a switchdev mode than
>>>>>> there is a PF representor and VF representors. Application typically works
>>>>>> only with representors in this case is it doesn't make much sense to have
>>>>>> representor and the upstream port attached to the same application at the
>>>>>> same time. Configuration that is applied by application to the representor
>>>>>> (PF or VF, it doesn't matter) applies to the corresponding upstream port
>>>>>> (actual PF or VF) by default.
>>>>>
>>>>> PF is not necessarily associated with a network port. It
>>>>> could be many PFs and just one network port on NIC.
>>>>> Extra PFs are like VFs in this case. These PFs may be
>>>>> passed to a VM in a similar way. So, we can have PF
>>>>> representors similar to VF representors. I.e. it is
>>>>> incorrect to say that PF in the case of switchdev is
>>>>> a representor of a network port.
>>>>>
>>>>> If we prefer to talk in representors terminology, we
>>>>> need 4 types of prepresentors:
>>>>> - PF representor for PCIe physical function
>>>>> - VF representor for PCIe virtual function
>>>>> - SF representor for PCIe sub-function (PASID)
>>>>> - network port representor
>>>>> In fact above is PCIe oriented, but there are
>>>>> other buses and ways to deliver traffic to applications.
>>>>> Basically representor for any virtual port in virtual
>>>>> switch which DPDK app can control using transfer rules.
>>>>>
>>>>>> Exactly same thing here with PORT_ID action. You have a packet and action
>>>>>> to send it to the port, but it's not specified if HW needs to send it to
>>>>>> the representor or the upstream port (again, VF or PF, it doesn't matter).
>>>>>> Since there is no extra information, HW should send it to the upstream
>>>>>> port by default. The same as configuration applies by default to the
>>>>>> upstream port.
>>>>>>
>>>>>> Let's look at some workflow examples:
>>>>>>
>>>>>> DPDK Application
>>>>>> | |
>>>>>> | |
>>>>>> +--PF-rep------VF-rep---+
>>>>>> | |
>>>>>> | NIC (switchdev) |
>>>>>> | |
>>>>>> +---PF---------VF-------+
>>>>>> | |
>>>>>> | |
>>>>>> External VM or whatever
>>>>>> Network
>>>>>
>>>>> See above. PF <-> External Network is incorrect above
>>>>> since it not always the case. It should be
>>>>> "NP <-> External network" and "NP-rep" above (NP -
>>>>> network port). Sometimes PF is an NP-rep, but sometimes
>>>>> it is not. It is just a question of default rules in
>>>>> switchdev on what to do with traffic incoming from
>>>>> network port.
>>>>>
>>>>> A bit more complicated picture is:
>>>>>
>>>>> +----------------------------------------+
>>>>> | DPDK Application |
>>>>> +----+---------+---------+---------+-----+
>>>>> |PF0 |PF1 | |
>>>>> | | | |
>>>>> +--NP1-rep---NP2-rep---PF2-rep---VF-rep--+
>>>>> | |
>>>>> | NIC (switchdev) |
>>>>> | |
>>>>> +---NP1-------NP2-------PF2--------VF----+
>>>>> | | | |
>>>>> | | | |
>>>>> External External VM or VM or
>>>>> Network 1 Network 2 whatever whatever
>>>>>
>>>>> So, sometimes PF plays network port representor role (PF0,
>>>>> PF1), sometimes it requires representor itself (PF2).
>>>>> What to do if PF2 itself is attached to application?
>>>>> Can we route traffic to it using PORT_ID action?
>>>>> It has DPDK ethdev port. It is one of arguments why
>>>>> plain PORT_ID should route DPDK application.
>>>>
>>>> OK. This is not very different from my understanding. The key
>>>> is that there is a pair of interfaces, one is more visible than
>>>> the other one.
>>>>
>>>>>
>>>>> Of course, some applications would like to see it as
>>>>> (simpler is better):
>>>>>
>>>>> +----------------------------------------+
>>>>> | DPDK Application |
>>>>> | |
>>>>> +---PF0-------PF1------PF2-rep---VF-rep--+
>>>>> | | | |
>>>>> | | | |
>>>>> External External VM or VM or
>>>>> Network 1 Network 2 whatever whatever
>>>>>
>>>>> but some, I believe, require full picture. For examples,
>>>>> I'd really like to know how much traffic goes via all 8
>>>>> switchdev ports and running rte_eth_stats_get(0, ...)
>>>>> (i.e. DPDK port 0 attached to PF0) I'd like to get
>>>>> NP1-rep stats (not NP1 stats). It will match exactly
>>>>> what I see in DPDK application. It is an argument why
>>>>> plain PORT_ID should be treated as a DPDK ethdev port,
>>>>> not a represented (upstream) entity.
>>>>
>>>> The point is that if application doesn't require full picture,
>>>> it should not care. If application requires the full picture,
>>>> it could take extra steps by setting extra bits. I don't
>>>> understand why we need to force all applications to care about
>>>> the full picture if we can avoid that?
>>>>
>>>>>
>>>>>> a. Workflow for "DPDK Application" to set MAC to VF:
>>>>>>
>>>>>> 1. "DPDK Application" calls rte_set_etheraddr("VF-rep", new_mac);
>>>>>> 2. DPDK sets MAC for "VF".
>>>>>>
>>>>>> b. Workflow for "DPDK Application" to set MAC to PF:
>>>>>>
>>>>>> 1. "DPDK Application" calls rte_set_etheraddr("PF-rep", new_mac);
>>>>>> 2. DPDK sets MAC for "PF".
>>>>>>
>>>>>> c. Workflow for "DPDK Application" to send packet to the external network:
>>>>>>
>>>>>> 1. "DPDK Application" calls rte_eth_tx_burst("PF-rep", packet);
>>>>>> 2. NIC receives the packet from "PF-rep" and sends it to "PF".
>>>>>> 3. packet egresses to the external network from "PF".
>>>>>>
>>>>>> d. Workflow for "DPDK Application" to send packet to the "VM or whatever":
>>>>>>
>>>>>> 1. "DPDK Application" calls rte_eth_tx_burst("VF-rep", packet);
>>>>>> 2. NIC receives the packet from "VF-rep" and sends it to "VF".
>>>>>> 3. "VM or whatever" receives the packet from "VF".
>>>>>>
>>>>>> In two workflows above there is no rte_flow processing on step 2, i.e.,
>>>>>> NIC does not perform any lookups/matches/actions, because it's not possible
>>>>>> to configure actions for packets received from "PF-rep" or
>>>>>> "VF-rep" as these ports doesn't own a port id and all the configuration
>>>>>> and rte_flow actions translated and applied for the devices that these
>>>>>> ports represents ("PF" and "VF") and not representors themselves ("PF-rep"
>>>>>> or "VF-rep").
>>>>>>
>>>>>> e. Workflow for the packet received on PF and PORT_ID action:
>>>>>>
>>>>>> 1. "DPDK Application" configures rte_flow for all packets from "PF-rep"
>>>>>> to execute PORT_ID "VF-rep".
>>>>>> 2. NIC receives packet on "PF".
>>>>>> 3. NIC executes 'PORT_ID "VF-rep"' action by sending packet to "VF".
>>>>>> 4. "VM or whatever" receives the packet from "VF".
>>>>>>
>>>>>> f. Workflow for the packet received on VF and PORT_ID action:
>>>>>>
>>>>>> 1. "DPDK Application" configures rte_flow for all packets from "VF-rep"
>>>>>> to execute 'PORT_ID "PF-rep"'.
>>>>>> 2. NIC receives packet on "VF".
>>>>>> 3. NIC executes 'PORT_ID "PF-rep"' action by sending packet to "PF".
>>>>>> 4. Packet egresses from the "PF" to the external network.
>>>>>>
>>>>>> Above is what, IMHO, the logic should look like and this matches with
>>>>>> the overall switchdev design in kernel.
>>>>>>
>>>>>> I understand that this logic could seem flipped-over from the HW point
>>>>>> of view, but it's perfectly logical from the user's perspective, because
>>>>>> user should not care if the application works with representors or
>>>>>> some real devices. If application configures that all packets from port
>>>>>> A should be sent to port B, user will expect that these packets will
>>>>>> egress from port B once received from port A. That will be highly
>>>>>> inconvenient if the packet will ingress from port B back to the
>>>>>> application instead.
>>>>>>
>>>>>> DPDK Application
>>>>>> | |
>>>>>> | |
>>>>>> port A port B
>>>>>> | |
>>>>>> *****MAGIC*****
>>>>>> | |
>>>>>> External Another Network
>>>>>> Network or VM or whatever
>>>>>>
>>>>>> It should not matter if there is an extra layer between ports A and B
>>>>>> and the external network and VM. Everything should work in exactly the
>>>>>> same way, transparently for the application.
>>>>>>
>>>>>> The point of hardware offloading, and therefore rte_flow API, is to take
>>>>>> what user does in software and make this "magically" work in hardware in
>>>>>> the exactly same way. And this will be broken if user will have to
>>>>>> use different logic based on the mode the hardware works in, i.e. based on
>>>>>> the fact if the application works with ports or their representors.
>>>>>>
>>>>>> If some specific use case requires application to know if it's an
>>>>>> upstream port or the representor and demystify the internals of the switchdev
>>>>>> NIC, there should be a different port id for the representor itself that
>>>>>> could be used in all DPDK APIs including rte_flow API or a special bit for
>>>>>> that matter. IIRC, there was an idea to add a bit directly to the port_id
>>>>>> for that purpose that will flip over behavior in all the workflow scenarios
>>>>>> that I described above.
>>>>>
>>>>> As I understand we're basically on the same page, but just
>>>>> fighting for defaults in DPDK.
>>>>
>>>> Yep.
>>>>
>>>>>
>>>>>>>
>>>>>>> Given these facts, it would not be quite right to just align the documentation with the de-facto action meaning assumed by OvS.
>>>>>>
>>>>>> It's not a "meaning assumed by OvS", it's the original design and the
>>>>>> main idea of a switchdev based on a common sense.
>>>>>
>>>>> If so, common sense is not that common :)
>>>>> My "common sense" says me that PORT_ID action
>>>>> should route traffic to DPDK ethdev port to be
>>>>> received by the DPDK application.
>>>>
>>>> By this logic rte_eth_tx_burst("VF-rep", packet) should send a packet
>>>> to "VF-rep", i.e. this packet will be received back by the application
>>>> on this same interface. But that is counter-intuitive and this is not
>>>> how it works in linux kernel if you're opening socket and sending a
>>>> packet to the "VF-rep" network interface.
>>>>
>>>> And if rte_eth_tx_burst("VF-rep", packet) sends packet to "VF" and not
>>>> to "VF-rep", than I don't understand why PORT_ID action should work in
>>>> the opposite way.
>>>
>>> There's no contradiction here.
>>>
>>> In rte_eth_tx_burst(X, packet) example, "X" is the port which the application sits on and from where it sends the packet. In other words, it's the point where the packet originates from, and not where it goes to.
>>>
>>> At the same time, flow *action* PORT_ID (ID = "X") is clearly the opposite: it specifies where the packet will go. Port ID is the characteristic of a DPDK ethdev. So the packet goes *to* an ethdev with the given ID ("X").
>>>
>>> Perhaps consider action PHY_PORT: the index is the characteristic of the network port. The packet goes *to* network through this NP. And not the opposite way. Hopefully, nobody is going to claim that action PHY_PORT should mean re-injecting the packet back to the HW flow engine "as if it just came from the network port". Then why does one try to skew the PORT_ID meaning this way? PORT_ID points to an ethdev - the packet goes *to* the ethdev. Isn't that simple?
>>
>> It's not simple. And PHY_PORT action would be hard to use from the
>> application that doesn't really need to know how underlying hardware
>> structured.
>
> Yes, I agree. Basically above paragraph just try to highlight
> existing consistent semantics in various actions which set
> traffic direction and highlight inconsistency if we interpret
> PORT_ID default as egress in accordance with terminology
> suggested below. PORT_ID is a DPDK port and default direction
> should be to DPDK port. I'll continue on the topic below.
>
>>>
>>>>
>>>> Application receives a packet from port A and puts it to the port B.
>>>> TC rule to forward packets from port A to port B will provide same result.
>>>> So, why the similar rte_flow should do the opposite and send the packet
>>>> back to the application?
>>>
>>> Please see above. Action VF sends the packet *to* VF and *not* to the upstream entity which this VF is connected to. Action PHY_PORT sends the packet *to* network and does *not* make it appear as if it entered the NIC from the network side. Action QUEUE sends the packet *to* the Rx queue and does *not* make it appear as if it just egressed from the Tx queue with the same index. Action PORT_ID sends the packet *to* an ethdev with the given ID and *not* to the upstream entity which this ethdev is connected to. It's just that transparent. It's just "do what the name suggests".
>>>
>>> Yes, an application (say, OvS) might have a high level design which perceives the "high-level" ports plugged to it as a "patch-panel" of sorts. Yes, when a high-level mechanism/logic of such application invokes a *datapath-unaware* wrapper to offload a rule and request that the packet be delivered to the given "high-level" port, it therefore requests that the packet be delivered to the opposite end of the wire. But then the lower-level datapath-specific (DPDK) handler kicks in. Since it's DPDK-specific, it knows *everything* about the underlying flow library it works with. In particular it knows that action PORT_ID delivers the packet to an *ethdev*, at the same time, it knows that the upper caller (high-level logic) for sure wants the opposite, so it (the lower-level DPDK component) sets the "upstream" bit when translating the higher-level port action to an RTE action "PORT_ID".
>>
>> I don't understand that. DPDK user is the application and DPDK
>> doesn't translate anything, application creates PORT_ID action
>> directly and passes it to DPDK. So, you're forcing the *end user*
>> (a.k.a. application) to know *everything* about the hardware the
>> application runs on. Of course, it gets this information about
>> the hardware from the DPDK library (otherwise this would be
>> completely ridiculous), but this doesn't change the fact that it's
>> the application that needs to think about the structure of the
>> underlying hardware while it's absolutely not necessary in vast
>> majority of cases.
>
> Yes, that's all true, but I think that specification of the
> direction is *not* diving to deep in hardware details.
>
> For DPDK I think it is important to have consistent semantics
> and interpretation of input parameters. That will make the
> library easier to use and make it less error-prone.
>
>>> Then the resulting action is correct, and the packet indeed doesn't end up in the ethdev but goes
>>> to the opposite end of the wire. That's it.
>>>
>>> I have an impression that for some reason people are tempted to ignore the two nominal "layers" in such applications (generic, or high-level one and DPDK-specific one) thus trying to align DPDK logic with high-level logic of the applications. That's simply not right. What I'm trying to point out is that it *is* the true job of DPDK-specific data path handler in such application - to properly translate generic flow actions to DPDK-specific ones. It's the duty of DPDK component in such applications to be aware of the genuine meaning of action PORT_ID.
>>
>> The reason is very simple: if application don't need to know the
>> full picture (how the hardware structured inside) it shouldn't
>> care and it's a duty of DPDK to abstract the hardware and provide
>> programming interfaces that could be easily used by application
>> developers who are not experts in the architecture of a hardware
>> that they want to use (basically, application developer should not
>> care at all in most cases on which hardware application will work).
>> It's basically in almost every single DPDK API, EAL means environment
>> *abstraction* layer, not an environment *proxy/passthrough* layer.
>> We can't assume that DPDK-specific layers in applications are always
>> written by hardware experts and, IMHO, DPDK should not force users
>> to learn underlying structures of switchdev devices. They might not
>> even have such devices for testing, so the application that works
>> on simple NICs should be able to run correctly on switchdev-capable
>> NICs too.
>>
>> I think that "***MAGIC***" abstraction (see one of my previous ascii
>> graphics) is very important here.
>
> I've answered it above. Specification of the direction is *not*
> diving to deep in HW details.
Yes, I agree that specification of direction doesn't require any
knowledge of any HW details and this option is perfectly fine for
me as described in 'ingress/egress' suggestion below. My argument
is about 'upstream' flag specifically. Wording is important, because
I think that 'upstream' implies some knowledge that there are two
different ports.
>
>>>
>>> This way, mixing up the two meanings is ruled out.
>>
>> Looking closer to how tc flower rules configured I noticed that
>> 'mirred' action requires user to specify the direction in which
>> the packet will appear on the destination port. And I suppose
>> this will solve your issues with PORT_ID action without exposing
>> the "full picture" of the architecture of an underlying hardware.
>>
>> It looks something like this:
>>
>> tc filter add dev A ... action mirred egress redirect dev B
>> ^^^^^^
>>
>> Direction could be 'ingress' or 'egress', so the packet will
>> ingress from the port B back to application/kernel or it will
>> egress from this port to the external network. Same thing
>> could be implemented in rte_flow like this:
>>
>> flow create A ingress transfer pattern eth / end
>> action port_id id B egress / end
>>
>> So, application that needs to receive the packet from the port B
>> will specify 'ingress', others that just want to send packet from
>> the port B will specify 'egress'. Will that work for you?
>>
>> (BTW, 'ingress' seems to be not implemented in TC and that kind
>> of suggests that it's not very useful at least for kernel use cases)
>>
>> One might say that it's actually the same what is proposed in
>> this RFC, but I will argue that 'ingress/egress' schema doesn't
>> break the "***MAGIC***" abstraction because user is not obligated
>> to know the structure of the underlying hardware, while 'upstream'
>> flag is something very unclear from that perspective and makes
>> no sense for plane ports (non-representors).
>
> I think it is really an excellent idea and suggested
> terminology looks very good to me. However, we should
> agree on technical details on API level (not testpmd
> commands). I think we have 4 options:
>
> A. Add "ingress" bit with "egress" as unset meaning.
> Yes, that's what is current behaviour assumed and
> used by OvS and implemented in some PMDs.
> My problem with it that it is, IMHO, inconsistent
> default value (as explained above).
>
> B. Add "egress" bit with "ingress" as unset meaning.
> Basically it is what is suggested in the RFC, but
> the problem of the suggestion is the silent breakage
> of existing users (let's put it a side if it is
> correct usage or misuse). It is still the fact.
>
> C. Encode above in ethdev port ID MSB.
> The problem of the solution is that encoding
> makes sense for representors, but the problem
> exists for non-representor ports as well.
> I have no good ideas on terminology in the case
> if we try to solve it for non-representors.
>
> D. Break API and ABI and add enum with unset(default)/
> ingress/egress members to enforce application to
> specify direction.
>
> It is unclear what we'll do in the case of A, B and D
> if we encode representor in port ID MSB in any case.
My opinion:
- Option D is the best choice for rte_flow. No defaults, users forced
to explicitly choose the direction in HW-independent way.
- I agree that option C somewhat conflicts with the 'ingress/egress'
flag idea and it is more hardware-specific. Therefore if option C
is going to be implemented it should be implemented in concept of
option A, i.e. 'egress' is default option if port ID MSB is not set.
>
>>>>>>> On 01/06/2021 15:10, Ilya Maximets wrote:
>>>>>>>> On 6/1/21 1:14 PM, Ivan Malov wrote:
>>>>>>>>> By its very name, action PORT_ID means that packets hit an ethdev with the
>>>>>>>>> given DPDK port ID. At least the current comments don't state the opposite.
>>>>>>>>> That said, since port representors had been adopted, applications like OvS
>>>>>>>>> have been misusing the action. They misread its purpose as sending packets
>>>>>>>>> to the opposite end of the "wire" plugged to the given ethdev, for example,
>>>>>>>>> redirecting packets to the VF itself rather than to its representor ethdev.
>>>>>>>>> Another example: OvS relies on this action with the admin PF's ethdev port
>>>>>>>>> ID specified in it in order to send offloaded packets to the physical port.
>>>>>>>>>
>>>>>>>>> Since there might be applications which use this action in its valid sense,
>>>>>>>>> one can't just change the documentation to greenlight the opposite meaning.
>>>>>>>>> This patch adds an explicit bit to the action configuration which will let
>>>>>>>>> applications, depending on their needs, leverage the two meanings properly.
>>>>>>>>> Applications like OvS, as well as PMDs, will have to be corrected when the
>>>>>>>>> patch has been applied. But the improved clarity of the action is worth it.
>>>>>>>>>
>>>>>>>>> The proposed change is not the only option. One could avoid changes in OvS
>>>>>>>>> and PMDs if the new configuration field had the opposite meaning, with the
>>>>>>>>> action itself meaning delivery to the represented port and not to DPDK one.
>>>>>>>>> Alternatively, one could define a brand new action with the said behaviour.
>>>>>>>>
>>>>>>>> We had already very similar discussions regarding the understanding of what
>>>>>>>> the representor really is from the DPDK API's point of view, and the last
>>>>>>>> time, IIUC, it was concluded by a tech. board that representor should be
>>>>>>>> a "ghost of a VF", i.e. DPDK APIs should apply configuration by default to
>>>>>>>> VF and not to the representor device:
>>>>>>>> https://patches.dpdk.org/project/dpdk/cover/20191029185051.32203-1-thomas@monjalon.net/#104376
>>>>>>>> This wasn't enforced though, IIUC, for existing code and semantics is still mixed.
>>>>>>>>
>>>>>>>> I still think that configuration should be applied to VF, and the same applies
>>>>>>>> to rte_flow API. IMHO, average application should not care if device is
>>>>>>>> a VF itself or its representor. Everything should work exactly the same.
>>>>>>>> I think this matches with the original idea/design of the switchdev functionality
>>>>>>>> in the linux kernel and also matches with how the average user thinks about
>>>>>>>> representor devices.
>>>>>>>>
>>>>>>>> If some specific use-case requires to distinguish VF from the representor,
>>>>>>>> there should probably be a separate special API/flag for that.
>>>>>>>>
>>>>>>>> Best regards, Ilya Maximets.
>>>>>>>>
>>>>>>>
>>>>>
>>>
>
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [RFC PATCH] ethdev: clarify flow action PORT ID semantics
@ 2021-06-03 10:33 3% ` Andrew Rybchenko
2021-06-03 11:05 0% ` Ilya Maximets
0 siblings, 1 reply; 200+ results
From: Andrew Rybchenko @ 2021-06-03 10:33 UTC (permalink / raw)
To: Ilya Maximets, Ivan Malov, dev
Cc: Eli Britstein, Smadar Fuks, Hyong Youb Kim, Ori Kam, Jerin Jacob,
John Daley, Thomas Monjalon, Ferruh Yigit
On 6/3/21 12:29 PM, Ilya Maximets wrote:
> On 6/2/21 9:35 PM, Ivan Malov wrote:
>> On 02/06/2021 20:35, Ilya Maximets wrote:
>>> (Dropped Broadcom folks from CC. Mail server refuses to accept their
>>> emails for some reason: "Recipient address rejected: Domain not found."
>>> Please, try to ad them back on reply.)
>>>
>>> On 6/2/21 6:26 PM, Andrew Rybchenko wrote:
>>>> On 6/2/21 3:46 PM, Ilya Maximets wrote:
>>>>> On 6/1/21 4:28 PM, Ivan Malov wrote:
>>>>>> Hi Ilya,
>>>>>>
>>>>>> Thank you for reviewing the proposal at such short notice. I'm afraid that prior discussions overlook the simple fact that the whole problem is not limited to just VF representors. Action PORT_ID is also used with respect to the admin PF's ethdev, which "represents itself" (and by no means it represents the underlying physical/network port). In this case, one cannot state that the application treats it as a physical port, just like one states that the application perceives representors as VFs themselves.
>>>>>
>>>>>
>>>>> I don't think that it was overlooked. If device is in a switchdev mode than
>>>>> there is a PF representor and VF representors. Application typically works
>>>>> only with representors in this case is it doesn't make much sense to have
>>>>> representor and the upstream port attached to the same application at the
>>>>> same time. Configuration that is applied by application to the representor
>>>>> (PF or VF, it doesn't matter) applies to the corresponding upstream port
>>>>> (actual PF or VF) by default.
>>>>
>>>> PF is not necessarily associated with a network port. It
>>>> could be many PFs and just one network port on NIC.
>>>> Extra PFs are like VFs in this case. These PFs may be
>>>> passed to a VM in a similar way. So, we can have PF
>>>> representors similar to VF representors. I.e. it is
>>>> incorrect to say that PF in the case of switchdev is
>>>> a representor of a network port.
>>>>
>>>> If we prefer to talk in representors terminology, we
>>>> need 4 types of prepresentors:
>>>> - PF representor for PCIe physical function
>>>> - VF representor for PCIe virtual function
>>>> - SF representor for PCIe sub-function (PASID)
>>>> - network port representor
>>>> In fact above is PCIe oriented, but there are
>>>> other buses and ways to deliver traffic to applications.
>>>> Basically representor for any virtual port in virtual
>>>> switch which DPDK app can control using transfer rules.
>>>>
>>>>> Exactly same thing here with PORT_ID action. You have a packet and action
>>>>> to send it to the port, but it's not specified if HW needs to send it to
>>>>> the representor or the upstream port (again, VF or PF, it doesn't matter).
>>>>> Since there is no extra information, HW should send it to the upstream
>>>>> port by default. The same as configuration applies by default to the
>>>>> upstream port.
>>>>>
>>>>> Let's look at some workflow examples:
>>>>>
>>>>> DPDK Application
>>>>> | |
>>>>> | |
>>>>> +--PF-rep------VF-rep---+
>>>>> | |
>>>>> | NIC (switchdev) |
>>>>> | |
>>>>> +---PF---------VF-------+
>>>>> | |
>>>>> | |
>>>>> External VM or whatever
>>>>> Network
>>>>
>>>> See above. PF <-> External Network is incorrect above
>>>> since it not always the case. It should be
>>>> "NP <-> External network" and "NP-rep" above (NP -
>>>> network port). Sometimes PF is an NP-rep, but sometimes
>>>> it is not. It is just a question of default rules in
>>>> switchdev on what to do with traffic incoming from
>>>> network port.
>>>>
>>>> A bit more complicated picture is:
>>>>
>>>> +----------------------------------------+
>>>> | DPDK Application |
>>>> +----+---------+---------+---------+-----+
>>>> |PF0 |PF1 | |
>>>> | | | |
>>>> +--NP1-rep---NP2-rep---PF2-rep---VF-rep--+
>>>> | |
>>>> | NIC (switchdev) |
>>>> | |
>>>> +---NP1-------NP2-------PF2--------VF----+
>>>> | | | |
>>>> | | | |
>>>> External External VM or VM or
>>>> Network 1 Network 2 whatever whatever
>>>>
>>>> So, sometimes PF plays network port representor role (PF0,
>>>> PF1), sometimes it requires representor itself (PF2).
>>>> What to do if PF2 itself is attached to application?
>>>> Can we route traffic to it using PORT_ID action?
>>>> It has DPDK ethdev port. It is one of arguments why
>>>> plain PORT_ID should route DPDK application.
>>>
>>> OK. This is not very different from my understanding. The key
>>> is that there is a pair of interfaces, one is more visible than
>>> the other one.
>>>
>>>>
>>>> Of course, some applications would like to see it as
>>>> (simpler is better):
>>>>
>>>> +----------------------------------------+
>>>> | DPDK Application |
>>>> | |
>>>> +---PF0-------PF1------PF2-rep---VF-rep--+
>>>> | | | |
>>>> | | | |
>>>> External External VM or VM or
>>>> Network 1 Network 2 whatever whatever
>>>>
>>>> but some, I believe, require full picture. For examples,
>>>> I'd really like to know how much traffic goes via all 8
>>>> switchdev ports and running rte_eth_stats_get(0, ...)
>>>> (i.e. DPDK port 0 attached to PF0) I'd like to get
>>>> NP1-rep stats (not NP1 stats). It will match exactly
>>>> what I see in DPDK application. It is an argument why
>>>> plain PORT_ID should be treated as a DPDK ethdev port,
>>>> not a represented (upstream) entity.
>>>
>>> The point is that if application doesn't require full picture,
>>> it should not care. If application requires the full picture,
>>> it could take extra steps by setting extra bits. I don't
>>> understand why we need to force all applications to care about
>>> the full picture if we can avoid that?
>>>
>>>>
>>>>> a. Workflow for "DPDK Application" to set MAC to VF:
>>>>>
>>>>> 1. "DPDK Application" calls rte_set_etheraddr("VF-rep", new_mac);
>>>>> 2. DPDK sets MAC for "VF".
>>>>>
>>>>> b. Workflow for "DPDK Application" to set MAC to PF:
>>>>>
>>>>> 1. "DPDK Application" calls rte_set_etheraddr("PF-rep", new_mac);
>>>>> 2. DPDK sets MAC for "PF".
>>>>>
>>>>> c. Workflow for "DPDK Application" to send packet to the external network:
>>>>>
>>>>> 1. "DPDK Application" calls rte_eth_tx_burst("PF-rep", packet);
>>>>> 2. NIC receives the packet from "PF-rep" and sends it to "PF".
>>>>> 3. packet egresses to the external network from "PF".
>>>>>
>>>>> d. Workflow for "DPDK Application" to send packet to the "VM or whatever":
>>>>>
>>>>> 1. "DPDK Application" calls rte_eth_tx_burst("VF-rep", packet);
>>>>> 2. NIC receives the packet from "VF-rep" and sends it to "VF".
>>>>> 3. "VM or whatever" receives the packet from "VF".
>>>>>
>>>>> In two workflows above there is no rte_flow processing on step 2, i.e.,
>>>>> NIC does not perform any lookups/matches/actions, because it's not possible
>>>>> to configure actions for packets received from "PF-rep" or
>>>>> "VF-rep" as these ports doesn't own a port id and all the configuration
>>>>> and rte_flow actions translated and applied for the devices that these
>>>>> ports represents ("PF" and "VF") and not representors themselves ("PF-rep"
>>>>> or "VF-rep").
>>>>>
>>>>> e. Workflow for the packet received on PF and PORT_ID action:
>>>>>
>>>>> 1. "DPDK Application" configures rte_flow for all packets from "PF-rep"
>>>>> to execute PORT_ID "VF-rep".
>>>>> 2. NIC receives packet on "PF".
>>>>> 3. NIC executes 'PORT_ID "VF-rep"' action by sending packet to "VF".
>>>>> 4. "VM or whatever" receives the packet from "VF".
>>>>>
>>>>> f. Workflow for the packet received on VF and PORT_ID action:
>>>>>
>>>>> 1. "DPDK Application" configures rte_flow for all packets from "VF-rep"
>>>>> to execute 'PORT_ID "PF-rep"'.
>>>>> 2. NIC receives packet on "VF".
>>>>> 3. NIC executes 'PORT_ID "PF-rep"' action by sending packet to "PF".
>>>>> 4. Packet egresses from the "PF" to the external network.
>>>>>
>>>>> Above is what, IMHO, the logic should look like and this matches with
>>>>> the overall switchdev design in kernel.
>>>>>
>>>>> I understand that this logic could seem flipped-over from the HW point
>>>>> of view, but it's perfectly logical from the user's perspective, because
>>>>> user should not care if the application works with representors or
>>>>> some real devices. If application configures that all packets from port
>>>>> A should be sent to port B, user will expect that these packets will
>>>>> egress from port B once received from port A. That will be highly
>>>>> inconvenient if the packet will ingress from port B back to the
>>>>> application instead.
>>>>>
>>>>> DPDK Application
>>>>> | |
>>>>> | |
>>>>> port A port B
>>>>> | |
>>>>> *****MAGIC*****
>>>>> | |
>>>>> External Another Network
>>>>> Network or VM or whatever
>>>>>
>>>>> It should not matter if there is an extra layer between ports A and B
>>>>> and the external network and VM. Everything should work in exactly the
>>>>> same way, transparently for the application.
>>>>>
>>>>> The point of hardware offloading, and therefore rte_flow API, is to take
>>>>> what user does in software and make this "magically" work in hardware in
>>>>> the exactly same way. And this will be broken if user will have to
>>>>> use different logic based on the mode the hardware works in, i.e. based on
>>>>> the fact if the application works with ports or their representors.
>>>>>
>>>>> If some specific use case requires application to know if it's an
>>>>> upstream port or the representor and demystify the internals of the switchdev
>>>>> NIC, there should be a different port id for the representor itself that
>>>>> could be used in all DPDK APIs including rte_flow API or a special bit for
>>>>> that matter. IIRC, there was an idea to add a bit directly to the port_id
>>>>> for that purpose that will flip over behavior in all the workflow scenarios
>>>>> that I described above.
>>>>
>>>> As I understand we're basically on the same page, but just
>>>> fighting for defaults in DPDK.
>>>
>>> Yep.
>>>
>>>>
>>>>>>
>>>>>> Given these facts, it would not be quite right to just align the documentation with the de-facto action meaning assumed by OvS.
>>>>>
>>>>> It's not a "meaning assumed by OvS", it's the original design and the
>>>>> main idea of a switchdev based on a common sense.
>>>>
>>>> If so, common sense is not that common :)
>>>> My "common sense" says me that PORT_ID action
>>>> should route traffic to DPDK ethdev port to be
>>>> received by the DPDK application.
>>>
>>> By this logic rte_eth_tx_burst("VF-rep", packet) should send a packet
>>> to "VF-rep", i.e. this packet will be received back by the application
>>> on this same interface. But that is counter-intuitive and this is not
>>> how it works in linux kernel if you're opening socket and sending a
>>> packet to the "VF-rep" network interface.
>>>
>>> And if rte_eth_tx_burst("VF-rep", packet) sends packet to "VF" and not
>>> to "VF-rep", than I don't understand why PORT_ID action should work in
>>> the opposite way.
>>
>> There's no contradiction here.
>>
>> In rte_eth_tx_burst(X, packet) example, "X" is the port which the application sits on and from where it sends the packet. In other words, it's the point where the packet originates from, and not where it goes to.
>>
>> At the same time, flow *action* PORT_ID (ID = "X") is clearly the opposite: it specifies where the packet will go. Port ID is the characteristic of a DPDK ethdev. So the packet goes *to* an ethdev with the given ID ("X").
>>
>> Perhaps consider action PHY_PORT: the index is the characteristic of the network port. The packet goes *to* network through this NP. And not the opposite way. Hopefully, nobody is going to claim that action PHY_PORT should mean re-injecting the packet back to the HW flow engine "as if it just came from the network port". Then why does one try to skew the PORT_ID meaning this way? PORT_ID points to an ethdev - the packet goes *to* the ethdev. Isn't that simple?
>
> It's not simple. And PHY_PORT action would be hard to use from the
> application that doesn't really need to know how underlying hardware
> structured.
Yes, I agree. Basically above paragraph just try to highlight
existing consistent semantics in various actions which set
traffic direction and highlight inconsistency if we interpret
PORT_ID default as egress in accordance with terminology
suggested below. PORT_ID is a DPDK port and default direction
should be to DPDK port. I'll continue on the topic below.
>>
>>>
>>> Application receives a packet from port A and puts it to the port B.
>>> TC rule to forward packets from port A to port B will provide same result.
>>> So, why the similar rte_flow should do the opposite and send the packet
>>> back to the application?
>>
>> Please see above. Action VF sends the packet *to* VF and *not* to the upstream entity which this VF is connected to. Action PHY_PORT sends the packet *to* network and does *not* make it appear as if it entered the NIC from the network side. Action QUEUE sends the packet *to* the Rx queue and does *not* make it appear as if it just egressed from the Tx queue with the same index. Action PORT_ID sends the packet *to* an ethdev with the given ID and *not* to the upstream entity which this ethdev is connected to. It's just that transparent. It's just "do what the name suggests".
>>
>> Yes, an application (say, OvS) might have a high level design which perceives the "high-level" ports plugged to it as a "patch-panel" of sorts. Yes, when a high-level mechanism/logic of such application invokes a *datapath-unaware* wrapper to offload a rule and request that the packet be delivered to the given "high-level" port, it therefore requests that the packet be delivered to the opposite end of the wire. But then the lower-level datapath-specific (DPDK) handler kicks in. Since it's DPDK-specific, it knows *everything* about the underlying flow library it works with. In particular it knows that action PORT_ID delivers the packet to an *ethdev*, at the same time, it knows that the upper caller (high-level logic) for sure wants the opposite, so it (the lower-level DPDK component) sets the "upstream" bit when translating the higher-level port action to an RTE action "PORT_ID".
>
> I don't understand that. DPDK user is the application and DPDK
> doesn't translate anything, application creates PORT_ID action
> directly and passes it to DPDK. So, you're forcing the *end user*
> (a.k.a. application) to know *everything* about the hardware the
> application runs on. Of course, it gets this information about
> the hardware from the DPDK library (otherwise this would be
> completely ridiculous), but this doesn't change the fact that it's
> the application that needs to think about the structure of the
> underlying hardware while it's absolutely not necessary in vast
> majority of cases.
Yes, that's all true, but I think that specification of the
direction is *not* diving to deep in hardware details.
For DPDK I think it is important to have consistent semantics
and interpretation of input parameters. That will make the
library easier to use and make it less error-prone.
>> Then the resulting action is correct, and the packet indeed doesn't end up in the ethdev but goes
>> to the opposite end of the wire. That's it.
>>
>> I have an impression that for some reason people are tempted to ignore the two nominal "layers" in such applications (generic, or high-level one and DPDK-specific one) thus trying to align DPDK logic with high-level logic of the applications. That's simply not right. What I'm trying to point out is that it *is* the true job of DPDK-specific data path handler in such application - to properly translate generic flow actions to DPDK-specific ones. It's the duty of DPDK component in such applications to be aware of the genuine meaning of action PORT_ID.
>
> The reason is very simple: if application don't need to know the
> full picture (how the hardware structured inside) it shouldn't
> care and it's a duty of DPDK to abstract the hardware and provide
> programming interfaces that could be easily used by application
> developers who are not experts in the architecture of a hardware
> that they want to use (basically, application developer should not
> care at all in most cases on which hardware application will work).
> It's basically in almost every single DPDK API, EAL means environment
> *abstraction* layer, not an environment *proxy/passthrough* layer.
> We can't assume that DPDK-specific layers in applications are always
> written by hardware experts and, IMHO, DPDK should not force users
> to learn underlying structures of switchdev devices. They might not
> even have such devices for testing, so the application that works
> on simple NICs should be able to run correctly on switchdev-capable
> NICs too.
>
> I think that "***MAGIC***" abstraction (see one of my previous ascii
> graphics) is very important here.
I've answered it above. Specification of the direction is *not*
diving to deep in HW details.
>>
>> This way, mixing up the two meanings is ruled out.
>
> Looking closer to how tc flower rules configured I noticed that
> 'mirred' action requires user to specify the direction in which
> the packet will appear on the destination port. And I suppose
> this will solve your issues with PORT_ID action without exposing
> the "full picture" of the architecture of an underlying hardware.
>
> It looks something like this:
>
> tc filter add dev A ... action mirred egress redirect dev B
> ^^^^^^
>
> Direction could be 'ingress' or 'egress', so the packet will
> ingress from the port B back to application/kernel or it will
> egress from this port to the external network. Same thing
> could be implemented in rte_flow like this:
>
> flow create A ingress transfer pattern eth / end
> action port_id id B egress / end
>
> So, application that needs to receive the packet from the port B
> will specify 'ingress', others that just want to send packet from
> the port B will specify 'egress'. Will that work for you?
>
> (BTW, 'ingress' seems to be not implemented in TC and that kind
> of suggests that it's not very useful at least for kernel use cases)
>
> One might say that it's actually the same what is proposed in
> this RFC, but I will argue that 'ingress/egress' schema doesn't
> break the "***MAGIC***" abstraction because user is not obligated
> to know the structure of the underlying hardware, while 'upstream'
> flag is something very unclear from that perspective and makes
> no sense for plane ports (non-representors).
I think it is really an excellent idea and suggested
terminology looks very good to me. However, we should
agree on technical details on API level (not testpmd
commands). I think we have 4 options:
A. Add "ingress" bit with "egress" as unset meaning.
Yes, that's what is current behaviour assumed and
used by OvS and implemented in some PMDs.
My problem with it that it is, IMHO, inconsistent
default value (as explained above).
B. Add "egress" bit with "ingress" as unset meaning.
Basically it is what is suggested in the RFC, but
the problem of the suggestion is the silent breakage
of existing users (let's put it a side if it is
correct usage or misuse). It is still the fact.
C. Encode above in ethdev port ID MSB.
The problem of the solution is that encoding
makes sense for representors, but the problem
exists for non-representor ports as well.
I have no good ideas on terminology in the case
if we try to solve it for non-representors.
D. Break API and ABI and add enum with unset(default)/
ingress/egress members to enforce application to
specify direction.
It is unclear what we'll do in the case of A, B and D
if we encode representor in port ID MSB in any case.
>>>>>> On 01/06/2021 15:10, Ilya Maximets wrote:
>>>>>>> On 6/1/21 1:14 PM, Ivan Malov wrote:
>>>>>>>> By its very name, action PORT_ID means that packets hit an ethdev with the
>>>>>>>> given DPDK port ID. At least the current comments don't state the opposite.
>>>>>>>> That said, since port representors had been adopted, applications like OvS
>>>>>>>> have been misusing the action. They misread its purpose as sending packets
>>>>>>>> to the opposite end of the "wire" plugged to the given ethdev, for example,
>>>>>>>> redirecting packets to the VF itself rather than to its representor ethdev.
>>>>>>>> Another example: OvS relies on this action with the admin PF's ethdev port
>>>>>>>> ID specified in it in order to send offloaded packets to the physical port.
>>>>>>>>
>>>>>>>> Since there might be applications which use this action in its valid sense,
>>>>>>>> one can't just change the documentation to greenlight the opposite meaning.
>>>>>>>> This patch adds an explicit bit to the action configuration which will let
>>>>>>>> applications, depending on their needs, leverage the two meanings properly.
>>>>>>>> Applications like OvS, as well as PMDs, will have to be corrected when the
>>>>>>>> patch has been applied. But the improved clarity of the action is worth it.
>>>>>>>>
>>>>>>>> The proposed change is not the only option. One could avoid changes in OvS
>>>>>>>> and PMDs if the new configuration field had the opposite meaning, with the
>>>>>>>> action itself meaning delivery to the represented port and not to DPDK one.
>>>>>>>> Alternatively, one could define a brand new action with the said behaviour.
>>>>>>>
>>>>>>> We had already very similar discussions regarding the understanding of what
>>>>>>> the representor really is from the DPDK API's point of view, and the last
>>>>>>> time, IIUC, it was concluded by a tech. board that representor should be
>>>>>>> a "ghost of a VF", i.e. DPDK APIs should apply configuration by default to
>>>>>>> VF and not to the representor device:
>>>>>>> https://patches.dpdk.org/project/dpdk/cover/20191029185051.32203-1-thomas@monjalon.net/#104376
>>>>>>> This wasn't enforced though, IIUC, for existing code and semantics is still mixed.
>>>>>>>
>>>>>>> I still think that configuration should be applied to VF, and the same applies
>>>>>>> to rte_flow API. IMHO, average application should not care if device is
>>>>>>> a VF itself or its representor. Everything should work exactly the same.
>>>>>>> I think this matches with the original idea/design of the switchdev functionality
>>>>>>> in the linux kernel and also matches with how the average user thinks about
>>>>>>> representor devices.
>>>>>>>
>>>>>>> If some specific use-case requires to distinguish VF from the representor,
>>>>>>> there should probably be a separate special API/flag for that.
>>>>>>>
>>>>>>> Best regards, Ilya Maximets.
>>>>>>>
>>>>>>
>>>>
>>
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [PATCH] net: introduce IPv4 ihl and version fields
2021-06-03 2:03 3% ` Stephen Hemminger
@ 2021-06-03 4:59 0% ` Gregory Etelson
0 siblings, 0 replies; 200+ results
From: Gregory Etelson @ 2021-06-03 4:59 UTC (permalink / raw)
To: Stephen Hemminger, Min Hu (Connor)
Cc: Morten Brørup, dev, Matan Azrad, Ori Kam, Raslan Darawsheh,
Bernard Iremonger, Olivier Matz
> On Thu, 3 Jun 2021 08:58:42 +0800
> "Min Hu (Connor)" <humin29@huawei.com> wrote:
>
> > Hi, Morten and all,
> > I have a questions which has bothering me for a long time.
> > What's the difference between API and ABI？
> > Why does this patch does not breake ABI， but break API(maybe)?
> >
> > Hope for your reply, thanks.
>
> The API being fixed, that a user can in confidence recompile their source
> code and it will compile without any new errors.
>
> The ABI guarantee means, that an application dynamically linked to DPDK
> shared libraries will work without problem if the DPDK libraries are
> updated.
Hello Stephen,
Thank you for the clarification.
According to the above statements, the patch introduces alternative
access method to IPv4 version & ihl fields without breaking existing API.
Regards,
Gregory
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH] net: introduce IPv4 ihl and version fields
2021-06-03 0:58 4% ` Min Hu (Connor)
@ 2021-06-03 2:03 3% ` Stephen Hemminger
2021-06-03 4:59 0% ` Gregory Etelson
0 siblings, 1 reply; 200+ results
From: Stephen Hemminger @ 2021-06-03 2:03 UTC (permalink / raw)
To: Min Hu (Connor)
Cc: Morten Brørup, Gregory Etelson, dev, matan, orika, rasland,
Bernard Iremonger, Olivier Matz
On Thu, 3 Jun 2021 08:58:42 +0800
"Min Hu (Connor)" <humin29@huawei.com> wrote:
> Hi, Morten and all,
> I have a questions which has bothering me for a long time.
> What's the difference between API and ABI？
> Why does this patch does not breake ABI， but break API(maybe)?
>
> Hope for your reply, thanks.
The API being fixed, that a user can in confidence recompile their source
code and it will compile without any new errors.
The ABI guarantee means, that an application dynamically linked to DPDK
shared libraries will work without problem if the DPDK libraries are updated.
^ permalink raw reply [relevance 3%]
* Re: [dpdk-dev] [PATCH] net: introduce IPv4 ihl and version fields
2021-05-27 15:56 3% ` Morten Brørup
2021-05-28 10:20 0% ` Ananyev, Konstantin
@ 2021-06-03 0:58 4% ` Min Hu (Connor)
2021-06-03 2:03 3% ` Stephen Hemminger
1 sibling, 1 reply; 200+ results
From: Min Hu (Connor) @ 2021-06-03 0:58 UTC (permalink / raw)
To: Morten Brørup, Gregory Etelson, dev
Cc: matan, orika, rasland, Bernard Iremonger, Olivier Matz
Hi, Morten and all,
I have a questions which has bothering me for a long time.
What's the difference between API and ABI？
Why does this patch does not breake ABI， but break API(maybe)?
Hope for your reply, thanks.
在 2021/5/27 23:56, Morten Brørup 写道:
>> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Gregory Etelson
>> Sent: Thursday, 27 May 2021 17.29
> and version fields
>>
>> RTE IPv4 header definition combines the `version' and `ihl' fields
>> into a single structure member.
>> This patch introduces dedicated structure members for both `version'
>> and `ihl' IPv4 fields. Separated header fields definitions allow to
>> create simplified code to match on the IHL value in a flow rule.
>> The original `version_ihl' structure member is kept for backward
>> compatibility.
>>
>> Signed-off-by: Gregory Etelson <getelson@nvidia.com>
>> ---
>> app/test/test_flow_classify.c | 8 ++++----
>> lib/net/rte_ip.h | 16 +++++++++++++++-
>> 2 files changed, 19 insertions(+), 5 deletions(-)
>>
>> diff --git a/app/test/test_flow_classify.c
>> b/app/test/test_flow_classify.c
>> index 951606f248..4f64be5357 100644
>> --- a/app/test/test_flow_classify.c
>> +++ b/app/test/test_flow_classify.c
>> @@ -95,7 +95,7 @@ static struct rte_acl_field_def
>> ipv4_defs[NUM_FIELDS_IPV4] = {
>> * dst mask 255.255.255.00 / udp src is 32 dst is 33 / end"
>> */
>> static struct rte_flow_item_ipv4 ipv4_udp_spec_1 = {
>> - { 0, 0, 0, 0, 0, 0, IPPROTO_UDP, 0,
>> + { { .version_ihl = 0}, 0, 0, 0, 0, 0, IPPROTO_UDP, 0,
>> RTE_IPV4(2, 2, 2, 3), RTE_IPV4(2, 2, 2, 7)}
>> };
>> static const struct rte_flow_item_ipv4 ipv4_mask_24 = {
>> @@ -131,7 +131,7 @@ static struct rte_flow_item end_item = {
>> RTE_FLOW_ITEM_TYPE_END,
>> * dst mask 255.255.255.00 / tcp src is 16 dst is 17 / end"
>> */
>> static struct rte_flow_item_ipv4 ipv4_tcp_spec_1 = {
>> - { 0, 0, 0, 0, 0, 0, IPPROTO_TCP, 0,
>> + { { .version_ihl = 0}, 0, 0, 0, 0, 0, IPPROTO_TCP, 0,
>> RTE_IPV4(1, 2, 3, 4), RTE_IPV4(5, 6, 7, 8)}
>> };
>>
>> @@ -150,8 +150,8 @@ static struct rte_flow_item tcp_item_1 = {
>> RTE_FLOW_ITEM_TYPE_TCP,
>> * dst mask 255.255.255.00 / sctp src is 16 dst is 17/ end"
>> */
>> static struct rte_flow_item_ipv4 ipv4_sctp_spec_1 = {
>> - { 0, 0, 0, 0, 0, 0, IPPROTO_SCTP, 0, RTE_IPV4(11, 12, 13, 14),
>> - RTE_IPV4(15, 16, 17, 18)}
>> + { { .version_ihl = 0}, 0, 0, 0, 0, 0, IPPROTO_SCTP, 0,
>> + RTE_IPV4(11, 12, 13, 14), RTE_IPV4(15, 16, 17, 18)}
>> };
>>
>> static struct rte_flow_item_sctp sctp_spec_1 = {
>> diff --git a/lib/net/rte_ip.h b/lib/net/rte_ip.h
>> index 4b728969c1..684bb028b2 100644
>> --- a/lib/net/rte_ip.h
>> +++ b/lib/net/rte_ip.h
>> @@ -38,7 +38,21 @@ extern "C" {
>> * IPv4 Header
>> */
>> struct rte_ipv4_hdr {
>> - uint8_t version_ihl; /**< version and header length */
>> + __extension__
>> + union {
>> + uint8_t version_ihl; /**< version and header length */
>> + struct {
>> +#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
>> + uint8_t ihl:4;
>> + uint8_t version:4;
>> +#elif RTE_BYTE_ORDER == RTE_BIG_ENDIAN
>> + uint8_t version:4;
>> + uint8_t ihl:4;
>> +#else
>> +#error "setup endian definition"
>> +#endif
>> + };
>> + };
>> uint8_t type_of_service; /**< type of service */
>> rte_be16_t total_length; /**< length of packet */
>> rte_be16_t packet_id; /**< packet ID */
>> --
>> 2.31.1
>>
>
> This does not break the ABI, but it could be discussed if it breaks the API due to the required structure initialization changes shown in test_flow_classify.c. I think this patch is an improvement, and that such structure modifications should be generally accepted, so:
>
> Acked-by: Morten Brørup <mb@smartsharesystems.com>
>
> .
>
^ permalink raw reply [relevance 4%]
* Re: [dpdk-dev] [PATCH] net: introduce IPv4 ihl and version fields
2021-05-31 11:10 0% ` Gregory Etelson
@ 2021-06-02 9:51 0% ` Gregory Etelson
2021-06-10 4:10 0% ` Gregory Etelson
0 siblings, 1 reply; 200+ results
From: Gregory Etelson @ 2021-06-02 9:51 UTC (permalink / raw)
To: Morten Brørup, Iremonger, Bernard, dev
Cc: Matan Azrad, Ori Kam, Raslan Darawsheh, Olivier Matz, Thomas Monjalon
Hello,
Is there another concern about that patch ?
Please comment.
Regards,
Gregory
> -----Original Message-----
> From: Gregory Etelson
> Sent: Monday, May 31, 2021 14:10
> To: Ananyev, Konstantin <konstantin.ananyev@intel.com>; Morten Brørup
> <mb@smartsharesystems.com>; dev@dpdk.org
> Cc: Matan Azrad <matan@nvidia.com>; Ori Kam <orika@nvidia.com>;
> Raslan Darawsheh <rasland@nvidia.com>; Iremonger, Bernard
> <bernard.iremonger@intel.com>; Olivier Matz <olivier.matz@6wind.com>
> Subject: RE: [dpdk-dev] [PATCH] net: introduce IPv4 ihl and version fields
>
> > > > > > > RTE IPv4 header definition combines the `version' and `ihl'
> > > > > > > fields into a single structure member.
> > > > > > > This patch introduces dedicated structure members for both
> > > > > `version'
> > > > > > > and `ihl' IPv4 fields. Separated header fields definitions
> > > > > > > allow to create simplified code to match on the IHL value in
> > > > > > > a flow
> > rule.
> > > > > > > The original `version_ihl' structure member is kept for
> > > > > > > backward compatibility.
> > > > > > >
> > > > > > > Signed-off-by: Gregory Etelson <getelson@nvidia.com>
> > > > > > > ---
> > > > > > > app/test/test_flow_classify.c | 8 ++++----
> > > > > > > lib/net/rte_ip.h | 16 +++++++++++++++-
> > > > > > > 2 files changed, 19 insertions(+), 5 deletions(-)
> > > > > > >
> > > > > > > diff --git a/app/test/test_flow_classify.c
> > > > > > > b/app/test/test_flow_classify.c index 951606f248..4f64be5357
> > > > > > > 100644
> > > > > > > --- a/app/test/test_flow_classify.c
> > > > > > > +++ b/app/test/test_flow_classify.c
> > > > > > > @@ -95,7 +95,7 @@ static struct rte_acl_field_def
> > > > > > > ipv4_defs[NUM_FIELDS_IPV4] = {
> > > > > > > * dst mask 255.255.255.00 / udp src is 32 dst is 33 / end"
> > > > > > > */
> > > > > > > static struct rte_flow_item_ipv4 ipv4_udp_spec_1 = {
> > > > > > > - { 0, 0, 0, 0, 0, 0, IPPROTO_UDP, 0,
> > > > > > > + { { .version_ihl = 0}, 0, 0, 0, 0, 0, IPPROTO_UDP, 0,
> > > > > > > RTE_IPV4(2, 2, 2, 3), RTE_IPV4(2, 2, 2, 7)} }; static
> > > > > > > const struct rte_flow_item_ipv4 ipv4_mask_24 = { @@ -131,7
> > > > > > > +131,7 @@ static struct rte_flow_item end_item = {
> > > > RTE_FLOW_ITEM_TYPE_END,
> > > > > > > * dst mask 255.255.255.00 / tcp src is 16 dst is 17 / end"
> > > > > > > */
> > > > > > > static struct rte_flow_item_ipv4 ipv4_tcp_spec_1 = {
> > > > > > > - { 0, 0, 0, 0, 0, 0, IPPROTO_TCP, 0,
> > > > > > > + { { .version_ihl = 0}, 0, 0, 0, 0, 0, IPPROTO_TCP, 0,
> > > > > > > RTE_IPV4(1, 2, 3, 4), RTE_IPV4(5, 6, 7, 8)} };
> > > > > > >
> > > > > > > @@ -150,8 +150,8 @@ static struct rte_flow_item tcp_item_1
> > > > > > > = { RTE_FLOW_ITEM_TYPE_TCP,
> > > > > > > * dst mask 255.255.255.00 / sctp src is 16 dst is 17/ end"
> > > > > > > */
> > > > > > > static struct rte_flow_item_ipv4 ipv4_sctp_spec_1 = {
> > > > > > > - { 0, 0, 0, 0, 0, 0, IPPROTO_SCTP, 0, RTE_IPV4(11, 12, 13,
> > > > > > > 14),
> > > > > > > - RTE_IPV4(15, 16, 17, 18)}
> > > > > > > + { { .version_ihl = 0}, 0, 0, 0, 0, 0, IPPROTO_SCTP, 0,
> > > > > > > + RTE_IPV4(11, 12, 13, 14), RTE_IPV4(15, 16, 17, 18)}
> > > > > > > };
> > > > > > >
> > > > > > > static struct rte_flow_item_sctp sctp_spec_1 = { diff --git
> > > > > > > a/lib/net/rte_ip.h b/lib/net/rte_ip.h index
> > > > > > > 4b728969c1..684bb028b2
> > > > > > > 100644
> > > > > > > --- a/lib/net/rte_ip.h
> > > > > > > +++ b/lib/net/rte_ip.h
> > > > > > > @@ -38,7 +38,21 @@ extern "C" {
> > > > > > > * IPv4 Header
> > > > > > > */
> > > > > > > struct rte_ipv4_hdr {
> > > > > > > - uint8_t version_ihl; /**< version and header length */
> > > > > > > + __extension__
> > > > > > > + union {
> > > > > > > + uint8_t version_ihl; /**< version and header length */
> > > > > > > + struct {
> > > > > > > +#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
> > > > > > > + uint8_t ihl:4;
> > > > > > > + uint8_t version:4; #elif RTE_BYTE_ORDER ==
> > > > > > > +RTE_BIG_ENDIAN
> > > > > > > + uint8_t version:4;
> > > > > > > + uint8_t ihl:4; #else #error "setup endian
> > > > > > > +definition"
> > > > > > > +#endif
> > > > > > > + };
> > > > > > > + };
> > > > > > > uint8_t type_of_service; /**< type of service */
> > > > > > > rte_be16_t total_length; /**< length of packet */
> > > > > > > rte_be16_t packet_id; /**< packet ID */
> > > > > > > --
> > > > > > > 2.31.1
> > > > > > >
> > > > > >
> > > > > > This does not break the ABI, but it could be discussed if it
> > > > > > breaks
> > > > > the API due to the required structure initialization changes
> > > > > shown in
> > > > > > test_flow_classify.c.
> > > > >
> > > > > Yep, I guess it might be classified as API change.
> > > > > Another thing that concerns me - it is not the only place in
> > > > > IPv4 header when we unite multiple bit-fields into one field:
> > > > > type_of_service, fragment_offset.
> > > > > If we start splitting ipv4 fields into actual bitfields, I
> > > > > suppose we'll end-up splitting these ones too.
> > > > > But I am not sure it will pay off - as compiler not always
> > > > > generates optimal code for reading/updating bitfields.
> > > > > Did you consider just adding extra macros to simplify access to
> > > > > these fields (like RTE_IPV4_HDR_(GET_SET)_*), instead?
> > > > >
> > > >
> > > > Let's please not introduce accessor macros for bitfields. If we
> > > > don't introduce bitfields like these, I would rather stick with
> > > > the current _MASK, _SHIFT and _FLAG defines.
> > > >
> > > > Yes, this change will lead to the introduction of more bitfields,
> > > > both here and in other places. We already accepted it in the eCPRI
> > > > structure (/lib/net/rte_ecpri.h), so why not just generally accept it.
> > > >
> > > > Are modern compilers really worse at handling a bitfield defined
> > > > like this, compared to handling a single uint8_t with hand coding?
> > > > I consider your concern very important, so I'm only asking if it
> > > > is still relevant, to avoid making decisions based on past
> > > > experience that might be outdated. (I admit to falling into that
> > > > trap myself, once in a while.)
> > > >
> > >
> > > I compared x86 code generated with gcc-9, gcc-10 and clang-10 for
> > > these
> > 2 functions:
> > > void test_ipv4_hdr_byte(struct rte_ipv4_hdr *h, uint8_t version,
> > > uint8_t ihl) {
> > > h->version_ihl = ((version & 0x0f) << 4) | (ihl & 0x0f); }
> > > void test_ipv4_hdr_bits(struct rte_ipv4_hdr *h, uint8_t version,
> > > uint8_t
> > > ihl) {
> > > h->version = version & 0x0f;
> > > h->ihl = ihl & 0x0f;
> > > }
> > > meson configuration flags: --default-library=static
> > > --buildtype=release Each compiler produced identical code for both
> > functions.
> >
> > For that particular case (2 bit-fields packed tightly into one byte)
> > compilers usually perform quite well. At least I never saw issues for such
> case.
> > Bit-fields that do cross byte boundaries - that might be a trouble.
> >
>
> Can we keep both implementations, the combined byte and the bit-field,
> grouped into a union ? In that case application or PMD can select access
> method that fits.
>
> > >
> > >
> > > > > > I think this patch is an improvement, and that such structure
> > > > > modifications should be generally accepted, so:
> > > > > >
> > > > > > Acked-by: Morten Brørup <mb@smartsharesystems.com>
> > > > >
^ permalink raw reply [relevance 0%]
* [dpdk-dev] [PATCH v7 00/10] eal: Add EAL API for threading
@ 2021-06-01 20:55 2% ` Narcisa Ana Maria Vasile
2021-06-04 23:38 2% ` [dpdk-dev] [PATCH v8 " Narcisa Ana Maria Vasile
0 siblings, 1 reply; 200+ results
From: Narcisa Ana Maria Vasile @ 2021-06-01 20:55 UTC (permalink / raw)
To: dev, thomas, dmitry.kozliuk, khot, navasile, dmitrym, roretzla,
talshn, ocardona
Cc: bruce.richardson, david.marchand, pallavi.kadam
From: Narcisa Vasile <navasile@microsoft.com>
EAL thread API
**Problem Statement**
DPDK currently uses the pthread interface to create and manage threads.
Windows does not support the POSIX thread programming model, so it currently
relies on a header file that hides the Windows calls under
pthread matched interfaces. Given that EAL should isolate the environment
specifics from the applications and libraries and mediate
all the communication with the operating systems, a new EAL interface
is needed for thread management.
**Goals**
* Introduce a generic EAL API for threading support that will remove
the current Windows pthread.h shim.
* Replace references to pthread_* across the DPDK codebase with the new
RTE_THREAD_* API.
* Allow users to choose between using the RTE_THREAD_* API or a
3rd party thread library through a configuration option.
**Design plan**
New API main files:
* rte_thread.h (librte_eal/include)
* rte_thread_types.h (librte_eal/include)
* rte_thread_windows_types.h (librte_eal/windows/include)
* rte_thread.c (librte_eal/windows)
* rte_thread.c (librte_eal/common)
For flexibility, the user is offered the option of either using the RTE_THREAD_* API or
a 3rd party thread library, through a meson flag “use_external_thread_lib”.
By default, this flag is set to FALSE, which means Windows libraries and applications
will use the RTE_THREAD_* API for managing threads.
If compiling on Windows and the “use_external_thread_lib” is *not* set,
the following files will be parsed:
* include/rte_thread.h
* windows/include/rte_thread_windows_types.h
* windows/rte_thread.c
In all other cases, the compilation/parsing includes the following files:
* include/rte_thread.h
* include/rte_thread_types.h
* common/rte_thread.c
**A schematic example of the design**
--------------------------------------------------
lib/librte_eal/include/rte_thread.h
int rte_thread_create();
lib/librte_eal/common/rte_thread.c
int rte_thread_create()
{
return pthread_create();
}
lib/librte_eal/windows/rte_thread.c
int rte_thread_create()
{
return CreateThread();
}
lib/librte_eal/windows/meson.build
if get_option('use_external_thread_lib')
sources += 'librte_eal/common/rte_thread.c'
else
sources += 'librte_eal/windows/rte_thread.c'
endif
-----------------------------------------------------
**Thread attributes**
When or after a thread is created, specific characteristics of the thread
can be adjusted. Given that the thread characteristics that are of interest
for DPDK applications are affinity and priority, the following structure
that represents thread attributes has been defined:
typedef struct
{
enum rte_thread_priority priority;
rte_cpuset_t cpuset;
} rte_thread_attr_t;
The *rte_thread_create()* function can optionally receive an rte_thread_attr_t
object that will cause the thread to be created with the affinity and priority
described by the attributes object. If no rte_thread_attr_t is passed
(parameter is NULL), the default affinity and priority are used.
An rte_thread_attr_t object can also be set to the default values
by calling *rte_thread_attr_init()*.
*Priority* is represented through an enum that currently advertises
two values for priority:
- RTE_THREAD_PRIORITY_NORMAL
- RTE_THREAD_PRIORITY_REALTIME_CRITICAL
The enum can be extended to allow for multiple priority levels.
rte_thread_set_priority - sets the priority of a thread
rte_thread_attr_set_priority - updates an rte_thread_attr_t object
with a new value for priority
The user can choose thread priority through an EAL parameter,
when starting an application. If EAL parameter is not used,
the per-platform default value for thread priority is used.
Otherwise administrator has an option to set one of available options:
--thread-prio normal
--thread-prio realtime
Example:
./dpdk-l2fwd -l 0-3 -n 4 –thread-prio normal -- -q 8 -p ffff
*Affinity* is described by the already known “rte_cpuset_t” type.
rte_thread_attr_set/get_affinity - sets/gets the affinity field in a
rte_thread_attr_t object
rte_thread_set/get_affinity – sets/gets the affinity of a thread
**Errors**
A translation function that maps Windows error codes to errno-style
error codes is provided.
**Future work**
Note that this patchset was focused on introducing new API that will
remove the Windows pthread.h shim. In DPDK, there are still a few references
to pthread_* that were not implemented in the shim.
The long term plan is for EAL to provide full threading support:
* Adding support for conditional variables
* Additional functionality offered by pthread_* (such as pthread_setname_np, etc.)
* Static mutex initializers are not used on Windows. If we must continue
using them, they need to be platform dependent and an implementation will
need to be provided for Windows.
v7:
Based on DmitryK's review:
- Change thread id representation
- Change mutex id representation
- Implement static mutex inititalizer for Windows
- Change barrier identifier representation
- Improve commit messages
- Add missing doxygen comments
- Split error translation function
- Improve name for affinity function
- Remove cpuset_size parameter
- Fix eal_create_cpu_map function
- Map EAL priority values to OS specific values
- Add thread wrapper for start routine
- Do not export rte_thread_cancel() on Windows
- Cleanup, fix comments, fix typos.
v6:
- improve error-translation function
- call the error translation function in rte_thread_value_get()
v5:
- update cover letter with more details on the priority argument
v4:
- fix function description
- rebase
v3:
- rebase
v2:
- revert changes that break ABI
- break up changes into smaller patches
- fix coding style issues
- fix issues with errors
- fix parameter type in examples/kni.c
Narcisa Vasile (10):
eal: add thread id and simple thread functions
eal: add thread attributes
eal/windows: translate Windows errors to errno-style errors
eal: implement functions for thread affinity management
eal: implement thread priority management functions
eal: add thread lifetime management
eal: implement functions for mutex management
eal: implement functions for thread barrier management
eal: add EAL argument for setting thread priority
Enable the new EAL thread API
app/test/process.h | 8 +-
app/test/test_lcores.c | 16 +-
app/test/test_link_bonding.c | 10 +-
app/test/test_lpm_perf.c | 12 +-
config/meson.build | 4 +
drivers/bus/dpaa/base/qbman/bman_driver.c | 5 +-
drivers/bus/dpaa/base/qbman/dpaa_sys.c | 14 +-
drivers/bus/dpaa/base/qbman/process.c | 6 +-
drivers/bus/dpaa/dpaa_bus.c | 14 +-
drivers/bus/fslmc/portal/dpaa2_hw_dpio.c | 19 +-
drivers/compress/mlx5/mlx5_compress.c | 10 +-
drivers/event/dlb2/pf/base/dlb2_osdep.h | 4 +-
drivers/net/af_xdp/rte_eth_af_xdp.c | 18 +-
drivers/net/ark/ark_ethdev.c | 2 +-
drivers/net/atlantic/atl_ethdev.c | 4 +-
drivers/net/atlantic/atl_types.h | 5 +-
.../net/atlantic/hw_atl/hw_atl_utils_fw2x.c | 26 +-
drivers/net/axgbe/axgbe_common.h | 2 +-
drivers/net/axgbe/axgbe_dev.c | 8 +-
drivers/net/axgbe/axgbe_ethdev.c | 8 +-
drivers/net/axgbe/axgbe_ethdev.h | 8 +-
drivers/net/axgbe/axgbe_i2c.c | 4 +-
drivers/net/axgbe/axgbe_mdio.c | 8 +-
drivers/net/axgbe/axgbe_phy_impl.c | 6 +-
drivers/net/bnxt/bnxt.h | 16 +-
drivers/net/bnxt/bnxt_cpr.c | 4 +-
drivers/net/bnxt/bnxt_ethdev.c | 52 +-
drivers/net/bnxt/bnxt_irq.c | 8 +-
drivers/net/bnxt/bnxt_reps.c | 10 +-
drivers/net/bnxt/tf_ulp/bnxt_ulp.c | 34 +-
drivers/net/bnxt/tf_ulp/bnxt_ulp.h | 4 +-
drivers/net/bnxt/tf_ulp/ulp_fc_mgr.c | 24 +-
drivers/net/bnxt/tf_ulp/ulp_fc_mgr.h | 2 +-
drivers/net/ena/base/ena_plat_dpdk.h | 8 +-
drivers/net/enic/enic.h | 2 +-
drivers/net/ice/ice_dcf_parent.c | 4 +-
drivers/net/ipn3ke/ipn3ke_representor.c | 6 +-
drivers/net/ixgbe/ixgbe_ethdev.h | 2 +-
drivers/net/kni/rte_eth_kni.c | 8 +-
drivers/net/mlx5/linux/mlx5_os.c | 2 +-
drivers/net/mlx5/mlx5.c | 20 +-
drivers/net/mlx5/mlx5.h | 2 +-
drivers/net/mlx5/mlx5_txpp.c | 8 +-
drivers/net/mlx5/windows/mlx5_flow_os.c | 10 +-
drivers/net/mlx5/windows/mlx5_os.c | 2 +-
drivers/net/qede/base/bcm_osal.h | 8 +-
drivers/net/vhost/rte_eth_vhost.c | 24 +-
.../net/virtio/virtio_user/virtio_user_dev.c | 30 +-
.../net/virtio/virtio_user/virtio_user_dev.h | 2 +-
drivers/raw/ifpga/ifpga_rawdev.c | 6 +-
drivers/vdpa/ifc/ifcvf_vdpa.c | 46 +-
drivers/vdpa/mlx5/mlx5_vdpa.c | 24 +-
drivers/vdpa/mlx5/mlx5_vdpa.h | 6 +-
drivers/vdpa/mlx5/mlx5_vdpa_event.c | 73 +-
examples/kni/main.c | 6 +-
.../performance-thread/pthread_shim/main.c | 2 +-
examples/vhost/main.c | 2 +-
examples/vhost_blk/vhost_blk.c | 12 +-
lib/eal/common/eal_common_options.c | 34 +-
lib/eal/common/eal_common_proc.c | 48 +-
lib/eal/common/eal_common_thread.c | 31 +-
lib/eal/common/eal_common_trace.c | 2 +-
lib/eal/common/eal_internal_cfg.h | 2 +
lib/eal/common/eal_options.h | 2 +
lib/eal/common/eal_private.h | 2 +-
lib/eal/common/malloc_mp.c | 32 +-
lib/eal/common/meson.build | 1 +
lib/eal/common/rte_thread.c | 416 +++++++++++
lib/eal/freebsd/eal.c | 40 +-
lib/eal/freebsd/eal_alarm.c | 12 +-
lib/eal/freebsd/eal_interrupts.c | 4 +-
lib/eal/freebsd/eal_thread.c | 14 +-
lib/eal/include/meson.build | 1 +
lib/eal/include/rte_lcore.h | 8 +-
lib/eal/include/rte_per_lcore.h | 2 -
lib/eal/include/rte_thread.h | 364 +++++++++-
lib/eal/include/rte_thread_types.h | 14 +
lib/eal/linux/eal.c | 43 +-
lib/eal/linux/eal_alarm.c | 10 +-
lib/eal/linux/eal_interrupts.c | 4 +-
lib/eal/linux/eal_thread.c | 18 +-
lib/eal/linux/eal_timer.c | 2 +-
lib/eal/unix/meson.build | 1 -
lib/eal/unix/rte_thread.c | 92 ---
lib/eal/version.map | 21 +
lib/eal/windows/eal.c | 40 +-
lib/eal/windows/eal_interrupts.c | 10 +-
lib/eal/windows/eal_lcore.c | 169 +++--
lib/eal/windows/eal_thread.c | 28 +-
lib/eal/windows/eal_windows.h | 20 +-
lib/eal/windows/include/meson.build | 1 +
lib/eal/windows/include/pthread.h | 186 -----
.../include/rte_windows_thread_types.h | 19 +
lib/eal/windows/include/sched.h | 2 +-
lib/eal/windows/meson.build | 7 +-
lib/eal/windows/rte_thread.c | 671 +++++++++++++++++-
lib/ethdev/rte_ethdev.c | 4 +-
lib/ethdev/rte_ethdev_core.h | 5 +-
lib/ethdev/rte_flow.c | 4 +-
lib/eventdev/rte_event_eth_rx_adapter.c | 6 +-
lib/vhost/fd_man.c | 40 +-
lib/vhost/fd_man.h | 6 +-
lib/vhost/socket.c | 130 ++--
lib/vhost/vhost.c | 10 +-
meson_options.txt | 2 +
105 files changed, 2298 insertions(+), 972 deletions(-)
create mode 100644 lib/eal/common/rte_thread.c
create mode 100644 lib/eal/include/rte_thread_types.h
delete mode 100644 lib/eal/unix/rte_thread.c
delete mode 100644 lib/eal/windows/include/pthread.h
create mode 100644 lib/eal/windows/include/rte_windows_thread_types.h
--
2.31.0.vfs.0.1
^ permalink raw reply [relevance 2%]
* [dpdk-dev] [PATCH] doc: announce removal of ABIs in PCI bus driver
@ 2021-06-01 8:41 5% Chenbo Xia
0 siblings, 0 replies; 200+ results
From: Chenbo Xia @ 2021-06-01 8:41 UTC (permalink / raw)
To: dev, thomas; +Cc: mdr, nhorman
All ABIs in PCI bus driver, which are defined in rte_buc_pci.h,
will be removed and the header will be made internal.
Signed-off-by: Chenbo Xia <chenbo.xia@intel.com>
---
doc/guides/rel_notes/deprecation.rst | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/doc/guides/rel_notes/deprecation.rst b/doc/guides/rel_notes/deprecation.rst
index 9584d6bfd7..b01f46c62e 100644
--- a/doc/guides/rel_notes/deprecation.rst
+++ b/doc/guides/rel_notes/deprecation.rst
@@ -147,3 +147,8 @@ Deprecation Notices
* cmdline: ``cmdline`` structure will be made opaque to hide platform-specific
content. On Linux and FreeBSD, supported prior to DPDK 20.11,
original structure will be kept until DPDK 21.11.
+
+* pci: To reduce unnecessary ABIs exposed by DPDK bus driver, "rte_bus_pci.h"
+ will be made internal in 21.11 and macros/data structures/functions defined
+ in the header will not be considered as ABI anymore. This change is inspired
+ by the RFC https://patchwork.dpdk.org/project/dpdk/list/?series=17176.
--
2.17.1
^ permalink raw reply [relevance 5%]
* [dpdk-dev] 20.11.2 patches review and test
@ 2021-06-01 7:54 1% Xueming(Steven) Li
2021-06-08 8:52 0% ` Jiang, YuX
` (3 more replies)
0 siblings, 4 replies; 200+ results
From: Xueming(Steven) Li @ 2021-06-01 7:54 UTC (permalink / raw)
Cc: dev, Abhishek Marathe, Akhil Goyal, Ali Alnubani,
benjamin.walker, David Christensen, hariprasad.govindharajan,
Hemant Agrawal, Ian Stokes, Jerin Jacob, John McNamara,
Ju-Hyoung Lee, Kevin Traynor, Luca Boccassi, Pei Zhang, pingx.yu,
qian.q.xu, Raslan Darawsheh, NBU-Contact-Thomas Monjalon,
yuan.peng, zhaoyan.chen, Xueming(Steven) Li
Hi all,
Here is a list of patches targeted for stable release 20.11.2.
The planned date for the final release is 15th June.
Please help with testing and validation of your use cases and report
any issues/results with reply-all to this mail. For the final release
the fixes and reported validations will be added to the release notes.
A release candidate tarball can be found at:
https://dpdk.org/browse/dpdk-stable/tag/?id=v20.11.2-rc1
These patches are located at branch 20.11 of dpdk-stable repo:
https://dpdk.org/browse/dpdk-stable/
Thanks.
Xueming Li <xuemingl@nvidia.com>
---
Ajit Khaparde (3):
net/bnxt: fix RSS context cleanup
net/bnxt: check kvargs parsing
net/bnxt: fix resource cleanup
Alvin Zhang (7):
net/ice: fix VLAN filter with PF
net/i40e: fix input set field mask
net/igc: fix Rx RSS hash offload capability
net/igc: fix Rx error counter for bad length
net/e1000: fix Rx error counter for bad length
net/e1000: fix max Rx packet size
net/igc: fix Rx packet size
Anatoly Burakov (2):
fbarray: fix log message on truncation error
power: do not skip saving original P-state governor
Andrew Boyer (1):
net/ionic: fix completion type in lif init
Andrew Rybchenko (3):
net/failsafe: fix RSS hash offload reporting
net/failsafe: report minimum and maximum MTU
common/sfc_efx: remove GENEVE from supported tunnels
Ankur Dwivedi (1):
crypto/octeontx: fix session-less mode
Apeksha Gupta (1):
examples/l2fwd-crypto: skip masked devices
Arek Kusztal (1):
crypto/qat: fix offset for out-of-place scatter-gather
Beilei Xing (1):
net/i40evf: fix packet loss for X722
Bruce Richardson (1):
build: exclude meson files from examples installation
Chenbo Xia (1):
examples/vhost: check memory table query
Chengchang Tang (15):
net/hns3: fix HW buffer size on MTU update
net/hns3: fix processing Tx offload flags
net/hns3: fix Tx checksum for UDP packets with special port
net/hns3: fix long task queue pairs reset time
ethdev: validate input in module EEPROM dump
ethdev: validate input in register info
ethdev: validate input in EEPROM info
net/hns3: fix rollback after setting PVID failure
net/hns3: fix timing in resetting queues
net/hns3: fix queue state when concurrent with reset
net/hns3: fix configure FEC when concurrent with reset
net/hns3: fix use of command status enumeration
examples: add eal cleanup to examples
net/bonding: fix adding itself as its slave
net/hns3: fix timing in mailbox
Chengwen Feng (15):
net/hns3: fix flow counter value
net/hns3: fix VF mailbox head field
net/hns3: support get device version when dump register
net/hns3: fix some packet types
net/hns3: fix missing outer L4 UDP flag for VXLAN
net/hns3: remove VLAN/QinQ ptypes from support list
test: check thread creation
common/dpaax: fix possible null pointer access
examples/ethtool: remove unused parsing
net/hns3: fix flow director lock
net/e1000/base: fix timeout for shadow RAM write
net/hns3: fix setting default MAC address in bonding of VF
net/hns3: fix possible mismatched response of mailbox
net/hns3: fix VF handling LSC event in secondary process
net/hns3: fix verification of NEON support
Ciara Loftus (1):
net/af_xdp: fix error handling during Rx queue setup
Conor Walsh (1):
examples/l3fwd: fix LPM IPv6 subnets
Cristian Dumitrescu (3):
table: fix actions with different data size
pipeline: fix instruction translation
pipeline: fix endianness conversions
Dapeng Yu (3):
net/igc: remove MTU setting limitation
net/e1000: remove MTU setting limitation
examples/packet_ordering: fix port configuration
David Harton (1):
net/ena: fix releasing Tx ring mbufs
David Marchand (8):
doc: fix sphinx rtd theme import in GHA
service: clean references to removed symbol
eal: fix evaluation of log level option
ci: hook to GitHub Actions
ci: enable v21 ABI checks
ci: fix package installation in GitHub Actions
ci: ignore APT update failure in GitHub Actions
ci: catch coredumps
Dekel Peled (1):
common/mlx5: fix DevX read output buffer size
Dmitry Kozlyuk (3):
net/pcap: fix format string
eal/windows: add missing SPDX license tag
buildtools: fix all drivers disabled on Windows
Ed Czeck (2):
net/ark: update packet director initial state
net/ark: refactor Rx buffer recovery
Elad Nachman (2):
kni: support async user request
kni: fix kernel deadlock with bifurcated device
Feifei Wang (2):
net/i40e: fix parsing packet type for NEON
test/trace: fix race on collected perf data
Ferruh Yigit (3):
power: remove duplicated symbols from map file
log/linux: make default output stderr
license: fix typos
Guoyang Zhou (1):
net/hinic: fix crash in secondary process
Haiyue Wang (1):
net/ixgbe: fix Rx errors statistics for UDP checksum
Harman Kalra (1):
event/octeontx2: fix device reconfigure for single slot
Hongbo Zheng (3):
app/testpmd: fix Tx/Rx descriptor query error log
net/hns3: fix FLR miss detection
net/hns3: delete redundant blank line
Huisong Li (11):
net/hns3: fix device capabilities for copper media type
net/hns3: remove unused parameter markers
net/hns3: fix reporting undefined speed
net/hns3: fix link update when failed to get link info
net/hns3: fix flow control exception
app/testpmd: fix bitmap of link speeds when force speed
net/hns3: fix flow control mode
net/hns3: remove redundant mailbox response
net/hns3: fix DCB mode check
net/hns3: fix VMDq mode check
net/hns3: fix mbuf leakage
Ibtisam Tariq (1):
examples/vhost_crypto: remove unused short option
Igor Russkikh (2):
net/qede: reduce log verbosity
net/qede: accept bigger RSS table
Ilya Maximets (1):
net/virtio: fix interrupt unregistering for listening socket
Ivan Malov (5):
net/sfc: fix buffer size for flow parse
net: fix comment in IPv6 header
net/sfc: fix error path inconsistency
common/sfc_efx/base: fix indication of MAE encap support
net/sfc: fix outer rule rollback on error
Jiawei Wang (2):
app/testpmd: fix NVGRE encap configuration
net/mlx5: fix resource release for mirror flow
Jiawei Zhu (1):
net/mlx5: fix Rx segmented packets on mbuf starvation
Jiawen Wu (3):
net/txgbe: remove unused functions
net/txgbe: fix Rx missed packet counter
net/txgbe: update packet type
John Daley (1):
net/enic: fix flow initialization error handling
Kalesh AP (18):
net/bnxt: remove unused macro
net/bnxt: fix VNIC configuration
net/bnxt: fix firmware fatal error handling
net/bnxt: fix FW readiness check during recovery
net/bnxt: fix device readiness check
net/bnxt: fix VF info allocation
net/bnxt: fix HWRM and FW incompatibility handling
net/bnxt: mute some failure logs
app/testpmd: check MAC address query
net/bnxt: fix PCI write check
net/bnxt: fix link state operations
net/bnxt: fix timesync when PTP is not supported
net/bnxt: fix memory allocation for command response
net/bnxt: fix double free in port start failure
net/bnxt: fix configuring LRO
net/bnxt: fix health check alarm cancellation
net/bnxt: fix PTP support for Thor
net/bnxt: fix ring count calculation for Thor
Kevin Traynor (1):
test/cmdline: fix inputs array
Lance Richardson (6):
net/bnxt: fix Rx buffer posting
net/bnxt: fix Tx length hint threshold
net/bnxt: fix handling of null flow mask
test: fix TCP header initialization
net/bnxt: fix Rx descriptor status
net/bnxt: fix Rx queue count
Leyi Rong (1):
net/iavf: fix packet length parsing in AVX512
Li Zhang (1):
net/mlx5: fix flow actions index in cache
Luc Pelletier (2):
eal: fix race in control thread creation
eal: fix hang in control thread creation
Marvin Liu (5):
vhost: fix split ring potential buffer overflow
vhost: fix packed ring potential buffer overflow
vhost: fix batch dequeue potential buffer overflow
vhost: fix initialization of temporary header
vhost: fix initialization of async temporary header
Matan Azrad (4):
common/mlx5/linux: add glue function to query WQ
common/mlx5: add DevX command to query WQ
common/mlx5: add DevX commands for queue counters
vdpa/mlx5: fix virtq cleaning
Min Hu (Connor) (8):
net/hns3: fix MTU config complexity
net/hns3: update HiSilicon copyright syntax
net/hns3: fix copyright date
examples/ptpclient: remove wrong comment
test/bpf: fix error message
doc: fix HiSilicon copyright syntax
net/hns3: remove unused macros
net/hns3: remove unused macro
Murphy Yang (3):
net/ixgbe: fix RSS RETA being reset after port start
net/i40e: fix flow director config after flow validate
net/i40e: fix flow director for common pctypes
Natanael Copa (5):
common/dpaax/caamflib: fix build with musl
bus/dpaa: fix 64-bit arch detection
bus/dpaa: fix build with musl
net/cxgbe: remove use of uint type
app/testpmd: fix build with musl
Nipun Gupta (1):
bus/dpaa: fix statistics reading
Nithin Dabilpuram (3):
vfio: do not merge contiguous areas
vfio: fix DMA mapping granularity for IOVA as VA
test/mem: fix page size for external memory
Pallavi Kadam (1):
bus/pci: skip probing some Windows NDIS devices
Pavan Nikhilesh (2):
test/event: fix timeout accuracy
app/eventdev: fix timeout accuracy
Pu Xu (1):
ip_frag: fix fragmenting IPv4 packet with header option
Qi Zhang (7):
net/ice/base: fix payload indicator on ptype
net/ice/base: fix uninitialized struct
net/ice/base: cleanup filter list on error
net/ice/base: fix memory allocation for MAC addresses
net/iavf: fix TSO max segment size
doc: fix matching versions in ice guide
net/iavf: fix wrong Tx context descriptor
Radha Mohan Chintakuntla (1):
raw/octeontx2_dma: assign PCI device in DPI VF
Raslan Darawsheh (1):
ethdev: update flow item GTP QFI definition
Richael Zhuang (2):
test/power: add delay before checking CPU frequency
test/power: round CPU frequency to check
Robin Zhang (4):
net/i40e: announce request queue capability in PF
doc: update recommended versions for i40e
net/i40e: fix lack of MAC type when set MAC address
net/iavf: fix lack of MAC type when set MAC address
Rohit Raj (3):
net/dpaa2: fix getting link status
net/dpaa: fix getting link status
examples/l2fwd-crypto: fix packet length while decryption
Roy Shterman (1):
mem: fix freeing segments in --huge-unlink mode
Satheesh Paul (1):
net/octeontx2: fix VLAN filter
Savinay Dharmappa (1):
sched: fix traffic class oversubscription parameter
Shijith Thotton (1):
eventdev: fix case to initiate crypto adapter service
Siwar Zitouni (1):
net/ice: fix disabling promiscuous mode Somnath Kotur (3):
net/bnxt: fix xstats get
net/bnxt: fix Rx and Tx timestamps
net/bnxt: fix Tx timestamp init
Stanislaw Kardach (1):
test: proceed if timer subsystem already initialized
Stephen Hemminger (1):
kni: refactor user request processing
Tal Shnaiderman (2):
eal/windows: fix default thread priority
eal/windows: fix return codes of pthread shim layer
Tengfei Zhang (1):
net/pcap: fix file descriptor leak on close
Thinh Tran (1):
test: fix autotest handling of skipped tests
Thomas Monjalon (16):
bus/pci: fix Windows kernel driver categories
eal: fix comment of OS-specific header files
buildtools: fix build with busybox
build: detect execinfo library on Linux
build: remove redundant _GNU_SOURCE definitions
eal: fix build with musl
net/igc: remove use of uint type
event/dlb: fix header includes for musl
examples/bbdev: fix header include for musl
drivers: fix log level after loading
app/regex: fix usage text
app/testpmd: fix usage text
doc: fix names of UIO drivers
doc: fix build with Sphinx 4
bus/pci: support I/O port operations with musl
app: fix exit messages
Tyler Retzlaff (1):
eal: add C++ include guard for reciprocal header
Vadim Podovinnikov (1):
net/bonding: fix LACP system address check
Venkat Duvvuru (1):
net/bnxt: fix queues per VNIC
Viacheslav Ovsiienko (11):
net/mlx5: fix external buffer pool registration for Rx queue
net/mlx5: fix metadata item validation for ingress flows
net/mlx5: fix hashed list size for tunnel flow groups
net/mlx5: fix UAR allocation diagnostics messages
common/mlx5: add timestamp format support to DevX
vdpa/mlx5: support timestamp format
net/mlx5: fix Rx metadata leftovers
net/mlx5: fix drop action for Direct Rules/Verbs
net/mlx4: fix RSS action with null hash key
net/mlx5: support timestamp format
regex/mlx5: support timestamp format
Wenjun Wu (2):
net/ice: check some functions return
net/ice: fix RSS hash update
Wenwu Ma (1):
net/ice: fix illegal access when removing MAC filter
Wenzhuo Lu (2):
net/iavf: fix crash in AVX512
net/ice: fix crash in AVX512
Wisam Jaddo (1):
app/flow-perf: fix encap/decap actions
Xiao Wang (1):
vdpa/ifc: check PCI config read
Xiaoyu Min (4):
net/mlx5: support RSS expansion for IPv6 GRE
net/mlx5: fix shared inner RSS
net/mlx5: fix missing shared RSS hash types
net/mlx5: fix redundant flow after RSS expansion
Xiaoyun Li (2):
app/testpmd: remove unnecessary UDP tunnel check
net/i40e: fix IPv4 fragment offload
Youri Querry (1):
bus/fslmc: fix random portal hangs with qbman 5.0
Yunjian Wang (3):
vfio: fix API description
net/mlx5: fix using flow tunnel before null check
vfio: fix duplicated user mem map
^ permalink raw reply [relevance 1%]
* [dpdk-dev] [RFC v3 0/6] Add mdev (Mediated device) support in DPDK
@ 2021-06-01 3:06 2% ` Chenbo Xia
2021-06-11 7:15 0% ` Thomas Monjalon
0 siblings, 1 reply; 200+ results
From: Chenbo Xia @ 2021-06-01 3:06 UTC (permalink / raw)
To: dev, thomas, cunming.liang, jingjing.wu
Cc: anatoly.burakov, ferruh.yigit, mdr, nhorman, bruce.richardson,
david.marchand, stephen, konstantin.ananyev
Hi everyone,
This is a draft implementation of the mdev (Mediated device [1])
support in DPDK PCI bus driver. Mdev is a way to virtualize devices
in Linux kernel. Based on the device-api (mdev_type/device_api),
there could be different types of mdev devices (e.g. vfio-pci).
In this patchset, the PCI bus driver is extended to support scanning
and probing the mdev devices whose device-api is "vfio-pci".
+---------+
| PCI bus |
+----+----+
|
+--------+-------+-------+--------+
| | | |
Physical PCI devices ... Mediated PCI devices ...
The first four patches in this patchset are mainly preparation of mdev
bus support. The left two patches are the key implementation of mdev bus.
The implementation of mdev bus in DPDK has several options:
1: Embed mdev bus in current pci bus
This patchset takes this option for an example. Mdev has several
device types: pci/platform/amba/ccw/ap. DPDK currently only cares
pci devices in all mdev device types so we could embed the mdev bus
into current pci bus. Then pci bus with mdev support will scan/plug/
unplug/.. not only normal pci devices but also mediated pci devices.
2: A new mdev bus that scans mediated pci devices and probes mdev driver to
plug-in pci devices to pci bus
If we took this option, a new mdev bus will be implemented to scan
mediated pci devices and a new mdev driver for pci devices will be
implemented in pci bus to plug-in mediated pci devices to pci bus.
Our RFC v1 takes this option:
http://patchwork.dpdk.org/project/dpdk/cover/20190403071844.21126-1-tiwei.bie@intel.com/
Note that: for either option 1 or 2, device drivers do not know the
implementation difference but only use structs/functions exposed by
pci bus. Mediated pci devices are different from normal pci devices
on: 1. Mediated pci devices use UUID as address but normal ones use BDF.
2. Mediated pci devices may have some capabilities that normal pci
devices do not have. For example, mediated pci devices could have
regions that have sparse mmap capability, which allows a region to have
multiple mmap areas. Another example is mediated pci devices may have
regions/part of regions not mmaped but need to access them. Above
difference will change the current ABI (i.e., struct rte_pci_device).
Please check 5th and 6th patch for details.
3. A brand new mdev bus that does everything
This option will implement a new and standalone mdev bus. This option
does not need any changes in current pci bus but only needs some shared
code (linux vfio part) in pci bus. Drivers of devices that support mdev
will register itself as a mdev driver and do not rely on pci bus anymore.
This option, IMHO, will make the code clean. The only potential problem
may be code duplication, which could be solved by making code of linux
vfio part of pci bus common and shared.
Your comments on above three options are welcomed and appreciated!
Thanks!
Chenbo
----------------------------------------------------------------------------
RFC v3:
- Add sparse mmap support
- Minor fixes and improvements
RFC v2:
- Let PCI bus scan mediated PCI devices directly
- Address Keith's comments
- Merge below patch into this series (David)
http://patches.dpdk.org/patch/55927/
- Add internal representation of PCI device (David)
- Minor fixes and improvements
[1] https://github.com/torvalds/linux/blob/master/Documentation/driver-api/vfio-mediated-device.rst
Chenbo Xia (1):
bus/pci: add sparse mmap support for mediated PCI devices
Tiwei Bie (5):
bus/pci: introduce an internal representation of PCI device
bus/pci: avoid depending on private value in kernel source
bus/pci: introduce helper for MMIO read and write
eal: add a helper for reading string from sysfs
bus/pci: add mdev support
drivers/bus/pci/bsd/pci.c | 36 +-
drivers/bus/pci/linux/pci.c | 107 ++++-
drivers/bus/pci/linux/pci_init.h | 29 +-
drivers/bus/pci/linux/pci_uio.c | 22 +
drivers/bus/pci/linux/pci_vfio.c | 586 ++++++++++++++++++++++----
drivers/bus/pci/linux/pci_vfio_mdev.c | 277 ++++++++++++
drivers/bus/pci/meson.build | 1 +
drivers/bus/pci/pci_common.c | 86 ++--
drivers/bus/pci/pci_params.c | 36 +-
drivers/bus/pci/private.h | 40 ++
drivers/bus/pci/rte_bus_pci.h | 83 +++-
drivers/bus/pci/version.map | 4 +
lib/eal/common/eal_filesystem.h | 10 +
lib/eal/freebsd/eal.c | 22 +
lib/eal/linux/eal.c | 39 +-
lib/eal/version.map | 3 +
16 files changed, 1224 insertions(+), 157 deletions(-)
create mode 100644 drivers/bus/pci/linux/pci_vfio_mdev.c
--
2.17.1
^ permalink raw reply [relevance 2%]
* [dpdk-dev] [PATCH v1 2/2] devtools: use absolute path for the build directory
2021-06-01 1:56 8% [dpdk-dev] [PATCH v1 0/2] relative path support for ABI compatibility check Feifei Wang
2021-06-01 1:56 17% ` [dpdk-dev] [PATCH v1 1/2] devtools: add " Feifei Wang
@ 2021-06-01 1:56 12% ` Feifei Wang
1 sibling, 0 replies; 200+ results
From: Feifei Wang @ 2021-06-01 1:56 UTC (permalink / raw)
To: Bruce Richardson
Cc: dev, nd, Phil Yang, Juraj Linkeš, Feifei Wang, Ruifeng Wang
From: Phil Yang <phil.yang@arm.com>
To make the code easier to maintain, use the absolute path for the
default build_dir to avoid repeatedly calling of readlink.
Suggested-by: Juraj Linkeš <juraj.linkes@pantheon.tech>
Signed-off-by: Phil Yang <phil.yang@arm.com>
Signed-off-by: Feifei Wang <feifei.wang2@arm.com>
Reviewed-by: Juraj Linkeš <juraj.linkes@pantheon.tech>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
---
devtools/test-meson-builds.sh | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/devtools/test-meson-builds.sh b/devtools/test-meson-builds.sh
index 43b906598d..d6b0e7e059 100755
--- a/devtools/test-meson-builds.sh
+++ b/devtools/test-meson-builds.sh
@@ -16,7 +16,7 @@ srcdir=$(dirname $(readlink -f $0))/..
MESON=${MESON:-meson}
use_shared="--default-library=shared"
-builds_dir=${DPDK_BUILD_TEST_DIR:-.}
+builds_dir=$(readlink -f ${DPDK_BUILD_TEST_DIR:-.})
if command -v gmake >/dev/null 2>&1 ; then
MAKE=gmake
@@ -193,16 +193,16 @@ build () # <directory> <target cc | cross file> <ABI check> [meson options]
fi
install_target $builds_dir/$targetdir \
- $(readlink -f $builds_dir/$targetdir/install)
+ $builds_dir/$targetdir/install
echo "Checking ABI compatibility of $targetdir" >&$verbose
echo $srcdir/devtools/gen-abi.sh \
- $(readlink -f $builds_dir/$targetdir/install) >&$veryverbose
+ $builds_dir/$targetdir/install >&$veryverbose
$srcdir/devtools/gen-abi.sh \
- $(readlink -f $builds_dir/$targetdir/install) >&$veryverbose
+ $builds_dir/$targetdir/install >&$veryverbose
echo $srcdir/devtools/check-abi.sh $abirefdir/$targetdir \
- $(readlink -f $builds_dir/$targetdir/install) >&$veryverbose
+ $builds_dir/$targetdir/install >&$veryverbose
$srcdir/devtools/check-abi.sh $abirefdir/$targetdir \
- $(readlink -f $builds_dir/$targetdir/install) >&$verbose
+ $builds_dir/$targetdir/install >&$verbose
fi
}
@@ -275,7 +275,7 @@ done
# Test installation of the x86-generic target, to be used for checking
# the sample apps build using the pkg-config file for cflags and libs
load_env cc
-build_path=$(readlink -f $builds_dir/build-x86-generic)
+build_path=$builds_dir/build-x86-generic
export DESTDIR=$build_path/install
install_target $build_path $DESTDIR
pc_file=$(find $DESTDIR -name libdpdk.pc)
--
2.25.1
^ permalink raw reply [relevance 12%]
* [dpdk-dev] [PATCH v1 1/2] devtools: add relative path support for ABI compatibility check
2021-06-01 1:56 8% [dpdk-dev] [PATCH v1 0/2] relative path support for ABI compatibility check Feifei Wang
@ 2021-06-01 1:56 17% ` Feifei Wang
2021-06-22 2:08 4% ` [dpdk-dev] 回复: " Feifei Wang
2021-06-22 9:19 4% ` [dpdk-dev] " Bruce Richardson
2021-06-01 1:56 12% ` [dpdk-dev] [PATCH v1 2/2] devtools: use absolute path for the build directory Feifei Wang
1 sibling, 2 replies; 200+ results
From: Feifei Wang @ 2021-06-01 1:56 UTC (permalink / raw)
To: Bruce Richardson
Cc: dev, nd, Phil Yang, Feifei Wang, Juraj Linkeš, Ruifeng Wang
From: Phil Yang <phil.yang@arm.com>
Because dpdk guide does not limit the relative path for ABI
compatibility check, users maybe set 'DPDK_ABI_REF_DIR' as a relative
path:
~/dpdk/devtools$ DPDK_ABI_REF_VERSION=v19.11 DPDK_ABI_REF_DIR=build-gcc-shared
./test-meson-builds.sh
And if the DESTDIR is not an absolute path, ninja complains:
+ install_target build-gcc-shared/v19.11/build build-gcc-shared/v19.11/build-gcc-shared
+ rm -rf build-gcc-shared/v19.11/build-gcc-shared
+ echo 'DESTDIR=build-gcc-shared/v19.11/build-gcc-shared ninja -C build-gcc-shared/v19.11/build install'
+ DESTDIR=build-gcc-shared/v19.11/build-gcc-shared
+ ninja -C build-gcc-shared/v19.11/build install
...
ValueError: dst_dir must be absolute, got build-gcc-shared/v19.11/build-gcc-shared/usr/local/share/dpdk/
examples/bbdev_app
...
Error: install directory 'build-gcc-shared/v19.11/build-gcc-shared' does not exist.
To fix this, add relative path support using 'readlink -f'.
Signed-off-by: Phil Yang <phil.yang@arm.com>
Signed-off-by: Feifei Wang <feifei.wang2@arm.com>
Reviewed-by: Juraj Linkeš <juraj.linkes@pantheon.tech>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
---
devtools/test-meson-builds.sh | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/devtools/test-meson-builds.sh b/devtools/test-meson-builds.sh
index daf817ac3e..43b906598d 100755
--- a/devtools/test-meson-builds.sh
+++ b/devtools/test-meson-builds.sh
@@ -168,7 +168,8 @@ build () # <directory> <target cc | cross file> <ABI check> [meson options]
config $srcdir $builds_dir/$targetdir $cross --werror $*
compile $builds_dir/$targetdir
if [ -n "$DPDK_ABI_REF_VERSION" -a "$abicheck" = ABI ] ; then
- abirefdir=${DPDK_ABI_REF_DIR:-reference}/$DPDK_ABI_REF_VERSION
+ abirefdir=$(readlink -f \
+ ${DPDK_ABI_REF_DIR:-reference}/$DPDK_ABI_REF_VERSION)
if [ ! -d $abirefdir/$targetdir ]; then
# clone current sources
if [ ! -d $abirefdir/src ]; then
--
2.25.1
^ permalink raw reply [relevance 17%]
* [dpdk-dev] [PATCH v1 0/2] relative path support for ABI compatibility check
@ 2021-06-01 1:56 8% Feifei Wang
2021-06-01 1:56 17% ` [dpdk-dev] [PATCH v1 1/2] devtools: add " Feifei Wang
2021-06-01 1:56 12% ` [dpdk-dev] [PATCH v1 2/2] devtools: use absolute path for the build directory Feifei Wang
0 siblings, 2 replies; 200+ results
From: Feifei Wang @ 2021-06-01 1:56 UTC (permalink / raw)
Cc: dev, nd, Feifei Wang
Add relative path support for ABI compatibility check and do some code
simplification work.
Phil Yang (2):
devtools: add relative path support for ABI compatibility check
devtools: use absolute path for the build directory
devtools/test-meson-builds.sh | 17 +++++++++--------
1 file changed, 9 insertions(+), 8 deletions(-)
--
2.25.1
^ permalink raw reply [relevance 8%]
* Re: [dpdk-dev] [PATCH] net: introduce IPv4 ihl and version fields
2021-05-31 9:58 0% ` Ananyev, Konstantin
@ 2021-05-31 11:10 0% ` Gregory Etelson
2021-06-02 9:51 0% ` Gregory Etelson
0 siblings, 1 reply; 200+ results
From: Gregory Etelson @ 2021-05-31 11:10 UTC (permalink / raw)
To: Ananyev, Konstantin, Morten Brørup, dev
Cc: Matan Azrad, Ori Kam, Raslan Darawsheh, Iremonger, Bernard, Olivier Matz
> > > > > > RTE IPv4 header definition combines the `version' and `ihl'
> > > > > > fields into a single structure member.
> > > > > > This patch introduces dedicated structure members for both
> > > > `version'
> > > > > > and `ihl' IPv4 fields. Separated header fields definitions
> > > > > > allow to create simplified code to match on the IHL value in a flow
> rule.
> > > > > > The original `version_ihl' structure member is kept for
> > > > > > backward compatibility.
> > > > > >
> > > > > > Signed-off-by: Gregory Etelson <getelson@nvidia.com>
> > > > > > ---
> > > > > > app/test/test_flow_classify.c | 8 ++++----
> > > > > > lib/net/rte_ip.h | 16 +++++++++++++++-
> > > > > > 2 files changed, 19 insertions(+), 5 deletions(-)
> > > > > >
> > > > > > diff --git a/app/test/test_flow_classify.c
> > > > > > b/app/test/test_flow_classify.c index 951606f248..4f64be5357
> > > > > > 100644
> > > > > > --- a/app/test/test_flow_classify.c
> > > > > > +++ b/app/test/test_flow_classify.c
> > > > > > @@ -95,7 +95,7 @@ static struct rte_acl_field_def
> > > > > > ipv4_defs[NUM_FIELDS_IPV4] = {
> > > > > > * dst mask 255.255.255.00 / udp src is 32 dst is 33 / end"
> > > > > > */
> > > > > > static struct rte_flow_item_ipv4 ipv4_udp_spec_1 = {
> > > > > > - { 0, 0, 0, 0, 0, 0, IPPROTO_UDP, 0,
> > > > > > + { { .version_ihl = 0}, 0, 0, 0, 0, 0, IPPROTO_UDP, 0,
> > > > > > RTE_IPV4(2, 2, 2, 3), RTE_IPV4(2, 2, 2, 7)} }; static
> > > > > > const struct rte_flow_item_ipv4 ipv4_mask_24 = { @@ -131,7
> > > > > > +131,7 @@ static struct rte_flow_item end_item = {
> > > RTE_FLOW_ITEM_TYPE_END,
> > > > > > * dst mask 255.255.255.00 / tcp src is 16 dst is 17 / end"
> > > > > > */
> > > > > > static struct rte_flow_item_ipv4 ipv4_tcp_spec_1 = {
> > > > > > - { 0, 0, 0, 0, 0, 0, IPPROTO_TCP, 0,
> > > > > > + { { .version_ihl = 0}, 0, 0, 0, 0, 0, IPPROTO_TCP, 0,
> > > > > > RTE_IPV4(1, 2, 3, 4), RTE_IPV4(5, 6, 7, 8)} };
> > > > > >
> > > > > > @@ -150,8 +150,8 @@ static struct rte_flow_item tcp_item_1 =
> > > > > > { RTE_FLOW_ITEM_TYPE_TCP,
> > > > > > * dst mask 255.255.255.00 / sctp src is 16 dst is 17/ end"
> > > > > > */
> > > > > > static struct rte_flow_item_ipv4 ipv4_sctp_spec_1 = {
> > > > > > - { 0, 0, 0, 0, 0, 0, IPPROTO_SCTP, 0, RTE_IPV4(11, 12, 13,
> > > > > > 14),
> > > > > > - RTE_IPV4(15, 16, 17, 18)}
> > > > > > + { { .version_ihl = 0}, 0, 0, 0, 0, 0, IPPROTO_SCTP, 0,
> > > > > > + RTE_IPV4(11, 12, 13, 14), RTE_IPV4(15, 16, 17, 18)}
> > > > > > };
> > > > > >
> > > > > > static struct rte_flow_item_sctp sctp_spec_1 = { diff --git
> > > > > > a/lib/net/rte_ip.h b/lib/net/rte_ip.h index
> > > > > > 4b728969c1..684bb028b2
> > > > > > 100644
> > > > > > --- a/lib/net/rte_ip.h
> > > > > > +++ b/lib/net/rte_ip.h
> > > > > > @@ -38,7 +38,21 @@ extern "C" {
> > > > > > * IPv4 Header
> > > > > > */
> > > > > > struct rte_ipv4_hdr {
> > > > > > - uint8_t version_ihl; /**< version and header length */
> > > > > > + __extension__
> > > > > > + union {
> > > > > > + uint8_t version_ihl; /**< version and header length */
> > > > > > + struct {
> > > > > > +#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
> > > > > > + uint8_t ihl:4;
> > > > > > + uint8_t version:4; #elif RTE_BYTE_ORDER ==
> > > > > > +RTE_BIG_ENDIAN
> > > > > > + uint8_t version:4;
> > > > > > + uint8_t ihl:4; #else #error "setup endian
> > > > > > +definition"
> > > > > > +#endif
> > > > > > + };
> > > > > > + };
> > > > > > uint8_t type_of_service; /**< type of service */
> > > > > > rte_be16_t total_length; /**< length of packet */
> > > > > > rte_be16_t packet_id; /**< packet ID */
> > > > > > --
> > > > > > 2.31.1
> > > > > >
> > > > >
> > > > > This does not break the ABI, but it could be discussed if it
> > > > > breaks
> > > > the API due to the required structure initialization changes shown
> > > > in
> > > > > test_flow_classify.c.
> > > >
> > > > Yep, I guess it might be classified as API change.
> > > > Another thing that concerns me - it is not the only place in IPv4
> > > > header when we unite multiple bit-fields into one field:
> > > > type_of_service, fragment_offset.
> > > > If we start splitting ipv4 fields into actual bitfields, I suppose
> > > > we'll end-up splitting these ones too.
> > > > But I am not sure it will pay off - as compiler not always
> > > > generates optimal code for reading/updating bitfields.
> > > > Did you consider just adding extra macros to simplify access to
> > > > these fields (like RTE_IPV4_HDR_(GET_SET)_*), instead?
> > > >
> > >
> > > Let's please not introduce accessor macros for bitfields. If we
> > > don't introduce bitfields like these, I would rather stick with the
> > > current _MASK, _SHIFT and _FLAG defines.
> > >
> > > Yes, this change will lead to the introduction of more bitfields,
> > > both here and in other places. We already accepted it in the eCPRI
> > > structure (/lib/net/rte_ecpri.h), so why not just generally accept it.
> > >
> > > Are modern compilers really worse at handling a bitfield defined
> > > like this, compared to handling a single uint8_t with hand coding? I
> > > consider your concern very important, so I'm only asking if it is
> > > still relevant, to avoid making decisions based on past experience
> > > that might be outdated. (I admit to falling into that trap myself,
> > > once in a while.)
> > >
> >
> > I compared x86 code generated with gcc-9, gcc-10 and clang-10 for these
> 2 functions:
> > void test_ipv4_hdr_byte(struct rte_ipv4_hdr *h, uint8_t version,
> > uint8_t ihl) {
> > h->version_ihl = ((version & 0x0f) << 4) | (ihl & 0x0f); } void
> > test_ipv4_hdr_bits(struct rte_ipv4_hdr *h, uint8_t version, uint8_t
> > ihl) {
> > h->version = version & 0x0f;
> > h->ihl = ihl & 0x0f;
> > }
> > meson configuration flags: --default-library=static
> > --buildtype=release Each compiler produced identical code for both
> functions.
>
> For that particular case (2 bit-fields packed tightly into one byte) compilers
> usually perform quite well. At least I never saw issues for such case.
> Bit-fields that do cross byte boundaries - that might be a trouble.
>
Can we keep both implementations, the combined byte and the bit-field,
grouped into a union ? In that case application or PMD can select access
method that fits.
> >
> >
> > > > > I think this patch is an improvement, and that such structure
> > > > modifications should be generally accepted, so:
> > > > >
> > > > > Acked-by: Morten Brørup <mb@smartsharesystems.com>
> > > >
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH] net: introduce IPv4 ihl and version fields
2021-05-28 14:18 0% ` Gregory Etelson
@ 2021-05-31 9:58 0% ` Ananyev, Konstantin
2021-05-31 11:10 0% ` Gregory Etelson
0 siblings, 1 reply; 200+ results
From: Ananyev, Konstantin @ 2021-05-31 9:58 UTC (permalink / raw)
To: Gregory Etelson, Morten Brørup, dev
Cc: Matan Azrad, Ori Kam, Raslan Darawsheh, Iremonger, Bernard, Olivier Matz
> > > > > RTE IPv4 header definition combines the `version' and `ihl'
> > > > > fields into a single structure member.
> > > > > This patch introduces dedicated structure members for both
> > > `version'
> > > > > and `ihl' IPv4 fields. Separated header fields definitions allow
> > > > > to create simplified code to match on the IHL value in a flow rule.
> > > > > The original `version_ihl' structure member is kept for backward
> > > > > compatibility.
> > > > >
> > > > > Signed-off-by: Gregory Etelson <getelson@nvidia.com>
> > > > > ---
> > > > > app/test/test_flow_classify.c | 8 ++++----
> > > > > lib/net/rte_ip.h | 16 +++++++++++++++-
> > > > > 2 files changed, 19 insertions(+), 5 deletions(-)
> > > > >
> > > > > diff --git a/app/test/test_flow_classify.c
> > > > > b/app/test/test_flow_classify.c index 951606f248..4f64be5357
> > > > > 100644
> > > > > --- a/app/test/test_flow_classify.c
> > > > > +++ b/app/test/test_flow_classify.c
> > > > > @@ -95,7 +95,7 @@ static struct rte_acl_field_def
> > > > > ipv4_defs[NUM_FIELDS_IPV4] = {
> > > > > * dst mask 255.255.255.00 / udp src is 32 dst is 33 / end"
> > > > > */
> > > > > static struct rte_flow_item_ipv4 ipv4_udp_spec_1 = {
> > > > > - { 0, 0, 0, 0, 0, 0, IPPROTO_UDP, 0,
> > > > > + { { .version_ihl = 0}, 0, 0, 0, 0, 0, IPPROTO_UDP, 0,
> > > > > RTE_IPV4(2, 2, 2, 3), RTE_IPV4(2, 2, 2, 7)} }; static const
> > > > > struct rte_flow_item_ipv4 ipv4_mask_24 = { @@ -131,7 +131,7 @@
> > > > > static struct rte_flow_item end_item = {
> > RTE_FLOW_ITEM_TYPE_END,
> > > > > * dst mask 255.255.255.00 / tcp src is 16 dst is 17 / end"
> > > > > */
> > > > > static struct rte_flow_item_ipv4 ipv4_tcp_spec_1 = {
> > > > > - { 0, 0, 0, 0, 0, 0, IPPROTO_TCP, 0,
> > > > > + { { .version_ihl = 0}, 0, 0, 0, 0, 0, IPPROTO_TCP, 0,
> > > > > RTE_IPV4(1, 2, 3, 4), RTE_IPV4(5, 6, 7, 8)} };
> > > > >
> > > > > @@ -150,8 +150,8 @@ static struct rte_flow_item tcp_item_1 = {
> > > > > RTE_FLOW_ITEM_TYPE_TCP,
> > > > > * dst mask 255.255.255.00 / sctp src is 16 dst is 17/ end"
> > > > > */
> > > > > static struct rte_flow_item_ipv4 ipv4_sctp_spec_1 = {
> > > > > - { 0, 0, 0, 0, 0, 0, IPPROTO_SCTP, 0, RTE_IPV4(11, 12, 13, 14),
> > > > > - RTE_IPV4(15, 16, 17, 18)}
> > > > > + { { .version_ihl = 0}, 0, 0, 0, 0, 0, IPPROTO_SCTP, 0,
> > > > > + RTE_IPV4(11, 12, 13, 14), RTE_IPV4(15, 16, 17, 18)}
> > > > > };
> > > > >
> > > > > static struct rte_flow_item_sctp sctp_spec_1 = { diff --git
> > > > > a/lib/net/rte_ip.h b/lib/net/rte_ip.h index 4b728969c1..684bb028b2
> > > > > 100644
> > > > > --- a/lib/net/rte_ip.h
> > > > > +++ b/lib/net/rte_ip.h
> > > > > @@ -38,7 +38,21 @@ extern "C" {
> > > > > * IPv4 Header
> > > > > */
> > > > > struct rte_ipv4_hdr {
> > > > > - uint8_t version_ihl; /**< version and header length */
> > > > > + __extension__
> > > > > + union {
> > > > > + uint8_t version_ihl; /**< version and header length */
> > > > > + struct {
> > > > > +#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
> > > > > + uint8_t ihl:4;
> > > > > + uint8_t version:4; #elif RTE_BYTE_ORDER ==
> > > > > +RTE_BIG_ENDIAN
> > > > > + uint8_t version:4;
> > > > > + uint8_t ihl:4;
> > > > > +#else
> > > > > +#error "setup endian definition"
> > > > > +#endif
> > > > > + };
> > > > > + };
> > > > > uint8_t type_of_service; /**< type of service */
> > > > > rte_be16_t total_length; /**< length of packet */
> > > > > rte_be16_t packet_id; /**< packet ID */
> > > > > --
> > > > > 2.31.1
> > > > >
> > > >
> > > > This does not break the ABI, but it could be discussed if it breaks
> > > the API due to the required structure initialization changes shown in
> > > > test_flow_classify.c.
> > >
> > > Yep, I guess it might be classified as API change.
> > > Another thing that concerns me - it is not the only place in IPv4
> > > header when we unite multiple bit-fields into one field:
> > > type_of_service, fragment_offset.
> > > If we start splitting ipv4 fields into actual bitfields, I suppose
> > > we'll end-up splitting these ones too.
> > > But I am not sure it will pay off - as compiler not always generates
> > > optimal code for reading/updating bitfields.
> > > Did you consider just adding extra macros to simplify access to these
> > > fields (like RTE_IPV4_HDR_(GET_SET)_*), instead?
> > >
> >
> > Let's please not introduce accessor macros for bitfields. If we don't
> > introduce bitfields like these, I would rather stick with the current _MASK,
> > _SHIFT and _FLAG defines.
> >
> > Yes, this change will lead to the introduction of more bitfields, both here
> > and in other places. We already accepted it in the eCPRI structure
> > (/lib/net/rte_ecpri.h), so why not just generally accept it.
> >
> > Are modern compilers really worse at handling a bitfield defined like this,
> > compared to handling a single uint8_t with hand coding? I consider your
> > concern very important, so I'm only asking if it is still relevant, to avoid
> > making decisions based on past experience that might be outdated. (I admit
> > to falling into that trap myself, once in a while.)
> >
>
> I compared x86 code generated with gcc-9, gcc-10 and clang-10 for these 2 functions:
> void test_ipv4_hdr_byte(struct rte_ipv4_hdr *h, uint8_t version, uint8_t ihl)
> {
> h->version_ihl = ((version & 0x0f) << 4) | (ihl & 0x0f);
> }
> void test_ipv4_hdr_bits(struct rte_ipv4_hdr *h, uint8_t version, uint8_t ihl)
> {
> h->version = version & 0x0f;
> h->ihl = ihl & 0x0f;
> }
> meson configuration flags: --default-library=static --buildtype=release
> Each compiler produced identical code for both functions.
For that particular case (2 bit-fields packed tightly into one byte)
compilers usually perform quite well. At least I never saw issues for such case.
Bit-fields that do cross byte boundaries - that might be a trouble.
>
>
> > > > I think this patch is an improvement, and that such structure
> > > modifications should be generally accepted, so:
> > > >
> > > > Acked-by: Morten Brørup <mb@smartsharesystems.com>
> > >
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH] net: introduce IPv4 ihl and version fields
2021-05-28 10:52 0% ` Morten Brørup
@ 2021-05-28 14:18 0% ` Gregory Etelson
2021-05-31 9:58 0% ` Ananyev, Konstantin
0 siblings, 1 reply; 200+ results
From: Gregory Etelson @ 2021-05-28 14:18 UTC (permalink / raw)
To: Morten Brørup, Ananyev, Konstantin, dev
Cc: Matan Azrad, Ori Kam, Raslan Darawsheh, Iremonger, Bernard, Olivier Matz
> > > > RTE IPv4 header definition combines the `version' and `ihl'
> > > > fields into a single structure member.
> > > > This patch introduces dedicated structure members for both
> > `version'
> > > > and `ihl' IPv4 fields. Separated header fields definitions allow
> > > > to create simplified code to match on the IHL value in a flow rule.
> > > > The original `version_ihl' structure member is kept for backward
> > > > compatibility.
> > > >
> > > > Signed-off-by: Gregory Etelson <getelson@nvidia.com>
> > > > ---
> > > > app/test/test_flow_classify.c | 8 ++++----
> > > > lib/net/rte_ip.h | 16 +++++++++++++++-
> > > > 2 files changed, 19 insertions(+), 5 deletions(-)
> > > >
> > > > diff --git a/app/test/test_flow_classify.c
> > > > b/app/test/test_flow_classify.c index 951606f248..4f64be5357
> > > > 100644
> > > > --- a/app/test/test_flow_classify.c
> > > > +++ b/app/test/test_flow_classify.c
> > > > @@ -95,7 +95,7 @@ static struct rte_acl_field_def
> > > > ipv4_defs[NUM_FIELDS_IPV4] = {
> > > > * dst mask 255.255.255.00 / udp src is 32 dst is 33 / end"
> > > > */
> > > > static struct rte_flow_item_ipv4 ipv4_udp_spec_1 = {
> > > > - { 0, 0, 0, 0, 0, 0, IPPROTO_UDP, 0,
> > > > + { { .version_ihl = 0}, 0, 0, 0, 0, 0, IPPROTO_UDP, 0,
> > > > RTE_IPV4(2, 2, 2, 3), RTE_IPV4(2, 2, 2, 7)} }; static const
> > > > struct rte_flow_item_ipv4 ipv4_mask_24 = { @@ -131,7 +131,7 @@
> > > > static struct rte_flow_item end_item = {
> RTE_FLOW_ITEM_TYPE_END,
> > > > * dst mask 255.255.255.00 / tcp src is 16 dst is 17 / end"
> > > > */
> > > > static struct rte_flow_item_ipv4 ipv4_tcp_spec_1 = {
> > > > - { 0, 0, 0, 0, 0, 0, IPPROTO_TCP, 0,
> > > > + { { .version_ihl = 0}, 0, 0, 0, 0, 0, IPPROTO_TCP, 0,
> > > > RTE_IPV4(1, 2, 3, 4), RTE_IPV4(5, 6, 7, 8)} };
> > > >
> > > > @@ -150,8 +150,8 @@ static struct rte_flow_item tcp_item_1 = {
> > > > RTE_FLOW_ITEM_TYPE_TCP,
> > > > * dst mask 255.255.255.00 / sctp src is 16 dst is 17/ end"
> > > > */
> > > > static struct rte_flow_item_ipv4 ipv4_sctp_spec_1 = {
> > > > - { 0, 0, 0, 0, 0, 0, IPPROTO_SCTP, 0, RTE_IPV4(11, 12, 13, 14),
> > > > - RTE_IPV4(15, 16, 17, 18)}
> > > > + { { .version_ihl = 0}, 0, 0, 0, 0, 0, IPPROTO_SCTP, 0,
> > > > + RTE_IPV4(11, 12, 13, 14), RTE_IPV4(15, 16, 17, 18)}
> > > > };
> > > >
> > > > static struct rte_flow_item_sctp sctp_spec_1 = { diff --git
> > > > a/lib/net/rte_ip.h b/lib/net/rte_ip.h index 4b728969c1..684bb028b2
> > > > 100644
> > > > --- a/lib/net/rte_ip.h
> > > > +++ b/lib/net/rte_ip.h
> > > > @@ -38,7 +38,21 @@ extern "C" {
> > > > * IPv4 Header
> > > > */
> > > > struct rte_ipv4_hdr {
> > > > - uint8_t version_ihl; /**< version and header length */
> > > > + __extension__
> > > > + union {
> > > > + uint8_t version_ihl; /**< version and header length */
> > > > + struct {
> > > > +#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
> > > > + uint8_t ihl:4;
> > > > + uint8_t version:4; #elif RTE_BYTE_ORDER ==
> > > > +RTE_BIG_ENDIAN
> > > > + uint8_t version:4;
> > > > + uint8_t ihl:4;
> > > > +#else
> > > > +#error "setup endian definition"
> > > > +#endif
> > > > + };
> > > > + };
> > > > uint8_t type_of_service; /**< type of service */
> > > > rte_be16_t total_length; /**< length of packet */
> > > > rte_be16_t packet_id; /**< packet ID */
> > > > --
> > > > 2.31.1
> > > >
> > >
> > > This does not break the ABI, but it could be discussed if it breaks
> > the API due to the required structure initialization changes shown in
> > > test_flow_classify.c.
> >
> > Yep, I guess it might be classified as API change.
> > Another thing that concerns me - it is not the only place in IPv4
> > header when we unite multiple bit-fields into one field:
> > type_of_service, fragment_offset.
> > If we start splitting ipv4 fields into actual bitfields, I suppose
> > we'll end-up splitting these ones too.
> > But I am not sure it will pay off - as compiler not always generates
> > optimal code for reading/updating bitfields.
> > Did you consider just adding extra macros to simplify access to these
> > fields (like RTE_IPV4_HDR_(GET_SET)_*), instead?
> >
>
> Let's please not introduce accessor macros for bitfields. If we don't
> introduce bitfields like these, I would rather stick with the current _MASK,
> _SHIFT and _FLAG defines.
>
> Yes, this change will lead to the introduction of more bitfields, both here
> and in other places. We already accepted it in the eCPRI structure
> (/lib/net/rte_ecpri.h), so why not just generally accept it.
>
> Are modern compilers really worse at handling a bitfield defined like this,
> compared to handling a single uint8_t with hand coding? I consider your
> concern very important, so I'm only asking if it is still relevant, to avoid
> making decisions based on past experience that might be outdated. (I admit
> to falling into that trap myself, once in a while.)
>
I compared x86 code generated with gcc-9, gcc-10 and clang-10 for these 2 functions:
void test_ipv4_hdr_byte(struct rte_ipv4_hdr *h, uint8_t version, uint8_t ihl)
{
h->version_ihl = ((version & 0x0f) << 4) | (ihl & 0x0f);
}
void test_ipv4_hdr_bits(struct rte_ipv4_hdr *h, uint8_t version, uint8_t ihl)
{
h->version = version & 0x0f;
h->ihl = ihl & 0x0f;
}
meson configuration flags: --default-library=static --buildtype=release
Each compiler produced identical code for both functions.
> > > I think this patch is an improvement, and that such structure
> > modifications should be generally accepted, so:
> > >
> > > Acked-by: Morten Brørup <mb@smartsharesystems.com>
> >
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH] net: introduce IPv4 ihl and version fields
2021-05-28 10:20 0% ` Ananyev, Konstantin
@ 2021-05-28 10:52 0% ` Morten Brørup
2021-05-28 14:18 0% ` Gregory Etelson
0 siblings, 1 reply; 200+ results
From: Morten Brørup @ 2021-05-28 10:52 UTC (permalink / raw)
To: Ananyev, Konstantin, Gregory Etelson, dev
Cc: matan, orika, rasland, Iremonger, Bernard, Olivier Matz
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Ananyev,
> Konstantin
> Sent: Friday, 28 May 2021 12.21
>
> > > From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Gregory
> Etelson
> > > Sent: Thursday, 27 May 2021 17.29
> > and version fields
> > >
> > > RTE IPv4 header definition combines the `version' and `ihl' fields
> > > into a single structure member.
> > > This patch introduces dedicated structure members for both
> `version'
> > > and `ihl' IPv4 fields. Separated header fields definitions allow to
> > > create simplified code to match on the IHL value in a flow rule.
> > > The original `version_ihl' structure member is kept for backward
> > > compatibility.
> > >
> > > Signed-off-by: Gregory Etelson <getelson@nvidia.com>
> > > ---
> > > app/test/test_flow_classify.c | 8 ++++----
> > > lib/net/rte_ip.h | 16 +++++++++++++++-
> > > 2 files changed, 19 insertions(+), 5 deletions(-)
> > >
> > > diff --git a/app/test/test_flow_classify.c
> > > b/app/test/test_flow_classify.c
> > > index 951606f248..4f64be5357 100644
> > > --- a/app/test/test_flow_classify.c
> > > +++ b/app/test/test_flow_classify.c
> > > @@ -95,7 +95,7 @@ static struct rte_acl_field_def
> > > ipv4_defs[NUM_FIELDS_IPV4] = {
> > > * dst mask 255.255.255.00 / udp src is 32 dst is 33 / end"
> > > */
> > > static struct rte_flow_item_ipv4 ipv4_udp_spec_1 = {
> > > - { 0, 0, 0, 0, 0, 0, IPPROTO_UDP, 0,
> > > + { { .version_ihl = 0}, 0, 0, 0, 0, 0, IPPROTO_UDP, 0,
> > > RTE_IPV4(2, 2, 2, 3), RTE_IPV4(2, 2, 2, 7)}
> > > };
> > > static const struct rte_flow_item_ipv4 ipv4_mask_24 = {
> > > @@ -131,7 +131,7 @@ static struct rte_flow_item end_item = {
> > > RTE_FLOW_ITEM_TYPE_END,
> > > * dst mask 255.255.255.00 / tcp src is 16 dst is 17 / end"
> > > */
> > > static struct rte_flow_item_ipv4 ipv4_tcp_spec_1 = {
> > > - { 0, 0, 0, 0, 0, 0, IPPROTO_TCP, 0,
> > > + { { .version_ihl = 0}, 0, 0, 0, 0, 0, IPPROTO_TCP, 0,
> > > RTE_IPV4(1, 2, 3, 4), RTE_IPV4(5, 6, 7, 8)}
> > > };
> > >
> > > @@ -150,8 +150,8 @@ static struct rte_flow_item tcp_item_1 = {
> > > RTE_FLOW_ITEM_TYPE_TCP,
> > > * dst mask 255.255.255.00 / sctp src is 16 dst is 17/ end"
> > > */
> > > static struct rte_flow_item_ipv4 ipv4_sctp_spec_1 = {
> > > - { 0, 0, 0, 0, 0, 0, IPPROTO_SCTP, 0, RTE_IPV4(11, 12, 13, 14),
> > > - RTE_IPV4(15, 16, 17, 18)}
> > > + { { .version_ihl = 0}, 0, 0, 0, 0, 0, IPPROTO_SCTP, 0,
> > > + RTE_IPV4(11, 12, 13, 14), RTE_IPV4(15, 16, 17, 18)}
> > > };
> > >
> > > static struct rte_flow_item_sctp sctp_spec_1 = {
> > > diff --git a/lib/net/rte_ip.h b/lib/net/rte_ip.h
> > > index 4b728969c1..684bb028b2 100644
> > > --- a/lib/net/rte_ip.h
> > > +++ b/lib/net/rte_ip.h
> > > @@ -38,7 +38,21 @@ extern "C" {
> > > * IPv4 Header
> > > */
> > > struct rte_ipv4_hdr {
> > > - uint8_t version_ihl; /**< version and header length */
> > > + __extension__
> > > + union {
> > > + uint8_t version_ihl; /**< version and header length */
> > > + struct {
> > > +#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
> > > + uint8_t ihl:4;
> > > + uint8_t version:4;
> > > +#elif RTE_BYTE_ORDER == RTE_BIG_ENDIAN
> > > + uint8_t version:4;
> > > + uint8_t ihl:4;
> > > +#else
> > > +#error "setup endian definition"
> > > +#endif
> > > + };
> > > + };
> > > uint8_t type_of_service; /**< type of service */
> > > rte_be16_t total_length; /**< length of packet */
> > > rte_be16_t packet_id; /**< packet ID */
> > > --
> > > 2.31.1
> > >
> >
> > This does not break the ABI, but it could be discussed if it breaks
> the API due to the required structure initialization changes shown in
> > test_flow_classify.c.
>
> Yep, I guess it might be classified as API change.
> Another thing that concerns me - it is not the only place in IPv4
> header when we unite multiple bit-fields into one field:
> type_of_service, fragment_offset.
> If we start splitting ipv4 fields into actual bitfields, I suppose
> we'll end-up splitting these ones too.
> But I am not sure it will pay off - as compiler not always generates
> optimal code for reading/updating bitfields.
> Did you consider just adding extra macros to simplify access to these
> fields (like RTE_IPV4_HDR_(GET_SET)_*),
> instead?
>
Let's please not introduce accessor macros for bitfields. If we don't introduce bitfields like these, I would rather stick with the current _MASK, _SHIFT and _FLAG defines.
Yes, this change will lead to the introduction of more bitfields, both here and in other places. We already accepted it in the eCPRI structure (/lib/net/rte_ecpri.h), so why not just generally accept it.
Are modern compilers really worse at handling a bitfield defined like this, compared to handling a single uint8_t with hand coding? I consider your concern very important, so I'm only asking if it is still relevant, to avoid making decisions based on past experience that might be outdated. (I admit to falling into that trap myself, once in a while.)
> > I think this patch is an improvement, and that such structure
> modifications should be generally accepted, so:
> >
> > Acked-by: Morten Brørup <mb@smartsharesystems.com>
>
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH] net: introduce IPv4 ihl and version fields
2021-05-27 15:56 3% ` Morten Brørup
@ 2021-05-28 10:20 0% ` Ananyev, Konstantin
2021-05-28 10:52 0% ` Morten Brørup
2021-06-03 0:58 4% ` Min Hu (Connor)
1 sibling, 1 reply; 200+ results
From: Ananyev, Konstantin @ 2021-05-28 10:20 UTC (permalink / raw)
To: Morten Brørup, Gregory Etelson, dev
Cc: matan, orika, rasland, Iremonger, Bernard, Olivier Matz
> > From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Gregory Etelson
> > Sent: Thursday, 27 May 2021 17.29
> and version fields
> >
> > RTE IPv4 header definition combines the `version' and `ihl' fields
> > into a single structure member.
> > This patch introduces dedicated structure members for both `version'
> > and `ihl' IPv4 fields. Separated header fields definitions allow to
> > create simplified code to match on the IHL value in a flow rule.
> > The original `version_ihl' structure member is kept for backward
> > compatibility.
> >
> > Signed-off-by: Gregory Etelson <getelson@nvidia.com>
> > ---
> > app/test/test_flow_classify.c | 8 ++++----
> > lib/net/rte_ip.h | 16 +++++++++++++++-
> > 2 files changed, 19 insertions(+), 5 deletions(-)
> >
> > diff --git a/app/test/test_flow_classify.c
> > b/app/test/test_flow_classify.c
> > index 951606f248..4f64be5357 100644
> > --- a/app/test/test_flow_classify.c
> > +++ b/app/test/test_flow_classify.c
> > @@ -95,7 +95,7 @@ static struct rte_acl_field_def
> > ipv4_defs[NUM_FIELDS_IPV4] = {
> > * dst mask 255.255.255.00 / udp src is 32 dst is 33 / end"
> > */
> > static struct rte_flow_item_ipv4 ipv4_udp_spec_1 = {
> > - { 0, 0, 0, 0, 0, 0, IPPROTO_UDP, 0,
> > + { { .version_ihl = 0}, 0, 0, 0, 0, 0, IPPROTO_UDP, 0,
> > RTE_IPV4(2, 2, 2, 3), RTE_IPV4(2, 2, 2, 7)}
> > };
> > static const struct rte_flow_item_ipv4 ipv4_mask_24 = {
> > @@ -131,7 +131,7 @@ static struct rte_flow_item end_item = {
> > RTE_FLOW_ITEM_TYPE_END,
> > * dst mask 255.255.255.00 / tcp src is 16 dst is 17 / end"
> > */
> > static struct rte_flow_item_ipv4 ipv4_tcp_spec_1 = {
> > - { 0, 0, 0, 0, 0, 0, IPPROTO_TCP, 0,
> > + { { .version_ihl = 0}, 0, 0, 0, 0, 0, IPPROTO_TCP, 0,
> > RTE_IPV4(1, 2, 3, 4), RTE_IPV4(5, 6, 7, 8)}
> > };
> >
> > @@ -150,8 +150,8 @@ static struct rte_flow_item tcp_item_1 = {
> > RTE_FLOW_ITEM_TYPE_TCP,
> > * dst mask 255.255.255.00 / sctp src is 16 dst is 17/ end"
> > */
> > static struct rte_flow_item_ipv4 ipv4_sctp_spec_1 = {
> > - { 0, 0, 0, 0, 0, 0, IPPROTO_SCTP, 0, RTE_IPV4(11, 12, 13, 14),
> > - RTE_IPV4(15, 16, 17, 18)}
> > + { { .version_ihl = 0}, 0, 0, 0, 0, 0, IPPROTO_SCTP, 0,
> > + RTE_IPV4(11, 12, 13, 14), RTE_IPV4(15, 16, 17, 18)}
> > };
> >
> > static struct rte_flow_item_sctp sctp_spec_1 = {
> > diff --git a/lib/net/rte_ip.h b/lib/net/rte_ip.h
> > index 4b728969c1..684bb028b2 100644
> > --- a/lib/net/rte_ip.h
> > +++ b/lib/net/rte_ip.h
> > @@ -38,7 +38,21 @@ extern "C" {
> > * IPv4 Header
> > */
> > struct rte_ipv4_hdr {
> > - uint8_t version_ihl; /**< version and header length */
> > + __extension__
> > + union {
> > + uint8_t version_ihl; /**< version and header length */
> > + struct {
> > +#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
> > + uint8_t ihl:4;
> > + uint8_t version:4;
> > +#elif RTE_BYTE_ORDER == RTE_BIG_ENDIAN
> > + uint8_t version:4;
> > + uint8_t ihl:4;
> > +#else
> > +#error "setup endian definition"
> > +#endif
> > + };
> > + };
> > uint8_t type_of_service; /**< type of service */
> > rte_be16_t total_length; /**< length of packet */
> > rte_be16_t packet_id; /**< packet ID */
> > --
> > 2.31.1
> >
>
> This does not break the ABI, but it could be discussed if it breaks the API due to the required structure initialization changes shown in
> test_flow_classify.c.
Yep, I guess it might be classified as API change.
Another thing that concerns me - it is not the only place in IPv4 header when we unite multiple bit-fields into one field:
type_of_service, fragment_offset.
If we start splitting ipv4 fields into actual bitfields, I suppose we'll end-up splitting these ones too.
But I am not sure it will pay off - as compiler not always generates optimal code for reading/updating bitfields.
Did you consider just adding extra macros to simplify access to these fields (like RTE_IPV4_HDR_(GET_SET)_*),
instead?
> I think this patch is an improvement, and that such structure modifications should be generally accepted, so:
>
> Acked-by: Morten Brørup <mb@smartsharesystems.com>
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [PATCH] net: introduce IPv4 ihl and version fields
@ 2021-05-27 15:56 3% ` Morten Brørup
2021-05-28 10:20 0% ` Ananyev, Konstantin
2021-06-03 0:58 4% ` Min Hu (Connor)
2021-06-17 15:02 3% ` Tyler Retzlaff
1 sibling, 2 replies; 200+ results
From: Morten Brørup @ 2021-05-27 15:56 UTC (permalink / raw)
To: Gregory Etelson, dev
Cc: matan, orika, rasland, Bernard Iremonger, Olivier Matz
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Gregory Etelson
> Sent: Thursday, 27 May 2021 17.29
and version fields
>
> RTE IPv4 header definition combines the `version' and `ihl' fields
> into a single structure member.
> This patch introduces dedicated structure members for both `version'
> and `ihl' IPv4 fields. Separated header fields definitions allow to
> create simplified code to match on the IHL value in a flow rule.
> The original `version_ihl' structure member is kept for backward
> compatibility.
>
> Signed-off-by: Gregory Etelson <getelson@nvidia.com>
> ---
> app/test/test_flow_classify.c | 8 ++++----
> lib/net/rte_ip.h | 16 +++++++++++++++-
> 2 files changed, 19 insertions(+), 5 deletions(-)
>
> diff --git a/app/test/test_flow_classify.c
> b/app/test/test_flow_classify.c
> index 951606f248..4f64be5357 100644
> --- a/app/test/test_flow_classify.c
> +++ b/app/test/test_flow_classify.c
> @@ -95,7 +95,7 @@ static struct rte_acl_field_def
> ipv4_defs[NUM_FIELDS_IPV4] = {
> * dst mask 255.255.255.00 / udp src is 32 dst is 33 / end"
> */
> static struct rte_flow_item_ipv4 ipv4_udp_spec_1 = {
> - { 0, 0, 0, 0, 0, 0, IPPROTO_UDP, 0,
> + { { .version_ihl = 0}, 0, 0, 0, 0, 0, IPPROTO_UDP, 0,
> RTE_IPV4(2, 2, 2, 3), RTE_IPV4(2, 2, 2, 7)}
> };
> static const struct rte_flow_item_ipv4 ipv4_mask_24 = {
> @@ -131,7 +131,7 @@ static struct rte_flow_item end_item = {
> RTE_FLOW_ITEM_TYPE_END,
> * dst mask 255.255.255.00 / tcp src is 16 dst is 17 / end"
> */
> static struct rte_flow_item_ipv4 ipv4_tcp_spec_1 = {
> - { 0, 0, 0, 0, 0, 0, IPPROTO_TCP, 0,
> + { { .version_ihl = 0}, 0, 0, 0, 0, 0, IPPROTO_TCP, 0,
> RTE_IPV4(1, 2, 3, 4), RTE_IPV4(5, 6, 7, 8)}
> };
>
> @@ -150,8 +150,8 @@ static struct rte_flow_item tcp_item_1 = {
> RTE_FLOW_ITEM_TYPE_TCP,
> * dst mask 255.255.255.00 / sctp src is 16 dst is 17/ end"
> */
> static struct rte_flow_item_ipv4 ipv4_sctp_spec_1 = {
> - { 0, 0, 0, 0, 0, 0, IPPROTO_SCTP, 0, RTE_IPV4(11, 12, 13, 14),
> - RTE_IPV4(15, 16, 17, 18)}
> + { { .version_ihl = 0}, 0, 0, 0, 0, 0, IPPROTO_SCTP, 0,
> + RTE_IPV4(11, 12, 13, 14), RTE_IPV4(15, 16, 17, 18)}
> };
>
> static struct rte_flow_item_sctp sctp_spec_1 = {
> diff --git a/lib/net/rte_ip.h b/lib/net/rte_ip.h
> index 4b728969c1..684bb028b2 100644
> --- a/lib/net/rte_ip.h
> +++ b/lib/net/rte_ip.h
> @@ -38,7 +38,21 @@ extern "C" {
> * IPv4 Header
> */
> struct rte_ipv4_hdr {
> - uint8_t version_ihl; /**< version and header length */
> + __extension__
> + union {
> + uint8_t version_ihl; /**< version and header length */
> + struct {
> +#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
> + uint8_t ihl:4;
> + uint8_t version:4;
> +#elif RTE_BYTE_ORDER == RTE_BIG_ENDIAN
> + uint8_t version:4;
> + uint8_t ihl:4;
> +#else
> +#error "setup endian definition"
> +#endif
> + };
> + };
> uint8_t type_of_service; /**< type of service */
> rte_be16_t total_length; /**< length of packet */
> rte_be16_t packet_id; /**< packet ID */
> --
> 2.31.1
>
This does not break the ABI, but it could be discussed if it breaks the API due to the required structure initialization changes shown in test_flow_classify.c. I think this patch is an improvement, and that such structure modifications should be generally accepted, so:
Acked-by: Morten Brørup <mb@smartsharesystems.com>
^ permalink raw reply [relevance 3%]
* [dpdk-dev] Minutes of Technical Board Meeting, 2021-05-19
[not found] <YKdg/B0dJOqC74ii@platinum>
@ 2021-05-25 11:50 4% ` Olivier Matz
0 siblings, 0 replies; 200+ results
From: Olivier Matz @ 2021-05-25 11:50 UTC (permalink / raw)
To: dev
Minutes of Technical Board Meeting, 2021-05-19
==============================================
Members Attending
-----------------
- Aaron
- Bruce
- Ferruh
- Hemant
- Honnappa
- Jerin
- Kevin
- Konstantin
- Maxime
- Olivier (chair)
- Thomas
NOTE: The technical board meetings every second Wednesday at
https://meet.jit.si/DPDK at 3 pm UTC.
Meetings are public, and DPDK community members are welcome to attend.
NOTE: Next meeting will be on Wednesday 2021-06-02 @3pm UTC, and will be
chaired by Stephen.
1/ Tech Board Membership Policy
-------------------------------
Governing board wants the techboard to better document the current
policy for membership.
Hemant started to write a document about the current policy. We will
continue the discussion based on it.
2/ Crypto maintainership
------------------------
There is no backup maintainer for the crypto tree for Akhil since he
took the leading role. Requesting companies involved in crypto to
nominate someone.
Action on Ferruh to internally check if someone can take the role at
Intel.
3/ Use of Travis CI
-------------------
Currently, Travis CI is used for Arm tests. It is triggered by the CI
bot, but we regularly run out of credits.
Honnappa and Aaron are already discussing with Travis to be unblocked.
Arm is also working on a their own CI infrastructure (no ETA yet).
4/ Enhancing build system's developer mode
------------------------------------------
Discussion about adding more checks to the developer mode of the
build system (like code/doc consistency).
See https://git.dpdk.org/dpdk/commit/?id=bc4617433845
Independent scripts can already be added to the tree, like this one:
http://git.dpdk.org/dpdk/commit/devtools?id=947dff12bc
If these scripts are added to the developer mode build, they should only
be called when necessary (i.e. when files impacting the result are
modified). That way, the build stays fast when there is nothing to do.
The alternative is to add these checks to a checkpatch script (to be run
before patch submission instead of build).
5/ Feature announcement
-----------------------
We encourage companies and developers involved in DPDK to announce
their roadmap for next versions. It gives visibility to users, avoids
people to blindly work on the same features, helps to plan how much time
is needed for integration and review, and to check that nothing is
forgotten.
The techboard decided that patches for features announced earlier in the
roadmap have a priority bonus for integration, all other things being
equal (patch quality, submission date, ...)
Action on Thomas to integrate this in the documentation.
6/ ABI stability period
-----------------------
At next meeting, we would like to discuss the extension of the ABI
stability period. The meeting could be dedicated to this discussion.
7/ Examples to remove
---------------------
AR for everyone: check if examples should be removed (one was mentionned
during the meeting: examples/performance-thread).
^ permalink raw reply [relevance 4%]
* Re: [dpdk-dev] [RFC PATCH 0/3] Add PIE support for HQoS library
2021-05-24 16:19 0% ` Stephen Hemminger
@ 2021-05-25 8:56 0% ` Morten Brørup
2021-06-07 13:01 0% ` Liguzinski, WojciechX
2021-06-09 10:53 3% ` [dpdk-dev] [RFC PATCH v1 " Liguzinski, WojciechX
2 siblings, 1 reply; 200+ results
From: Morten Brørup @ 2021-05-25 8:56 UTC (permalink / raw)
To: Liguzinski, WojciechX, dev, jasvinder.singh, cristian.dumitrescu
Cc: savinay.dharmappa
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Liguzinski,
> WojciechX
> Sent: Monday, 24 May 2021 12.58
>
> DPDK sched library is equipped with mechanism that secures it from the
> bufferbloat problem
> which is a situation when excess buffers in the network cause high
> latency and latency
> variation. Currently, it supports RED for queue congestion control
The correct term is "active queue management", not "queue congestion control".
> (which is designed
> to control the queue length but it does not control latency directly
> and is now being
> obsoleted ).
Some might prefer other algorithms, such as PIE, CoDel, CAKE, etc., but RED is not obsolete!
> However, more advanced queue management is required to
> address this problem
> and provide desirable quality of service to users.
>
> This solution (RFC) proposes usage of new algorithm called "PIE"
> (Proportional Integral
> controller Enhanced) that can effectively and directly control queuing
> latency to address
> the bufferbloat problem.
>
> The implementation of mentioned functionality includes modification of
> existing and
> adding a new set of data structures to the library, adding PIE related
> APIs.
> This affects structures in public API/ABI. That is why deprecation
> notice is going
> to be prepared and sent.
>
>
> Liguzinski, WojciechX (3):
> sched: add pie based congestion management
> example/qos_sched: add pie support
> example/ip_pipeline: add pie support
It's "PIE", not "pie". :-)
Nonetheless, the RFC looks good!
-Morten
^ permalink raw reply [relevance 0%]
* Re: [dpdk-dev] [RFC PATCH 0/3] Add PIE support for HQoS library
@ 2021-05-24 16:19 0% ` Stephen Hemminger
2021-05-25 8:56 0% ` Morten Brørup
2021-06-09 10:53 3% ` [dpdk-dev] [RFC PATCH v1 " Liguzinski, WojciechX
2 siblings, 0 replies; 200+ results
From: Stephen Hemminger @ 2021-05-24 16:19 UTC (permalink / raw)
To: Liguzinski, WojciechX
Cc: dev, jasvinder.singh, cristian.dumitrescu, savinay.dharmappa
On Mon, 24 May 2021 11:58:19 +0100
"Liguzinski, WojciechX" <wojciechx.liguzinski@intel.com> wrote:
> DPDK sched library is equipped with mechanism that secures it from the bufferbloat problem
> which is a situation when excess buffers in the network cause high latency and latency
> variation. Currently, it supports RED for queue congestion control (which is designed
> to control the queue length but it does not control latency directly and is now being
> obsoleted ). However, more advanced queue management is required to address this problem
> and provide desirable quality of service to users.
>
> This solution (RFC) proposes usage of new algorithm called "PIE" (Proportional Integral
> controller Enhanced) that can effectively and directly control queuing latency to address
> the bufferbloat problem.
>
> The implementation of mentioned functionality includes modification of existing and
> adding a new set of data structures to the library, adding PIE related APIs.
> This affects structures in public API/ABI. That is why deprecation notice is going
> to be prepared and sent.
>
>
> Liguzinski, WojciechX (3):
> sched: add pie based congestion management
> example/qos_sched: add pie support
> example/ip_pipeline: add pie support
>
> config/rte_config.h | 1 -
> drivers/net/softnic/rte_eth_softnic_tm.c | 4 +-
> examples/ip_pipeline/tmgr.c | 4 +-
> examples/qos_sched/app_thread.c | 1 -
> examples/qos_sched/cfg_file.c | 82 +++++++--
> examples/qos_sched/init.c | 5 +-
> examples/qos_sched/profile.cfg | 196 +++++++++++++-------
> lib/sched/meson.build | 10 +-
> lib/sched/rte_sched.c | 220 +++++++++++++++++------
> lib/sched/rte_sched.h | 53 ++++--
> 10 files changed, 411 insertions(+), 165 deletions(-)
What about FQ codel which is more widely deployed, has less configuration?
^ permalink raw reply [relevance 0%]
* [dpdk-dev] [PATCH v4 1/3] common/sfc_efx/base: update MCDI headers
@ 2021-05-24 11:48 1% ` Ivan Malov
0 siblings, 0 replies; 200+ results
From: Ivan Malov @ 2021-05-24 11:48 UTC (permalink / raw)
To: dev; +Cc: Ray Kinsella, Ferruh Yigit, Andrew Rybchenko
From: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
---
drivers/common/sfc_efx/base/efx_regs_mcdi.h | 3532 +++++++++++++++--
.../common/sfc_efx/base/efx_regs_mcdi_aoe.h | 142 +-
.../common/sfc_efx/base/efx_regs_mcdi_strs.h | 2 +-
3 files changed, 3331 insertions(+), 345 deletions(-)
diff --git a/drivers/common/sfc_efx/base/efx_regs_mcdi.h b/drivers/common/sfc_efx/base/efx_regs_mcdi.h
index 976db37d6..a3c9f076e 100644
--- a/drivers/common/sfc_efx/base/efx_regs_mcdi.h
+++ b/drivers/common/sfc_efx/base/efx_regs_mcdi.h
@@ -6,7 +6,7 @@
/*
* This file is automatically generated. DO NOT EDIT IT.
- * To make changes, edit the .yml files in sfregistry under doc/mcdi/ and
+ * To make changes, edit the .yml files in smartnic_registry under doc/mcdi/ and
* rebuild this file with "make mcdi_headers_v5".
*/
@@ -410,6 +410,48 @@
#define MC_CMD_RESOURCE_INSTANCE_ANY 0xffffffff
#define MC_CMD_RESOURCE_INSTANCE_NONE 0xfffffffe /* enum */
+/* MC_CMD_FPGA_FLASH_INDEX enum */
+#define MC_CMD_FPGA_FLASH_PRIMARY 0x0 /* enum */
+#define MC_CMD_FPGA_FLASH_SECONDARY 0x1 /* enum */
+
+/* MC_CMD_EXTERNAL_MAE_LINK_MODE enum */
+/* enum: Legacy mode as described in XN-200039-TC. */
+#define MC_CMD_EXTERNAL_MAE_LINK_MODE_LEGACY 0x0
+/* enum: Switchdev mode as described in XN-200039-TC. */
+#define MC_CMD_EXTERNAL_MAE_LINK_MODE_SWITCHDEV 0x1
+/* enum: Bootstrap mode as described in XN-200039-TC. */
+#define MC_CMD_EXTERNAL_MAE_LINK_MODE_BOOTSTRAP 0x2
+/* enum: Link-mode change is in-progress as described in XN-200039-TC. */
+#define MC_CMD_EXTERNAL_MAE_LINK_MODE_PENDING 0xf
+
+/* PCIE_INTERFACE enum: From EF100 onwards, SFC products can have multiple PCIe
+ * interfaces. There is a need to refer to interfaces explicitly from drivers
+ * (for example, a management driver on one interface administering a function
+ * on another interface). This enumeration provides stable identifiers to all
+ * interfaces present on a product. Product documentation will specify which
+ * interfaces exist and their associated identifier. In general, drivers,
+ * should not assign special meanings to specific values. Instead, behaviour
+ * should be determined by NIC configuration, which will identify interfaces
+ * where appropriate.
+ */
+/* enum: Primary host interfaces. Typically (i.e. for all known SFC products)
+ * the interface exposed on the edge connector (or form factor equivalent).
+ */
+#define PCIE_INTERFACE_HOST_PRIMARY 0x0
+/* enum: Riverhead and keystone products have a second PCIe interface to which
+ * an on-NIC ARM module is expected to be connected.
+ */
+#define PCIE_INTERFACE_NIC_EMBEDDED 0x1
+/* enum: For MCDI commands issued over a PCIe interface, this value is
+ * translated into the interface over which the command was issued. Not
+ * meaningful for other MCDI transports.
+ */
+#define PCIE_INTERFACE_CALLER 0xffffffff
+
+/* MC_CLIENT_ID_SPECIFIER enum */
+/* enum: Equivalent to the caller's client ID */
+#define MC_CMD_CLIENT_ID_SELF 0xffffffff
+
/* MAE_FIELD_SUPPORT_STATUS enum */
/* enum: The NIC does not support this field. The driver must ensure that any
* mask associated with this field in a match rule is zeroed. The NIC may
@@ -470,6 +512,20 @@
#define MAE_FIELD_CT_PRIVATE_FLAGS 0x8
/* enum: 1 if the packet ingressed the NIC from one of the MACs, else 0. */
#define MAE_FIELD_IS_FROM_NETWORK 0x9
+/* enum: 1 if the packet has 1 or more VLAN tags, else 0. */
+#define MAE_FIELD_HAS_OVLAN 0xa
+/* enum: 1 if the packet has 2 or more VLAN tags, else 0. */
+#define MAE_FIELD_HAS_IVLAN 0xb
+/* enum: 1 if the outer packet has 1 or more VLAN tags, else 0; only present
+ * when encap
+ */
+#define MAE_FIELD_ENC_HAS_OVLAN 0xc
+/* enum: 1 if the outer packet has 2 or more VLAN tags, else 0; only present
+ * when encap
+ */
+#define MAE_FIELD_ENC_HAS_IVLAN 0xd
+/* enum: Packet is IP fragment */
+#define MAE_FIELD_ENC_IP_FRAG 0xe
#define MAE_FIELD_ETHER_TYPE 0x21 /* enum */
#define MAE_FIELD_VLAN0_TCI 0x22 /* enum */
#define MAE_FIELD_VLAN0_PROTO 0x23 /* enum */
@@ -508,6 +564,10 @@
#define MAE_FIELD_L4_DPORT 0x33
/* enum: Inner when encap */
#define MAE_FIELD_TCP_FLAGS 0x34
+/* enum: TCP packet with any of SYN, FIN or RST flag set */
+#define MAE_FIELD_TCP_SYN_FIN_RST 0x35
+/* enum: Packet is IP fragment with fragment offset 0 */
+#define MAE_FIELD_IP_FIRST_FRAG 0x36
/* enum: The type of encapsulated used for this packet. Value as per
* ENCAP_TYPE_*.
*/
@@ -550,8 +610,8 @@
#define MAE_FIELD_ENC_L4_SPORT 0x52
/* enum: Outer; only present when encap */
#define MAE_FIELD_ENC_L4_DPORT 0x53
-/* enum: VNI (when VXLAN or GENEVE) VSID (when NVGRE) Outer; only present when
- * encap
+/* enum: VNI (when VXLAN or GENEVE) VSID (when NVGRE) Bottom 24 bits of Key
+ * (when L2GRE) Outer; only present when encap
*/
#define MAE_FIELD_ENC_VNET_ID 0x54
@@ -566,6 +626,14 @@
#define MAE_MCDI_ENCAP_TYPE_GENEVE 0x3 /* enum */
#define MAE_MCDI_ENCAP_TYPE_L2GRE 0x4 /* enum */
+/* MAE_MPORT_END enum: Selects which end of the logical link identified by an
+ * MPORT_SELECTOR is targeted by an operation.
+ */
+/* enum: Selects the port on the MAE virtual switch */
+#define MAE_MPORT_END_MAE 0x1
+/* enum: Selects the virtual NIC plugged into the MAE switch */
+#define MAE_MPORT_END_VNIC 0x2
+
/* MCDI_EVENT structuredef: The structure of an MCDI_EVENT on Siena/EF10/EF100
* platforms
*/
@@ -647,17 +715,21 @@
#define MCDI_EVENT_TX_ERR_TYPE_OFST 0
#define MCDI_EVENT_TX_ERR_TYPE_LBN 12
#define MCDI_EVENT_TX_ERR_TYPE_WIDTH 4
-/* enum: Descriptor loader reported failure */
+/* enum: Descriptor loader reported failure. Specific to EF10-family NICs. */
#define MCDI_EVENT_TX_ERR_DL_FAIL 0x1
-/* enum: Descriptor ring empty and no EOP seen for packet */
+/* enum: Descriptor ring empty and no EOP seen for packet. Specific to
+ * EF10-family NICs
+ */
#define MCDI_EVENT_TX_ERR_NO_EOP 0x2
-/* enum: Overlength packet */
+/* enum: Overlength packet. Specific to EF10-family NICs. */
#define MCDI_EVENT_TX_ERR_2BIG 0x3
-/* enum: Malformed option descriptor */
+/* enum: Malformed option descriptor. Specific to EF10-family NICs. */
#define MCDI_EVENT_TX_BAD_OPTDESC 0x5
-/* enum: Option descriptor part way through a packet */
+/* enum: Option descriptor part way through a packet. Specific to EF10-family
+ * NICs.
+ */
#define MCDI_EVENT_TX_OPT_IN_PKT 0x8
-/* enum: DMA or PIO data access error */
+/* enum: DMA or PIO data access error. Specific to EF10-family NICs */
#define MCDI_EVENT_TX_ERR_BAD_DMA_OR_PIO 0x9
#define MCDI_EVENT_TX_ERR_INFO_OFST 0
#define MCDI_EVENT_TX_ERR_INFO_LBN 16
@@ -1270,7 +1342,13 @@
#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_OFST 8
#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LEN 8
#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LO_OFST 8
+#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LO_LEN 4
+#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LO_LBN 64
+#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LO_WIDTH 32
#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_HI_OFST 12
+#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_HI_LEN 4
+#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_HI_LBN 96
+#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_HI_WIDTH 32
#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_MINNUM 1
#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_MAXNUM 30
#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_MAXNUM_MCDI2 126
@@ -1384,6 +1462,7 @@
* has additional checks to reject insecure calls.
*/
#define MC_CMD_READ32 0x1
+#define MC_CMD_READ32_MSGSET 0x1
#undef MC_CMD_0x1_PRIVILEGE_CTG
#define MC_CMD_0x1_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -1413,6 +1492,7 @@
* Write multiple 32byte words to MC memory.
*/
#define MC_CMD_WRITE32 0x2
+#define MC_CMD_WRITE32_MSGSET 0x2
#undef MC_CMD_0x2_PRIVILEGE_CTG
#define MC_CMD_0x2_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -1442,6 +1522,7 @@
* has additional checks to reject insecure calls.
*/
#define MC_CMD_COPYCODE 0x3
+#define MC_CMD_COPYCODE_MSGSET 0x3
#undef MC_CMD_0x3_PRIVILEGE_CTG
#define MC_CMD_0x3_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -1505,6 +1586,7 @@
* Select function for function-specific commands.
*/
#define MC_CMD_SET_FUNC 0x4
+#define MC_CMD_SET_FUNC_MSGSET 0x4
#undef MC_CMD_0x4_PRIVILEGE_CTG
#define MC_CMD_0x4_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -1524,6 +1606,7 @@
* Get the instruction address from which the MC booted.
*/
#define MC_CMD_GET_BOOT_STATUS 0x5
+#define MC_CMD_GET_BOOT_STATUS_MSGSET 0x5
#undef MC_CMD_0x5_PRIVILEGE_CTG
#define MC_CMD_0x5_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -1558,6 +1641,7 @@
* fields will only be present if OUT.GLOBAL_FLAGS != NO_FAILS
*/
#define MC_CMD_GET_ASSERTS 0x6
+#define MC_CMD_GET_ASSERTS_MSGSET 0x6
#undef MC_CMD_0x6_PRIVILEGE_CTG
#define MC_CMD_0x6_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -1682,12 +1766,24 @@
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_OFST 260
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_LEN 8
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_LO_OFST 260
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_LO_LEN 4
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_LO_LBN 2080
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_LO_WIDTH 32
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_HI_OFST 264
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_HI_LEN 4
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_HI_LBN 2112
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_HI_WIDTH 32
/* MC firmware version number */
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_OFST 268
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_LEN 8
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_LO_OFST 268
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_LO_LEN 4
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_LO_LBN 2144
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_LO_WIDTH 32
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_HI_OFST 272
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_HI_LEN 4
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_HI_LBN 2176
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_HI_WIDTH 32
/* MC firmware security level */
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_SECURITY_LEVEL_OFST 276
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_SECURITY_LEVEL_LEN 4
@@ -1705,6 +1801,7 @@
* sensor notifications and MCDI completions
*/
#define MC_CMD_LOG_CTRL 0x7
+#define MC_CMD_LOG_CTRL_MSGSET 0x7
#undef MC_CMD_0x7_PRIVILEGE_CTG
#define MC_CMD_0x7_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -1731,6 +1828,7 @@
* Get version information about adapter components.
*/
#define MC_CMD_GET_VERSION 0x8
+#define MC_CMD_GET_VERSION_MSGSET 0x8
#undef MC_CMD_0x8_PRIVILEGE_CTG
#define MC_CMD_0x8_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -1771,7 +1869,13 @@
#define MC_CMD_GET_VERSION_OUT_VERSION_OFST 24
#define MC_CMD_GET_VERSION_OUT_VERSION_LEN 8
#define MC_CMD_GET_VERSION_OUT_VERSION_LO_OFST 24
+#define MC_CMD_GET_VERSION_OUT_VERSION_LO_LEN 4
+#define MC_CMD_GET_VERSION_OUT_VERSION_LO_LBN 192
+#define MC_CMD_GET_VERSION_OUT_VERSION_LO_WIDTH 32
#define MC_CMD_GET_VERSION_OUT_VERSION_HI_OFST 28
+#define MC_CMD_GET_VERSION_OUT_VERSION_HI_LEN 4
+#define MC_CMD_GET_VERSION_OUT_VERSION_HI_LBN 224
+#define MC_CMD_GET_VERSION_OUT_VERSION_HI_WIDTH 32
/* MC_CMD_GET_VERSION_EXT_OUT msgresponse */
#define MC_CMD_GET_VERSION_EXT_OUT_LEN 48
@@ -1787,7 +1891,13 @@
#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_OFST 24
#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_LEN 8
#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_LO_OFST 24
+#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_LO_LEN 4
+#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_LO_LBN 192
+#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_LO_WIDTH 32
#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_HI_OFST 28
+#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_HI_LEN 4
+#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_HI_LBN 224
+#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_HI_WIDTH 32
/* extra info */
#define MC_CMD_GET_VERSION_EXT_OUT_EXTRA_OFST 32
#define MC_CMD_GET_VERSION_EXT_OUT_EXTRA_LEN 16
@@ -1811,7 +1921,13 @@
#define MC_CMD_GET_VERSION_V2_OUT_VERSION_OFST 24
#define MC_CMD_GET_VERSION_V2_OUT_VERSION_LEN 8
#define MC_CMD_GET_VERSION_V2_OUT_VERSION_LO_OFST 24
+#define MC_CMD_GET_VERSION_V2_OUT_VERSION_LO_LEN 4
+#define MC_CMD_GET_VERSION_V2_OUT_VERSION_LO_LBN 192
+#define MC_CMD_GET_VERSION_V2_OUT_VERSION_LO_WIDTH 32
#define MC_CMD_GET_VERSION_V2_OUT_VERSION_HI_OFST 28
+#define MC_CMD_GET_VERSION_V2_OUT_VERSION_HI_LEN 4
+#define MC_CMD_GET_VERSION_V2_OUT_VERSION_HI_LBN 224
+#define MC_CMD_GET_VERSION_V2_OUT_VERSION_HI_WIDTH 32
/* extra info */
#define MC_CMD_GET_VERSION_V2_OUT_EXTRA_OFST 32
#define MC_CMD_GET_VERSION_V2_OUT_EXTRA_LEN 16
@@ -1833,6 +1949,33 @@
#define MC_CMD_GET_VERSION_V2_OUT_BOARD_EXT_INFO_PRESENT_OFST 48
#define MC_CMD_GET_VERSION_V2_OUT_BOARD_EXT_INFO_PRESENT_LBN 4
#define MC_CMD_GET_VERSION_V2_OUT_BOARD_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_DATAPATH_HW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_DATAPATH_HW_VERSION_PRESENT_LBN 5
+#define MC_CMD_GET_VERSION_V2_OUT_DATAPATH_HW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_DATAPATH_FW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_DATAPATH_FW_VERSION_PRESENT_LBN 6
+#define MC_CMD_GET_VERSION_V2_OUT_DATAPATH_FW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_BOOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_BOOT_VERSION_PRESENT_LBN 7
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_BOOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_UBOOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_UBOOT_VERSION_PRESENT_LBN 8
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_UBOOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_LBN 9
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_LBN 10
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_VERSION_PRESENT_LBN 11
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_BOARD_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_BOARD_VERSION_PRESENT_LBN 12
+#define MC_CMD_GET_VERSION_V2_OUT_BOARD_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_BUNDLE_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_BUNDLE_VERSION_PRESENT_LBN 13
+#define MC_CMD_GET_VERSION_V2_OUT_BUNDLE_VERSION_PRESENT_WIDTH 1
/* MC firmware unique build ID (as binary SHA-1 value) */
#define MC_CMD_GET_VERSION_V2_OUT_MCFW_BUILD_ID_OFST 52
#define MC_CMD_GET_VERSION_V2_OUT_MCFW_BUILD_ID_LEN 20
@@ -1850,7 +1993,13 @@
#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_OFST 156
#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_LEN 8
#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_LO_OFST 156
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_LO_LEN 4
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_LO_LBN 1248
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_LO_WIDTH 32
#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_HI_OFST 160
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_HI_LEN 4
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_HI_LBN 1280
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_HI_WIDTH 32
/* The ID of the SUC chip. This is specific to the platform but typically
* indicates family, memory sizes etc. See SF-116728-SW for further details.
*/
@@ -1864,7 +2013,13 @@
#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_OFST 184
#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_LEN 8
#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_LO_OFST 184
+#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_LO_LEN 4
+#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_LO_LBN 1472
+#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_LO_WIDTH 32
#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_HI_OFST 188
+#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_HI_LEN 4
+#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_HI_LBN 1504
+#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_HI_WIDTH 32
/* FPGA version as three numbers. On Riverhead based systems this field uses
* the same encoding as hardware version ID registers (MC_FPGA_BUILD_HWRD_REG):
* FPGA_VERSION[0]: x => Image H{x} FPGA_VERSION[1]: Revision letter (0 => A, 1
@@ -1886,12 +2041,496 @@
#define MC_CMD_GET_VERSION_V2_OUT_BOARD_SERIAL_OFST 240
#define MC_CMD_GET_VERSION_V2_OUT_BOARD_SERIAL_LEN 64
+/* MC_CMD_GET_VERSION_V3_OUT msgresponse: Extended response providing version
+ * information for all adapter components. For Riverhead based designs, base MC
+ * firmware version fields refer to NMC firmware, while CMC firmware data is in
+ * dedicated CMC fields. Flags indicate which data is present in the response
+ * (depending on which components exist on a particular adapter)
+ */
+#define MC_CMD_GET_VERSION_V3_OUT_LEN 328
+/* MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */
+/* MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */
+/* Enum values, see field(s): */
+/* MC_CMD_GET_VERSION_V0_OUT/MC_CMD_GET_VERSION_OUT_FIRMWARE */
+#define MC_CMD_GET_VERSION_V3_OUT_PCOL_OFST 4
+#define MC_CMD_GET_VERSION_V3_OUT_PCOL_LEN 4
+/* 128bit mask of functions supported by the current firmware */
+#define MC_CMD_GET_VERSION_V3_OUT_SUPPORTED_FUNCS_OFST 8
+#define MC_CMD_GET_VERSION_V3_OUT_SUPPORTED_FUNCS_LEN 16
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_OFST 24
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_LEN 8
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_LO_OFST 24
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_LO_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_LO_LBN 192
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_HI_OFST 28
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_HI_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_HI_LBN 224
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_HI_WIDTH 32
+/* extra info */
+#define MC_CMD_GET_VERSION_V3_OUT_EXTRA_OFST 32
+#define MC_CMD_GET_VERSION_V3_OUT_EXTRA_LEN 16
+/* Flags indicating which extended fields are valid */
+#define MC_CMD_GET_VERSION_V3_OUT_FLAGS_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_FLAGS_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_EXT_INFO_PRESENT_LBN 0
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_EXT_INFO_PRESENT_LBN 1
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_CMC_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_CMC_EXT_INFO_PRESENT_LBN 2
+#define MC_CMD_GET_VERSION_V3_OUT_CMC_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_FPGA_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_FPGA_EXT_INFO_PRESENT_LBN 3
+#define MC_CMD_GET_VERSION_V3_OUT_FPGA_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_EXT_INFO_PRESENT_LBN 4
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_HW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_HW_VERSION_PRESENT_LBN 5
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_HW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_FW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_FW_VERSION_PRESENT_LBN 6
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_FW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_BOOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_BOOT_VERSION_PRESENT_LBN 7
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_BOOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_UBOOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_UBOOT_VERSION_PRESENT_LBN 8
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_UBOOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_LBN 9
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_LBN 10
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_VERSION_PRESENT_LBN 11
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_VERSION_PRESENT_LBN 12
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_BUNDLE_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_BUNDLE_VERSION_PRESENT_LBN 13
+#define MC_CMD_GET_VERSION_V3_OUT_BUNDLE_VERSION_PRESENT_WIDTH 1
+/* MC firmware unique build ID (as binary SHA-1 value) */
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_BUILD_ID_OFST 52
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_BUILD_ID_LEN 20
+/* MC firmware security level */
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_SECURITY_LEVEL_OFST 72
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_SECURITY_LEVEL_LEN 4
+/* MC firmware build name (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_BUILD_NAME_OFST 76
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_BUILD_NAME_LEN 64
+/* The SUC firmware version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_VERSION_OFST 140
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_VERSION_NUM 4
+/* SUC firmware build date (as 64-bit Unix timestamp) */
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_OFST 156
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_LEN 8
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_LO_OFST 156
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_LO_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_LO_LBN 1248
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_HI_OFST 160
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_HI_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_HI_LBN 1280
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_HI_WIDTH 32
+/* The ID of the SUC chip. This is specific to the platform but typically
+ * indicates family, memory sizes etc. See SF-116728-SW for further details.
+ */
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_CHIP_ID_OFST 164
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_CHIP_ID_LEN 4
+/* The CMC firmware version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_VERSION_OFST 168
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_VERSION_NUM 4
+/* CMC firmware build date (as 64-bit Unix timestamp) */
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_OFST 184
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_LEN 8
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_LO_OFST 184
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_LO_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_LO_LBN 1472
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_HI_OFST 188
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_HI_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_HI_LBN 1504
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_HI_WIDTH 32
+/* FPGA version as three numbers. On Riverhead based systems this field uses
+ * the same encoding as hardware version ID registers (MC_FPGA_BUILD_HWRD_REG):
+ * FPGA_VERSION[0]: x => Image H{x} FPGA_VERSION[1]: Revision letter (0 => A, 1
+ * => B, ...) FPGA_VERSION[2]: Sub-revision number
+ */
+#define MC_CMD_GET_VERSION_V3_OUT_FPGA_VERSION_OFST 192
+#define MC_CMD_GET_VERSION_V3_OUT_FPGA_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_FPGA_VERSION_NUM 3
+/* Extra FPGA revision information (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V3_OUT_FPGA_EXTRA_OFST 204
+#define MC_CMD_GET_VERSION_V3_OUT_FPGA_EXTRA_LEN 16
+/* Board name / adapter model (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_NAME_OFST 220
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_NAME_LEN 16
+/* Board revision number */
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_REVISION_OFST 236
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_REVISION_LEN 4
+/* Board serial number (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_SERIAL_OFST 240
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_SERIAL_LEN 64
+/* The version of the datapath hardware design as three number - a.b.c */
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_HW_VERSION_OFST 304
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_HW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_HW_VERSION_NUM 3
+/* The version of the firmware library used to control the datapath as three
+ * number - a.b.c
+ */
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_FW_VERSION_OFST 316
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_FW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_FW_VERSION_NUM 3
+
+/* MC_CMD_GET_VERSION_V4_OUT msgresponse: Extended response providing SoC
+ * version information
+ */
+#define MC_CMD_GET_VERSION_V4_OUT_LEN 392
+/* MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */
+/* MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */
+/* Enum values, see field(s): */
+/* MC_CMD_GET_VERSION_V0_OUT/MC_CMD_GET_VERSION_OUT_FIRMWARE */
+#define MC_CMD_GET_VERSION_V4_OUT_PCOL_OFST 4
+#define MC_CMD_GET_VERSION_V4_OUT_PCOL_LEN 4
+/* 128bit mask of functions supported by the current firmware */
+#define MC_CMD_GET_VERSION_V4_OUT_SUPPORTED_FUNCS_OFST 8
+#define MC_CMD_GET_VERSION_V4_OUT_SUPPORTED_FUNCS_LEN 16
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_OFST 24
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_LEN 8
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_LO_OFST 24
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_LO_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_LO_LBN 192
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_HI_OFST 28
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_HI_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_HI_LBN 224
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_HI_WIDTH 32
+/* extra info */
+#define MC_CMD_GET_VERSION_V4_OUT_EXTRA_OFST 32
+#define MC_CMD_GET_VERSION_V4_OUT_EXTRA_LEN 16
+/* Flags indicating which extended fields are valid */
+#define MC_CMD_GET_VERSION_V4_OUT_FLAGS_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_FLAGS_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_EXT_INFO_PRESENT_LBN 0
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_EXT_INFO_PRESENT_LBN 1
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_CMC_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_CMC_EXT_INFO_PRESENT_LBN 2
+#define MC_CMD_GET_VERSION_V4_OUT_CMC_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_FPGA_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_FPGA_EXT_INFO_PRESENT_LBN 3
+#define MC_CMD_GET_VERSION_V4_OUT_FPGA_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_EXT_INFO_PRESENT_LBN 4
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_HW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_HW_VERSION_PRESENT_LBN 5
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_HW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_FW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_FW_VERSION_PRESENT_LBN 6
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_FW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_BOOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_BOOT_VERSION_PRESENT_LBN 7
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_BOOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_UBOOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_UBOOT_VERSION_PRESENT_LBN 8
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_UBOOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_LBN 9
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_LBN 10
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_VERSION_PRESENT_LBN 11
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_VERSION_PRESENT_LBN 12
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_BUNDLE_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_BUNDLE_VERSION_PRESENT_LBN 13
+#define MC_CMD_GET_VERSION_V4_OUT_BUNDLE_VERSION_PRESENT_WIDTH 1
+/* MC firmware unique build ID (as binary SHA-1 value) */
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_BUILD_ID_OFST 52
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_BUILD_ID_LEN 20
+/* MC firmware security level */
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_SECURITY_LEVEL_OFST 72
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_SECURITY_LEVEL_LEN 4
+/* MC firmware build name (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_BUILD_NAME_OFST 76
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_BUILD_NAME_LEN 64
+/* The SUC firmware version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_VERSION_OFST 140
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_VERSION_NUM 4
+/* SUC firmware build date (as 64-bit Unix timestamp) */
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_OFST 156
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_LEN 8
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_LO_OFST 156
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_LO_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_LO_LBN 1248
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_HI_OFST 160
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_HI_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_HI_LBN 1280
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_HI_WIDTH 32
+/* The ID of the SUC chip. This is specific to the platform but typically
+ * indicates family, memory sizes etc. See SF-116728-SW for further details.
+ */
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_CHIP_ID_OFST 164
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_CHIP_ID_LEN 4
+/* The CMC firmware version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_VERSION_OFST 168
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_VERSION_NUM 4
+/* CMC firmware build date (as 64-bit Unix timestamp) */
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_OFST 184
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_LEN 8
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_LO_OFST 184
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_LO_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_LO_LBN 1472
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_HI_OFST 188
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_HI_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_HI_LBN 1504
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_HI_WIDTH 32
+/* FPGA version as three numbers. On Riverhead based systems this field uses
+ * the same encoding as hardware version ID registers (MC_FPGA_BUILD_HWRD_REG):
+ * FPGA_VERSION[0]: x => Image H{x} FPGA_VERSION[1]: Revision letter (0 => A, 1
+ * => B, ...) FPGA_VERSION[2]: Sub-revision number
+ */
+#define MC_CMD_GET_VERSION_V4_OUT_FPGA_VERSION_OFST 192
+#define MC_CMD_GET_VERSION_V4_OUT_FPGA_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_FPGA_VERSION_NUM 3
+/* Extra FPGA revision information (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V4_OUT_FPGA_EXTRA_OFST 204
+#define MC_CMD_GET_VERSION_V4_OUT_FPGA_EXTRA_LEN 16
+/* Board name / adapter model (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_NAME_OFST 220
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_NAME_LEN 16
+/* Board revision number */
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_REVISION_OFST 236
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_REVISION_LEN 4
+/* Board serial number (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_SERIAL_OFST 240
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_SERIAL_LEN 64
+/* The version of the datapath hardware design as three number - a.b.c */
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_HW_VERSION_OFST 304
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_HW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_HW_VERSION_NUM 3
+/* The version of the firmware library used to control the datapath as three
+ * number - a.b.c
+ */
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_FW_VERSION_OFST 316
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_FW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_FW_VERSION_NUM 3
+/* The SOC boot version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_BOOT_VERSION_OFST 328
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_BOOT_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_BOOT_VERSION_NUM 4
+/* The SOC uboot version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_UBOOT_VERSION_OFST 344
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_UBOOT_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_UBOOT_VERSION_NUM 4
+/* The SOC main rootfs version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_MAIN_ROOTFS_VERSION_OFST 360
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_MAIN_ROOTFS_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_MAIN_ROOTFS_VERSION_NUM 4
+/* The SOC recovery buildroot version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_RECOVERY_BUILDROOT_VERSION_OFST 376
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_RECOVERY_BUILDROOT_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_RECOVERY_BUILDROOT_VERSION_NUM 4
+
+/* MC_CMD_GET_VERSION_V5_OUT msgresponse: Extended response providing bundle
+ * and board version information
+ */
+#define MC_CMD_GET_VERSION_V5_OUT_LEN 424
+/* MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */
+/* MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */
+/* Enum values, see field(s): */
+/* MC_CMD_GET_VERSION_V0_OUT/MC_CMD_GET_VERSION_OUT_FIRMWARE */
+#define MC_CMD_GET_VERSION_V5_OUT_PCOL_OFST 4
+#define MC_CMD_GET_VERSION_V5_OUT_PCOL_LEN 4
+/* 128bit mask of functions supported by the current firmware */
+#define MC_CMD_GET_VERSION_V5_OUT_SUPPORTED_FUNCS_OFST 8
+#define MC_CMD_GET_VERSION_V5_OUT_SUPPORTED_FUNCS_LEN 16
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_OFST 24
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_LEN 8
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_LO_OFST 24
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_LO_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_LO_LBN 192
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_HI_OFST 28
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_HI_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_HI_LBN 224
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_HI_WIDTH 32
+/* extra info */
+#define MC_CMD_GET_VERSION_V5_OUT_EXTRA_OFST 32
+#define MC_CMD_GET_VERSION_V5_OUT_EXTRA_LEN 16
+/* Flags indicating which extended fields are valid */
+#define MC_CMD_GET_VERSION_V5_OUT_FLAGS_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_FLAGS_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_EXT_INFO_PRESENT_LBN 0
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_EXT_INFO_PRESENT_LBN 1
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_CMC_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_CMC_EXT_INFO_PRESENT_LBN 2
+#define MC_CMD_GET_VERSION_V5_OUT_CMC_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_FPGA_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_FPGA_EXT_INFO_PRESENT_LBN 3
+#define MC_CMD_GET_VERSION_V5_OUT_FPGA_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_EXT_INFO_PRESENT_LBN 4
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_HW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_HW_VERSION_PRESENT_LBN 5
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_HW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_FW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_FW_VERSION_PRESENT_LBN 6
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_FW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_BOOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_BOOT_VERSION_PRESENT_LBN 7
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_BOOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_UBOOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_UBOOT_VERSION_PRESENT_LBN 8
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_UBOOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_LBN 9
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_LBN 10
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_VERSION_PRESENT_LBN 11
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_VERSION_PRESENT_LBN 12
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_BUNDLE_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_BUNDLE_VERSION_PRESENT_LBN 13
+#define MC_CMD_GET_VERSION_V5_OUT_BUNDLE_VERSION_PRESENT_WIDTH 1
+/* MC firmware unique build ID (as binary SHA-1 value) */
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_BUILD_ID_OFST 52
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_BUILD_ID_LEN 20
+/* MC firmware security level */
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_SECURITY_LEVEL_OFST 72
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_SECURITY_LEVEL_LEN 4
+/* MC firmware build name (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_BUILD_NAME_OFST 76
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_BUILD_NAME_LEN 64
+/* The SUC firmware version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_VERSION_OFST 140
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_VERSION_NUM 4
+/* SUC firmware build date (as 64-bit Unix timestamp) */
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_OFST 156
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_LEN 8
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_LO_OFST 156
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_LO_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_LO_LBN 1248
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_HI_OFST 160
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_HI_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_HI_LBN 1280
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_HI_WIDTH 32
+/* The ID of the SUC chip. This is specific to the platform but typically
+ * indicates family, memory sizes etc. See SF-116728-SW for further details.
+ */
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_CHIP_ID_OFST 164
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_CHIP_ID_LEN 4
+/* The CMC firmware version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_VERSION_OFST 168
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_VERSION_NUM 4
+/* CMC firmware build date (as 64-bit Unix timestamp) */
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_OFST 184
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_LEN 8
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_LO_OFST 184
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_LO_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_LO_LBN 1472
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_HI_OFST 188
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_HI_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_HI_LBN 1504
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_HI_WIDTH 32
+/* FPGA version as three numbers. On Riverhead based systems this field uses
+ * the same encoding as hardware version ID registers (MC_FPGA_BUILD_HWRD_REG):
+ * FPGA_VERSION[0]: x => Image H{x} FPGA_VERSION[1]: Revision letter (0 => A, 1
+ * => B, ...) FPGA_VERSION[2]: Sub-revision number
+ */
+#define MC_CMD_GET_VERSION_V5_OUT_FPGA_VERSION_OFST 192
+#define MC_CMD_GET_VERSION_V5_OUT_FPGA_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_FPGA_VERSION_NUM 3
+/* Extra FPGA revision information (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V5_OUT_FPGA_EXTRA_OFST 204
+#define MC_CMD_GET_VERSION_V5_OUT_FPGA_EXTRA_LEN 16
+/* Board name / adapter model (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_NAME_OFST 220
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_NAME_LEN 16
+/* Board revision number */
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_REVISION_OFST 236
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_REVISION_LEN 4
+/* Board serial number (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_SERIAL_OFST 240
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_SERIAL_LEN 64
+/* The version of the datapath hardware design as three number - a.b.c */
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_HW_VERSION_OFST 304
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_HW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_HW_VERSION_NUM 3
+/* The version of the firmware library used to control the datapath as three
+ * number - a.b.c
+ */
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_FW_VERSION_OFST 316
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_FW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_FW_VERSION_NUM 3
+/* The SOC boot version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_BOOT_VERSION_OFST 328
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_BOOT_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_BOOT_VERSION_NUM 4
+/* The SOC uboot version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_UBOOT_VERSION_OFST 344
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_UBOOT_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_UBOOT_VERSION_NUM 4
+/* The SOC main rootfs version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_MAIN_ROOTFS_VERSION_OFST 360
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_MAIN_ROOTFS_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_MAIN_ROOTFS_VERSION_NUM 4
+/* The SOC recovery buildroot version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_RECOVERY_BUILDROOT_VERSION_OFST 376
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_RECOVERY_BUILDROOT_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_RECOVERY_BUILDROOT_VERSION_NUM 4
+/* Board version as four numbers - a.b.c.d. BOARD_VERSION[0] duplicates the
+ * BOARD_REVISION field
+ */
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_VERSION_OFST 392
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_VERSION_NUM 4
+/* Bundle version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V5_OUT_BUNDLE_VERSION_OFST 408
+#define MC_CMD_GET_VERSION_V5_OUT_BUNDLE_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_BUNDLE_VERSION_NUM 4
+
/***********************************/
/* MC_CMD_PTP
* Perform PTP operation
*/
#define MC_CMD_PTP 0xb
+#define MC_CMD_PTP_MSGSET 0xb
#undef MC_CMD_0xb_PRIVILEGE_CTG
#define MC_CMD_0xb_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -2066,7 +2705,13 @@
#define MC_CMD_PTP_IN_ADJUST_FREQ_OFST 8
#define MC_CMD_PTP_IN_ADJUST_FREQ_LEN 8
#define MC_CMD_PTP_IN_ADJUST_FREQ_LO_OFST 8
+#define MC_CMD_PTP_IN_ADJUST_FREQ_LO_LEN 4
+#define MC_CMD_PTP_IN_ADJUST_FREQ_LO_LBN 64
+#define MC_CMD_PTP_IN_ADJUST_FREQ_LO_WIDTH 32
#define MC_CMD_PTP_IN_ADJUST_FREQ_HI_OFST 12
+#define MC_CMD_PTP_IN_ADJUST_FREQ_HI_LEN 4
+#define MC_CMD_PTP_IN_ADJUST_FREQ_HI_LBN 96
+#define MC_CMD_PTP_IN_ADJUST_FREQ_HI_WIDTH 32
/* enum: Number of fractional bits in frequency adjustment */
#define MC_CMD_PTP_IN_ADJUST_BITS 0x28
/* enum: Number of fractional bits in frequency adjustment when FP44_FREQ_ADJ
@@ -2097,7 +2742,13 @@
#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_OFST 8
#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_LEN 8
#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_LO_OFST 8
+#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_LO_LEN 4
+#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_LO_LBN 64
+#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_LO_WIDTH 32
#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_HI_OFST 12
+#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_HI_LEN 4
+#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_HI_LBN 96
+#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_HI_WIDTH 32
/* enum: Number of fractional bits in frequency adjustment */
/* MC_CMD_PTP_IN_ADJUST_BITS 0x28 */
/* enum: Number of fractional bits in frequency adjustment when FP44_FREQ_ADJ
@@ -2136,7 +2787,13 @@
#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_OFST 12
#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_LEN 8
#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_LO_OFST 12
+#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_LO_LEN 4
+#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_LO_LBN 96
+#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_LO_WIDTH 32
#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_HI_OFST 16
+#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_HI_LEN 4
+#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_HI_LBN 128
+#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_HI_WIDTH 32
/* MC_CMD_PTP_IN_MANFTEST_BASIC msgrequest */
#define MC_CMD_PTP_IN_MANFTEST_BASIC_LEN 8
@@ -2252,7 +2909,13 @@
#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_OFST 8
#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_LEN 8
#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_LO_OFST 8
+#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_LO_LEN 4
+#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_LO_LBN 64
+#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_LO_WIDTH 32
#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_HI_OFST 12
+#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_HI_LEN 4
+#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_HI_LBN 96
+#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_HI_WIDTH 32
/* Enum values, see field(s): */
/* MC_CMD_PTP/MC_CMD_PTP_IN_ADJUST/FREQ */
@@ -2283,7 +2946,13 @@
#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_OFST 12
#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_LEN 8
#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_LO_OFST 12
+#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_LO_LEN 4
+#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_LO_LBN 96
+#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_LO_WIDTH 32
#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_HI_OFST 16
+#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_HI_LEN 4
+#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_HI_LBN 128
+#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_HI_WIDTH 32
/* MC_CMD_PTP_IN_RX_SET_DOMAIN_FILTER msgrequest */
#define MC_CMD_PTP_IN_RX_SET_DOMAIN_FILTER_LEN 16
@@ -2745,6 +3414,7 @@
* Read 32bit words from the indirect memory map.
*/
#define MC_CMD_CSR_READ32 0xc
+#define MC_CMD_CSR_READ32_MSGSET 0xc
#undef MC_CMD_0xc_PRIVILEGE_CTG
#define MC_CMD_0xc_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -2778,6 +3448,7 @@
* Write 32bit dwords to the indirect memory map.
*/
#define MC_CMD_CSR_WRITE32 0xd
+#define MC_CMD_CSR_WRITE32_MSGSET 0xd
#undef MC_CMD_0xd_PRIVILEGE_CTG
#define MC_CMD_0xd_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -2811,6 +3482,7 @@
* MCDI command to avoid creating too many MCDI commands.
*/
#define MC_CMD_HP 0x54
+#define MC_CMD_HP_MSGSET 0x54
#undef MC_CMD_0x54_PRIVILEGE_CTG
#define MC_CMD_0x54_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -2834,7 +3506,13 @@
#define MC_CMD_HP_IN_OCSD_ADDR_OFST 4
#define MC_CMD_HP_IN_OCSD_ADDR_LEN 8
#define MC_CMD_HP_IN_OCSD_ADDR_LO_OFST 4
+#define MC_CMD_HP_IN_OCSD_ADDR_LO_LEN 4
+#define MC_CMD_HP_IN_OCSD_ADDR_LO_LBN 32
+#define MC_CMD_HP_IN_OCSD_ADDR_LO_WIDTH 32
#define MC_CMD_HP_IN_OCSD_ADDR_HI_OFST 8
+#define MC_CMD_HP_IN_OCSD_ADDR_HI_LEN 4
+#define MC_CMD_HP_IN_OCSD_ADDR_HI_LBN 64
+#define MC_CMD_HP_IN_OCSD_ADDR_HI_WIDTH 32
/* The requested update interval, in seconds. (Or the sub-command if ADDR is
* NULL.)
*/
@@ -2858,6 +3536,7 @@
* Get stack information.
*/
#define MC_CMD_STACKINFO 0xf
+#define MC_CMD_STACKINFO_MSGSET 0xf
#undef MC_CMD_0xf_PRIVILEGE_CTG
#define MC_CMD_0xf_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -2884,6 +3563,7 @@
* MDIO register read.
*/
#define MC_CMD_MDIO_READ 0x10
+#define MC_CMD_MDIO_READ_MSGSET 0x10
#undef MC_CMD_0x10_PRIVILEGE_CTG
#define MC_CMD_0x10_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -2932,6 +3612,7 @@
* MDIO register write.
*/
#define MC_CMD_MDIO_WRITE 0x11
+#define MC_CMD_MDIO_WRITE_MSGSET 0x11
#undef MC_CMD_0x11_PRIVILEGE_CTG
#define MC_CMD_0x11_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -2980,6 +3661,7 @@
* Write DBI register(s).
*/
#define MC_CMD_DBI_WRITE 0x12
+#define MC_CMD_DBI_WRITE_MSGSET 0x12
#undef MC_CMD_0x12_PRIVILEGE_CTG
#define MC_CMD_0x12_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -3033,6 +3715,7 @@
* access is implied by the Shared memory channel used.
*/
#define MC_CMD_PORT_READ32 0x14
+#define MC_CMD_PORT_READ32_MSGSET 0x14
/* MC_CMD_PORT_READ32_IN msgrequest */
#define MC_CMD_PORT_READ32_IN_LEN 4
@@ -3056,6 +3739,7 @@
* access is implied by the Shared memory channel used.
*/
#define MC_CMD_PORT_WRITE32 0x15
+#define MC_CMD_PORT_WRITE32_MSGSET 0x15
/* MC_CMD_PORT_WRITE32_IN msgrequest */
#define MC_CMD_PORT_WRITE32_IN_LEN 8
@@ -3079,6 +3763,7 @@
* access is implied by the Shared memory channel used.
*/
#define MC_CMD_PORT_READ128 0x16
+#define MC_CMD_PORT_READ128_MSGSET 0x16
/* MC_CMD_PORT_READ128_IN msgrequest */
#define MC_CMD_PORT_READ128_IN_LEN 4
@@ -3102,6 +3787,7 @@
* access is implied by the Shared memory channel used.
*/
#define MC_CMD_PORT_WRITE128 0x17
+#define MC_CMD_PORT_WRITE128_MSGSET 0x17
/* MC_CMD_PORT_WRITE128_IN msgrequest */
#define MC_CMD_PORT_WRITE128_IN_LEN 20
@@ -3150,6 +3836,7 @@
* Returns the MC firmware configuration structure.
*/
#define MC_CMD_GET_BOARD_CFG 0x18
+#define MC_CMD_GET_BOARD_CFG_MSGSET 0x18
#undef MC_CMD_0x18_PRIVILEGE_CTG
#define MC_CMD_0x18_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -3225,6 +3912,7 @@
* Read DBI register(s) -- extended functionality
*/
#define MC_CMD_DBI_READX 0x19
+#define MC_CMD_DBI_READX_MSGSET 0x19
#undef MC_CMD_0x19_PRIVILEGE_CTG
#define MC_CMD_0x19_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -3239,7 +3927,13 @@
#define MC_CMD_DBI_READX_IN_DBIRDOP_OFST 0
#define MC_CMD_DBI_READX_IN_DBIRDOP_LEN 8
#define MC_CMD_DBI_READX_IN_DBIRDOP_LO_OFST 0
+#define MC_CMD_DBI_READX_IN_DBIRDOP_LO_LEN 4
+#define MC_CMD_DBI_READX_IN_DBIRDOP_LO_LBN 0
+#define MC_CMD_DBI_READX_IN_DBIRDOP_LO_WIDTH 32
#define MC_CMD_DBI_READX_IN_DBIRDOP_HI_OFST 4
+#define MC_CMD_DBI_READX_IN_DBIRDOP_HI_LEN 4
+#define MC_CMD_DBI_READX_IN_DBIRDOP_HI_LBN 32
+#define MC_CMD_DBI_READX_IN_DBIRDOP_HI_WIDTH 32
#define MC_CMD_DBI_READX_IN_DBIRDOP_MINNUM 1
#define MC_CMD_DBI_READX_IN_DBIRDOP_MAXNUM 31
#define MC_CMD_DBI_READX_IN_DBIRDOP_MAXNUM_MCDI2 127
@@ -3283,6 +3977,7 @@
* Set the 16byte seed for the MC pseudo-random generator.
*/
#define MC_CMD_SET_RAND_SEED 0x1a
+#define MC_CMD_SET_RAND_SEED_MSGSET 0x1a
#undef MC_CMD_0x1a_PRIVILEGE_CTG
#define MC_CMD_0x1a_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -3302,6 +3997,7 @@
* Retrieve the history of the LTSSM, if the build supports it.
*/
#define MC_CMD_LTSSM_HIST 0x1b
+#define MC_CMD_LTSSM_HIST_MSGSET 0x1b
/* MC_CMD_LTSSM_HIST_IN msgrequest */
#define MC_CMD_LTSSM_HIST_IN_LEN 0
@@ -3330,6 +4026,7 @@
* platforms.
*/
#define MC_CMD_DRV_ATTACH 0x1c
+#define MC_CMD_DRV_ATTACH_MSGSET 0x1c
#undef MC_CMD_0x1c_PRIVILEGE_CTG
#define MC_CMD_0x1c_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -3524,6 +4221,7 @@
* Route UART output to circular buffer in shared memory instead.
*/
#define MC_CMD_SHMUART 0x1f
+#define MC_CMD_SHMUART_MSGSET 0x1f
/* MC_CMD_SHMUART_IN msgrequest */
#define MC_CMD_SHMUART_IN_LEN 4
@@ -3542,6 +4240,7 @@
* use MC_CMD_ENTITY_RESET instead.
*/
#define MC_CMD_PORT_RESET 0x20
+#define MC_CMD_PORT_RESET_MSGSET 0x20
#undef MC_CMD_0x20_PRIVILEGE_CTG
#define MC_CMD_0x20_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -3560,6 +4259,7 @@
* extended version of the deprecated MC_CMD_PORT_RESET with added fields.
*/
#define MC_CMD_ENTITY_RESET 0x20
+#define MC_CMD_ENTITY_RESET_MSGSET 0x20
/* MC_CMD_0x20_PRIVILEGE_CTG SRIOV_CTG_GENERAL */
/* MC_CMD_ENTITY_RESET_IN msgrequest */
@@ -3582,6 +4282,7 @@
* Read instantaneous and minimum flow control thresholds.
*/
#define MC_CMD_PCIE_CREDITS 0x21
+#define MC_CMD_PCIE_CREDITS_MSGSET 0x21
/* MC_CMD_PCIE_CREDITS_IN msgrequest */
#define MC_CMD_PCIE_CREDITS_IN_LEN 8
@@ -3617,6 +4318,7 @@
* Get histogram of RX queue fill level.
*/
#define MC_CMD_RXD_MONITOR 0x22
+#define MC_CMD_RXD_MONITOR_MSGSET 0x22
/* MC_CMD_RXD_MONITOR_IN msgrequest */
#define MC_CMD_RXD_MONITOR_IN_LEN 12
@@ -3676,6 +4378,7 @@
* Copy the given ASCII string out onto UART and/or out of the network port.
*/
#define MC_CMD_PUTS 0x23
+#define MC_CMD_PUTS_MSGSET 0x23
#undef MC_CMD_0x23_PRIVILEGE_CTG
#define MC_CMD_0x23_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -3712,6 +4415,7 @@
* 'zombie' state. Locks required: None
*/
#define MC_CMD_GET_PHY_CFG 0x24
+#define MC_CMD_GET_PHY_CFG_MSGSET 0x24
#undef MC_CMD_0x24_PRIVILEGE_CTG
#define MC_CMD_0x24_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -3868,6 +4572,7 @@
* Return code: 0, EINVAL, EACCES (if PHY_LOCK is not held)
*/
#define MC_CMD_START_BIST 0x25
+#define MC_CMD_START_BIST_MSGSET 0x25
#undef MC_CMD_0x25_PRIVILEGE_CTG
#define MC_CMD_0x25_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -3908,6 +4613,7 @@
* EACCES (if PHY_LOCK is not held).
*/
#define MC_CMD_POLL_BIST 0x26
+#define MC_CMD_POLL_BIST_MSGSET 0x26
#undef MC_CMD_0x26_PRIVILEGE_CTG
#define MC_CMD_0x26_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -4077,6 +4783,7 @@
* returns). The driver must still wait for flush done/failure events as usual.
*/
#define MC_CMD_FLUSH_RX_QUEUES 0x27
+#define MC_CMD_FLUSH_RX_QUEUES_MSGSET 0x27
/* MC_CMD_FLUSH_RX_QUEUES_IN msgrequest */
#define MC_CMD_FLUSH_RX_QUEUES_IN_LENMIN 4
@@ -4099,6 +4806,7 @@
* Returns a bitmask of loopback modes available at each speed.
*/
#define MC_CMD_GET_LOOPBACK_MODES 0x28
+#define MC_CMD_GET_LOOPBACK_MODES_MSGSET 0x28
#undef MC_CMD_0x28_PRIVILEGE_CTG
#define MC_CMD_0x28_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -4112,7 +4820,13 @@
#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_OFST 0
#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_LO_OFST 0
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_LO_LBN 0
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_HI_OFST 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_HI_LBN 32
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_HI_WIDTH 32
/* enum: None. */
#define MC_CMD_LOOPBACK_NONE 0x0
/* enum: Data. */
@@ -4195,28 +4909,52 @@
#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_OFST 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_LO_OFST 8
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_LO_LBN 64
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_HI_OFST 12
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_HI_LBN 96
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_OFST 16
#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_LO_OFST 16
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_LO_LBN 128
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_HI_OFST 20
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_HI_LBN 160
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_OFST 24
#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_LO_OFST 24
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_LO_LBN 192
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_HI_OFST 28
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_HI_LBN 224
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_OFST 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_LO_OFST 32
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_LO_LBN 256
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_HI_OFST 36
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_HI_LBN 288
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
@@ -4228,7 +4966,13 @@
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_OFST 0
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_LO_OFST 0
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_LO_LBN 0
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_HI_OFST 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_HI_LBN 32
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_HI_WIDTH 32
/* enum: None. */
/* MC_CMD_LOOPBACK_NONE 0x0 */
/* enum: Data. */
@@ -4311,49 +5055,91 @@
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_OFST 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_LO_OFST 8
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_LO_LBN 64
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_HI_OFST 12
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_HI_LBN 96
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_OFST 16
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_LO_OFST 16
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_LO_LBN 128
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_HI_OFST 20
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_HI_LBN 160
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_OFST 24
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_LO_OFST 24
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_LO_LBN 192
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_HI_OFST 28
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_HI_LBN 224
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_OFST 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_LO_OFST 32
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_LO_LBN 256
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_HI_OFST 36
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_HI_LBN 288
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported 25G loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_OFST 40
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_LO_OFST 40
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_LO_LBN 320
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_HI_OFST 44
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_HI_LBN 352
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported 50 loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_OFST 48
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_LO_OFST 48
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_LO_LBN 384
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_HI_OFST 52
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_HI_LBN 416
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported 100G loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_OFST 56
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_LO_OFST 56
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_LO_LBN 448
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_HI_OFST 60
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_HI_LBN 480
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
@@ -4395,6 +5181,7 @@
* ETIME.
*/
#define MC_CMD_GET_LINK 0x29
+#define MC_CMD_GET_LINK_MSGSET 0x29
#undef MC_CMD_0x29_PRIVILEGE_CTG
#define MC_CMD_0x29_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -4596,6 +5383,7 @@
* code: 0, EINVAL, ETIME, EAGAIN
*/
#define MC_CMD_SET_LINK 0x2a
+#define MC_CMD_SET_LINK_MSGSET 0x2a
#undef MC_CMD_0x2a_PRIVILEGE_CTG
#define MC_CMD_0x2a_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -4686,6 +5474,7 @@
* Set identification LED state. Locks required: None. Return code: 0, EINVAL
*/
#define MC_CMD_SET_ID_LED 0x2b
+#define MC_CMD_SET_ID_LED_MSGSET 0x2b
#undef MC_CMD_0x2b_PRIVILEGE_CTG
#define MC_CMD_0x2b_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -4708,6 +5497,7 @@
* Set MAC configuration. Locks required: None. Return code: 0, EINVAL
*/
#define MC_CMD_SET_MAC 0x2c
+#define MC_CMD_SET_MAC_MSGSET 0x2c
#undef MC_CMD_0x2c_PRIVILEGE_CTG
#define MC_CMD_0x2c_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -4724,7 +5514,13 @@
#define MC_CMD_SET_MAC_IN_ADDR_OFST 8
#define MC_CMD_SET_MAC_IN_ADDR_LEN 8
#define MC_CMD_SET_MAC_IN_ADDR_LO_OFST 8
+#define MC_CMD_SET_MAC_IN_ADDR_LO_LEN 4
+#define MC_CMD_SET_MAC_IN_ADDR_LO_LBN 64
+#define MC_CMD_SET_MAC_IN_ADDR_LO_WIDTH 32
#define MC_CMD_SET_MAC_IN_ADDR_HI_OFST 12
+#define MC_CMD_SET_MAC_IN_ADDR_HI_LEN 4
+#define MC_CMD_SET_MAC_IN_ADDR_HI_LBN 96
+#define MC_CMD_SET_MAC_IN_ADDR_HI_WIDTH 32
#define MC_CMD_SET_MAC_IN_REJECT_OFST 16
#define MC_CMD_SET_MAC_IN_REJECT_LEN 4
#define MC_CMD_SET_MAC_IN_REJECT_UNCST_OFST 16
@@ -4765,7 +5561,13 @@
#define MC_CMD_SET_MAC_EXT_IN_ADDR_OFST 8
#define MC_CMD_SET_MAC_EXT_IN_ADDR_LEN 8
#define MC_CMD_SET_MAC_EXT_IN_ADDR_LO_OFST 8
+#define MC_CMD_SET_MAC_EXT_IN_ADDR_LO_LEN 4
+#define MC_CMD_SET_MAC_EXT_IN_ADDR_LO_LBN 64
+#define MC_CMD_SET_MAC_EXT_IN_ADDR_LO_WIDTH 32
#define MC_CMD_SET_MAC_EXT_IN_ADDR_HI_OFST 12
+#define MC_CMD_SET_MAC_EXT_IN_ADDR_HI_LEN 4
+#define MC_CMD_SET_MAC_EXT_IN_ADDR_HI_LBN 96
+#define MC_CMD_SET_MAC_EXT_IN_ADDR_HI_WIDTH 32
#define MC_CMD_SET_MAC_EXT_IN_REJECT_OFST 16
#define MC_CMD_SET_MAC_EXT_IN_REJECT_LEN 4
#define MC_CMD_SET_MAC_EXT_IN_REJECT_UNCST_OFST 16
@@ -4816,6 +5618,129 @@
#define MC_CMD_SET_MAC_EXT_IN_CFG_FCS_LBN 4
#define MC_CMD_SET_MAC_EXT_IN_CFG_FCS_WIDTH 1
+/* MC_CMD_SET_MAC_V3_IN msgrequest */
+#define MC_CMD_SET_MAC_V3_IN_LEN 40
+/* The MTU is the MTU programmed directly into the XMAC/GMAC (inclusive of
+ * EtherII, VLAN, bug16011 padding).
+ */
+#define MC_CMD_SET_MAC_V3_IN_MTU_OFST 0
+#define MC_CMD_SET_MAC_V3_IN_MTU_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_DRAIN_OFST 4
+#define MC_CMD_SET_MAC_V3_IN_DRAIN_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_ADDR_OFST 8
+#define MC_CMD_SET_MAC_V3_IN_ADDR_LEN 8
+#define MC_CMD_SET_MAC_V3_IN_ADDR_LO_OFST 8
+#define MC_CMD_SET_MAC_V3_IN_ADDR_LO_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_ADDR_LO_LBN 64
+#define MC_CMD_SET_MAC_V3_IN_ADDR_LO_WIDTH 32
+#define MC_CMD_SET_MAC_V3_IN_ADDR_HI_OFST 12
+#define MC_CMD_SET_MAC_V3_IN_ADDR_HI_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_ADDR_HI_LBN 96
+#define MC_CMD_SET_MAC_V3_IN_ADDR_HI_WIDTH 32
+#define MC_CMD_SET_MAC_V3_IN_REJECT_OFST 16
+#define MC_CMD_SET_MAC_V3_IN_REJECT_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_REJECT_UNCST_OFST 16
+#define MC_CMD_SET_MAC_V3_IN_REJECT_UNCST_LBN 0
+#define MC_CMD_SET_MAC_V3_IN_REJECT_UNCST_WIDTH 1
+#define MC_CMD_SET_MAC_V3_IN_REJECT_BRDCST_OFST 16
+#define MC_CMD_SET_MAC_V3_IN_REJECT_BRDCST_LBN 1
+#define MC_CMD_SET_MAC_V3_IN_REJECT_BRDCST_WIDTH 1
+#define MC_CMD_SET_MAC_V3_IN_FCNTL_OFST 20
+#define MC_CMD_SET_MAC_V3_IN_FCNTL_LEN 4
+/* enum: Flow control is off. */
+/* MC_CMD_FCNTL_OFF 0x0 */
+/* enum: Respond to flow control. */
+/* MC_CMD_FCNTL_RESPOND 0x1 */
+/* enum: Respond to and Issue flow control. */
+/* MC_CMD_FCNTL_BIDIR 0x2 */
+/* enum: Auto neg flow control. */
+/* MC_CMD_FCNTL_AUTO 0x3 */
+/* enum: Priority flow control (eftest builds only). */
+/* MC_CMD_FCNTL_QBB 0x4 */
+/* enum: Issue flow control. */
+/* MC_CMD_FCNTL_GENERATE 0x5 */
+#define MC_CMD_SET_MAC_V3_IN_FLAGS_OFST 24
+#define MC_CMD_SET_MAC_V3_IN_FLAGS_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_FLAG_INCLUDE_FCS_OFST 24
+#define MC_CMD_SET_MAC_V3_IN_FLAG_INCLUDE_FCS_LBN 0
+#define MC_CMD_SET_MAC_V3_IN_FLAG_INCLUDE_FCS_WIDTH 1
+/* Select which parameters to configure. A parameter will only be modified if
+ * the corresponding control flag is set. If SET_MAC_ENHANCED is not set in
+ * capabilities then this field is ignored (and all flags are assumed to be
+ * set).
+ */
+#define MC_CMD_SET_MAC_V3_IN_CONTROL_OFST 28
+#define MC_CMD_SET_MAC_V3_IN_CONTROL_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_CFG_MTU_OFST 28
+#define MC_CMD_SET_MAC_V3_IN_CFG_MTU_LBN 0
+#define MC_CMD_SET_MAC_V3_IN_CFG_MTU_WIDTH 1
+#define MC_CMD_SET_MAC_V3_IN_CFG_DRAIN_OFST 28
+#define MC_CMD_SET_MAC_V3_IN_CFG_DRAIN_LBN 1
+#define MC_CMD_SET_MAC_V3_IN_CFG_DRAIN_WIDTH 1
+#define MC_CMD_SET_MAC_V3_IN_CFG_REJECT_OFST 28
+#define MC_CMD_SET_MAC_V3_IN_CFG_REJECT_LBN 2
+#define MC_CMD_SET_MAC_V3_IN_CFG_REJECT_WIDTH 1
+#define MC_CMD_SET_MAC_V3_IN_CFG_FCNTL_OFST 28
+#define MC_CMD_SET_MAC_V3_IN_CFG_FCNTL_LBN 3
+#define MC_CMD_SET_MAC_V3_IN_CFG_FCNTL_WIDTH 1
+#define MC_CMD_SET_MAC_V3_IN_CFG_FCS_OFST 28
+#define MC_CMD_SET_MAC_V3_IN_CFG_FCS_LBN 4
+#define MC_CMD_SET_MAC_V3_IN_CFG_FCS_WIDTH 1
+/* Identifies the MAC to update by the specifying the end of a logical MAE
+ * link. Setting TARGET to MAE_LINK_ENDPOINT_COMPAT is equivalent to using the
+ * previous version of the command (MC_CMD_SET_MAC_EXT). Not all possible
+ * combinations of MPORT_END and MPORT_SELECTOR in TARGET will work in all
+ * circumstances. 1. Some will always work (e.g. a VF can always address its
+ * logical MAC using MPORT_SELECTOR=ASSIGNED,LINK_END=VNIC), 2. Some are not
+ * meaningful and will always fail with EINVAL (e.g. attempting to address the
+ * VNIC end of a link to a physical port), 3. Some are meaningful but require
+ * the MCDI client to have the required permission and fail with EPERM
+ * otherwise (e.g. trying to set the MAC on a VF the caller cannot administer),
+ * and 4. Some could be implementation-specific and fail with ENOTSUP if not
+ * available (no examples exist right now). See SF-123581-TC section 4.3 for
+ * more details.
+ */
+#define MC_CMD_SET_MAC_V3_IN_TARGET_OFST 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_LEN 8
+#define MC_CMD_SET_MAC_V3_IN_TARGET_LO_OFST 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_LO_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_LO_LBN 256
+#define MC_CMD_SET_MAC_V3_IN_TARGET_LO_WIDTH 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_HI_OFST 36
+#define MC_CMD_SET_MAC_V3_IN_TARGET_HI_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_HI_LBN 288
+#define MC_CMD_SET_MAC_V3_IN_TARGET_HI_WIDTH 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_OFST 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FLAT_OFST 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FLAT_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_TYPE_OFST 35
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_TYPE_LEN 1
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_MPORT_ID_OFST 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_MPORT_ID_LEN 3
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_PPORT_ID_LBN 256
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_PPORT_ID_WIDTH 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_LBN 276
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_WIDTH 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_LBN 272
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_WIDTH 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FUNC_PF_ID_OFST 34
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FUNC_PF_ID_LEN 1
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FUNC_VF_ID_OFST 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FUNC_VF_ID_LEN 2
+#define MC_CMD_SET_MAC_V3_IN_TARGET_LINK_END_OFST 36
+#define MC_CMD_SET_MAC_V3_IN_TARGET_LINK_END_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_OFST 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_LEN 8
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_LO_OFST 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_LO_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_LO_LBN 256
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_LO_WIDTH 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_HI_OFST 36
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_HI_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_HI_LBN 288
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_HI_WIDTH 32
+
/* MC_CMD_SET_MAC_OUT msgresponse */
#define MC_CMD_SET_MAC_OUT_LEN 0
@@ -4839,6 +5764,7 @@
* Returns: 0, ETIME
*/
#define MC_CMD_PHY_STATS 0x2d
+#define MC_CMD_PHY_STATS_MSGSET 0x2d
#undef MC_CMD_0x2d_PRIVILEGE_CTG
#define MC_CMD_0x2d_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -4849,7 +5775,13 @@
#define MC_CMD_PHY_STATS_IN_DMA_ADDR_OFST 0
#define MC_CMD_PHY_STATS_IN_DMA_ADDR_LEN 8
#define MC_CMD_PHY_STATS_IN_DMA_ADDR_LO_OFST 0
+#define MC_CMD_PHY_STATS_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_PHY_STATS_IN_DMA_ADDR_LO_LBN 0
+#define MC_CMD_PHY_STATS_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_PHY_STATS_IN_DMA_ADDR_HI_OFST 4
+#define MC_CMD_PHY_STATS_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_PHY_STATS_IN_DMA_ADDR_HI_LBN 32
+#define MC_CMD_PHY_STATS_IN_DMA_ADDR_HI_WIDTH 32
/* MC_CMD_PHY_STATS_OUT_DMA msgresponse */
#define MC_CMD_PHY_STATS_OUT_DMA_LEN 0
@@ -4921,6 +5853,7 @@
* effect. Returns: 0, ETIME
*/
#define MC_CMD_MAC_STATS 0x2e
+#define MC_CMD_MAC_STATS_MSGSET 0x2e
#undef MC_CMD_0x2e_PRIVILEGE_CTG
#define MC_CMD_0x2e_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -4931,7 +5864,13 @@
#define MC_CMD_MAC_STATS_IN_DMA_ADDR_OFST 0
#define MC_CMD_MAC_STATS_IN_DMA_ADDR_LEN 8
#define MC_CMD_MAC_STATS_IN_DMA_ADDR_LO_OFST 0
+#define MC_CMD_MAC_STATS_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_MAC_STATS_IN_DMA_ADDR_LO_LBN 0
+#define MC_CMD_MAC_STATS_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_MAC_STATS_IN_DMA_ADDR_HI_OFST 4
+#define MC_CMD_MAC_STATS_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_MAC_STATS_IN_DMA_ADDR_HI_LBN 32
+#define MC_CMD_MAC_STATS_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_MAC_STATS_IN_CMD_OFST 8
#define MC_CMD_MAC_STATS_IN_CMD_LEN 4
#define MC_CMD_MAC_STATS_IN_DMA_OFST 8
@@ -4974,7 +5913,13 @@
#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_OFST 0
#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_LEN 8
#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_LO_OFST 0
+#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_LO_LEN 4
+#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_LO_LBN 0
+#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_LO_WIDTH 32
#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_HI_OFST 4
+#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_HI_LEN 4
+#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_HI_LBN 32
+#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_HI_WIDTH 32
#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS
#define MC_CMD_MAC_GENERATION_START 0x0 /* enum */
#define MC_CMD_MAC_DMABUF_START 0x1 /* enum */
@@ -5130,7 +6075,13 @@
#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_OFST 0
#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_LEN 8
#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_LO_OFST 0
+#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_LO_LEN 4
+#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_LO_LBN 0
+#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_LO_WIDTH 32
#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_HI_OFST 4
+#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_HI_LEN 4
+#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_HI_LBN 32
+#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_HI_WIDTH 32
#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS_V2
/* enum: Start of FEC stats buffer space, Medford2 and up */
#define MC_CMD_MAC_FEC_DMABUF_START 0x61
@@ -5163,7 +6114,13 @@
#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_OFST 0
#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_LEN 8
#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_LO_OFST 0
+#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_LO_LEN 4
+#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_LO_LBN 0
+#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_LO_WIDTH 32
#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_HI_OFST 4
+#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_HI_LEN 4
+#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_HI_LBN 32
+#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_HI_WIDTH 32
#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS_V3
/* enum: Start of CTPIO stats buffer space, Medford2 and up */
#define MC_CMD_MAC_CTPIO_DMABUF_START 0x68
@@ -5237,7 +6194,13 @@
#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_OFST 0
#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_LEN 8
#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_LO_OFST 0
+#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_LO_LEN 4
+#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_LO_LBN 0
+#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_LO_WIDTH 32
#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_HI_OFST 4
+#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_HI_LEN 4
+#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_HI_LBN 32
+#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_HI_WIDTH 32
#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS_V4
/* enum: Start of V4 stats buffer space */
#define MC_CMD_MAC_V4_DMABUF_START 0x79
@@ -5266,6 +6229,7 @@
* to be documented
*/
#define MC_CMD_SRIOV 0x30
+#define MC_CMD_SRIOV_MSGSET 0x30
/* MC_CMD_SRIOV_IN msgrequest */
#define MC_CMD_SRIOV_IN_LEN 12
@@ -5297,7 +6261,13 @@
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_OFST 8
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LEN 8
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LO_OFST 8
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LO_LEN 4
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LO_LBN 64
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LO_WIDTH 32
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_HI_OFST 12
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_HI_LEN 4
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_HI_LBN 96
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_HI_WIDTH 32
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LBN 64
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_WIDTH 64
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_RID_OFST 16
@@ -5308,7 +6278,13 @@
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_OFST 20
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LEN 8
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LO_OFST 20
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LO_LEN 4
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LO_LBN 160
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LO_WIDTH 32
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_HI_OFST 24
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_HI_LEN 4
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_HI_LBN 192
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_HI_WIDTH 32
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LBN 160
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_WIDTH 64
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_LENGTH_OFST 28
@@ -5338,6 +6314,7 @@
* Returns: 0, EINVAL (invalid RID)
*/
#define MC_CMD_MEMCPY 0x31
+#define MC_CMD_MEMCPY_MSGSET 0x31
/* MC_CMD_MEMCPY_IN msgrequest */
#define MC_CMD_MEMCPY_IN_LENMIN 32
@@ -5361,6 +6338,7 @@
* Set a WoL filter.
*/
#define MC_CMD_WOL_FILTER_SET 0x32
+#define MC_CMD_WOL_FILTER_SET_MSGSET 0x32
#undef MC_CMD_0x32_PRIVILEGE_CTG
#define MC_CMD_0x32_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -5401,7 +6379,13 @@
#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_OFST 8
#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_LEN 8
#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_LO_OFST 8
+#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_LO_LEN 4
+#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_LO_LBN 64
+#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_LO_WIDTH 32
#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_HI_OFST 12
+#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_HI_LEN 4
+#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_HI_LBN 96
+#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_HI_WIDTH 32
/* MC_CMD_WOL_FILTER_SET_IN_IPV4_SYN msgrequest */
#define MC_CMD_WOL_FILTER_SET_IN_IPV4_SYN_LEN 20
@@ -5476,6 +6460,7 @@
* Remove a WoL filter. Locks required: None. Returns: 0, EINVAL, ENOSYS
*/
#define MC_CMD_WOL_FILTER_REMOVE 0x33
+#define MC_CMD_WOL_FILTER_REMOVE_MSGSET 0x33
#undef MC_CMD_0x33_PRIVILEGE_CTG
#define MC_CMD_0x33_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -5495,6 +6480,7 @@
* ENOSYS
*/
#define MC_CMD_WOL_FILTER_RESET 0x34
+#define MC_CMD_WOL_FILTER_RESET_MSGSET 0x34
#undef MC_CMD_0x34_PRIVILEGE_CTG
#define MC_CMD_0x34_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -5515,6 +6501,7 @@
* Set the MCAST hash value without otherwise reconfiguring the MAC
*/
#define MC_CMD_SET_MCAST_HASH 0x35
+#define MC_CMD_SET_MCAST_HASH_MSGSET 0x35
/* MC_CMD_SET_MCAST_HASH_IN msgrequest */
#define MC_CMD_SET_MCAST_HASH_IN_LEN 32
@@ -5533,6 +6520,7 @@
* Locks required: none. Returns: 0
*/
#define MC_CMD_NVRAM_TYPES 0x36
+#define MC_CMD_NVRAM_TYPES_MSGSET 0x36
#undef MC_CMD_0x36_PRIVILEGE_CTG
#define MC_CMD_0x36_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -5595,6 +6583,7 @@
* EINVAL (bad type).
*/
#define MC_CMD_NVRAM_INFO 0x37
+#define MC_CMD_NVRAM_INFO_MSGSET 0x37
#undef MC_CMD_0x37_PRIVILEGE_CTG
#define MC_CMD_0x37_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -5692,6 +6681,7 @@
* EPERM.
*/
#define MC_CMD_NVRAM_UPDATE_START 0x38
+#define MC_CMD_NVRAM_UPDATE_START_MSGSET 0x38
#undef MC_CMD_0x38_PRIVILEGE_CTG
#define MC_CMD_0x38_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -5732,6 +6722,7 @@
* PHY_LOCK required and not held)
*/
#define MC_CMD_NVRAM_READ 0x39
+#define MC_CMD_NVRAM_READ_MSGSET 0x39
#undef MC_CMD_0x39_PRIVILEGE_CTG
#define MC_CMD_0x39_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -5803,6 +6794,7 @@
* PHY_LOCK required and not held)
*/
#define MC_CMD_NVRAM_WRITE 0x3a
+#define MC_CMD_NVRAM_WRITE_MSGSET 0x3a
#undef MC_CMD_0x3a_PRIVILEGE_CTG
#define MC_CMD_0x3a_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -5838,6 +6830,7 @@
* PHY_LOCK required and not held)
*/
#define MC_CMD_NVRAM_ERASE 0x3b
+#define MC_CMD_NVRAM_ERASE_MSGSET 0x3b
#undef MC_CMD_0x3b_PRIVILEGE_CTG
#define MC_CMD_0x3b_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -5868,6 +6861,7 @@
* the error EPERM.
*/
#define MC_CMD_NVRAM_UPDATE_FINISH 0x3c
+#define MC_CMD_NVRAM_UPDATE_FINISH_MSGSET 0x3c
#undef MC_CMD_0x3c_PRIVILEGE_CTG
#define MC_CMD_0x3c_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -5906,6 +6900,9 @@
#define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_POLL_VERIFY_RESULT_OFST 8
#define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_POLL_VERIFY_RESULT_LBN 2
#define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_POLL_VERIFY_RESULT_WIDTH 1
+#define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_ABORT_OFST 8
+#define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_ABORT_LBN 3
+#define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_ABORT_WIDTH 1
/* MC_CMD_NVRAM_UPDATE_FINISH_OUT msgresponse: Legacy NVRAM_UPDATE_FINISH
* response. Use NVRAM_UPDATE_FINISH_V2_OUT in new code
@@ -6036,6 +7033,7 @@
* DATALEN=0
*/
#define MC_CMD_REBOOT 0x3d
+#define MC_CMD_REBOOT_MSGSET 0x3d
#undef MC_CMD_0x3d_PRIVILEGE_CTG
#define MC_CMD_0x3d_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -6057,6 +7055,7 @@
* thread address.
*/
#define MC_CMD_SCHEDINFO 0x3e
+#define MC_CMD_SCHEDINFO_MSGSET 0x3e
#undef MC_CMD_0x3e_PRIVILEGE_CTG
#define MC_CMD_0x3e_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -6083,6 +7082,7 @@
* mode to the specified value. Returns the old mode.
*/
#define MC_CMD_REBOOT_MODE 0x3f
+#define MC_CMD_REBOOT_MODE_MSGSET 0x3f
#undef MC_CMD_0x3f_PRIVILEGE_CTG
#define MC_CMD_0x3f_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -6141,6 +7141,7 @@
* Locks required: None Returns: 0
*/
#define MC_CMD_SENSOR_INFO 0x41
+#define MC_CMD_SENSOR_INFO_MSGSET 0x41
#undef MC_CMD_0x41_PRIVILEGE_CTG
#define MC_CMD_0x41_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -6380,7 +7381,13 @@
#define MC_CMD_SENSOR_ENTRY_OFST 4
#define MC_CMD_SENSOR_ENTRY_LEN 8
#define MC_CMD_SENSOR_ENTRY_LO_OFST 4
+#define MC_CMD_SENSOR_ENTRY_LO_LEN 4
+#define MC_CMD_SENSOR_ENTRY_LO_LBN 32
+#define MC_CMD_SENSOR_ENTRY_LO_WIDTH 32
#define MC_CMD_SENSOR_ENTRY_HI_OFST 8
+#define MC_CMD_SENSOR_ENTRY_HI_LEN 4
+#define MC_CMD_SENSOR_ENTRY_HI_LBN 64
+#define MC_CMD_SENSOR_ENTRY_HI_WIDTH 32
#define MC_CMD_SENSOR_ENTRY_MINNUM 0
#define MC_CMD_SENSOR_ENTRY_MAXNUM 31
#define MC_CMD_SENSOR_ENTRY_MAXNUM_MCDI2 127
@@ -6402,7 +7409,13 @@
/* MC_CMD_SENSOR_ENTRY_OFST 4 */
/* MC_CMD_SENSOR_ENTRY_LEN 8 */
/* MC_CMD_SENSOR_ENTRY_LO_OFST 4 */
+/* MC_CMD_SENSOR_ENTRY_LO_LEN 4 */
+/* MC_CMD_SENSOR_ENTRY_LO_LBN 32 */
+/* MC_CMD_SENSOR_ENTRY_LO_WIDTH 32 */
/* MC_CMD_SENSOR_ENTRY_HI_OFST 8 */
+/* MC_CMD_SENSOR_ENTRY_HI_LEN 4 */
+/* MC_CMD_SENSOR_ENTRY_HI_LBN 64 */
+/* MC_CMD_SENSOR_ENTRY_HI_WIDTH 32 */
/* MC_CMD_SENSOR_ENTRY_MINNUM 0 */
/* MC_CMD_SENSOR_ENTRY_MAXNUM 31 */
/* MC_CMD_SENSOR_ENTRY_MAXNUM_MCDI2 127 */
@@ -6445,6 +7458,7 @@
* STATE_WARNING. Otherwise the board should not be expected to function.
*/
#define MC_CMD_READ_SENSORS 0x42
+#define MC_CMD_READ_SENSORS_MSGSET 0x42
#undef MC_CMD_0x42_PRIVILEGE_CTG
#define MC_CMD_0x42_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -6459,7 +7473,13 @@
#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_OFST 0
#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_LEN 8
#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_LO_OFST 0
+#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_LO_LBN 0
+#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_HI_OFST 4
+#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_HI_LBN 32
+#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_HI_WIDTH 32
/* MC_CMD_READ_SENSORS_EXT_IN msgrequest */
#define MC_CMD_READ_SENSORS_EXT_IN_LEN 12
@@ -6471,7 +7491,13 @@
#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_OFST 0
#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_LEN 8
#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_LO_OFST 0
+#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_LO_LBN 0
+#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_HI_OFST 4
+#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_HI_LBN 32
+#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_HI_WIDTH 32
/* Size in bytes of host buffer. */
#define MC_CMD_READ_SENSORS_EXT_IN_LENGTH_OFST 8
#define MC_CMD_READ_SENSORS_EXT_IN_LENGTH_LEN 4
@@ -6486,7 +7512,13 @@
#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_OFST 0
#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_LEN 8
#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_LO_OFST 0
+#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_LO_LEN 4
+#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_LO_LBN 0
+#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_HI_OFST 4
+#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_HI_LEN 4
+#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_HI_LBN 32
+#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_HI_WIDTH 32
/* Size in bytes of host buffer. */
#define MC_CMD_READ_SENSORS_EXT_IN_V2_LENGTH_OFST 8
#define MC_CMD_READ_SENSORS_EXT_IN_V2_LENGTH_LEN 4
@@ -6540,6 +7572,7 @@
* code: 0
*/
#define MC_CMD_GET_PHY_STATE 0x43
+#define MC_CMD_GET_PHY_STATE_MSGSET 0x43
#undef MC_CMD_0x43_PRIVILEGE_CTG
#define MC_CMD_0x43_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -6563,6 +7596,7 @@
* disable 802.Qbb for a given priority.
*/
#define MC_CMD_SETUP_8021QBB 0x44
+#define MC_CMD_SETUP_8021QBB_MSGSET 0x44
/* MC_CMD_SETUP_8021QBB_IN msgrequest */
#define MC_CMD_SETUP_8021QBB_IN_LEN 32
@@ -6578,6 +7612,7 @@
* Retrieve ID of any WoL filters. Locks required: None. Returns: 0, ENOSYS
*/
#define MC_CMD_WOL_FILTER_GET 0x45
+#define MC_CMD_WOL_FILTER_GET_MSGSET 0x45
#undef MC_CMD_0x45_PRIVILEGE_CTG
#define MC_CMD_0x45_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -6597,6 +7632,7 @@
* Returns: 0, ENOSYS
*/
#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD 0x46
+#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_MSGSET 0x46
#undef MC_CMD_0x46_PRIVILEGE_CTG
#define MC_CMD_0x46_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -6649,6 +7685,7 @@
* None. Returns: 0, ENOSYS
*/
#define MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD 0x47
+#define MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_MSGSET 0x47
#undef MC_CMD_0x47_PRIVILEGE_CTG
#define MC_CMD_0x47_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -6669,6 +7706,7 @@
* Restore MAC after block reset. Locks required: None. Returns: 0.
*/
#define MC_CMD_MAC_RESET_RESTORE 0x48
+#define MC_CMD_MAC_RESET_RESTORE_MSGSET 0x48
/* MC_CMD_MAC_RESET_RESTORE_IN msgrequest */
#define MC_CMD_MAC_RESET_RESTORE_IN_LEN 0
@@ -6684,6 +7722,7 @@
* required: None Returns: 0
*/
#define MC_CMD_TESTASSERT 0x49
+#define MC_CMD_TESTASSERT_MSGSET 0x49
#undef MC_CMD_0x49_PRIVILEGE_CTG
#define MC_CMD_0x49_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -6727,6 +7766,7 @@
* basis. Locks required: None. Returns: 0, EINVAL .
*/
#define MC_CMD_WORKAROUND 0x4a
+#define MC_CMD_WORKAROUND_MSGSET 0x4a
#undef MC_CMD_0x4a_PRIVILEGE_CTG
#define MC_CMD_0x4a_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -6790,6 +7830,7 @@
* Anything else: currently undefined. Locks required: None. Return code: 0.
*/
#define MC_CMD_GET_PHY_MEDIA_INFO 0x4b
+#define MC_CMD_GET_PHY_MEDIA_INFO_MSGSET 0x4b
#undef MC_CMD_0x4b_PRIVILEGE_CTG
#define MC_CMD_0x4b_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -6821,6 +7862,7 @@
* on the type of partition).
*/
#define MC_CMD_NVRAM_TEST 0x4c
+#define MC_CMD_NVRAM_TEST_MSGSET 0x4c
#undef MC_CMD_0x4c_PRIVILEGE_CTG
#define MC_CMD_0x4c_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -6851,6 +7893,7 @@
* they are configured first. Locks required: None. Return code: 0, EINVAL.
*/
#define MC_CMD_MRSFP_TWEAK 0x4d
+#define MC_CMD_MRSFP_TWEAK_MSGSET 0x4d
/* MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG msgrequest */
#define MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_LEN 16
@@ -6894,6 +7937,7 @@
* of range.
*/
#define MC_CMD_SENSOR_SET_LIMS 0x4e
+#define MC_CMD_SENSOR_SET_LIMS_MSGSET 0x4e
#undef MC_CMD_0x4e_PRIVILEGE_CTG
#define MC_CMD_0x4e_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -6925,6 +7969,7 @@
/* MC_CMD_GET_RESOURCE_LIMITS
*/
#define MC_CMD_GET_RESOURCE_LIMITS 0x4f
+#define MC_CMD_GET_RESOURCE_LIMITS_MSGSET 0x4f
/* MC_CMD_GET_RESOURCE_LIMITS_IN msgrequest */
#define MC_CMD_GET_RESOURCE_LIMITS_IN_LEN 0
@@ -6947,6 +7992,7 @@
* none. Returns: 0, EINVAL (bad type).
*/
#define MC_CMD_NVRAM_PARTITIONS 0x51
+#define MC_CMD_NVRAM_PARTITIONS_MSGSET 0x51
#undef MC_CMD_0x51_PRIVILEGE_CTG
#define MC_CMD_0x51_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -6977,6 +8023,7 @@
* none. Returns: 0, EINVAL (bad type).
*/
#define MC_CMD_NVRAM_METADATA 0x52
+#define MC_CMD_NVRAM_METADATA_MSGSET 0x52
#undef MC_CMD_0x52_PRIVILEGE_CTG
#define MC_CMD_0x52_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -7035,6 +8082,7 @@
* Returns the base MAC, count and stride for the requesting function
*/
#define MC_CMD_GET_MAC_ADDRESSES 0x55
+#define MC_CMD_GET_MAC_ADDRESSES_MSGSET 0x55
#undef MC_CMD_0x55_PRIVILEGE_CTG
#define MC_CMD_0x55_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -7066,6 +8114,7 @@
* SF-120509-TC and SF-117282-PS.
*/
#define MC_CMD_CLP 0x56
+#define MC_CMD_CLP_MSGSET 0x56
#undef MC_CMD_0x56_PRIVILEGE_CTG
#define MC_CMD_0x56_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -7188,6 +8237,7 @@
* Perform a MUM operation
*/
#define MC_CMD_MUM 0x57
+#define MC_CMD_MUM_MSGSET 0x57
#undef MC_CMD_0x57_PRIVILEGE_CTG
#define MC_CMD_0x57_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -7604,7 +8654,13 @@
#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_OFST 4
#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_LEN 8
#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_LO_OFST 4
+#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_LO_LEN 4
+#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_LO_LBN 32
+#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_LO_WIDTH 32
#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_HI_OFST 8
+#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_HI_LEN 4
+#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_HI_LBN 64
+#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_HI_WIDTH 32
/* MC_CMD_MUM_OUT_RAW_CMD msgresponse */
#define MC_CMD_MUM_OUT_RAW_CMD_LENMIN 1
@@ -7789,7 +8845,13 @@
#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_OFST 8
#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_LEN 8
#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_LO_OFST 8
+#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_LO_LEN 4
+#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_LO_LBN 64
+#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_LO_WIDTH 32
#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_HI_OFST 12
+#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_HI_LEN 4
+#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_HI_LBN 96
+#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_HI_WIDTH 32
#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_MINNUM 2
#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_MAXNUM 30
#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_MAXNUM_MCDI2 126
@@ -7986,6 +9048,7 @@
* sensor_query SPHINX service.
*/
#define MC_CMD_DYNAMIC_SENSORS_LIST 0x66
+#define MC_CMD_DYNAMIC_SENSORS_LIST_MSGSET 0x66
#undef MC_CMD_0x66_PRIVILEGE_CTG
#define MC_CMD_0x66_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -8031,6 +9094,7 @@
* `get_descriptions` in the sensor_query SPHINX service.
*/
#define MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS 0x67
+#define MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_MSGSET 0x67
#undef MC_CMD_0x67_PRIVILEGE_CTG
#define MC_CMD_0x67_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -8080,6 +9144,7 @@
* in the sensor_query SPHINX service.
*/
#define MC_CMD_DYNAMIC_SENSORS_GET_READINGS 0x68
+#define MC_CMD_DYNAMIC_SENSORS_GET_READINGS_MSGSET 0x68
#undef MC_CMD_0x68_PRIVILEGE_CTG
#define MC_CMD_0x68_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -8117,6 +9182,7 @@
* receive (Riverhead).
*/
#define MC_CMD_EVENT_CTRL 0x69
+#define MC_CMD_EVENT_CTRL_MSGSET 0x69
#undef MC_CMD_0x69_PRIVILEGE_CTG
#define MC_CMD_0x69_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -8197,7 +9263,13 @@
#define BUFTBL_ENTRY_RAWADDR_OFST 4
#define BUFTBL_ENTRY_RAWADDR_LEN 8
#define BUFTBL_ENTRY_RAWADDR_LO_OFST 4
+#define BUFTBL_ENTRY_RAWADDR_LO_LEN 4
+#define BUFTBL_ENTRY_RAWADDR_LO_LBN 32
+#define BUFTBL_ENTRY_RAWADDR_LO_WIDTH 32
#define BUFTBL_ENTRY_RAWADDR_HI_OFST 8
+#define BUFTBL_ENTRY_RAWADDR_HI_LEN 4
+#define BUFTBL_ENTRY_RAWADDR_HI_LBN 64
+#define BUFTBL_ENTRY_RAWADDR_HI_WIDTH 32
#define BUFTBL_ENTRY_RAWADDR_LBN 32
#define BUFTBL_ENTRY_RAWADDR_WIDTH 64
@@ -8207,14 +9279,25 @@
#define NVRAM_PARTITION_TYPE_ID_LEN 2
/* enum: Primary MC firmware partition */
#define NVRAM_PARTITION_TYPE_MC_FIRMWARE 0x100
+/* enum: NMC firmware partition (this is intentionally an alias of MC_FIRMWARE)
+ */
+#define NVRAM_PARTITION_TYPE_NMC_FIRMWARE 0x100
/* enum: Secondary MC firmware partition */
#define NVRAM_PARTITION_TYPE_MC_FIRMWARE_BACKUP 0x200
/* enum: Expansion ROM partition */
#define NVRAM_PARTITION_TYPE_EXPANSION_ROM 0x300
/* enum: Static configuration TLV partition */
#define NVRAM_PARTITION_TYPE_STATIC_CONFIG 0x400
+/* enum: Factory configuration TLV partition (this is intentionally an alias of
+ * STATIC_CONFIG)
+ */
+#define NVRAM_PARTITION_TYPE_FACTORY_CONFIG 0x400
/* enum: Dynamic configuration TLV partition */
#define NVRAM_PARTITION_TYPE_DYNAMIC_CONFIG 0x500
+/* enum: User configuration TLV partition (this is intentionally an alias of
+ * DYNAMIC_CONFIG)
+ */
+#define NVRAM_PARTITION_TYPE_USER_CONFIG 0x500
/* enum: Expansion ROM configuration data for port 0 */
#define NVRAM_PARTITION_TYPE_EXPROM_CONFIG_PORT0 0x600
/* enum: Synonym for EXPROM_CONFIG_PORT0 as used in pmap files */
@@ -8227,10 +9310,16 @@
#define NVRAM_PARTITION_TYPE_EXPROM_CONFIG_PORT3 0x603
/* enum: Non-volatile log output partition */
#define NVRAM_PARTITION_TYPE_LOG 0x700
+/* enum: Non-volatile log output partition for NMC firmware (this is
+ * intentionally an alias of LOG)
+ */
+#define NVRAM_PARTITION_TYPE_NMC_LOG 0x700
/* enum: Non-volatile log output of second core on dual-core device */
#define NVRAM_PARTITION_TYPE_LOG_SLAVE 0x701
/* enum: Device state dump output partition */
#define NVRAM_PARTITION_TYPE_DUMP 0x800
+/* enum: Crash log partition for NMC firmware */
+#define NVRAM_PARTITION_TYPE_NMC_CRASH_LOG 0x801
/* enum: Application license key storage partition */
#define NVRAM_PARTITION_TYPE_LICENSE 0x900
/* enum: Start of range used for PHY partitions (low 8 bits are the PHY ID) */
@@ -8247,6 +9336,20 @@
#define NVRAM_PARTITION_TYPE_FC_LICENSE 0xb03
/* enum: Non-volatile log output partition for FC */
#define NVRAM_PARTITION_TYPE_FC_LOG 0xb04
+/* enum: FPGA Stage 1 bitstream */
+#define NVRAM_PARTITION_TYPE_FPGA_STAGE1 0xb05
+/* enum: FPGA Stage 2 bitstream */
+#define NVRAM_PARTITION_TYPE_FPGA_STAGE2 0xb06
+/* enum: FPGA User XCLBIN / Programmable Region 0 bitstream */
+#define NVRAM_PARTITION_TYPE_FPGA_REGION0 0xb07
+/* enum: FPGA User XCLBIN (this is intentionally an alias of FPGA_REGION0) */
+#define NVRAM_PARTITION_TYPE_FPGA_XCLBIN_USER 0xb07
+/* enum: FPGA jump instruction (a.k.a. boot) partition to select Stage1
+ * bitstream
+ */
+#define NVRAM_PARTITION_TYPE_FPGA_JUMP 0xb08
+/* enum: FPGA Validate XCLBIN */
+#define NVRAM_PARTITION_TYPE_FPGA_XCLBIN_VALIDATE 0xb09
/* enum: MUM firmware partition */
#define NVRAM_PARTITION_TYPE_MUM_FIRMWARE 0xc00
/* enum: SUC firmware partition (this is intentionally an alias of
@@ -8255,6 +9358,10 @@
#define NVRAM_PARTITION_TYPE_SUC_FIRMWARE 0xc00
/* enum: MUM Non-volatile log output partition. */
#define NVRAM_PARTITION_TYPE_MUM_LOG 0xc01
+/* enum: SUC Non-volatile log output partition (this is intentionally an alias
+ * of MUM_LOG).
+ */
+#define NVRAM_PARTITION_TYPE_SUC_LOG 0xc01
/* enum: MUM Application table partition. */
#define NVRAM_PARTITION_TYPE_MUM_APPTABLE 0xc02
/* enum: MUM boot rom partition. */
@@ -8269,6 +9376,10 @@
#define NVRAM_PARTITION_TYPE_EXPANSION_UEFI 0xd00
/* enum: Used by the expansion ROM for logging */
#define NVRAM_PARTITION_TYPE_PXE_LOG 0x1000
+/* enum: Non-volatile log output partition for Expansion ROM (this is
+ * intentionally an alias of PXE_LOG).
+ */
+#define NVRAM_PARTITION_TYPE_EXPROM_LOG 0x1000
/* enum: Used for XIP code of shmbooted images */
#define NVRAM_PARTITION_TYPE_XIP_SCRATCH 0x1100
/* enum: Spare partition 2 */
@@ -8277,6 +9388,10 @@
* between XJTAG and Manftest.
*/
#define NVRAM_PARTITION_TYPE_MANUFACTURING 0x1300
+/* enum: Deployment configuration TLV partition (this is intentionally an alias
+ * of MANUFACTURING)
+ */
+#define NVRAM_PARTITION_TYPE_DEPLOYMENT_CONFIG 0x1300
/* enum: Spare partition 4 */
#define NVRAM_PARTITION_TYPE_SPARE_4 0x1400
/* enum: Spare partition 5 */
@@ -8312,14 +9427,43 @@
#define NVRAM_PARTITION_TYPE_BUNDLE_LOG 0x1e02
/* enum: Partition for Solarflare gPXE bootrom installed via Bundle update. */
#define NVRAM_PARTITION_TYPE_EXPANSION_ROM_INTERNAL 0x1e03
+/* enum: Test partition on SmartNIC system microcontroller (SUC) */
+#define NVRAM_PARTITION_TYPE_SUC_TEST 0x1f00
+/* enum: System microcontroller access to primary FPGA flash. */
+#define NVRAM_PARTITION_TYPE_SUC_FPGA_PRIMARY 0x1f01
+/* enum: System microcontroller access to secondary FPGA flash (if present) */
+#define NVRAM_PARTITION_TYPE_SUC_FPGA_SECONDARY 0x1f02
+/* enum: System microcontroller access to primary System-on-Chip flash */
+#define NVRAM_PARTITION_TYPE_SUC_SOC_PRIMARY 0x1f03
+/* enum: System microcontroller access to secondary System-on-Chip flash (if
+ * present)
+ */
+#define NVRAM_PARTITION_TYPE_SUC_SOC_SECONDARY 0x1f04
+/* enum: System microcontroller critical failure logs. Contains structured
+ * details of sensors leading up to a critical failure (where the board is shut
+ * down).
+ */
+#define NVRAM_PARTITION_TYPE_SUC_FAILURE_LOG 0x1f05
+/* enum: System-on-Chip configuration information (see XN-200467-PS). */
+#define NVRAM_PARTITION_TYPE_SUC_SOC_CONFIG 0x1f07
+/* enum: System-on-Chip update information. */
+#define NVRAM_PARTITION_TYPE_SOC_UPDATE 0x2003
/* enum: Start of reserved value range (firmware may use for any purpose) */
#define NVRAM_PARTITION_TYPE_RESERVED_VALUES_MIN 0xff00
/* enum: End of reserved value range (firmware may use for any purpose) */
#define NVRAM_PARTITION_TYPE_RESERVED_VALUES_MAX 0xfffd
/* enum: Recovery partition map (provided if real map is missing or corrupt) */
#define NVRAM_PARTITION_TYPE_RECOVERY_MAP 0xfffe
+/* enum: Recovery Flash Partition Table, see SF-122606-TC. (this is
+ * intentionally an alias of RECOVERY_MAP)
+ */
+#define NVRAM_PARTITION_TYPE_RECOVERY_FPT 0xfffe
/* enum: Partition map (real map as stored in flash) */
#define NVRAM_PARTITION_TYPE_PARTITION_MAP 0xffff
+/* enum: Flash Partition Table, see SF-122606-TC. (this is intentionally an
+ * alias of PARTITION_MAP)
+ */
+#define NVRAM_PARTITION_TYPE_FPT 0xffff
#define NVRAM_PARTITION_TYPE_ID_LBN 0
#define NVRAM_PARTITION_TYPE_ID_WIDTH 16
@@ -8368,7 +9512,13 @@
#define LICENSED_FEATURES_MASK_OFST 0
#define LICENSED_FEATURES_MASK_LEN 8
#define LICENSED_FEATURES_MASK_LO_OFST 0
+#define LICENSED_FEATURES_MASK_LO_LEN 4
+#define LICENSED_FEATURES_MASK_LO_LBN 0
+#define LICENSED_FEATURES_MASK_LO_WIDTH 32
#define LICENSED_FEATURES_MASK_HI_OFST 4
+#define LICENSED_FEATURES_MASK_HI_LEN 4
+#define LICENSED_FEATURES_MASK_HI_LBN 32
+#define LICENSED_FEATURES_MASK_HI_WIDTH 32
#define LICENSED_FEATURES_RX_CUT_THROUGH_OFST 0
#define LICENSED_FEATURES_RX_CUT_THROUGH_LBN 0
#define LICENSED_FEATURES_RX_CUT_THROUGH_WIDTH 1
@@ -8408,7 +9558,13 @@
#define LICENSED_V3_APPS_MASK_OFST 0
#define LICENSED_V3_APPS_MASK_LEN 8
#define LICENSED_V3_APPS_MASK_LO_OFST 0
+#define LICENSED_V3_APPS_MASK_LO_LEN 4
+#define LICENSED_V3_APPS_MASK_LO_LBN 0
+#define LICENSED_V3_APPS_MASK_LO_WIDTH 32
#define LICENSED_V3_APPS_MASK_HI_OFST 4
+#define LICENSED_V3_APPS_MASK_HI_LEN 4
+#define LICENSED_V3_APPS_MASK_HI_LBN 32
+#define LICENSED_V3_APPS_MASK_HI_WIDTH 32
#define LICENSED_V3_APPS_ONLOAD_OFST 0
#define LICENSED_V3_APPS_ONLOAD_LBN 0
#define LICENSED_V3_APPS_ONLOAD_WIDTH 1
@@ -8466,7 +9622,13 @@
#define LICENSED_V3_FEATURES_MASK_OFST 0
#define LICENSED_V3_FEATURES_MASK_LEN 8
#define LICENSED_V3_FEATURES_MASK_LO_OFST 0
+#define LICENSED_V3_FEATURES_MASK_LO_LEN 4
+#define LICENSED_V3_FEATURES_MASK_LO_LBN 0
+#define LICENSED_V3_FEATURES_MASK_LO_WIDTH 32
#define LICENSED_V3_FEATURES_MASK_HI_OFST 4
+#define LICENSED_V3_FEATURES_MASK_HI_LEN 4
+#define LICENSED_V3_FEATURES_MASK_HI_LBN 32
+#define LICENSED_V3_FEATURES_MASK_HI_WIDTH 32
#define LICENSED_V3_FEATURES_RX_CUT_THROUGH_OFST 0
#define LICENSED_V3_FEATURES_RX_CUT_THROUGH_LBN 0
#define LICENSED_V3_FEATURES_RX_CUT_THROUGH_WIDTH 1
@@ -8617,6 +9779,7 @@
* Get a dump of the MCPU registers
*/
#define MC_CMD_READ_REGS 0x50
+#define MC_CMD_READ_REGS_MSGSET 0x50
#undef MC_CMD_0x50_PRIVILEGE_CTG
#define MC_CMD_0x50_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -8643,6 +9806,7 @@
* end with an address for each 4k of host memory required to back the EVQ.
*/
#define MC_CMD_INIT_EVQ 0x80
+#define MC_CMD_INIT_EVQ_MSGSET 0x80
#undef MC_CMD_0x80_PRIVILEGE_CTG
#define MC_CMD_0x80_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -8657,7 +9821,8 @@
#define MC_CMD_INIT_EVQ_IN_SIZE_OFST 0
#define MC_CMD_INIT_EVQ_IN_SIZE_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_EVQ_IN_INSTANCE_OFST 4
#define MC_CMD_INIT_EVQ_IN_INSTANCE_LEN 4
@@ -8729,7 +9894,13 @@
#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_OFST 36
#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_LO_OFST 36
+#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_LO_LBN 288
+#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_HI_OFST 40
+#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_HI_LBN 320
+#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_MINNUM 1
#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_MAXNUM 64
#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_MAXNUM_MCDI2 64
@@ -8750,7 +9921,8 @@
#define MC_CMD_INIT_EVQ_V2_IN_SIZE_OFST 0
#define MC_CMD_INIT_EVQ_V2_IN_SIZE_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_EVQ_V2_IN_INSTANCE_OFST 4
#define MC_CMD_INIT_EVQ_V2_IN_INSTANCE_LEN 4
@@ -8847,7 +10019,13 @@
#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_OFST 36
#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_LO_OFST 36
+#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_LO_LBN 288
+#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_HI_OFST 40
+#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_HI_LBN 320
+#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_MINNUM 1
#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_MAXNUM 64
#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_MAXNUM_MCDI2 64
@@ -8900,6 +10078,7 @@
* the RXQ.
*/
#define MC_CMD_INIT_RXQ 0x81
+#define MC_CMD_INIT_RXQ_MSGSET 0x81
#undef MC_CMD_0x81_PRIVILEGE_CTG
#define MC_CMD_0x81_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -8923,7 +10102,8 @@
#define MC_CMD_INIT_RXQ_IN_LABEL_OFST 8
#define MC_CMD_INIT_RXQ_IN_LABEL_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_RXQ_IN_INSTANCE_OFST 12
#define MC_CMD_INIT_RXQ_IN_INSTANCE_LEN 4
@@ -8964,7 +10144,13 @@
#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_OFST 28
#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_LO_OFST 28
+#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_LO_LBN 224
+#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_HI_OFST 32
+#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_HI_LBN 256
+#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_MINNUM 1
#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_MAXNUM 28
#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_MAXNUM_MCDI2 124
@@ -8988,7 +10174,8 @@
#define MC_CMD_INIT_RXQ_EXT_IN_LABEL_OFST 8
#define MC_CMD_INIT_RXQ_EXT_IN_LABEL_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_RXQ_EXT_IN_INSTANCE_OFST 12
#define MC_CMD_INIT_RXQ_EXT_IN_INSTANCE_LEN 4
@@ -9062,7 +10249,13 @@
#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_OFST 28
#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_LO_OFST 28
+#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_LO_LBN 224
+#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_HI_OFST 32
+#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_HI_LBN 256
+#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_NUM 64
/* Maximum length of packet to receive, if SNAPSHOT_MODE flag is set */
#define MC_CMD_INIT_RXQ_EXT_IN_SNAPSHOT_LENGTH_OFST 540
@@ -9085,7 +10278,8 @@
#define MC_CMD_INIT_RXQ_V3_IN_LABEL_OFST 8
#define MC_CMD_INIT_RXQ_V3_IN_LABEL_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_RXQ_V3_IN_INSTANCE_OFST 12
#define MC_CMD_INIT_RXQ_V3_IN_INSTANCE_LEN 4
@@ -9159,7 +10353,13 @@
#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_OFST 28
#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_LO_OFST 28
+#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_LO_LBN 224
+#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_HI_OFST 32
+#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_HI_LBN 256
+#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_NUM 64
/* Maximum length of packet to receive, if SNAPSHOT_MODE flag is set */
#define MC_CMD_INIT_RXQ_V3_IN_SNAPSHOT_LENGTH_OFST 540
@@ -9211,7 +10411,8 @@
#define MC_CMD_INIT_RXQ_V4_IN_LABEL_OFST 8
#define MC_CMD_INIT_RXQ_V4_IN_LABEL_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_RXQ_V4_IN_INSTANCE_OFST 12
#define MC_CMD_INIT_RXQ_V4_IN_INSTANCE_LEN 4
@@ -9285,7 +10486,13 @@
#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_OFST 28
#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_LO_OFST 28
+#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_LO_LBN 224
+#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_HI_OFST 32
+#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_HI_LBN 256
+#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_NUM 64
/* Maximum length of packet to receive, if SNAPSHOT_MODE flag is set */
#define MC_CMD_INIT_RXQ_V4_IN_SNAPSHOT_LENGTH_OFST 540
@@ -9350,7 +10557,8 @@
#define MC_CMD_INIT_RXQ_V5_IN_LABEL_OFST 8
#define MC_CMD_INIT_RXQ_V5_IN_LABEL_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_RXQ_V5_IN_INSTANCE_OFST 12
#define MC_CMD_INIT_RXQ_V5_IN_INSTANCE_LEN 4
@@ -9424,7 +10632,13 @@
#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_OFST 28
#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_LO_OFST 28
+#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_LO_LBN 224
+#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_HI_OFST 32
+#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_HI_LBN 256
+#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_NUM 64
/* Maximum length of packet to receive, if SNAPSHOT_MODE flag is set */
#define MC_CMD_INIT_RXQ_V5_IN_SNAPSHOT_LENGTH_OFST 540
@@ -9497,6 +10711,7 @@
/* MC_CMD_INIT_TXQ
*/
#define MC_CMD_INIT_TXQ 0x82
+#define MC_CMD_INIT_TXQ_MSGSET 0x82
#undef MC_CMD_0x82_PRIVILEGE_CTG
#define MC_CMD_0x82_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -9521,7 +10736,8 @@
#define MC_CMD_INIT_TXQ_IN_LABEL_OFST 8
#define MC_CMD_INIT_TXQ_IN_LABEL_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_TXQ_IN_INSTANCE_OFST 12
#define MC_CMD_INIT_TXQ_IN_INSTANCE_LEN 4
@@ -9565,7 +10781,13 @@
#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_OFST 28
#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_LO_OFST 28
+#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_LO_LBN 224
+#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_HI_OFST 32
+#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_HI_LBN 256
+#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_MINNUM 1
#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_MAXNUM 28
#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_MAXNUM_MCDI2 124
@@ -9586,7 +10808,8 @@
#define MC_CMD_INIT_TXQ_EXT_IN_LABEL_OFST 8
#define MC_CMD_INIT_TXQ_EXT_IN_LABEL_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_TXQ_EXT_IN_INSTANCE_OFST 12
#define MC_CMD_INIT_TXQ_EXT_IN_INSTANCE_LEN 4
@@ -9648,7 +10871,13 @@
#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_OFST 28
#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_LO_OFST 28
+#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_LO_LBN 224
+#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_HI_OFST 32
+#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_HI_LBN 256
+#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_MINNUM 1
#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_MAXNUM 64
#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_MAXNUM_MCDI2 64
@@ -9674,6 +10903,7 @@
* or the operation will fail with EBUSY
*/
#define MC_CMD_FINI_EVQ 0x83
+#define MC_CMD_FINI_EVQ_MSGSET 0x83
#undef MC_CMD_0x83_PRIVILEGE_CTG
#define MC_CMD_0x83_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -9695,6 +10925,7 @@
* Teardown a RXQ.
*/
#define MC_CMD_FINI_RXQ 0x84
+#define MC_CMD_FINI_RXQ_MSGSET 0x84
#undef MC_CMD_0x84_PRIVILEGE_CTG
#define MC_CMD_0x84_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -9714,6 +10945,7 @@
* Teardown a TXQ.
*/
#define MC_CMD_FINI_TXQ 0x85
+#define MC_CMD_FINI_TXQ_MSGSET 0x85
#undef MC_CMD_0x85_PRIVILEGE_CTG
#define MC_CMD_0x85_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -9733,6 +10965,7 @@
* Generate an event on an EVQ belonging to the function issuing the command.
*/
#define MC_CMD_DRIVER_EVENT 0x86
+#define MC_CMD_DRIVER_EVENT_MSGSET 0x86
#undef MC_CMD_0x86_PRIVILEGE_CTG
#define MC_CMD_0x86_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -9746,7 +10979,13 @@
#define MC_CMD_DRIVER_EVENT_IN_DATA_OFST 4
#define MC_CMD_DRIVER_EVENT_IN_DATA_LEN 8
#define MC_CMD_DRIVER_EVENT_IN_DATA_LO_OFST 4
+#define MC_CMD_DRIVER_EVENT_IN_DATA_LO_LEN 4
+#define MC_CMD_DRIVER_EVENT_IN_DATA_LO_LBN 32
+#define MC_CMD_DRIVER_EVENT_IN_DATA_LO_WIDTH 32
#define MC_CMD_DRIVER_EVENT_IN_DATA_HI_OFST 8
+#define MC_CMD_DRIVER_EVENT_IN_DATA_HI_LEN 4
+#define MC_CMD_DRIVER_EVENT_IN_DATA_HI_LBN 64
+#define MC_CMD_DRIVER_EVENT_IN_DATA_HI_WIDTH 32
/* MC_CMD_DRIVER_EVENT_OUT msgresponse */
#define MC_CMD_DRIVER_EVENT_OUT_LEN 0
@@ -9760,6 +10999,7 @@
* MC_CMD_SET_FUNC, which remains available for Siena but now deprecated.
*/
#define MC_CMD_PROXY_CMD 0x5b
+#define MC_CMD_PROXY_CMD_MSGSET 0x5b
#undef MC_CMD_0x5b_PRIVILEGE_CTG
#define MC_CMD_0x5b_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -9828,6 +11068,7 @@
* a designated admin function
*/
#define MC_CMD_PROXY_CONFIGURE 0x58
+#define MC_CMD_PROXY_CONFIGURE_MSGSET 0x58
#undef MC_CMD_0x58_PRIVILEGE_CTG
#define MC_CMD_0x58_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -9845,7 +11086,13 @@
#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_OFST 4
#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_LEN 8
#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_LO_OFST 4
+#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_LO_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_LO_LBN 32
+#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_LO_WIDTH 32
#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_HI_OFST 8
+#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_HI_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_HI_LBN 64
+#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_HI_WIDTH 32
/* Must be a power of 2 */
#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BLOCK_SIZE_OFST 12
#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BLOCK_SIZE_LEN 4
@@ -9855,7 +11102,13 @@
#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_OFST 16
#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_LEN 8
#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_LO_OFST 16
+#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_LO_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_LO_LBN 128
+#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_LO_WIDTH 32
#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_HI_OFST 20
+#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_HI_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_HI_LBN 160
+#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_HI_WIDTH 32
/* Must be a power of 2 */
#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BLOCK_SIZE_OFST 24
#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BLOCK_SIZE_LEN 4
@@ -9866,7 +11119,13 @@
#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_OFST 28
#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_LEN 8
#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_LO_OFST 28
+#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_LO_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_LO_LBN 224
+#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_LO_WIDTH 32
#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_HI_OFST 32
+#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_HI_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_HI_LBN 256
+#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_HI_WIDTH 32
/* Must be a power of 2, or zero if this buffer is not provided */
#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BLOCK_SIZE_OFST 36
#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BLOCK_SIZE_LEN 4
@@ -9890,7 +11149,13 @@
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_OFST 4
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_LEN 8
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_LO_OFST 4
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_LO_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_LO_LBN 32
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_LO_WIDTH 32
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_HI_OFST 8
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_HI_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_HI_LBN 64
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_HI_WIDTH 32
/* Must be a power of 2 */
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BLOCK_SIZE_OFST 12
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BLOCK_SIZE_LEN 4
@@ -9900,7 +11165,13 @@
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_OFST 16
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_LEN 8
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_LO_OFST 16
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_LO_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_LO_LBN 128
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_LO_WIDTH 32
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_HI_OFST 20
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_HI_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_HI_LBN 160
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_HI_WIDTH 32
/* Must be a power of 2 */
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BLOCK_SIZE_OFST 24
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BLOCK_SIZE_LEN 4
@@ -9911,7 +11182,13 @@
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_OFST 28
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_LEN 8
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_LO_OFST 28
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_LO_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_LO_LBN 224
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_LO_WIDTH 32
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_HI_OFST 32
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_HI_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_HI_LBN 256
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_HI_WIDTH 32
/* Must be a power of 2, or zero if this buffer is not provided */
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BLOCK_SIZE_OFST 36
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BLOCK_SIZE_LEN 4
@@ -9936,6 +11213,7 @@
* MC_CMD_PROXY_CONFIGURE).
*/
#define MC_CMD_PROXY_COMPLETE 0x5f
+#define MC_CMD_PROXY_COMPLETE_MSGSET 0x5f
#undef MC_CMD_0x5f_PRIVILEGE_CTG
#define MC_CMD_0x5f_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -9974,6 +11252,7 @@
* cannot do so). The buffer table entries will initially be zeroed.
*/
#define MC_CMD_ALLOC_BUFTBL_CHUNK 0x87
+#define MC_CMD_ALLOC_BUFTBL_CHUNK_MSGSET 0x87
#undef MC_CMD_0x87_PRIVILEGE_CTG
#define MC_CMD_0x87_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -10005,6 +11284,7 @@
* Reprogram a set of buffer table entries in the specified chunk.
*/
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES 0x88
+#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_MSGSET 0x88
#undef MC_CMD_0x88_PRIVILEGE_CTG
#define MC_CMD_0x88_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -10027,7 +11307,13 @@
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_OFST 12
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LEN 8
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LO_OFST 12
+#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LO_LEN 4
+#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LO_LBN 96
+#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LO_WIDTH 32
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_HI_OFST 16
+#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_HI_LEN 4
+#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_HI_LBN 128
+#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_HI_WIDTH 32
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_MINNUM 1
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_MAXNUM 32
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_MAXNUM_MCDI2 32
@@ -10040,6 +11326,7 @@
/* MC_CMD_FREE_BUFTBL_CHUNK
*/
#define MC_CMD_FREE_BUFTBL_CHUNK 0x89
+#define MC_CMD_FREE_BUFTBL_CHUNK_MSGSET 0x89
#undef MC_CMD_0x89_PRIVILEGE_CTG
#define MC_CMD_0x89_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -10058,6 +11345,7 @@
* Multiplexed MCDI call for filter operations
*/
#define MC_CMD_FILTER_OP 0x8a
+#define MC_CMD_FILTER_OP_MSGSET 0x8a
#undef MC_CMD_0x8a_PRIVILEGE_CTG
#define MC_CMD_0x8a_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -10083,7 +11371,13 @@
#define MC_CMD_FILTER_OP_IN_HANDLE_OFST 4
#define MC_CMD_FILTER_OP_IN_HANDLE_LEN 8
#define MC_CMD_FILTER_OP_IN_HANDLE_LO_OFST 4
+#define MC_CMD_FILTER_OP_IN_HANDLE_LO_LEN 4
+#define MC_CMD_FILTER_OP_IN_HANDLE_LO_LBN 32
+#define MC_CMD_FILTER_OP_IN_HANDLE_LO_WIDTH 32
#define MC_CMD_FILTER_OP_IN_HANDLE_HI_OFST 8
+#define MC_CMD_FILTER_OP_IN_HANDLE_HI_LEN 4
+#define MC_CMD_FILTER_OP_IN_HANDLE_HI_LBN 64
+#define MC_CMD_FILTER_OP_IN_HANDLE_HI_WIDTH 32
/* The port ID associated with the v-adaptor which should contain this filter.
*/
#define MC_CMD_FILTER_OP_IN_PORT_ID_OFST 12
@@ -10239,7 +11533,13 @@
#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_OFST 4
#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_LEN 8
#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_LO_OFST 4
+#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_LO_LEN 4
+#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_LO_LBN 32
+#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_LO_WIDTH 32
#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_HI_OFST 8
+#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_HI_LEN 4
+#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_HI_LBN 64
+#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_HI_WIDTH 32
/* The port ID associated with the v-adaptor which should contain this filter.
*/
#define MC_CMD_FILTER_OP_EXT_IN_PORT_ID_OFST 12
@@ -10518,7 +11818,13 @@
#define MC_CMD_FILTER_OP_V3_IN_HANDLE_OFST 4
#define MC_CMD_FILTER_OP_V3_IN_HANDLE_LEN 8
#define MC_CMD_FILTER_OP_V3_IN_HANDLE_LO_OFST 4
+#define MC_CMD_FILTER_OP_V3_IN_HANDLE_LO_LEN 4
+#define MC_CMD_FILTER_OP_V3_IN_HANDLE_LO_LBN 32
+#define MC_CMD_FILTER_OP_V3_IN_HANDLE_LO_WIDTH 32
#define MC_CMD_FILTER_OP_V3_IN_HANDLE_HI_OFST 8
+#define MC_CMD_FILTER_OP_V3_IN_HANDLE_HI_LEN 4
+#define MC_CMD_FILTER_OP_V3_IN_HANDLE_HI_LBN 64
+#define MC_CMD_FILTER_OP_V3_IN_HANDLE_HI_WIDTH 32
/* The port ID associated with the v-adaptor which should contain this filter.
*/
#define MC_CMD_FILTER_OP_V3_IN_PORT_ID_OFST 12
@@ -10779,15 +12085,15 @@
*/
#define MC_CMD_FILTER_OP_V3_IN_IFRM_DST_IP_OFST 156
#define MC_CMD_FILTER_OP_V3_IN_IFRM_DST_IP_LEN 16
-/* Flags controlling mutations of the user_mark and user_flag fields of
- * matching packets, with logic as follows: if (req.MATCH_BITOR_FLAG == 1)
- * user_flag = req.MATCH_SET_FLAG bit_or user_flag; else user_flag =
- * req.MATCH_SET_FLAG; if (req.MATCH_SET_MARK == 0) user_mark = 0; else if
- * (req.MATCH_BITOR_MARK == 1) user_mark = req.MATCH_SET_MARK bit_or user_mark;
- * else user_mark = req.MATCH_SET_MARK; N.B. These flags overlap with the
- * MATCH_ACTION field, which is deprecated in favour of this field. For the
- * cases where these flags induce a valid encoding of the MATCH_ACTION field,
- * the semantics agree.
+/* Flags controlling mutations of the packet and/or metadata when the filter is
+ * matched. The user_mark and user_flag fields' logic is as follows: if
+ * (req.MATCH_BITOR_FLAG == 1) user_flag = req.MATCH_SET_FLAG bit_or user_flag;
+ * else user_flag = req.MATCH_SET_FLAG; if (req.MATCH_SET_MARK == 0) user_mark
+ * = 0; else if (req.MATCH_BITOR_MARK == 1) user_mark = req.MATCH_SET_MARK
+ * bit_or user_mark; else user_mark = req.MATCH_SET_MARK; N.B. These flags
+ * overlap with the MATCH_ACTION field, which is deprecated in favour of this
+ * field. For the cases where these flags induce a valid encoding of the
+ * MATCH_ACTION field, the semantics agree.
*/
#define MC_CMD_FILTER_OP_V3_IN_MATCH_ACTION_FLAGS_OFST 172
#define MC_CMD_FILTER_OP_V3_IN_MATCH_ACTION_FLAGS_LEN 4
@@ -10803,6 +12109,9 @@
#define MC_CMD_FILTER_OP_V3_IN_MATCH_BITOR_MARK_OFST 172
#define MC_CMD_FILTER_OP_V3_IN_MATCH_BITOR_MARK_LBN 3
#define MC_CMD_FILTER_OP_V3_IN_MATCH_BITOR_MARK_WIDTH 1
+#define MC_CMD_FILTER_OP_V3_IN_MATCH_STRIP_VLAN_OFST 172
+#define MC_CMD_FILTER_OP_V3_IN_MATCH_STRIP_VLAN_LBN 4
+#define MC_CMD_FILTER_OP_V3_IN_MATCH_STRIP_VLAN_WIDTH 1
/* Deprecated: the overlapping MATCH_ACTION_FLAGS field exposes all of the
* functionality of this field in an ABI-backwards-compatible manner, and
* should be used instead. Any future extensions should be made to the
@@ -10848,7 +12157,13 @@
#define MC_CMD_FILTER_OP_OUT_HANDLE_OFST 4
#define MC_CMD_FILTER_OP_OUT_HANDLE_LEN 8
#define MC_CMD_FILTER_OP_OUT_HANDLE_LO_OFST 4
+#define MC_CMD_FILTER_OP_OUT_HANDLE_LO_LEN 4
+#define MC_CMD_FILTER_OP_OUT_HANDLE_LO_LBN 32
+#define MC_CMD_FILTER_OP_OUT_HANDLE_LO_WIDTH 32
#define MC_CMD_FILTER_OP_OUT_HANDLE_HI_OFST 8
+#define MC_CMD_FILTER_OP_OUT_HANDLE_HI_LEN 4
+#define MC_CMD_FILTER_OP_OUT_HANDLE_HI_LBN 64
+#define MC_CMD_FILTER_OP_OUT_HANDLE_HI_WIDTH 32
/* enum: guaranteed invalid filter handle (low 32 bits) */
#define MC_CMD_FILTER_OP_OUT_HANDLE_LO_INVALID 0xffffffff
/* enum: guaranteed invalid filter handle (high 32 bits) */
@@ -10868,7 +12183,13 @@
#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_OFST 4
#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_LEN 8
#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_LO_OFST 4
+#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_LO_LEN 4
+#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_LO_LBN 32
+#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_LO_WIDTH 32
#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_HI_OFST 8
+#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_HI_LEN 4
+#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_HI_LBN 64
+#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_HI_WIDTH 32
/* Enum values, see field(s): */
/* MC_CMD_FILTER_OP_OUT/HANDLE */
@@ -10878,6 +12199,7 @@
* Get information related to the parser-dispatcher subsystem
*/
#define MC_CMD_GET_PARSER_DISP_INFO 0xe4
+#define MC_CMD_GET_PARSER_DISP_INFO_MSGSET 0xe4
#undef MC_CMD_0xe4_PRIVILEGE_CTG
#define MC_CMD_0xe4_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11025,6 +12347,7 @@
* permitted.
*/
#define MC_CMD_PARSER_DISP_RW 0xe5
+#define MC_CMD_PARSER_DISP_RW_MSGSET 0xe5
#undef MC_CMD_0xe5_PRIVILEGE_CTG
#define MC_CMD_0xe5_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -11115,6 +12438,7 @@
* Get number of PFs on the device.
*/
#define MC_CMD_GET_PF_COUNT 0xb6
+#define MC_CMD_GET_PF_COUNT_MSGSET 0xb6
#undef MC_CMD_0xb6_PRIVILEGE_CTG
#define MC_CMD_0xb6_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11134,6 +12458,7 @@
* Set number of PFs on the device.
*/
#define MC_CMD_SET_PF_COUNT 0xb7
+#define MC_CMD_SET_PF_COUNT_MSGSET 0xb7
/* MC_CMD_SET_PF_COUNT_IN msgrequest */
#define MC_CMD_SET_PF_COUNT_IN_LEN 4
@@ -11150,6 +12475,7 @@
* Get port assignment for current PCI function.
*/
#define MC_CMD_GET_PORT_ASSIGNMENT 0xb8
+#define MC_CMD_GET_PORT_ASSIGNMENT_MSGSET 0xb8
#undef MC_CMD_0xb8_PRIVILEGE_CTG
#define MC_CMD_0xb8_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11175,6 +12501,7 @@
* Set port assignment for current PCI function.
*/
#define MC_CMD_SET_PORT_ASSIGNMENT 0xb9
+#define MC_CMD_SET_PORT_ASSIGNMENT_MSGSET 0xb9
#undef MC_CMD_0xb9_PRIVILEGE_CTG
#define MC_CMD_0xb9_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -11194,6 +12521,7 @@
* Allocate VIs for current PCI function.
*/
#define MC_CMD_ALLOC_VIS 0x8b
+#define MC_CMD_ALLOC_VIS_MSGSET 0x8b
#undef MC_CMD_0x8b_PRIVILEGE_CTG
#define MC_CMD_0x8b_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11241,6 +12569,7 @@
* but not freed.
*/
#define MC_CMD_FREE_VIS 0x8c
+#define MC_CMD_FREE_VIS_MSGSET 0x8c
#undef MC_CMD_0x8c_PRIVILEGE_CTG
#define MC_CMD_0x8c_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11257,6 +12586,7 @@
* Get SRIOV config for this PF.
*/
#define MC_CMD_GET_SRIOV_CFG 0xba
+#define MC_CMD_GET_SRIOV_CFG_MSGSET 0xba
#undef MC_CMD_0xba_PRIVILEGE_CTG
#define MC_CMD_0xba_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11290,6 +12620,7 @@
* Set SRIOV config for this PF.
*/
#define MC_CMD_SET_SRIOV_CFG 0xbb
+#define MC_CMD_SET_SRIOV_CFG_MSGSET 0xbb
#undef MC_CMD_0xbb_PRIVILEGE_CTG
#define MC_CMD_0xbb_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -11325,9 +12656,11 @@
/***********************************/
/* MC_CMD_GET_VI_ALLOC_INFO
* Get information about number of VI's and base VI number allocated to this
- * function.
+ * function. This message is not available to dynamic clients created by
+ * MC_CMD_CLIENT_ALLOC.
*/
#define MC_CMD_GET_VI_ALLOC_INFO 0x8d
+#define MC_CMD_GET_VI_ALLOC_INFO_MSGSET 0x8d
#undef MC_CMD_0x8d_PRIVILEGE_CTG
#define MC_CMD_0x8d_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11352,9 +12685,12 @@
/***********************************/
/* MC_CMD_DUMP_VI_STATE
- * For CmdClient use. Dump pertinent information on a specific absolute VI.
+ * For CmdClient use. Dump pertinent information on a specific absolute VI. The
+ * VI must be owned by the calling client or one of its ancestors; usership of
+ * the VI (as set by MC_CMD_SET_VI_USER) is not sufficient.
*/
#define MC_CMD_DUMP_VI_STATE 0x8e
+#define MC_CMD_DUMP_VI_STATE_MSGSET 0x8e
#undef MC_CMD_0x8e_PRIVILEGE_CTG
#define MC_CMD_0x8e_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11366,7 +12702,7 @@
#define MC_CMD_DUMP_VI_STATE_IN_VI_NUMBER_LEN 4
/* MC_CMD_DUMP_VI_STATE_OUT msgresponse */
-#define MC_CMD_DUMP_VI_STATE_OUT_LEN 96
+#define MC_CMD_DUMP_VI_STATE_OUT_LEN 100
/* The PF part of the function owning this VI. */
#define MC_CMD_DUMP_VI_STATE_OUT_OWNER_PF_OFST 0
#define MC_CMD_DUMP_VI_STATE_OUT_OWNER_PF_LEN 2
@@ -11389,12 +12725,24 @@
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_OFST 12
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_LO_OFST 12
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_LO_LBN 96
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_HI_OFST 16
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_HI_LBN 128
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_HI_WIDTH 32
/* Raw evq timer table data. */
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_OFST 20
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_LO_OFST 20
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_LO_LBN 160
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_HI_OFST 24
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_HI_LBN 192
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_HI_WIDTH 32
/* Combined metadata field. */
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_OFST 28
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_LEN 4
@@ -11411,22 +12759,46 @@
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_OFST 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_LO_OFST 32
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_LO_LBN 256
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_HI_OFST 36
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_HI_LBN 288
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_HI_WIDTH 32
/* TXDPCPU raw table data for queue. */
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_OFST 40
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_LO_OFST 40
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_LO_LBN 320
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_HI_OFST 44
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_HI_LBN 352
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_HI_WIDTH 32
/* TXDPCPU raw table data for queue. */
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_OFST 48
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_LO_OFST 48
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_LO_LBN 384
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_HI_OFST 52
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_HI_LBN 416
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_HI_WIDTH 32
/* Combined metadata field. */
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_OFST 56
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_LO_OFST 56
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_LO_LBN 448
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_HI_OFST 60
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_HI_LBN 480
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_HI_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_BUFS_BASE_OFST 56
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_BUFS_BASE_LBN 0
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_BUFS_BASE_WIDTH 16
@@ -11446,22 +12818,46 @@
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_OFST 64
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_LO_OFST 64
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_LO_LBN 512
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_HI_OFST 68
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_HI_LBN 544
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_HI_WIDTH 32
/* RXDPCPU raw table data for queue. */
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_OFST 72
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_LO_OFST 72
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_LO_LBN 576
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_HI_OFST 76
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_HI_LBN 608
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_HI_WIDTH 32
/* Reserved, currently 0. */
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_OFST 80
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_LO_OFST 80
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_LO_LBN 640
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_HI_OFST 84
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_HI_LBN 672
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_HI_WIDTH 32
/* Combined metadata field. */
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_OFST 88
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_LO_OFST 88
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_LO_LBN 704
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_HI_OFST 92
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_HI_LBN 736
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_HI_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_BUFS_BASE_OFST 88
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_BUFS_BASE_LBN 0
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_BUFS_BASE_WIDTH 16
@@ -11474,6 +12870,9 @@
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_WAITCOUNT_OFST 88
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_WAITCOUNT_LBN 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_WAITCOUNT_WIDTH 8
+/* Current user, as assigned by MC_CMD_SET_VI_USER. */
+#define MC_CMD_DUMP_VI_STATE_OUT_USER_CLIENT_ID_OFST 96
+#define MC_CMD_DUMP_VI_STATE_OUT_USER_CLIENT_ID_LEN 4
/***********************************/
@@ -11481,6 +12880,7 @@
* Allocate a push I/O buffer for later use with a tx queue.
*/
#define MC_CMD_ALLOC_PIOBUF 0x8f
+#define MC_CMD_ALLOC_PIOBUF_MSGSET 0x8f
#undef MC_CMD_0x8f_PRIVILEGE_CTG
#define MC_CMD_0x8f_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -11500,6 +12900,7 @@
* Free a push I/O buffer.
*/
#define MC_CMD_FREE_PIOBUF 0x90
+#define MC_CMD_FREE_PIOBUF_MSGSET 0x90
#undef MC_CMD_0x90_PRIVILEGE_CTG
#define MC_CMD_0x90_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -11516,9 +12917,12 @@
/***********************************/
/* MC_CMD_GET_VI_TLP_PROCESSING
- * Get TLP steering and ordering information for a VI.
+ * Get TLP steering and ordering information for a VI. The caller must have the
+ * GRP_FUNC_DMA privilege and must be the currently-assigned user of this VI or
+ * an ancestor of the current user (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_GET_VI_TLP_PROCESSING 0xb0
+#define MC_CMD_GET_VI_TLP_PROCESSING_MSGSET 0xb0
#undef MC_CMD_0xb0_PRIVILEGE_CTG
#define MC_CMD_0xb0_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11555,9 +12959,12 @@
/***********************************/
/* MC_CMD_SET_VI_TLP_PROCESSING
- * Set TLP steering and ordering information for a VI.
+ * Set TLP steering and ordering information for a VI. The caller must have the
+ * GRP_FUNC_DMA privilege and must be the currently-assigned user of this VI or
+ * an ancestor of the current user (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_SET_VI_TLP_PROCESSING 0xb1
+#define MC_CMD_SET_VI_TLP_PROCESSING_MSGSET 0xb1
#undef MC_CMD_0xb1_PRIVILEGE_CTG
#define MC_CMD_0xb1_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11597,6 +13004,7 @@
* Get global PCIe steering and transaction processing configuration.
*/
#define MC_CMD_GET_TLP_PROCESSING_GLOBALS 0xbc
+#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_MSGSET 0xbc
#undef MC_CMD_0xbc_PRIVILEGE_CTG
#define MC_CMD_0xbc_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -11681,6 +13089,7 @@
* Set global PCIe steering and transaction processing configuration.
*/
#define MC_CMD_SET_TLP_PROCESSING_GLOBALS 0xbd
+#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_MSGSET 0xbd
#undef MC_CMD_0xbd_PRIVILEGE_CTG
#define MC_CMD_0xbd_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -11746,6 +13155,7 @@
* Download a new set of images to the satellite CPUs from the host.
*/
#define MC_CMD_SATELLITE_DOWNLOAD 0x91
+#define MC_CMD_SATELLITE_DOWNLOAD_MSGSET 0x91
#undef MC_CMD_0x91_PRIVILEGE_CTG
#define MC_CMD_0x91_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -11873,6 +13283,7 @@
* reference inherent device capabilities as opposed to current NVRAM config.
*/
#define MC_CMD_GET_CAPABILITIES 0xbe
+#define MC_CMD_GET_CAPABILITIES_MSGSET 0xbe
#undef MC_CMD_0xbe_PRIVILEGE_CTG
#define MC_CMD_0xbe_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -14813,6 +16224,18 @@
#define MC_CMD_GET_CAPABILITIES_V7_OUT_UNSOL_EV_CREDIT_SUPPORTED_OFST 148
#define MC_CMD_GET_CAPABILITIES_V7_OUT_UNSOL_EV_CREDIT_SUPPORTED_LBN 7
#define MC_CMD_GET_CAPABILITIES_V7_OUT_UNSOL_EV_CREDIT_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_ENCAPSULATED_MCDI_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_ENCAPSULATED_MCDI_SUPPORTED_LBN 8
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_ENCAPSULATED_MCDI_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_EXTERNAL_MAE_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_EXTERNAL_MAE_SUPPORTED_LBN 9
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_EXTERNAL_MAE_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_LBN 10
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_LBN 11
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_WIDTH 1
/* MC_CMD_GET_CAPABILITIES_V8_OUT msgresponse */
#define MC_CMD_GET_CAPABILITIES_V8_OUT_LEN 160
@@ -15299,6 +16722,18 @@
#define MC_CMD_GET_CAPABILITIES_V8_OUT_UNSOL_EV_CREDIT_SUPPORTED_OFST 148
#define MC_CMD_GET_CAPABILITIES_V8_OUT_UNSOL_EV_CREDIT_SUPPORTED_LBN 7
#define MC_CMD_GET_CAPABILITIES_V8_OUT_UNSOL_EV_CREDIT_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_ENCAPSULATED_MCDI_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_ENCAPSULATED_MCDI_SUPPORTED_LBN 8
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_ENCAPSULATED_MCDI_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_EXTERNAL_MAE_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_EXTERNAL_MAE_SUPPORTED_LBN 9
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_EXTERNAL_MAE_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_LBN 10
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_LBN 11
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_WIDTH 1
/* These bits are reserved for communicating test-specific capabilities to
* host-side test software. All production drivers should treat this field as
* opaque.
@@ -15306,7 +16741,13 @@
#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_OFST 152
#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_LEN 8
#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_LO_OFST 152
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_LO_LEN 4
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_LO_LBN 1216
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_LO_WIDTH 32
#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_HI_OFST 156
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_HI_LEN 4
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_HI_LBN 1248
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_HI_WIDTH 32
/* MC_CMD_GET_CAPABILITIES_V9_OUT msgresponse */
#define MC_CMD_GET_CAPABILITIES_V9_OUT_LEN 184
@@ -15793,6 +17234,18 @@
#define MC_CMD_GET_CAPABILITIES_V9_OUT_UNSOL_EV_CREDIT_SUPPORTED_OFST 148
#define MC_CMD_GET_CAPABILITIES_V9_OUT_UNSOL_EV_CREDIT_SUPPORTED_LBN 7
#define MC_CMD_GET_CAPABILITIES_V9_OUT_UNSOL_EV_CREDIT_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_ENCAPSULATED_MCDI_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_ENCAPSULATED_MCDI_SUPPORTED_LBN 8
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_ENCAPSULATED_MCDI_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_EXTERNAL_MAE_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_EXTERNAL_MAE_SUPPORTED_LBN 9
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_EXTERNAL_MAE_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_LBN 10
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_LBN 11
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_WIDTH 1
/* These bits are reserved for communicating test-specific capabilities to
* host-side test software. All production drivers should treat this field as
* opaque.
@@ -15800,7 +17253,13 @@
#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_OFST 152
#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_LEN 8
#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_LO_OFST 152
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_LO_LEN 4
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_LO_LBN 1216
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_LO_WIDTH 32
#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_HI_OFST 156
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_HI_LEN 4
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_HI_LBN 1248
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_HI_WIDTH 32
/* The minimum size (in table entries) of indirection table to be allocated
* from the pool for an RSS context. Note that the table size used must be a
* power of 2.
@@ -16322,6 +17781,18 @@
#define MC_CMD_GET_CAPABILITIES_V10_OUT_UNSOL_EV_CREDIT_SUPPORTED_OFST 148
#define MC_CMD_GET_CAPABILITIES_V10_OUT_UNSOL_EV_CREDIT_SUPPORTED_LBN 7
#define MC_CMD_GET_CAPABILITIES_V10_OUT_UNSOL_EV_CREDIT_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_ENCAPSULATED_MCDI_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_ENCAPSULATED_MCDI_SUPPORTED_LBN 8
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_ENCAPSULATED_MCDI_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_EXTERNAL_MAE_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_EXTERNAL_MAE_SUPPORTED_LBN 9
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_EXTERNAL_MAE_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_LBN 10
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_LBN 11
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_WIDTH 1
/* These bits are reserved for communicating test-specific capabilities to
* host-side test software. All production drivers should treat this field as
* opaque.
@@ -16329,7 +17800,13 @@
#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_OFST 152
#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_LEN 8
#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_LO_OFST 152
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_LO_LEN 4
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_LO_LBN 1216
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_LO_WIDTH 32
#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_HI_OFST 156
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_HI_LEN 4
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_HI_LBN 1248
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_HI_WIDTH 32
/* The minimum size (in table entries) of indirection table to be allocated
* from the pool for an RSS context. Note that the table size used must be a
* power of 2.
@@ -16386,6 +17863,7 @@
* Encapsulation for a v2 extended command
*/
#define MC_CMD_V2_EXTN 0x7f
+#define MC_CMD_V2_EXTN_MSGSET 0x7f
/* MC_CMD_V2_EXTN_IN msgrequest */
#define MC_CMD_V2_EXTN_IN_LEN 4
@@ -16417,6 +17895,7 @@
* Allocate a pacer bucket (for qau rp or a snapper test)
*/
#define MC_CMD_TCM_BUCKET_ALLOC 0xb2
+#define MC_CMD_TCM_BUCKET_ALLOC_MSGSET 0xb2
#undef MC_CMD_0xb2_PRIVILEGE_CTG
#define MC_CMD_0xb2_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16436,6 +17915,7 @@
* Free a pacer bucket
*/
#define MC_CMD_TCM_BUCKET_FREE 0xb3
+#define MC_CMD_TCM_BUCKET_FREE_MSGSET 0xb3
#undef MC_CMD_0xb3_PRIVILEGE_CTG
#define MC_CMD_0xb3_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16455,6 +17935,7 @@
* Initialise pacer bucket with a given rate
*/
#define MC_CMD_TCM_BUCKET_INIT 0xb4
+#define MC_CMD_TCM_BUCKET_INIT_MSGSET 0xb4
#undef MC_CMD_0xb4_PRIVILEGE_CTG
#define MC_CMD_0xb4_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16489,6 +17970,7 @@
* Initialise txq in pacer with given options or set options
*/
#define MC_CMD_TCM_TXQ_INIT 0xb5
+#define MC_CMD_TCM_TXQ_INIT_MSGSET 0xb5
#undef MC_CMD_0xb5_PRIVILEGE_CTG
#define MC_CMD_0xb5_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16579,6 +18061,7 @@
* Link a push I/O buffer to a TxQ
*/
#define MC_CMD_LINK_PIOBUF 0x92
+#define MC_CMD_LINK_PIOBUF_MSGSET 0x92
#undef MC_CMD_0x92_PRIVILEGE_CTG
#define MC_CMD_0x92_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -16588,7 +18071,7 @@
/* Handle for allocated push I/O buffer. */
#define MC_CMD_LINK_PIOBUF_IN_PIOBUF_HANDLE_OFST 0
#define MC_CMD_LINK_PIOBUF_IN_PIOBUF_HANDLE_LEN 4
-/* Function Local Instance (VI) number. */
+/* Function Local Instance (VI) number which has a TxQ allocated to it. */
#define MC_CMD_LINK_PIOBUF_IN_TXQ_INSTANCE_OFST 4
#define MC_CMD_LINK_PIOBUF_IN_TXQ_INSTANCE_LEN 4
@@ -16601,6 +18084,7 @@
* Unlink a push I/O buffer from a TxQ
*/
#define MC_CMD_UNLINK_PIOBUF 0x93
+#define MC_CMD_UNLINK_PIOBUF_MSGSET 0x93
#undef MC_CMD_0x93_PRIVILEGE_CTG
#define MC_CMD_0x93_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -16620,6 +18104,7 @@
* allocate and initialise a v-switch.
*/
#define MC_CMD_VSWITCH_ALLOC 0x94
+#define MC_CMD_VSWITCH_ALLOC_MSGSET 0x94
#undef MC_CMD_0x94_PRIVILEGE_CTG
#define MC_CMD_0x94_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16667,6 +18152,7 @@
* de-allocate a v-switch.
*/
#define MC_CMD_VSWITCH_FREE 0x95
+#define MC_CMD_VSWITCH_FREE_MSGSET 0x95
#undef MC_CMD_0x95_PRIVILEGE_CTG
#define MC_CMD_0x95_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16688,6 +18174,7 @@
* not, then the command returns ENOENT).
*/
#define MC_CMD_VSWITCH_QUERY 0x63
+#define MC_CMD_VSWITCH_QUERY_MSGSET 0x63
#undef MC_CMD_0x63_PRIVILEGE_CTG
#define MC_CMD_0x63_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16707,6 +18194,7 @@
* allocate a v-port.
*/
#define MC_CMD_VPORT_ALLOC 0x96
+#define MC_CMD_VPORT_ALLOC_MSGSET 0x96
#undef MC_CMD_0x96_PRIVILEGE_CTG
#define MC_CMD_0x96_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16774,6 +18262,7 @@
* de-allocate a v-port.
*/
#define MC_CMD_VPORT_FREE 0x97
+#define MC_CMD_VPORT_FREE_MSGSET 0x97
#undef MC_CMD_0x97_PRIVILEGE_CTG
#define MC_CMD_0x97_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16793,6 +18282,7 @@
* allocate a v-adaptor.
*/
#define MC_CMD_VADAPTOR_ALLOC 0x98
+#define MC_CMD_VADAPTOR_ALLOC_MSGSET 0x98
#undef MC_CMD_0x98_PRIVILEGE_CTG
#define MC_CMD_0x98_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16841,6 +18331,7 @@
* de-allocate a v-adaptor.
*/
#define MC_CMD_VADAPTOR_FREE 0x99
+#define MC_CMD_VADAPTOR_FREE_MSGSET 0x99
#undef MC_CMD_0x99_PRIVILEGE_CTG
#define MC_CMD_0x99_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16860,6 +18351,7 @@
* assign a new MAC address to a v-adaptor.
*/
#define MC_CMD_VADAPTOR_SET_MAC 0x5d
+#define MC_CMD_VADAPTOR_SET_MAC_MSGSET 0x5d
#undef MC_CMD_0x5d_PRIVILEGE_CTG
#define MC_CMD_0x5d_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16882,6 +18374,7 @@
* read the MAC address assigned to a v-adaptor.
*/
#define MC_CMD_VADAPTOR_GET_MAC 0x5e
+#define MC_CMD_VADAPTOR_GET_MAC_MSGSET 0x5e
#undef MC_CMD_0x5e_PRIVILEGE_CTG
#define MC_CMD_0x5e_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16904,6 +18397,7 @@
* read some config of v-adaptor.
*/
#define MC_CMD_VADAPTOR_QUERY 0x61
+#define MC_CMD_VADAPTOR_QUERY_MSGSET 0x61
#undef MC_CMD_0x61_PRIVILEGE_CTG
#define MC_CMD_0x61_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16932,6 +18426,7 @@
* assign a port to a PCI function.
*/
#define MC_CMD_EVB_PORT_ASSIGN 0x9a
+#define MC_CMD_EVB_PORT_ASSIGN_MSGSET 0x9a
#undef MC_CMD_0x9a_PRIVILEGE_CTG
#define MC_CMD_0x9a_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16960,6 +18455,7 @@
* Assign the 64 bit region addresses.
*/
#define MC_CMD_RDWR_A64_REGIONS 0x9b
+#define MC_CMD_RDWR_A64_REGIONS_MSGSET 0x9b
#undef MC_CMD_0x9b_PRIVILEGE_CTG
#define MC_CMD_0x9b_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -16999,6 +18495,7 @@
* Allocate an Onload stack ID.
*/
#define MC_CMD_ONLOAD_STACK_ALLOC 0x9c
+#define MC_CMD_ONLOAD_STACK_ALLOC_MSGSET 0x9c
#undef MC_CMD_0x9c_PRIVILEGE_CTG
#define MC_CMD_0x9c_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -17021,6 +18518,7 @@
* Free an Onload stack ID.
*/
#define MC_CMD_ONLOAD_STACK_FREE 0x9d
+#define MC_CMD_ONLOAD_STACK_FREE_MSGSET 0x9d
#undef MC_CMD_0x9d_PRIVILEGE_CTG
#define MC_CMD_0x9d_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -17040,6 +18538,7 @@
* Allocate an RSS context.
*/
#define MC_CMD_RSS_CONTEXT_ALLOC 0x9e
+#define MC_CMD_RSS_CONTEXT_ALLOC_MSGSET 0x9e
#undef MC_CMD_0x9e_PRIVILEGE_CTG
#define MC_CMD_0x9e_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17140,6 +18639,7 @@
* Free an RSS context.
*/
#define MC_CMD_RSS_CONTEXT_FREE 0x9f
+#define MC_CMD_RSS_CONTEXT_FREE_MSGSET 0x9f
#undef MC_CMD_0x9f_PRIVILEGE_CTG
#define MC_CMD_0x9f_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17159,6 +18659,7 @@
* Set the Toeplitz hash key for an RSS context.
*/
#define MC_CMD_RSS_CONTEXT_SET_KEY 0xa0
+#define MC_CMD_RSS_CONTEXT_SET_KEY_MSGSET 0xa0
#undef MC_CMD_0xa0_PRIVILEGE_CTG
#define MC_CMD_0xa0_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17181,6 +18682,7 @@
* Get the Toeplitz hash key for an RSS context.
*/
#define MC_CMD_RSS_CONTEXT_GET_KEY 0xa1
+#define MC_CMD_RSS_CONTEXT_GET_KEY_MSGSET 0xa1
#undef MC_CMD_0xa1_PRIVILEGE_CTG
#define MC_CMD_0xa1_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17205,6 +18707,7 @@
* when the RSS context is allocated without specifying a table size.
*/
#define MC_CMD_RSS_CONTEXT_SET_TABLE 0xa2
+#define MC_CMD_RSS_CONTEXT_SET_TABLE_MSGSET 0xa2
#undef MC_CMD_0xa2_PRIVILEGE_CTG
#define MC_CMD_0xa2_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17229,6 +18732,7 @@
* when the RSS context is allocated without specifying a table size.
*/
#define MC_CMD_RSS_CONTEXT_GET_TABLE 0xa3
+#define MC_CMD_RSS_CONTEXT_GET_TABLE_MSGSET 0xa3
#undef MC_CMD_0xa3_PRIVILEGE_CTG
#define MC_CMD_0xa3_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17253,6 +18757,7 @@
* RSS_SELECTABLE_TABLE_SIZE bit is set in MC_CMD_GET_CAPABILITIES.
*/
#define MC_CMD_RSS_CONTEXT_WRITE_TABLE 0x13e
+#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_MSGSET 0x13e
#undef MC_CMD_0x13e_PRIVILEGE_CTG
#define MC_CMD_0x13e_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17299,6 +18804,7 @@
* RSS_SELECTABLE_TABLE_SIZE bit is set in MC_CMD_GET_CAPABILITIES.
*/
#define MC_CMD_RSS_CONTEXT_READ_TABLE 0x13f
+#define MC_CMD_RSS_CONTEXT_READ_TABLE_MSGSET 0x13f
#undef MC_CMD_0x13f_PRIVILEGE_CTG
#define MC_CMD_0x13f_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17338,6 +18844,7 @@
* Set various control flags for an RSS context.
*/
#define MC_CMD_RSS_CONTEXT_SET_FLAGS 0xe1
+#define MC_CMD_RSS_CONTEXT_SET_FLAGS_MSGSET 0xe1
#undef MC_CMD_0xe1_PRIVILEGE_CTG
#define MC_CMD_0xe1_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17404,6 +18911,7 @@
* Get various control flags for an RSS context.
*/
#define MC_CMD_RSS_CONTEXT_GET_FLAGS 0xe2
+#define MC_CMD_RSS_CONTEXT_GET_FLAGS_MSGSET 0xe2
#undef MC_CMD_0xe2_PRIVILEGE_CTG
#define MC_CMD_0xe2_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17471,6 +18979,7 @@
* Allocate a .1p mapping.
*/
#define MC_CMD_DOT1P_MAPPING_ALLOC 0xa4
+#define MC_CMD_DOT1P_MAPPING_ALLOC_MSGSET 0xa4
#undef MC_CMD_0xa4_PRIVILEGE_CTG
#define MC_CMD_0xa4_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -17504,6 +19013,7 @@
* Free a .1p mapping.
*/
#define MC_CMD_DOT1P_MAPPING_FREE 0xa5
+#define MC_CMD_DOT1P_MAPPING_FREE_MSGSET 0xa5
#undef MC_CMD_0xa5_PRIVILEGE_CTG
#define MC_CMD_0xa5_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -17523,6 +19033,7 @@
* Set the mapping table for a .1p mapping.
*/
#define MC_CMD_DOT1P_MAPPING_SET_TABLE 0xa6
+#define MC_CMD_DOT1P_MAPPING_SET_TABLE_MSGSET 0xa6
#undef MC_CMD_0xa6_PRIVILEGE_CTG
#define MC_CMD_0xa6_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -17547,6 +19058,7 @@
* Get the mapping table for a .1p mapping.
*/
#define MC_CMD_DOT1P_MAPPING_GET_TABLE 0xa7
+#define MC_CMD_DOT1P_MAPPING_GET_TABLE_MSGSET 0xa7
#undef MC_CMD_0xa7_PRIVILEGE_CTG
#define MC_CMD_0xa7_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -17571,6 +19083,7 @@
* Get Interrupt Vector config for this PF.
*/
#define MC_CMD_GET_VECTOR_CFG 0xbf
+#define MC_CMD_GET_VECTOR_CFG_MSGSET 0xbf
#undef MC_CMD_0xbf_PRIVILEGE_CTG
#define MC_CMD_0xbf_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17596,6 +19109,7 @@
* Set Interrupt Vector config for this PF.
*/
#define MC_CMD_SET_VECTOR_CFG 0xc0
+#define MC_CMD_SET_VECTOR_CFG_MSGSET 0xc0
#undef MC_CMD_0xc0_PRIVILEGE_CTG
#define MC_CMD_0xc0_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17623,6 +19137,7 @@
* Add a MAC address to a v-port
*/
#define MC_CMD_VPORT_ADD_MAC_ADDRESS 0xa8
+#define MC_CMD_VPORT_ADD_MAC_ADDRESS_MSGSET 0xa8
#undef MC_CMD_0xa8_PRIVILEGE_CTG
#define MC_CMD_0xa8_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17645,6 +19160,7 @@
* Delete a MAC address from a v-port
*/
#define MC_CMD_VPORT_DEL_MAC_ADDRESS 0xa9
+#define MC_CMD_VPORT_DEL_MAC_ADDRESS_MSGSET 0xa9
#undef MC_CMD_0xa9_PRIVILEGE_CTG
#define MC_CMD_0xa9_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17667,6 +19183,7 @@
* Delete a MAC address from a v-port
*/
#define MC_CMD_VPORT_GET_MAC_ADDRESSES 0xaa
+#define MC_CMD_VPORT_GET_MAC_ADDRESSES_MSGSET 0xaa
#undef MC_CMD_0xaa_PRIVILEGE_CTG
#define MC_CMD_0xaa_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17701,6 +19218,7 @@
* function will be reset before applying the changes.
*/
#define MC_CMD_VPORT_RECONFIGURE 0xeb
+#define MC_CMD_VPORT_RECONFIGURE_MSGSET 0xeb
#undef MC_CMD_0xeb_PRIVILEGE_CTG
#define MC_CMD_0xeb_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17756,6 +19274,7 @@
* read some config of v-port.
*/
#define MC_CMD_EVB_PORT_QUERY 0x62
+#define MC_CMD_EVB_PORT_QUERY_MSGSET 0x62
#undef MC_CMD_0x62_PRIVILEGE_CTG
#define MC_CMD_0x62_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17786,6 +19305,7 @@
* lifted in future.
*/
#define MC_CMD_DUMP_BUFTBL_ENTRIES 0xab
+#define MC_CMD_DUMP_BUFTBL_ENTRIES_MSGSET 0xab
#undef MC_CMD_0xab_PRIVILEGE_CTG
#define MC_CMD_0xab_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -17818,6 +19338,7 @@
* Set global RXDP configuration settings
*/
#define MC_CMD_SET_RXDP_CONFIG 0xc1
+#define MC_CMD_SET_RXDP_CONFIG_MSGSET 0xc1
#undef MC_CMD_0xc1_PRIVILEGE_CTG
#define MC_CMD_0xc1_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -17848,6 +19369,7 @@
* Get global RXDP configuration settings
*/
#define MC_CMD_GET_RXDP_CONFIG 0xc2
+#define MC_CMD_GET_RXDP_CONFIG_MSGSET 0xc2
#undef MC_CMD_0xc2_PRIVILEGE_CTG
#define MC_CMD_0xc2_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17874,6 +19396,7 @@
* Return the system and PDCPU clock frequencies.
*/
#define MC_CMD_GET_CLOCK 0xac
+#define MC_CMD_GET_CLOCK_MSGSET 0xac
#undef MC_CMD_0xac_PRIVILEGE_CTG
#define MC_CMD_0xac_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17896,6 +19419,7 @@
* Control the system and DPCPU clock frequencies. Changes are lost reboot.
*/
#define MC_CMD_SET_CLOCK 0xad
+#define MC_CMD_SET_CLOCK_MSGSET 0xad
#undef MC_CMD_0xad_PRIVILEGE_CTG
#define MC_CMD_0xad_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -17982,6 +19506,7 @@
* Send an arbitrary DPCPU message.
*/
#define MC_CMD_DPCPU_RPC 0xae
+#define MC_CMD_DPCPU_RPC_MSGSET 0xae
#undef MC_CMD_0xae_PRIVILEGE_CTG
#define MC_CMD_0xae_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -18100,6 +19625,7 @@
* Trigger an interrupt by prodding the BIU.
*/
#define MC_CMD_TRIGGER_INTERRUPT 0xe3
+#define MC_CMD_TRIGGER_INTERRUPT_MSGSET 0xe3
#undef MC_CMD_0xe3_PRIVILEGE_CTG
#define MC_CMD_0xe3_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -18119,6 +19645,7 @@
* Special operations to support (for now) shmboot.
*/
#define MC_CMD_SHMBOOT_OP 0xe6
+#define MC_CMD_SHMBOOT_OP_MSGSET 0xe6
#undef MC_CMD_0xe6_PRIVILEGE_CTG
#define MC_CMD_0xe6_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -18140,6 +19667,7 @@
* Read multiple 64bit words from capture block memory
*/
#define MC_CMD_CAP_BLK_READ 0xe7
+#define MC_CMD_CAP_BLK_READ_MSGSET 0xe7
#undef MC_CMD_0xe7_PRIVILEGE_CTG
#define MC_CMD_0xe7_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -18162,7 +19690,13 @@
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_OFST 0
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_LEN 8
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_LO_OFST 0
+#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_LO_LEN 4
+#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_LO_LBN 0
+#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_LO_WIDTH 32
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_HI_OFST 4
+#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_HI_LEN 4
+#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_HI_LBN 32
+#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_HI_WIDTH 32
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_MINNUM 1
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_MAXNUM 31
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_MAXNUM_MCDI2 127
@@ -18173,6 +19707,7 @@
* Take a dump of the DUT state
*/
#define MC_CMD_DUMP_DO 0xe8
+#define MC_CMD_DUMP_DO_MSGSET 0xe8
#undef MC_CMD_0xe8_PRIVILEGE_CTG
#define MC_CMD_0xe8_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -18253,6 +19788,7 @@
* Configure unsolicited dumps
*/
#define MC_CMD_DUMP_CONFIGURE_UNSOLICITED 0xe9
+#define MC_CMD_DUMP_CONFIGURE_UNSOLICITED_MSGSET 0xe9
#undef MC_CMD_0xe9_PRIVILEGE_CTG
#define MC_CMD_0xe9_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -18322,6 +19858,7 @@
* the parameter is out of range.
*/
#define MC_CMD_SET_PSU 0xea
+#define MC_CMD_SET_PSU_MSGSET 0xea
#undef MC_CMD_0xea_PRIVILEGE_CTG
#define MC_CMD_0xea_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -18348,6 +19885,7 @@
* Get function information. PF and VF number.
*/
#define MC_CMD_GET_FUNCTION_INFO 0xec
+#define MC_CMD_GET_FUNCTION_INFO_MSGSET 0xec
#undef MC_CMD_0xec_PRIVILEGE_CTG
#define MC_CMD_0xec_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -18370,6 +19908,7 @@
* reboot.
*/
#define MC_CMD_ENABLE_OFFLINE_BIST 0xed
+#define MC_CMD_ENABLE_OFFLINE_BIST_MSGSET 0xed
#undef MC_CMD_0xed_PRIVILEGE_CTG
#define MC_CMD_0xed_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -18388,6 +19927,7 @@
* forget.
*/
#define MC_CMD_UART_SEND_DATA 0xee
+#define MC_CMD_UART_SEND_DATA_MSGSET 0xee
#undef MC_CMD_0xee_PRIVILEGE_CTG
#define MC_CMD_0xee_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -18426,6 +19966,7 @@
* subject to change and not currently implemented.
*/
#define MC_CMD_UART_RECV_DATA 0xef
+#define MC_CMD_UART_RECV_DATA_MSGSET 0xef
#undef MC_CMD_0xef_PRIVILEGE_CTG
#define MC_CMD_0xef_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -18475,6 +20016,7 @@
* Read data programmed into the device One-Time-Programmable (OTP) Fuses
*/
#define MC_CMD_READ_FUSES 0xf0
+#define MC_CMD_READ_FUSES_MSGSET 0xf0
#undef MC_CMD_0xf0_PRIVILEGE_CTG
#define MC_CMD_0xf0_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -18510,6 +20052,7 @@
* Get or set KR Serdes RXEQ and TX Driver settings
*/
#define MC_CMD_KR_TUNE 0xf1
+#define MC_CMD_KR_TUNE_MSGSET 0xf1
#undef MC_CMD_0xf1_PRIVILEGE_CTG
#define MC_CMD_0xf1_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -19066,6 +20609,7 @@
* Get or set PCIE Serdes RXEQ and TX Driver settings
*/
#define MC_CMD_PCIE_TUNE 0xf2
+#define MC_CMD_PCIE_TUNE_MSGSET 0xf2
#undef MC_CMD_0xf2_PRIVILEGE_CTG
#define MC_CMD_0xf2_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -19323,6 +20867,7 @@
* - not used for V3 licensing
*/
#define MC_CMD_LICENSING 0xf3
+#define MC_CMD_LICENSING_MSGSET 0xf3
#undef MC_CMD_0xf3_PRIVILEGE_CTG
#define MC_CMD_0xf3_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19379,6 +20924,7 @@
* - V3 licensing (Medford)
*/
#define MC_CMD_LICENSING_V3 0xd0
+#define MC_CMD_LICENSING_V3_MSGSET 0xd0
#undef MC_CMD_0xd0_PRIVILEGE_CTG
#define MC_CMD_0xd0_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19429,7 +20975,13 @@
#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_OFST 24
#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_LEN 8
#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_LO_OFST 24
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_LO_LEN 4
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_LO_LBN 192
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_LO_WIDTH 32
#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_HI_OFST 28
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_HI_LEN 4
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_HI_LBN 224
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_HI_WIDTH 32
/* reserved for future use */
#define MC_CMD_LICENSING_V3_OUT_RESERVED_0_OFST 32
#define MC_CMD_LICENSING_V3_OUT_RESERVED_0_LEN 24
@@ -19437,7 +20989,13 @@
#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_OFST 56
#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_LEN 8
#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_LO_OFST 56
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_LO_LEN 4
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_LO_LBN 448
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_LO_WIDTH 32
#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_HI_OFST 60
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_HI_LEN 4
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_HI_LBN 480
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_HI_WIDTH 32
/* reserved for future use */
#define MC_CMD_LICENSING_V3_OUT_RESERVED_1_OFST 64
#define MC_CMD_LICENSING_V3_OUT_RESERVED_1_LEN 24
@@ -19449,6 +21007,7 @@
* partition - V3 licensing (Medford)
*/
#define MC_CMD_LICENSING_GET_ID_V3 0xd1
+#define MC_CMD_LICENSING_GET_ID_V3_MSGSET 0xd1
#undef MC_CMD_0xd1_PRIVILEGE_CTG
#define MC_CMD_0xd1_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19482,6 +21041,7 @@
* This will fail on a single-core system.
*/
#define MC_CMD_MC2MC_PROXY 0xf4
+#define MC_CMD_MC2MC_PROXY_MSGSET 0xf4
#undef MC_CMD_0xf4_PRIVILEGE_CTG
#define MC_CMD_0xf4_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19500,6 +21060,7 @@
* or a reboot of the MC.) Not used for V3 licensing
*/
#define MC_CMD_GET_LICENSED_APP_STATE 0xf5
+#define MC_CMD_GET_LICENSED_APP_STATE_MSGSET 0xf5
#undef MC_CMD_0xf5_PRIVILEGE_CTG
#define MC_CMD_0xf5_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19528,6 +21089,7 @@
* operation or a reboot of the MC.) Used for V3 licensing (Medford)
*/
#define MC_CMD_GET_LICENSED_V3_APP_STATE 0xd2
+#define MC_CMD_GET_LICENSED_V3_APP_STATE_MSGSET 0xd2
#undef MC_CMD_0xd2_PRIVILEGE_CTG
#define MC_CMD_0xd2_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19540,7 +21102,13 @@
#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_OFST 0
#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_LEN 8
#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_LO_OFST 0
+#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_LO_LEN 4
+#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_LO_LBN 0
+#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_LO_WIDTH 32
#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_HI_OFST 4
+#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_HI_LEN 4
+#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_HI_LBN 32
+#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_HI_WIDTH 32
/* MC_CMD_GET_LICENSED_V3_APP_STATE_OUT msgresponse */
#define MC_CMD_GET_LICENSED_V3_APP_STATE_OUT_LEN 4
@@ -19560,6 +21128,7 @@
* operation or a reboot of the MC.) Used for V3 licensing (Medford)
*/
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES 0xd3
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_MSGSET 0xd3
#undef MC_CMD_0xd3_PRIVILEGE_CTG
#define MC_CMD_0xd3_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19572,7 +21141,13 @@
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_OFST 0
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_LEN 8
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_LO_OFST 0
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_LO_LEN 4
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_LO_LBN 0
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_LO_WIDTH 32
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_HI_OFST 4
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_HI_LEN 4
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_HI_LBN 32
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_HI_WIDTH 32
/* MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT msgresponse */
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_LEN 8
@@ -19580,7 +21155,13 @@
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_OFST 0
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_LEN 8
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_LO_OFST 0
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_LO_LEN 4
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_LO_LBN 0
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_LO_WIDTH 32
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_HI_OFST 4
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_HI_LEN 4
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_HI_LBN 32
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_HI_WIDTH 32
/***********************************/
@@ -19589,6 +21170,7 @@
* licensing.
*/
#define MC_CMD_LICENSED_APP_OP 0xf6
+#define MC_CMD_LICENSED_APP_OP_MSGSET 0xf6
#undef MC_CMD_0xf6_PRIVILEGE_CTG
#define MC_CMD_0xf6_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19672,6 +21254,7 @@
* (Medford)
*/
#define MC_CMD_LICENSED_V3_VALIDATE_APP 0xd4
+#define MC_CMD_LICENSED_V3_VALIDATE_APP_MSGSET 0xd4
#undef MC_CMD_0xd4_PRIVILEGE_CTG
#define MC_CMD_0xd4_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19685,7 +21268,13 @@
#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_OFST 48
#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_LEN 8
#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_LO_OFST 48
+#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_LO_LEN 4
+#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_LO_LBN 384
+#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_LO_WIDTH 32
#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_HI_OFST 52
+#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_HI_LEN 4
+#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_HI_LBN 416
+#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_HI_WIDTH 32
/* MC_CMD_LICENSED_V3_VALIDATE_APP_OUT msgresponse */
#define MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_LEN 116
@@ -19725,6 +21314,7 @@
* Mask features - V3 licensing (Medford)
*/
#define MC_CMD_LICENSED_V3_MASK_FEATURES 0xd5
+#define MC_CMD_LICENSED_V3_MASK_FEATURES_MSGSET 0xd5
#undef MC_CMD_0xd5_PRIVILEGE_CTG
#define MC_CMD_0xd5_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -19735,7 +21325,13 @@
#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_OFST 0
#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_LEN 8
#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_LO_OFST 0
+#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_LO_LEN 4
+#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_LO_LBN 0
+#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_LO_WIDTH 32
#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_HI_OFST 4
+#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_HI_LEN 4
+#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_HI_LBN 32
+#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_HI_WIDTH 32
/* whether to turn on or turn off the masked features */
#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_FLAG_OFST 8
#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_FLAG_LEN 4
@@ -19757,6 +21353,7 @@
* erased when the adapter is power cycled
*/
#define MC_CMD_LICENSING_V3_TEMPORARY 0xd6
+#define MC_CMD_LICENSING_V3_TEMPORARY_MSGSET 0xd6
#undef MC_CMD_0xd6_PRIVILEGE_CTG
#define MC_CMD_0xd6_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -19815,7 +21412,13 @@
#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_OFST 4
#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_LEN 8
#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_LO_OFST 4
+#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_LO_LEN 4
+#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_LO_LBN 32
+#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_LO_WIDTH 32
#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_HI_OFST 8
+#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_HI_LEN 4
+#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_HI_LBN 64
+#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_HI_WIDTH 32
/***********************************/
@@ -19827,6 +21430,7 @@
* delivered to a specific queue, or a set of queues with RSS.
*/
#define MC_CMD_SET_PORT_SNIFF_CONFIG 0xf7
+#define MC_CMD_SET_PORT_SNIFF_CONFIG_MSGSET 0xf7
#undef MC_CMD_0xf7_PRIVILEGE_CTG
#define MC_CMD_0xf7_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -19870,6 +21474,7 @@
* the configuration.
*/
#define MC_CMD_GET_PORT_SNIFF_CONFIG 0xf8
+#define MC_CMD_GET_PORT_SNIFF_CONFIG_MSGSET 0xf8
#undef MC_CMD_0xf8_PRIVILEGE_CTG
#define MC_CMD_0xf8_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19908,6 +21513,7 @@
* Change configuration related to the parser-dispatcher subsystem.
*/
#define MC_CMD_SET_PARSER_DISP_CONFIG 0xf9
+#define MC_CMD_SET_PARSER_DISP_CONFIG_MSGSET 0xf9
#undef MC_CMD_0xf9_PRIVILEGE_CTG
#define MC_CMD_0xf9_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19953,6 +21559,7 @@
* Read configuration related to the parser-dispatcher subsystem.
*/
#define MC_CMD_GET_PARSER_DISP_CONFIG 0xfa
+#define MC_CMD_GET_PARSER_DISP_CONFIG_MSGSET 0xfa
#undef MC_CMD_0xfa_PRIVILEGE_CTG
#define MC_CMD_0xfa_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19997,6 +21604,7 @@
* dedicated as TX sniff receivers.
*/
#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG 0xfb
+#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG_MSGSET 0xfb
#undef MC_CMD_0xfb_PRIVILEGE_CTG
#define MC_CMD_0xfb_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -20037,6 +21645,7 @@
* the configuration.
*/
#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG 0xfc
+#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG_MSGSET 0xfc
#undef MC_CMD_0xfc_PRIVILEGE_CTG
#define MC_CMD_0xfc_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -20072,6 +21681,7 @@
* Per queue rx error stats.
*/
#define MC_CMD_RMON_STATS_RX_ERRORS 0xfe
+#define MC_CMD_RMON_STATS_RX_ERRORS_MSGSET 0xfe
#undef MC_CMD_0xfe_PRIVILEGE_CTG
#define MC_CMD_0xfe_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -20104,6 +21714,7 @@
* Find out about available PCIE resources
*/
#define MC_CMD_GET_PCIE_RESOURCE_INFO 0xfd
+#define MC_CMD_GET_PCIE_RESOURCE_INFO_MSGSET 0xfd
#undef MC_CMD_0xfd_PRIVILEGE_CTG
#define MC_CMD_0xfd_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -20143,6 +21754,7 @@
* Find out about available port modes
*/
#define MC_CMD_GET_PORT_MODES 0xff
+#define MC_CMD_GET_PORT_MODES_MSGSET 0xff
#undef MC_CMD_0xff_PRIVILEGE_CTG
#define MC_CMD_0xff_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -20199,6 +21811,7 @@
* the new port mode, as the override does not affect PF configuration.
*/
#define MC_CMD_OVERRIDE_PORT_MODE 0x137
+#define MC_CMD_OVERRIDE_PORT_MODE_MSGSET 0x137
#undef MC_CMD_0x137_PRIVILEGE_CTG
#define MC_CMD_0x137_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -20223,6 +21836,7 @@
* Sample voltages on the ATB
*/
#define MC_CMD_READ_ATB 0x100
+#define MC_CMD_READ_ATB_MSGSET 0x100
#undef MC_CMD_0x100_PRIVILEGE_CTG
#define MC_CMD_0x100_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20253,6 +21867,7 @@
* enums here must correspond with those in MC_CMD_WORKAROUND.
*/
#define MC_CMD_GET_WORKAROUNDS 0x59
+#define MC_CMD_GET_WORKAROUNDS_MSGSET 0x59
#undef MC_CMD_0x59_PRIVILEGE_CTG
#define MC_CMD_0x59_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -20290,6 +21905,7 @@
* Read/set privileges of an arbitrary PCIe function
*/
#define MC_CMD_PRIVILEGE_MASK 0x5a
+#define MC_CMD_PRIVILEGE_MASK_MSGSET 0x5a
#undef MC_CMD_0x5a_PRIVILEGE_CTG
#define MC_CMD_0x5a_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -20351,6 +21967,20 @@
#define MC_CMD_PRIVILEGE_MASK_IN_GRP_ADMIN_TSA_UNBOUND 0x8000
/* enum: Control the Match-Action Engine if present. See mcdi_mae.yml. */
#define MC_CMD_PRIVILEGE_MASK_IN_GRP_MAE 0x10000
+/* enum: This Function/client may call MC_CMD_CLIENT_ALLOC to create new
+ * dynamic client children of itself.
+ */
+#define MC_CMD_PRIVILEGE_MASK_IN_GRP_ALLOC_CLIENT 0x20000
+/* enum: A dynamic client with this privilege may perform all the same DMA
+ * operations as the function client from which it is descended.
+ */
+#define MC_CMD_PRIVILEGE_MASK_IN_GRP_FUNC_DMA 0x40000
+/* enum: A client with this privilege may perform DMA as any PCIe function on
+ * the device and to on-device DDR. It allows clients to use TX-DESC2CMPT-DESC
+ * descriptors, and to use TX-SEG-DESC and TX-MEM2MEM-DESC with an address
+ * space override (i.e. with the ADDR_SPC_EN bit set).
+ */
+#define MC_CMD_PRIVILEGE_MASK_IN_GRP_ARBITRARY_DMA 0x80000
/* enum: Set this bit to indicate that a new privilege mask is to be set,
* otherwise the command will only read the existing mask.
*/
@@ -20368,6 +21998,7 @@
* Read/set link state mode of a VF
*/
#define MC_CMD_LINK_STATE_MODE 0x5c
+#define MC_CMD_LINK_STATE_MODE_MSGSET 0x5c
#undef MC_CMD_0x5c_PRIVILEGE_CTG
#define MC_CMD_0x5c_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -20407,6 +22038,7 @@
* parameter to MC_CMD_INIT_RXQ.
*/
#define MC_CMD_GET_SNAPSHOT_LENGTH 0x101
+#define MC_CMD_GET_SNAPSHOT_LENGTH_MSGSET 0x101
#undef MC_CMD_0x101_PRIVILEGE_CTG
#define MC_CMD_0x101_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -20429,6 +22061,7 @@
* Additional fuse diagnostics
*/
#define MC_CMD_FUSE_DIAGS 0x102
+#define MC_CMD_FUSE_DIAGS_MSGSET 0x102
#undef MC_CMD_0x102_PRIVILEGE_CTG
#define MC_CMD_0x102_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20483,6 +22116,7 @@
* included in one of the masks provided.
*/
#define MC_CMD_PRIVILEGE_MODIFY 0x60
+#define MC_CMD_PRIVILEGE_MODIFY_MSGSET 0x60
#undef MC_CMD_0x60_PRIVILEGE_CTG
#define MC_CMD_0x60_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -20527,6 +22161,7 @@
* Read XPM memory
*/
#define MC_CMD_XPM_READ_BYTES 0x103
+#define MC_CMD_XPM_READ_BYTES_MSGSET 0x103
#undef MC_CMD_0x103_PRIVILEGE_CTG
#define MC_CMD_0x103_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -20559,6 +22194,7 @@
* Write XPM memory
*/
#define MC_CMD_XPM_WRITE_BYTES 0x104
+#define MC_CMD_XPM_WRITE_BYTES_MSGSET 0x104
#undef MC_CMD_0x104_PRIVILEGE_CTG
#define MC_CMD_0x104_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20591,6 +22227,7 @@
* Read XPM sector
*/
#define MC_CMD_XPM_READ_SECTOR 0x105
+#define MC_CMD_XPM_READ_SECTOR_MSGSET 0x105
#undef MC_CMD_0x105_PRIVILEGE_CTG
#define MC_CMD_0x105_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20631,6 +22268,7 @@
* Write XPM sector
*/
#define MC_CMD_XPM_WRITE_SECTOR 0x106
+#define MC_CMD_XPM_WRITE_SECTOR_MSGSET 0x106
#undef MC_CMD_0x106_PRIVILEGE_CTG
#define MC_CMD_0x106_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20677,6 +22315,7 @@
* Invalidate XPM sector
*/
#define MC_CMD_XPM_INVALIDATE_SECTOR 0x107
+#define MC_CMD_XPM_INVALIDATE_SECTOR_MSGSET 0x107
#undef MC_CMD_0x107_PRIVILEGE_CTG
#define MC_CMD_0x107_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20696,6 +22335,7 @@
* Blank-check XPM memory and report bad locations
*/
#define MC_CMD_XPM_BLANK_CHECK 0x108
+#define MC_CMD_XPM_BLANK_CHECK_MSGSET 0x108
#undef MC_CMD_0x108_PRIVILEGE_CTG
#define MC_CMD_0x108_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20733,6 +22373,7 @@
* Blank-check and repair XPM memory
*/
#define MC_CMD_XPM_REPAIR 0x109
+#define MC_CMD_XPM_REPAIR_MSGSET 0x109
#undef MC_CMD_0x109_PRIVILEGE_CTG
#define MC_CMD_0x109_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20756,6 +22397,7 @@
* be performed on an unprogrammed part.
*/
#define MC_CMD_XPM_DECODER_TEST 0x10a
+#define MC_CMD_XPM_DECODER_TEST_MSGSET 0x10a
#undef MC_CMD_0x10a_PRIVILEGE_CTG
#define MC_CMD_0x10a_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20776,6 +22418,7 @@
* first available location to use, or fail with ENOSPC if none left.
*/
#define MC_CMD_XPM_WRITE_TEST 0x10b
+#define MC_CMD_XPM_WRITE_TEST_MSGSET 0x10b
#undef MC_CMD_0x10b_PRIVILEGE_CTG
#define MC_CMD_0x10b_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20797,6 +22440,7 @@
* does match, otherwise it will respond with success before it jumps to IMEM.
*/
#define MC_CMD_EXEC_SIGNED 0x10c
+#define MC_CMD_EXEC_SIGNED_MSGSET 0x10c
#undef MC_CMD_0x10c_PRIVILEGE_CTG
#define MC_CMD_0x10c_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -20827,6 +22471,7 @@
* MC_CMD_EXEC_SIGNED.
*/
#define MC_CMD_PREPARE_SIGNED 0x10d
+#define MC_CMD_PREPARE_SIGNED_MSGSET 0x10d
#undef MC_CMD_0x10d_PRIVILEGE_CTG
#define MC_CMD_0x10d_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -20850,6 +22495,7 @@
* will be removed once it is regarded as stable.
*/
#define MC_CMD_SET_SECURITY_RULE 0x10f
+#define MC_CMD_SET_SECURITY_RULE_MSGSET 0x10f
#undef MC_CMD_0x10f_PRIVILEGE_CTG
#define MC_CMD_0x10f_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -21040,6 +22686,7 @@
* development. This note will be removed once it is regarded as stable.
*/
#define MC_CMD_RESET_SECURITY_RULES 0x110
+#define MC_CMD_RESET_SECURITY_RULES_MSGSET 0x110
#undef MC_CMD_0x110_PRIVILEGE_CTG
#define MC_CMD_0x110_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -21066,6 +22713,7 @@
* will be removed once it is regarded as stable.
*/
#define MC_CMD_GET_SECURITY_RULESET_VERSION 0x111
+#define MC_CMD_GET_SECURITY_RULESET_VERSION_MSGSET 0x111
#undef MC_CMD_0x111_PRIVILEGE_CTG
#define MC_CMD_0x111_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -21096,6 +22744,7 @@
* removed once it is regarded as stable.
*/
#define MC_CMD_SECURITY_RULE_COUNTER_ALLOC 0x112
+#define MC_CMD_SECURITY_RULE_COUNTER_ALLOC_MSGSET 0x112
#undef MC_CMD_0x112_PRIVILEGE_CTG
#define MC_CMD_0x112_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -21134,6 +22783,7 @@
* removed once it is regarded as stable.
*/
#define MC_CMD_SECURITY_RULE_COUNTER_FREE 0x113
+#define MC_CMD_SECURITY_RULE_COUNTER_FREE_MSGSET 0x113
#undef MC_CMD_0x113_PRIVILEGE_CTG
#define MC_CMD_0x113_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -21169,6 +22819,7 @@
* will be removed once it is regarded as stable.
*/
#define MC_CMD_SUBNET_MAP_SET_NODE 0x114
+#define MC_CMD_SUBNET_MAP_SET_NODE_MSGSET 0x114
#undef MC_CMD_0x114_PRIVILEGE_CTG
#define MC_CMD_0x114_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -21224,6 +22875,7 @@
* will be removed once it is regarded as stable.
*/
#define MC_CMD_REMOTE_PORTRANGE_MAP_SET_TREE 0x115
+#define MC_CMD_REMOTE_PORTRANGE_MAP_SET_TREE_MSGSET 0x115
#undef MC_CMD_0x115_PRIVILEGE_CTG
#define MC_CMD_0x115_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -21258,6 +22910,7 @@
* will be removed once it is regarded as stable.
*/
#define MC_CMD_LOCAL_PORTRANGE_MAP_SET_TREE 0x116
+#define MC_CMD_LOCAL_PORTRANGE_MAP_SET_TREE_MSGSET 0x116
#undef MC_CMD_0x116_PRIVILEGE_CTG
#define MC_CMD_0x116_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -21311,6 +22964,7 @@
* cause all functions to see a reset. (Available on Medford only.)
*/
#define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS 0x117
+#define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_MSGSET 0x117
#undef MC_CMD_0x117_PRIVILEGE_CTG
#define MC_CMD_0x117_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -21357,6 +23011,7 @@
* priority.
*/
#define MC_CMD_RX_BALANCING 0x118
+#define MC_CMD_RX_BALANCING_MSGSET 0x118
#undef MC_CMD_0x118_PRIVILEGE_CTG
#define MC_CMD_0x118_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -21386,6 +23041,7 @@
* info in respect to the binding protocol.
*/
#define MC_CMD_TSA_BIND 0x119
+#define MC_CMD_TSA_BIND_MSGSET 0x119
#undef MC_CMD_0x119_PRIVILEGE_CTG
#define MC_CMD_0x119_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -21951,6 +23607,7 @@
* OP_GET_CACHED_VERSION. All other sub-operations are prohibited.
*/
#define MC_CMD_MANAGE_SECURITY_RULESET_CACHE 0x11a
+#define MC_CMD_MANAGE_SECURITY_RULESET_CACHE_MSGSET 0x11a
#undef MC_CMD_0x11a_PRIVILEGE_CTG
#define MC_CMD_0x11a_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -22007,6 +23664,7 @@
* if the tag is already present.
*/
#define MC_CMD_NVRAM_PRIVATE_APPEND 0x11c
+#define MC_CMD_NVRAM_PRIVATE_APPEND_MSGSET 0x11c
#undef MC_CMD_0x11c_PRIVILEGE_CTG
#define MC_CMD_0x11c_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -22041,6 +23699,7 @@
* correctly at ATE.
*/
#define MC_CMD_XPM_VERIFY_CONTENTS 0x11b
+#define MC_CMD_XPM_VERIFY_CONTENTS_MSGSET 0x11b
#undef MC_CMD_0x11b_PRIVILEGE_CTG
#define MC_CMD_0x11b_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -22084,6 +23743,7 @@
* and TMR_RELOAD_ACT_NS).
*/
#define MC_CMD_SET_EVQ_TMR 0x120
+#define MC_CMD_SET_EVQ_TMR_MSGSET 0x120
#undef MC_CMD_0x120_PRIVILEGE_CTG
#define MC_CMD_0x120_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -22122,6 +23782,7 @@
* Query properties about the event queue timers.
*/
#define MC_CMD_GET_EVQ_TMR_PROPERTIES 0x122
+#define MC_CMD_GET_EVQ_TMR_PROPERTIES_MSGSET 0x122
#undef MC_CMD_0x122_PRIVILEGE_CTG
#define MC_CMD_0x122_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -22191,6 +23852,7 @@
* non used switch buffers.
*/
#define MC_CMD_ALLOCATE_TX_VFIFO_CP 0x11d
+#define MC_CMD_ALLOCATE_TX_VFIFO_CP_MSGSET 0x11d
#undef MC_CMD_0x11d_PRIVILEGE_CTG
#define MC_CMD_0x11d_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -22198,7 +23860,8 @@
/* MC_CMD_ALLOCATE_TX_VFIFO_CP_IN msgrequest */
#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_LEN 20
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_INSTANCE_OFST 0
#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_INSTANCE_LEN 4
@@ -22243,6 +23906,7 @@
* previously allocated common pools.
*/
#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO 0x11e
+#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_MSGSET 0x11e
#undef MC_CMD_0x11e_PRIVILEGE_CTG
#define MC_CMD_0x11e_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -22296,6 +23960,7 @@
* ready to be re-used.
*/
#define MC_CMD_TEARDOWN_TX_VFIFO_VF 0x11f
+#define MC_CMD_TEARDOWN_TX_VFIFO_VF_MSGSET 0x11f
#undef MC_CMD_0x11f_PRIVILEGE_CTG
#define MC_CMD_0x11f_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -22316,6 +23981,7 @@
* it ready to be re-used.
*/
#define MC_CMD_DEALLOCATE_TX_VFIFO_CP 0x121
+#define MC_CMD_DEALLOCATE_TX_VFIFO_CP_MSGSET 0x121
#undef MC_CMD_0x121_PRIVILEGE_CTG
#define MC_CMD_0x121_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -22344,6 +24010,7 @@
* or 0 if there has not been a previous rekey.
*/
#define MC_CMD_REKEY 0x123
+#define MC_CMD_REKEY_MSGSET 0x123
#undef MC_CMD_0x123_PRIVILEGE_CTG
#define MC_CMD_0x123_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -22368,6 +24035,7 @@
* not yet assigned.
*/
#define MC_CMD_SWITCH_GET_UNASSIGNED_BUFFERS 0x124
+#define MC_CMD_SWITCH_GET_UNASSIGNED_BUFFERS_MSGSET 0x124
#undef MC_CMD_0x124_PRIVILEGE_CTG
#define MC_CMD_0x124_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -22396,6 +24064,7 @@
* the required bits were not set.
*/
#define MC_CMD_SET_SECURITY_FUSES 0x126
+#define MC_CMD_SET_SECURITY_FUSES_MSGSET 0x126
#undef MC_CMD_0x126_PRIVILEGE_CTG
#define MC_CMD_0x126_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -22438,6 +24107,7 @@
* SF-117371-SW
*/
#define MC_CMD_TSA_INFO 0x127
+#define MC_CMD_TSA_INFO_MSGSET 0x127
#undef MC_CMD_0x127_PRIVILEGE_CTG
#define MC_CMD_0x127_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -22614,6 +24284,7 @@
* Doxbox reference SF-117371-SW
*/
#define MC_CMD_HOST_INFO 0x128
+#define MC_CMD_HOST_INFO_MSGSET 0x128
#undef MC_CMD_0x128_PRIVILEGE_CTG
#define MC_CMD_0x128_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -22681,6 +24352,7 @@
* section 'Adapter Information'
*/
#define MC_CMD_TSAN_INFO 0x129
+#define MC_CMD_TSAN_INFO_MSGSET 0x129
#undef MC_CMD_0x129_PRIVILEGE_CTG
#define MC_CMD_0x129_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -22780,6 +24452,7 @@
* TSA adapter statistics operations.
*/
#define MC_CMD_TSA_STATISTICS 0x130
+#define MC_CMD_TSA_STATISTICS_MSGSET 0x130
#undef MC_CMD_0x130_PRIVILEGE_CTG
#define MC_CMD_0x130_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -22884,14 +24557,26 @@
#define MC_TSA_STATISTICS_ENTRY_TX_STAT_OFST 0
#define MC_TSA_STATISTICS_ENTRY_TX_STAT_LEN 8
#define MC_TSA_STATISTICS_ENTRY_TX_STAT_LO_OFST 0
+#define MC_TSA_STATISTICS_ENTRY_TX_STAT_LO_LEN 4
+#define MC_TSA_STATISTICS_ENTRY_TX_STAT_LO_LBN 0
+#define MC_TSA_STATISTICS_ENTRY_TX_STAT_LO_WIDTH 32
#define MC_TSA_STATISTICS_ENTRY_TX_STAT_HI_OFST 4
+#define MC_TSA_STATISTICS_ENTRY_TX_STAT_HI_LEN 4
+#define MC_TSA_STATISTICS_ENTRY_TX_STAT_HI_LBN 32
+#define MC_TSA_STATISTICS_ENTRY_TX_STAT_HI_WIDTH 32
#define MC_TSA_STATISTICS_ENTRY_TX_STAT_LBN 0
#define MC_TSA_STATISTICS_ENTRY_TX_STAT_WIDTH 64
/* Rx statistics counter */
#define MC_TSA_STATISTICS_ENTRY_RX_STAT_OFST 8
#define MC_TSA_STATISTICS_ENTRY_RX_STAT_LEN 8
#define MC_TSA_STATISTICS_ENTRY_RX_STAT_LO_OFST 8
+#define MC_TSA_STATISTICS_ENTRY_RX_STAT_LO_LEN 4
+#define MC_TSA_STATISTICS_ENTRY_RX_STAT_LO_LBN 64
+#define MC_TSA_STATISTICS_ENTRY_RX_STAT_LO_WIDTH 32
#define MC_TSA_STATISTICS_ENTRY_RX_STAT_HI_OFST 12
+#define MC_TSA_STATISTICS_ENTRY_RX_STAT_HI_LEN 4
+#define MC_TSA_STATISTICS_ENTRY_RX_STAT_HI_LBN 96
+#define MC_TSA_STATISTICS_ENTRY_RX_STAT_HI_WIDTH 32
#define MC_TSA_STATISTICS_ENTRY_RX_STAT_LBN 64
#define MC_TSA_STATISTICS_ENTRY_RX_STAT_WIDTH 64
@@ -22904,6 +24589,7 @@
* installing TSA binding certificates. See SF-117631-TC.
*/
#define MC_CMD_ERASE_INITIAL_NIC_SECRET 0x131
+#define MC_CMD_ERASE_INITIAL_NIC_SECRET_MSGSET 0x131
#undef MC_CMD_0x131_PRIVILEGE_CTG
#define MC_CMD_0x131_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -22921,6 +24607,7 @@
* NIC for TSA binding.
*/
#define MC_CMD_TSA_CONFIG 0x64
+#define MC_CMD_TSA_CONFIG_MSGSET 0x64
#undef MC_CMD_0x64_PRIVILEGE_CTG
#define MC_CMD_0x64_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -23038,6 +24725,7 @@
* to a TSA adapter.
*/
#define MC_CMD_TSA_IPADDR 0x65
+#define MC_CMD_TSA_IPADDR_MSGSET 0x65
#undef MC_CMD_0x65_PRIVILEGE_CTG
#define MC_CMD_0x65_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -23089,7 +24777,13 @@
#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_OFST 8
#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_LEN 8
#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_LO_OFST 8
+#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_LO_LEN 4
+#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_LO_LBN 64
+#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_LO_WIDTH 32
#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_HI_OFST 12
+#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_HI_LEN 4
+#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_HI_LBN 96
+#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_HI_WIDTH 32
#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_MINNUM 1
#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_MAXNUM 30
#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_MAXNUM_MCDI2 126
@@ -23119,7 +24813,13 @@
#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_OFST 8
#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_LEN 8
#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_LO_OFST 8
+#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_LO_LEN 4
+#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_LO_LBN 64
+#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_LO_WIDTH 32
#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_HI_OFST 12
+#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_HI_LEN 4
+#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_HI_LBN 96
+#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_HI_WIDTH 32
#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_MINNUM 1
#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_MAXNUM 30
#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_MAXNUM_MCDI2 126
@@ -23135,6 +24835,7 @@
* disabled.
*/
#define MC_CMD_SECURE_NIC_INFO 0x132
+#define MC_CMD_SECURE_NIC_INFO_MSGSET 0x132
#undef MC_CMD_0x132_PRIVILEGE_CTG
#define MC_CMD_0x132_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -23228,6 +24929,7 @@
* parameters in request or response.
*/
#define MC_CMD_TSA_TEST 0x125
+#define MC_CMD_TSA_TEST_MSGSET 0x125
#undef MC_CMD_0x125_PRIVILEGE_CTG
#define MC_CMD_0x125_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -23249,6 +24951,7 @@
* rule-set transitions.
*/
#define MC_CMD_TSA_RULESET_OVERRIDE 0x12a
+#define MC_CMD_TSA_RULESET_OVERRIDE_MSGSET 0x12a
#undef MC_CMD_0x12a_PRIVILEGE_CTG
#define MC_CMD_0x12a_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -23281,6 +24984,7 @@
* Specific usage is determined by the TYPE field.
*/
#define MC_CMD_TSAC_REQUEST 0x12b
+#define MC_CMD_TSAC_REQUEST_MSGSET 0x12b
#undef MC_CMD_0x12b_PRIVILEGE_CTG
#define MC_CMD_0x12b_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -23305,6 +25009,7 @@
* Get the version of the SUC
*/
#define MC_CMD_SUC_VERSION 0x134
+#define MC_CMD_SUC_VERSION_MSGSET 0x134
#undef MC_CMD_0x134_PRIVILEGE_CTG
#define MC_CMD_0x134_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -23350,6 +25055,7 @@
* Operations to support manftest on SUC based systems.
*/
#define MC_CMD_SUC_MANFTEST 0x135
+#define MC_CMD_SUC_MANFTEST_MSGSET 0x135
#undef MC_CMD_0x135_PRIVILEGE_CTG
#define MC_CMD_0x135_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -23546,6 +25252,7 @@
* Request a certificate.
*/
#define MC_CMD_GET_CERTIFICATE 0x12c
+#define MC_CMD_GET_CERTIFICATE_MSGSET 0x12c
#undef MC_CMD_0x12c_PRIVILEGE_CTG
#define MC_CMD_0x12c_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -23620,6 +25327,7 @@
* Get a global value which applies to all PCI functions
*/
#define MC_CMD_GET_NIC_GLOBAL 0x12d
+#define MC_CMD_GET_NIC_GLOBAL_MSGSET 0x12d
#undef MC_CMD_0x12d_PRIVILEGE_CTG
#define MC_CMD_0x12d_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -23647,6 +25355,7 @@
* appropriate error otherwise (see key descriptions).
*/
#define MC_CMD_SET_NIC_GLOBAL 0x12e
+#define MC_CMD_SET_NIC_GLOBAL_MSGSET 0x12e
#undef MC_CMD_0x12e_PRIVILEGE_CTG
#define MC_CMD_0x12e_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -23694,6 +25403,7 @@
* firmware buffer for later extraction.
*/
#define MC_CMD_LTSSM_TRACE_POLL 0x12f
+#define MC_CMD_LTSSM_TRACE_POLL_MSGSET 0x12f
#undef MC_CMD_0x12f_PRIVILEGE_CTG
#define MC_CMD_0x12f_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -23731,7 +25441,13 @@
#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_OFST 8
#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_LEN 8
#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_LO_OFST 8
+#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_LO_LEN 4
+#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_LO_LBN 64
+#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_LO_WIDTH 32
#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_HI_OFST 12
+#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_HI_LEN 4
+#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_HI_LBN 96
+#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_HI_WIDTH 32
#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_MINNUM 0
#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_MAXNUM 30
#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_MAXNUM_MCDI2 126
@@ -23765,6 +25481,7 @@
* firmware variant.
*/
#define MC_CMD_TELEMETRY_ENABLE 0x138
+#define MC_CMD_TELEMETRY_ENABLE_MSGSET 0x138
#undef MC_CMD_0x138_PRIVILEGE_CTG
#define MC_CMD_0x138_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -23856,6 +25573,7 @@
* Reference - SF-120569-SW Telemetry Firmware Design.
*/
#define MC_CMD_TELEMETRY_CONFIG 0x139
+#define MC_CMD_TELEMETRY_CONFIG_MSGSET 0x139
#undef MC_CMD_0x139_PRIVILEGE_CTG
#define MC_CMD_0x139_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -23925,6 +25643,7 @@
* due to resource constraints, returns ENOSPC.
*/
#define MC_CMD_GET_RX_PREFIX_ID 0x13b
+#define MC_CMD_GET_RX_PREFIX_ID_MSGSET 0x13b
#undef MC_CMD_0x13b_PRIVILEGE_CTG
#define MC_CMD_0x13b_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -23935,7 +25654,13 @@
#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_OFST 0
#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_LEN 8
#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_LO_OFST 0
+#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_LO_LEN 4
+#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_LO_LBN 0
+#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_LO_WIDTH 32
#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_HI_OFST 4
+#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_HI_LEN 4
+#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_HI_LBN 32
+#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_HI_WIDTH 32
#define MC_CMD_GET_RX_PREFIX_ID_IN_LENGTH_OFST 0
#define MC_CMD_GET_RX_PREFIX_ID_IN_LENGTH_LBN 0
#define MC_CMD_GET_RX_PREFIX_ID_IN_LENGTH_WIDTH 1
@@ -24056,6 +25781,7 @@
* created with that prefix id
*/
#define MC_CMD_QUERY_RX_PREFIX_ID 0x13c
+#define MC_CMD_QUERY_RX_PREFIX_ID_MSGSET 0x13c
#undef MC_CMD_0x13c_PRIVILEGE_CTG
#define MC_CMD_0x13c_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24092,6 +25818,7 @@
* A command to perform various bundle-related operations on insecure cards.
*/
#define MC_CMD_BUNDLE 0x13d
+#define MC_CMD_BUNDLE_MSGSET 0x13d
#undef MC_CMD_0x13d_PRIVILEGE_CTG
#define MC_CMD_0x13d_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -24154,6 +25881,7 @@
* Read all VPD starting from a given address
*/
#define MC_CMD_GET_VPD 0x165
+#define MC_CMD_GET_VPD_MSGSET 0x165
#undef MC_CMD_0x165_PRIVILEGE_CTG
#define MC_CMD_0x165_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24185,6 +25913,7 @@
* Provide information about the NC-SI stack
*/
#define MC_CMD_GET_NCSI_INFO 0x167
+#define MC_CMD_GET_NCSI_INFO_MSGSET 0x167
#undef MC_CMD_0x167_PRIVILEGE_CTG
#define MC_CMD_0x167_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24256,6 +25985,7 @@
* System lockdown, when enabled firmware updates are blocked.
*/
#define MC_CMD_FIRMWARE_SET_LOCKDOWN 0x16f
+#define MC_CMD_FIRMWARE_SET_LOCKDOWN_MSGSET 0x16f
#undef MC_CMD_0x16f_PRIVILEGE_CTG
#define MC_CMD_0x16f_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -24278,6 +26008,7 @@
* documentation.
*/
#define MC_CMD_GET_TEST_FEATURES 0x1ac
+#define MC_CMD_GET_TEST_FEATURES_MSGSET 0x1ac
#undef MC_CMD_0x1ac_PRIVILEGE_CTG
#define MC_CMD_0x1ac_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24300,6 +26031,253 @@
#define MC_CMD_GET_TEST_FEATURE_OUT_TEST_FEATURES_MAXNUM 63
#define MC_CMD_GET_TEST_FEATURE_OUT_TEST_FEATURES_MAXNUM_MCDI2 255
+
+/***********************************/
+/* MC_CMD_FPGA
+ * A command to perform various fpga-related operations on platforms that
+ * include FPGAs. Note that some platforms may only support a subset of these
+ * operations.
+ */
+#define MC_CMD_FPGA 0x1bf
+#define MC_CMD_FPGA_MSGSET 0x1bf
+#undef MC_CMD_0x1bf_PRIVILEGE_CTG
+
+#define MC_CMD_0x1bf_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_FPGA_IN msgrequest */
+#define MC_CMD_FPGA_IN_LEN 4
+/* Sub-command code */
+#define MC_CMD_FPGA_IN_OP_OFST 0
+#define MC_CMD_FPGA_IN_OP_LEN 4
+/* enum: Get the FPGA version string. */
+#define MC_CMD_FPGA_IN_OP_GET_VERSION 0x0
+/* enum: Read bitmask of features supported in the FPGA image. */
+#define MC_CMD_FPGA_IN_OP_GET_CAPABILITIES 0x1
+/* enum: Perform a FPGA reset. */
+#define MC_CMD_FPGA_IN_OP_RESET 0x2
+/* enum: Set active flash device. */
+#define MC_CMD_FPGA_IN_OP_SELECT_FLASH 0x3
+/* enum: Get active flash device. */
+#define MC_CMD_FPGA_IN_OP_GET_ACTIVE_FLASH 0x4
+/* enum: Configure internal link i.e. the FPGA port facing the ASIC. */
+#define MC_CMD_FPGA_IN_OP_SET_INTERNAL_LINK 0x5
+/* enum: Read internal link configuration. */
+#define MC_CMD_FPGA_IN_OP_GET_INTERNAL_LINK 0x6
+
+/* MC_CMD_FPGA_OP_GET_VERSION_IN msgrequest: Get the FPGA version string. A
+ * free-format string is returned in response to this command. Any checks on
+ * supported FPGA operations are based on the response to
+ * MC_CMD_FPGA_OP_GET_CAPABILITIES.
+ */
+#define MC_CMD_FPGA_OP_GET_VERSION_IN_LEN 4
+/* Sub-command code. Must be OP_GET_VERSION */
+#define MC_CMD_FPGA_OP_GET_VERSION_IN_OP_OFST 0
+#define MC_CMD_FPGA_OP_GET_VERSION_IN_OP_LEN 4
+
+/* MC_CMD_FPGA_OP_GET_VERSION_OUT msgresponse: Returns the version string. */
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_LENMIN 0
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_LENMAX 252
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_LENMAX_MCDI2 1020
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_LEN(num) (0+1*(num))
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_VERSION_NUM(len) (((len)-0)/1)
+/* Null-terminated string containing version information. */
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_VERSION_OFST 0
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_VERSION_LEN 1
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_VERSION_MINNUM 0
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_VERSION_MAXNUM 252
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_VERSION_MAXNUM_MCDI2 1020
+
+/* MC_CMD_FPGA_OP_GET_CAPABILITIES_IN msgrequest: Read bitmask of features
+ * supported in the FPGA image.
+ */
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_IN_LEN 4
+/* Sub-command code. Must be OP_GET_CAPABILITIES */
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_IN_OP_OFST 0
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_IN_OP_LEN 4
+
+/* MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT msgresponse: Returns the version string.
+ */
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_LEN 4
+/* Bit-mask of supported features. */
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_CAPABILITIES_OFST 0
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_CAPABILITIES_LEN 4
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_MAC_OFST 0
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_MAC_LBN 0
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_MAC_WIDTH 1
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_MAE_OFST 0
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_MAE_LBN 1
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_MAE_WIDTH 1
+
+/* MC_CMD_FPGA_OP_RESET_IN msgrequest: Perform a FPGA reset operation where
+ * supported.
+ */
+#define MC_CMD_FPGA_OP_RESET_IN_LEN 4
+/* Sub-command code. Must be OP_RESET */
+#define MC_CMD_FPGA_OP_RESET_IN_OP_OFST 0
+#define MC_CMD_FPGA_OP_RESET_IN_OP_LEN 4
+
+/* MC_CMD_FPGA_OP_RESET_OUT msgresponse */
+#define MC_CMD_FPGA_OP_RESET_OUT_LEN 0
+
+/* MC_CMD_FPGA_OP_SELECT_FLASH_IN msgrequest: Set active FPGA flash device.
+ * Returns EINVAL if selected flash index does not exist on the platform under
+ * test.
+ */
+#define MC_CMD_FPGA_OP_SELECT_FLASH_IN_LEN 8
+/* Sub-command code. Must be OP_SELECT_FLASH */
+#define MC_CMD_FPGA_OP_SELECT_FLASH_IN_OP_OFST 0
+#define MC_CMD_FPGA_OP_SELECT_FLASH_IN_OP_LEN 4
+/* Flash device identifier. */
+#define MC_CMD_FPGA_OP_SELECT_FLASH_IN_FLASH_ID_OFST 4
+#define MC_CMD_FPGA_OP_SELECT_FLASH_IN_FLASH_ID_LEN 4
+/* Enum values, see field(s): */
+/* MC_CMD_FPGA_FLASH_INDEX */
+
+/* MC_CMD_FPGA_OP_SELECT_FLASH_OUT msgresponse */
+#define MC_CMD_FPGA_OP_SELECT_FLASH_OUT_LEN 0
+
+/* MC_CMD_FPGA_OP_GET_ACTIVE_FLASH_IN msgrequest: Get active FPGA flash device.
+ */
+#define MC_CMD_FPGA_OP_GET_ACTIVE_FLASH_IN_LEN 4
+/* Sub-command code. Must be OP_GET_ACTIVE_FLASH */
+#define MC_CMD_FPGA_OP_GET_ACTIVE_FLASH_IN_OP_OFST 0
+#define MC_CMD_FPGA_OP_GET_ACTIVE_FLASH_IN_OP_LEN 4
+
+/* MC_CMD_FPGA_OP_GET_ACTIVE_FLASH_OUT msgresponse: Returns flash identifier
+ * for current active flash.
+ */
+#define MC_CMD_FPGA_OP_GET_ACTIVE_FLASH_OUT_LEN 4
+/* Flash device identifier. */
+#define MC_CMD_FPGA_OP_GET_ACTIVE_FLASH_OUT_FLASH_ID_OFST 0
+#define MC_CMD_FPGA_OP_GET_ACTIVE_FLASH_OUT_FLASH_ID_LEN 4
+/* Enum values, see field(s): */
+/* MC_CMD_FPGA_FLASH_INDEX */
+
+/* MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN msgrequest: Configure FPGA internal
+ * port, facing the ASIC
+ */
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_LEN 12
+/* Sub-command code. Must be OP_SET_INTERNAL_LINK */
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_OP_OFST 0
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_OP_LEN 4
+/* Flags */
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_FLAGS_OFST 4
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_FLAGS_LEN 4
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_LINK_STATE_OFST 4
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_LINK_STATE_LBN 0
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_LINK_STATE_WIDTH 2
+/* enum: Unmodified, same as last state set by firmware */
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_AUTO 0x0
+/* enum: Configure link-up */
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_UP 0x1
+/* enum: Configure link-down */
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_DOWN 0x2
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_FLUSH_OFST 4
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_FLUSH_LBN 2
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_FLUSH_WIDTH 1
+/* Link speed to be applied on FPGA internal port MAC. */
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_SPEED_OFST 8
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_SPEED_LEN 4
+
+/* MC_CMD_FPGA_OP_SET_INTERNAL_LINK_OUT msgresponse */
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_OUT_LEN 0
+
+/* MC_CMD_FPGA_OP_GET_INTERNAL_LINK_IN msgrequest: Read FPGA internal port
+ * configuration and status
+ */
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_IN_LEN 4
+/* Sub-command code. Must be OP_GET_INTERNAL_LINK */
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_IN_OP_OFST 0
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_IN_OP_LEN 4
+
+/* MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT msgresponse: Response format for read
+ * FPGA internal port configuration and status
+ */
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT_LEN 8
+/* Flags */
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT_FLAGS_OFST 0
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT_FLAGS_LEN 4
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT_LINK_STATE_OFST 0
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT_LINK_STATE_LBN 0
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT_LINK_STATE_WIDTH 2
+/* Enum values, see field(s): */
+/* MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN/FLAGS */
+/* Link speed set on FPGA internal port MAC. */
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT_SPEED_OFST 4
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT_SPEED_LEN 4
+
+
+/***********************************/
+/* MC_CMD_EXTERNAL_MAE_GET_LINK_MODE
+ * This command is expected to be used on a U25 board with an MAE in the FPGA.
+ * It does not modify the operational state of the NIC. The modes are described
+ * in XN-200039-TC - U25 OVS packet formats.
+ */
+#define MC_CMD_EXTERNAL_MAE_GET_LINK_MODE 0x1c0
+#define MC_CMD_EXTERNAL_MAE_GET_LINK_MODE_MSGSET 0x1c0
+#undef MC_CMD_0x1c0_PRIVILEGE_CTG
+
+#define MC_CMD_0x1c0_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_EXTERNAL_MAE_GET_LINK_MODE_IN msgrequest */
+#define MC_CMD_EXTERNAL_MAE_GET_LINK_MODE_IN_LEN 0
+
+/* MC_CMD_EXTERNAL_MAE_GET_LINK_MODE_OUT msgresponse */
+#define MC_CMD_EXTERNAL_MAE_GET_LINK_MODE_OUT_LEN 4
+/* The current link mode */
+#define MC_CMD_EXTERNAL_MAE_GET_LINK_MODE_OUT_MODE_OFST 0
+#define MC_CMD_EXTERNAL_MAE_GET_LINK_MODE_OUT_MODE_LEN 4
+/* Enum values, see field(s): */
+/* MC_CMD_EXTERNAL_MAE_LINK_MODE */
+
+
+/***********************************/
+/* MC_CMD_EXTERNAL_MAE_SET_LINK_MODE
+ * This command is expected to be used on a U25 board with an MAE in the FPGA.
+ * The modes are described in XN-200039-TC - U25 OVS packet formats. This
+ * command will set the link between the FPGA and the X2 to the specified new
+ * mode. It will first enter bootstrap mode, make sure there are no packets in
+ * flight and then enter the requested mode. In order to make sure there are no
+ * packets in flight, it will flush the X2 TX path, the FPGA RX path from the
+ * X2, the FPGA TX path to the X2 and the X2 RX path. The driver is responsible
+ * for making sure there are no TX or RX descriptors posted on any TXQ or RXQ
+ * associated with the affected port before invoking this command. This command
+ * is run implicitly with MODE set to LEGACY when MC_CMD_DRV_ATTACH is
+ * executed.
+ */
+#define MC_CMD_EXTERNAL_MAE_SET_LINK_MODE 0x1c1
+#define MC_CMD_EXTERNAL_MAE_SET_LINK_MODE_MSGSET 0x1c1
+#undef MC_CMD_0x1c1_PRIVILEGE_CTG
+
+#define MC_CMD_0x1c1_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_EXTERNAL_MAE_SET_LINK_MODE_IN msgrequest */
+#define MC_CMD_EXTERNAL_MAE_SET_LINK_MODE_IN_LEN 4
+/* The new link mode. */
+#define MC_CMD_EXTERNAL_MAE_SET_LINK_MODE_IN_MODE_OFST 0
+#define MC_CMD_EXTERNAL_MAE_SET_LINK_MODE_IN_MODE_LEN 4
+/* Enum values, see field(s): */
+/* MC_CMD_EXTERNAL_MAE_LINK_MODE */
+
+/* MC_CMD_EXTERNAL_MAE_SET_LINK_MODE_OUT msgresponse */
+#define MC_CMD_EXTERNAL_MAE_SET_LINK_MODE_OUT_LEN 0
+
+/* CLIENT_HANDLE structuredef: A client is an abstract entity that can make
+ * requests of the device and that can own resources managed by the device.
+ * Examples of clients include PCIe functions and dynamic clients. A client
+ * handle is a 32b opaque value used to refer to a client. Further details can
+ * be found within XN-200418-TC.
+ */
+#define CLIENT_HANDLE_LEN 4
+#define CLIENT_HANDLE_OPAQUE_OFST 0
+#define CLIENT_HANDLE_OPAQUE_LEN 4
+/* enum: A client handle guaranteed never to refer to a real client. */
+#define CLIENT_HANDLE_NULL 0xffffffff
+/* enum: Used to refer to the calling client. */
+#define CLIENT_HANDLE_SELF 0xfffffffe
+#define CLIENT_HANDLE_OPAQUE_LBN 0
+#define CLIENT_HANDLE_OPAQUE_WIDTH 32
+
/* CLOCK_INFO structuredef: Information about a single hardware clock */
#define CLOCK_INFO_LEN 28
/* Enumeration that uniquely identifies the clock */
@@ -24333,7 +26311,13 @@
#define CLOCK_INFO_FREQUENCY_OFST 4
#define CLOCK_INFO_FREQUENCY_LEN 8
#define CLOCK_INFO_FREQUENCY_LO_OFST 4
+#define CLOCK_INFO_FREQUENCY_LO_LEN 4
+#define CLOCK_INFO_FREQUENCY_LO_LBN 32
+#define CLOCK_INFO_FREQUENCY_LO_WIDTH 32
#define CLOCK_INFO_FREQUENCY_HI_OFST 8
+#define CLOCK_INFO_FREQUENCY_HI_LEN 4
+#define CLOCK_INFO_FREQUENCY_HI_LBN 64
+#define CLOCK_INFO_FREQUENCY_HI_WIDTH 32
#define CLOCK_INFO_FREQUENCY_LBN 32
#define CLOCK_INFO_FREQUENCY_WIDTH 64
/* Human-readable ASCII name for clock, with NUL termination */
@@ -24343,12 +26327,62 @@
#define CLOCK_INFO_NAME_LBN 96
#define CLOCK_INFO_NAME_WIDTH 8
+/* SCHED_CREDIT_CHECK_RESULT structuredef */
+#define SCHED_CREDIT_CHECK_RESULT_LEN 16
+/* The instance of the scheduler. Refer to XN-200389-AW for the location of
+ * these schedulers in the hardware.
+ */
+#define SCHED_CREDIT_CHECK_RESULT_SCHED_INSTANCE_OFST 0
+#define SCHED_CREDIT_CHECK_RESULT_SCHED_INSTANCE_LEN 1
+#define SCHED_CREDIT_CHECK_RESULT_HUB_HOST_A 0x0 /* enum */
+#define SCHED_CREDIT_CHECK_RESULT_HUB_NET_A 0x1 /* enum */
+#define SCHED_CREDIT_CHECK_RESULT_HUB_B 0x2 /* enum */
+#define SCHED_CREDIT_CHECK_RESULT_HUB_HOST_C 0x3 /* enum */
+#define SCHED_CREDIT_CHECK_RESULT_HUB_NET_TX 0x4 /* enum */
+#define SCHED_CREDIT_CHECK_RESULT_HUB_HOST_D 0x5 /* enum */
+#define SCHED_CREDIT_CHECK_RESULT_HUB_REPLAY 0x6 /* enum */
+#define SCHED_CREDIT_CHECK_RESULT_DMAC_H2C 0x7 /* enum */
+#define SCHED_CREDIT_CHECK_RESULT_SCHED_INSTANCE_LBN 0
+#define SCHED_CREDIT_CHECK_RESULT_SCHED_INSTANCE_WIDTH 8
+/* The type of node that this result refers to. */
+#define SCHED_CREDIT_CHECK_RESULT_NODE_TYPE_OFST 1
+#define SCHED_CREDIT_CHECK_RESULT_NODE_TYPE_LEN 1
+/* enum: Destination node */
+#define SCHED_CREDIT_CHECK_RESULT_DEST 0x0
+/* enum: Source node */
+#define SCHED_CREDIT_CHECK_RESULT_SOURCE 0x1
+#define SCHED_CREDIT_CHECK_RESULT_NODE_TYPE_LBN 8
+#define SCHED_CREDIT_CHECK_RESULT_NODE_TYPE_WIDTH 8
+/* Level of node in scheduler hierarchy (level 0 is the bottom of the
+ * hierarchy, increasing towards the root node).
+ */
+#define SCHED_CREDIT_CHECK_RESULT_NODE_LEVEL_OFST 2
+#define SCHED_CREDIT_CHECK_RESULT_NODE_LEVEL_LEN 2
+#define SCHED_CREDIT_CHECK_RESULT_NODE_LEVEL_LBN 16
+#define SCHED_CREDIT_CHECK_RESULT_NODE_LEVEL_WIDTH 16
+/* Node index */
+#define SCHED_CREDIT_CHECK_RESULT_NODE_INDEX_OFST 4
+#define SCHED_CREDIT_CHECK_RESULT_NODE_INDEX_LEN 4
+#define SCHED_CREDIT_CHECK_RESULT_NODE_INDEX_LBN 32
+#define SCHED_CREDIT_CHECK_RESULT_NODE_INDEX_WIDTH 32
+/* The number of credits the node is expected to have. */
+#define SCHED_CREDIT_CHECK_RESULT_EXPECTED_CREDITS_OFST 8
+#define SCHED_CREDIT_CHECK_RESULT_EXPECTED_CREDITS_LEN 4
+#define SCHED_CREDIT_CHECK_RESULT_EXPECTED_CREDITS_LBN 64
+#define SCHED_CREDIT_CHECK_RESULT_EXPECTED_CREDITS_WIDTH 32
+/* The number of credits the node actually had. */
+#define SCHED_CREDIT_CHECK_RESULT_ACTUAL_CREDITS_OFST 12
+#define SCHED_CREDIT_CHECK_RESULT_ACTUAL_CREDITS_LEN 4
+#define SCHED_CREDIT_CHECK_RESULT_ACTUAL_CREDITS_LBN 96
+#define SCHED_CREDIT_CHECK_RESULT_ACTUAL_CREDITS_WIDTH 32
+
/***********************************/
/* MC_CMD_GET_CLOCKS_INFO
* Get information about the device clocks
*/
#define MC_CMD_GET_CLOCKS_INFO 0x166
+#define MC_CMD_GET_CLOCKS_INFO_MSGSET 0x166
#undef MC_CMD_0x166_PRIVILEGE_CTG
#define MC_CMD_0x166_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24387,6 +26421,7 @@
* returns ENOSPC if the caller's table is full.
*/
#define MC_CMD_VNIC_ENCAP_RULE_ADD 0x16d
+#define MC_CMD_VNIC_ENCAP_RULE_ADD_MSGSET 0x16d
#undef MC_CMD_0x16d_PRIVILEGE_CTG
#define MC_CMD_0x16d_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24469,6 +26504,7 @@
* if the input HANDLE doesn't correspond to an existing rule.
*/
#define MC_CMD_VNIC_ENCAP_RULE_REMOVE 0x16e
+#define MC_CMD_VNIC_ENCAP_RULE_REMOVE_MSGSET 0x16e
#undef MC_CMD_0x16e_PRIVILEGE_CTG
#define MC_CMD_0x16e_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24508,303 +26544,568 @@
#define UUID_NODE_LBN 80
#define UUID_NODE_WIDTH 48
-/* MC_CMD_DEVEL_DUMP_VI_ENTRY structuredef */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_LEN 28
-/* Type of entry */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_TYPE_OFST 0
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_TYPE_LEN 4
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QDMA_SW_C2H 0x0 /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QDMA_SW_H2C 0x1 /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QDMA_HW_C2H 0x2 /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QDMA_HW_H2C 0x3 /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QDMA_CR_C2H 0x4 /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QDMA_CR_H2C 0x5 /* enum */
-/* enum: First QDMA writeback/completion queue. Used for ef100, C2H VDPA and
- * plain virtio.
- */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QDMA_WRB 0x6
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QDMA_PFTCH 0x7 /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_DMAC_H2C_QTBL 0x100 /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_DMAC_C2H_QTBL 0x101 /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_DMAC_H2C_VIO 0x10a /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_TYPE_LBN 0
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_TYPE_WIDTH 32
-/* Internal QDMA/dmac queue number for this entry */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QUEUE_NUMBER_OFST 4
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QUEUE_NUMBER_LEN 4
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QUEUE_NUMBER_LBN 32
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QUEUE_NUMBER_WIDTH 32
-/* Size of entry data */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_SIZE_OFST 8
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_SIZE_LEN 4
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_SIZE_LBN 64
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_SIZE_WIDTH 32
-/* Offset of entry data from start of MCDI message response payload */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_OFFSET_OFST 12
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_OFFSET_LEN 4
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_OFFSET_LBN 96
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_OFFSET_WIDTH 32
-/* Absolute VI of the entry, or 0xffffffff if not available/applicable */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_ABS_VI_OFST 16
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_ABS_VI_LEN 4
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_NO_ABS_VI 0xffffffff /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_ABS_VI_LBN 128
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_ABS_VI_WIDTH 32
-/* Reserved */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_RESERVED_OFST 20
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_RESERVED_LEN 8
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_RESERVED_LO_OFST 20
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_RESERVED_HI_OFST 24
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_RESERVED_LBN 160
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_RESERVED_WIDTH 64
-
-
-/***********************************/
-/* MC_CMD_DEVEL_DUMP_VI
- * Dump various parts of the hardware's state for a VI.
- */
-#define MC_CMD_DEVEL_DUMP_VI 0x1b5
-#undef MC_CMD_0x1b5_PRIVILEGE_CTG
-
-#define MC_CMD_0x1b5_PRIVILEGE_CTG SRIOV_CTG_GENERAL
-
-/* MC_CMD_DEVEL_DUMP_VI_IN msgrequest */
-#define MC_CMD_DEVEL_DUMP_VI_IN_LEN 4
-/* Absolute queue id of queue to dump state for */
-#define MC_CMD_DEVEL_DUMP_VI_IN_QID_OFST 0
-#define MC_CMD_DEVEL_DUMP_VI_IN_QID_LEN 4
-
-/* MC_CMD_DEVEL_DUMP_VI_IN_V2 msgrequest */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_LEN 20
-/* Which queue to dump. The meaning of this field dependes on ADDRESS_MODE. */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_ID_OFST 0
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_ID_LEN 4
-/* Method of referring to the queue to dump */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_ADDRESS_MODE_OFST 4
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_ADDRESS_MODE_LEN 4
-/* enum: First field refers to queue number as understood by QDMA/DMAC hardware
- */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_QUEUE_NUMBER 0x0
-/* enum: First field refers to absolute VI number */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_ABS_VI 0x1
-/* enum: First field refers to function-relative VI number on the command's
- * function
+/* PLUGIN_EXTENSION structuredef: Used within MC_CMD_PLUGIN_GET_ALL to describe
+ * an individual extension.
+ */
+#define PLUGIN_EXTENSION_LEN 20
+#define PLUGIN_EXTENSION_UUID_OFST 0
+#define PLUGIN_EXTENSION_UUID_LEN 16
+#define PLUGIN_EXTENSION_UUID_LBN 0
+#define PLUGIN_EXTENSION_UUID_WIDTH 128
+#define PLUGIN_EXTENSION_ADMIN_GROUP_OFST 16
+#define PLUGIN_EXTENSION_ADMIN_GROUP_LEN 1
+#define PLUGIN_EXTENSION_ADMIN_GROUP_LBN 128
+#define PLUGIN_EXTENSION_ADMIN_GROUP_WIDTH 8
+#define PLUGIN_EXTENSION_FLAG_ENABLED_LBN 136
+#define PLUGIN_EXTENSION_FLAG_ENABLED_WIDTH 1
+#define PLUGIN_EXTENSION_RESERVED_LBN 137
+#define PLUGIN_EXTENSION_RESERVED_WIDTH 23
+
+/* DESC_ADDR_REGION structuredef: Describes a contiguous region of DESC_ADDR
+ * space that maps to a contiguous region of TRGT_ADDR space. Addresses
+ * DESC_ADDR in the range [DESC_ADDR_BASE:DESC_ADDR_BASE + 1 <<
+ * WINDOW_SIZE_LOG2) map to TRGT_ADDR = DESC_ADDR - DESC_ADDR_BASE +
+ * TRGT_ADDR_BASE.
+ */
+#define DESC_ADDR_REGION_LEN 32
+/* The start of the region in DESC_ADDR space. */
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_OFST 0
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_LEN 8
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_LO_OFST 0
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_LO_LEN 4
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_LO_LBN 0
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_LO_WIDTH 32
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_HI_OFST 4
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_HI_LEN 4
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_HI_LBN 32
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_HI_WIDTH 32
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_LBN 0
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_WIDTH 64
+/* The start of the region in TRGT_ADDR space. Drivers can set this via
+ * MC_CMD_SET_DESC_ADDR_REGIONS.
+ */
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_OFST 8
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_LEN 8
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_LO_OFST 8
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_LO_LEN 4
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_LO_LBN 64
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_LO_WIDTH 32
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_HI_OFST 12
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_HI_LEN 4
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_HI_LBN 96
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_HI_WIDTH 32
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_LBN 64
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_WIDTH 64
+/* The size of the region. */
+#define DESC_ADDR_REGION_WINDOW_SIZE_LOG2_OFST 16
+#define DESC_ADDR_REGION_WINDOW_SIZE_LOG2_LEN 4
+#define DESC_ADDR_REGION_WINDOW_SIZE_LOG2_LBN 128
+#define DESC_ADDR_REGION_WINDOW_SIZE_LOG2_WIDTH 32
+/* The alignment restriction on TRGT_ADDR. TRGT_ADDR values set by the driver
+ * must be a multiple of 1 << TRGT_ADDR_ALIGN_LOG2.
+ */
+#define DESC_ADDR_REGION_TRGT_ADDR_ALIGN_LOG2_OFST 20
+#define DESC_ADDR_REGION_TRGT_ADDR_ALIGN_LOG2_LEN 4
+#define DESC_ADDR_REGION_TRGT_ADDR_ALIGN_LOG2_LBN 160
+#define DESC_ADDR_REGION_TRGT_ADDR_ALIGN_LOG2_WIDTH 32
+#define DESC_ADDR_REGION_RSVD_OFST 24
+#define DESC_ADDR_REGION_RSVD_LEN 8
+#define DESC_ADDR_REGION_RSVD_LO_OFST 24
+#define DESC_ADDR_REGION_RSVD_LO_LEN 4
+#define DESC_ADDR_REGION_RSVD_LO_LBN 192
+#define DESC_ADDR_REGION_RSVD_LO_WIDTH 32
+#define DESC_ADDR_REGION_RSVD_HI_OFST 28
+#define DESC_ADDR_REGION_RSVD_HI_LEN 4
+#define DESC_ADDR_REGION_RSVD_HI_LBN 224
+#define DESC_ADDR_REGION_RSVD_HI_WIDTH 32
+#define DESC_ADDR_REGION_RSVD_LBN 192
+#define DESC_ADDR_REGION_RSVD_WIDTH 64
+
+
+/***********************************/
+/* MC_CMD_GET_DESC_ADDR_INFO
+ * Returns a description of the mapping from DESC_ADDR to TRGT_ADDR for the calling function's address space.
+ */
+#define MC_CMD_GET_DESC_ADDR_INFO 0x1b7
+#define MC_CMD_GET_DESC_ADDR_INFO_MSGSET 0x1b7
+#undef MC_CMD_0x1b7_PRIVILEGE_CTG
+
+#define MC_CMD_0x1b7_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_GET_DESC_ADDR_INFO_IN msgrequest */
+#define MC_CMD_GET_DESC_ADDR_INFO_IN_LEN 0
+
+/* MC_CMD_GET_DESC_ADDR_INFO_OUT msgresponse */
+#define MC_CMD_GET_DESC_ADDR_INFO_OUT_LEN 4
+/* The type of mapping; see SF-nnnnnn-xx (EF100 driver writer's guide, once
+ * written) for details of each type.
+ */
+#define MC_CMD_GET_DESC_ADDR_INFO_OUT_MAPPING_TYPE_OFST 0
+#define MC_CMD_GET_DESC_ADDR_INFO_OUT_MAPPING_TYPE_LEN 4
+/* enum: TRGT_ADDR = DESC_ADDR */
+#define MC_CMD_GET_DESC_ADDR_INFO_OUT_MAPPING_FLAT 0x0
+/* enum: DESC_ADDR has one or more regions that map into TRGT_ADDR. The base
+ * TRGT_ADDR for each region is programmable via MCDI.
+ */
+#define MC_CMD_GET_DESC_ADDR_INFO_OUT_MAPPING_REGIONED 0x1
+
+
+/***********************************/
+/* MC_CMD_GET_DESC_ADDR_REGIONS
+ * Returns a list of the DESC_ADDR regions for the calling function's address space. Only valid if that function's address space has the REGIONED mapping from DESC_ADDR to TRGT_ADDR.
+ */
+#define MC_CMD_GET_DESC_ADDR_REGIONS 0x1b8
+#define MC_CMD_GET_DESC_ADDR_REGIONS_MSGSET 0x1b8
+#undef MC_CMD_0x1b8_PRIVILEGE_CTG
+
+#define MC_CMD_0x1b8_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_GET_DESC_ADDR_REGIONS_IN msgrequest */
+#define MC_CMD_GET_DESC_ADDR_REGIONS_IN_LEN 0
+
+/* MC_CMD_GET_DESC_ADDR_REGIONS_OUT msgresponse */
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_LENMIN 32
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_LENMAX 224
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_LENMAX_MCDI2 992
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_LEN(num) (0+32*(num))
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_REGIONS_NUM(len) (((len)-0)/32)
+/* An array of DESC_ADDR_REGION strutures. The number of entries in the array
+ * indicates the number of available regions.
+ */
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_REGIONS_OFST 0
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_REGIONS_LEN 32
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_REGIONS_MINNUM 1
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_REGIONS_MAXNUM 7
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_REGIONS_MAXNUM_MCDI2 31
+
+
+/***********************************/
+/* MC_CMD_SET_DESC_ADDR_REGIONS
+ * Set the base TRGT_ADDR for a set of DESC_ADDR regions for the calling function's address space. Only valid if that function's address space had the REGIONED mapping from DESC_ADDR to TRGT_ADDR.
+ */
+#define MC_CMD_SET_DESC_ADDR_REGIONS 0x1b9
+#define MC_CMD_SET_DESC_ADDR_REGIONS_MSGSET 0x1b9
+#undef MC_CMD_0x1b9_PRIVILEGE_CTG
+
+#define MC_CMD_0x1b9_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_SET_DESC_ADDR_REGIONS_IN msgrequest */
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_LENMIN 16
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_LENMAX 248
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_LENMAX_MCDI2 1016
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_LEN(num) (8+8*(num))
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_NUM(len) (((len)-8)/8)
+/* A bitmask indicating which regions should have their base TRGT_ADDR updated.
+ * To update the base TRGR_ADDR for a DESC_ADDR region, the corresponding bit
+ * should be set to 1.
+ */
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_SET_REGION_MASK_OFST 0
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_SET_REGION_MASK_LEN 4
+/* Reserved field; must be set to zero. */
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_RSVD_OFST 4
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_RSVD_LEN 4
+/* An array of values used to updated the base TRGT_ADDR for DESC_ADDR regions.
+ * Array indices corresponding to region numbers (i.e. the array is sparse, and
+ * included entries for regions even if the corresponding SET_REGION_MASK bit
+ * is zero).
*/
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_REL_VI 0x2
-/* enum: First field refers to function-relative VI number on a specified
- * function
- */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_REL_VI_PROXY 0x3
-/* Type of VI. Not needed if ADDRESS_MODE is QUEUE_NUMBER. */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_VI_TYPE_OFST 8
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_VI_TYPE_LEN 4
-/* enum: Return only entries used for ef100 queues (a single hardware queue) */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_EF100 0x0
-/* enum: Return entries used for virtio (Potentially two hardware queues,
- * depending on hardware implementation)
- */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_VIRTIO 0x1
-/* Only if ADDRESS_MODE is REL_VI_PROXY. Interface of function the queue is on.
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_OFST 8
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_LEN 8
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_LO_OFST 8
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_LO_LEN 4
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_LO_LBN 64
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_LO_WIDTH 32
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_HI_OFST 12
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_HI_LEN 4
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_HI_LBN 96
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_HI_WIDTH 32
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_MINNUM 1
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_MAXNUM 30
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_MAXNUM_MCDI2 126
+
+/* MC_CMD_SET_DESC_ADDR_REGIONS_OUT msgresponse */
+#define MC_CMD_SET_DESC_ADDR_REGIONS_OUT_LEN 0
+
+
+/***********************************/
+/* MC_CMD_CLIENT_CMD
+ * Execute an arbitrary MCDI command on behalf of a different client. The
+ * consequences of the command (e.g. ownership of any resources created) apply
+ * to the indicated client rather than the function client which actually sent
+ * this command. All inherent permission checks are also performed on the
+ * indicated client. The given client must be a descendant of the requestor.
+ * The command to be proxied follows immediately afterward in the host buffer
+ * (or on the UART). Chaining multiple MC_CMD_CLIENT_CMD is unnecessary and not
+ * supported. New dynamic clients may be created with MC_CMD_CLIENT_ALLOC.
*/
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_PCIE_INTERFACE_OFST 12
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_PCIE_INTERFACE_LEN 4
-/* Enum values, see field(s): */
-/* DEVEL_PCIE_INTERFACE */
-/* Only if ADDRESS_MODE is REL_VI_PROXY. PF number of the function the queue is
- * on.
- */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_PF_OFST 16
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_PF_LEN 2
-/* Only if ADDRESS_MODE is REL_VI_PROXY. VF number of the function the queue is
- * on.
- */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_VF_OFST 18
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_VF_LEN 2
-/* enum: The function is on a PF, not a VF. */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_VF_NULL 0xffff
-
-/* MC_CMD_DEVEL_DUMP_VI_OUT msgresponse */
-#define MC_CMD_DEVEL_DUMP_VI_OUT_LENMIN 4
-#define MC_CMD_DEVEL_DUMP_VI_OUT_LENMAX 252
-#define MC_CMD_DEVEL_DUMP_VI_OUT_LENMAX_MCDI2 1012
-#define MC_CMD_DEVEL_DUMP_VI_OUT_LEN(num) (0+1*(num))
-#define MC_CMD_DEVEL_DUMP_VI_OUT_DATA_NUM(len) (((len)-0)/1)
-/* Number of dump entries returned */
-#define MC_CMD_DEVEL_DUMP_VI_OUT_NUM_ENTRIES_OFST 0
-#define MC_CMD_DEVEL_DUMP_VI_OUT_NUM_ENTRIES_LEN 4
-#define MC_CMD_DEVEL_DUMP_VI_OUT_DATA_OFST 0
-#define MC_CMD_DEVEL_DUMP_VI_OUT_DATA_LBN 0
-#define MC_CMD_DEVEL_DUMP_VI_OUT_DATA_WIDTH 8
-#define MC_CMD_DEVEL_DUMP_VI_OUT_DATA_MINNUM 0
-#define MC_CMD_DEVEL_DUMP_VI_OUT_DATA_MAXNUM 252
-#define MC_CMD_DEVEL_DUMP_VI_OUT_DATA_MAXNUM_MCDI2 1020
-/* Array of MC_CMD_DEVEL_DUMP_VI_ENTRY structures of length NUM_ENTRIES */
-#define MC_CMD_DEVEL_DUMP_VI_OUT_ENTRIES_OFST 4
-#define MC_CMD_DEVEL_DUMP_VI_OUT_ENTRIES_LEN 28
-#define MC_CMD_DEVEL_DUMP_VI_OUT_ENTRIES_MINNUM 0
-#define MC_CMD_DEVEL_DUMP_VI_OUT_ENTRIES_MAXNUM 8
-#define MC_CMD_DEVEL_DUMP_VI_OUT_ENTRIES_MAXNUM_MCDI2 36
-
-/* MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY structuredef */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_LEN 16
-/* What register this is */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_REG_OFST 0
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_REG_LEN 4
-/* enum: Catchall for registers that aren't in this enum. Nothing should be in
- * this long-term
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_UNKNOWN 0xffffffff
-/* enum: S2IC Converter Debug Packet Counter register. Informs number of
- * packets passed through Converter.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_H2C_S2IC_DBG_PKT_CNT 0x0
-/* enum: IC2S Converter Debug Packet Counter register. Informs number of
- * packets passed through Converter.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_C2H_IC2S_DBG_PKT_CNT 0x1
-/* enum: Event Controller Tx path Debug register. Count of Moderator Tx events,
- * not incl D2C, VirtIO, Dproxy.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TX_DEBUG 0x2
-/* enum: Event Controller Rx path Debug register. Count of Moderator Rx events.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_RX_DEBUG 0x3
-/* enum: Event Controller Debug register. Count of Total EVC events. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TOTAL_DEBUG 0x4
-/* enum: Same info as EVC_RX_DEBUG; collected at different location in design
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_RX_EF100_DEBUG 0x5
-/* enum: Same info as EVC_TX_DEBUG; collected at different location in design
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TX_EF100_DEBUG 0x6
-/* enum: Event Controller Debug register. Count of Tx VirtIO events. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TX_VIRTIO_DEBUG 0x7
-/* enum: Event Controller Debug register. Count of Tx Descriptor Proxy events.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TX_DPRXY_DEBUG 0x8
-/* enum: Event Controller Debug register. Count of Tx VirtQ Descriptor Proxy
- * events.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TX_VIRTQ_DPRXY_DEBUG 0x9
-/* enum: Event Controller Debug register. Count of Tx Descriptor-to-Completion
- * events.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TX_D2C_DEBUG 0xa
-/* enum: Event Controller Debug register. Count of Tx VirtIO Descriptor-to-
- * Completion events.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TX_VIRTQ_D2C_DEBUG 0xb
-/* enum: Event Controller Debug register. Count of Tx Timestamp events. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TX_TSTAMP_DEBUG 0xc
-/* enum: Event Controller Debug register. Count of Rx EvQ Timeout events. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_RX_EVQ_TIMEOUT_DEBUG 0xd
-/* enum: Event Controller Debug register. Count of MC events. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_MC_DEBUG 0xe
-/* enum: Event Controller Debug register. Count of EQDMA VirtIO Control events.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_EQDMA_VIO_CTL_DEBUG 0xf
-/* enum: Counter of QDMA Dropped C2H packets. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_DMAC_C2H_DROP_CTR_REG 0x10
-/* enum: Number of packets received by c host fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_C_H_PACKETS_IN_TBL 0x11
-/* enum: Number of packets sent by c host fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_C_H_PACKETS_OUT_TBL 0x12
-/* enum: Number of packets received by c plugin fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_C_P_PACKETS_IN_TBL 0x13
-/* enum: Number of packets received by b host fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_B_H_PACKETS_IN_TBL 0x14
-/* enum: Number of packets received by b net fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_B_N_PACKETS_IN_TBL 0x15
-/* enum: Number of packets received by b host fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_B_PH_PACKETS_IN_TBL 0x16
-/* enum: Number of packets received by b net fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_B_PN_PACKETS_IN_TBL 0x17
-/* enum: Number of packets sent by b net fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_B_PACKETS_OUT_TBL 0x18
-/* enum: Number of packets received by c net fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_C_N_PACKETS_IN_TBL 0x19
-/* enum: Number of packets sent by c net fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_C_N_PACKETS_OUT_TBL 0x1a
-/* enum: Number of packets received by ha fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_HA_PACKETS_IN_TBL 0x1b
-/* enum: Number of packets received by ha host shadow fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_HA_PH_PACKETS_IN_TBL 0x1c
-/* enum: Number of packets received by ha fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_HA_PACKETS_OUT_TBL 0x1d
-/* enum: Number of packets received by d hub fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_D_PACKETS_IN_TBL 0x1e
-/* enum: Number of packets received by d hub plugin fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_D_P_PACKETS_IN_TBL 0x1f
-/* enum: Number of packets received by d hub plugin fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_D_O_PACKETS_IN_TBL 0x20
-/* enum: Number of packets sent to dmac. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_D_PACKETS_OUT_TBL 0x21
-/* enum: Number of packets received by na fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_NA_PACKETS_IN_TBL 0x22
-/* enum: Number of packets dropped by na fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_NA_PACKETS_DROPPED_TBL 0x23
-/* enum: Number of packets sent by na fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_NA_PACKETS_OUT_TBL 0x24
-/* enum: Number of packets received by rp hub fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_RP_PACKETS_IN_TBL 0x25
-/* enum: Number of packets removed from fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_RP_PACKETS_OUT_TBL 0x26
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_REG_LBN 0
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_REG_WIDTH 32
-/* If REG is a table, the table row. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_ROW_OFST 4
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_ROW_LEN 4
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_ROW_LBN 32
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_ROW_WIDTH 32
-/* Address of the register (as seen by the MC) */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_ADDRESS_OFST 8
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_ADDRESS_LEN 4
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_ADDRESS_LBN 64
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_ADDRESS_WIDTH 32
-/* Value of the register */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_VALUE_OFST 12
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_VALUE_LEN 4
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_VALUE_LBN 96
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_VALUE_WIDTH 32
-
-
-/***********************************/
-/* MC_CMD_DEVEL_DUMP_RHEAD_REGS
- * Dump an assortment of hopefully useful riverhead debug registers
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS 0x1b6
-#undef MC_CMD_0x1b6_PRIVILEGE_CTG
-
-#define MC_CMD_0x1b6_PRIVILEGE_CTG SRIOV_CTG_GENERAL
-
-/* MC_CMD_DEVEL_DUMP_RHEAD_REGS_IN msgrequest */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_IN_LEN 4
-/* Which page of registers to retrieve. Page 0 always exists, later pages may
- * also exist if there are too many registers to fit in a single mcdi response.
- * NUM_PAGES in the response will tell you how many there are.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_IN_PAGE_OFST 0
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_IN_PAGE_LEN 4
-
-/* MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT msgresponse */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_LENMIN 8
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_LENMAX 248
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_LENMAX_MCDI2 1016
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_LEN(num) (8+16*(num))
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_REGS_NUM(len) (((len)-8)/16)
-/* Number of registers dumped in this response */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_NUM_REGS_OFST 0
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_NUM_REGS_LEN 4
-/* How many pages of registers are available to extract */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_NUM_PAGES_OFST 4
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_NUM_PAGES_LEN 4
-/* Array of MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY structs, one for each register
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_REGS_OFST 8
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_REGS_LEN 16
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_REGS_MINNUM 0
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_REGS_MAXNUM 15
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_REGS_MAXNUM_MCDI2 63
+#define MC_CMD_CLIENT_CMD 0x1ba
+#define MC_CMD_CLIENT_CMD_MSGSET 0x1ba
+#undef MC_CMD_0x1ba_PRIVILEGE_CTG
+
+#define MC_CMD_0x1ba_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_CLIENT_CMD_IN msgrequest */
+#define MC_CMD_CLIENT_CMD_IN_LEN 4
+/* The client as which to execute the following command. */
+#define MC_CMD_CLIENT_CMD_IN_CLIENT_ID_OFST 0
+#define MC_CMD_CLIENT_CMD_IN_CLIENT_ID_LEN 4
+
+/* MC_CMD_CLIENT_CMD_OUT msgresponse */
+#define MC_CMD_CLIENT_CMD_OUT_LEN 0
+
+
+/***********************************/
+/* MC_CMD_CLIENT_ALLOC
+ * Create a new client object. Clients are a system for delineating NIC
+ * resource ownership, such that groups of resources may be torn down as a
+ * unit. See also MC_CMD_CLIENT_CMD. See XN-200265-TC for background, concepts
+ * and a glossary. Clients created by this command are known as "dynamic
+ * clients". The newly-created client is a child of the client which sent this
+ * command. The caller must have the GRP_ALLOC_CLIENT privilege. The new client
+ * initially has no permission to do anything; see
+ * MC_CMD_DEVEL_CLIENT_PRIVILEGE_MODIFY.
+ */
+#define MC_CMD_CLIENT_ALLOC 0x1bb
+#define MC_CMD_CLIENT_ALLOC_MSGSET 0x1bb
+#undef MC_CMD_0x1bb_PRIVILEGE_CTG
+
+#define MC_CMD_0x1bb_PRIVILEGE_CTG SRIOV_CTG_ALLOC_CLIENT
+
+/* MC_CMD_CLIENT_ALLOC_IN msgrequest */
+#define MC_CMD_CLIENT_ALLOC_IN_LEN 0
+
+/* MC_CMD_CLIENT_ALLOC_OUT msgresponse */
+#define MC_CMD_CLIENT_ALLOC_OUT_LEN 4
+/* The ID of the new client object which has been created. */
+#define MC_CMD_CLIENT_ALLOC_OUT_CLIENT_ID_OFST 0
+#define MC_CMD_CLIENT_ALLOC_OUT_CLIENT_ID_LEN 4
+
+
+/***********************************/
+/* MC_CMD_CLIENT_FREE
+ * Destroy and release an existing client object. All resources owned by that
+ * client (including its child clients, and thus all resources owned by the
+ * entire family tree) are freed.
+ */
+#define MC_CMD_CLIENT_FREE 0x1bc
+#define MC_CMD_CLIENT_FREE_MSGSET 0x1bc
+#undef MC_CMD_0x1bc_PRIVILEGE_CTG
+
+#define MC_CMD_0x1bc_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_CLIENT_FREE_IN msgrequest */
+#define MC_CMD_CLIENT_FREE_IN_LEN 4
+/* The ID of the client to be freed. This client must be a descendant of the
+ * requestor. A client cannot free itself.
+ */
+#define MC_CMD_CLIENT_FREE_IN_CLIENT_ID_OFST 0
+#define MC_CMD_CLIENT_FREE_IN_CLIENT_ID_LEN 4
+
+/* MC_CMD_CLIENT_FREE_OUT msgresponse */
+#define MC_CMD_CLIENT_FREE_OUT_LEN 0
+
+
+/***********************************/
+/* MC_CMD_SET_VI_USER
+ * Assign partial rights over this VI to another client. VIs have an 'owner'
+ * and a 'user'. The owner is the client which allocated the VI
+ * (MC_CMD_ALLOC_VIS) and cannot be changed. The user is the client which has
+ * permission to create queues and other resources on that VI. Initially
+ * user==owner, but the user can be changed by this command; the resources thus
+ * created are then owned by the user-client. Only the VI owner can call this
+ * command, and the request will fail if there are any outstanding child
+ * resources (e.g. queues) currently allocated from this VI.
+ */
+#define MC_CMD_SET_VI_USER 0x1be
+#define MC_CMD_SET_VI_USER_MSGSET 0x1be
+#undef MC_CMD_0x1be_PRIVILEGE_CTG
+
+#define MC_CMD_0x1be_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_SET_VI_USER_IN msgrequest */
+#define MC_CMD_SET_VI_USER_IN_LEN 8
+/* Function-relative VI number to modify. */
+#define MC_CMD_SET_VI_USER_IN_INSTANCE_OFST 0
+#define MC_CMD_SET_VI_USER_IN_INSTANCE_LEN 4
+/* Client ID to become the new user. This must be a descendant of the owning
+ * client, the owning client itself, or the special value MC_CMD_CLIENT_ID_SELF
+ * which is synonymous with the owning client.
+ */
+#define MC_CMD_SET_VI_USER_IN_CLIENT_ID_OFST 4
+#define MC_CMD_SET_VI_USER_IN_CLIENT_ID_LEN 4
+
+/* MC_CMD_SET_VI_USER_OUT msgresponse */
+#define MC_CMD_SET_VI_USER_OUT_LEN 0
+
+
+/***********************************/
+/* MC_CMD_GET_CLIENT_MAC_ADDRESSES
+ * A device reports a set of MAC addresses for each client to use, known as the
+ * "permanent MAC addresses". Those MAC addresses are provided by the client's
+ * administrator, e.g. via MC_CMD_SET_CLIENT_MAC_ADDRESSES, and are intended as
+ * a hint to that client which MAC address its administrator would like to use
+ * to identity itself. This API exists solely to allow communication of MAC
+ * address from administrator to adminstree, and has no inherent interaction
+ * with switching within the device. There is no guarantee that a client will
+ * be able to send traffic with a source MAC address taken from the list of MAC
+ * address reported, nor is there a guarantee that a client will be able to
+ * resource traffic with a destination MAC taken from the list of MAC
+ * addresses. Likewise, there is no guarantee that a client will not be able to
+ * use a MAC address not present in the list. Restrictions on switching are
+ * controlled either through the EVB API if operating in EVB mode, or via MAE
+ * rules if host software is directly managing the MAE. In order to allow
+ * tenants to use this API whilst a provider is using the EVB API, the MAC
+ * addresses reported by MC_CMD_GET_CLIENT_MAC_ADDRESSES will be augmented with
+ * any MAC addresses associated with the vPort assigned to the caller. In order
+ * to allow tenants to use the EVB API whilst a provider is using this API, if
+ * a client queries the MAC addresses for a vPort using the host_evb_port_id
+ * EVB_PORT_ASSIGNED, that list of MAC addresses will be augmented with the MAC
+ * addresses assigned to the calling client. This query can either be explicit
+ * (i.e. MC_CMD_VPORT_GET_MAC_ADDRESSES) or implicit (e.g. creation of a
+ * vAdaptor with a NULL/automatic MAC address). Changing the MAC address on a
+ * vAdaptor only affects VNIC steering filters; it has no effect on the MAC
+ * addresses assigned to the vAdaptor's owner. VirtIO clients behave as EVB
+ * clients. On VirtIO device reset, a vAdaptor is created with an automatic MAC
+ * address. Querying the VirtIO device's MAC address queries the underlying
+ * vAdaptor's MAC address. Setting the VirtIO device's MAC address sets the
+ * underlying vAdaptor's MAC addresses.
+ */
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES 0x1c4
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_MSGSET 0x1c4
+#undef MC_CMD_0x1c4_PRIVILEGE_CTG
+
+#define MC_CMD_0x1c4_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_GET_CLIENT_MAC_ADDRESSES_IN msgrequest */
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_IN_LEN 4
+/* A handle for the client for whom MAC address should be obtained. Use
+ * CLIENT_HANDLE_SELF to obtain the MAC addresses assigned to the calling
+ * client.
+ */
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_IN_CLIENT_HANDLE_OFST 0
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_IN_CLIENT_HANDLE_LEN 4
+
+/* MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT msgresponse */
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_LENMIN 0
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_LENMAX 252
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_LENMAX_MCDI2 1020
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_LEN(num) (0+6*(num))
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_MAC_ADDRS_NUM(len) (((len)-0)/6)
+/* An array of MAC addresses assigned to the client. */
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_MAC_ADDRS_OFST 0
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_MAC_ADDRS_LEN 6
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_MAC_ADDRS_MINNUM 0
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_MAC_ADDRS_MAXNUM 42
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_MAC_ADDRS_MAXNUM_MCDI2 170
+
+
+/***********************************/
+/* MC_CMD_SET_CLIENT_MAC_ADDRESSES
+ * Set the permanent MAC addresses for a client. The caller must by an
+ * administrator of the target client. See MC_CMD_GET_CLIENT_MAC_ADDRESSES for
+ * additional detail.
+ */
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES 0x1c5
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_MSGSET 0x1c5
+#undef MC_CMD_0x1c5_PRIVILEGE_CTG
+
+#define MC_CMD_0x1c5_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN msgrequest */
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_LENMIN 4
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_LENMAX 250
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_LENMAX_MCDI2 1018
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_LEN(num) (4+6*(num))
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_MAC_ADDRS_NUM(len) (((len)-4)/6)
+/* A handle for the client for whom MAC addresses should be set */
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_CLIENT_HANDLE_OFST 0
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_CLIENT_HANDLE_LEN 4
+/* An array of MAC addresses to assign to the client. */
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_MAC_ADDRS_OFST 4
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_MAC_ADDRS_LEN 6
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_MAC_ADDRS_MINNUM 0
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_MAC_ADDRS_MAXNUM 41
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_MAC_ADDRS_MAXNUM_MCDI2 169
+
+/* MC_CMD_SET_CLIENT_MAC_ADDRESSES_OUT msgresponse */
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_OUT_LEN 0
+
+
+/***********************************/
+/* MC_CMD_GET_BOARD_ATTR
+ * Retrieve physical build-level board attributes as configured at
+ * manufacturing stage. Fields originate from EEPROM and per-platform constants
+ * in firmware. Fields are used in development to identify/ differentiate
+ * boards based on build levels/parameters, and also in manufacturing to cross
+ * check "what was programmed in manufacturing" is same as "what firmware
+ * thinks has been programmed" as there are two layers to translation within
+ * firmware before the attributes reach this MCDI handler. Some parameters are
+ * retrieved as part of other commands and therefore not replicated here. See
+ * GET_VERSION_OUT.
+ */
+#define MC_CMD_GET_BOARD_ATTR 0x1c6
+#define MC_CMD_GET_BOARD_ATTR_MSGSET 0x1c6
+#undef MC_CMD_0x1c6_PRIVILEGE_CTG
+
+#define MC_CMD_0x1c6_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_GET_BOARD_ATTR_IN msgrequest */
+#define MC_CMD_GET_BOARD_ATTR_IN_LEN 0
+
+/* MC_CMD_GET_BOARD_ATTR_OUT msgresponse */
+#define MC_CMD_GET_BOARD_ATTR_OUT_LEN 16
+/* Defines board capabilities and validity of attributes returned in this
+ * response-message.
+ */
+#define MC_CMD_GET_BOARD_ATTR_OUT_FLAGS_OFST 0
+#define MC_CMD_GET_BOARD_ATTR_OUT_FLAGS_LEN 4
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_FAN_OFST 0
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_FAN_LBN 0
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_FAN_WIDTH 1
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_SOC_OFST 0
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_SOC_LBN 1
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_SOC_WIDTH 1
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_AUX_POWER_OFST 0
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_AUX_POWER_LBN 2
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_AUX_POWER_WIDTH 1
+#define MC_CMD_GET_BOARD_ATTR_OUT_ATTRIBUTES_OFST 4
+#define MC_CMD_GET_BOARD_ATTR_OUT_ATTRIBUTES_LEN 4
+#define MC_CMD_GET_BOARD_ATTR_OUT_SOC_EE_OFST 4
+#define MC_CMD_GET_BOARD_ATTR_OUT_SOC_EE_LBN 0
+#define MC_CMD_GET_BOARD_ATTR_OUT_SOC_EE_WIDTH 1
+#define MC_CMD_GET_BOARD_ATTR_OUT_SUC_EE_OFST 4
+#define MC_CMD_GET_BOARD_ATTR_OUT_SUC_EE_LBN 1
+#define MC_CMD_GET_BOARD_ATTR_OUT_SUC_EE_WIDTH 1
+#define MC_CMD_GET_BOARD_ATTR_OUT_FPGA_VOLTAGES_SUPPORTED_OFST 4
+#define MC_CMD_GET_BOARD_ATTR_OUT_FPGA_VOLTAGES_SUPPORTED_LBN 16
+#define MC_CMD_GET_BOARD_ATTR_OUT_FPGA_VOLTAGES_SUPPORTED_WIDTH 8
+/* enum: The FPGA voltage on the adapter can be set to low */
+#define MC_CMD_FPGA_VOLTAGE_LOW 0x0
+/* enum: The FPGA voltage on the adapter can be set to regular */
+#define MC_CMD_FPGA_VOLTAGE_REG 0x1
+/* enum: The FPGA voltage on the adapter can be set to high */
+#define MC_CMD_FPGA_VOLTAGE_HIGH 0x2
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_COUNT_OFST 4
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_COUNT_LBN 24
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_COUNT_WIDTH 8
+/* An array of cage types on the board */
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_OFST 8
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_LEN 1
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_NUM 8
+/* enum: The cages are not known */
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_UNKNOWN 0x0
+/* enum: The cages are SFP/SFP+ */
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_SFP 0x1
+/* enum: The cages are QSFP/QSFP+ */
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_QSFP 0x2
+
+
+/***********************************/
+/* MC_CMD_GET_SOC_STATE
+ * Retrieve current state of the System-on-Chip. This command is valid when
+ * MC_CMD_GET_BOARD_ATTR:HAS_SOC is set.
+ */
+#define MC_CMD_GET_SOC_STATE 0x1c7
+#define MC_CMD_GET_SOC_STATE_MSGSET 0x1c7
+#undef MC_CMD_0x1c7_PRIVILEGE_CTG
+
+#define MC_CMD_0x1c7_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_GET_SOC_STATE_IN msgrequest */
+#define MC_CMD_GET_SOC_STATE_IN_LEN 0
+
+/* MC_CMD_GET_SOC_STATE_OUT msgresponse */
+#define MC_CMD_GET_SOC_STATE_OUT_LEN 12
+/* Status flags for the SoC */
+#define MC_CMD_GET_SOC_STATE_OUT_FLAGS_OFST 0
+#define MC_CMD_GET_SOC_STATE_OUT_FLAGS_LEN 4
+#define MC_CMD_GET_SOC_STATE_OUT_SHOULD_THROTTLE_OFST 0
+#define MC_CMD_GET_SOC_STATE_OUT_SHOULD_THROTTLE_LBN 0
+#define MC_CMD_GET_SOC_STATE_OUT_SHOULD_THROTTLE_WIDTH 1
+#define MC_CMD_GET_SOC_STATE_OUT_OS_RECOVERY_REQUIRED_OFST 0
+#define MC_CMD_GET_SOC_STATE_OUT_OS_RECOVERY_REQUIRED_LBN 1
+#define MC_CMD_GET_SOC_STATE_OUT_OS_RECOVERY_REQUIRED_WIDTH 1
+#define MC_CMD_GET_SOC_STATE_OUT_WDT_FIRED_OFST 0
+#define MC_CMD_GET_SOC_STATE_OUT_WDT_FIRED_LBN 2
+#define MC_CMD_GET_SOC_STATE_OUT_WDT_FIRED_WIDTH 1
+/* Status fields for the SoC */
+#define MC_CMD_GET_SOC_STATE_OUT_ATTRIBUTES_OFST 4
+#define MC_CMD_GET_SOC_STATE_OUT_ATTRIBUTES_LEN 4
+#define MC_CMD_GET_SOC_STATE_OUT_RUN_STATE_OFST 4
+#define MC_CMD_GET_SOC_STATE_OUT_RUN_STATE_LBN 0
+#define MC_CMD_GET_SOC_STATE_OUT_RUN_STATE_WIDTH 8
+/* enum: Power on (set by SUC on power up) */
+#define MC_CMD_GET_SOC_STATE_OUT_SOC_BOOT 0x0
+/* enum: Running bootloader */
+#define MC_CMD_GET_SOC_STATE_OUT_SOC_BOOTLOADER 0x1
+/* enum: Bootloader has started OS. OS is booting */
+#define MC_CMD_GET_SOC_STATE_OUT_SOC_OS_START 0x2
+/* enum: OS is running */
+#define MC_CMD_GET_SOC_STATE_OUT_SOC_OS_RUNNING 0x3
+/* enum: Maintenance OS is running */
+#define MC_CMD_GET_SOC_STATE_OUT_SOC_OS_MAINTENANCE 0x4
+/* Number of SoC resets since power on */
+#define MC_CMD_GET_SOC_STATE_OUT_RESET_COUNT_OFST 8
+#define MC_CMD_GET_SOC_STATE_OUT_RESET_COUNT_LEN 4
+
+
+/***********************************/
+/* MC_CMD_CHECK_SCHEDULER_CREDITS
+ * For debugging purposes. For each source and destination node in the hardware
+ * schedulers, check whether the number of credits is as it should be. This
+ * should only be used when the NIC is idle, because collection is not atomic
+ * and because the expected credit counts are only meaningful when no traffic
+ * is flowing.
+ */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS 0x1c8
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_MSGSET 0x1c8
+#undef MC_CMD_0x1c8_PRIVILEGE_CTG
+
+#define MC_CMD_0x1c8_PRIVILEGE_CTG SRIOV_CTG_ADMIN
+
+/* MC_CMD_CHECK_SCHEDULER_CREDITS_IN msgrequest */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_IN_LEN 8
+/* Flags for the request */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_IN_FLAGS_OFST 0
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_IN_FLAGS_LEN 4
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_IN_REPORT_ALL_OFST 0
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_IN_REPORT_ALL_LBN 0
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_IN_REPORT_ALL_WIDTH 1
+/* If there are too many results to fit into an MCDI response, they're split
+ * into pages. This field specifies which (0-indexed) page to request. A
+ * request with PAGE=0 will snapshot the results, and subsequent requests with
+ * PAGE>0 will return data from the most recent snapshot. The GENERATION field
+ * in the response allows callers to verify that all responses correspond to
+ * the same snapshot.
+ */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_IN_PAGE_OFST 4
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_IN_PAGE_LEN 4
+
+/* MC_CMD_CHECK_SCHEDULER_CREDITS_OUT msgresponse */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_LENMIN 16
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_LENMAX 240
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_LENMAX_MCDI2 1008
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_LEN(num) (16+16*(num))
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_NUM(len) (((len)-16)/16)
+/* The total number of results (across all pages). */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_TOTAL_RESULTS_OFST 0
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_TOTAL_RESULTS_LEN 4
+/* The number of pages that the response is split across. */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_NUM_PAGES_OFST 4
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_NUM_PAGES_LEN 4
+/* The number of results in this response. */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_THIS_PAGE_OFST 8
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_THIS_PAGE_LEN 4
+/* Result generation count. Incremented any time a request is made with PAGE=0.
+ */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_GENERATION_OFST 12
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_GENERATION_LEN 4
+/* The results, as an array of SCHED_CREDIT_CHECK_RESULT structures. */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_OFST 16
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_LEN 16
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_MINNUM 0
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_MAXNUM 14
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_MAXNUM_MCDI2 62
/* FUNCTION_PERSONALITY structuredef: The meanings of the personalities are
* defined in SF-120734-TC with more information in SF-122717-TC.
@@ -24839,6 +27140,7 @@
* Get a list of the virtio features supported by the device.
*/
#define MC_CMD_VIRTIO_GET_FEATURES 0x168
+#define MC_CMD_VIRTIO_GET_FEATURES_MSGSET 0x168
#undef MC_CMD_0x168_PRIVILEGE_CTG
#define MC_CMD_0x168_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24867,7 +27169,13 @@
#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_OFST 0
#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_LEN 8
#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_LO_OFST 0
+#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_LO_LEN 4
+#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_LO_LBN 0
+#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_LO_WIDTH 32
#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_HI_OFST 4
+#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_HI_LEN 4
+#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_HI_LBN 32
+#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_HI_WIDTH 32
/***********************************/
@@ -24877,6 +27185,7 @@
* the driver fails to request a feature which the device requires.
*/
#define MC_CMD_VIRTIO_TEST_FEATURES 0x169
+#define MC_CMD_VIRTIO_TEST_FEATURES_MSGSET 0x169
#undef MC_CMD_0x169_PRIVILEGE_CTG
#define MC_CMD_0x169_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24898,7 +27207,13 @@
#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_OFST 8
#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_LEN 8
#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_LO_OFST 8
+#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_LO_LEN 4
+#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_LO_LBN 64
+#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_LO_WIDTH 32
#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_HI_OFST 12
+#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_HI_LEN 4
+#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_HI_LBN 96
+#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_HI_WIDTH 32
/* MC_CMD_VIRTIO_TEST_FEATURES_OUT msgresponse */
#define MC_CMD_VIRTIO_TEST_FEATURES_OUT_LEN 0
@@ -24912,6 +27227,7 @@
* invalid.
*/
#define MC_CMD_VIRTIO_INIT_QUEUE 0x16a
+#define MC_CMD_VIRTIO_INIT_QUEUE_MSGSET 0x16a
#undef MC_CMD_0x16a_PRIVILEGE_CTG
#define MC_CMD_0x16a_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24956,17 +27272,35 @@
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_OFST 16
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_LEN 8
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_LO_OFST 16
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_LO_LEN 4
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_LO_LBN 128
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_LO_WIDTH 32
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_HI_OFST 20
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_HI_LEN 4
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_HI_LBN 160
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_HI_WIDTH 32
/* Address of the available ring in the virtqueue. */
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_OFST 24
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_LEN 8
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_LO_OFST 24
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_LO_LEN 4
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_LO_LBN 192
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_LO_WIDTH 32
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_HI_OFST 28
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_HI_LEN 4
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_HI_LBN 224
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_HI_WIDTH 32
/* Address of the used ring in the virtqueue. */
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_OFST 32
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_LEN 8
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_LO_OFST 32
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_LO_LEN 4
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_LO_LBN 256
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_LO_WIDTH 32
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_HI_OFST 36
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_HI_LEN 4
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_HI_LBN 288
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_HI_WIDTH 32
/* PASID to use on PCIe transactions involving this queue. Ignored if the
* USE_PASID flag is not set.
*/
@@ -24990,7 +27324,13 @@
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_OFST 48
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_LEN 8
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_LO_OFST 48
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_LO_LEN 4
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_LO_LBN 384
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_LO_WIDTH 32
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_HI_OFST 52
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_HI_LEN 4
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_HI_LBN 416
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_HI_WIDTH 32
/* Enum values, see field(s): */
/* MC_CMD_VIRTIO_GET_FEATURES/MC_CMD_VIRTIO_GET_FEATURES_OUT/FEATURES */
/* The initial producer index for this queue's used ring. If this queue is
@@ -25023,6 +27363,7 @@
* Destroy a virtio virtqueue
*/
#define MC_CMD_VIRTIO_FINI_QUEUE 0x16b
+#define MC_CMD_VIRTIO_FINI_QUEUE_MSGSET 0x16b
#undef MC_CMD_0x16b_PRIVILEGE_CTG
#define MC_CMD_0x16b_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -25063,6 +27404,7 @@
* queue(s) to be allocated.
*/
#define MC_CMD_VIRTIO_GET_DOORBELL_OFFSET 0x16c
+#define MC_CMD_VIRTIO_GET_DOORBELL_OFFSET_MSGSET 0x16c
#undef MC_CMD_0x16c_PRIVILEGE_CTG
#define MC_CMD_0x16c_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -25132,12 +27474,18 @@
#define PCIE_FUNCTION_VF_NULL 0xffff
#define PCIE_FUNCTION_VF_LBN 16
#define PCIE_FUNCTION_VF_WIDTH 16
-/* PCIe interface of the function */
+/* PCIe interface of the function. Values should be taken from the
+ * PCIE_INTERFACE enum
+ */
#define PCIE_FUNCTION_INTF_OFST 4
#define PCIE_FUNCTION_INTF_LEN 4
-/* enum: Host PCIe interface */
+/* enum: Host PCIe interface. (Alias for HOST_PRIMARY, provided for backwards
+ * compatibility)
+ */
#define PCIE_FUNCTION_INTF_HOST 0x0
-/* enum: Application Processor interface */
+/* enum: Application Processor interface (alias for NIC_EMBEDDED, provided for
+ * backwards compatibility)
+ */
#define PCIE_FUNCTION_INTF_AP 0x1
#define PCIE_FUNCTION_INTF_LBN 32
#define PCIE_FUNCTION_INTF_WIDTH 32
@@ -25157,6 +27505,7 @@
* MC_CMD_DESC_PROXY_FUNC_COMMIT_IN.
*/
#define MC_CMD_DESC_PROXY_FUNC_CREATE 0x172
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_MSGSET 0x172
#undef MC_CMD_0x172_PRIVILEGE_CTG
#define MC_CMD_0x172_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25170,7 +27519,19 @@
#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_OFST 0
#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_LEN 8
#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_LO_OFST 0
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_LO_LEN 4
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_LO_LBN 0
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_LO_WIDTH 32
#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_HI_OFST 4
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_HI_LEN 4
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_HI_LBN 32
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_HI_WIDTH 32
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_PF_OFST 0
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_PF_LEN 2
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_VF_OFST 2
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_VF_LEN 2
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_INTF_OFST 4
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_INTF_LEN 4
/* The personality to set. The meanings of the personalities are defined in
* SF-120734-TC with more information in SF-122717-TC. At present, we only
* support proxying for VIRTIO_BLK
@@ -25194,7 +27555,19 @@
#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_OFST 4
#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_LEN 8
#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_LO_OFST 4
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_LO_LEN 4
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_LO_LBN 32
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_LO_WIDTH 32
#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_HI_OFST 8
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_HI_LEN 4
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_HI_LBN 64
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_HI_WIDTH 32
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_PF_OFST 4
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_PF_LEN 2
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_VF_OFST 6
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_VF_LEN 2
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_INTF_OFST 8
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_INTF_LEN 4
/***********************************/
@@ -25205,6 +27578,7 @@
* ownership is released.
*/
#define MC_CMD_DESC_PROXY_FUNC_DESTROY 0x173
+#define MC_CMD_DESC_PROXY_FUNC_DESTROY_MSGSET 0x173
#undef MC_CMD_0x173_PRIVILEGE_CTG
#define MC_CMD_0x173_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25235,7 +27609,13 @@
#define VIRTIO_BLK_CONFIG_FEATURES_OFST 0
#define VIRTIO_BLK_CONFIG_FEATURES_LEN 8
#define VIRTIO_BLK_CONFIG_FEATURES_LO_OFST 0
+#define VIRTIO_BLK_CONFIG_FEATURES_LO_LEN 4
+#define VIRTIO_BLK_CONFIG_FEATURES_LO_LBN 0
+#define VIRTIO_BLK_CONFIG_FEATURES_LO_WIDTH 32
#define VIRTIO_BLK_CONFIG_FEATURES_HI_OFST 4
+#define VIRTIO_BLK_CONFIG_FEATURES_HI_LEN 4
+#define VIRTIO_BLK_CONFIG_FEATURES_HI_LBN 32
+#define VIRTIO_BLK_CONFIG_FEATURES_HI_WIDTH 32
#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_BARRIER_OFST 0
#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_BARRIER_LBN 0
#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_BARRIER_WIDTH 1
@@ -25308,7 +27688,13 @@
#define VIRTIO_BLK_CONFIG_CAPACITY_OFST 8
#define VIRTIO_BLK_CONFIG_CAPACITY_LEN 8
#define VIRTIO_BLK_CONFIG_CAPACITY_LO_OFST 8
+#define VIRTIO_BLK_CONFIG_CAPACITY_LO_LEN 4
+#define VIRTIO_BLK_CONFIG_CAPACITY_LO_LBN 64
+#define VIRTIO_BLK_CONFIG_CAPACITY_LO_WIDTH 32
#define VIRTIO_BLK_CONFIG_CAPACITY_HI_OFST 12
+#define VIRTIO_BLK_CONFIG_CAPACITY_HI_LEN 4
+#define VIRTIO_BLK_CONFIG_CAPACITY_HI_LBN 96
+#define VIRTIO_BLK_CONFIG_CAPACITY_HI_WIDTH 32
#define VIRTIO_BLK_CONFIG_CAPACITY_LBN 64
#define VIRTIO_BLK_CONFIG_CAPACITY_WIDTH 64
/* Maximum size of any single segment. Only valid when VIRTIO_BLK_F_SIZE_MAX is
@@ -25445,6 +27831,7 @@
* not persisted until the caller commits with MC_CMD_DESC_PROXY_FUNC_COMMIT_IN
*/
#define MC_CMD_DESC_PROXY_FUNC_CONFIG_SET 0x174
+#define MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_MSGSET 0x174
#undef MC_CMD_0x174_PRIVILEGE_CTG
#define MC_CMD_0x174_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25485,6 +27872,7 @@
* delivered to callers MCDI event queue.
*/
#define MC_CMD_DESC_PROXY_FUNC_COMMIT 0x175
+#define MC_CMD_DESC_PROXY_FUNC_COMMIT_MSGSET 0x175
#undef MC_CMD_0x175_PRIVILEGE_CTG
#define MC_CMD_0x175_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25518,6 +27906,7 @@
* cycle. Returns ENODEV if no function with given label exists.
*/
#define MC_CMD_DESC_PROXY_FUNC_OPEN 0x176
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_MSGSET 0x176
#undef MC_CMD_0x176_PRIVILEGE_CTG
#define MC_CMD_0x176_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25543,7 +27932,19 @@
#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_OFST 4
#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_LEN 8
#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_LO_OFST 4
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_LO_LEN 4
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_LO_LBN 32
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_LO_WIDTH 32
#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_HI_OFST 8
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_HI_LEN 4
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_HI_LBN 64
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_HI_WIDTH 32
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_PF_OFST 4
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_PF_LEN 2
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_VF_OFST 6
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_VF_LEN 2
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_INTF_OFST 8
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_INTF_LEN 4
/* Function personality */
#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_PERSONALITY_OFST 12
#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_PERSONALITY_LEN 4
@@ -25588,6 +27989,7 @@
* error (for virtio, DEVICE_NEEDS_RESET flag would be set on the host side)
*/
#define MC_CMD_DESC_PROXY_FUNC_CLOSE 0x1a1
+#define MC_CMD_DESC_PROXY_FUNC_CLOSE_MSGSET 0x1a1
#undef MC_CMD_0x1a1_PRIVILEGE_CTG
#define MC_CMD_0x1a1_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25607,9 +28009,27 @@
#define DESC_PROXY_FUNC_MAP_FUNC_OFST 0
#define DESC_PROXY_FUNC_MAP_FUNC_LEN 8
#define DESC_PROXY_FUNC_MAP_FUNC_LO_OFST 0
+#define DESC_PROXY_FUNC_MAP_FUNC_LO_LEN 4
+#define DESC_PROXY_FUNC_MAP_FUNC_LO_LBN 0
+#define DESC_PROXY_FUNC_MAP_FUNC_LO_WIDTH 32
#define DESC_PROXY_FUNC_MAP_FUNC_HI_OFST 4
+#define DESC_PROXY_FUNC_MAP_FUNC_HI_LEN 4
+#define DESC_PROXY_FUNC_MAP_FUNC_HI_LBN 32
+#define DESC_PROXY_FUNC_MAP_FUNC_HI_WIDTH 32
#define DESC_PROXY_FUNC_MAP_FUNC_LBN 0
#define DESC_PROXY_FUNC_MAP_FUNC_WIDTH 64
+#define DESC_PROXY_FUNC_MAP_FUNC_PF_OFST 0
+#define DESC_PROXY_FUNC_MAP_FUNC_PF_LEN 2
+#define DESC_PROXY_FUNC_MAP_FUNC_PF_LBN 0
+#define DESC_PROXY_FUNC_MAP_FUNC_PF_WIDTH 16
+#define DESC_PROXY_FUNC_MAP_FUNC_VF_OFST 2
+#define DESC_PROXY_FUNC_MAP_FUNC_VF_LEN 2
+#define DESC_PROXY_FUNC_MAP_FUNC_VF_LBN 16
+#define DESC_PROXY_FUNC_MAP_FUNC_VF_WIDTH 16
+#define DESC_PROXY_FUNC_MAP_FUNC_INTF_OFST 4
+#define DESC_PROXY_FUNC_MAP_FUNC_INTF_LEN 4
+#define DESC_PROXY_FUNC_MAP_FUNC_INTF_LBN 32
+#define DESC_PROXY_FUNC_MAP_FUNC_INTF_WIDTH 32
/* Function personality */
#define DESC_PROXY_FUNC_MAP_PERSONALITY_OFST 8
#define DESC_PROXY_FUNC_MAP_PERSONALITY_LEN 4
@@ -25631,6 +28051,7 @@
* Enumerate existing descriptor proxy functions
*/
#define MC_CMD_DESC_PROXY_FUNC_ENUM 0x177
+#define MC_CMD_DESC_PROXY_FUNC_ENUM_MSGSET 0x177
#undef MC_CMD_0x177_PRIVILEGE_CTG
#define MC_CMD_0x177_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25670,6 +28091,7 @@
* function.
*/
#define MC_CMD_DESC_PROXY_FUNC_ENABLE 0x178
+#define MC_CMD_DESC_PROXY_FUNC_ENABLE_MSGSET 0x178
#undef MC_CMD_0x178_PRIVILEGE_CTG
#define MC_CMD_0x178_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25702,6 +28124,7 @@
* Disable descriptor proxying for function
*/
#define MC_CMD_DESC_PROXY_FUNC_DISABLE 0x179
+#define MC_CMD_DESC_PROXY_FUNC_DISABLE_MSGSET 0x179
#undef MC_CMD_0x179_PRIVILEGE_CTG
#define MC_CMD_0x179_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25725,6 +28148,7 @@
* descriptors.
*/
#define MC_CMD_GET_ADDR_SPC_ID 0x1a0
+#define MC_CMD_GET_ADDR_SPC_ID_MSGSET 0x1a0
#undef MC_CMD_0x1a0_PRIVILEGE_CTG
#define MC_CMD_0x1a0_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25769,7 +28193,19 @@
#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_OFST 4
#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_LEN 8
#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_LO_OFST 4
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_LO_LEN 4
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_LO_LBN 32
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_LO_WIDTH 32
#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_HI_OFST 8
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_HI_LEN 4
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_HI_LBN 64
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_HI_WIDTH 32
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_PF_OFST 4
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_PF_LEN 2
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_VF_OFST 6
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_VF_LEN 2
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_INTF_OFST 8
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_INTF_LEN 4
/* PASID value. Only valid if TYPE is PCI_FUNC_PASID. */
#define MC_CMD_GET_ADDR_SPC_ID_IN_PASID_OFST 12
#define MC_CMD_GET_ADDR_SPC_ID_IN_PASID_LEN 4
@@ -25789,7 +28225,72 @@
#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_OFST 0
#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_LEN 8
#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_LO_OFST 0
+#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_LO_LEN 4
+#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_LO_LBN 0
+#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_LO_WIDTH 32
#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_HI_OFST 4
+#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_HI_LEN 4
+#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_HI_LBN 32
+#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_HI_WIDTH 32
+
+
+/***********************************/
+/* MC_CMD_GET_CLIENT_HANDLE
+ * Obtain a handle for a client given a description of that client. N.B. this
+ * command is subject to change given the open discussion about how PCIe
+ * functions should be referenced on an iEP (integrated endpoint: functions
+ * span multiple buses) and multihost (multiple PCIe interfaces) system.
+ */
+#define MC_CMD_GET_CLIENT_HANDLE 0x1c3
+#define MC_CMD_GET_CLIENT_HANDLE_MSGSET 0x1c3
+#undef MC_CMD_0x1c3_PRIVILEGE_CTG
+
+#define MC_CMD_0x1c3_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_GET_CLIENT_HANDLE_IN msgrequest */
+#define MC_CMD_GET_CLIENT_HANDLE_IN_LEN 12
+/* Type of client to get a client handle for */
+#define MC_CMD_GET_CLIENT_HANDLE_IN_TYPE_OFST 0
+#define MC_CMD_GET_CLIENT_HANDLE_IN_TYPE_LEN 4
+/* enum: Obtain a client handle for a PCIe function-type client. */
+#define MC_CMD_GET_CLIENT_HANDLE_IN_TYPE_FUNC 0x0
+/* PCIe Function ID (as struct PCIE_FUNCTION). Valid when TYPE==FUNC. Use: -
+ * INTF=CALLER, PF=PF_NULL, VF=VF_NULL to refer to the calling function -
+ * INTF=CALLER, PF=PF_NULL, VF=... to refer to a VF child of the calling PF or
+ * a sibling VF of the calling VF. - INTF=CALLER, PF=..., VF=VF_NULL to refer
+ * to a PF on the calling interface - INTF=CALLER, PF=..., VF=... to refer to a
+ * VF on the calling interface - INTF=..., PF=..., VF=VF_NULL to refer to a PF
+ * on a named interface - INTF=..., PF=..., VF=... to refer to a VF on a named
+ * interface where ... refers to a small integer for the VF/PF fields, and to
+ * values from the PCIE_INTERFACE enum for for the INTF field. It's only
+ * meaningful to use INTF=CALLER within a structure that's an argument to
+ * MC_CMD_DEVEL_GET_CLIENT_HANDLE.
+ */
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_OFST 4
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_LEN 8
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_LO_OFST 4
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_LO_LEN 4
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_LO_LBN 32
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_LO_WIDTH 32
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_HI_OFST 8
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_HI_LEN 4
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_HI_LBN 64
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_HI_WIDTH 32
+/* enum: NULL value for the INTF field of struct PCIE_FUNCTION. Provided for
+ * backwards compatibility only, callers should use PCIE_INTERFACE_CALLER.
+ */
+#define MC_CMD_GET_CLIENT_HANDLE_IN_PCIE_FUNCTION_INTF_NULL 0xffffffff
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_PF_OFST 4
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_PF_LEN 2
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_VF_OFST 6
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_VF_LEN 2
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_INTF_OFST 8
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_INTF_LEN 4
+
+/* MC_CMD_GET_CLIENT_HANDLE_OUT msgresponse */
+#define MC_CMD_GET_CLIENT_HANDLE_OUT_LEN 4
+#define MC_CMD_GET_CLIENT_HANDLE_OUT_HANDLE_OFST 0
+#define MC_CMD_GET_CLIENT_HANDLE_OUT_HANDLE_LEN 4
/* MAE_FIELD_FLAGS structuredef */
#define MAE_FIELD_FLAGS_LEN 4
@@ -25937,6 +28438,40 @@
#define MAE_ENC_FIELD_PAIRS_ENC_IP_TTL_MASK_LEN 1
#define MAE_ENC_FIELD_PAIRS_ENC_IP_TTL_MASK_LBN 1096
#define MAE_ENC_FIELD_PAIRS_ENC_IP_TTL_MASK_WIDTH 8
+#define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_OFST 138
+#define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_LEN 1
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_OVLAN_OFST 138
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_OVLAN_LBN 0
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_OVLAN_WIDTH 1
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_IVLAN_OFST 138
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_IVLAN_LBN 1
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_IVLAN_WIDTH 1
+#define MAE_ENC_FIELD_PAIRS_ENC_IP_FRAG_OFST 138
+#define MAE_ENC_FIELD_PAIRS_ENC_IP_FRAG_LBN 2
+#define MAE_ENC_FIELD_PAIRS_ENC_IP_FRAG_WIDTH 1
+#define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_LBN 1104
+#define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_WIDTH 8
+#define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_OFST 138
+#define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_LEN 1
+#define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_LBN 1104
+#define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_WIDTH 8
+#define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_MASK_OFST 139
+#define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_MASK_LEN 1
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_OVLAN_MASK_OFST 139
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_OVLAN_MASK_LBN 0
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_OVLAN_MASK_WIDTH 1
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_IVLAN_MASK_OFST 139
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_IVLAN_MASK_LBN 1
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_IVLAN_MASK_WIDTH 1
+#define MAE_ENC_FIELD_PAIRS_ENC_IP_FRAG_MASK_OFST 139
+#define MAE_ENC_FIELD_PAIRS_ENC_IP_FRAG_MASK_LBN 2
+#define MAE_ENC_FIELD_PAIRS_ENC_IP_FRAG_MASK_WIDTH 1
+#define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_MASK_LBN 1112
+#define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_MASK_WIDTH 8
+#define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_MASK_OFST 139
+#define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_MASK_LEN 1
+#define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_MASK_LBN 1112
+#define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_MASK_WIDTH 8
#define MAE_ENC_FIELD_PAIRS_ENC_IP_FLAGS_BE_OFST 140
#define MAE_ENC_FIELD_PAIRS_ENC_IP_FLAGS_BE_LEN 4
#define MAE_ENC_FIELD_PAIRS_ENC_IP_FLAGS_BE_LBN 1120
@@ -26623,9 +29158,24 @@
#define MAE_FIELD_MASK_VALUE_PAIRS_V2_IS_FROM_NETWORK_OFST 344
#define MAE_FIELD_MASK_VALUE_PAIRS_V2_IS_FROM_NETWORK_LBN 3
#define MAE_FIELD_MASK_VALUE_PAIRS_V2_IS_FROM_NETWORK_WIDTH 1
-#define MAE_FIELD_MASK_VALUE_PAIRS_V2_RSVD_OFST 344
-#define MAE_FIELD_MASK_VALUE_PAIRS_V2_RSVD_LBN 4
-#define MAE_FIELD_MASK_VALUE_PAIRS_V2_RSVD_WIDTH 28
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_HAS_OVLAN_OFST 344
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_HAS_OVLAN_LBN 4
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_HAS_OVLAN_WIDTH 1
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_HAS_IVLAN_OFST 344
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_HAS_IVLAN_LBN 5
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_HAS_IVLAN_WIDTH 1
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_ENC_HAS_OVLAN_OFST 344
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_ENC_HAS_OVLAN_LBN 6
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_ENC_HAS_OVLAN_WIDTH 1
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_ENC_HAS_IVLAN_OFST 344
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_ENC_HAS_IVLAN_LBN 7
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_ENC_HAS_IVLAN_WIDTH 1
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_TCP_SYN_FIN_RST_OFST 344
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_TCP_SYN_FIN_RST_LBN 8
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_TCP_SYN_FIN_RST_WIDTH 1
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_IP_FIRST_FRAG_OFST 344
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_IP_FIRST_FRAG_LBN 9
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_IP_FIRST_FRAG_WIDTH 1
#define MAE_FIELD_MASK_VALUE_PAIRS_V2_FLAGS_LBN 2752
#define MAE_FIELD_MASK_VALUE_PAIRS_V2_FLAGS_WIDTH 32
#define MAE_FIELD_MASK_VALUE_PAIRS_V2_FLAGS_MASK_OFST 348
@@ -26707,16 +29257,34 @@
#define MAE_MPORT_SELECTOR_TYPE_WIDTH 8
/* enum: The MPORT connected to a given physical port */
#define MAE_MPORT_SELECTOR_TYPE_PPORT 0x2
-/* enum: The MPORT assigned to a given PCIe function */
+/* enum: The MPORT assigned to a given PCIe function. Deprecated in favour of
+ * MH_FUNC.
+ */
#define MAE_MPORT_SELECTOR_TYPE_FUNC 0x3
/* enum: An mport_id */
#define MAE_MPORT_SELECTOR_TYPE_MPORT_ID 0x4
+/* enum: The MPORT assigned to a given PCIe function (see also FWRIVERHD-1108)
+ */
+#define MAE_MPORT_SELECTOR_TYPE_MH_FUNC 0x5
+/* enum: This is guaranteed never to be a valid selector type */
+#define MAE_MPORT_SELECTOR_TYPE_INVALID 0xff
#define MAE_MPORT_SELECTOR_MPORT_ID_OFST 0
#define MAE_MPORT_SELECTOR_MPORT_ID_LBN 0
#define MAE_MPORT_SELECTOR_MPORT_ID_WIDTH 24
#define MAE_MPORT_SELECTOR_PPORT_ID_OFST 0
#define MAE_MPORT_SELECTOR_PPORT_ID_LBN 0
#define MAE_MPORT_SELECTOR_PPORT_ID_WIDTH 4
+#define MAE_MPORT_SELECTOR_FUNC_INTF_ID_OFST 0
+#define MAE_MPORT_SELECTOR_FUNC_INTF_ID_LBN 20
+#define MAE_MPORT_SELECTOR_FUNC_INTF_ID_WIDTH 4
+#define MAE_MPORT_SELECTOR_HOST_PRIMARY 0x1 /* enum */
+#define MAE_MPORT_SELECTOR_NIC_EMBEDDED 0x2 /* enum */
+/* enum: Deprecated, use CALLER_INTF instead. */
+#define MAE_MPORT_SELECTOR_CALLER 0xf
+#define MAE_MPORT_SELECTOR_CALLER_INTF 0xf /* enum */
+#define MAE_MPORT_SELECTOR_FUNC_MH_PF_ID_OFST 0
+#define MAE_MPORT_SELECTOR_FUNC_MH_PF_ID_LBN 16
+#define MAE_MPORT_SELECTOR_FUNC_MH_PF_ID_WIDTH 4
#define MAE_MPORT_SELECTOR_FUNC_PF_ID_OFST 0
#define MAE_MPORT_SELECTOR_FUNC_PF_ID_LBN 16
#define MAE_MPORT_SELECTOR_FUNC_PF_ID_WIDTH 8
@@ -26737,15 +29305,56 @@
* function.
*/
#define MAE_MPORT_SELECTOR_FUNC_PF_ID_CALLER 0xff
+/* enum: Same as PF_ID_CALLER, but for use in the smaller MH_PF_ID field. Only
+ * valid if FUNC_INTF_ID is CALLER.
+ */
+#define MAE_MPORT_SELECTOR_FUNC_MH_PF_ID_CALLER 0xf
#define MAE_MPORT_SELECTOR_FLAT_LBN 0
#define MAE_MPORT_SELECTOR_FLAT_WIDTH 32
+/* MAE_LINK_ENDPOINT_SELECTOR structuredef: Structure that identifies a real or
+ * virtual network port by MAE port and link end
+ */
+#define MAE_LINK_ENDPOINT_SELECTOR_LEN 8
+/* The MAE MPORT of interest */
+#define MAE_LINK_ENDPOINT_SELECTOR_MPORT_SELECTOR_OFST 0
+#define MAE_LINK_ENDPOINT_SELECTOR_MPORT_SELECTOR_LEN 4
+#define MAE_LINK_ENDPOINT_SELECTOR_MPORT_SELECTOR_LBN 0
+#define MAE_LINK_ENDPOINT_SELECTOR_MPORT_SELECTOR_WIDTH 32
+/* Which end of the link identified by MPORT to consider */
+#define MAE_LINK_ENDPOINT_SELECTOR_LINK_END_OFST 4
+#define MAE_LINK_ENDPOINT_SELECTOR_LINK_END_LEN 4
+/* Enum values, see field(s): */
+/* MAE_MPORT_END */
+#define MAE_LINK_ENDPOINT_SELECTOR_LINK_END_LBN 32
+#define MAE_LINK_ENDPOINT_SELECTOR_LINK_END_WIDTH 32
+/* A field for accessing the endpoint selector as a collection of bits */
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_OFST 0
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_LEN 8
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_LO_OFST 0
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_LO_LEN 4
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_LO_LBN 0
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_LO_WIDTH 32
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_HI_OFST 4
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_HI_LEN 4
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_HI_LBN 32
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_HI_WIDTH 32
+/* enum: Set FLAT to this value to obtain backward-compatible behaviour in
+ * commands that have been extended to take a MAE_LINK_ENDPOINT_SELECTOR
+ * argument. New commands that are designed to take such an argument from the
+ * start will not support this.
+ */
+#define MAE_LINK_ENDPOINT_SELECTOR_MAE_LINK_ENDPOINT_COMPAT 0x0
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_LBN 0
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_WIDTH 64
+
/***********************************/
/* MC_CMD_MAE_GET_CAPS
* Describes capabilities of the MAE (Match-Action Engine)
*/
#define MC_CMD_MAE_GET_CAPS 0x140
+#define MC_CMD_MAE_GET_CAPS_MSGSET 0x140
#undef MC_CMD_0x140_PRIVILEGE_CTG
#define MC_CMD_0x140_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -26772,6 +29381,9 @@
#define MC_CMD_MAE_GET_CAPS_OUT_ENCAP_TYPE_GENEVE_OFST 4
#define MC_CMD_MAE_GET_CAPS_OUT_ENCAP_TYPE_GENEVE_LBN 2
#define MC_CMD_MAE_GET_CAPS_OUT_ENCAP_TYPE_GENEVE_WIDTH 1
+#define MC_CMD_MAE_GET_CAPS_OUT_ENCAP_TYPE_L2GRE_OFST 4
+#define MC_CMD_MAE_GET_CAPS_OUT_ENCAP_TYPE_L2GRE_LBN 3
+#define MC_CMD_MAE_GET_CAPS_OUT_ENCAP_TYPE_L2GRE_WIDTH 1
/* The total number of counters available to allocate. */
#define MC_CMD_MAE_GET_CAPS_OUT_COUNTERS_OFST 8
#define MC_CMD_MAE_GET_CAPS_OUT_COUNTERS_LEN 4
@@ -26823,6 +29435,7 @@
* Get a level of support for match fields when used in match-action rules
*/
#define MC_CMD_MAE_GET_AR_CAPS 0x141
+#define MC_CMD_MAE_GET_AR_CAPS_MSGSET 0x141
#undef MC_CMD_0x141_PRIVILEGE_CTG
#define MC_CMD_0x141_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -26855,6 +29468,7 @@
* Get a level of support for fields used in outer rule keys.
*/
#define MC_CMD_MAE_GET_OR_CAPS 0x142
+#define MC_CMD_MAE_GET_OR_CAPS_MSGSET 0x142
#undef MC_CMD_0x142_PRIVILEGE_CTG
#define MC_CMD_0x142_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -26885,6 +29499,7 @@
* Rules.
*/
#define MC_CMD_MAE_COUNTER_ALLOC 0x143
+#define MC_CMD_MAE_COUNTER_ALLOC_MSGSET 0x143
#undef MC_CMD_0x143_PRIVILEGE_CTG
#define MC_CMD_0x143_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -26928,6 +29543,7 @@
* Free match-action-engine counters
*/
#define MC_CMD_MAE_COUNTER_FREE 0x144
+#define MC_CMD_MAE_COUNTER_FREE_MSGSET 0x144
#undef MC_CMD_0x144_PRIVILEGE_CTG
#define MC_CMD_0x144_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -26995,6 +29611,7 @@
* delivering packets to the current queue first.
*/
#define MC_CMD_MAE_COUNTERS_STREAM_START 0x151
+#define MC_CMD_MAE_COUNTERS_STREAM_START_MSGSET 0x151
#undef MC_CMD_0x151_PRIVILEGE_CTG
#define MC_CMD_0x151_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27031,6 +29648,7 @@
* Stop streaming counter values to the specified RxQ.
*/
#define MC_CMD_MAE_COUNTERS_STREAM_STOP 0x152
+#define MC_CMD_MAE_COUNTERS_STREAM_STOP_MSGSET 0x152
#undef MC_CMD_0x152_PRIVILEGE_CTG
#define MC_CMD_0x152_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27060,6 +29678,7 @@
* MAE_COUNTERS_PACKETISER_STREAM_START/PACKET_SIZE and rung the doorbell.
*/
#define MC_CMD_MAE_COUNTERS_STREAM_GIVE_CREDITS 0x153
+#define MC_CMD_MAE_COUNTERS_STREAM_GIVE_CREDITS_MSGSET 0x153
#undef MC_CMD_0x153_PRIVILEGE_CTG
#define MC_CMD_0x153_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27076,9 +29695,15 @@
/***********************************/
/* MC_CMD_MAE_ENCAP_HEADER_ALLOC
- * Allocate encap action metadata
+ * Allocate an encapsulation header to be used in an Action Rule response. The
+ * header must be constructed as a valid packet with 0-length payload.
+ * Specifically, the L3/L4 lengths & checksums will only be incrementally fixed
+ * by the NIC, rather than recomputed entirely. Currently only IPv4, IPv6 and
+ * UDP are supported. If the maximum number of headers have already been
+ * allocated then the command will fail with MC_CMD_ERR_ENOSPC.
*/
#define MC_CMD_MAE_ENCAP_HEADER_ALLOC 0x148
+#define MC_CMD_MAE_ENCAP_HEADER_ALLOC_MSGSET 0x148
#undef MC_CMD_0x148_PRIVILEGE_CTG
#define MC_CMD_0x148_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27109,9 +29734,10 @@
/***********************************/
/* MC_CMD_MAE_ENCAP_HEADER_UPDATE
- * Update encap action metadata
+ * Update encap action metadata. See comments for MAE_ENCAP_HEADER_ALLOC.
*/
#define MC_CMD_MAE_ENCAP_HEADER_UPDATE 0x149
+#define MC_CMD_MAE_ENCAP_HEADER_UPDATE_MSGSET 0x149
#undef MC_CMD_0x149_PRIVILEGE_CTG
#define MC_CMD_0x149_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27141,6 +29767,7 @@
* Free encap action metadata
*/
#define MC_CMD_MAE_ENCAP_HEADER_FREE 0x14a
+#define MC_CMD_MAE_ENCAP_HEADER_FREE_MSGSET 0x14a
#undef MC_CMD_0x14a_PRIVILEGE_CTG
#define MC_CMD_0x14a_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27176,9 +29803,12 @@
/* MC_CMD_MAE_MAC_ADDR_ALLOC
* Allocate MAC address. Hardware implementations have MAC addresses programmed
* into an indirection table, and clients should take care not to allocate the
- * same MAC address twice (but instead reuse its ID).
+ * same MAC address twice (but instead reuse its ID). If the maximum number of
+ * MAC addresses have already been allocated then the command will fail with
+ * MC_CMD_ERR_ENOSPC.
*/
#define MC_CMD_MAE_MAC_ADDR_ALLOC 0x15e
+#define MC_CMD_MAE_MAC_ADDR_ALLOC_MSGSET 0x15e
#undef MC_CMD_0x15e_PRIVILEGE_CTG
#define MC_CMD_0x15e_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27204,6 +29834,7 @@
* Free MAC address.
*/
#define MC_CMD_MAE_MAC_ADDR_FREE 0x15f
+#define MC_CMD_MAE_MAC_ADDR_FREE_MSGSET 0x15f
#undef MC_CMD_0x15f_PRIVILEGE_CTG
#define MC_CMD_0x15f_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27238,9 +29869,12 @@
/***********************************/
/* MC_CMD_MAE_ACTION_SET_ALLOC
* Allocate an action set, which can be referenced either in response to an
- * Action Rule, or as part of an Action Set List.
+ * Action Rule, or as part of an Action Set List. If the maxmimum number of
+ * action sets have already been allocated then the command will fail with
+ * MC_CMD_ERR_ENOSPC.
*/
#define MC_CMD_MAE_ACTION_SET_ALLOC 0x14d
+#define MC_CMD_MAE_ACTION_SET_ALLOC_MSGSET 0x14d
#undef MC_CMD_0x14d_PRIVILEGE_CTG
#define MC_CMD_0x14d_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27267,6 +29901,15 @@
#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_NAT_OFST 0
#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_NAT_LBN 11
#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_NAT_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_DECR_IP_TTL_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_DECR_IP_TTL_LBN 12
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_DECR_IP_TTL_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_SET_SRC_MPORT_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_SET_SRC_MPORT_LBN 13
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_SET_SRC_MPORT_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_SUPPRESS_SELF_DELIVERY_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_SUPPRESS_SELF_DELIVERY_LBN 14
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_SUPPRESS_SELF_DELIVERY_WIDTH 1
/* If VLAN_PUSH >= 1, TCI value to be inserted as outermost VLAN. */
#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_VLAN0_TCI_BE_OFST 4
#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_VLAN0_TCI_BE_LEN 2
@@ -27313,8 +29956,135 @@
#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DST_MAC_ID_OFST 40
#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DST_MAC_ID_LEN 4
+/* MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN msgrequest: Only supported if
+ * MAE_ACTION_SET_ALLOC_V2_SUPPORTED is advertised in
+ * MC_CMD_GET_CAPABILITIES_V7_OUT.
+ */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_LEN 51
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_FLAGS_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_FLAGS_LEN 4
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN_PUSH_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN_PUSH_LBN 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN_PUSH_WIDTH 2
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN_POP_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN_POP_LBN 4
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN_POP_WIDTH 2
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DECAP_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DECAP_LBN 8
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DECAP_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_MARK_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_MARK_LBN 9
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_MARK_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_FLAG_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_FLAG_LBN 10
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_FLAG_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_NAT_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_NAT_LBN 11
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_NAT_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DECR_IP_TTL_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DECR_IP_TTL_LBN 12
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DECR_IP_TTL_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_SET_SRC_MPORT_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_SET_SRC_MPORT_LBN 13
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_SET_SRC_MPORT_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_SUPPRESS_SELF_DELIVERY_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_SUPPRESS_SELF_DELIVERY_LBN 14
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_SUPPRESS_SELF_DELIVERY_WIDTH 1
+/* If VLAN_PUSH >= 1, TCI value to be inserted as outermost VLAN. */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN0_TCI_BE_OFST 4
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN0_TCI_BE_LEN 2
+/* If VLAN_PUSH >= 1, TPID value to be inserted as outermost VLAN. */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN0_PROTO_BE_OFST 6
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN0_PROTO_BE_LEN 2
+/* If VLAN_PUSH == 2, inner TCI value to be inserted. */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN1_TCI_BE_OFST 8
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN1_TCI_BE_LEN 2
+/* If VLAN_PUSH == 2, inner TPID value to be inserted. */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN1_PROTO_BE_OFST 10
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN1_PROTO_BE_LEN 2
+/* Reserved. Ignored by firmware. Should be set to zero or 0xffffffff. */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_RSVD_OFST 12
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_RSVD_LEN 4
+/* Set to ENCAP_HEADER_ID_NULL to request no encap action */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ENCAP_HEADER_ID_OFST 16
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ENCAP_HEADER_ID_LEN 4
+/* An m-port selector identifying the m-port that the modified packet should be
+ * delivered to. Set to MPORT_SELECTOR_NULL to request no delivery of the
+ * packet.
+ */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DELIVER_OFST 20
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DELIVER_LEN 4
+/* Allows an action set to trigger several counter updates. Set to
+ * COUNTER_LIST_ID_NULL to request no counter action.
+ */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_COUNTER_LIST_ID_OFST 24
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_COUNTER_LIST_ID_LEN 4
+/* If a driver only wished to update one counter within this action set, then
+ * it can supply a COUNTER_ID instead of allocating a single-element counter
+ * list. This field should be set to COUNTER_ID_NULL if this behaviour is not
+ * required. It is not valid to supply a non-NULL value for both
+ * COUNTER_LIST_ID and COUNTER_ID.
+ */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_COUNTER_ID_OFST 28
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_COUNTER_ID_LEN 4
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_MARK_VALUE_OFST 32
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_MARK_VALUE_LEN 4
+/* Set to MAC_ID_NULL to request no source MAC replacement. */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_SRC_MAC_ID_OFST 36
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_SRC_MAC_ID_LEN 4
+/* Set to MAC_ID_NULL to request no destination MAC replacement. */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DST_MAC_ID_OFST 40
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DST_MAC_ID_LEN 4
+/* Source m-port ID to be reported for DO_SET_SRC_MPORT action. */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_REPORTED_SRC_MPORT_OFST 44
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_REPORTED_SRC_MPORT_LEN 4
+/* Actions for modifying the Differentiated Services Code-Point (DSCP) bits
+ * within IPv4 and IPv6 headers.
+ */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DSCP_CONTROL_OFST 48
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DSCP_CONTROL_LEN 2
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DSCP_ENCAP_COPY_OFST 48
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DSCP_ENCAP_COPY_LBN 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DSCP_ENCAP_COPY_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DSCP_DECAP_COPY_OFST 48
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DSCP_DECAP_COPY_LBN 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DSCP_DECAP_COPY_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_DSCP_OFST 48
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_DSCP_LBN 2
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_DSCP_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DSCP_VALUE_OFST 48
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DSCP_VALUE_LBN 3
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DSCP_VALUE_WIDTH 6
+/* Actions for modifying the Explicit Congestion Notification (ECN) bits within
+ * IPv4 and IPv6 headers.
+ */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_CONTROL_OFST 50
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_CONTROL_LEN 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_ECN_ENCAP_COPY_OFST 50
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_ECN_ENCAP_COPY_LBN 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_ECN_ENCAP_COPY_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_ECN_DECAP_COPY_OFST 50
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_ECN_DECAP_COPY_LBN 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_ECN_DECAP_COPY_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_ECN_OFST 50
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_ECN_LBN 2
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_ECN_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_VALUE_OFST 50
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_VALUE_LBN 3
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_VALUE_WIDTH 2
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_ECT_0_TO_CE_OFST 50
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_ECT_0_TO_CE_LBN 5
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_ECT_0_TO_CE_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_ECT_1_TO_CE_OFST 50
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_ECT_1_TO_CE_LBN 6
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_ECT_1_TO_CE_WIDTH 1
+
/* MC_CMD_MAE_ACTION_SET_ALLOC_OUT msgresponse */
#define MC_CMD_MAE_ACTION_SET_ALLOC_OUT_LEN 4
+/* The MSB of the AS_ID is guaranteed to be clear if the ID is not
+ * ACTION_SET_ID_NULL. This allows an AS_ID to be distinguished from an ASL_ID
+ * returned from MC_CMD_MAE_ACTION_SET_LIST_ALLOC.
+ */
#define MC_CMD_MAE_ACTION_SET_ALLOC_OUT_AS_ID_OFST 0
#define MC_CMD_MAE_ACTION_SET_ALLOC_OUT_AS_ID_LEN 4
/* enum: An action set ID that is guaranteed never to represent an action set
@@ -27326,6 +30096,7 @@
/* MC_CMD_MAE_ACTION_SET_FREE
*/
#define MC_CMD_MAE_ACTION_SET_FREE 0x14e
+#define MC_CMD_MAE_ACTION_SET_FREE_MSGSET 0x14e
#undef MC_CMD_0x14e_PRIVILEGE_CTG
#define MC_CMD_0x14e_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27361,9 +30132,12 @@
/* MC_CMD_MAE_ACTION_SET_LIST_ALLOC
* Allocate an action set list (ASL) that can be referenced by an ID. The ASL
* ID can be used when inserting an action rule, so that for each packet
- * matching the rule every action set in the list is applied.
+ * matching the rule every action set in the list is applied. If the maximum
+ * number of ASLs have already been allocated then the command will fail with
+ * MC_CMD_ERR_ENOSPC.
*/
#define MC_CMD_MAE_ACTION_SET_LIST_ALLOC 0x14f
+#define MC_CMD_MAE_ACTION_SET_LIST_ALLOC_MSGSET 0x14f
#undef MC_CMD_0x14f_PRIVILEGE_CTG
#define MC_CMD_0x14f_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27394,6 +30168,9 @@
/* MC_CMD_MAE_ACTION_SET_LIST_ALLOC_OUT msgresponse */
#define MC_CMD_MAE_ACTION_SET_LIST_ALLOC_OUT_LEN 4
+/* The MSB of the ASL_ID is guaranteed to be set. This allows an ASL_ID to be
+ * distinguished from an AS_ID returned from MC_CMD_MAE_ACTION_SET_ALLOC.
+ */
#define MC_CMD_MAE_ACTION_SET_LIST_ALLOC_OUT_ASL_ID_OFST 0
#define MC_CMD_MAE_ACTION_SET_LIST_ALLOC_OUT_ASL_ID_LEN 4
/* enum: An action set list ID that is guaranteed never to represent an action
@@ -27407,6 +30184,7 @@
* Free match-action-engine redirect_lists
*/
#define MC_CMD_MAE_ACTION_SET_LIST_FREE 0x150
+#define MC_CMD_MAE_ACTION_SET_LIST_FREE_MSGSET 0x150
#undef MC_CMD_0x150_PRIVILEGE_CTG
#define MC_CMD_0x150_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27441,9 +30219,11 @@
/***********************************/
/* MC_CMD_MAE_OUTER_RULE_INSERT
* Inserts an Outer Rule, which controls encapsulation parsing, and may
- * influence the Lookup Sequence.
+ * influence the Lookup Sequence. If the maximum number of rules have already
+ * been inserted then the command will fail with MC_CMD_ERR_ENOSPC.
*/
#define MC_CMD_MAE_OUTER_RULE_INSERT 0x15a
+#define MC_CMD_MAE_OUTER_RULE_INSERT_MSGSET 0x15a
#undef MC_CMD_0x15a_PRIVILEGE_CTG
#define MC_CMD_0x15a_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27504,6 +30284,7 @@
/* MC_CMD_MAE_OUTER_RULE_REMOVE
*/
#define MC_CMD_MAE_OUTER_RULE_REMOVE 0x15b
+#define MC_CMD_MAE_OUTER_RULE_REMOVE_MSGSET 0x15b
#undef MC_CMD_0x15b_PRIVILEGE_CTG
#define MC_CMD_0x15b_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27583,9 +30364,11 @@
/* MC_CMD_MAE_ACTION_RULE_INSERT
* Insert a rule specify that packets matching a filter be processed according
* to a previous allocated action. Masks can be set as indicated by
- * MC_CMD_MAE_GET_MATCH_FIELD_CAPABILITIES.
+ * MC_CMD_MAE_GET_MATCH_FIELD_CAPABILITIES. If the maximum number of rules have
+ * already been inserted then the command will fail with MC_CMD_ERR_ENOSPC.
*/
#define MC_CMD_MAE_ACTION_RULE_INSERT 0x15c
+#define MC_CMD_MAE_ACTION_RULE_INSERT_MSGSET 0x15c
#undef MC_CMD_0x15c_PRIVILEGE_CTG
#define MC_CMD_0x15c_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27627,6 +30410,7 @@
* ENOTSUP, in which case the driver should DELETE/INSERT.
*/
#define MC_CMD_MAE_ACTION_RULE_UPDATE 0x15d
+#define MC_CMD_MAE_ACTION_RULE_UPDATE_MSGSET 0x15d
#undef MC_CMD_0x15d_PRIVILEGE_CTG
#define MC_CMD_0x15d_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27648,6 +30432,7 @@
/* MC_CMD_MAE_ACTION_RULE_DELETE
*/
#define MC_CMD_MAE_ACTION_RULE_DELETE 0x155
+#define MC_CMD_MAE_ACTION_RULE_DELETE_MSGSET 0x155
#undef MC_CMD_0x155_PRIVILEGE_CTG
#define MC_CMD_0x155_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27684,6 +30469,7 @@
* Return the m-port corresponding to a selector.
*/
#define MC_CMD_MAE_MPORT_LOOKUP 0x160
+#define MC_CMD_MAE_MPORT_LOOKUP_MSGSET 0x160
#undef MC_CMD_0x160_PRIVILEGE_CTG
#define MC_CMD_0x160_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -27705,6 +30491,7 @@
* match or delivery argument.
*/
#define MC_CMD_MAE_MPORT_ALLOC 0x163
+#define MC_CMD_MAE_MPORT_ALLOC_MSGSET 0x163
#undef MC_CMD_0x163_PRIVILEGE_CTG
#define MC_CMD_0x163_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27812,6 +30599,7 @@
* Free a m-port which was previously allocated by the driver.
*/
#define MC_CMD_MAE_MPORT_FREE 0x164
+#define MC_CMD_MAE_MPORT_FREE_MSGSET 0x164
#undef MC_CMD_0x164_PRIVILEGE_CTG
#define MC_CMD_0x164_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27847,6 +30635,9 @@
#define MAE_MPORT_DESC_CAN_DELETE_OFST 8
#define MAE_MPORT_DESC_CAN_DELETE_LBN 2
#define MAE_MPORT_DESC_CAN_DELETE_WIDTH 1
+#define MAE_MPORT_DESC_IS_ZOMBIE_OFST 8
+#define MAE_MPORT_DESC_IS_ZOMBIE_LBN 3
+#define MAE_MPORT_DESC_IS_ZOMBIE_WIDTH 1
#define MAE_MPORT_DESC_CALLER_FLAGS_LBN 64
#define MAE_MPORT_DESC_CALLER_FLAGS_WIDTH 32
/* Not the ideal name; it's really the type of thing connected to the m-port */
@@ -27869,7 +30660,13 @@
#define MAE_MPORT_DESC_RESERVED_OFST 32
#define MAE_MPORT_DESC_RESERVED_LEN 8
#define MAE_MPORT_DESC_RESERVED_LO_OFST 32
+#define MAE_MPORT_DESC_RESERVED_LO_LEN 4
+#define MAE_MPORT_DESC_RESERVED_LO_LBN 256
+#define MAE_MPORT_DESC_RESERVED_LO_WIDTH 32
#define MAE_MPORT_DESC_RESERVED_HI_OFST 36
+#define MAE_MPORT_DESC_RESERVED_HI_LEN 4
+#define MAE_MPORT_DESC_RESERVED_HI_LBN 288
+#define MAE_MPORT_DESC_RESERVED_HI_WIDTH 32
#define MAE_MPORT_DESC_RESERVED_LBN 256
#define MAE_MPORT_DESC_RESERVED_WIDTH 64
/* Logical port index. Only valid when type NET Port. */
@@ -27916,8 +30713,11 @@
/***********************************/
/* MC_CMD_MAE_MPORT_ENUMERATE
+ * Deprecated in favour of MAE_MPORT_READ_JOURNAL. Support for this command
+ * will be removed at some future point.
*/
#define MC_CMD_MAE_MPORT_ENUMERATE 0x17c
+#define MC_CMD_MAE_MPORT_ENUMERATE_MSGSET 0x17c
#undef MC_CMD_0x17c_PRIVILEGE_CTG
#define MC_CMD_0x17c_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -27945,4 +30745,50 @@
#define MC_CMD_MAE_MPORT_ENUMERATE_OUT_MPORT_DESC_DATA_MAXNUM 244
#define MC_CMD_MAE_MPORT_ENUMERATE_OUT_MPORT_DESC_DATA_MAXNUM_MCDI2 1012
+
+/***********************************/
+/* MC_CMD_MAE_MPORT_READ_JOURNAL
+ * Firmware maintains a per-client journal of mport creations and deletions.
+ * This journal is clear-on-read, i.e. repeated calls of this command will
+ * drain the buffer. Whenever the caller resets its function via FLR or
+ * MC_CMD_ENTITY_RESET, the journal is regenerated from a blank start.
+ */
+#define MC_CMD_MAE_MPORT_READ_JOURNAL 0x147
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_MSGSET 0x147
+#undef MC_CMD_0x147_PRIVILEGE_CTG
+
+#define MC_CMD_0x147_PRIVILEGE_CTG SRIOV_CTG_MAE
+
+/* MC_CMD_MAE_MPORT_READ_JOURNAL_IN msgrequest */
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_IN_LEN 4
+/* Any unused flags are reserved and must be set to zero. */
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_IN_FLAGS_OFST 0
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_IN_FLAGS_LEN 4
+
+/* MC_CMD_MAE_MPORT_READ_JOURNAL_OUT msgresponse */
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_LENMIN 12
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_LENMAX 252
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_LENMAX_MCDI2 1020
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_LEN(num) (12+1*(num))
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_DATA_NUM(len) (((len)-12)/1)
+/* Any unused flags are reserved and must be ignored. */
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_FLAGS_OFST 0
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_FLAGS_LEN 4
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MORE_OFST 0
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MORE_LBN 0
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MORE_WIDTH 1
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_COUNT_OFST 4
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_COUNT_LEN 4
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_SIZEOF_MPORT_DESC_OFST 8
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_SIZEOF_MPORT_DESC_LEN 4
+/* Any array of MAE_MPORT_DESC structures. The MAE_MPORT_DESC structure may
+ * grow in future version of this command. Drivers should use a stride of
+ * SIZEOF_MPORT_DESC. Fields beyond SIZEOF_MPORT_DESC are not present.
+ */
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_DATA_OFST 12
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_DATA_LEN 1
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_DATA_MINNUM 0
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_DATA_MAXNUM 240
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_DATA_MAXNUM_MCDI2 1008
+
#endif /* _SIENA_MC_DRIVER_PCOL_H */
diff --git a/drivers/common/sfc_efx/base/efx_regs_mcdi_aoe.h b/drivers/common/sfc_efx/base/efx_regs_mcdi_aoe.h
index f7c89fabc..c45f678c2 100644
--- a/drivers/common/sfc_efx/base/efx_regs_mcdi_aoe.h
+++ b/drivers/common/sfc_efx/base/efx_regs_mcdi_aoe.h
@@ -6,7 +6,7 @@
/*
* This file is automatically generated. DO NOT EDIT IT.
- * To make changes, edit the .yml files in sfregistry under doc/mcdi/ and
+ * To make changes, edit the .yml files in smartnic_registry under doc/mcdi/ and
* rebuild this file with "make mcdi_headers_v5".
*/
@@ -20,6 +20,7 @@
* Perform an FC operation
*/
#define MC_CMD_FC 0x9
+#define MC_CMD_FC_MSGSET 0x9
/* MC_CMD_FC_IN msgrequest */
#define MC_CMD_FC_IN_LEN 4
@@ -212,7 +213,13 @@
#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_OFST 16
#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_LEN 8
#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_LO_OFST 16
+#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_LO_LEN 4
+#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_LO_LBN 128
+#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_LO_WIDTH 32
#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_HI_OFST 20
+#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_HI_LEN 4
+#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_HI_LBN 160
+#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_HI_WIDTH 32
#define MC_CMD_FC_IN_MAC_SET_LINK_REJECT_OFST 24
#define MC_CMD_FC_IN_MAC_SET_LINK_REJECT_LEN 4
#define MC_CMD_FC_IN_MAC_SET_LINK_REJECT_UNICAST_OFST 24
@@ -784,12 +791,24 @@
#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_OFST 12
#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_LEN 8
#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_LO_OFST 12
+#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_LO_LEN 4
+#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_LO_LBN 96
+#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_LO_WIDTH 32
#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_HI_OFST 16
+#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_HI_LEN 4
+#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_HI_LBN 128
+#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_HI_WIDTH 32
/* AOE address from which to transfer data */
#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_OFST 20
#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_LEN 8
#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_LO_OFST 20
+#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_LO_LEN 4
+#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_LO_LBN 160
+#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_LO_WIDTH 32
#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_HI_OFST 24
+#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_HI_LEN 4
+#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_HI_LBN 192
+#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_HI_WIDTH 32
/* Length of AOE transfer (total) */
#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_LENGTH_OFST 28
#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_LENGTH_LEN 4
@@ -916,7 +935,13 @@
#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_OFST 12
#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_LEN 8
#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_LO_OFST 12
+#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_LO_LEN 4
+#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_LO_LBN 96
+#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_LO_WIDTH 32
#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_HI_OFST 16
+#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_HI_LEN 4
+#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_HI_LBN 128
+#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_HI_WIDTH 32
#define MC_CMD_FC_IN_CLOCK_SET_TIME_NANOSECONDS_OFST 20
#define MC_CMD_FC_IN_CLOCK_SET_TIME_NANOSECONDS_LEN 4
@@ -1016,7 +1041,13 @@
#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_OFST 12
#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_LEN 8
#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_LO_OFST 12
+#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_LO_LEN 4
+#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_LO_LBN 96
+#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_LO_WIDTH 32
#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_HI_OFST 16
+#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_HI_LEN 4
+#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_HI_LBN 128
+#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_HI_WIDTH 32
/* Port number of PTP packet for which timestamp required */
#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_PORT_NUM_OFST 20
#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_PORT_NUM_LEN 4
@@ -1320,7 +1351,13 @@
#define MC_CMD_FC_OUT_GET_VERSION_VERSION_OFST 4
#define MC_CMD_FC_OUT_GET_VERSION_VERSION_LEN 8
#define MC_CMD_FC_OUT_GET_VERSION_VERSION_LO_OFST 4
+#define MC_CMD_FC_OUT_GET_VERSION_VERSION_LO_LEN 4
+#define MC_CMD_FC_OUT_GET_VERSION_VERSION_LO_LBN 32
+#define MC_CMD_FC_OUT_GET_VERSION_VERSION_LO_WIDTH 32
#define MC_CMD_FC_OUT_GET_VERSION_VERSION_HI_OFST 8
+#define MC_CMD_FC_OUT_GET_VERSION_VERSION_HI_LEN 4
+#define MC_CMD_FC_OUT_GET_VERSION_VERSION_HI_LBN 64
+#define MC_CMD_FC_OUT_GET_VERSION_VERSION_HI_WIDTH 32
/* MC_CMD_FC_OUT_TRC_RX_READ msgresponse */
#define MC_CMD_FC_OUT_TRC_RX_READ_LEN 8
@@ -1347,7 +1384,13 @@
#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_OFST 0
#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_LEN 8
#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_LO_OFST 0
+#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_LO_LEN 4
+#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_LO_LBN 0
+#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_LO_WIDTH 32
#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_HI_OFST 4
+#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_HI_LEN 4
+#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_HI_LBN 32
+#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_HI_WIDTH 32
#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_NUM MC_CMD_FC_MAC_RX_NSTATS
#define MC_CMD_FC_MAC_RX_STATS_OCTETS 0x0 /* enum */
#define MC_CMD_FC_MAC_RX_OCTETS_OK 0x1 /* enum */
@@ -1382,7 +1425,13 @@
#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_OFST 0
#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_LEN 8
#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_LO_OFST 0
+#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_LO_LEN 4
+#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_LO_LBN 0
+#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_LO_WIDTH 32
#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_HI_OFST 4
+#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_HI_LEN 4
+#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_HI_LBN 32
+#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_HI_WIDTH 32
#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_NUM MC_CMD_FC_MAC_TX_NSTATS
#define MC_CMD_FC_MAC_TX_STATS_OCTETS 0x0 /* enum */
#define MC_CMD_FC_MAC_TX_OCTETS_OK 0x1 /* enum */
@@ -1415,7 +1464,13 @@
#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_OFST 0
#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_LEN 8
#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_LO_OFST 0
+#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_LO_LEN 4
+#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_LO_LBN 0
+#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_LO_WIDTH 32
#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_HI_OFST 4
+#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_HI_LEN 4
+#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_HI_LBN 32
+#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_HI_WIDTH 32
#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_NUM MC_CMD_FC_MAC_NSTATS_PER_BLOCK
/* MC_CMD_FC_OUT_MAC msgresponse */
@@ -1636,7 +1691,13 @@
#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_OFST 16
#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_LEN 8
#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_LO_OFST 16
+#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_LO_LEN 4
+#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_LO_LBN 128
+#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_LO_WIDTH 32
#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_HI_OFST 20
+#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_HI_LEN 4
+#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_HI_LBN 160
+#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_HI_WIDTH 32
#define MC_CMD_FC_OUT_FPGA_BUILD_REVISION_LO_OFST 24
#define MC_CMD_FC_OUT_FPGA_BUILD_REVISION_LO_LEN 4
#define MC_CMD_FC_OUT_FPGA_BUILD_REVISION_HI_OFST 28
@@ -1976,12 +2037,24 @@
#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_OFST 8
#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_LEN 8
#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_LO_OFST 8
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_LO_LEN 4
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_LO_LBN 64
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_LO_WIDTH 32
#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_HI_OFST 12
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_HI_LEN 4
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_HI_LBN 96
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_HI_WIDTH 32
/* Length of address map */
#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_OFST 16
#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_LEN 8
#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_LO_OFST 16
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_LO_LEN 4
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_LO_LBN 128
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_LO_WIDTH 32
#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_HI_OFST 20
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_HI_LEN 4
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_HI_LBN 160
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_HI_WIDTH 32
/* Component information field */
#define MC_CMD_FC_OUT_READ_MAP_INDEX_COMP_INFO_OFST 24
#define MC_CMD_FC_OUT_READ_MAP_INDEX_COMP_INFO_LEN 4
@@ -1989,7 +2062,13 @@
#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_OFST 28
#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_LEN 8
#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_LO_OFST 28
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_LO_LEN 4
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_LO_LBN 224
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_LO_WIDTH 32
#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_HI_OFST 32
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_HI_LEN 4
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_HI_LBN 256
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_HI_WIDTH 32
/* Name of the component */
#define MC_CMD_FC_OUT_READ_MAP_INDEX_NAME_OFST 36
#define MC_CMD_FC_OUT_READ_MAP_INDEX_NAME_LEN 1
@@ -2132,7 +2211,13 @@
#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_OFST 12
#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_LEN 8
#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_LO_OFST 12
+#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_LO_LEN 4
+#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_LO_LBN 96
+#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_LO_WIDTH 32
#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_HI_OFST 16
+#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_HI_LEN 4
+#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_HI_LBN 128
+#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_HI_WIDTH 32
/* MC_CMD_FC_OUT_UHLINK_RX_EYE msgresponse */
#define MC_CMD_FC_OUT_UHLINK_RX_EYE_LEN ((((0-1+(32*MC_CMD_FC_UHLINK_RX_EYE_PER_BLOCK))+1))>>3)
@@ -2153,7 +2238,13 @@
#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_OFST 4
#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_LEN 8
#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_LO_OFST 4
+#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_LO_LEN 4
+#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_LO_LBN 32
+#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_LO_WIDTH 32
#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_HI_OFST 8
+#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_HI_LEN 4
+#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_HI_LBN 64
+#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_HI_WIDTH 32
#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_NUM MC_CMD_FC_UHLINK_RX_EYE_PLOT_ROWS_PER_BLOCK
/* MC_CMD_FC_OUT_UHLINK_RX_TUNE msgresponse */
@@ -2222,12 +2313,24 @@
#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_OFST 4
#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_LEN 8
#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_LO_OFST 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_LO_LEN 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_LO_LBN 32
+#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_LO_WIDTH 32
#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_HI_OFST 8
+#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_HI_LEN 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_HI_LBN 64
+#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_HI_WIDTH 32
/* AOE address from which to transfer data */
#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_OFST 12
#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_LEN 8
#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_LO_OFST 12
+#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_LO_LEN 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_LO_LBN 96
+#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_LO_WIDTH 32
#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_HI_OFST 16
+#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_HI_LEN 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_HI_LBN 128
+#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_HI_WIDTH 32
/* Length of AOE transfer (total) */
#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_LENGTH_OFST 20
#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_LENGTH_LEN 4
@@ -2243,12 +2346,24 @@
#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_OFST 36
#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_LEN 8
#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_LO_OFST 36
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_LO_LEN 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_LO_LBN 288
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_LO_WIDTH 32
#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_HI_OFST 40
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_HI_LEN 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_HI_LBN 320
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_HI_WIDTH 32
/* When active, end read time */
#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_OFST 44
#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_LEN 8
#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_LO_OFST 44
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_LO_LEN 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_LO_LBN 352
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_LO_WIDTH 32
#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_HI_OFST 48
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_HI_LEN 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_HI_LBN 384
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_HI_WIDTH 32
/* MC_CMD_FC_OUT_LOG_ADDR_RANGE msgresponse */
#define MC_CMD_FC_OUT_LOG_ADDR_RANGE_LEN 0
@@ -2263,7 +2378,13 @@
#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_OFST 4
#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_LEN 8
#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_LO_OFST 4
+#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_LO_LEN 4
+#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_LO_LBN 32
+#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_LO_WIDTH 32
#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_HI_OFST 8
+#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_HI_LEN 4
+#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_HI_LBN 64
+#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_HI_WIDTH 32
#define MC_CMD_FC_OUT_CLOCK_GET_TIME_NANOSECONDS_OFST 12
#define MC_CMD_FC_OUT_CLOCK_GET_TIME_NANOSECONDS_LEN 4
#define MC_CMD_FC_OUT_CLOCK_GET_TIME_RANGE_OFST 16
@@ -2311,7 +2432,13 @@
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_OFST 0
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_LEN 8
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_LO_OFST 0
+#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_LO_LEN 4
+#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_LO_LBN 0
+#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_LO_WIDTH 32
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_HI_OFST 4
+#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_HI_LEN 4
+#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_HI_LBN 32
+#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_HI_WIDTH 32
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_MINNUM 0
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_MAXNUM 31
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_MAXNUM_MCDI2 127
@@ -2391,6 +2518,7 @@
* AOE operations on MC
*/
#define MC_CMD_AOE 0xa
+#define MC_CMD_AOE_MSGSET 0xa
/* MC_CMD_AOE_IN msgrequest */
#define MC_CMD_AOE_IN_LEN 4
@@ -2580,7 +2708,13 @@
#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_OFST 8
#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_LEN 8
#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_LO_OFST 8
+#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_LO_LEN 4
+#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_LO_LBN 64
+#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_HI_OFST 12
+#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_HI_LEN 4
+#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_HI_LBN 96
+#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_AOE_IN_MAC_STATS_CMD_OFST 16
#define MC_CMD_AOE_IN_MAC_STATS_CMD_LEN 4
#define MC_CMD_AOE_IN_MAC_STATS_DMA_OFST 16
@@ -3024,7 +3158,13 @@
#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_OFST 0
#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_LEN 8
#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_LO_OFST 0
+#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_LO_LEN 4
+#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_LO_LBN 0
+#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_LO_WIDTH 32
#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_HI_OFST 4
+#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_HI_LEN 4
+#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_HI_LBN 32
+#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_HI_WIDTH 32
#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS
/* MC_CMD_AOE_OUT_GET_PHY_MEDIA_INFO msgresponse */
diff --git a/drivers/common/sfc_efx/base/efx_regs_mcdi_strs.h b/drivers/common/sfc_efx/base/efx_regs_mcdi_strs.h
index be570bc0a..e8fbb6f94 100644
--- a/drivers/common/sfc_efx/base/efx_regs_mcdi_strs.h
+++ b/drivers/common/sfc_efx/base/efx_regs_mcdi_strs.h
@@ -6,7 +6,7 @@
/*
* This file is automatically generated. DO NOT EDIT IT.
- * To make changes, edit the .yml files in sfregistry under doc/mcdi/ and
+ * To make changes, edit the .yml files in smartnic_registry under doc/mcdi/ and
* rebuild this file with "make mcdi_headers_v5".
*
* The version of this file has MCDI strings really used in the libefx.
--
2.20.1
^ permalink raw reply [relevance 1%]
* [dpdk-dev] [PATCH v3 1/3] common/sfc_efx/base: update MCDI headers
@ 2021-05-24 11:18 1% ` Ivan Malov
1 sibling, 0 replies; 200+ results
From: Ivan Malov @ 2021-05-24 11:18 UTC (permalink / raw)
To: dev; +Cc: Andrew Rybchenko, Ray Kinsella, Ferruh Yigit
From: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
---
drivers/common/sfc_efx/base/efx_regs_mcdi.h | 3532 +++++++++++++++--
.../common/sfc_efx/base/efx_regs_mcdi_aoe.h | 142 +-
.../common/sfc_efx/base/efx_regs_mcdi_strs.h | 2 +-
3 files changed, 3331 insertions(+), 345 deletions(-)
diff --git a/drivers/common/sfc_efx/base/efx_regs_mcdi.h b/drivers/common/sfc_efx/base/efx_regs_mcdi.h
index 976db37d6..a3c9f076e 100644
--- a/drivers/common/sfc_efx/base/efx_regs_mcdi.h
+++ b/drivers/common/sfc_efx/base/efx_regs_mcdi.h
@@ -6,7 +6,7 @@
/*
* This file is automatically generated. DO NOT EDIT IT.
- * To make changes, edit the .yml files in sfregistry under doc/mcdi/ and
+ * To make changes, edit the .yml files in smartnic_registry under doc/mcdi/ and
* rebuild this file with "make mcdi_headers_v5".
*/
@@ -410,6 +410,48 @@
#define MC_CMD_RESOURCE_INSTANCE_ANY 0xffffffff
#define MC_CMD_RESOURCE_INSTANCE_NONE 0xfffffffe /* enum */
+/* MC_CMD_FPGA_FLASH_INDEX enum */
+#define MC_CMD_FPGA_FLASH_PRIMARY 0x0 /* enum */
+#define MC_CMD_FPGA_FLASH_SECONDARY 0x1 /* enum */
+
+/* MC_CMD_EXTERNAL_MAE_LINK_MODE enum */
+/* enum: Legacy mode as described in XN-200039-TC. */
+#define MC_CMD_EXTERNAL_MAE_LINK_MODE_LEGACY 0x0
+/* enum: Switchdev mode as described in XN-200039-TC. */
+#define MC_CMD_EXTERNAL_MAE_LINK_MODE_SWITCHDEV 0x1
+/* enum: Bootstrap mode as described in XN-200039-TC. */
+#define MC_CMD_EXTERNAL_MAE_LINK_MODE_BOOTSTRAP 0x2
+/* enum: Link-mode change is in-progress as described in XN-200039-TC. */
+#define MC_CMD_EXTERNAL_MAE_LINK_MODE_PENDING 0xf
+
+/* PCIE_INTERFACE enum: From EF100 onwards, SFC products can have multiple PCIe
+ * interfaces. There is a need to refer to interfaces explicitly from drivers
+ * (for example, a management driver on one interface administering a function
+ * on another interface). This enumeration provides stable identifiers to all
+ * interfaces present on a product. Product documentation will specify which
+ * interfaces exist and their associated identifier. In general, drivers,
+ * should not assign special meanings to specific values. Instead, behaviour
+ * should be determined by NIC configuration, which will identify interfaces
+ * where appropriate.
+ */
+/* enum: Primary host interfaces. Typically (i.e. for all known SFC products)
+ * the interface exposed on the edge connector (or form factor equivalent).
+ */
+#define PCIE_INTERFACE_HOST_PRIMARY 0x0
+/* enum: Riverhead and keystone products have a second PCIe interface to which
+ * an on-NIC ARM module is expected to be connected.
+ */
+#define PCIE_INTERFACE_NIC_EMBEDDED 0x1
+/* enum: For MCDI commands issued over a PCIe interface, this value is
+ * translated into the interface over which the command was issued. Not
+ * meaningful for other MCDI transports.
+ */
+#define PCIE_INTERFACE_CALLER 0xffffffff
+
+/* MC_CLIENT_ID_SPECIFIER enum */
+/* enum: Equivalent to the caller's client ID */
+#define MC_CMD_CLIENT_ID_SELF 0xffffffff
+
/* MAE_FIELD_SUPPORT_STATUS enum */
/* enum: The NIC does not support this field. The driver must ensure that any
* mask associated with this field in a match rule is zeroed. The NIC may
@@ -470,6 +512,20 @@
#define MAE_FIELD_CT_PRIVATE_FLAGS 0x8
/* enum: 1 if the packet ingressed the NIC from one of the MACs, else 0. */
#define MAE_FIELD_IS_FROM_NETWORK 0x9
+/* enum: 1 if the packet has 1 or more VLAN tags, else 0. */
+#define MAE_FIELD_HAS_OVLAN 0xa
+/* enum: 1 if the packet has 2 or more VLAN tags, else 0. */
+#define MAE_FIELD_HAS_IVLAN 0xb
+/* enum: 1 if the outer packet has 1 or more VLAN tags, else 0; only present
+ * when encap
+ */
+#define MAE_FIELD_ENC_HAS_OVLAN 0xc
+/* enum: 1 if the outer packet has 2 or more VLAN tags, else 0; only present
+ * when encap
+ */
+#define MAE_FIELD_ENC_HAS_IVLAN 0xd
+/* enum: Packet is IP fragment */
+#define MAE_FIELD_ENC_IP_FRAG 0xe
#define MAE_FIELD_ETHER_TYPE 0x21 /* enum */
#define MAE_FIELD_VLAN0_TCI 0x22 /* enum */
#define MAE_FIELD_VLAN0_PROTO 0x23 /* enum */
@@ -508,6 +564,10 @@
#define MAE_FIELD_L4_DPORT 0x33
/* enum: Inner when encap */
#define MAE_FIELD_TCP_FLAGS 0x34
+/* enum: TCP packet with any of SYN, FIN or RST flag set */
+#define MAE_FIELD_TCP_SYN_FIN_RST 0x35
+/* enum: Packet is IP fragment with fragment offset 0 */
+#define MAE_FIELD_IP_FIRST_FRAG 0x36
/* enum: The type of encapsulated used for this packet. Value as per
* ENCAP_TYPE_*.
*/
@@ -550,8 +610,8 @@
#define MAE_FIELD_ENC_L4_SPORT 0x52
/* enum: Outer; only present when encap */
#define MAE_FIELD_ENC_L4_DPORT 0x53
-/* enum: VNI (when VXLAN or GENEVE) VSID (when NVGRE) Outer; only present when
- * encap
+/* enum: VNI (when VXLAN or GENEVE) VSID (when NVGRE) Bottom 24 bits of Key
+ * (when L2GRE) Outer; only present when encap
*/
#define MAE_FIELD_ENC_VNET_ID 0x54
@@ -566,6 +626,14 @@
#define MAE_MCDI_ENCAP_TYPE_GENEVE 0x3 /* enum */
#define MAE_MCDI_ENCAP_TYPE_L2GRE 0x4 /* enum */
+/* MAE_MPORT_END enum: Selects which end of the logical link identified by an
+ * MPORT_SELECTOR is targeted by an operation.
+ */
+/* enum: Selects the port on the MAE virtual switch */
+#define MAE_MPORT_END_MAE 0x1
+/* enum: Selects the virtual NIC plugged into the MAE switch */
+#define MAE_MPORT_END_VNIC 0x2
+
/* MCDI_EVENT structuredef: The structure of an MCDI_EVENT on Siena/EF10/EF100
* platforms
*/
@@ -647,17 +715,21 @@
#define MCDI_EVENT_TX_ERR_TYPE_OFST 0
#define MCDI_EVENT_TX_ERR_TYPE_LBN 12
#define MCDI_EVENT_TX_ERR_TYPE_WIDTH 4
-/* enum: Descriptor loader reported failure */
+/* enum: Descriptor loader reported failure. Specific to EF10-family NICs. */
#define MCDI_EVENT_TX_ERR_DL_FAIL 0x1
-/* enum: Descriptor ring empty and no EOP seen for packet */
+/* enum: Descriptor ring empty and no EOP seen for packet. Specific to
+ * EF10-family NICs
+ */
#define MCDI_EVENT_TX_ERR_NO_EOP 0x2
-/* enum: Overlength packet */
+/* enum: Overlength packet. Specific to EF10-family NICs. */
#define MCDI_EVENT_TX_ERR_2BIG 0x3
-/* enum: Malformed option descriptor */
+/* enum: Malformed option descriptor. Specific to EF10-family NICs. */
#define MCDI_EVENT_TX_BAD_OPTDESC 0x5
-/* enum: Option descriptor part way through a packet */
+/* enum: Option descriptor part way through a packet. Specific to EF10-family
+ * NICs.
+ */
#define MCDI_EVENT_TX_OPT_IN_PKT 0x8
-/* enum: DMA or PIO data access error */
+/* enum: DMA or PIO data access error. Specific to EF10-family NICs */
#define MCDI_EVENT_TX_ERR_BAD_DMA_OR_PIO 0x9
#define MCDI_EVENT_TX_ERR_INFO_OFST 0
#define MCDI_EVENT_TX_ERR_INFO_LBN 16
@@ -1270,7 +1342,13 @@
#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_OFST 8
#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LEN 8
#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LO_OFST 8
+#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LO_LEN 4
+#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LO_LBN 64
+#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_LO_WIDTH 32
#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_HI_OFST 12
+#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_HI_LEN 4
+#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_HI_LBN 96
+#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_HI_WIDTH 32
#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_MINNUM 1
#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_MAXNUM 30
#define FCDI_EXTENDED_EVENT_PPS_TIMESTAMPS_MAXNUM_MCDI2 126
@@ -1384,6 +1462,7 @@
* has additional checks to reject insecure calls.
*/
#define MC_CMD_READ32 0x1
+#define MC_CMD_READ32_MSGSET 0x1
#undef MC_CMD_0x1_PRIVILEGE_CTG
#define MC_CMD_0x1_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -1413,6 +1492,7 @@
* Write multiple 32byte words to MC memory.
*/
#define MC_CMD_WRITE32 0x2
+#define MC_CMD_WRITE32_MSGSET 0x2
#undef MC_CMD_0x2_PRIVILEGE_CTG
#define MC_CMD_0x2_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -1442,6 +1522,7 @@
* has additional checks to reject insecure calls.
*/
#define MC_CMD_COPYCODE 0x3
+#define MC_CMD_COPYCODE_MSGSET 0x3
#undef MC_CMD_0x3_PRIVILEGE_CTG
#define MC_CMD_0x3_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -1505,6 +1586,7 @@
* Select function for function-specific commands.
*/
#define MC_CMD_SET_FUNC 0x4
+#define MC_CMD_SET_FUNC_MSGSET 0x4
#undef MC_CMD_0x4_PRIVILEGE_CTG
#define MC_CMD_0x4_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -1524,6 +1606,7 @@
* Get the instruction address from which the MC booted.
*/
#define MC_CMD_GET_BOOT_STATUS 0x5
+#define MC_CMD_GET_BOOT_STATUS_MSGSET 0x5
#undef MC_CMD_0x5_PRIVILEGE_CTG
#define MC_CMD_0x5_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -1558,6 +1641,7 @@
* fields will only be present if OUT.GLOBAL_FLAGS != NO_FAILS
*/
#define MC_CMD_GET_ASSERTS 0x6
+#define MC_CMD_GET_ASSERTS_MSGSET 0x6
#undef MC_CMD_0x6_PRIVILEGE_CTG
#define MC_CMD_0x6_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -1682,12 +1766,24 @@
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_OFST 260
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_LEN 8
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_LO_OFST 260
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_LO_LEN 4
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_LO_LBN 2080
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_LO_WIDTH 32
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_HI_OFST 264
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_HI_LEN 4
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_HI_LBN 2112
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_BUILD_TIMESTAMP_HI_WIDTH 32
/* MC firmware version number */
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_OFST 268
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_LEN 8
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_LO_OFST 268
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_LO_LEN 4
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_LO_LBN 2144
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_LO_WIDTH 32
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_HI_OFST 272
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_HI_LEN 4
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_HI_LBN 2176
+#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_VERSION_HI_WIDTH 32
/* MC firmware security level */
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_SECURITY_LEVEL_OFST 276
#define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_SECURITY_LEVEL_LEN 4
@@ -1705,6 +1801,7 @@
* sensor notifications and MCDI completions
*/
#define MC_CMD_LOG_CTRL 0x7
+#define MC_CMD_LOG_CTRL_MSGSET 0x7
#undef MC_CMD_0x7_PRIVILEGE_CTG
#define MC_CMD_0x7_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -1731,6 +1828,7 @@
* Get version information about adapter components.
*/
#define MC_CMD_GET_VERSION 0x8
+#define MC_CMD_GET_VERSION_MSGSET 0x8
#undef MC_CMD_0x8_PRIVILEGE_CTG
#define MC_CMD_0x8_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -1771,7 +1869,13 @@
#define MC_CMD_GET_VERSION_OUT_VERSION_OFST 24
#define MC_CMD_GET_VERSION_OUT_VERSION_LEN 8
#define MC_CMD_GET_VERSION_OUT_VERSION_LO_OFST 24
+#define MC_CMD_GET_VERSION_OUT_VERSION_LO_LEN 4
+#define MC_CMD_GET_VERSION_OUT_VERSION_LO_LBN 192
+#define MC_CMD_GET_VERSION_OUT_VERSION_LO_WIDTH 32
#define MC_CMD_GET_VERSION_OUT_VERSION_HI_OFST 28
+#define MC_CMD_GET_VERSION_OUT_VERSION_HI_LEN 4
+#define MC_CMD_GET_VERSION_OUT_VERSION_HI_LBN 224
+#define MC_CMD_GET_VERSION_OUT_VERSION_HI_WIDTH 32
/* MC_CMD_GET_VERSION_EXT_OUT msgresponse */
#define MC_CMD_GET_VERSION_EXT_OUT_LEN 48
@@ -1787,7 +1891,13 @@
#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_OFST 24
#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_LEN 8
#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_LO_OFST 24
+#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_LO_LEN 4
+#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_LO_LBN 192
+#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_LO_WIDTH 32
#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_HI_OFST 28
+#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_HI_LEN 4
+#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_HI_LBN 224
+#define MC_CMD_GET_VERSION_EXT_OUT_VERSION_HI_WIDTH 32
/* extra info */
#define MC_CMD_GET_VERSION_EXT_OUT_EXTRA_OFST 32
#define MC_CMD_GET_VERSION_EXT_OUT_EXTRA_LEN 16
@@ -1811,7 +1921,13 @@
#define MC_CMD_GET_VERSION_V2_OUT_VERSION_OFST 24
#define MC_CMD_GET_VERSION_V2_OUT_VERSION_LEN 8
#define MC_CMD_GET_VERSION_V2_OUT_VERSION_LO_OFST 24
+#define MC_CMD_GET_VERSION_V2_OUT_VERSION_LO_LEN 4
+#define MC_CMD_GET_VERSION_V2_OUT_VERSION_LO_LBN 192
+#define MC_CMD_GET_VERSION_V2_OUT_VERSION_LO_WIDTH 32
#define MC_CMD_GET_VERSION_V2_OUT_VERSION_HI_OFST 28
+#define MC_CMD_GET_VERSION_V2_OUT_VERSION_HI_LEN 4
+#define MC_CMD_GET_VERSION_V2_OUT_VERSION_HI_LBN 224
+#define MC_CMD_GET_VERSION_V2_OUT_VERSION_HI_WIDTH 32
/* extra info */
#define MC_CMD_GET_VERSION_V2_OUT_EXTRA_OFST 32
#define MC_CMD_GET_VERSION_V2_OUT_EXTRA_LEN 16
@@ -1833,6 +1949,33 @@
#define MC_CMD_GET_VERSION_V2_OUT_BOARD_EXT_INFO_PRESENT_OFST 48
#define MC_CMD_GET_VERSION_V2_OUT_BOARD_EXT_INFO_PRESENT_LBN 4
#define MC_CMD_GET_VERSION_V2_OUT_BOARD_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_DATAPATH_HW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_DATAPATH_HW_VERSION_PRESENT_LBN 5
+#define MC_CMD_GET_VERSION_V2_OUT_DATAPATH_HW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_DATAPATH_FW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_DATAPATH_FW_VERSION_PRESENT_LBN 6
+#define MC_CMD_GET_VERSION_V2_OUT_DATAPATH_FW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_BOOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_BOOT_VERSION_PRESENT_LBN 7
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_BOOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_UBOOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_UBOOT_VERSION_PRESENT_LBN 8
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_UBOOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_LBN 9
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_LBN 10
+#define MC_CMD_GET_VERSION_V2_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_VERSION_PRESENT_LBN 11
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_BOARD_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_BOARD_VERSION_PRESENT_LBN 12
+#define MC_CMD_GET_VERSION_V2_OUT_BOARD_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V2_OUT_BUNDLE_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V2_OUT_BUNDLE_VERSION_PRESENT_LBN 13
+#define MC_CMD_GET_VERSION_V2_OUT_BUNDLE_VERSION_PRESENT_WIDTH 1
/* MC firmware unique build ID (as binary SHA-1 value) */
#define MC_CMD_GET_VERSION_V2_OUT_MCFW_BUILD_ID_OFST 52
#define MC_CMD_GET_VERSION_V2_OUT_MCFW_BUILD_ID_LEN 20
@@ -1850,7 +1993,13 @@
#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_OFST 156
#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_LEN 8
#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_LO_OFST 156
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_LO_LEN 4
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_LO_LBN 1248
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_LO_WIDTH 32
#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_HI_OFST 160
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_HI_LEN 4
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_HI_LBN 1280
+#define MC_CMD_GET_VERSION_V2_OUT_SUCFW_BUILD_DATE_HI_WIDTH 32
/* The ID of the SUC chip. This is specific to the platform but typically
* indicates family, memory sizes etc. See SF-116728-SW for further details.
*/
@@ -1864,7 +2013,13 @@
#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_OFST 184
#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_LEN 8
#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_LO_OFST 184
+#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_LO_LEN 4
+#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_LO_LBN 1472
+#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_LO_WIDTH 32
#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_HI_OFST 188
+#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_HI_LEN 4
+#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_HI_LBN 1504
+#define MC_CMD_GET_VERSION_V2_OUT_CMCFW_BUILD_DATE_HI_WIDTH 32
/* FPGA version as three numbers. On Riverhead based systems this field uses
* the same encoding as hardware version ID registers (MC_FPGA_BUILD_HWRD_REG):
* FPGA_VERSION[0]: x => Image H{x} FPGA_VERSION[1]: Revision letter (0 => A, 1
@@ -1886,12 +2041,496 @@
#define MC_CMD_GET_VERSION_V2_OUT_BOARD_SERIAL_OFST 240
#define MC_CMD_GET_VERSION_V2_OUT_BOARD_SERIAL_LEN 64
+/* MC_CMD_GET_VERSION_V3_OUT msgresponse: Extended response providing version
+ * information for all adapter components. For Riverhead based designs, base MC
+ * firmware version fields refer to NMC firmware, while CMC firmware data is in
+ * dedicated CMC fields. Flags indicate which data is present in the response
+ * (depending on which components exist on a particular adapter)
+ */
+#define MC_CMD_GET_VERSION_V3_OUT_LEN 328
+/* MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */
+/* MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */
+/* Enum values, see field(s): */
+/* MC_CMD_GET_VERSION_V0_OUT/MC_CMD_GET_VERSION_OUT_FIRMWARE */
+#define MC_CMD_GET_VERSION_V3_OUT_PCOL_OFST 4
+#define MC_CMD_GET_VERSION_V3_OUT_PCOL_LEN 4
+/* 128bit mask of functions supported by the current firmware */
+#define MC_CMD_GET_VERSION_V3_OUT_SUPPORTED_FUNCS_OFST 8
+#define MC_CMD_GET_VERSION_V3_OUT_SUPPORTED_FUNCS_LEN 16
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_OFST 24
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_LEN 8
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_LO_OFST 24
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_LO_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_LO_LBN 192
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_HI_OFST 28
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_HI_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_HI_LBN 224
+#define MC_CMD_GET_VERSION_V3_OUT_VERSION_HI_WIDTH 32
+/* extra info */
+#define MC_CMD_GET_VERSION_V3_OUT_EXTRA_OFST 32
+#define MC_CMD_GET_VERSION_V3_OUT_EXTRA_LEN 16
+/* Flags indicating which extended fields are valid */
+#define MC_CMD_GET_VERSION_V3_OUT_FLAGS_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_FLAGS_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_EXT_INFO_PRESENT_LBN 0
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_EXT_INFO_PRESENT_LBN 1
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_CMC_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_CMC_EXT_INFO_PRESENT_LBN 2
+#define MC_CMD_GET_VERSION_V3_OUT_CMC_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_FPGA_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_FPGA_EXT_INFO_PRESENT_LBN 3
+#define MC_CMD_GET_VERSION_V3_OUT_FPGA_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_EXT_INFO_PRESENT_LBN 4
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_HW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_HW_VERSION_PRESENT_LBN 5
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_HW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_FW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_FW_VERSION_PRESENT_LBN 6
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_FW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_BOOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_BOOT_VERSION_PRESENT_LBN 7
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_BOOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_UBOOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_UBOOT_VERSION_PRESENT_LBN 8
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_UBOOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_LBN 9
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_LBN 10
+#define MC_CMD_GET_VERSION_V3_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_VERSION_PRESENT_LBN 11
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_VERSION_PRESENT_LBN 12
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V3_OUT_BUNDLE_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V3_OUT_BUNDLE_VERSION_PRESENT_LBN 13
+#define MC_CMD_GET_VERSION_V3_OUT_BUNDLE_VERSION_PRESENT_WIDTH 1
+/* MC firmware unique build ID (as binary SHA-1 value) */
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_BUILD_ID_OFST 52
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_BUILD_ID_LEN 20
+/* MC firmware security level */
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_SECURITY_LEVEL_OFST 72
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_SECURITY_LEVEL_LEN 4
+/* MC firmware build name (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_BUILD_NAME_OFST 76
+#define MC_CMD_GET_VERSION_V3_OUT_MCFW_BUILD_NAME_LEN 64
+/* The SUC firmware version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_VERSION_OFST 140
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_VERSION_NUM 4
+/* SUC firmware build date (as 64-bit Unix timestamp) */
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_OFST 156
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_LEN 8
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_LO_OFST 156
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_LO_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_LO_LBN 1248
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_HI_OFST 160
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_HI_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_HI_LBN 1280
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_BUILD_DATE_HI_WIDTH 32
+/* The ID of the SUC chip. This is specific to the platform but typically
+ * indicates family, memory sizes etc. See SF-116728-SW for further details.
+ */
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_CHIP_ID_OFST 164
+#define MC_CMD_GET_VERSION_V3_OUT_SUCFW_CHIP_ID_LEN 4
+/* The CMC firmware version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_VERSION_OFST 168
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_VERSION_NUM 4
+/* CMC firmware build date (as 64-bit Unix timestamp) */
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_OFST 184
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_LEN 8
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_LO_OFST 184
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_LO_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_LO_LBN 1472
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_HI_OFST 188
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_HI_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_HI_LBN 1504
+#define MC_CMD_GET_VERSION_V3_OUT_CMCFW_BUILD_DATE_HI_WIDTH 32
+/* FPGA version as three numbers. On Riverhead based systems this field uses
+ * the same encoding as hardware version ID registers (MC_FPGA_BUILD_HWRD_REG):
+ * FPGA_VERSION[0]: x => Image H{x} FPGA_VERSION[1]: Revision letter (0 => A, 1
+ * => B, ...) FPGA_VERSION[2]: Sub-revision number
+ */
+#define MC_CMD_GET_VERSION_V3_OUT_FPGA_VERSION_OFST 192
+#define MC_CMD_GET_VERSION_V3_OUT_FPGA_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_FPGA_VERSION_NUM 3
+/* Extra FPGA revision information (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V3_OUT_FPGA_EXTRA_OFST 204
+#define MC_CMD_GET_VERSION_V3_OUT_FPGA_EXTRA_LEN 16
+/* Board name / adapter model (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_NAME_OFST 220
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_NAME_LEN 16
+/* Board revision number */
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_REVISION_OFST 236
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_REVISION_LEN 4
+/* Board serial number (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_SERIAL_OFST 240
+#define MC_CMD_GET_VERSION_V3_OUT_BOARD_SERIAL_LEN 64
+/* The version of the datapath hardware design as three number - a.b.c */
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_HW_VERSION_OFST 304
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_HW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_HW_VERSION_NUM 3
+/* The version of the firmware library used to control the datapath as three
+ * number - a.b.c
+ */
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_FW_VERSION_OFST 316
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_FW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V3_OUT_DATAPATH_FW_VERSION_NUM 3
+
+/* MC_CMD_GET_VERSION_V4_OUT msgresponse: Extended response providing SoC
+ * version information
+ */
+#define MC_CMD_GET_VERSION_V4_OUT_LEN 392
+/* MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */
+/* MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */
+/* Enum values, see field(s): */
+/* MC_CMD_GET_VERSION_V0_OUT/MC_CMD_GET_VERSION_OUT_FIRMWARE */
+#define MC_CMD_GET_VERSION_V4_OUT_PCOL_OFST 4
+#define MC_CMD_GET_VERSION_V4_OUT_PCOL_LEN 4
+/* 128bit mask of functions supported by the current firmware */
+#define MC_CMD_GET_VERSION_V4_OUT_SUPPORTED_FUNCS_OFST 8
+#define MC_CMD_GET_VERSION_V4_OUT_SUPPORTED_FUNCS_LEN 16
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_OFST 24
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_LEN 8
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_LO_OFST 24
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_LO_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_LO_LBN 192
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_HI_OFST 28
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_HI_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_HI_LBN 224
+#define MC_CMD_GET_VERSION_V4_OUT_VERSION_HI_WIDTH 32
+/* extra info */
+#define MC_CMD_GET_VERSION_V4_OUT_EXTRA_OFST 32
+#define MC_CMD_GET_VERSION_V4_OUT_EXTRA_LEN 16
+/* Flags indicating which extended fields are valid */
+#define MC_CMD_GET_VERSION_V4_OUT_FLAGS_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_FLAGS_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_EXT_INFO_PRESENT_LBN 0
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_EXT_INFO_PRESENT_LBN 1
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_CMC_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_CMC_EXT_INFO_PRESENT_LBN 2
+#define MC_CMD_GET_VERSION_V4_OUT_CMC_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_FPGA_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_FPGA_EXT_INFO_PRESENT_LBN 3
+#define MC_CMD_GET_VERSION_V4_OUT_FPGA_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_EXT_INFO_PRESENT_LBN 4
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_HW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_HW_VERSION_PRESENT_LBN 5
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_HW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_FW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_FW_VERSION_PRESENT_LBN 6
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_FW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_BOOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_BOOT_VERSION_PRESENT_LBN 7
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_BOOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_UBOOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_UBOOT_VERSION_PRESENT_LBN 8
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_UBOOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_LBN 9
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_LBN 10
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_VERSION_PRESENT_LBN 11
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_VERSION_PRESENT_LBN 12
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V4_OUT_BUNDLE_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V4_OUT_BUNDLE_VERSION_PRESENT_LBN 13
+#define MC_CMD_GET_VERSION_V4_OUT_BUNDLE_VERSION_PRESENT_WIDTH 1
+/* MC firmware unique build ID (as binary SHA-1 value) */
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_BUILD_ID_OFST 52
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_BUILD_ID_LEN 20
+/* MC firmware security level */
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_SECURITY_LEVEL_OFST 72
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_SECURITY_LEVEL_LEN 4
+/* MC firmware build name (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_BUILD_NAME_OFST 76
+#define MC_CMD_GET_VERSION_V4_OUT_MCFW_BUILD_NAME_LEN 64
+/* The SUC firmware version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_VERSION_OFST 140
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_VERSION_NUM 4
+/* SUC firmware build date (as 64-bit Unix timestamp) */
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_OFST 156
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_LEN 8
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_LO_OFST 156
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_LO_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_LO_LBN 1248
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_HI_OFST 160
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_HI_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_HI_LBN 1280
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_BUILD_DATE_HI_WIDTH 32
+/* The ID of the SUC chip. This is specific to the platform but typically
+ * indicates family, memory sizes etc. See SF-116728-SW for further details.
+ */
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_CHIP_ID_OFST 164
+#define MC_CMD_GET_VERSION_V4_OUT_SUCFW_CHIP_ID_LEN 4
+/* The CMC firmware version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_VERSION_OFST 168
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_VERSION_NUM 4
+/* CMC firmware build date (as 64-bit Unix timestamp) */
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_OFST 184
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_LEN 8
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_LO_OFST 184
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_LO_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_LO_LBN 1472
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_HI_OFST 188
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_HI_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_HI_LBN 1504
+#define MC_CMD_GET_VERSION_V4_OUT_CMCFW_BUILD_DATE_HI_WIDTH 32
+/* FPGA version as three numbers. On Riverhead based systems this field uses
+ * the same encoding as hardware version ID registers (MC_FPGA_BUILD_HWRD_REG):
+ * FPGA_VERSION[0]: x => Image H{x} FPGA_VERSION[1]: Revision letter (0 => A, 1
+ * => B, ...) FPGA_VERSION[2]: Sub-revision number
+ */
+#define MC_CMD_GET_VERSION_V4_OUT_FPGA_VERSION_OFST 192
+#define MC_CMD_GET_VERSION_V4_OUT_FPGA_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_FPGA_VERSION_NUM 3
+/* Extra FPGA revision information (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V4_OUT_FPGA_EXTRA_OFST 204
+#define MC_CMD_GET_VERSION_V4_OUT_FPGA_EXTRA_LEN 16
+/* Board name / adapter model (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_NAME_OFST 220
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_NAME_LEN 16
+/* Board revision number */
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_REVISION_OFST 236
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_REVISION_LEN 4
+/* Board serial number (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_SERIAL_OFST 240
+#define MC_CMD_GET_VERSION_V4_OUT_BOARD_SERIAL_LEN 64
+/* The version of the datapath hardware design as three number - a.b.c */
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_HW_VERSION_OFST 304
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_HW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_HW_VERSION_NUM 3
+/* The version of the firmware library used to control the datapath as three
+ * number - a.b.c
+ */
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_FW_VERSION_OFST 316
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_FW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_DATAPATH_FW_VERSION_NUM 3
+/* The SOC boot version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_BOOT_VERSION_OFST 328
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_BOOT_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_BOOT_VERSION_NUM 4
+/* The SOC uboot version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_UBOOT_VERSION_OFST 344
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_UBOOT_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_UBOOT_VERSION_NUM 4
+/* The SOC main rootfs version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_MAIN_ROOTFS_VERSION_OFST 360
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_MAIN_ROOTFS_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_MAIN_ROOTFS_VERSION_NUM 4
+/* The SOC recovery buildroot version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_RECOVERY_BUILDROOT_VERSION_OFST 376
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_RECOVERY_BUILDROOT_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V4_OUT_SOC_RECOVERY_BUILDROOT_VERSION_NUM 4
+
+/* MC_CMD_GET_VERSION_V5_OUT msgresponse: Extended response providing bundle
+ * and board version information
+ */
+#define MC_CMD_GET_VERSION_V5_OUT_LEN 424
+/* MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */
+/* MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */
+/* Enum values, see field(s): */
+/* MC_CMD_GET_VERSION_V0_OUT/MC_CMD_GET_VERSION_OUT_FIRMWARE */
+#define MC_CMD_GET_VERSION_V5_OUT_PCOL_OFST 4
+#define MC_CMD_GET_VERSION_V5_OUT_PCOL_LEN 4
+/* 128bit mask of functions supported by the current firmware */
+#define MC_CMD_GET_VERSION_V5_OUT_SUPPORTED_FUNCS_OFST 8
+#define MC_CMD_GET_VERSION_V5_OUT_SUPPORTED_FUNCS_LEN 16
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_OFST 24
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_LEN 8
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_LO_OFST 24
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_LO_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_LO_LBN 192
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_HI_OFST 28
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_HI_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_HI_LBN 224
+#define MC_CMD_GET_VERSION_V5_OUT_VERSION_HI_WIDTH 32
+/* extra info */
+#define MC_CMD_GET_VERSION_V5_OUT_EXTRA_OFST 32
+#define MC_CMD_GET_VERSION_V5_OUT_EXTRA_LEN 16
+/* Flags indicating which extended fields are valid */
+#define MC_CMD_GET_VERSION_V5_OUT_FLAGS_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_FLAGS_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_EXT_INFO_PRESENT_LBN 0
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_EXT_INFO_PRESENT_LBN 1
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_CMC_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_CMC_EXT_INFO_PRESENT_LBN 2
+#define MC_CMD_GET_VERSION_V5_OUT_CMC_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_FPGA_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_FPGA_EXT_INFO_PRESENT_LBN 3
+#define MC_CMD_GET_VERSION_V5_OUT_FPGA_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_EXT_INFO_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_EXT_INFO_PRESENT_LBN 4
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_EXT_INFO_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_HW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_HW_VERSION_PRESENT_LBN 5
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_HW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_FW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_FW_VERSION_PRESENT_LBN 6
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_FW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_BOOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_BOOT_VERSION_PRESENT_LBN 7
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_BOOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_UBOOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_UBOOT_VERSION_PRESENT_LBN 8
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_UBOOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_LBN 9
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_MAIN_ROOTFS_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_LBN 10
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_RECOVERY_BUILDROOT_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_VERSION_PRESENT_LBN 11
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_VERSION_PRESENT_LBN 12
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_VERSION_PRESENT_WIDTH 1
+#define MC_CMD_GET_VERSION_V5_OUT_BUNDLE_VERSION_PRESENT_OFST 48
+#define MC_CMD_GET_VERSION_V5_OUT_BUNDLE_VERSION_PRESENT_LBN 13
+#define MC_CMD_GET_VERSION_V5_OUT_BUNDLE_VERSION_PRESENT_WIDTH 1
+/* MC firmware unique build ID (as binary SHA-1 value) */
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_BUILD_ID_OFST 52
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_BUILD_ID_LEN 20
+/* MC firmware security level */
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_SECURITY_LEVEL_OFST 72
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_SECURITY_LEVEL_LEN 4
+/* MC firmware build name (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_BUILD_NAME_OFST 76
+#define MC_CMD_GET_VERSION_V5_OUT_MCFW_BUILD_NAME_LEN 64
+/* The SUC firmware version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_VERSION_OFST 140
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_VERSION_NUM 4
+/* SUC firmware build date (as 64-bit Unix timestamp) */
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_OFST 156
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_LEN 8
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_LO_OFST 156
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_LO_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_LO_LBN 1248
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_HI_OFST 160
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_HI_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_HI_LBN 1280
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_BUILD_DATE_HI_WIDTH 32
+/* The ID of the SUC chip. This is specific to the platform but typically
+ * indicates family, memory sizes etc. See SF-116728-SW for further details.
+ */
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_CHIP_ID_OFST 164
+#define MC_CMD_GET_VERSION_V5_OUT_SUCFW_CHIP_ID_LEN 4
+/* The CMC firmware version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_VERSION_OFST 168
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_VERSION_NUM 4
+/* CMC firmware build date (as 64-bit Unix timestamp) */
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_OFST 184
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_LEN 8
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_LO_OFST 184
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_LO_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_LO_LBN 1472
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_LO_WIDTH 32
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_HI_OFST 188
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_HI_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_HI_LBN 1504
+#define MC_CMD_GET_VERSION_V5_OUT_CMCFW_BUILD_DATE_HI_WIDTH 32
+/* FPGA version as three numbers. On Riverhead based systems this field uses
+ * the same encoding as hardware version ID registers (MC_FPGA_BUILD_HWRD_REG):
+ * FPGA_VERSION[0]: x => Image H{x} FPGA_VERSION[1]: Revision letter (0 => A, 1
+ * => B, ...) FPGA_VERSION[2]: Sub-revision number
+ */
+#define MC_CMD_GET_VERSION_V5_OUT_FPGA_VERSION_OFST 192
+#define MC_CMD_GET_VERSION_V5_OUT_FPGA_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_FPGA_VERSION_NUM 3
+/* Extra FPGA revision information (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V5_OUT_FPGA_EXTRA_OFST 204
+#define MC_CMD_GET_VERSION_V5_OUT_FPGA_EXTRA_LEN 16
+/* Board name / adapter model (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_NAME_OFST 220
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_NAME_LEN 16
+/* Board revision number */
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_REVISION_OFST 236
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_REVISION_LEN 4
+/* Board serial number (as null-terminated US-ASCII string) */
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_SERIAL_OFST 240
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_SERIAL_LEN 64
+/* The version of the datapath hardware design as three number - a.b.c */
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_HW_VERSION_OFST 304
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_HW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_HW_VERSION_NUM 3
+/* The version of the firmware library used to control the datapath as three
+ * number - a.b.c
+ */
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_FW_VERSION_OFST 316
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_FW_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_DATAPATH_FW_VERSION_NUM 3
+/* The SOC boot version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_BOOT_VERSION_OFST 328
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_BOOT_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_BOOT_VERSION_NUM 4
+/* The SOC uboot version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_UBOOT_VERSION_OFST 344
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_UBOOT_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_UBOOT_VERSION_NUM 4
+/* The SOC main rootfs version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_MAIN_ROOTFS_VERSION_OFST 360
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_MAIN_ROOTFS_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_MAIN_ROOTFS_VERSION_NUM 4
+/* The SOC recovery buildroot version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_RECOVERY_BUILDROOT_VERSION_OFST 376
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_RECOVERY_BUILDROOT_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_SOC_RECOVERY_BUILDROOT_VERSION_NUM 4
+/* Board version as four numbers - a.b.c.d. BOARD_VERSION[0] duplicates the
+ * BOARD_REVISION field
+ */
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_VERSION_OFST 392
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_BOARD_VERSION_NUM 4
+/* Bundle version as four numbers - a.b.c.d */
+#define MC_CMD_GET_VERSION_V5_OUT_BUNDLE_VERSION_OFST 408
+#define MC_CMD_GET_VERSION_V5_OUT_BUNDLE_VERSION_LEN 4
+#define MC_CMD_GET_VERSION_V5_OUT_BUNDLE_VERSION_NUM 4
+
/***********************************/
/* MC_CMD_PTP
* Perform PTP operation
*/
#define MC_CMD_PTP 0xb
+#define MC_CMD_PTP_MSGSET 0xb
#undef MC_CMD_0xb_PRIVILEGE_CTG
#define MC_CMD_0xb_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -2066,7 +2705,13 @@
#define MC_CMD_PTP_IN_ADJUST_FREQ_OFST 8
#define MC_CMD_PTP_IN_ADJUST_FREQ_LEN 8
#define MC_CMD_PTP_IN_ADJUST_FREQ_LO_OFST 8
+#define MC_CMD_PTP_IN_ADJUST_FREQ_LO_LEN 4
+#define MC_CMD_PTP_IN_ADJUST_FREQ_LO_LBN 64
+#define MC_CMD_PTP_IN_ADJUST_FREQ_LO_WIDTH 32
#define MC_CMD_PTP_IN_ADJUST_FREQ_HI_OFST 12
+#define MC_CMD_PTP_IN_ADJUST_FREQ_HI_LEN 4
+#define MC_CMD_PTP_IN_ADJUST_FREQ_HI_LBN 96
+#define MC_CMD_PTP_IN_ADJUST_FREQ_HI_WIDTH 32
/* enum: Number of fractional bits in frequency adjustment */
#define MC_CMD_PTP_IN_ADJUST_BITS 0x28
/* enum: Number of fractional bits in frequency adjustment when FP44_FREQ_ADJ
@@ -2097,7 +2742,13 @@
#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_OFST 8
#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_LEN 8
#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_LO_OFST 8
+#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_LO_LEN 4
+#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_LO_LBN 64
+#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_LO_WIDTH 32
#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_HI_OFST 12
+#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_HI_LEN 4
+#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_HI_LBN 96
+#define MC_CMD_PTP_IN_ADJUST_V2_FREQ_HI_WIDTH 32
/* enum: Number of fractional bits in frequency adjustment */
/* MC_CMD_PTP_IN_ADJUST_BITS 0x28 */
/* enum: Number of fractional bits in frequency adjustment when FP44_FREQ_ADJ
@@ -2136,7 +2787,13 @@
#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_OFST 12
#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_LEN 8
#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_LO_OFST 12
+#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_LO_LEN 4
+#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_LO_LBN 96
+#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_LO_WIDTH 32
#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_HI_OFST 16
+#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_HI_LEN 4
+#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_HI_LBN 128
+#define MC_CMD_PTP_IN_SYNCHRONIZE_START_ADDR_HI_WIDTH 32
/* MC_CMD_PTP_IN_MANFTEST_BASIC msgrequest */
#define MC_CMD_PTP_IN_MANFTEST_BASIC_LEN 8
@@ -2252,7 +2909,13 @@
#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_OFST 8
#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_LEN 8
#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_LO_OFST 8
+#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_LO_LEN 4
+#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_LO_LBN 64
+#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_LO_WIDTH 32
#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_HI_OFST 12
+#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_HI_LEN 4
+#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_HI_LBN 96
+#define MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST_FREQ_HI_WIDTH 32
/* Enum values, see field(s): */
/* MC_CMD_PTP/MC_CMD_PTP_IN_ADJUST/FREQ */
@@ -2283,7 +2946,13 @@
#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_OFST 12
#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_LEN 8
#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_LO_OFST 12
+#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_LO_LEN 4
+#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_LO_LBN 96
+#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_LO_WIDTH 32
#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_HI_OFST 16
+#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_HI_LEN 4
+#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_HI_LBN 128
+#define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_UUID_HI_WIDTH 32
/* MC_CMD_PTP_IN_RX_SET_DOMAIN_FILTER msgrequest */
#define MC_CMD_PTP_IN_RX_SET_DOMAIN_FILTER_LEN 16
@@ -2745,6 +3414,7 @@
* Read 32bit words from the indirect memory map.
*/
#define MC_CMD_CSR_READ32 0xc
+#define MC_CMD_CSR_READ32_MSGSET 0xc
#undef MC_CMD_0xc_PRIVILEGE_CTG
#define MC_CMD_0xc_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -2778,6 +3448,7 @@
* Write 32bit dwords to the indirect memory map.
*/
#define MC_CMD_CSR_WRITE32 0xd
+#define MC_CMD_CSR_WRITE32_MSGSET 0xd
#undef MC_CMD_0xd_PRIVILEGE_CTG
#define MC_CMD_0xd_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -2811,6 +3482,7 @@
* MCDI command to avoid creating too many MCDI commands.
*/
#define MC_CMD_HP 0x54
+#define MC_CMD_HP_MSGSET 0x54
#undef MC_CMD_0x54_PRIVILEGE_CTG
#define MC_CMD_0x54_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -2834,7 +3506,13 @@
#define MC_CMD_HP_IN_OCSD_ADDR_OFST 4
#define MC_CMD_HP_IN_OCSD_ADDR_LEN 8
#define MC_CMD_HP_IN_OCSD_ADDR_LO_OFST 4
+#define MC_CMD_HP_IN_OCSD_ADDR_LO_LEN 4
+#define MC_CMD_HP_IN_OCSD_ADDR_LO_LBN 32
+#define MC_CMD_HP_IN_OCSD_ADDR_LO_WIDTH 32
#define MC_CMD_HP_IN_OCSD_ADDR_HI_OFST 8
+#define MC_CMD_HP_IN_OCSD_ADDR_HI_LEN 4
+#define MC_CMD_HP_IN_OCSD_ADDR_HI_LBN 64
+#define MC_CMD_HP_IN_OCSD_ADDR_HI_WIDTH 32
/* The requested update interval, in seconds. (Or the sub-command if ADDR is
* NULL.)
*/
@@ -2858,6 +3536,7 @@
* Get stack information.
*/
#define MC_CMD_STACKINFO 0xf
+#define MC_CMD_STACKINFO_MSGSET 0xf
#undef MC_CMD_0xf_PRIVILEGE_CTG
#define MC_CMD_0xf_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -2884,6 +3563,7 @@
* MDIO register read.
*/
#define MC_CMD_MDIO_READ 0x10
+#define MC_CMD_MDIO_READ_MSGSET 0x10
#undef MC_CMD_0x10_PRIVILEGE_CTG
#define MC_CMD_0x10_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -2932,6 +3612,7 @@
* MDIO register write.
*/
#define MC_CMD_MDIO_WRITE 0x11
+#define MC_CMD_MDIO_WRITE_MSGSET 0x11
#undef MC_CMD_0x11_PRIVILEGE_CTG
#define MC_CMD_0x11_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -2980,6 +3661,7 @@
* Write DBI register(s).
*/
#define MC_CMD_DBI_WRITE 0x12
+#define MC_CMD_DBI_WRITE_MSGSET 0x12
#undef MC_CMD_0x12_PRIVILEGE_CTG
#define MC_CMD_0x12_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -3033,6 +3715,7 @@
* access is implied by the Shared memory channel used.
*/
#define MC_CMD_PORT_READ32 0x14
+#define MC_CMD_PORT_READ32_MSGSET 0x14
/* MC_CMD_PORT_READ32_IN msgrequest */
#define MC_CMD_PORT_READ32_IN_LEN 4
@@ -3056,6 +3739,7 @@
* access is implied by the Shared memory channel used.
*/
#define MC_CMD_PORT_WRITE32 0x15
+#define MC_CMD_PORT_WRITE32_MSGSET 0x15
/* MC_CMD_PORT_WRITE32_IN msgrequest */
#define MC_CMD_PORT_WRITE32_IN_LEN 8
@@ -3079,6 +3763,7 @@
* access is implied by the Shared memory channel used.
*/
#define MC_CMD_PORT_READ128 0x16
+#define MC_CMD_PORT_READ128_MSGSET 0x16
/* MC_CMD_PORT_READ128_IN msgrequest */
#define MC_CMD_PORT_READ128_IN_LEN 4
@@ -3102,6 +3787,7 @@
* access is implied by the Shared memory channel used.
*/
#define MC_CMD_PORT_WRITE128 0x17
+#define MC_CMD_PORT_WRITE128_MSGSET 0x17
/* MC_CMD_PORT_WRITE128_IN msgrequest */
#define MC_CMD_PORT_WRITE128_IN_LEN 20
@@ -3150,6 +3836,7 @@
* Returns the MC firmware configuration structure.
*/
#define MC_CMD_GET_BOARD_CFG 0x18
+#define MC_CMD_GET_BOARD_CFG_MSGSET 0x18
#undef MC_CMD_0x18_PRIVILEGE_CTG
#define MC_CMD_0x18_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -3225,6 +3912,7 @@
* Read DBI register(s) -- extended functionality
*/
#define MC_CMD_DBI_READX 0x19
+#define MC_CMD_DBI_READX_MSGSET 0x19
#undef MC_CMD_0x19_PRIVILEGE_CTG
#define MC_CMD_0x19_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -3239,7 +3927,13 @@
#define MC_CMD_DBI_READX_IN_DBIRDOP_OFST 0
#define MC_CMD_DBI_READX_IN_DBIRDOP_LEN 8
#define MC_CMD_DBI_READX_IN_DBIRDOP_LO_OFST 0
+#define MC_CMD_DBI_READX_IN_DBIRDOP_LO_LEN 4
+#define MC_CMD_DBI_READX_IN_DBIRDOP_LO_LBN 0
+#define MC_CMD_DBI_READX_IN_DBIRDOP_LO_WIDTH 32
#define MC_CMD_DBI_READX_IN_DBIRDOP_HI_OFST 4
+#define MC_CMD_DBI_READX_IN_DBIRDOP_HI_LEN 4
+#define MC_CMD_DBI_READX_IN_DBIRDOP_HI_LBN 32
+#define MC_CMD_DBI_READX_IN_DBIRDOP_HI_WIDTH 32
#define MC_CMD_DBI_READX_IN_DBIRDOP_MINNUM 1
#define MC_CMD_DBI_READX_IN_DBIRDOP_MAXNUM 31
#define MC_CMD_DBI_READX_IN_DBIRDOP_MAXNUM_MCDI2 127
@@ -3283,6 +3977,7 @@
* Set the 16byte seed for the MC pseudo-random generator.
*/
#define MC_CMD_SET_RAND_SEED 0x1a
+#define MC_CMD_SET_RAND_SEED_MSGSET 0x1a
#undef MC_CMD_0x1a_PRIVILEGE_CTG
#define MC_CMD_0x1a_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -3302,6 +3997,7 @@
* Retrieve the history of the LTSSM, if the build supports it.
*/
#define MC_CMD_LTSSM_HIST 0x1b
+#define MC_CMD_LTSSM_HIST_MSGSET 0x1b
/* MC_CMD_LTSSM_HIST_IN msgrequest */
#define MC_CMD_LTSSM_HIST_IN_LEN 0
@@ -3330,6 +4026,7 @@
* platforms.
*/
#define MC_CMD_DRV_ATTACH 0x1c
+#define MC_CMD_DRV_ATTACH_MSGSET 0x1c
#undef MC_CMD_0x1c_PRIVILEGE_CTG
#define MC_CMD_0x1c_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -3524,6 +4221,7 @@
* Route UART output to circular buffer in shared memory instead.
*/
#define MC_CMD_SHMUART 0x1f
+#define MC_CMD_SHMUART_MSGSET 0x1f
/* MC_CMD_SHMUART_IN msgrequest */
#define MC_CMD_SHMUART_IN_LEN 4
@@ -3542,6 +4240,7 @@
* use MC_CMD_ENTITY_RESET instead.
*/
#define MC_CMD_PORT_RESET 0x20
+#define MC_CMD_PORT_RESET_MSGSET 0x20
#undef MC_CMD_0x20_PRIVILEGE_CTG
#define MC_CMD_0x20_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -3560,6 +4259,7 @@
* extended version of the deprecated MC_CMD_PORT_RESET with added fields.
*/
#define MC_CMD_ENTITY_RESET 0x20
+#define MC_CMD_ENTITY_RESET_MSGSET 0x20
/* MC_CMD_0x20_PRIVILEGE_CTG SRIOV_CTG_GENERAL */
/* MC_CMD_ENTITY_RESET_IN msgrequest */
@@ -3582,6 +4282,7 @@
* Read instantaneous and minimum flow control thresholds.
*/
#define MC_CMD_PCIE_CREDITS 0x21
+#define MC_CMD_PCIE_CREDITS_MSGSET 0x21
/* MC_CMD_PCIE_CREDITS_IN msgrequest */
#define MC_CMD_PCIE_CREDITS_IN_LEN 8
@@ -3617,6 +4318,7 @@
* Get histogram of RX queue fill level.
*/
#define MC_CMD_RXD_MONITOR 0x22
+#define MC_CMD_RXD_MONITOR_MSGSET 0x22
/* MC_CMD_RXD_MONITOR_IN msgrequest */
#define MC_CMD_RXD_MONITOR_IN_LEN 12
@@ -3676,6 +4378,7 @@
* Copy the given ASCII string out onto UART and/or out of the network port.
*/
#define MC_CMD_PUTS 0x23
+#define MC_CMD_PUTS_MSGSET 0x23
#undef MC_CMD_0x23_PRIVILEGE_CTG
#define MC_CMD_0x23_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -3712,6 +4415,7 @@
* 'zombie' state. Locks required: None
*/
#define MC_CMD_GET_PHY_CFG 0x24
+#define MC_CMD_GET_PHY_CFG_MSGSET 0x24
#undef MC_CMD_0x24_PRIVILEGE_CTG
#define MC_CMD_0x24_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -3868,6 +4572,7 @@
* Return code: 0, EINVAL, EACCES (if PHY_LOCK is not held)
*/
#define MC_CMD_START_BIST 0x25
+#define MC_CMD_START_BIST_MSGSET 0x25
#undef MC_CMD_0x25_PRIVILEGE_CTG
#define MC_CMD_0x25_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -3908,6 +4613,7 @@
* EACCES (if PHY_LOCK is not held).
*/
#define MC_CMD_POLL_BIST 0x26
+#define MC_CMD_POLL_BIST_MSGSET 0x26
#undef MC_CMD_0x26_PRIVILEGE_CTG
#define MC_CMD_0x26_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -4077,6 +4783,7 @@
* returns). The driver must still wait for flush done/failure events as usual.
*/
#define MC_CMD_FLUSH_RX_QUEUES 0x27
+#define MC_CMD_FLUSH_RX_QUEUES_MSGSET 0x27
/* MC_CMD_FLUSH_RX_QUEUES_IN msgrequest */
#define MC_CMD_FLUSH_RX_QUEUES_IN_LENMIN 4
@@ -4099,6 +4806,7 @@
* Returns a bitmask of loopback modes available at each speed.
*/
#define MC_CMD_GET_LOOPBACK_MODES 0x28
+#define MC_CMD_GET_LOOPBACK_MODES_MSGSET 0x28
#undef MC_CMD_0x28_PRIVILEGE_CTG
#define MC_CMD_0x28_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -4112,7 +4820,13 @@
#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_OFST 0
#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_LO_OFST 0
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_LO_LBN 0
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_HI_OFST 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_HI_LBN 32
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_HI_WIDTH 32
/* enum: None. */
#define MC_CMD_LOOPBACK_NONE 0x0
/* enum: Data. */
@@ -4195,28 +4909,52 @@
#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_OFST 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_LO_OFST 8
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_LO_LBN 64
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_HI_OFST 12
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_HI_LBN 96
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_OFST 16
#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_LO_OFST 16
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_LO_LBN 128
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_HI_OFST 20
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_HI_LBN 160
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_OFST 24
#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_LO_OFST 24
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_LO_LBN 192
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_HI_OFST 28
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_HI_LBN 224
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_OFST 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_LO_OFST 32
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_LO_LBN 256
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_HI_OFST 36
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_HI_LBN 288
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
@@ -4228,7 +4966,13 @@
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_OFST 0
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_LO_OFST 0
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_LO_LBN 0
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_HI_OFST 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_HI_LBN 32
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_HI_WIDTH 32
/* enum: None. */
/* MC_CMD_LOOPBACK_NONE 0x0 */
/* enum: Data. */
@@ -4311,49 +5055,91 @@
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_OFST 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_LO_OFST 8
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_LO_LBN 64
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_HI_OFST 12
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_HI_LBN 96
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_OFST 16
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_LO_OFST 16
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_LO_LBN 128
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_HI_OFST 20
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_HI_LBN 160
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_OFST 24
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_LO_OFST 24
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_LO_LBN 192
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_HI_OFST 28
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_HI_LBN 224
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_OFST 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_LO_OFST 32
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_LO_LBN 256
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_HI_OFST 36
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_HI_LBN 288
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported 25G loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_OFST 40
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_LO_OFST 40
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_LO_LBN 320
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_HI_OFST 44
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_HI_LBN 352
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported 50 loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_OFST 48
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_LO_OFST 48
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_LO_LBN 384
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_HI_OFST 52
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_HI_LBN 416
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
/* Supported 100G loopbacks. */
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_OFST 56
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_LEN 8
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_LO_OFST 56
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_LO_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_LO_LBN 448
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_LO_WIDTH 32
#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_HI_OFST 60
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_HI_LEN 4
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_HI_LBN 480
+#define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_HI_WIDTH 32
/* Enum values, see field(s): */
/* 100M */
@@ -4395,6 +5181,7 @@
* ETIME.
*/
#define MC_CMD_GET_LINK 0x29
+#define MC_CMD_GET_LINK_MSGSET 0x29
#undef MC_CMD_0x29_PRIVILEGE_CTG
#define MC_CMD_0x29_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -4596,6 +5383,7 @@
* code: 0, EINVAL, ETIME, EAGAIN
*/
#define MC_CMD_SET_LINK 0x2a
+#define MC_CMD_SET_LINK_MSGSET 0x2a
#undef MC_CMD_0x2a_PRIVILEGE_CTG
#define MC_CMD_0x2a_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -4686,6 +5474,7 @@
* Set identification LED state. Locks required: None. Return code: 0, EINVAL
*/
#define MC_CMD_SET_ID_LED 0x2b
+#define MC_CMD_SET_ID_LED_MSGSET 0x2b
#undef MC_CMD_0x2b_PRIVILEGE_CTG
#define MC_CMD_0x2b_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -4708,6 +5497,7 @@
* Set MAC configuration. Locks required: None. Return code: 0, EINVAL
*/
#define MC_CMD_SET_MAC 0x2c
+#define MC_CMD_SET_MAC_MSGSET 0x2c
#undef MC_CMD_0x2c_PRIVILEGE_CTG
#define MC_CMD_0x2c_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -4724,7 +5514,13 @@
#define MC_CMD_SET_MAC_IN_ADDR_OFST 8
#define MC_CMD_SET_MAC_IN_ADDR_LEN 8
#define MC_CMD_SET_MAC_IN_ADDR_LO_OFST 8
+#define MC_CMD_SET_MAC_IN_ADDR_LO_LEN 4
+#define MC_CMD_SET_MAC_IN_ADDR_LO_LBN 64
+#define MC_CMD_SET_MAC_IN_ADDR_LO_WIDTH 32
#define MC_CMD_SET_MAC_IN_ADDR_HI_OFST 12
+#define MC_CMD_SET_MAC_IN_ADDR_HI_LEN 4
+#define MC_CMD_SET_MAC_IN_ADDR_HI_LBN 96
+#define MC_CMD_SET_MAC_IN_ADDR_HI_WIDTH 32
#define MC_CMD_SET_MAC_IN_REJECT_OFST 16
#define MC_CMD_SET_MAC_IN_REJECT_LEN 4
#define MC_CMD_SET_MAC_IN_REJECT_UNCST_OFST 16
@@ -4765,7 +5561,13 @@
#define MC_CMD_SET_MAC_EXT_IN_ADDR_OFST 8
#define MC_CMD_SET_MAC_EXT_IN_ADDR_LEN 8
#define MC_CMD_SET_MAC_EXT_IN_ADDR_LO_OFST 8
+#define MC_CMD_SET_MAC_EXT_IN_ADDR_LO_LEN 4
+#define MC_CMD_SET_MAC_EXT_IN_ADDR_LO_LBN 64
+#define MC_CMD_SET_MAC_EXT_IN_ADDR_LO_WIDTH 32
#define MC_CMD_SET_MAC_EXT_IN_ADDR_HI_OFST 12
+#define MC_CMD_SET_MAC_EXT_IN_ADDR_HI_LEN 4
+#define MC_CMD_SET_MAC_EXT_IN_ADDR_HI_LBN 96
+#define MC_CMD_SET_MAC_EXT_IN_ADDR_HI_WIDTH 32
#define MC_CMD_SET_MAC_EXT_IN_REJECT_OFST 16
#define MC_CMD_SET_MAC_EXT_IN_REJECT_LEN 4
#define MC_CMD_SET_MAC_EXT_IN_REJECT_UNCST_OFST 16
@@ -4816,6 +5618,129 @@
#define MC_CMD_SET_MAC_EXT_IN_CFG_FCS_LBN 4
#define MC_CMD_SET_MAC_EXT_IN_CFG_FCS_WIDTH 1
+/* MC_CMD_SET_MAC_V3_IN msgrequest */
+#define MC_CMD_SET_MAC_V3_IN_LEN 40
+/* The MTU is the MTU programmed directly into the XMAC/GMAC (inclusive of
+ * EtherII, VLAN, bug16011 padding).
+ */
+#define MC_CMD_SET_MAC_V3_IN_MTU_OFST 0
+#define MC_CMD_SET_MAC_V3_IN_MTU_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_DRAIN_OFST 4
+#define MC_CMD_SET_MAC_V3_IN_DRAIN_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_ADDR_OFST 8
+#define MC_CMD_SET_MAC_V3_IN_ADDR_LEN 8
+#define MC_CMD_SET_MAC_V3_IN_ADDR_LO_OFST 8
+#define MC_CMD_SET_MAC_V3_IN_ADDR_LO_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_ADDR_LO_LBN 64
+#define MC_CMD_SET_MAC_V3_IN_ADDR_LO_WIDTH 32
+#define MC_CMD_SET_MAC_V3_IN_ADDR_HI_OFST 12
+#define MC_CMD_SET_MAC_V3_IN_ADDR_HI_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_ADDR_HI_LBN 96
+#define MC_CMD_SET_MAC_V3_IN_ADDR_HI_WIDTH 32
+#define MC_CMD_SET_MAC_V3_IN_REJECT_OFST 16
+#define MC_CMD_SET_MAC_V3_IN_REJECT_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_REJECT_UNCST_OFST 16
+#define MC_CMD_SET_MAC_V3_IN_REJECT_UNCST_LBN 0
+#define MC_CMD_SET_MAC_V3_IN_REJECT_UNCST_WIDTH 1
+#define MC_CMD_SET_MAC_V3_IN_REJECT_BRDCST_OFST 16
+#define MC_CMD_SET_MAC_V3_IN_REJECT_BRDCST_LBN 1
+#define MC_CMD_SET_MAC_V3_IN_REJECT_BRDCST_WIDTH 1
+#define MC_CMD_SET_MAC_V3_IN_FCNTL_OFST 20
+#define MC_CMD_SET_MAC_V3_IN_FCNTL_LEN 4
+/* enum: Flow control is off. */
+/* MC_CMD_FCNTL_OFF 0x0 */
+/* enum: Respond to flow control. */
+/* MC_CMD_FCNTL_RESPOND 0x1 */
+/* enum: Respond to and Issue flow control. */
+/* MC_CMD_FCNTL_BIDIR 0x2 */
+/* enum: Auto neg flow control. */
+/* MC_CMD_FCNTL_AUTO 0x3 */
+/* enum: Priority flow control (eftest builds only). */
+/* MC_CMD_FCNTL_QBB 0x4 */
+/* enum: Issue flow control. */
+/* MC_CMD_FCNTL_GENERATE 0x5 */
+#define MC_CMD_SET_MAC_V3_IN_FLAGS_OFST 24
+#define MC_CMD_SET_MAC_V3_IN_FLAGS_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_FLAG_INCLUDE_FCS_OFST 24
+#define MC_CMD_SET_MAC_V3_IN_FLAG_INCLUDE_FCS_LBN 0
+#define MC_CMD_SET_MAC_V3_IN_FLAG_INCLUDE_FCS_WIDTH 1
+/* Select which parameters to configure. A parameter will only be modified if
+ * the corresponding control flag is set. If SET_MAC_ENHANCED is not set in
+ * capabilities then this field is ignored (and all flags are assumed to be
+ * set).
+ */
+#define MC_CMD_SET_MAC_V3_IN_CONTROL_OFST 28
+#define MC_CMD_SET_MAC_V3_IN_CONTROL_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_CFG_MTU_OFST 28
+#define MC_CMD_SET_MAC_V3_IN_CFG_MTU_LBN 0
+#define MC_CMD_SET_MAC_V3_IN_CFG_MTU_WIDTH 1
+#define MC_CMD_SET_MAC_V3_IN_CFG_DRAIN_OFST 28
+#define MC_CMD_SET_MAC_V3_IN_CFG_DRAIN_LBN 1
+#define MC_CMD_SET_MAC_V3_IN_CFG_DRAIN_WIDTH 1
+#define MC_CMD_SET_MAC_V3_IN_CFG_REJECT_OFST 28
+#define MC_CMD_SET_MAC_V3_IN_CFG_REJECT_LBN 2
+#define MC_CMD_SET_MAC_V3_IN_CFG_REJECT_WIDTH 1
+#define MC_CMD_SET_MAC_V3_IN_CFG_FCNTL_OFST 28
+#define MC_CMD_SET_MAC_V3_IN_CFG_FCNTL_LBN 3
+#define MC_CMD_SET_MAC_V3_IN_CFG_FCNTL_WIDTH 1
+#define MC_CMD_SET_MAC_V3_IN_CFG_FCS_OFST 28
+#define MC_CMD_SET_MAC_V3_IN_CFG_FCS_LBN 4
+#define MC_CMD_SET_MAC_V3_IN_CFG_FCS_WIDTH 1
+/* Identifies the MAC to update by the specifying the end of a logical MAE
+ * link. Setting TARGET to MAE_LINK_ENDPOINT_COMPAT is equivalent to using the
+ * previous version of the command (MC_CMD_SET_MAC_EXT). Not all possible
+ * combinations of MPORT_END and MPORT_SELECTOR in TARGET will work in all
+ * circumstances. 1. Some will always work (e.g. a VF can always address its
+ * logical MAC using MPORT_SELECTOR=ASSIGNED,LINK_END=VNIC), 2. Some are not
+ * meaningful and will always fail with EINVAL (e.g. attempting to address the
+ * VNIC end of a link to a physical port), 3. Some are meaningful but require
+ * the MCDI client to have the required permission and fail with EPERM
+ * otherwise (e.g. trying to set the MAC on a VF the caller cannot administer),
+ * and 4. Some could be implementation-specific and fail with ENOTSUP if not
+ * available (no examples exist right now). See SF-123581-TC section 4.3 for
+ * more details.
+ */
+#define MC_CMD_SET_MAC_V3_IN_TARGET_OFST 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_LEN 8
+#define MC_CMD_SET_MAC_V3_IN_TARGET_LO_OFST 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_LO_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_LO_LBN 256
+#define MC_CMD_SET_MAC_V3_IN_TARGET_LO_WIDTH 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_HI_OFST 36
+#define MC_CMD_SET_MAC_V3_IN_TARGET_HI_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_HI_LBN 288
+#define MC_CMD_SET_MAC_V3_IN_TARGET_HI_WIDTH 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_OFST 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FLAT_OFST 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FLAT_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_TYPE_OFST 35
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_TYPE_LEN 1
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_MPORT_ID_OFST 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_MPORT_ID_LEN 3
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_PPORT_ID_LBN 256
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_PPORT_ID_WIDTH 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_LBN 276
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_WIDTH 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_LBN 272
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_WIDTH 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FUNC_PF_ID_OFST 34
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FUNC_PF_ID_LEN 1
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FUNC_VF_ID_OFST 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FUNC_VF_ID_LEN 2
+#define MC_CMD_SET_MAC_V3_IN_TARGET_LINK_END_OFST 36
+#define MC_CMD_SET_MAC_V3_IN_TARGET_LINK_END_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_OFST 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_LEN 8
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_LO_OFST 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_LO_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_LO_LBN 256
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_LO_WIDTH 32
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_HI_OFST 36
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_HI_LEN 4
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_HI_LBN 288
+#define MC_CMD_SET_MAC_V3_IN_TARGET_FLAT_HI_WIDTH 32
+
/* MC_CMD_SET_MAC_OUT msgresponse */
#define MC_CMD_SET_MAC_OUT_LEN 0
@@ -4839,6 +5764,7 @@
* Returns: 0, ETIME
*/
#define MC_CMD_PHY_STATS 0x2d
+#define MC_CMD_PHY_STATS_MSGSET 0x2d
#undef MC_CMD_0x2d_PRIVILEGE_CTG
#define MC_CMD_0x2d_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -4849,7 +5775,13 @@
#define MC_CMD_PHY_STATS_IN_DMA_ADDR_OFST 0
#define MC_CMD_PHY_STATS_IN_DMA_ADDR_LEN 8
#define MC_CMD_PHY_STATS_IN_DMA_ADDR_LO_OFST 0
+#define MC_CMD_PHY_STATS_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_PHY_STATS_IN_DMA_ADDR_LO_LBN 0
+#define MC_CMD_PHY_STATS_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_PHY_STATS_IN_DMA_ADDR_HI_OFST 4
+#define MC_CMD_PHY_STATS_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_PHY_STATS_IN_DMA_ADDR_HI_LBN 32
+#define MC_CMD_PHY_STATS_IN_DMA_ADDR_HI_WIDTH 32
/* MC_CMD_PHY_STATS_OUT_DMA msgresponse */
#define MC_CMD_PHY_STATS_OUT_DMA_LEN 0
@@ -4921,6 +5853,7 @@
* effect. Returns: 0, ETIME
*/
#define MC_CMD_MAC_STATS 0x2e
+#define MC_CMD_MAC_STATS_MSGSET 0x2e
#undef MC_CMD_0x2e_PRIVILEGE_CTG
#define MC_CMD_0x2e_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -4931,7 +5864,13 @@
#define MC_CMD_MAC_STATS_IN_DMA_ADDR_OFST 0
#define MC_CMD_MAC_STATS_IN_DMA_ADDR_LEN 8
#define MC_CMD_MAC_STATS_IN_DMA_ADDR_LO_OFST 0
+#define MC_CMD_MAC_STATS_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_MAC_STATS_IN_DMA_ADDR_LO_LBN 0
+#define MC_CMD_MAC_STATS_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_MAC_STATS_IN_DMA_ADDR_HI_OFST 4
+#define MC_CMD_MAC_STATS_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_MAC_STATS_IN_DMA_ADDR_HI_LBN 32
+#define MC_CMD_MAC_STATS_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_MAC_STATS_IN_CMD_OFST 8
#define MC_CMD_MAC_STATS_IN_CMD_LEN 4
#define MC_CMD_MAC_STATS_IN_DMA_OFST 8
@@ -4974,7 +5913,13 @@
#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_OFST 0
#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_LEN 8
#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_LO_OFST 0
+#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_LO_LEN 4
+#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_LO_LBN 0
+#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_LO_WIDTH 32
#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_HI_OFST 4
+#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_HI_LEN 4
+#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_HI_LBN 32
+#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_HI_WIDTH 32
#define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS
#define MC_CMD_MAC_GENERATION_START 0x0 /* enum */
#define MC_CMD_MAC_DMABUF_START 0x1 /* enum */
@@ -5130,7 +6075,13 @@
#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_OFST 0
#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_LEN 8
#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_LO_OFST 0
+#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_LO_LEN 4
+#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_LO_LBN 0
+#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_LO_WIDTH 32
#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_HI_OFST 4
+#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_HI_LEN 4
+#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_HI_LBN 32
+#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_HI_WIDTH 32
#define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS_V2
/* enum: Start of FEC stats buffer space, Medford2 and up */
#define MC_CMD_MAC_FEC_DMABUF_START 0x61
@@ -5163,7 +6114,13 @@
#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_OFST 0
#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_LEN 8
#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_LO_OFST 0
+#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_LO_LEN 4
+#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_LO_LBN 0
+#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_LO_WIDTH 32
#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_HI_OFST 4
+#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_HI_LEN 4
+#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_HI_LBN 32
+#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_HI_WIDTH 32
#define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS_V3
/* enum: Start of CTPIO stats buffer space, Medford2 and up */
#define MC_CMD_MAC_CTPIO_DMABUF_START 0x68
@@ -5237,7 +6194,13 @@
#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_OFST 0
#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_LEN 8
#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_LO_OFST 0
+#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_LO_LEN 4
+#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_LO_LBN 0
+#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_LO_WIDTH 32
#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_HI_OFST 4
+#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_HI_LEN 4
+#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_HI_LBN 32
+#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_HI_WIDTH 32
#define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS_V4
/* enum: Start of V4 stats buffer space */
#define MC_CMD_MAC_V4_DMABUF_START 0x79
@@ -5266,6 +6229,7 @@
* to be documented
*/
#define MC_CMD_SRIOV 0x30
+#define MC_CMD_SRIOV_MSGSET 0x30
/* MC_CMD_SRIOV_IN msgrequest */
#define MC_CMD_SRIOV_IN_LEN 12
@@ -5297,7 +6261,13 @@
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_OFST 8
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LEN 8
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LO_OFST 8
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LO_LEN 4
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LO_LBN 64
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LO_WIDTH 32
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_HI_OFST 12
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_HI_LEN 4
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_HI_LBN 96
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_HI_WIDTH 32
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_LBN 64
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_ADDR_WIDTH 64
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_RID_OFST 16
@@ -5308,7 +6278,13 @@
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_OFST 20
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LEN 8
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LO_OFST 20
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LO_LEN 4
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LO_LBN 160
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LO_WIDTH 32
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_HI_OFST 24
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_HI_LEN 4
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_HI_LBN 192
+#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_HI_WIDTH 32
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_LBN 160
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_ADDR_WIDTH 64
#define MC_CMD_MEMCPY_RECORD_TYPEDEF_LENGTH_OFST 28
@@ -5338,6 +6314,7 @@
* Returns: 0, EINVAL (invalid RID)
*/
#define MC_CMD_MEMCPY 0x31
+#define MC_CMD_MEMCPY_MSGSET 0x31
/* MC_CMD_MEMCPY_IN msgrequest */
#define MC_CMD_MEMCPY_IN_LENMIN 32
@@ -5361,6 +6338,7 @@
* Set a WoL filter.
*/
#define MC_CMD_WOL_FILTER_SET 0x32
+#define MC_CMD_WOL_FILTER_SET_MSGSET 0x32
#undef MC_CMD_0x32_PRIVILEGE_CTG
#define MC_CMD_0x32_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -5401,7 +6379,13 @@
#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_OFST 8
#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_LEN 8
#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_LO_OFST 8
+#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_LO_LEN 4
+#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_LO_LBN 64
+#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_LO_WIDTH 32
#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_HI_OFST 12
+#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_HI_LEN 4
+#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_HI_LBN 96
+#define MC_CMD_WOL_FILTER_SET_IN_MAGIC_MAC_HI_WIDTH 32
/* MC_CMD_WOL_FILTER_SET_IN_IPV4_SYN msgrequest */
#define MC_CMD_WOL_FILTER_SET_IN_IPV4_SYN_LEN 20
@@ -5476,6 +6460,7 @@
* Remove a WoL filter. Locks required: None. Returns: 0, EINVAL, ENOSYS
*/
#define MC_CMD_WOL_FILTER_REMOVE 0x33
+#define MC_CMD_WOL_FILTER_REMOVE_MSGSET 0x33
#undef MC_CMD_0x33_PRIVILEGE_CTG
#define MC_CMD_0x33_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -5495,6 +6480,7 @@
* ENOSYS
*/
#define MC_CMD_WOL_FILTER_RESET 0x34
+#define MC_CMD_WOL_FILTER_RESET_MSGSET 0x34
#undef MC_CMD_0x34_PRIVILEGE_CTG
#define MC_CMD_0x34_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -5515,6 +6501,7 @@
* Set the MCAST hash value without otherwise reconfiguring the MAC
*/
#define MC_CMD_SET_MCAST_HASH 0x35
+#define MC_CMD_SET_MCAST_HASH_MSGSET 0x35
/* MC_CMD_SET_MCAST_HASH_IN msgrequest */
#define MC_CMD_SET_MCAST_HASH_IN_LEN 32
@@ -5533,6 +6520,7 @@
* Locks required: none. Returns: 0
*/
#define MC_CMD_NVRAM_TYPES 0x36
+#define MC_CMD_NVRAM_TYPES_MSGSET 0x36
#undef MC_CMD_0x36_PRIVILEGE_CTG
#define MC_CMD_0x36_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -5595,6 +6583,7 @@
* EINVAL (bad type).
*/
#define MC_CMD_NVRAM_INFO 0x37
+#define MC_CMD_NVRAM_INFO_MSGSET 0x37
#undef MC_CMD_0x37_PRIVILEGE_CTG
#define MC_CMD_0x37_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -5692,6 +6681,7 @@
* EPERM.
*/
#define MC_CMD_NVRAM_UPDATE_START 0x38
+#define MC_CMD_NVRAM_UPDATE_START_MSGSET 0x38
#undef MC_CMD_0x38_PRIVILEGE_CTG
#define MC_CMD_0x38_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -5732,6 +6722,7 @@
* PHY_LOCK required and not held)
*/
#define MC_CMD_NVRAM_READ 0x39
+#define MC_CMD_NVRAM_READ_MSGSET 0x39
#undef MC_CMD_0x39_PRIVILEGE_CTG
#define MC_CMD_0x39_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -5803,6 +6794,7 @@
* PHY_LOCK required and not held)
*/
#define MC_CMD_NVRAM_WRITE 0x3a
+#define MC_CMD_NVRAM_WRITE_MSGSET 0x3a
#undef MC_CMD_0x3a_PRIVILEGE_CTG
#define MC_CMD_0x3a_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -5838,6 +6830,7 @@
* PHY_LOCK required and not held)
*/
#define MC_CMD_NVRAM_ERASE 0x3b
+#define MC_CMD_NVRAM_ERASE_MSGSET 0x3b
#undef MC_CMD_0x3b_PRIVILEGE_CTG
#define MC_CMD_0x3b_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -5868,6 +6861,7 @@
* the error EPERM.
*/
#define MC_CMD_NVRAM_UPDATE_FINISH 0x3c
+#define MC_CMD_NVRAM_UPDATE_FINISH_MSGSET 0x3c
#undef MC_CMD_0x3c_PRIVILEGE_CTG
#define MC_CMD_0x3c_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -5906,6 +6900,9 @@
#define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_POLL_VERIFY_RESULT_OFST 8
#define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_POLL_VERIFY_RESULT_LBN 2
#define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_POLL_VERIFY_RESULT_WIDTH 1
+#define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_ABORT_OFST 8
+#define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_ABORT_LBN 3
+#define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAG_ABORT_WIDTH 1
/* MC_CMD_NVRAM_UPDATE_FINISH_OUT msgresponse: Legacy NVRAM_UPDATE_FINISH
* response. Use NVRAM_UPDATE_FINISH_V2_OUT in new code
@@ -6036,6 +7033,7 @@
* DATALEN=0
*/
#define MC_CMD_REBOOT 0x3d
+#define MC_CMD_REBOOT_MSGSET 0x3d
#undef MC_CMD_0x3d_PRIVILEGE_CTG
#define MC_CMD_0x3d_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -6057,6 +7055,7 @@
* thread address.
*/
#define MC_CMD_SCHEDINFO 0x3e
+#define MC_CMD_SCHEDINFO_MSGSET 0x3e
#undef MC_CMD_0x3e_PRIVILEGE_CTG
#define MC_CMD_0x3e_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -6083,6 +7082,7 @@
* mode to the specified value. Returns the old mode.
*/
#define MC_CMD_REBOOT_MODE 0x3f
+#define MC_CMD_REBOOT_MODE_MSGSET 0x3f
#undef MC_CMD_0x3f_PRIVILEGE_CTG
#define MC_CMD_0x3f_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -6141,6 +7141,7 @@
* Locks required: None Returns: 0
*/
#define MC_CMD_SENSOR_INFO 0x41
+#define MC_CMD_SENSOR_INFO_MSGSET 0x41
#undef MC_CMD_0x41_PRIVILEGE_CTG
#define MC_CMD_0x41_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -6380,7 +7381,13 @@
#define MC_CMD_SENSOR_ENTRY_OFST 4
#define MC_CMD_SENSOR_ENTRY_LEN 8
#define MC_CMD_SENSOR_ENTRY_LO_OFST 4
+#define MC_CMD_SENSOR_ENTRY_LO_LEN 4
+#define MC_CMD_SENSOR_ENTRY_LO_LBN 32
+#define MC_CMD_SENSOR_ENTRY_LO_WIDTH 32
#define MC_CMD_SENSOR_ENTRY_HI_OFST 8
+#define MC_CMD_SENSOR_ENTRY_HI_LEN 4
+#define MC_CMD_SENSOR_ENTRY_HI_LBN 64
+#define MC_CMD_SENSOR_ENTRY_HI_WIDTH 32
#define MC_CMD_SENSOR_ENTRY_MINNUM 0
#define MC_CMD_SENSOR_ENTRY_MAXNUM 31
#define MC_CMD_SENSOR_ENTRY_MAXNUM_MCDI2 127
@@ -6402,7 +7409,13 @@
/* MC_CMD_SENSOR_ENTRY_OFST 4 */
/* MC_CMD_SENSOR_ENTRY_LEN 8 */
/* MC_CMD_SENSOR_ENTRY_LO_OFST 4 */
+/* MC_CMD_SENSOR_ENTRY_LO_LEN 4 */
+/* MC_CMD_SENSOR_ENTRY_LO_LBN 32 */
+/* MC_CMD_SENSOR_ENTRY_LO_WIDTH 32 */
/* MC_CMD_SENSOR_ENTRY_HI_OFST 8 */
+/* MC_CMD_SENSOR_ENTRY_HI_LEN 4 */
+/* MC_CMD_SENSOR_ENTRY_HI_LBN 64 */
+/* MC_CMD_SENSOR_ENTRY_HI_WIDTH 32 */
/* MC_CMD_SENSOR_ENTRY_MINNUM 0 */
/* MC_CMD_SENSOR_ENTRY_MAXNUM 31 */
/* MC_CMD_SENSOR_ENTRY_MAXNUM_MCDI2 127 */
@@ -6445,6 +7458,7 @@
* STATE_WARNING. Otherwise the board should not be expected to function.
*/
#define MC_CMD_READ_SENSORS 0x42
+#define MC_CMD_READ_SENSORS_MSGSET 0x42
#undef MC_CMD_0x42_PRIVILEGE_CTG
#define MC_CMD_0x42_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -6459,7 +7473,13 @@
#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_OFST 0
#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_LEN 8
#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_LO_OFST 0
+#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_LO_LBN 0
+#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_HI_OFST 4
+#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_HI_LBN 32
+#define MC_CMD_READ_SENSORS_IN_DMA_ADDR_HI_WIDTH 32
/* MC_CMD_READ_SENSORS_EXT_IN msgrequest */
#define MC_CMD_READ_SENSORS_EXT_IN_LEN 12
@@ -6471,7 +7491,13 @@
#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_OFST 0
#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_LEN 8
#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_LO_OFST 0
+#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_LO_LBN 0
+#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_HI_OFST 4
+#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_HI_LBN 32
+#define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_HI_WIDTH 32
/* Size in bytes of host buffer. */
#define MC_CMD_READ_SENSORS_EXT_IN_LENGTH_OFST 8
#define MC_CMD_READ_SENSORS_EXT_IN_LENGTH_LEN 4
@@ -6486,7 +7512,13 @@
#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_OFST 0
#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_LEN 8
#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_LO_OFST 0
+#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_LO_LEN 4
+#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_LO_LBN 0
+#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_HI_OFST 4
+#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_HI_LEN 4
+#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_HI_LBN 32
+#define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_HI_WIDTH 32
/* Size in bytes of host buffer. */
#define MC_CMD_READ_SENSORS_EXT_IN_V2_LENGTH_OFST 8
#define MC_CMD_READ_SENSORS_EXT_IN_V2_LENGTH_LEN 4
@@ -6540,6 +7572,7 @@
* code: 0
*/
#define MC_CMD_GET_PHY_STATE 0x43
+#define MC_CMD_GET_PHY_STATE_MSGSET 0x43
#undef MC_CMD_0x43_PRIVILEGE_CTG
#define MC_CMD_0x43_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -6563,6 +7596,7 @@
* disable 802.Qbb for a given priority.
*/
#define MC_CMD_SETUP_8021QBB 0x44
+#define MC_CMD_SETUP_8021QBB_MSGSET 0x44
/* MC_CMD_SETUP_8021QBB_IN msgrequest */
#define MC_CMD_SETUP_8021QBB_IN_LEN 32
@@ -6578,6 +7612,7 @@
* Retrieve ID of any WoL filters. Locks required: None. Returns: 0, ENOSYS
*/
#define MC_CMD_WOL_FILTER_GET 0x45
+#define MC_CMD_WOL_FILTER_GET_MSGSET 0x45
#undef MC_CMD_0x45_PRIVILEGE_CTG
#define MC_CMD_0x45_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -6597,6 +7632,7 @@
* Returns: 0, ENOSYS
*/
#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD 0x46
+#define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_MSGSET 0x46
#undef MC_CMD_0x46_PRIVILEGE_CTG
#define MC_CMD_0x46_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -6649,6 +7685,7 @@
* None. Returns: 0, ENOSYS
*/
#define MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD 0x47
+#define MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_MSGSET 0x47
#undef MC_CMD_0x47_PRIVILEGE_CTG
#define MC_CMD_0x47_PRIVILEGE_CTG SRIOV_CTG_LINK
@@ -6669,6 +7706,7 @@
* Restore MAC after block reset. Locks required: None. Returns: 0.
*/
#define MC_CMD_MAC_RESET_RESTORE 0x48
+#define MC_CMD_MAC_RESET_RESTORE_MSGSET 0x48
/* MC_CMD_MAC_RESET_RESTORE_IN msgrequest */
#define MC_CMD_MAC_RESET_RESTORE_IN_LEN 0
@@ -6684,6 +7722,7 @@
* required: None Returns: 0
*/
#define MC_CMD_TESTASSERT 0x49
+#define MC_CMD_TESTASSERT_MSGSET 0x49
#undef MC_CMD_0x49_PRIVILEGE_CTG
#define MC_CMD_0x49_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -6727,6 +7766,7 @@
* basis. Locks required: None. Returns: 0, EINVAL .
*/
#define MC_CMD_WORKAROUND 0x4a
+#define MC_CMD_WORKAROUND_MSGSET 0x4a
#undef MC_CMD_0x4a_PRIVILEGE_CTG
#define MC_CMD_0x4a_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -6790,6 +7830,7 @@
* Anything else: currently undefined. Locks required: None. Return code: 0.
*/
#define MC_CMD_GET_PHY_MEDIA_INFO 0x4b
+#define MC_CMD_GET_PHY_MEDIA_INFO_MSGSET 0x4b
#undef MC_CMD_0x4b_PRIVILEGE_CTG
#define MC_CMD_0x4b_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -6821,6 +7862,7 @@
* on the type of partition).
*/
#define MC_CMD_NVRAM_TEST 0x4c
+#define MC_CMD_NVRAM_TEST_MSGSET 0x4c
#undef MC_CMD_0x4c_PRIVILEGE_CTG
#define MC_CMD_0x4c_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -6851,6 +7893,7 @@
* they are configured first. Locks required: None. Return code: 0, EINVAL.
*/
#define MC_CMD_MRSFP_TWEAK 0x4d
+#define MC_CMD_MRSFP_TWEAK_MSGSET 0x4d
/* MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG msgrequest */
#define MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_LEN 16
@@ -6894,6 +7937,7 @@
* of range.
*/
#define MC_CMD_SENSOR_SET_LIMS 0x4e
+#define MC_CMD_SENSOR_SET_LIMS_MSGSET 0x4e
#undef MC_CMD_0x4e_PRIVILEGE_CTG
#define MC_CMD_0x4e_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -6925,6 +7969,7 @@
/* MC_CMD_GET_RESOURCE_LIMITS
*/
#define MC_CMD_GET_RESOURCE_LIMITS 0x4f
+#define MC_CMD_GET_RESOURCE_LIMITS_MSGSET 0x4f
/* MC_CMD_GET_RESOURCE_LIMITS_IN msgrequest */
#define MC_CMD_GET_RESOURCE_LIMITS_IN_LEN 0
@@ -6947,6 +7992,7 @@
* none. Returns: 0, EINVAL (bad type).
*/
#define MC_CMD_NVRAM_PARTITIONS 0x51
+#define MC_CMD_NVRAM_PARTITIONS_MSGSET 0x51
#undef MC_CMD_0x51_PRIVILEGE_CTG
#define MC_CMD_0x51_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -6977,6 +8023,7 @@
* none. Returns: 0, EINVAL (bad type).
*/
#define MC_CMD_NVRAM_METADATA 0x52
+#define MC_CMD_NVRAM_METADATA_MSGSET 0x52
#undef MC_CMD_0x52_PRIVILEGE_CTG
#define MC_CMD_0x52_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -7035,6 +8082,7 @@
* Returns the base MAC, count and stride for the requesting function
*/
#define MC_CMD_GET_MAC_ADDRESSES 0x55
+#define MC_CMD_GET_MAC_ADDRESSES_MSGSET 0x55
#undef MC_CMD_0x55_PRIVILEGE_CTG
#define MC_CMD_0x55_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -7066,6 +8114,7 @@
* SF-120509-TC and SF-117282-PS.
*/
#define MC_CMD_CLP 0x56
+#define MC_CMD_CLP_MSGSET 0x56
#undef MC_CMD_0x56_PRIVILEGE_CTG
#define MC_CMD_0x56_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -7188,6 +8237,7 @@
* Perform a MUM operation
*/
#define MC_CMD_MUM 0x57
+#define MC_CMD_MUM_MSGSET 0x57
#undef MC_CMD_0x57_PRIVILEGE_CTG
#define MC_CMD_0x57_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -7604,7 +8654,13 @@
#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_OFST 4
#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_LEN 8
#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_LO_OFST 4
+#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_LO_LEN 4
+#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_LO_LBN 32
+#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_LO_WIDTH 32
#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_HI_OFST 8
+#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_HI_LEN 4
+#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_HI_LBN 64
+#define MC_CMD_MUM_OUT_GET_VERSION_VERSION_HI_WIDTH 32
/* MC_CMD_MUM_OUT_RAW_CMD msgresponse */
#define MC_CMD_MUM_OUT_RAW_CMD_LENMIN 1
@@ -7789,7 +8845,13 @@
#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_OFST 8
#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_LEN 8
#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_LO_OFST 8
+#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_LO_LEN 4
+#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_LO_LBN 64
+#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_LO_WIDTH 32
#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_HI_OFST 12
+#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_HI_LEN 4
+#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_HI_LBN 96
+#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_HI_WIDTH 32
#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_MINNUM 2
#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_MAXNUM 30
#define MC_CMD_MUM_OUT_READ_DDR_INFO_SODIMM_INFO_RECORD_MAXNUM_MCDI2 126
@@ -7986,6 +9048,7 @@
* sensor_query SPHINX service.
*/
#define MC_CMD_DYNAMIC_SENSORS_LIST 0x66
+#define MC_CMD_DYNAMIC_SENSORS_LIST_MSGSET 0x66
#undef MC_CMD_0x66_PRIVILEGE_CTG
#define MC_CMD_0x66_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -8031,6 +9094,7 @@
* `get_descriptions` in the sensor_query SPHINX service.
*/
#define MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS 0x67
+#define MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_MSGSET 0x67
#undef MC_CMD_0x67_PRIVILEGE_CTG
#define MC_CMD_0x67_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -8080,6 +9144,7 @@
* in the sensor_query SPHINX service.
*/
#define MC_CMD_DYNAMIC_SENSORS_GET_READINGS 0x68
+#define MC_CMD_DYNAMIC_SENSORS_GET_READINGS_MSGSET 0x68
#undef MC_CMD_0x68_PRIVILEGE_CTG
#define MC_CMD_0x68_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -8117,6 +9182,7 @@
* receive (Riverhead).
*/
#define MC_CMD_EVENT_CTRL 0x69
+#define MC_CMD_EVENT_CTRL_MSGSET 0x69
#undef MC_CMD_0x69_PRIVILEGE_CTG
#define MC_CMD_0x69_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -8197,7 +9263,13 @@
#define BUFTBL_ENTRY_RAWADDR_OFST 4
#define BUFTBL_ENTRY_RAWADDR_LEN 8
#define BUFTBL_ENTRY_RAWADDR_LO_OFST 4
+#define BUFTBL_ENTRY_RAWADDR_LO_LEN 4
+#define BUFTBL_ENTRY_RAWADDR_LO_LBN 32
+#define BUFTBL_ENTRY_RAWADDR_LO_WIDTH 32
#define BUFTBL_ENTRY_RAWADDR_HI_OFST 8
+#define BUFTBL_ENTRY_RAWADDR_HI_LEN 4
+#define BUFTBL_ENTRY_RAWADDR_HI_LBN 64
+#define BUFTBL_ENTRY_RAWADDR_HI_WIDTH 32
#define BUFTBL_ENTRY_RAWADDR_LBN 32
#define BUFTBL_ENTRY_RAWADDR_WIDTH 64
@@ -8207,14 +9279,25 @@
#define NVRAM_PARTITION_TYPE_ID_LEN 2
/* enum: Primary MC firmware partition */
#define NVRAM_PARTITION_TYPE_MC_FIRMWARE 0x100
+/* enum: NMC firmware partition (this is intentionally an alias of MC_FIRMWARE)
+ */
+#define NVRAM_PARTITION_TYPE_NMC_FIRMWARE 0x100
/* enum: Secondary MC firmware partition */
#define NVRAM_PARTITION_TYPE_MC_FIRMWARE_BACKUP 0x200
/* enum: Expansion ROM partition */
#define NVRAM_PARTITION_TYPE_EXPANSION_ROM 0x300
/* enum: Static configuration TLV partition */
#define NVRAM_PARTITION_TYPE_STATIC_CONFIG 0x400
+/* enum: Factory configuration TLV partition (this is intentionally an alias of
+ * STATIC_CONFIG)
+ */
+#define NVRAM_PARTITION_TYPE_FACTORY_CONFIG 0x400
/* enum: Dynamic configuration TLV partition */
#define NVRAM_PARTITION_TYPE_DYNAMIC_CONFIG 0x500
+/* enum: User configuration TLV partition (this is intentionally an alias of
+ * DYNAMIC_CONFIG)
+ */
+#define NVRAM_PARTITION_TYPE_USER_CONFIG 0x500
/* enum: Expansion ROM configuration data for port 0 */
#define NVRAM_PARTITION_TYPE_EXPROM_CONFIG_PORT0 0x600
/* enum: Synonym for EXPROM_CONFIG_PORT0 as used in pmap files */
@@ -8227,10 +9310,16 @@
#define NVRAM_PARTITION_TYPE_EXPROM_CONFIG_PORT3 0x603
/* enum: Non-volatile log output partition */
#define NVRAM_PARTITION_TYPE_LOG 0x700
+/* enum: Non-volatile log output partition for NMC firmware (this is
+ * intentionally an alias of LOG)
+ */
+#define NVRAM_PARTITION_TYPE_NMC_LOG 0x700
/* enum: Non-volatile log output of second core on dual-core device */
#define NVRAM_PARTITION_TYPE_LOG_SLAVE 0x701
/* enum: Device state dump output partition */
#define NVRAM_PARTITION_TYPE_DUMP 0x800
+/* enum: Crash log partition for NMC firmware */
+#define NVRAM_PARTITION_TYPE_NMC_CRASH_LOG 0x801
/* enum: Application license key storage partition */
#define NVRAM_PARTITION_TYPE_LICENSE 0x900
/* enum: Start of range used for PHY partitions (low 8 bits are the PHY ID) */
@@ -8247,6 +9336,20 @@
#define NVRAM_PARTITION_TYPE_FC_LICENSE 0xb03
/* enum: Non-volatile log output partition for FC */
#define NVRAM_PARTITION_TYPE_FC_LOG 0xb04
+/* enum: FPGA Stage 1 bitstream */
+#define NVRAM_PARTITION_TYPE_FPGA_STAGE1 0xb05
+/* enum: FPGA Stage 2 bitstream */
+#define NVRAM_PARTITION_TYPE_FPGA_STAGE2 0xb06
+/* enum: FPGA User XCLBIN / Programmable Region 0 bitstream */
+#define NVRAM_PARTITION_TYPE_FPGA_REGION0 0xb07
+/* enum: FPGA User XCLBIN (this is intentionally an alias of FPGA_REGION0) */
+#define NVRAM_PARTITION_TYPE_FPGA_XCLBIN_USER 0xb07
+/* enum: FPGA jump instruction (a.k.a. boot) partition to select Stage1
+ * bitstream
+ */
+#define NVRAM_PARTITION_TYPE_FPGA_JUMP 0xb08
+/* enum: FPGA Validate XCLBIN */
+#define NVRAM_PARTITION_TYPE_FPGA_XCLBIN_VALIDATE 0xb09
/* enum: MUM firmware partition */
#define NVRAM_PARTITION_TYPE_MUM_FIRMWARE 0xc00
/* enum: SUC firmware partition (this is intentionally an alias of
@@ -8255,6 +9358,10 @@
#define NVRAM_PARTITION_TYPE_SUC_FIRMWARE 0xc00
/* enum: MUM Non-volatile log output partition. */
#define NVRAM_PARTITION_TYPE_MUM_LOG 0xc01
+/* enum: SUC Non-volatile log output partition (this is intentionally an alias
+ * of MUM_LOG).
+ */
+#define NVRAM_PARTITION_TYPE_SUC_LOG 0xc01
/* enum: MUM Application table partition. */
#define NVRAM_PARTITION_TYPE_MUM_APPTABLE 0xc02
/* enum: MUM boot rom partition. */
@@ -8269,6 +9376,10 @@
#define NVRAM_PARTITION_TYPE_EXPANSION_UEFI 0xd00
/* enum: Used by the expansion ROM for logging */
#define NVRAM_PARTITION_TYPE_PXE_LOG 0x1000
+/* enum: Non-volatile log output partition for Expansion ROM (this is
+ * intentionally an alias of PXE_LOG).
+ */
+#define NVRAM_PARTITION_TYPE_EXPROM_LOG 0x1000
/* enum: Used for XIP code of shmbooted images */
#define NVRAM_PARTITION_TYPE_XIP_SCRATCH 0x1100
/* enum: Spare partition 2 */
@@ -8277,6 +9388,10 @@
* between XJTAG and Manftest.
*/
#define NVRAM_PARTITION_TYPE_MANUFACTURING 0x1300
+/* enum: Deployment configuration TLV partition (this is intentionally an alias
+ * of MANUFACTURING)
+ */
+#define NVRAM_PARTITION_TYPE_DEPLOYMENT_CONFIG 0x1300
/* enum: Spare partition 4 */
#define NVRAM_PARTITION_TYPE_SPARE_4 0x1400
/* enum: Spare partition 5 */
@@ -8312,14 +9427,43 @@
#define NVRAM_PARTITION_TYPE_BUNDLE_LOG 0x1e02
/* enum: Partition for Solarflare gPXE bootrom installed via Bundle update. */
#define NVRAM_PARTITION_TYPE_EXPANSION_ROM_INTERNAL 0x1e03
+/* enum: Test partition on SmartNIC system microcontroller (SUC) */
+#define NVRAM_PARTITION_TYPE_SUC_TEST 0x1f00
+/* enum: System microcontroller access to primary FPGA flash. */
+#define NVRAM_PARTITION_TYPE_SUC_FPGA_PRIMARY 0x1f01
+/* enum: System microcontroller access to secondary FPGA flash (if present) */
+#define NVRAM_PARTITION_TYPE_SUC_FPGA_SECONDARY 0x1f02
+/* enum: System microcontroller access to primary System-on-Chip flash */
+#define NVRAM_PARTITION_TYPE_SUC_SOC_PRIMARY 0x1f03
+/* enum: System microcontroller access to secondary System-on-Chip flash (if
+ * present)
+ */
+#define NVRAM_PARTITION_TYPE_SUC_SOC_SECONDARY 0x1f04
+/* enum: System microcontroller critical failure logs. Contains structured
+ * details of sensors leading up to a critical failure (where the board is shut
+ * down).
+ */
+#define NVRAM_PARTITION_TYPE_SUC_FAILURE_LOG 0x1f05
+/* enum: System-on-Chip configuration information (see XN-200467-PS). */
+#define NVRAM_PARTITION_TYPE_SUC_SOC_CONFIG 0x1f07
+/* enum: System-on-Chip update information. */
+#define NVRAM_PARTITION_TYPE_SOC_UPDATE 0x2003
/* enum: Start of reserved value range (firmware may use for any purpose) */
#define NVRAM_PARTITION_TYPE_RESERVED_VALUES_MIN 0xff00
/* enum: End of reserved value range (firmware may use for any purpose) */
#define NVRAM_PARTITION_TYPE_RESERVED_VALUES_MAX 0xfffd
/* enum: Recovery partition map (provided if real map is missing or corrupt) */
#define NVRAM_PARTITION_TYPE_RECOVERY_MAP 0xfffe
+/* enum: Recovery Flash Partition Table, see SF-122606-TC. (this is
+ * intentionally an alias of RECOVERY_MAP)
+ */
+#define NVRAM_PARTITION_TYPE_RECOVERY_FPT 0xfffe
/* enum: Partition map (real map as stored in flash) */
#define NVRAM_PARTITION_TYPE_PARTITION_MAP 0xffff
+/* enum: Flash Partition Table, see SF-122606-TC. (this is intentionally an
+ * alias of PARTITION_MAP)
+ */
+#define NVRAM_PARTITION_TYPE_FPT 0xffff
#define NVRAM_PARTITION_TYPE_ID_LBN 0
#define NVRAM_PARTITION_TYPE_ID_WIDTH 16
@@ -8368,7 +9512,13 @@
#define LICENSED_FEATURES_MASK_OFST 0
#define LICENSED_FEATURES_MASK_LEN 8
#define LICENSED_FEATURES_MASK_LO_OFST 0
+#define LICENSED_FEATURES_MASK_LO_LEN 4
+#define LICENSED_FEATURES_MASK_LO_LBN 0
+#define LICENSED_FEATURES_MASK_LO_WIDTH 32
#define LICENSED_FEATURES_MASK_HI_OFST 4
+#define LICENSED_FEATURES_MASK_HI_LEN 4
+#define LICENSED_FEATURES_MASK_HI_LBN 32
+#define LICENSED_FEATURES_MASK_HI_WIDTH 32
#define LICENSED_FEATURES_RX_CUT_THROUGH_OFST 0
#define LICENSED_FEATURES_RX_CUT_THROUGH_LBN 0
#define LICENSED_FEATURES_RX_CUT_THROUGH_WIDTH 1
@@ -8408,7 +9558,13 @@
#define LICENSED_V3_APPS_MASK_OFST 0
#define LICENSED_V3_APPS_MASK_LEN 8
#define LICENSED_V3_APPS_MASK_LO_OFST 0
+#define LICENSED_V3_APPS_MASK_LO_LEN 4
+#define LICENSED_V3_APPS_MASK_LO_LBN 0
+#define LICENSED_V3_APPS_MASK_LO_WIDTH 32
#define LICENSED_V3_APPS_MASK_HI_OFST 4
+#define LICENSED_V3_APPS_MASK_HI_LEN 4
+#define LICENSED_V3_APPS_MASK_HI_LBN 32
+#define LICENSED_V3_APPS_MASK_HI_WIDTH 32
#define LICENSED_V3_APPS_ONLOAD_OFST 0
#define LICENSED_V3_APPS_ONLOAD_LBN 0
#define LICENSED_V3_APPS_ONLOAD_WIDTH 1
@@ -8466,7 +9622,13 @@
#define LICENSED_V3_FEATURES_MASK_OFST 0
#define LICENSED_V3_FEATURES_MASK_LEN 8
#define LICENSED_V3_FEATURES_MASK_LO_OFST 0
+#define LICENSED_V3_FEATURES_MASK_LO_LEN 4
+#define LICENSED_V3_FEATURES_MASK_LO_LBN 0
+#define LICENSED_V3_FEATURES_MASK_LO_WIDTH 32
#define LICENSED_V3_FEATURES_MASK_HI_OFST 4
+#define LICENSED_V3_FEATURES_MASK_HI_LEN 4
+#define LICENSED_V3_FEATURES_MASK_HI_LBN 32
+#define LICENSED_V3_FEATURES_MASK_HI_WIDTH 32
#define LICENSED_V3_FEATURES_RX_CUT_THROUGH_OFST 0
#define LICENSED_V3_FEATURES_RX_CUT_THROUGH_LBN 0
#define LICENSED_V3_FEATURES_RX_CUT_THROUGH_WIDTH 1
@@ -8617,6 +9779,7 @@
* Get a dump of the MCPU registers
*/
#define MC_CMD_READ_REGS 0x50
+#define MC_CMD_READ_REGS_MSGSET 0x50
#undef MC_CMD_0x50_PRIVILEGE_CTG
#define MC_CMD_0x50_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -8643,6 +9806,7 @@
* end with an address for each 4k of host memory required to back the EVQ.
*/
#define MC_CMD_INIT_EVQ 0x80
+#define MC_CMD_INIT_EVQ_MSGSET 0x80
#undef MC_CMD_0x80_PRIVILEGE_CTG
#define MC_CMD_0x80_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -8657,7 +9821,8 @@
#define MC_CMD_INIT_EVQ_IN_SIZE_OFST 0
#define MC_CMD_INIT_EVQ_IN_SIZE_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_EVQ_IN_INSTANCE_OFST 4
#define MC_CMD_INIT_EVQ_IN_INSTANCE_LEN 4
@@ -8729,7 +9894,13 @@
#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_OFST 36
#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_LO_OFST 36
+#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_LO_LBN 288
+#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_HI_OFST 40
+#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_HI_LBN 320
+#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_MINNUM 1
#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_MAXNUM 64
#define MC_CMD_INIT_EVQ_IN_DMA_ADDR_MAXNUM_MCDI2 64
@@ -8750,7 +9921,8 @@
#define MC_CMD_INIT_EVQ_V2_IN_SIZE_OFST 0
#define MC_CMD_INIT_EVQ_V2_IN_SIZE_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_EVQ_V2_IN_INSTANCE_OFST 4
#define MC_CMD_INIT_EVQ_V2_IN_INSTANCE_LEN 4
@@ -8847,7 +10019,13 @@
#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_OFST 36
#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_LO_OFST 36
+#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_LO_LBN 288
+#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_HI_OFST 40
+#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_HI_LBN 320
+#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_MINNUM 1
#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_MAXNUM 64
#define MC_CMD_INIT_EVQ_V2_IN_DMA_ADDR_MAXNUM_MCDI2 64
@@ -8900,6 +10078,7 @@
* the RXQ.
*/
#define MC_CMD_INIT_RXQ 0x81
+#define MC_CMD_INIT_RXQ_MSGSET 0x81
#undef MC_CMD_0x81_PRIVILEGE_CTG
#define MC_CMD_0x81_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -8923,7 +10102,8 @@
#define MC_CMD_INIT_RXQ_IN_LABEL_OFST 8
#define MC_CMD_INIT_RXQ_IN_LABEL_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_RXQ_IN_INSTANCE_OFST 12
#define MC_CMD_INIT_RXQ_IN_INSTANCE_LEN 4
@@ -8964,7 +10144,13 @@
#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_OFST 28
#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_LO_OFST 28
+#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_LO_LBN 224
+#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_HI_OFST 32
+#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_HI_LBN 256
+#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_MINNUM 1
#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_MAXNUM 28
#define MC_CMD_INIT_RXQ_IN_DMA_ADDR_MAXNUM_MCDI2 124
@@ -8988,7 +10174,8 @@
#define MC_CMD_INIT_RXQ_EXT_IN_LABEL_OFST 8
#define MC_CMD_INIT_RXQ_EXT_IN_LABEL_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_RXQ_EXT_IN_INSTANCE_OFST 12
#define MC_CMD_INIT_RXQ_EXT_IN_INSTANCE_LEN 4
@@ -9062,7 +10249,13 @@
#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_OFST 28
#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_LO_OFST 28
+#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_LO_LBN 224
+#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_HI_OFST 32
+#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_HI_LBN 256
+#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_RXQ_EXT_IN_DMA_ADDR_NUM 64
/* Maximum length of packet to receive, if SNAPSHOT_MODE flag is set */
#define MC_CMD_INIT_RXQ_EXT_IN_SNAPSHOT_LENGTH_OFST 540
@@ -9085,7 +10278,8 @@
#define MC_CMD_INIT_RXQ_V3_IN_LABEL_OFST 8
#define MC_CMD_INIT_RXQ_V3_IN_LABEL_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_RXQ_V3_IN_INSTANCE_OFST 12
#define MC_CMD_INIT_RXQ_V3_IN_INSTANCE_LEN 4
@@ -9159,7 +10353,13 @@
#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_OFST 28
#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_LO_OFST 28
+#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_LO_LBN 224
+#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_HI_OFST 32
+#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_HI_LBN 256
+#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_RXQ_V3_IN_DMA_ADDR_NUM 64
/* Maximum length of packet to receive, if SNAPSHOT_MODE flag is set */
#define MC_CMD_INIT_RXQ_V3_IN_SNAPSHOT_LENGTH_OFST 540
@@ -9211,7 +10411,8 @@
#define MC_CMD_INIT_RXQ_V4_IN_LABEL_OFST 8
#define MC_CMD_INIT_RXQ_V4_IN_LABEL_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_RXQ_V4_IN_INSTANCE_OFST 12
#define MC_CMD_INIT_RXQ_V4_IN_INSTANCE_LEN 4
@@ -9285,7 +10486,13 @@
#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_OFST 28
#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_LO_OFST 28
+#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_LO_LBN 224
+#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_HI_OFST 32
+#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_HI_LBN 256
+#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_RXQ_V4_IN_DMA_ADDR_NUM 64
/* Maximum length of packet to receive, if SNAPSHOT_MODE flag is set */
#define MC_CMD_INIT_RXQ_V4_IN_SNAPSHOT_LENGTH_OFST 540
@@ -9350,7 +10557,8 @@
#define MC_CMD_INIT_RXQ_V5_IN_LABEL_OFST 8
#define MC_CMD_INIT_RXQ_V5_IN_LABEL_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_RXQ_V5_IN_INSTANCE_OFST 12
#define MC_CMD_INIT_RXQ_V5_IN_INSTANCE_LEN 4
@@ -9424,7 +10632,13 @@
#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_OFST 28
#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_LO_OFST 28
+#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_LO_LBN 224
+#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_HI_OFST 32
+#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_HI_LBN 256
+#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_RXQ_V5_IN_DMA_ADDR_NUM 64
/* Maximum length of packet to receive, if SNAPSHOT_MODE flag is set */
#define MC_CMD_INIT_RXQ_V5_IN_SNAPSHOT_LENGTH_OFST 540
@@ -9497,6 +10711,7 @@
/* MC_CMD_INIT_TXQ
*/
#define MC_CMD_INIT_TXQ 0x82
+#define MC_CMD_INIT_TXQ_MSGSET 0x82
#undef MC_CMD_0x82_PRIVILEGE_CTG
#define MC_CMD_0x82_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -9521,7 +10736,8 @@
#define MC_CMD_INIT_TXQ_IN_LABEL_OFST 8
#define MC_CMD_INIT_TXQ_IN_LABEL_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_TXQ_IN_INSTANCE_OFST 12
#define MC_CMD_INIT_TXQ_IN_INSTANCE_LEN 4
@@ -9565,7 +10781,13 @@
#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_OFST 28
#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_LO_OFST 28
+#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_LO_LBN 224
+#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_HI_OFST 32
+#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_HI_LBN 256
+#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_MINNUM 1
#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_MAXNUM 28
#define MC_CMD_INIT_TXQ_IN_DMA_ADDR_MAXNUM_MCDI2 124
@@ -9586,7 +10808,8 @@
#define MC_CMD_INIT_TXQ_EXT_IN_LABEL_OFST 8
#define MC_CMD_INIT_TXQ_EXT_IN_LABEL_LEN 4
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_INIT_TXQ_EXT_IN_INSTANCE_OFST 12
#define MC_CMD_INIT_TXQ_EXT_IN_INSTANCE_LEN 4
@@ -9648,7 +10871,13 @@
#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_OFST 28
#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_LEN 8
#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_LO_OFST 28
+#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_LO_LEN 4
+#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_LO_LBN 224
+#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_HI_OFST 32
+#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_HI_LEN 4
+#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_HI_LBN 256
+#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_MINNUM 1
#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_MAXNUM 64
#define MC_CMD_INIT_TXQ_EXT_IN_DMA_ADDR_MAXNUM_MCDI2 64
@@ -9674,6 +10903,7 @@
* or the operation will fail with EBUSY
*/
#define MC_CMD_FINI_EVQ 0x83
+#define MC_CMD_FINI_EVQ_MSGSET 0x83
#undef MC_CMD_0x83_PRIVILEGE_CTG
#define MC_CMD_0x83_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -9695,6 +10925,7 @@
* Teardown a RXQ.
*/
#define MC_CMD_FINI_RXQ 0x84
+#define MC_CMD_FINI_RXQ_MSGSET 0x84
#undef MC_CMD_0x84_PRIVILEGE_CTG
#define MC_CMD_0x84_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -9714,6 +10945,7 @@
* Teardown a TXQ.
*/
#define MC_CMD_FINI_TXQ 0x85
+#define MC_CMD_FINI_TXQ_MSGSET 0x85
#undef MC_CMD_0x85_PRIVILEGE_CTG
#define MC_CMD_0x85_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -9733,6 +10965,7 @@
* Generate an event on an EVQ belonging to the function issuing the command.
*/
#define MC_CMD_DRIVER_EVENT 0x86
+#define MC_CMD_DRIVER_EVENT_MSGSET 0x86
#undef MC_CMD_0x86_PRIVILEGE_CTG
#define MC_CMD_0x86_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -9746,7 +10979,13 @@
#define MC_CMD_DRIVER_EVENT_IN_DATA_OFST 4
#define MC_CMD_DRIVER_EVENT_IN_DATA_LEN 8
#define MC_CMD_DRIVER_EVENT_IN_DATA_LO_OFST 4
+#define MC_CMD_DRIVER_EVENT_IN_DATA_LO_LEN 4
+#define MC_CMD_DRIVER_EVENT_IN_DATA_LO_LBN 32
+#define MC_CMD_DRIVER_EVENT_IN_DATA_LO_WIDTH 32
#define MC_CMD_DRIVER_EVENT_IN_DATA_HI_OFST 8
+#define MC_CMD_DRIVER_EVENT_IN_DATA_HI_LEN 4
+#define MC_CMD_DRIVER_EVENT_IN_DATA_HI_LBN 64
+#define MC_CMD_DRIVER_EVENT_IN_DATA_HI_WIDTH 32
/* MC_CMD_DRIVER_EVENT_OUT msgresponse */
#define MC_CMD_DRIVER_EVENT_OUT_LEN 0
@@ -9760,6 +10999,7 @@
* MC_CMD_SET_FUNC, which remains available for Siena but now deprecated.
*/
#define MC_CMD_PROXY_CMD 0x5b
+#define MC_CMD_PROXY_CMD_MSGSET 0x5b
#undef MC_CMD_0x5b_PRIVILEGE_CTG
#define MC_CMD_0x5b_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -9828,6 +11068,7 @@
* a designated admin function
*/
#define MC_CMD_PROXY_CONFIGURE 0x58
+#define MC_CMD_PROXY_CONFIGURE_MSGSET 0x58
#undef MC_CMD_0x58_PRIVILEGE_CTG
#define MC_CMD_0x58_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -9845,7 +11086,13 @@
#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_OFST 4
#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_LEN 8
#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_LO_OFST 4
+#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_LO_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_LO_LBN 32
+#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_LO_WIDTH 32
#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_HI_OFST 8
+#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_HI_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_HI_LBN 64
+#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BUFF_ADDR_HI_WIDTH 32
/* Must be a power of 2 */
#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BLOCK_SIZE_OFST 12
#define MC_CMD_PROXY_CONFIGURE_IN_STATUS_BLOCK_SIZE_LEN 4
@@ -9855,7 +11102,13 @@
#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_OFST 16
#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_LEN 8
#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_LO_OFST 16
+#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_LO_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_LO_LBN 128
+#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_LO_WIDTH 32
#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_HI_OFST 20
+#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_HI_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_HI_LBN 160
+#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BUFF_ADDR_HI_WIDTH 32
/* Must be a power of 2 */
#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BLOCK_SIZE_OFST 24
#define MC_CMD_PROXY_CONFIGURE_IN_REQUEST_BLOCK_SIZE_LEN 4
@@ -9866,7 +11119,13 @@
#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_OFST 28
#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_LEN 8
#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_LO_OFST 28
+#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_LO_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_LO_LBN 224
+#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_LO_WIDTH 32
#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_HI_OFST 32
+#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_HI_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_HI_LBN 256
+#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BUFF_ADDR_HI_WIDTH 32
/* Must be a power of 2, or zero if this buffer is not provided */
#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BLOCK_SIZE_OFST 36
#define MC_CMD_PROXY_CONFIGURE_IN_REPLY_BLOCK_SIZE_LEN 4
@@ -9890,7 +11149,13 @@
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_OFST 4
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_LEN 8
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_LO_OFST 4
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_LO_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_LO_LBN 32
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_LO_WIDTH 32
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_HI_OFST 8
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_HI_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_HI_LBN 64
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BUFF_ADDR_HI_WIDTH 32
/* Must be a power of 2 */
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BLOCK_SIZE_OFST 12
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_STATUS_BLOCK_SIZE_LEN 4
@@ -9900,7 +11165,13 @@
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_OFST 16
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_LEN 8
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_LO_OFST 16
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_LO_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_LO_LBN 128
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_LO_WIDTH 32
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_HI_OFST 20
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_HI_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_HI_LBN 160
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BUFF_ADDR_HI_WIDTH 32
/* Must be a power of 2 */
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BLOCK_SIZE_OFST 24
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REQUEST_BLOCK_SIZE_LEN 4
@@ -9911,7 +11182,13 @@
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_OFST 28
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_LEN 8
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_LO_OFST 28
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_LO_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_LO_LBN 224
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_LO_WIDTH 32
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_HI_OFST 32
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_HI_LEN 4
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_HI_LBN 256
+#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BUFF_ADDR_HI_WIDTH 32
/* Must be a power of 2, or zero if this buffer is not provided */
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BLOCK_SIZE_OFST 36
#define MC_CMD_PROXY_CONFIGURE_EXT_IN_REPLY_BLOCK_SIZE_LEN 4
@@ -9936,6 +11213,7 @@
* MC_CMD_PROXY_CONFIGURE).
*/
#define MC_CMD_PROXY_COMPLETE 0x5f
+#define MC_CMD_PROXY_COMPLETE_MSGSET 0x5f
#undef MC_CMD_0x5f_PRIVILEGE_CTG
#define MC_CMD_0x5f_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -9974,6 +11252,7 @@
* cannot do so). The buffer table entries will initially be zeroed.
*/
#define MC_CMD_ALLOC_BUFTBL_CHUNK 0x87
+#define MC_CMD_ALLOC_BUFTBL_CHUNK_MSGSET 0x87
#undef MC_CMD_0x87_PRIVILEGE_CTG
#define MC_CMD_0x87_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -10005,6 +11284,7 @@
* Reprogram a set of buffer table entries in the specified chunk.
*/
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES 0x88
+#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_MSGSET 0x88
#undef MC_CMD_0x88_PRIVILEGE_CTG
#define MC_CMD_0x88_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -10027,7 +11307,13 @@
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_OFST 12
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LEN 8
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LO_OFST 12
+#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LO_LEN 4
+#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LO_LBN 96
+#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_LO_WIDTH 32
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_HI_OFST 16
+#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_HI_LEN 4
+#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_HI_LBN 128
+#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_HI_WIDTH 32
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_MINNUM 1
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_MAXNUM 32
#define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_ENTRY_MAXNUM_MCDI2 32
@@ -10040,6 +11326,7 @@
/* MC_CMD_FREE_BUFTBL_CHUNK
*/
#define MC_CMD_FREE_BUFTBL_CHUNK 0x89
+#define MC_CMD_FREE_BUFTBL_CHUNK_MSGSET 0x89
#undef MC_CMD_0x89_PRIVILEGE_CTG
#define MC_CMD_0x89_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -10058,6 +11345,7 @@
* Multiplexed MCDI call for filter operations
*/
#define MC_CMD_FILTER_OP 0x8a
+#define MC_CMD_FILTER_OP_MSGSET 0x8a
#undef MC_CMD_0x8a_PRIVILEGE_CTG
#define MC_CMD_0x8a_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -10083,7 +11371,13 @@
#define MC_CMD_FILTER_OP_IN_HANDLE_OFST 4
#define MC_CMD_FILTER_OP_IN_HANDLE_LEN 8
#define MC_CMD_FILTER_OP_IN_HANDLE_LO_OFST 4
+#define MC_CMD_FILTER_OP_IN_HANDLE_LO_LEN 4
+#define MC_CMD_FILTER_OP_IN_HANDLE_LO_LBN 32
+#define MC_CMD_FILTER_OP_IN_HANDLE_LO_WIDTH 32
#define MC_CMD_FILTER_OP_IN_HANDLE_HI_OFST 8
+#define MC_CMD_FILTER_OP_IN_HANDLE_HI_LEN 4
+#define MC_CMD_FILTER_OP_IN_HANDLE_HI_LBN 64
+#define MC_CMD_FILTER_OP_IN_HANDLE_HI_WIDTH 32
/* The port ID associated with the v-adaptor which should contain this filter.
*/
#define MC_CMD_FILTER_OP_IN_PORT_ID_OFST 12
@@ -10239,7 +11533,13 @@
#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_OFST 4
#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_LEN 8
#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_LO_OFST 4
+#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_LO_LEN 4
+#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_LO_LBN 32
+#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_LO_WIDTH 32
#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_HI_OFST 8
+#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_HI_LEN 4
+#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_HI_LBN 64
+#define MC_CMD_FILTER_OP_EXT_IN_HANDLE_HI_WIDTH 32
/* The port ID associated with the v-adaptor which should contain this filter.
*/
#define MC_CMD_FILTER_OP_EXT_IN_PORT_ID_OFST 12
@@ -10518,7 +11818,13 @@
#define MC_CMD_FILTER_OP_V3_IN_HANDLE_OFST 4
#define MC_CMD_FILTER_OP_V3_IN_HANDLE_LEN 8
#define MC_CMD_FILTER_OP_V3_IN_HANDLE_LO_OFST 4
+#define MC_CMD_FILTER_OP_V3_IN_HANDLE_LO_LEN 4
+#define MC_CMD_FILTER_OP_V3_IN_HANDLE_LO_LBN 32
+#define MC_CMD_FILTER_OP_V3_IN_HANDLE_LO_WIDTH 32
#define MC_CMD_FILTER_OP_V3_IN_HANDLE_HI_OFST 8
+#define MC_CMD_FILTER_OP_V3_IN_HANDLE_HI_LEN 4
+#define MC_CMD_FILTER_OP_V3_IN_HANDLE_HI_LBN 64
+#define MC_CMD_FILTER_OP_V3_IN_HANDLE_HI_WIDTH 32
/* The port ID associated with the v-adaptor which should contain this filter.
*/
#define MC_CMD_FILTER_OP_V3_IN_PORT_ID_OFST 12
@@ -10779,15 +12085,15 @@
*/
#define MC_CMD_FILTER_OP_V3_IN_IFRM_DST_IP_OFST 156
#define MC_CMD_FILTER_OP_V3_IN_IFRM_DST_IP_LEN 16
-/* Flags controlling mutations of the user_mark and user_flag fields of
- * matching packets, with logic as follows: if (req.MATCH_BITOR_FLAG == 1)
- * user_flag = req.MATCH_SET_FLAG bit_or user_flag; else user_flag =
- * req.MATCH_SET_FLAG; if (req.MATCH_SET_MARK == 0) user_mark = 0; else if
- * (req.MATCH_BITOR_MARK == 1) user_mark = req.MATCH_SET_MARK bit_or user_mark;
- * else user_mark = req.MATCH_SET_MARK; N.B. These flags overlap with the
- * MATCH_ACTION field, which is deprecated in favour of this field. For the
- * cases where these flags induce a valid encoding of the MATCH_ACTION field,
- * the semantics agree.
+/* Flags controlling mutations of the packet and/or metadata when the filter is
+ * matched. The user_mark and user_flag fields' logic is as follows: if
+ * (req.MATCH_BITOR_FLAG == 1) user_flag = req.MATCH_SET_FLAG bit_or user_flag;
+ * else user_flag = req.MATCH_SET_FLAG; if (req.MATCH_SET_MARK == 0) user_mark
+ * = 0; else if (req.MATCH_BITOR_MARK == 1) user_mark = req.MATCH_SET_MARK
+ * bit_or user_mark; else user_mark = req.MATCH_SET_MARK; N.B. These flags
+ * overlap with the MATCH_ACTION field, which is deprecated in favour of this
+ * field. For the cases where these flags induce a valid encoding of the
+ * MATCH_ACTION field, the semantics agree.
*/
#define MC_CMD_FILTER_OP_V3_IN_MATCH_ACTION_FLAGS_OFST 172
#define MC_CMD_FILTER_OP_V3_IN_MATCH_ACTION_FLAGS_LEN 4
@@ -10803,6 +12109,9 @@
#define MC_CMD_FILTER_OP_V3_IN_MATCH_BITOR_MARK_OFST 172
#define MC_CMD_FILTER_OP_V3_IN_MATCH_BITOR_MARK_LBN 3
#define MC_CMD_FILTER_OP_V3_IN_MATCH_BITOR_MARK_WIDTH 1
+#define MC_CMD_FILTER_OP_V3_IN_MATCH_STRIP_VLAN_OFST 172
+#define MC_CMD_FILTER_OP_V3_IN_MATCH_STRIP_VLAN_LBN 4
+#define MC_CMD_FILTER_OP_V3_IN_MATCH_STRIP_VLAN_WIDTH 1
/* Deprecated: the overlapping MATCH_ACTION_FLAGS field exposes all of the
* functionality of this field in an ABI-backwards-compatible manner, and
* should be used instead. Any future extensions should be made to the
@@ -10848,7 +12157,13 @@
#define MC_CMD_FILTER_OP_OUT_HANDLE_OFST 4
#define MC_CMD_FILTER_OP_OUT_HANDLE_LEN 8
#define MC_CMD_FILTER_OP_OUT_HANDLE_LO_OFST 4
+#define MC_CMD_FILTER_OP_OUT_HANDLE_LO_LEN 4
+#define MC_CMD_FILTER_OP_OUT_HANDLE_LO_LBN 32
+#define MC_CMD_FILTER_OP_OUT_HANDLE_LO_WIDTH 32
#define MC_CMD_FILTER_OP_OUT_HANDLE_HI_OFST 8
+#define MC_CMD_FILTER_OP_OUT_HANDLE_HI_LEN 4
+#define MC_CMD_FILTER_OP_OUT_HANDLE_HI_LBN 64
+#define MC_CMD_FILTER_OP_OUT_HANDLE_HI_WIDTH 32
/* enum: guaranteed invalid filter handle (low 32 bits) */
#define MC_CMD_FILTER_OP_OUT_HANDLE_LO_INVALID 0xffffffff
/* enum: guaranteed invalid filter handle (high 32 bits) */
@@ -10868,7 +12183,13 @@
#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_OFST 4
#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_LEN 8
#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_LO_OFST 4
+#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_LO_LEN 4
+#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_LO_LBN 32
+#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_LO_WIDTH 32
#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_HI_OFST 8
+#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_HI_LEN 4
+#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_HI_LBN 64
+#define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_HI_WIDTH 32
/* Enum values, see field(s): */
/* MC_CMD_FILTER_OP_OUT/HANDLE */
@@ -10878,6 +12199,7 @@
* Get information related to the parser-dispatcher subsystem
*/
#define MC_CMD_GET_PARSER_DISP_INFO 0xe4
+#define MC_CMD_GET_PARSER_DISP_INFO_MSGSET 0xe4
#undef MC_CMD_0xe4_PRIVILEGE_CTG
#define MC_CMD_0xe4_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11025,6 +12347,7 @@
* permitted.
*/
#define MC_CMD_PARSER_DISP_RW 0xe5
+#define MC_CMD_PARSER_DISP_RW_MSGSET 0xe5
#undef MC_CMD_0xe5_PRIVILEGE_CTG
#define MC_CMD_0xe5_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -11115,6 +12438,7 @@
* Get number of PFs on the device.
*/
#define MC_CMD_GET_PF_COUNT 0xb6
+#define MC_CMD_GET_PF_COUNT_MSGSET 0xb6
#undef MC_CMD_0xb6_PRIVILEGE_CTG
#define MC_CMD_0xb6_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11134,6 +12458,7 @@
* Set number of PFs on the device.
*/
#define MC_CMD_SET_PF_COUNT 0xb7
+#define MC_CMD_SET_PF_COUNT_MSGSET 0xb7
/* MC_CMD_SET_PF_COUNT_IN msgrequest */
#define MC_CMD_SET_PF_COUNT_IN_LEN 4
@@ -11150,6 +12475,7 @@
* Get port assignment for current PCI function.
*/
#define MC_CMD_GET_PORT_ASSIGNMENT 0xb8
+#define MC_CMD_GET_PORT_ASSIGNMENT_MSGSET 0xb8
#undef MC_CMD_0xb8_PRIVILEGE_CTG
#define MC_CMD_0xb8_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11175,6 +12501,7 @@
* Set port assignment for current PCI function.
*/
#define MC_CMD_SET_PORT_ASSIGNMENT 0xb9
+#define MC_CMD_SET_PORT_ASSIGNMENT_MSGSET 0xb9
#undef MC_CMD_0xb9_PRIVILEGE_CTG
#define MC_CMD_0xb9_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -11194,6 +12521,7 @@
* Allocate VIs for current PCI function.
*/
#define MC_CMD_ALLOC_VIS 0x8b
+#define MC_CMD_ALLOC_VIS_MSGSET 0x8b
#undef MC_CMD_0x8b_PRIVILEGE_CTG
#define MC_CMD_0x8b_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11241,6 +12569,7 @@
* but not freed.
*/
#define MC_CMD_FREE_VIS 0x8c
+#define MC_CMD_FREE_VIS_MSGSET 0x8c
#undef MC_CMD_0x8c_PRIVILEGE_CTG
#define MC_CMD_0x8c_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11257,6 +12586,7 @@
* Get SRIOV config for this PF.
*/
#define MC_CMD_GET_SRIOV_CFG 0xba
+#define MC_CMD_GET_SRIOV_CFG_MSGSET 0xba
#undef MC_CMD_0xba_PRIVILEGE_CTG
#define MC_CMD_0xba_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11290,6 +12620,7 @@
* Set SRIOV config for this PF.
*/
#define MC_CMD_SET_SRIOV_CFG 0xbb
+#define MC_CMD_SET_SRIOV_CFG_MSGSET 0xbb
#undef MC_CMD_0xbb_PRIVILEGE_CTG
#define MC_CMD_0xbb_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -11325,9 +12656,11 @@
/***********************************/
/* MC_CMD_GET_VI_ALLOC_INFO
* Get information about number of VI's and base VI number allocated to this
- * function.
+ * function. This message is not available to dynamic clients created by
+ * MC_CMD_CLIENT_ALLOC.
*/
#define MC_CMD_GET_VI_ALLOC_INFO 0x8d
+#define MC_CMD_GET_VI_ALLOC_INFO_MSGSET 0x8d
#undef MC_CMD_0x8d_PRIVILEGE_CTG
#define MC_CMD_0x8d_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11352,9 +12685,12 @@
/***********************************/
/* MC_CMD_DUMP_VI_STATE
- * For CmdClient use. Dump pertinent information on a specific absolute VI.
+ * For CmdClient use. Dump pertinent information on a specific absolute VI. The
+ * VI must be owned by the calling client or one of its ancestors; usership of
+ * the VI (as set by MC_CMD_SET_VI_USER) is not sufficient.
*/
#define MC_CMD_DUMP_VI_STATE 0x8e
+#define MC_CMD_DUMP_VI_STATE_MSGSET 0x8e
#undef MC_CMD_0x8e_PRIVILEGE_CTG
#define MC_CMD_0x8e_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11366,7 +12702,7 @@
#define MC_CMD_DUMP_VI_STATE_IN_VI_NUMBER_LEN 4
/* MC_CMD_DUMP_VI_STATE_OUT msgresponse */
-#define MC_CMD_DUMP_VI_STATE_OUT_LEN 96
+#define MC_CMD_DUMP_VI_STATE_OUT_LEN 100
/* The PF part of the function owning this VI. */
#define MC_CMD_DUMP_VI_STATE_OUT_OWNER_PF_OFST 0
#define MC_CMD_DUMP_VI_STATE_OUT_OWNER_PF_LEN 2
@@ -11389,12 +12725,24 @@
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_OFST 12
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_LO_OFST 12
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_LO_LBN 96
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_HI_OFST 16
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_HI_LBN 128
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EVQ_PTR_RAW_HI_WIDTH 32
/* Raw evq timer table data. */
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_OFST 20
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_LO_OFST 20
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_LO_LBN 160
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_HI_OFST 24
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_HI_LBN 192
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_TIMER_RAW_HI_WIDTH 32
/* Combined metadata field. */
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_OFST 28
#define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_LEN 4
@@ -11411,22 +12759,46 @@
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_OFST 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_LO_OFST 32
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_LO_LBN 256
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_HI_OFST 36
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_HI_LBN 288
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_0_HI_WIDTH 32
/* TXDPCPU raw table data for queue. */
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_OFST 40
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_LO_OFST 40
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_LO_LBN 320
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_HI_OFST 44
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_HI_LBN 352
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_1_HI_WIDTH 32
/* TXDPCPU raw table data for queue. */
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_OFST 48
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_LO_OFST 48
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_LO_LBN 384
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_HI_OFST 52
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_HI_LBN 416
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_RAW_TBL_2_HI_WIDTH 32
/* Combined metadata field. */
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_OFST 56
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_LO_OFST 56
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_LO_LBN 448
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_HI_OFST 60
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_HI_LBN 480
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_HI_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_BUFS_BASE_OFST 56
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_BUFS_BASE_LBN 0
#define MC_CMD_DUMP_VI_STATE_OUT_VI_TX_META_BUFS_BASE_WIDTH 16
@@ -11446,22 +12818,46 @@
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_OFST 64
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_LO_OFST 64
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_LO_LBN 512
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_HI_OFST 68
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_HI_LBN 544
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_0_HI_WIDTH 32
/* RXDPCPU raw table data for queue. */
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_OFST 72
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_LO_OFST 72
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_LO_LBN 576
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_HI_OFST 76
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_HI_LBN 608
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_1_HI_WIDTH 32
/* Reserved, currently 0. */
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_OFST 80
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_LO_OFST 80
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_LO_LBN 640
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_HI_OFST 84
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_HI_LBN 672
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_RAW_TBL_2_HI_WIDTH 32
/* Combined metadata field. */
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_OFST 88
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_LEN 8
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_LO_OFST 88
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_LO_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_LO_LBN 704
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_LO_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_HI_OFST 92
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_HI_LEN 4
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_HI_LBN 736
+#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_HI_WIDTH 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_BUFS_BASE_OFST 88
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_BUFS_BASE_LBN 0
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_BUFS_BASE_WIDTH 16
@@ -11474,6 +12870,9 @@
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_WAITCOUNT_OFST 88
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_WAITCOUNT_LBN 32
#define MC_CMD_DUMP_VI_STATE_OUT_VI_RX_META_WAITCOUNT_WIDTH 8
+/* Current user, as assigned by MC_CMD_SET_VI_USER. */
+#define MC_CMD_DUMP_VI_STATE_OUT_USER_CLIENT_ID_OFST 96
+#define MC_CMD_DUMP_VI_STATE_OUT_USER_CLIENT_ID_LEN 4
/***********************************/
@@ -11481,6 +12880,7 @@
* Allocate a push I/O buffer for later use with a tx queue.
*/
#define MC_CMD_ALLOC_PIOBUF 0x8f
+#define MC_CMD_ALLOC_PIOBUF_MSGSET 0x8f
#undef MC_CMD_0x8f_PRIVILEGE_CTG
#define MC_CMD_0x8f_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -11500,6 +12900,7 @@
* Free a push I/O buffer.
*/
#define MC_CMD_FREE_PIOBUF 0x90
+#define MC_CMD_FREE_PIOBUF_MSGSET 0x90
#undef MC_CMD_0x90_PRIVILEGE_CTG
#define MC_CMD_0x90_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -11516,9 +12917,12 @@
/***********************************/
/* MC_CMD_GET_VI_TLP_PROCESSING
- * Get TLP steering and ordering information for a VI.
+ * Get TLP steering and ordering information for a VI. The caller must have the
+ * GRP_FUNC_DMA privilege and must be the currently-assigned user of this VI or
+ * an ancestor of the current user (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_GET_VI_TLP_PROCESSING 0xb0
+#define MC_CMD_GET_VI_TLP_PROCESSING_MSGSET 0xb0
#undef MC_CMD_0xb0_PRIVILEGE_CTG
#define MC_CMD_0xb0_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11555,9 +12959,12 @@
/***********************************/
/* MC_CMD_SET_VI_TLP_PROCESSING
- * Set TLP steering and ordering information for a VI.
+ * Set TLP steering and ordering information for a VI. The caller must have the
+ * GRP_FUNC_DMA privilege and must be the currently-assigned user of this VI or
+ * an ancestor of the current user (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_SET_VI_TLP_PROCESSING 0xb1
+#define MC_CMD_SET_VI_TLP_PROCESSING_MSGSET 0xb1
#undef MC_CMD_0xb1_PRIVILEGE_CTG
#define MC_CMD_0xb1_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -11597,6 +13004,7 @@
* Get global PCIe steering and transaction processing configuration.
*/
#define MC_CMD_GET_TLP_PROCESSING_GLOBALS 0xbc
+#define MC_CMD_GET_TLP_PROCESSING_GLOBALS_MSGSET 0xbc
#undef MC_CMD_0xbc_PRIVILEGE_CTG
#define MC_CMD_0xbc_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -11681,6 +13089,7 @@
* Set global PCIe steering and transaction processing configuration.
*/
#define MC_CMD_SET_TLP_PROCESSING_GLOBALS 0xbd
+#define MC_CMD_SET_TLP_PROCESSING_GLOBALS_MSGSET 0xbd
#undef MC_CMD_0xbd_PRIVILEGE_CTG
#define MC_CMD_0xbd_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -11746,6 +13155,7 @@
* Download a new set of images to the satellite CPUs from the host.
*/
#define MC_CMD_SATELLITE_DOWNLOAD 0x91
+#define MC_CMD_SATELLITE_DOWNLOAD_MSGSET 0x91
#undef MC_CMD_0x91_PRIVILEGE_CTG
#define MC_CMD_0x91_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -11873,6 +13283,7 @@
* reference inherent device capabilities as opposed to current NVRAM config.
*/
#define MC_CMD_GET_CAPABILITIES 0xbe
+#define MC_CMD_GET_CAPABILITIES_MSGSET 0xbe
#undef MC_CMD_0xbe_PRIVILEGE_CTG
#define MC_CMD_0xbe_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -14813,6 +16224,18 @@
#define MC_CMD_GET_CAPABILITIES_V7_OUT_UNSOL_EV_CREDIT_SUPPORTED_OFST 148
#define MC_CMD_GET_CAPABILITIES_V7_OUT_UNSOL_EV_CREDIT_SUPPORTED_LBN 7
#define MC_CMD_GET_CAPABILITIES_V7_OUT_UNSOL_EV_CREDIT_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_ENCAPSULATED_MCDI_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_ENCAPSULATED_MCDI_SUPPORTED_LBN 8
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_ENCAPSULATED_MCDI_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_EXTERNAL_MAE_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_EXTERNAL_MAE_SUPPORTED_LBN 9
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_EXTERNAL_MAE_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_LBN 10
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_LBN 11
+#define MC_CMD_GET_CAPABILITIES_V7_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_WIDTH 1
/* MC_CMD_GET_CAPABILITIES_V8_OUT msgresponse */
#define MC_CMD_GET_CAPABILITIES_V8_OUT_LEN 160
@@ -15299,6 +16722,18 @@
#define MC_CMD_GET_CAPABILITIES_V8_OUT_UNSOL_EV_CREDIT_SUPPORTED_OFST 148
#define MC_CMD_GET_CAPABILITIES_V8_OUT_UNSOL_EV_CREDIT_SUPPORTED_LBN 7
#define MC_CMD_GET_CAPABILITIES_V8_OUT_UNSOL_EV_CREDIT_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_ENCAPSULATED_MCDI_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_ENCAPSULATED_MCDI_SUPPORTED_LBN 8
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_ENCAPSULATED_MCDI_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_EXTERNAL_MAE_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_EXTERNAL_MAE_SUPPORTED_LBN 9
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_EXTERNAL_MAE_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_LBN 10
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_LBN 11
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_WIDTH 1
/* These bits are reserved for communicating test-specific capabilities to
* host-side test software. All production drivers should treat this field as
* opaque.
@@ -15306,7 +16741,13 @@
#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_OFST 152
#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_LEN 8
#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_LO_OFST 152
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_LO_LEN 4
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_LO_LBN 1216
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_LO_WIDTH 32
#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_HI_OFST 156
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_HI_LEN 4
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_HI_LBN 1248
+#define MC_CMD_GET_CAPABILITIES_V8_OUT_TEST_RESERVED_HI_WIDTH 32
/* MC_CMD_GET_CAPABILITIES_V9_OUT msgresponse */
#define MC_CMD_GET_CAPABILITIES_V9_OUT_LEN 184
@@ -15793,6 +17234,18 @@
#define MC_CMD_GET_CAPABILITIES_V9_OUT_UNSOL_EV_CREDIT_SUPPORTED_OFST 148
#define MC_CMD_GET_CAPABILITIES_V9_OUT_UNSOL_EV_CREDIT_SUPPORTED_LBN 7
#define MC_CMD_GET_CAPABILITIES_V9_OUT_UNSOL_EV_CREDIT_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_ENCAPSULATED_MCDI_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_ENCAPSULATED_MCDI_SUPPORTED_LBN 8
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_ENCAPSULATED_MCDI_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_EXTERNAL_MAE_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_EXTERNAL_MAE_SUPPORTED_LBN 9
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_EXTERNAL_MAE_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_LBN 10
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_LBN 11
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_WIDTH 1
/* These bits are reserved for communicating test-specific capabilities to
* host-side test software. All production drivers should treat this field as
* opaque.
@@ -15800,7 +17253,13 @@
#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_OFST 152
#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_LEN 8
#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_LO_OFST 152
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_LO_LEN 4
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_LO_LBN 1216
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_LO_WIDTH 32
#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_HI_OFST 156
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_HI_LEN 4
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_HI_LBN 1248
+#define MC_CMD_GET_CAPABILITIES_V9_OUT_TEST_RESERVED_HI_WIDTH 32
/* The minimum size (in table entries) of indirection table to be allocated
* from the pool for an RSS context. Note that the table size used must be a
* power of 2.
@@ -16322,6 +17781,18 @@
#define MC_CMD_GET_CAPABILITIES_V10_OUT_UNSOL_EV_CREDIT_SUPPORTED_OFST 148
#define MC_CMD_GET_CAPABILITIES_V10_OUT_UNSOL_EV_CREDIT_SUPPORTED_LBN 7
#define MC_CMD_GET_CAPABILITIES_V10_OUT_UNSOL_EV_CREDIT_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_ENCAPSULATED_MCDI_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_ENCAPSULATED_MCDI_SUPPORTED_LBN 8
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_ENCAPSULATED_MCDI_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_EXTERNAL_MAE_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_EXTERNAL_MAE_SUPPORTED_LBN 9
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_EXTERNAL_MAE_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_LBN 10
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_NVRAM_UPDATE_ABORT_SUPPORTED_WIDTH 1
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_OFST 148
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_LBN 11
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_MAE_ACTION_SET_ALLOC_V2_SUPPORTED_WIDTH 1
/* These bits are reserved for communicating test-specific capabilities to
* host-side test software. All production drivers should treat this field as
* opaque.
@@ -16329,7 +17800,13 @@
#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_OFST 152
#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_LEN 8
#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_LO_OFST 152
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_LO_LEN 4
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_LO_LBN 1216
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_LO_WIDTH 32
#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_HI_OFST 156
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_HI_LEN 4
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_HI_LBN 1248
+#define MC_CMD_GET_CAPABILITIES_V10_OUT_TEST_RESERVED_HI_WIDTH 32
/* The minimum size (in table entries) of indirection table to be allocated
* from the pool for an RSS context. Note that the table size used must be a
* power of 2.
@@ -16386,6 +17863,7 @@
* Encapsulation for a v2 extended command
*/
#define MC_CMD_V2_EXTN 0x7f
+#define MC_CMD_V2_EXTN_MSGSET 0x7f
/* MC_CMD_V2_EXTN_IN msgrequest */
#define MC_CMD_V2_EXTN_IN_LEN 4
@@ -16417,6 +17895,7 @@
* Allocate a pacer bucket (for qau rp or a snapper test)
*/
#define MC_CMD_TCM_BUCKET_ALLOC 0xb2
+#define MC_CMD_TCM_BUCKET_ALLOC_MSGSET 0xb2
#undef MC_CMD_0xb2_PRIVILEGE_CTG
#define MC_CMD_0xb2_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16436,6 +17915,7 @@
* Free a pacer bucket
*/
#define MC_CMD_TCM_BUCKET_FREE 0xb3
+#define MC_CMD_TCM_BUCKET_FREE_MSGSET 0xb3
#undef MC_CMD_0xb3_PRIVILEGE_CTG
#define MC_CMD_0xb3_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16455,6 +17935,7 @@
* Initialise pacer bucket with a given rate
*/
#define MC_CMD_TCM_BUCKET_INIT 0xb4
+#define MC_CMD_TCM_BUCKET_INIT_MSGSET 0xb4
#undef MC_CMD_0xb4_PRIVILEGE_CTG
#define MC_CMD_0xb4_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16489,6 +17970,7 @@
* Initialise txq in pacer with given options or set options
*/
#define MC_CMD_TCM_TXQ_INIT 0xb5
+#define MC_CMD_TCM_TXQ_INIT_MSGSET 0xb5
#undef MC_CMD_0xb5_PRIVILEGE_CTG
#define MC_CMD_0xb5_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16579,6 +18061,7 @@
* Link a push I/O buffer to a TxQ
*/
#define MC_CMD_LINK_PIOBUF 0x92
+#define MC_CMD_LINK_PIOBUF_MSGSET 0x92
#undef MC_CMD_0x92_PRIVILEGE_CTG
#define MC_CMD_0x92_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -16588,7 +18071,7 @@
/* Handle for allocated push I/O buffer. */
#define MC_CMD_LINK_PIOBUF_IN_PIOBUF_HANDLE_OFST 0
#define MC_CMD_LINK_PIOBUF_IN_PIOBUF_HANDLE_LEN 4
-/* Function Local Instance (VI) number. */
+/* Function Local Instance (VI) number which has a TxQ allocated to it. */
#define MC_CMD_LINK_PIOBUF_IN_TXQ_INSTANCE_OFST 4
#define MC_CMD_LINK_PIOBUF_IN_TXQ_INSTANCE_LEN 4
@@ -16601,6 +18084,7 @@
* Unlink a push I/O buffer from a TxQ
*/
#define MC_CMD_UNLINK_PIOBUF 0x93
+#define MC_CMD_UNLINK_PIOBUF_MSGSET 0x93
#undef MC_CMD_0x93_PRIVILEGE_CTG
#define MC_CMD_0x93_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -16620,6 +18104,7 @@
* allocate and initialise a v-switch.
*/
#define MC_CMD_VSWITCH_ALLOC 0x94
+#define MC_CMD_VSWITCH_ALLOC_MSGSET 0x94
#undef MC_CMD_0x94_PRIVILEGE_CTG
#define MC_CMD_0x94_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16667,6 +18152,7 @@
* de-allocate a v-switch.
*/
#define MC_CMD_VSWITCH_FREE 0x95
+#define MC_CMD_VSWITCH_FREE_MSGSET 0x95
#undef MC_CMD_0x95_PRIVILEGE_CTG
#define MC_CMD_0x95_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16688,6 +18174,7 @@
* not, then the command returns ENOENT).
*/
#define MC_CMD_VSWITCH_QUERY 0x63
+#define MC_CMD_VSWITCH_QUERY_MSGSET 0x63
#undef MC_CMD_0x63_PRIVILEGE_CTG
#define MC_CMD_0x63_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16707,6 +18194,7 @@
* allocate a v-port.
*/
#define MC_CMD_VPORT_ALLOC 0x96
+#define MC_CMD_VPORT_ALLOC_MSGSET 0x96
#undef MC_CMD_0x96_PRIVILEGE_CTG
#define MC_CMD_0x96_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16774,6 +18262,7 @@
* de-allocate a v-port.
*/
#define MC_CMD_VPORT_FREE 0x97
+#define MC_CMD_VPORT_FREE_MSGSET 0x97
#undef MC_CMD_0x97_PRIVILEGE_CTG
#define MC_CMD_0x97_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16793,6 +18282,7 @@
* allocate a v-adaptor.
*/
#define MC_CMD_VADAPTOR_ALLOC 0x98
+#define MC_CMD_VADAPTOR_ALLOC_MSGSET 0x98
#undef MC_CMD_0x98_PRIVILEGE_CTG
#define MC_CMD_0x98_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16841,6 +18331,7 @@
* de-allocate a v-adaptor.
*/
#define MC_CMD_VADAPTOR_FREE 0x99
+#define MC_CMD_VADAPTOR_FREE_MSGSET 0x99
#undef MC_CMD_0x99_PRIVILEGE_CTG
#define MC_CMD_0x99_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16860,6 +18351,7 @@
* assign a new MAC address to a v-adaptor.
*/
#define MC_CMD_VADAPTOR_SET_MAC 0x5d
+#define MC_CMD_VADAPTOR_SET_MAC_MSGSET 0x5d
#undef MC_CMD_0x5d_PRIVILEGE_CTG
#define MC_CMD_0x5d_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16882,6 +18374,7 @@
* read the MAC address assigned to a v-adaptor.
*/
#define MC_CMD_VADAPTOR_GET_MAC 0x5e
+#define MC_CMD_VADAPTOR_GET_MAC_MSGSET 0x5e
#undef MC_CMD_0x5e_PRIVILEGE_CTG
#define MC_CMD_0x5e_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16904,6 +18397,7 @@
* read some config of v-adaptor.
*/
#define MC_CMD_VADAPTOR_QUERY 0x61
+#define MC_CMD_VADAPTOR_QUERY_MSGSET 0x61
#undef MC_CMD_0x61_PRIVILEGE_CTG
#define MC_CMD_0x61_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16932,6 +18426,7 @@
* assign a port to a PCI function.
*/
#define MC_CMD_EVB_PORT_ASSIGN 0x9a
+#define MC_CMD_EVB_PORT_ASSIGN_MSGSET 0x9a
#undef MC_CMD_0x9a_PRIVILEGE_CTG
#define MC_CMD_0x9a_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -16960,6 +18455,7 @@
* Assign the 64 bit region addresses.
*/
#define MC_CMD_RDWR_A64_REGIONS 0x9b
+#define MC_CMD_RDWR_A64_REGIONS_MSGSET 0x9b
#undef MC_CMD_0x9b_PRIVILEGE_CTG
#define MC_CMD_0x9b_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -16999,6 +18495,7 @@
* Allocate an Onload stack ID.
*/
#define MC_CMD_ONLOAD_STACK_ALLOC 0x9c
+#define MC_CMD_ONLOAD_STACK_ALLOC_MSGSET 0x9c
#undef MC_CMD_0x9c_PRIVILEGE_CTG
#define MC_CMD_0x9c_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -17021,6 +18518,7 @@
* Free an Onload stack ID.
*/
#define MC_CMD_ONLOAD_STACK_FREE 0x9d
+#define MC_CMD_ONLOAD_STACK_FREE_MSGSET 0x9d
#undef MC_CMD_0x9d_PRIVILEGE_CTG
#define MC_CMD_0x9d_PRIVILEGE_CTG SRIOV_CTG_ONLOAD
@@ -17040,6 +18538,7 @@
* Allocate an RSS context.
*/
#define MC_CMD_RSS_CONTEXT_ALLOC 0x9e
+#define MC_CMD_RSS_CONTEXT_ALLOC_MSGSET 0x9e
#undef MC_CMD_0x9e_PRIVILEGE_CTG
#define MC_CMD_0x9e_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17140,6 +18639,7 @@
* Free an RSS context.
*/
#define MC_CMD_RSS_CONTEXT_FREE 0x9f
+#define MC_CMD_RSS_CONTEXT_FREE_MSGSET 0x9f
#undef MC_CMD_0x9f_PRIVILEGE_CTG
#define MC_CMD_0x9f_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17159,6 +18659,7 @@
* Set the Toeplitz hash key for an RSS context.
*/
#define MC_CMD_RSS_CONTEXT_SET_KEY 0xa0
+#define MC_CMD_RSS_CONTEXT_SET_KEY_MSGSET 0xa0
#undef MC_CMD_0xa0_PRIVILEGE_CTG
#define MC_CMD_0xa0_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17181,6 +18682,7 @@
* Get the Toeplitz hash key for an RSS context.
*/
#define MC_CMD_RSS_CONTEXT_GET_KEY 0xa1
+#define MC_CMD_RSS_CONTEXT_GET_KEY_MSGSET 0xa1
#undef MC_CMD_0xa1_PRIVILEGE_CTG
#define MC_CMD_0xa1_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17205,6 +18707,7 @@
* when the RSS context is allocated without specifying a table size.
*/
#define MC_CMD_RSS_CONTEXT_SET_TABLE 0xa2
+#define MC_CMD_RSS_CONTEXT_SET_TABLE_MSGSET 0xa2
#undef MC_CMD_0xa2_PRIVILEGE_CTG
#define MC_CMD_0xa2_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17229,6 +18732,7 @@
* when the RSS context is allocated without specifying a table size.
*/
#define MC_CMD_RSS_CONTEXT_GET_TABLE 0xa3
+#define MC_CMD_RSS_CONTEXT_GET_TABLE_MSGSET 0xa3
#undef MC_CMD_0xa3_PRIVILEGE_CTG
#define MC_CMD_0xa3_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17253,6 +18757,7 @@
* RSS_SELECTABLE_TABLE_SIZE bit is set in MC_CMD_GET_CAPABILITIES.
*/
#define MC_CMD_RSS_CONTEXT_WRITE_TABLE 0x13e
+#define MC_CMD_RSS_CONTEXT_WRITE_TABLE_MSGSET 0x13e
#undef MC_CMD_0x13e_PRIVILEGE_CTG
#define MC_CMD_0x13e_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17299,6 +18804,7 @@
* RSS_SELECTABLE_TABLE_SIZE bit is set in MC_CMD_GET_CAPABILITIES.
*/
#define MC_CMD_RSS_CONTEXT_READ_TABLE 0x13f
+#define MC_CMD_RSS_CONTEXT_READ_TABLE_MSGSET 0x13f
#undef MC_CMD_0x13f_PRIVILEGE_CTG
#define MC_CMD_0x13f_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17338,6 +18844,7 @@
* Set various control flags for an RSS context.
*/
#define MC_CMD_RSS_CONTEXT_SET_FLAGS 0xe1
+#define MC_CMD_RSS_CONTEXT_SET_FLAGS_MSGSET 0xe1
#undef MC_CMD_0xe1_PRIVILEGE_CTG
#define MC_CMD_0xe1_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17404,6 +18911,7 @@
* Get various control flags for an RSS context.
*/
#define MC_CMD_RSS_CONTEXT_GET_FLAGS 0xe2
+#define MC_CMD_RSS_CONTEXT_GET_FLAGS_MSGSET 0xe2
#undef MC_CMD_0xe2_PRIVILEGE_CTG
#define MC_CMD_0xe2_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17471,6 +18979,7 @@
* Allocate a .1p mapping.
*/
#define MC_CMD_DOT1P_MAPPING_ALLOC 0xa4
+#define MC_CMD_DOT1P_MAPPING_ALLOC_MSGSET 0xa4
#undef MC_CMD_0xa4_PRIVILEGE_CTG
#define MC_CMD_0xa4_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -17504,6 +19013,7 @@
* Free a .1p mapping.
*/
#define MC_CMD_DOT1P_MAPPING_FREE 0xa5
+#define MC_CMD_DOT1P_MAPPING_FREE_MSGSET 0xa5
#undef MC_CMD_0xa5_PRIVILEGE_CTG
#define MC_CMD_0xa5_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -17523,6 +19033,7 @@
* Set the mapping table for a .1p mapping.
*/
#define MC_CMD_DOT1P_MAPPING_SET_TABLE 0xa6
+#define MC_CMD_DOT1P_MAPPING_SET_TABLE_MSGSET 0xa6
#undef MC_CMD_0xa6_PRIVILEGE_CTG
#define MC_CMD_0xa6_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -17547,6 +19058,7 @@
* Get the mapping table for a .1p mapping.
*/
#define MC_CMD_DOT1P_MAPPING_GET_TABLE 0xa7
+#define MC_CMD_DOT1P_MAPPING_GET_TABLE_MSGSET 0xa7
#undef MC_CMD_0xa7_PRIVILEGE_CTG
#define MC_CMD_0xa7_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -17571,6 +19083,7 @@
* Get Interrupt Vector config for this PF.
*/
#define MC_CMD_GET_VECTOR_CFG 0xbf
+#define MC_CMD_GET_VECTOR_CFG_MSGSET 0xbf
#undef MC_CMD_0xbf_PRIVILEGE_CTG
#define MC_CMD_0xbf_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17596,6 +19109,7 @@
* Set Interrupt Vector config for this PF.
*/
#define MC_CMD_SET_VECTOR_CFG 0xc0
+#define MC_CMD_SET_VECTOR_CFG_MSGSET 0xc0
#undef MC_CMD_0xc0_PRIVILEGE_CTG
#define MC_CMD_0xc0_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17623,6 +19137,7 @@
* Add a MAC address to a v-port
*/
#define MC_CMD_VPORT_ADD_MAC_ADDRESS 0xa8
+#define MC_CMD_VPORT_ADD_MAC_ADDRESS_MSGSET 0xa8
#undef MC_CMD_0xa8_PRIVILEGE_CTG
#define MC_CMD_0xa8_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17645,6 +19160,7 @@
* Delete a MAC address from a v-port
*/
#define MC_CMD_VPORT_DEL_MAC_ADDRESS 0xa9
+#define MC_CMD_VPORT_DEL_MAC_ADDRESS_MSGSET 0xa9
#undef MC_CMD_0xa9_PRIVILEGE_CTG
#define MC_CMD_0xa9_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17667,6 +19183,7 @@
* Delete a MAC address from a v-port
*/
#define MC_CMD_VPORT_GET_MAC_ADDRESSES 0xaa
+#define MC_CMD_VPORT_GET_MAC_ADDRESSES_MSGSET 0xaa
#undef MC_CMD_0xaa_PRIVILEGE_CTG
#define MC_CMD_0xaa_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17701,6 +19218,7 @@
* function will be reset before applying the changes.
*/
#define MC_CMD_VPORT_RECONFIGURE 0xeb
+#define MC_CMD_VPORT_RECONFIGURE_MSGSET 0xeb
#undef MC_CMD_0xeb_PRIVILEGE_CTG
#define MC_CMD_0xeb_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17756,6 +19274,7 @@
* read some config of v-port.
*/
#define MC_CMD_EVB_PORT_QUERY 0x62
+#define MC_CMD_EVB_PORT_QUERY_MSGSET 0x62
#undef MC_CMD_0x62_PRIVILEGE_CTG
#define MC_CMD_0x62_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17786,6 +19305,7 @@
* lifted in future.
*/
#define MC_CMD_DUMP_BUFTBL_ENTRIES 0xab
+#define MC_CMD_DUMP_BUFTBL_ENTRIES_MSGSET 0xab
#undef MC_CMD_0xab_PRIVILEGE_CTG
#define MC_CMD_0xab_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -17818,6 +19338,7 @@
* Set global RXDP configuration settings
*/
#define MC_CMD_SET_RXDP_CONFIG 0xc1
+#define MC_CMD_SET_RXDP_CONFIG_MSGSET 0xc1
#undef MC_CMD_0xc1_PRIVILEGE_CTG
#define MC_CMD_0xc1_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -17848,6 +19369,7 @@
* Get global RXDP configuration settings
*/
#define MC_CMD_GET_RXDP_CONFIG 0xc2
+#define MC_CMD_GET_RXDP_CONFIG_MSGSET 0xc2
#undef MC_CMD_0xc2_PRIVILEGE_CTG
#define MC_CMD_0xc2_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17874,6 +19396,7 @@
* Return the system and PDCPU clock frequencies.
*/
#define MC_CMD_GET_CLOCK 0xac
+#define MC_CMD_GET_CLOCK_MSGSET 0xac
#undef MC_CMD_0xac_PRIVILEGE_CTG
#define MC_CMD_0xac_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -17896,6 +19419,7 @@
* Control the system and DPCPU clock frequencies. Changes are lost reboot.
*/
#define MC_CMD_SET_CLOCK 0xad
+#define MC_CMD_SET_CLOCK_MSGSET 0xad
#undef MC_CMD_0xad_PRIVILEGE_CTG
#define MC_CMD_0xad_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -17982,6 +19506,7 @@
* Send an arbitrary DPCPU message.
*/
#define MC_CMD_DPCPU_RPC 0xae
+#define MC_CMD_DPCPU_RPC_MSGSET 0xae
#undef MC_CMD_0xae_PRIVILEGE_CTG
#define MC_CMD_0xae_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -18100,6 +19625,7 @@
* Trigger an interrupt by prodding the BIU.
*/
#define MC_CMD_TRIGGER_INTERRUPT 0xe3
+#define MC_CMD_TRIGGER_INTERRUPT_MSGSET 0xe3
#undef MC_CMD_0xe3_PRIVILEGE_CTG
#define MC_CMD_0xe3_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -18119,6 +19645,7 @@
* Special operations to support (for now) shmboot.
*/
#define MC_CMD_SHMBOOT_OP 0xe6
+#define MC_CMD_SHMBOOT_OP_MSGSET 0xe6
#undef MC_CMD_0xe6_PRIVILEGE_CTG
#define MC_CMD_0xe6_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -18140,6 +19667,7 @@
* Read multiple 64bit words from capture block memory
*/
#define MC_CMD_CAP_BLK_READ 0xe7
+#define MC_CMD_CAP_BLK_READ_MSGSET 0xe7
#undef MC_CMD_0xe7_PRIVILEGE_CTG
#define MC_CMD_0xe7_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -18162,7 +19690,13 @@
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_OFST 0
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_LEN 8
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_LO_OFST 0
+#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_LO_LEN 4
+#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_LO_LBN 0
+#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_LO_WIDTH 32
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_HI_OFST 4
+#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_HI_LEN 4
+#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_HI_LBN 32
+#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_HI_WIDTH 32
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_MINNUM 1
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_MAXNUM 31
#define MC_CMD_CAP_BLK_READ_OUT_BUFFER_MAXNUM_MCDI2 127
@@ -18173,6 +19707,7 @@
* Take a dump of the DUT state
*/
#define MC_CMD_DUMP_DO 0xe8
+#define MC_CMD_DUMP_DO_MSGSET 0xe8
#undef MC_CMD_0xe8_PRIVILEGE_CTG
#define MC_CMD_0xe8_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -18253,6 +19788,7 @@
* Configure unsolicited dumps
*/
#define MC_CMD_DUMP_CONFIGURE_UNSOLICITED 0xe9
+#define MC_CMD_DUMP_CONFIGURE_UNSOLICITED_MSGSET 0xe9
#undef MC_CMD_0xe9_PRIVILEGE_CTG
#define MC_CMD_0xe9_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -18322,6 +19858,7 @@
* the parameter is out of range.
*/
#define MC_CMD_SET_PSU 0xea
+#define MC_CMD_SET_PSU_MSGSET 0xea
#undef MC_CMD_0xea_PRIVILEGE_CTG
#define MC_CMD_0xea_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -18348,6 +19885,7 @@
* Get function information. PF and VF number.
*/
#define MC_CMD_GET_FUNCTION_INFO 0xec
+#define MC_CMD_GET_FUNCTION_INFO_MSGSET 0xec
#undef MC_CMD_0xec_PRIVILEGE_CTG
#define MC_CMD_0xec_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -18370,6 +19908,7 @@
* reboot.
*/
#define MC_CMD_ENABLE_OFFLINE_BIST 0xed
+#define MC_CMD_ENABLE_OFFLINE_BIST_MSGSET 0xed
#undef MC_CMD_0xed_PRIVILEGE_CTG
#define MC_CMD_0xed_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -18388,6 +19927,7 @@
* forget.
*/
#define MC_CMD_UART_SEND_DATA 0xee
+#define MC_CMD_UART_SEND_DATA_MSGSET 0xee
#undef MC_CMD_0xee_PRIVILEGE_CTG
#define MC_CMD_0xee_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -18426,6 +19966,7 @@
* subject to change and not currently implemented.
*/
#define MC_CMD_UART_RECV_DATA 0xef
+#define MC_CMD_UART_RECV_DATA_MSGSET 0xef
#undef MC_CMD_0xef_PRIVILEGE_CTG
#define MC_CMD_0xef_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -18475,6 +20016,7 @@
* Read data programmed into the device One-Time-Programmable (OTP) Fuses
*/
#define MC_CMD_READ_FUSES 0xf0
+#define MC_CMD_READ_FUSES_MSGSET 0xf0
#undef MC_CMD_0xf0_PRIVILEGE_CTG
#define MC_CMD_0xf0_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -18510,6 +20052,7 @@
* Get or set KR Serdes RXEQ and TX Driver settings
*/
#define MC_CMD_KR_TUNE 0xf1
+#define MC_CMD_KR_TUNE_MSGSET 0xf1
#undef MC_CMD_0xf1_PRIVILEGE_CTG
#define MC_CMD_0xf1_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -19066,6 +20609,7 @@
* Get or set PCIE Serdes RXEQ and TX Driver settings
*/
#define MC_CMD_PCIE_TUNE 0xf2
+#define MC_CMD_PCIE_TUNE_MSGSET 0xf2
#undef MC_CMD_0xf2_PRIVILEGE_CTG
#define MC_CMD_0xf2_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -19323,6 +20867,7 @@
* - not used for V3 licensing
*/
#define MC_CMD_LICENSING 0xf3
+#define MC_CMD_LICENSING_MSGSET 0xf3
#undef MC_CMD_0xf3_PRIVILEGE_CTG
#define MC_CMD_0xf3_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19379,6 +20924,7 @@
* - V3 licensing (Medford)
*/
#define MC_CMD_LICENSING_V3 0xd0
+#define MC_CMD_LICENSING_V3_MSGSET 0xd0
#undef MC_CMD_0xd0_PRIVILEGE_CTG
#define MC_CMD_0xd0_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19429,7 +20975,13 @@
#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_OFST 24
#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_LEN 8
#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_LO_OFST 24
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_LO_LEN 4
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_LO_LBN 192
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_LO_WIDTH 32
#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_HI_OFST 28
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_HI_LEN 4
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_HI_LBN 224
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_APPS_HI_WIDTH 32
/* reserved for future use */
#define MC_CMD_LICENSING_V3_OUT_RESERVED_0_OFST 32
#define MC_CMD_LICENSING_V3_OUT_RESERVED_0_LEN 24
@@ -19437,7 +20989,13 @@
#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_OFST 56
#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_LEN 8
#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_LO_OFST 56
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_LO_LEN 4
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_LO_LBN 448
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_LO_WIDTH 32
#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_HI_OFST 60
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_HI_LEN 4
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_HI_LBN 480
+#define MC_CMD_LICENSING_V3_OUT_LICENSED_FEATURES_HI_WIDTH 32
/* reserved for future use */
#define MC_CMD_LICENSING_V3_OUT_RESERVED_1_OFST 64
#define MC_CMD_LICENSING_V3_OUT_RESERVED_1_LEN 24
@@ -19449,6 +21007,7 @@
* partition - V3 licensing (Medford)
*/
#define MC_CMD_LICENSING_GET_ID_V3 0xd1
+#define MC_CMD_LICENSING_GET_ID_V3_MSGSET 0xd1
#undef MC_CMD_0xd1_PRIVILEGE_CTG
#define MC_CMD_0xd1_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19482,6 +21041,7 @@
* This will fail on a single-core system.
*/
#define MC_CMD_MC2MC_PROXY 0xf4
+#define MC_CMD_MC2MC_PROXY_MSGSET 0xf4
#undef MC_CMD_0xf4_PRIVILEGE_CTG
#define MC_CMD_0xf4_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19500,6 +21060,7 @@
* or a reboot of the MC.) Not used for V3 licensing
*/
#define MC_CMD_GET_LICENSED_APP_STATE 0xf5
+#define MC_CMD_GET_LICENSED_APP_STATE_MSGSET 0xf5
#undef MC_CMD_0xf5_PRIVILEGE_CTG
#define MC_CMD_0xf5_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19528,6 +21089,7 @@
* operation or a reboot of the MC.) Used for V3 licensing (Medford)
*/
#define MC_CMD_GET_LICENSED_V3_APP_STATE 0xd2
+#define MC_CMD_GET_LICENSED_V3_APP_STATE_MSGSET 0xd2
#undef MC_CMD_0xd2_PRIVILEGE_CTG
#define MC_CMD_0xd2_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19540,7 +21102,13 @@
#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_OFST 0
#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_LEN 8
#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_LO_OFST 0
+#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_LO_LEN 4
+#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_LO_LBN 0
+#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_LO_WIDTH 32
#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_HI_OFST 4
+#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_HI_LEN 4
+#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_HI_LBN 32
+#define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_HI_WIDTH 32
/* MC_CMD_GET_LICENSED_V3_APP_STATE_OUT msgresponse */
#define MC_CMD_GET_LICENSED_V3_APP_STATE_OUT_LEN 4
@@ -19560,6 +21128,7 @@
* operation or a reboot of the MC.) Used for V3 licensing (Medford)
*/
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES 0xd3
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_MSGSET 0xd3
#undef MC_CMD_0xd3_PRIVILEGE_CTG
#define MC_CMD_0xd3_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19572,7 +21141,13 @@
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_OFST 0
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_LEN 8
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_LO_OFST 0
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_LO_LEN 4
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_LO_LBN 0
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_LO_WIDTH 32
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_HI_OFST 4
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_HI_LEN 4
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_HI_LBN 32
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_HI_WIDTH 32
/* MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT msgresponse */
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_LEN 8
@@ -19580,7 +21155,13 @@
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_OFST 0
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_LEN 8
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_LO_OFST 0
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_LO_LEN 4
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_LO_LBN 0
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_LO_WIDTH 32
#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_HI_OFST 4
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_HI_LEN 4
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_HI_LBN 32
+#define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_HI_WIDTH 32
/***********************************/
@@ -19589,6 +21170,7 @@
* licensing.
*/
#define MC_CMD_LICENSED_APP_OP 0xf6
+#define MC_CMD_LICENSED_APP_OP_MSGSET 0xf6
#undef MC_CMD_0xf6_PRIVILEGE_CTG
#define MC_CMD_0xf6_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19672,6 +21254,7 @@
* (Medford)
*/
#define MC_CMD_LICENSED_V3_VALIDATE_APP 0xd4
+#define MC_CMD_LICENSED_V3_VALIDATE_APP_MSGSET 0xd4
#undef MC_CMD_0xd4_PRIVILEGE_CTG
#define MC_CMD_0xd4_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19685,7 +21268,13 @@
#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_OFST 48
#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_LEN 8
#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_LO_OFST 48
+#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_LO_LEN 4
+#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_LO_LBN 384
+#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_LO_WIDTH 32
#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_HI_OFST 52
+#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_HI_LEN 4
+#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_HI_LBN 416
+#define MC_CMD_LICENSED_V3_VALIDATE_APP_IN_APP_ID_HI_WIDTH 32
/* MC_CMD_LICENSED_V3_VALIDATE_APP_OUT msgresponse */
#define MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_LEN 116
@@ -19725,6 +21314,7 @@
* Mask features - V3 licensing (Medford)
*/
#define MC_CMD_LICENSED_V3_MASK_FEATURES 0xd5
+#define MC_CMD_LICENSED_V3_MASK_FEATURES_MSGSET 0xd5
#undef MC_CMD_0xd5_PRIVILEGE_CTG
#define MC_CMD_0xd5_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -19735,7 +21325,13 @@
#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_OFST 0
#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_LEN 8
#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_LO_OFST 0
+#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_LO_LEN 4
+#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_LO_LBN 0
+#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_LO_WIDTH 32
#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_HI_OFST 4
+#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_HI_LEN 4
+#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_HI_LBN 32
+#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_HI_WIDTH 32
/* whether to turn on or turn off the masked features */
#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_FLAG_OFST 8
#define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_FLAG_LEN 4
@@ -19757,6 +21353,7 @@
* erased when the adapter is power cycled
*/
#define MC_CMD_LICENSING_V3_TEMPORARY 0xd6
+#define MC_CMD_LICENSING_V3_TEMPORARY_MSGSET 0xd6
#undef MC_CMD_0xd6_PRIVILEGE_CTG
#define MC_CMD_0xd6_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -19815,7 +21412,13 @@
#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_OFST 4
#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_LEN 8
#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_LO_OFST 4
+#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_LO_LEN 4
+#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_LO_LBN 32
+#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_LO_WIDTH 32
#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_HI_OFST 8
+#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_HI_LEN 4
+#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_HI_LBN 64
+#define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_HI_WIDTH 32
/***********************************/
@@ -19827,6 +21430,7 @@
* delivered to a specific queue, or a set of queues with RSS.
*/
#define MC_CMD_SET_PORT_SNIFF_CONFIG 0xf7
+#define MC_CMD_SET_PORT_SNIFF_CONFIG_MSGSET 0xf7
#undef MC_CMD_0xf7_PRIVILEGE_CTG
#define MC_CMD_0xf7_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -19870,6 +21474,7 @@
* the configuration.
*/
#define MC_CMD_GET_PORT_SNIFF_CONFIG 0xf8
+#define MC_CMD_GET_PORT_SNIFF_CONFIG_MSGSET 0xf8
#undef MC_CMD_0xf8_PRIVILEGE_CTG
#define MC_CMD_0xf8_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19908,6 +21513,7 @@
* Change configuration related to the parser-dispatcher subsystem.
*/
#define MC_CMD_SET_PARSER_DISP_CONFIG 0xf9
+#define MC_CMD_SET_PARSER_DISP_CONFIG_MSGSET 0xf9
#undef MC_CMD_0xf9_PRIVILEGE_CTG
#define MC_CMD_0xf9_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19953,6 +21559,7 @@
* Read configuration related to the parser-dispatcher subsystem.
*/
#define MC_CMD_GET_PARSER_DISP_CONFIG 0xfa
+#define MC_CMD_GET_PARSER_DISP_CONFIG_MSGSET 0xfa
#undef MC_CMD_0xfa_PRIVILEGE_CTG
#define MC_CMD_0xfa_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -19997,6 +21604,7 @@
* dedicated as TX sniff receivers.
*/
#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG 0xfb
+#define MC_CMD_SET_TX_PORT_SNIFF_CONFIG_MSGSET 0xfb
#undef MC_CMD_0xfb_PRIVILEGE_CTG
#define MC_CMD_0xfb_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -20037,6 +21645,7 @@
* the configuration.
*/
#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG 0xfc
+#define MC_CMD_GET_TX_PORT_SNIFF_CONFIG_MSGSET 0xfc
#undef MC_CMD_0xfc_PRIVILEGE_CTG
#define MC_CMD_0xfc_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -20072,6 +21681,7 @@
* Per queue rx error stats.
*/
#define MC_CMD_RMON_STATS_RX_ERRORS 0xfe
+#define MC_CMD_RMON_STATS_RX_ERRORS_MSGSET 0xfe
#undef MC_CMD_0xfe_PRIVILEGE_CTG
#define MC_CMD_0xfe_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -20104,6 +21714,7 @@
* Find out about available PCIE resources
*/
#define MC_CMD_GET_PCIE_RESOURCE_INFO 0xfd
+#define MC_CMD_GET_PCIE_RESOURCE_INFO_MSGSET 0xfd
#undef MC_CMD_0xfd_PRIVILEGE_CTG
#define MC_CMD_0xfd_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -20143,6 +21754,7 @@
* Find out about available port modes
*/
#define MC_CMD_GET_PORT_MODES 0xff
+#define MC_CMD_GET_PORT_MODES_MSGSET 0xff
#undef MC_CMD_0xff_PRIVILEGE_CTG
#define MC_CMD_0xff_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -20199,6 +21811,7 @@
* the new port mode, as the override does not affect PF configuration.
*/
#define MC_CMD_OVERRIDE_PORT_MODE 0x137
+#define MC_CMD_OVERRIDE_PORT_MODE_MSGSET 0x137
#undef MC_CMD_0x137_PRIVILEGE_CTG
#define MC_CMD_0x137_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -20223,6 +21836,7 @@
* Sample voltages on the ATB
*/
#define MC_CMD_READ_ATB 0x100
+#define MC_CMD_READ_ATB_MSGSET 0x100
#undef MC_CMD_0x100_PRIVILEGE_CTG
#define MC_CMD_0x100_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20253,6 +21867,7 @@
* enums here must correspond with those in MC_CMD_WORKAROUND.
*/
#define MC_CMD_GET_WORKAROUNDS 0x59
+#define MC_CMD_GET_WORKAROUNDS_MSGSET 0x59
#undef MC_CMD_0x59_PRIVILEGE_CTG
#define MC_CMD_0x59_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -20290,6 +21905,7 @@
* Read/set privileges of an arbitrary PCIe function
*/
#define MC_CMD_PRIVILEGE_MASK 0x5a
+#define MC_CMD_PRIVILEGE_MASK_MSGSET 0x5a
#undef MC_CMD_0x5a_PRIVILEGE_CTG
#define MC_CMD_0x5a_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -20351,6 +21967,20 @@
#define MC_CMD_PRIVILEGE_MASK_IN_GRP_ADMIN_TSA_UNBOUND 0x8000
/* enum: Control the Match-Action Engine if present. See mcdi_mae.yml. */
#define MC_CMD_PRIVILEGE_MASK_IN_GRP_MAE 0x10000
+/* enum: This Function/client may call MC_CMD_CLIENT_ALLOC to create new
+ * dynamic client children of itself.
+ */
+#define MC_CMD_PRIVILEGE_MASK_IN_GRP_ALLOC_CLIENT 0x20000
+/* enum: A dynamic client with this privilege may perform all the same DMA
+ * operations as the function client from which it is descended.
+ */
+#define MC_CMD_PRIVILEGE_MASK_IN_GRP_FUNC_DMA 0x40000
+/* enum: A client with this privilege may perform DMA as any PCIe function on
+ * the device and to on-device DDR. It allows clients to use TX-DESC2CMPT-DESC
+ * descriptors, and to use TX-SEG-DESC and TX-MEM2MEM-DESC with an address
+ * space override (i.e. with the ADDR_SPC_EN bit set).
+ */
+#define MC_CMD_PRIVILEGE_MASK_IN_GRP_ARBITRARY_DMA 0x80000
/* enum: Set this bit to indicate that a new privilege mask is to be set,
* otherwise the command will only read the existing mask.
*/
@@ -20368,6 +21998,7 @@
* Read/set link state mode of a VF
*/
#define MC_CMD_LINK_STATE_MODE 0x5c
+#define MC_CMD_LINK_STATE_MODE_MSGSET 0x5c
#undef MC_CMD_0x5c_PRIVILEGE_CTG
#define MC_CMD_0x5c_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -20407,6 +22038,7 @@
* parameter to MC_CMD_INIT_RXQ.
*/
#define MC_CMD_GET_SNAPSHOT_LENGTH 0x101
+#define MC_CMD_GET_SNAPSHOT_LENGTH_MSGSET 0x101
#undef MC_CMD_0x101_PRIVILEGE_CTG
#define MC_CMD_0x101_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -20429,6 +22061,7 @@
* Additional fuse diagnostics
*/
#define MC_CMD_FUSE_DIAGS 0x102
+#define MC_CMD_FUSE_DIAGS_MSGSET 0x102
#undef MC_CMD_0x102_PRIVILEGE_CTG
#define MC_CMD_0x102_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20483,6 +22116,7 @@
* included in one of the masks provided.
*/
#define MC_CMD_PRIVILEGE_MODIFY 0x60
+#define MC_CMD_PRIVILEGE_MODIFY_MSGSET 0x60
#undef MC_CMD_0x60_PRIVILEGE_CTG
#define MC_CMD_0x60_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -20527,6 +22161,7 @@
* Read XPM memory
*/
#define MC_CMD_XPM_READ_BYTES 0x103
+#define MC_CMD_XPM_READ_BYTES_MSGSET 0x103
#undef MC_CMD_0x103_PRIVILEGE_CTG
#define MC_CMD_0x103_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -20559,6 +22194,7 @@
* Write XPM memory
*/
#define MC_CMD_XPM_WRITE_BYTES 0x104
+#define MC_CMD_XPM_WRITE_BYTES_MSGSET 0x104
#undef MC_CMD_0x104_PRIVILEGE_CTG
#define MC_CMD_0x104_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20591,6 +22227,7 @@
* Read XPM sector
*/
#define MC_CMD_XPM_READ_SECTOR 0x105
+#define MC_CMD_XPM_READ_SECTOR_MSGSET 0x105
#undef MC_CMD_0x105_PRIVILEGE_CTG
#define MC_CMD_0x105_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20631,6 +22268,7 @@
* Write XPM sector
*/
#define MC_CMD_XPM_WRITE_SECTOR 0x106
+#define MC_CMD_XPM_WRITE_SECTOR_MSGSET 0x106
#undef MC_CMD_0x106_PRIVILEGE_CTG
#define MC_CMD_0x106_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20677,6 +22315,7 @@
* Invalidate XPM sector
*/
#define MC_CMD_XPM_INVALIDATE_SECTOR 0x107
+#define MC_CMD_XPM_INVALIDATE_SECTOR_MSGSET 0x107
#undef MC_CMD_0x107_PRIVILEGE_CTG
#define MC_CMD_0x107_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20696,6 +22335,7 @@
* Blank-check XPM memory and report bad locations
*/
#define MC_CMD_XPM_BLANK_CHECK 0x108
+#define MC_CMD_XPM_BLANK_CHECK_MSGSET 0x108
#undef MC_CMD_0x108_PRIVILEGE_CTG
#define MC_CMD_0x108_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20733,6 +22373,7 @@
* Blank-check and repair XPM memory
*/
#define MC_CMD_XPM_REPAIR 0x109
+#define MC_CMD_XPM_REPAIR_MSGSET 0x109
#undef MC_CMD_0x109_PRIVILEGE_CTG
#define MC_CMD_0x109_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20756,6 +22397,7 @@
* be performed on an unprogrammed part.
*/
#define MC_CMD_XPM_DECODER_TEST 0x10a
+#define MC_CMD_XPM_DECODER_TEST_MSGSET 0x10a
#undef MC_CMD_0x10a_PRIVILEGE_CTG
#define MC_CMD_0x10a_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20776,6 +22418,7 @@
* first available location to use, or fail with ENOSPC if none left.
*/
#define MC_CMD_XPM_WRITE_TEST 0x10b
+#define MC_CMD_XPM_WRITE_TEST_MSGSET 0x10b
#undef MC_CMD_0x10b_PRIVILEGE_CTG
#define MC_CMD_0x10b_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -20797,6 +22440,7 @@
* does match, otherwise it will respond with success before it jumps to IMEM.
*/
#define MC_CMD_EXEC_SIGNED 0x10c
+#define MC_CMD_EXEC_SIGNED_MSGSET 0x10c
#undef MC_CMD_0x10c_PRIVILEGE_CTG
#define MC_CMD_0x10c_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -20827,6 +22471,7 @@
* MC_CMD_EXEC_SIGNED.
*/
#define MC_CMD_PREPARE_SIGNED 0x10d
+#define MC_CMD_PREPARE_SIGNED_MSGSET 0x10d
#undef MC_CMD_0x10d_PRIVILEGE_CTG
#define MC_CMD_0x10d_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -20850,6 +22495,7 @@
* will be removed once it is regarded as stable.
*/
#define MC_CMD_SET_SECURITY_RULE 0x10f
+#define MC_CMD_SET_SECURITY_RULE_MSGSET 0x10f
#undef MC_CMD_0x10f_PRIVILEGE_CTG
#define MC_CMD_0x10f_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -21040,6 +22686,7 @@
* development. This note will be removed once it is regarded as stable.
*/
#define MC_CMD_RESET_SECURITY_RULES 0x110
+#define MC_CMD_RESET_SECURITY_RULES_MSGSET 0x110
#undef MC_CMD_0x110_PRIVILEGE_CTG
#define MC_CMD_0x110_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -21066,6 +22713,7 @@
* will be removed once it is regarded as stable.
*/
#define MC_CMD_GET_SECURITY_RULESET_VERSION 0x111
+#define MC_CMD_GET_SECURITY_RULESET_VERSION_MSGSET 0x111
#undef MC_CMD_0x111_PRIVILEGE_CTG
#define MC_CMD_0x111_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -21096,6 +22744,7 @@
* removed once it is regarded as stable.
*/
#define MC_CMD_SECURITY_RULE_COUNTER_ALLOC 0x112
+#define MC_CMD_SECURITY_RULE_COUNTER_ALLOC_MSGSET 0x112
#undef MC_CMD_0x112_PRIVILEGE_CTG
#define MC_CMD_0x112_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -21134,6 +22783,7 @@
* removed once it is regarded as stable.
*/
#define MC_CMD_SECURITY_RULE_COUNTER_FREE 0x113
+#define MC_CMD_SECURITY_RULE_COUNTER_FREE_MSGSET 0x113
#undef MC_CMD_0x113_PRIVILEGE_CTG
#define MC_CMD_0x113_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -21169,6 +22819,7 @@
* will be removed once it is regarded as stable.
*/
#define MC_CMD_SUBNET_MAP_SET_NODE 0x114
+#define MC_CMD_SUBNET_MAP_SET_NODE_MSGSET 0x114
#undef MC_CMD_0x114_PRIVILEGE_CTG
#define MC_CMD_0x114_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -21224,6 +22875,7 @@
* will be removed once it is regarded as stable.
*/
#define MC_CMD_REMOTE_PORTRANGE_MAP_SET_TREE 0x115
+#define MC_CMD_REMOTE_PORTRANGE_MAP_SET_TREE_MSGSET 0x115
#undef MC_CMD_0x115_PRIVILEGE_CTG
#define MC_CMD_0x115_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -21258,6 +22910,7 @@
* will be removed once it is regarded as stable.
*/
#define MC_CMD_LOCAL_PORTRANGE_MAP_SET_TREE 0x116
+#define MC_CMD_LOCAL_PORTRANGE_MAP_SET_TREE_MSGSET 0x116
#undef MC_CMD_0x116_PRIVILEGE_CTG
#define MC_CMD_0x116_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -21311,6 +22964,7 @@
* cause all functions to see a reset. (Available on Medford only.)
*/
#define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS 0x117
+#define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_MSGSET 0x117
#undef MC_CMD_0x117_PRIVILEGE_CTG
#define MC_CMD_0x117_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -21357,6 +23011,7 @@
* priority.
*/
#define MC_CMD_RX_BALANCING 0x118
+#define MC_CMD_RX_BALANCING_MSGSET 0x118
#undef MC_CMD_0x118_PRIVILEGE_CTG
#define MC_CMD_0x118_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -21386,6 +23041,7 @@
* info in respect to the binding protocol.
*/
#define MC_CMD_TSA_BIND 0x119
+#define MC_CMD_TSA_BIND_MSGSET 0x119
#undef MC_CMD_0x119_PRIVILEGE_CTG
#define MC_CMD_0x119_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -21951,6 +23607,7 @@
* OP_GET_CACHED_VERSION. All other sub-operations are prohibited.
*/
#define MC_CMD_MANAGE_SECURITY_RULESET_CACHE 0x11a
+#define MC_CMD_MANAGE_SECURITY_RULESET_CACHE_MSGSET 0x11a
#undef MC_CMD_0x11a_PRIVILEGE_CTG
#define MC_CMD_0x11a_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -22007,6 +23664,7 @@
* if the tag is already present.
*/
#define MC_CMD_NVRAM_PRIVATE_APPEND 0x11c
+#define MC_CMD_NVRAM_PRIVATE_APPEND_MSGSET 0x11c
#undef MC_CMD_0x11c_PRIVILEGE_CTG
#define MC_CMD_0x11c_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -22041,6 +23699,7 @@
* correctly at ATE.
*/
#define MC_CMD_XPM_VERIFY_CONTENTS 0x11b
+#define MC_CMD_XPM_VERIFY_CONTENTS_MSGSET 0x11b
#undef MC_CMD_0x11b_PRIVILEGE_CTG
#define MC_CMD_0x11b_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -22084,6 +23743,7 @@
* and TMR_RELOAD_ACT_NS).
*/
#define MC_CMD_SET_EVQ_TMR 0x120
+#define MC_CMD_SET_EVQ_TMR_MSGSET 0x120
#undef MC_CMD_0x120_PRIVILEGE_CTG
#define MC_CMD_0x120_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -22122,6 +23782,7 @@
* Query properties about the event queue timers.
*/
#define MC_CMD_GET_EVQ_TMR_PROPERTIES 0x122
+#define MC_CMD_GET_EVQ_TMR_PROPERTIES_MSGSET 0x122
#undef MC_CMD_0x122_PRIVILEGE_CTG
#define MC_CMD_0x122_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -22191,6 +23852,7 @@
* non used switch buffers.
*/
#define MC_CMD_ALLOCATE_TX_VFIFO_CP 0x11d
+#define MC_CMD_ALLOCATE_TX_VFIFO_CP_MSGSET 0x11d
#undef MC_CMD_0x11d_PRIVILEGE_CTG
#define MC_CMD_0x11d_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -22198,7 +23860,8 @@
/* MC_CMD_ALLOCATE_TX_VFIFO_CP_IN msgrequest */
#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_LEN 20
/* Desired instance. Must be set to a specific instance, which is a function
- * local queue index.
+ * local queue index. The calling client must be the currently-assigned user of
+ * this VI (see MC_CMD_SET_VI_USER).
*/
#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_INSTANCE_OFST 0
#define MC_CMD_ALLOCATE_TX_VFIFO_CP_IN_INSTANCE_LEN 4
@@ -22243,6 +23906,7 @@
* previously allocated common pools.
*/
#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO 0x11e
+#define MC_CMD_ALLOCATE_TX_VFIFO_VFIFO_MSGSET 0x11e
#undef MC_CMD_0x11e_PRIVILEGE_CTG
#define MC_CMD_0x11e_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -22296,6 +23960,7 @@
* ready to be re-used.
*/
#define MC_CMD_TEARDOWN_TX_VFIFO_VF 0x11f
+#define MC_CMD_TEARDOWN_TX_VFIFO_VF_MSGSET 0x11f
#undef MC_CMD_0x11f_PRIVILEGE_CTG
#define MC_CMD_0x11f_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -22316,6 +23981,7 @@
* it ready to be re-used.
*/
#define MC_CMD_DEALLOCATE_TX_VFIFO_CP 0x121
+#define MC_CMD_DEALLOCATE_TX_VFIFO_CP_MSGSET 0x121
#undef MC_CMD_0x121_PRIVILEGE_CTG
#define MC_CMD_0x121_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -22344,6 +24010,7 @@
* or 0 if there has not been a previous rekey.
*/
#define MC_CMD_REKEY 0x123
+#define MC_CMD_REKEY_MSGSET 0x123
#undef MC_CMD_0x123_PRIVILEGE_CTG
#define MC_CMD_0x123_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -22368,6 +24035,7 @@
* not yet assigned.
*/
#define MC_CMD_SWITCH_GET_UNASSIGNED_BUFFERS 0x124
+#define MC_CMD_SWITCH_GET_UNASSIGNED_BUFFERS_MSGSET 0x124
#undef MC_CMD_0x124_PRIVILEGE_CTG
#define MC_CMD_0x124_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -22396,6 +24064,7 @@
* the required bits were not set.
*/
#define MC_CMD_SET_SECURITY_FUSES 0x126
+#define MC_CMD_SET_SECURITY_FUSES_MSGSET 0x126
#undef MC_CMD_0x126_PRIVILEGE_CTG
#define MC_CMD_0x126_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -22438,6 +24107,7 @@
* SF-117371-SW
*/
#define MC_CMD_TSA_INFO 0x127
+#define MC_CMD_TSA_INFO_MSGSET 0x127
#undef MC_CMD_0x127_PRIVILEGE_CTG
#define MC_CMD_0x127_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -22614,6 +24284,7 @@
* Doxbox reference SF-117371-SW
*/
#define MC_CMD_HOST_INFO 0x128
+#define MC_CMD_HOST_INFO_MSGSET 0x128
#undef MC_CMD_0x128_PRIVILEGE_CTG
#define MC_CMD_0x128_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -22681,6 +24352,7 @@
* section 'Adapter Information'
*/
#define MC_CMD_TSAN_INFO 0x129
+#define MC_CMD_TSAN_INFO_MSGSET 0x129
#undef MC_CMD_0x129_PRIVILEGE_CTG
#define MC_CMD_0x129_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -22780,6 +24452,7 @@
* TSA adapter statistics operations.
*/
#define MC_CMD_TSA_STATISTICS 0x130
+#define MC_CMD_TSA_STATISTICS_MSGSET 0x130
#undef MC_CMD_0x130_PRIVILEGE_CTG
#define MC_CMD_0x130_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -22884,14 +24557,26 @@
#define MC_TSA_STATISTICS_ENTRY_TX_STAT_OFST 0
#define MC_TSA_STATISTICS_ENTRY_TX_STAT_LEN 8
#define MC_TSA_STATISTICS_ENTRY_TX_STAT_LO_OFST 0
+#define MC_TSA_STATISTICS_ENTRY_TX_STAT_LO_LEN 4
+#define MC_TSA_STATISTICS_ENTRY_TX_STAT_LO_LBN 0
+#define MC_TSA_STATISTICS_ENTRY_TX_STAT_LO_WIDTH 32
#define MC_TSA_STATISTICS_ENTRY_TX_STAT_HI_OFST 4
+#define MC_TSA_STATISTICS_ENTRY_TX_STAT_HI_LEN 4
+#define MC_TSA_STATISTICS_ENTRY_TX_STAT_HI_LBN 32
+#define MC_TSA_STATISTICS_ENTRY_TX_STAT_HI_WIDTH 32
#define MC_TSA_STATISTICS_ENTRY_TX_STAT_LBN 0
#define MC_TSA_STATISTICS_ENTRY_TX_STAT_WIDTH 64
/* Rx statistics counter */
#define MC_TSA_STATISTICS_ENTRY_RX_STAT_OFST 8
#define MC_TSA_STATISTICS_ENTRY_RX_STAT_LEN 8
#define MC_TSA_STATISTICS_ENTRY_RX_STAT_LO_OFST 8
+#define MC_TSA_STATISTICS_ENTRY_RX_STAT_LO_LEN 4
+#define MC_TSA_STATISTICS_ENTRY_RX_STAT_LO_LBN 64
+#define MC_TSA_STATISTICS_ENTRY_RX_STAT_LO_WIDTH 32
#define MC_TSA_STATISTICS_ENTRY_RX_STAT_HI_OFST 12
+#define MC_TSA_STATISTICS_ENTRY_RX_STAT_HI_LEN 4
+#define MC_TSA_STATISTICS_ENTRY_RX_STAT_HI_LBN 96
+#define MC_TSA_STATISTICS_ENTRY_RX_STAT_HI_WIDTH 32
#define MC_TSA_STATISTICS_ENTRY_RX_STAT_LBN 64
#define MC_TSA_STATISTICS_ENTRY_RX_STAT_WIDTH 64
@@ -22904,6 +24589,7 @@
* installing TSA binding certificates. See SF-117631-TC.
*/
#define MC_CMD_ERASE_INITIAL_NIC_SECRET 0x131
+#define MC_CMD_ERASE_INITIAL_NIC_SECRET_MSGSET 0x131
#undef MC_CMD_0x131_PRIVILEGE_CTG
#define MC_CMD_0x131_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -22921,6 +24607,7 @@
* NIC for TSA binding.
*/
#define MC_CMD_TSA_CONFIG 0x64
+#define MC_CMD_TSA_CONFIG_MSGSET 0x64
#undef MC_CMD_0x64_PRIVILEGE_CTG
#define MC_CMD_0x64_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -23038,6 +24725,7 @@
* to a TSA adapter.
*/
#define MC_CMD_TSA_IPADDR 0x65
+#define MC_CMD_TSA_IPADDR_MSGSET 0x65
#undef MC_CMD_0x65_PRIVILEGE_CTG
#define MC_CMD_0x65_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -23089,7 +24777,13 @@
#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_OFST 8
#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_LEN 8
#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_LO_OFST 8
+#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_LO_LEN 4
+#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_LO_LBN 64
+#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_LO_WIDTH 32
#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_HI_OFST 12
+#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_HI_LEN 4
+#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_HI_LBN 96
+#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_HI_WIDTH 32
#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_MINNUM 1
#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_MAXNUM 30
#define MC_CMD_TSA_IPADDR_IN_VALIDATE_IPV4_IPV4_ITEM_MAXNUM_MCDI2 126
@@ -23119,7 +24813,13 @@
#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_OFST 8
#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_LEN 8
#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_LO_OFST 8
+#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_LO_LEN 4
+#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_LO_LBN 64
+#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_LO_WIDTH 32
#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_HI_OFST 12
+#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_HI_LEN 4
+#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_HI_LBN 96
+#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_HI_WIDTH 32
#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_MINNUM 1
#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_MAXNUM 30
#define MC_CMD_TSA_IPADDR_IN_REMOVE_IPV4_IPV4_ITEM_MAXNUM_MCDI2 126
@@ -23135,6 +24835,7 @@
* disabled.
*/
#define MC_CMD_SECURE_NIC_INFO 0x132
+#define MC_CMD_SECURE_NIC_INFO_MSGSET 0x132
#undef MC_CMD_0x132_PRIVILEGE_CTG
#define MC_CMD_0x132_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -23228,6 +24929,7 @@
* parameters in request or response.
*/
#define MC_CMD_TSA_TEST 0x125
+#define MC_CMD_TSA_TEST_MSGSET 0x125
#undef MC_CMD_0x125_PRIVILEGE_CTG
#define MC_CMD_0x125_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -23249,6 +24951,7 @@
* rule-set transitions.
*/
#define MC_CMD_TSA_RULESET_OVERRIDE 0x12a
+#define MC_CMD_TSA_RULESET_OVERRIDE_MSGSET 0x12a
#undef MC_CMD_0x12a_PRIVILEGE_CTG
#define MC_CMD_0x12a_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -23281,6 +24984,7 @@
* Specific usage is determined by the TYPE field.
*/
#define MC_CMD_TSAC_REQUEST 0x12b
+#define MC_CMD_TSAC_REQUEST_MSGSET 0x12b
#undef MC_CMD_0x12b_PRIVILEGE_CTG
#define MC_CMD_0x12b_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -23305,6 +25009,7 @@
* Get the version of the SUC
*/
#define MC_CMD_SUC_VERSION 0x134
+#define MC_CMD_SUC_VERSION_MSGSET 0x134
#undef MC_CMD_0x134_PRIVILEGE_CTG
#define MC_CMD_0x134_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -23350,6 +25055,7 @@
* Operations to support manftest on SUC based systems.
*/
#define MC_CMD_SUC_MANFTEST 0x135
+#define MC_CMD_SUC_MANFTEST_MSGSET 0x135
#undef MC_CMD_0x135_PRIVILEGE_CTG
#define MC_CMD_0x135_PRIVILEGE_CTG SRIOV_CTG_ADMIN_TSA_UNBOUND
@@ -23546,6 +25252,7 @@
* Request a certificate.
*/
#define MC_CMD_GET_CERTIFICATE 0x12c
+#define MC_CMD_GET_CERTIFICATE_MSGSET 0x12c
#undef MC_CMD_0x12c_PRIVILEGE_CTG
#define MC_CMD_0x12c_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -23620,6 +25327,7 @@
* Get a global value which applies to all PCI functions
*/
#define MC_CMD_GET_NIC_GLOBAL 0x12d
+#define MC_CMD_GET_NIC_GLOBAL_MSGSET 0x12d
#undef MC_CMD_0x12d_PRIVILEGE_CTG
#define MC_CMD_0x12d_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -23647,6 +25355,7 @@
* appropriate error otherwise (see key descriptions).
*/
#define MC_CMD_SET_NIC_GLOBAL 0x12e
+#define MC_CMD_SET_NIC_GLOBAL_MSGSET 0x12e
#undef MC_CMD_0x12e_PRIVILEGE_CTG
#define MC_CMD_0x12e_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -23694,6 +25403,7 @@
* firmware buffer for later extraction.
*/
#define MC_CMD_LTSSM_TRACE_POLL 0x12f
+#define MC_CMD_LTSSM_TRACE_POLL_MSGSET 0x12f
#undef MC_CMD_0x12f_PRIVILEGE_CTG
#define MC_CMD_0x12f_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -23731,7 +25441,13 @@
#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_OFST 8
#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_LEN 8
#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_LO_OFST 8
+#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_LO_LEN 4
+#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_LO_LBN 64
+#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_LO_WIDTH 32
#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_HI_OFST 12
+#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_HI_LEN 4
+#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_HI_LBN 96
+#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_HI_WIDTH 32
#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_MINNUM 0
#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_MAXNUM 30
#define MC_CMD_LTSSM_TRACE_POLL_OUT_ROWS_MAXNUM_MCDI2 126
@@ -23765,6 +25481,7 @@
* firmware variant.
*/
#define MC_CMD_TELEMETRY_ENABLE 0x138
+#define MC_CMD_TELEMETRY_ENABLE_MSGSET 0x138
#undef MC_CMD_0x138_PRIVILEGE_CTG
#define MC_CMD_0x138_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -23856,6 +25573,7 @@
* Reference - SF-120569-SW Telemetry Firmware Design.
*/
#define MC_CMD_TELEMETRY_CONFIG 0x139
+#define MC_CMD_TELEMETRY_CONFIG_MSGSET 0x139
#undef MC_CMD_0x139_PRIVILEGE_CTG
#define MC_CMD_0x139_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -23925,6 +25643,7 @@
* due to resource constraints, returns ENOSPC.
*/
#define MC_CMD_GET_RX_PREFIX_ID 0x13b
+#define MC_CMD_GET_RX_PREFIX_ID_MSGSET 0x13b
#undef MC_CMD_0x13b_PRIVILEGE_CTG
#define MC_CMD_0x13b_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -23935,7 +25654,13 @@
#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_OFST 0
#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_LEN 8
#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_LO_OFST 0
+#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_LO_LEN 4
+#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_LO_LBN 0
+#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_LO_WIDTH 32
#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_HI_OFST 4
+#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_HI_LEN 4
+#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_HI_LBN 32
+#define MC_CMD_GET_RX_PREFIX_ID_IN_FIELDS_HI_WIDTH 32
#define MC_CMD_GET_RX_PREFIX_ID_IN_LENGTH_OFST 0
#define MC_CMD_GET_RX_PREFIX_ID_IN_LENGTH_LBN 0
#define MC_CMD_GET_RX_PREFIX_ID_IN_LENGTH_WIDTH 1
@@ -24056,6 +25781,7 @@
* created with that prefix id
*/
#define MC_CMD_QUERY_RX_PREFIX_ID 0x13c
+#define MC_CMD_QUERY_RX_PREFIX_ID_MSGSET 0x13c
#undef MC_CMD_0x13c_PRIVILEGE_CTG
#define MC_CMD_0x13c_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24092,6 +25818,7 @@
* A command to perform various bundle-related operations on insecure cards.
*/
#define MC_CMD_BUNDLE 0x13d
+#define MC_CMD_BUNDLE_MSGSET 0x13d
#undef MC_CMD_0x13d_PRIVILEGE_CTG
#define MC_CMD_0x13d_PRIVILEGE_CTG SRIOV_CTG_INSECURE
@@ -24154,6 +25881,7 @@
* Read all VPD starting from a given address
*/
#define MC_CMD_GET_VPD 0x165
+#define MC_CMD_GET_VPD_MSGSET 0x165
#undef MC_CMD_0x165_PRIVILEGE_CTG
#define MC_CMD_0x165_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24185,6 +25913,7 @@
* Provide information about the NC-SI stack
*/
#define MC_CMD_GET_NCSI_INFO 0x167
+#define MC_CMD_GET_NCSI_INFO_MSGSET 0x167
#undef MC_CMD_0x167_PRIVILEGE_CTG
#define MC_CMD_0x167_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24256,6 +25985,7 @@
* System lockdown, when enabled firmware updates are blocked.
*/
#define MC_CMD_FIRMWARE_SET_LOCKDOWN 0x16f
+#define MC_CMD_FIRMWARE_SET_LOCKDOWN_MSGSET 0x16f
#undef MC_CMD_0x16f_PRIVILEGE_CTG
#define MC_CMD_0x16f_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -24278,6 +26008,7 @@
* documentation.
*/
#define MC_CMD_GET_TEST_FEATURES 0x1ac
+#define MC_CMD_GET_TEST_FEATURES_MSGSET 0x1ac
#undef MC_CMD_0x1ac_PRIVILEGE_CTG
#define MC_CMD_0x1ac_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24300,6 +26031,253 @@
#define MC_CMD_GET_TEST_FEATURE_OUT_TEST_FEATURES_MAXNUM 63
#define MC_CMD_GET_TEST_FEATURE_OUT_TEST_FEATURES_MAXNUM_MCDI2 255
+
+/***********************************/
+/* MC_CMD_FPGA
+ * A command to perform various fpga-related operations on platforms that
+ * include FPGAs. Note that some platforms may only support a subset of these
+ * operations.
+ */
+#define MC_CMD_FPGA 0x1bf
+#define MC_CMD_FPGA_MSGSET 0x1bf
+#undef MC_CMD_0x1bf_PRIVILEGE_CTG
+
+#define MC_CMD_0x1bf_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_FPGA_IN msgrequest */
+#define MC_CMD_FPGA_IN_LEN 4
+/* Sub-command code */
+#define MC_CMD_FPGA_IN_OP_OFST 0
+#define MC_CMD_FPGA_IN_OP_LEN 4
+/* enum: Get the FPGA version string. */
+#define MC_CMD_FPGA_IN_OP_GET_VERSION 0x0
+/* enum: Read bitmask of features supported in the FPGA image. */
+#define MC_CMD_FPGA_IN_OP_GET_CAPABILITIES 0x1
+/* enum: Perform a FPGA reset. */
+#define MC_CMD_FPGA_IN_OP_RESET 0x2
+/* enum: Set active flash device. */
+#define MC_CMD_FPGA_IN_OP_SELECT_FLASH 0x3
+/* enum: Get active flash device. */
+#define MC_CMD_FPGA_IN_OP_GET_ACTIVE_FLASH 0x4
+/* enum: Configure internal link i.e. the FPGA port facing the ASIC. */
+#define MC_CMD_FPGA_IN_OP_SET_INTERNAL_LINK 0x5
+/* enum: Read internal link configuration. */
+#define MC_CMD_FPGA_IN_OP_GET_INTERNAL_LINK 0x6
+
+/* MC_CMD_FPGA_OP_GET_VERSION_IN msgrequest: Get the FPGA version string. A
+ * free-format string is returned in response to this command. Any checks on
+ * supported FPGA operations are based on the response to
+ * MC_CMD_FPGA_OP_GET_CAPABILITIES.
+ */
+#define MC_CMD_FPGA_OP_GET_VERSION_IN_LEN 4
+/* Sub-command code. Must be OP_GET_VERSION */
+#define MC_CMD_FPGA_OP_GET_VERSION_IN_OP_OFST 0
+#define MC_CMD_FPGA_OP_GET_VERSION_IN_OP_LEN 4
+
+/* MC_CMD_FPGA_OP_GET_VERSION_OUT msgresponse: Returns the version string. */
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_LENMIN 0
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_LENMAX 252
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_LENMAX_MCDI2 1020
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_LEN(num) (0+1*(num))
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_VERSION_NUM(len) (((len)-0)/1)
+/* Null-terminated string containing version information. */
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_VERSION_OFST 0
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_VERSION_LEN 1
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_VERSION_MINNUM 0
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_VERSION_MAXNUM 252
+#define MC_CMD_FPGA_OP_GET_VERSION_OUT_VERSION_MAXNUM_MCDI2 1020
+
+/* MC_CMD_FPGA_OP_GET_CAPABILITIES_IN msgrequest: Read bitmask of features
+ * supported in the FPGA image.
+ */
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_IN_LEN 4
+/* Sub-command code. Must be OP_GET_CAPABILITIES */
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_IN_OP_OFST 0
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_IN_OP_LEN 4
+
+/* MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT msgresponse: Returns the version string.
+ */
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_LEN 4
+/* Bit-mask of supported features. */
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_CAPABILITIES_OFST 0
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_CAPABILITIES_LEN 4
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_MAC_OFST 0
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_MAC_LBN 0
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_MAC_WIDTH 1
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_MAE_OFST 0
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_MAE_LBN 1
+#define MC_CMD_FPGA_OP_GET_CAPABILITIES_OUT_MAE_WIDTH 1
+
+/* MC_CMD_FPGA_OP_RESET_IN msgrequest: Perform a FPGA reset operation where
+ * supported.
+ */
+#define MC_CMD_FPGA_OP_RESET_IN_LEN 4
+/* Sub-command code. Must be OP_RESET */
+#define MC_CMD_FPGA_OP_RESET_IN_OP_OFST 0
+#define MC_CMD_FPGA_OP_RESET_IN_OP_LEN 4
+
+/* MC_CMD_FPGA_OP_RESET_OUT msgresponse */
+#define MC_CMD_FPGA_OP_RESET_OUT_LEN 0
+
+/* MC_CMD_FPGA_OP_SELECT_FLASH_IN msgrequest: Set active FPGA flash device.
+ * Returns EINVAL if selected flash index does not exist on the platform under
+ * test.
+ */
+#define MC_CMD_FPGA_OP_SELECT_FLASH_IN_LEN 8
+/* Sub-command code. Must be OP_SELECT_FLASH */
+#define MC_CMD_FPGA_OP_SELECT_FLASH_IN_OP_OFST 0
+#define MC_CMD_FPGA_OP_SELECT_FLASH_IN_OP_LEN 4
+/* Flash device identifier. */
+#define MC_CMD_FPGA_OP_SELECT_FLASH_IN_FLASH_ID_OFST 4
+#define MC_CMD_FPGA_OP_SELECT_FLASH_IN_FLASH_ID_LEN 4
+/* Enum values, see field(s): */
+/* MC_CMD_FPGA_FLASH_INDEX */
+
+/* MC_CMD_FPGA_OP_SELECT_FLASH_OUT msgresponse */
+#define MC_CMD_FPGA_OP_SELECT_FLASH_OUT_LEN 0
+
+/* MC_CMD_FPGA_OP_GET_ACTIVE_FLASH_IN msgrequest: Get active FPGA flash device.
+ */
+#define MC_CMD_FPGA_OP_GET_ACTIVE_FLASH_IN_LEN 4
+/* Sub-command code. Must be OP_GET_ACTIVE_FLASH */
+#define MC_CMD_FPGA_OP_GET_ACTIVE_FLASH_IN_OP_OFST 0
+#define MC_CMD_FPGA_OP_GET_ACTIVE_FLASH_IN_OP_LEN 4
+
+/* MC_CMD_FPGA_OP_GET_ACTIVE_FLASH_OUT msgresponse: Returns flash identifier
+ * for current active flash.
+ */
+#define MC_CMD_FPGA_OP_GET_ACTIVE_FLASH_OUT_LEN 4
+/* Flash device identifier. */
+#define MC_CMD_FPGA_OP_GET_ACTIVE_FLASH_OUT_FLASH_ID_OFST 0
+#define MC_CMD_FPGA_OP_GET_ACTIVE_FLASH_OUT_FLASH_ID_LEN 4
+/* Enum values, see field(s): */
+/* MC_CMD_FPGA_FLASH_INDEX */
+
+/* MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN msgrequest: Configure FPGA internal
+ * port, facing the ASIC
+ */
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_LEN 12
+/* Sub-command code. Must be OP_SET_INTERNAL_LINK */
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_OP_OFST 0
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_OP_LEN 4
+/* Flags */
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_FLAGS_OFST 4
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_FLAGS_LEN 4
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_LINK_STATE_OFST 4
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_LINK_STATE_LBN 0
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_LINK_STATE_WIDTH 2
+/* enum: Unmodified, same as last state set by firmware */
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_AUTO 0x0
+/* enum: Configure link-up */
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_UP 0x1
+/* enum: Configure link-down */
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_DOWN 0x2
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_FLUSH_OFST 4
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_FLUSH_LBN 2
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_FLUSH_WIDTH 1
+/* Link speed to be applied on FPGA internal port MAC. */
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_SPEED_OFST 8
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN_SPEED_LEN 4
+
+/* MC_CMD_FPGA_OP_SET_INTERNAL_LINK_OUT msgresponse */
+#define MC_CMD_FPGA_OP_SET_INTERNAL_LINK_OUT_LEN 0
+
+/* MC_CMD_FPGA_OP_GET_INTERNAL_LINK_IN msgrequest: Read FPGA internal port
+ * configuration and status
+ */
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_IN_LEN 4
+/* Sub-command code. Must be OP_GET_INTERNAL_LINK */
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_IN_OP_OFST 0
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_IN_OP_LEN 4
+
+/* MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT msgresponse: Response format for read
+ * FPGA internal port configuration and status
+ */
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT_LEN 8
+/* Flags */
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT_FLAGS_OFST 0
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT_FLAGS_LEN 4
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT_LINK_STATE_OFST 0
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT_LINK_STATE_LBN 0
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT_LINK_STATE_WIDTH 2
+/* Enum values, see field(s): */
+/* MC_CMD_FPGA_OP_SET_INTERNAL_LINK_IN/FLAGS */
+/* Link speed set on FPGA internal port MAC. */
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT_SPEED_OFST 4
+#define MC_CMD_FPGA_OP_GET_INTERNAL_LINK_OUT_SPEED_LEN 4
+
+
+/***********************************/
+/* MC_CMD_EXTERNAL_MAE_GET_LINK_MODE
+ * This command is expected to be used on a U25 board with an MAE in the FPGA.
+ * It does not modify the operational state of the NIC. The modes are described
+ * in XN-200039-TC - U25 OVS packet formats.
+ */
+#define MC_CMD_EXTERNAL_MAE_GET_LINK_MODE 0x1c0
+#define MC_CMD_EXTERNAL_MAE_GET_LINK_MODE_MSGSET 0x1c0
+#undef MC_CMD_0x1c0_PRIVILEGE_CTG
+
+#define MC_CMD_0x1c0_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_EXTERNAL_MAE_GET_LINK_MODE_IN msgrequest */
+#define MC_CMD_EXTERNAL_MAE_GET_LINK_MODE_IN_LEN 0
+
+/* MC_CMD_EXTERNAL_MAE_GET_LINK_MODE_OUT msgresponse */
+#define MC_CMD_EXTERNAL_MAE_GET_LINK_MODE_OUT_LEN 4
+/* The current link mode */
+#define MC_CMD_EXTERNAL_MAE_GET_LINK_MODE_OUT_MODE_OFST 0
+#define MC_CMD_EXTERNAL_MAE_GET_LINK_MODE_OUT_MODE_LEN 4
+/* Enum values, see field(s): */
+/* MC_CMD_EXTERNAL_MAE_LINK_MODE */
+
+
+/***********************************/
+/* MC_CMD_EXTERNAL_MAE_SET_LINK_MODE
+ * This command is expected to be used on a U25 board with an MAE in the FPGA.
+ * The modes are described in XN-200039-TC - U25 OVS packet formats. This
+ * command will set the link between the FPGA and the X2 to the specified new
+ * mode. It will first enter bootstrap mode, make sure there are no packets in
+ * flight and then enter the requested mode. In order to make sure there are no
+ * packets in flight, it will flush the X2 TX path, the FPGA RX path from the
+ * X2, the FPGA TX path to the X2 and the X2 RX path. The driver is responsible
+ * for making sure there are no TX or RX descriptors posted on any TXQ or RXQ
+ * associated with the affected port before invoking this command. This command
+ * is run implicitly with MODE set to LEGACY when MC_CMD_DRV_ATTACH is
+ * executed.
+ */
+#define MC_CMD_EXTERNAL_MAE_SET_LINK_MODE 0x1c1
+#define MC_CMD_EXTERNAL_MAE_SET_LINK_MODE_MSGSET 0x1c1
+#undef MC_CMD_0x1c1_PRIVILEGE_CTG
+
+#define MC_CMD_0x1c1_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_EXTERNAL_MAE_SET_LINK_MODE_IN msgrequest */
+#define MC_CMD_EXTERNAL_MAE_SET_LINK_MODE_IN_LEN 4
+/* The new link mode. */
+#define MC_CMD_EXTERNAL_MAE_SET_LINK_MODE_IN_MODE_OFST 0
+#define MC_CMD_EXTERNAL_MAE_SET_LINK_MODE_IN_MODE_LEN 4
+/* Enum values, see field(s): */
+/* MC_CMD_EXTERNAL_MAE_LINK_MODE */
+
+/* MC_CMD_EXTERNAL_MAE_SET_LINK_MODE_OUT msgresponse */
+#define MC_CMD_EXTERNAL_MAE_SET_LINK_MODE_OUT_LEN 0
+
+/* CLIENT_HANDLE structuredef: A client is an abstract entity that can make
+ * requests of the device and that can own resources managed by the device.
+ * Examples of clients include PCIe functions and dynamic clients. A client
+ * handle is a 32b opaque value used to refer to a client. Further details can
+ * be found within XN-200418-TC.
+ */
+#define CLIENT_HANDLE_LEN 4
+#define CLIENT_HANDLE_OPAQUE_OFST 0
+#define CLIENT_HANDLE_OPAQUE_LEN 4
+/* enum: A client handle guaranteed never to refer to a real client. */
+#define CLIENT_HANDLE_NULL 0xffffffff
+/* enum: Used to refer to the calling client. */
+#define CLIENT_HANDLE_SELF 0xfffffffe
+#define CLIENT_HANDLE_OPAQUE_LBN 0
+#define CLIENT_HANDLE_OPAQUE_WIDTH 32
+
/* CLOCK_INFO structuredef: Information about a single hardware clock */
#define CLOCK_INFO_LEN 28
/* Enumeration that uniquely identifies the clock */
@@ -24333,7 +26311,13 @@
#define CLOCK_INFO_FREQUENCY_OFST 4
#define CLOCK_INFO_FREQUENCY_LEN 8
#define CLOCK_INFO_FREQUENCY_LO_OFST 4
+#define CLOCK_INFO_FREQUENCY_LO_LEN 4
+#define CLOCK_INFO_FREQUENCY_LO_LBN 32
+#define CLOCK_INFO_FREQUENCY_LO_WIDTH 32
#define CLOCK_INFO_FREQUENCY_HI_OFST 8
+#define CLOCK_INFO_FREQUENCY_HI_LEN 4
+#define CLOCK_INFO_FREQUENCY_HI_LBN 64
+#define CLOCK_INFO_FREQUENCY_HI_WIDTH 32
#define CLOCK_INFO_FREQUENCY_LBN 32
#define CLOCK_INFO_FREQUENCY_WIDTH 64
/* Human-readable ASCII name for clock, with NUL termination */
@@ -24343,12 +26327,62 @@
#define CLOCK_INFO_NAME_LBN 96
#define CLOCK_INFO_NAME_WIDTH 8
+/* SCHED_CREDIT_CHECK_RESULT structuredef */
+#define SCHED_CREDIT_CHECK_RESULT_LEN 16
+/* The instance of the scheduler. Refer to XN-200389-AW for the location of
+ * these schedulers in the hardware.
+ */
+#define SCHED_CREDIT_CHECK_RESULT_SCHED_INSTANCE_OFST 0
+#define SCHED_CREDIT_CHECK_RESULT_SCHED_INSTANCE_LEN 1
+#define SCHED_CREDIT_CHECK_RESULT_HUB_HOST_A 0x0 /* enum */
+#define SCHED_CREDIT_CHECK_RESULT_HUB_NET_A 0x1 /* enum */
+#define SCHED_CREDIT_CHECK_RESULT_HUB_B 0x2 /* enum */
+#define SCHED_CREDIT_CHECK_RESULT_HUB_HOST_C 0x3 /* enum */
+#define SCHED_CREDIT_CHECK_RESULT_HUB_NET_TX 0x4 /* enum */
+#define SCHED_CREDIT_CHECK_RESULT_HUB_HOST_D 0x5 /* enum */
+#define SCHED_CREDIT_CHECK_RESULT_HUB_REPLAY 0x6 /* enum */
+#define SCHED_CREDIT_CHECK_RESULT_DMAC_H2C 0x7 /* enum */
+#define SCHED_CREDIT_CHECK_RESULT_SCHED_INSTANCE_LBN 0
+#define SCHED_CREDIT_CHECK_RESULT_SCHED_INSTANCE_WIDTH 8
+/* The type of node that this result refers to. */
+#define SCHED_CREDIT_CHECK_RESULT_NODE_TYPE_OFST 1
+#define SCHED_CREDIT_CHECK_RESULT_NODE_TYPE_LEN 1
+/* enum: Destination node */
+#define SCHED_CREDIT_CHECK_RESULT_DEST 0x0
+/* enum: Source node */
+#define SCHED_CREDIT_CHECK_RESULT_SOURCE 0x1
+#define SCHED_CREDIT_CHECK_RESULT_NODE_TYPE_LBN 8
+#define SCHED_CREDIT_CHECK_RESULT_NODE_TYPE_WIDTH 8
+/* Level of node in scheduler hierarchy (level 0 is the bottom of the
+ * hierarchy, increasing towards the root node).
+ */
+#define SCHED_CREDIT_CHECK_RESULT_NODE_LEVEL_OFST 2
+#define SCHED_CREDIT_CHECK_RESULT_NODE_LEVEL_LEN 2
+#define SCHED_CREDIT_CHECK_RESULT_NODE_LEVEL_LBN 16
+#define SCHED_CREDIT_CHECK_RESULT_NODE_LEVEL_WIDTH 16
+/* Node index */
+#define SCHED_CREDIT_CHECK_RESULT_NODE_INDEX_OFST 4
+#define SCHED_CREDIT_CHECK_RESULT_NODE_INDEX_LEN 4
+#define SCHED_CREDIT_CHECK_RESULT_NODE_INDEX_LBN 32
+#define SCHED_CREDIT_CHECK_RESULT_NODE_INDEX_WIDTH 32
+/* The number of credits the node is expected to have. */
+#define SCHED_CREDIT_CHECK_RESULT_EXPECTED_CREDITS_OFST 8
+#define SCHED_CREDIT_CHECK_RESULT_EXPECTED_CREDITS_LEN 4
+#define SCHED_CREDIT_CHECK_RESULT_EXPECTED_CREDITS_LBN 64
+#define SCHED_CREDIT_CHECK_RESULT_EXPECTED_CREDITS_WIDTH 32
+/* The number of credits the node actually had. */
+#define SCHED_CREDIT_CHECK_RESULT_ACTUAL_CREDITS_OFST 12
+#define SCHED_CREDIT_CHECK_RESULT_ACTUAL_CREDITS_LEN 4
+#define SCHED_CREDIT_CHECK_RESULT_ACTUAL_CREDITS_LBN 96
+#define SCHED_CREDIT_CHECK_RESULT_ACTUAL_CREDITS_WIDTH 32
+
/***********************************/
/* MC_CMD_GET_CLOCKS_INFO
* Get information about the device clocks
*/
#define MC_CMD_GET_CLOCKS_INFO 0x166
+#define MC_CMD_GET_CLOCKS_INFO_MSGSET 0x166
#undef MC_CMD_0x166_PRIVILEGE_CTG
#define MC_CMD_0x166_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24387,6 +26421,7 @@
* returns ENOSPC if the caller's table is full.
*/
#define MC_CMD_VNIC_ENCAP_RULE_ADD 0x16d
+#define MC_CMD_VNIC_ENCAP_RULE_ADD_MSGSET 0x16d
#undef MC_CMD_0x16d_PRIVILEGE_CTG
#define MC_CMD_0x16d_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24469,6 +26504,7 @@
* if the input HANDLE doesn't correspond to an existing rule.
*/
#define MC_CMD_VNIC_ENCAP_RULE_REMOVE 0x16e
+#define MC_CMD_VNIC_ENCAP_RULE_REMOVE_MSGSET 0x16e
#undef MC_CMD_0x16e_PRIVILEGE_CTG
#define MC_CMD_0x16e_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24508,303 +26544,568 @@
#define UUID_NODE_LBN 80
#define UUID_NODE_WIDTH 48
-/* MC_CMD_DEVEL_DUMP_VI_ENTRY structuredef */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_LEN 28
-/* Type of entry */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_TYPE_OFST 0
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_TYPE_LEN 4
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QDMA_SW_C2H 0x0 /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QDMA_SW_H2C 0x1 /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QDMA_HW_C2H 0x2 /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QDMA_HW_H2C 0x3 /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QDMA_CR_C2H 0x4 /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QDMA_CR_H2C 0x5 /* enum */
-/* enum: First QDMA writeback/completion queue. Used for ef100, C2H VDPA and
- * plain virtio.
- */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QDMA_WRB 0x6
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QDMA_PFTCH 0x7 /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_DMAC_H2C_QTBL 0x100 /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_DMAC_C2H_QTBL 0x101 /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_DMAC_H2C_VIO 0x10a /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_TYPE_LBN 0
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_TYPE_WIDTH 32
-/* Internal QDMA/dmac queue number for this entry */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QUEUE_NUMBER_OFST 4
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QUEUE_NUMBER_LEN 4
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QUEUE_NUMBER_LBN 32
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_QUEUE_NUMBER_WIDTH 32
-/* Size of entry data */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_SIZE_OFST 8
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_SIZE_LEN 4
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_SIZE_LBN 64
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_SIZE_WIDTH 32
-/* Offset of entry data from start of MCDI message response payload */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_OFFSET_OFST 12
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_OFFSET_LEN 4
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_OFFSET_LBN 96
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_OFFSET_WIDTH 32
-/* Absolute VI of the entry, or 0xffffffff if not available/applicable */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_ABS_VI_OFST 16
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_ABS_VI_LEN 4
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_NO_ABS_VI 0xffffffff /* enum */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_ABS_VI_LBN 128
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_ABS_VI_WIDTH 32
-/* Reserved */
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_RESERVED_OFST 20
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_RESERVED_LEN 8
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_RESERVED_LO_OFST 20
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_RESERVED_HI_OFST 24
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_RESERVED_LBN 160
-#define MC_CMD_DEVEL_DUMP_VI_ENTRY_RESERVED_WIDTH 64
-
-
-/***********************************/
-/* MC_CMD_DEVEL_DUMP_VI
- * Dump various parts of the hardware's state for a VI.
- */
-#define MC_CMD_DEVEL_DUMP_VI 0x1b5
-#undef MC_CMD_0x1b5_PRIVILEGE_CTG
-
-#define MC_CMD_0x1b5_PRIVILEGE_CTG SRIOV_CTG_GENERAL
-
-/* MC_CMD_DEVEL_DUMP_VI_IN msgrequest */
-#define MC_CMD_DEVEL_DUMP_VI_IN_LEN 4
-/* Absolute queue id of queue to dump state for */
-#define MC_CMD_DEVEL_DUMP_VI_IN_QID_OFST 0
-#define MC_CMD_DEVEL_DUMP_VI_IN_QID_LEN 4
-
-/* MC_CMD_DEVEL_DUMP_VI_IN_V2 msgrequest */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_LEN 20
-/* Which queue to dump. The meaning of this field dependes on ADDRESS_MODE. */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_ID_OFST 0
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_ID_LEN 4
-/* Method of referring to the queue to dump */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_ADDRESS_MODE_OFST 4
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_ADDRESS_MODE_LEN 4
-/* enum: First field refers to queue number as understood by QDMA/DMAC hardware
- */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_QUEUE_NUMBER 0x0
-/* enum: First field refers to absolute VI number */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_ABS_VI 0x1
-/* enum: First field refers to function-relative VI number on the command's
- * function
+/* PLUGIN_EXTENSION structuredef: Used within MC_CMD_PLUGIN_GET_ALL to describe
+ * an individual extension.
+ */
+#define PLUGIN_EXTENSION_LEN 20
+#define PLUGIN_EXTENSION_UUID_OFST 0
+#define PLUGIN_EXTENSION_UUID_LEN 16
+#define PLUGIN_EXTENSION_UUID_LBN 0
+#define PLUGIN_EXTENSION_UUID_WIDTH 128
+#define PLUGIN_EXTENSION_ADMIN_GROUP_OFST 16
+#define PLUGIN_EXTENSION_ADMIN_GROUP_LEN 1
+#define PLUGIN_EXTENSION_ADMIN_GROUP_LBN 128
+#define PLUGIN_EXTENSION_ADMIN_GROUP_WIDTH 8
+#define PLUGIN_EXTENSION_FLAG_ENABLED_LBN 136
+#define PLUGIN_EXTENSION_FLAG_ENABLED_WIDTH 1
+#define PLUGIN_EXTENSION_RESERVED_LBN 137
+#define PLUGIN_EXTENSION_RESERVED_WIDTH 23
+
+/* DESC_ADDR_REGION structuredef: Describes a contiguous region of DESC_ADDR
+ * space that maps to a contiguous region of TRGT_ADDR space. Addresses
+ * DESC_ADDR in the range [DESC_ADDR_BASE:DESC_ADDR_BASE + 1 <<
+ * WINDOW_SIZE_LOG2) map to TRGT_ADDR = DESC_ADDR - DESC_ADDR_BASE +
+ * TRGT_ADDR_BASE.
+ */
+#define DESC_ADDR_REGION_LEN 32
+/* The start of the region in DESC_ADDR space. */
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_OFST 0
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_LEN 8
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_LO_OFST 0
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_LO_LEN 4
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_LO_LBN 0
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_LO_WIDTH 32
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_HI_OFST 4
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_HI_LEN 4
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_HI_LBN 32
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_HI_WIDTH 32
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_LBN 0
+#define DESC_ADDR_REGION_DESC_ADDR_BASE_WIDTH 64
+/* The start of the region in TRGT_ADDR space. Drivers can set this via
+ * MC_CMD_SET_DESC_ADDR_REGIONS.
+ */
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_OFST 8
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_LEN 8
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_LO_OFST 8
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_LO_LEN 4
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_LO_LBN 64
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_LO_WIDTH 32
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_HI_OFST 12
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_HI_LEN 4
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_HI_LBN 96
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_HI_WIDTH 32
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_LBN 64
+#define DESC_ADDR_REGION_TRGT_ADDR_BASE_WIDTH 64
+/* The size of the region. */
+#define DESC_ADDR_REGION_WINDOW_SIZE_LOG2_OFST 16
+#define DESC_ADDR_REGION_WINDOW_SIZE_LOG2_LEN 4
+#define DESC_ADDR_REGION_WINDOW_SIZE_LOG2_LBN 128
+#define DESC_ADDR_REGION_WINDOW_SIZE_LOG2_WIDTH 32
+/* The alignment restriction on TRGT_ADDR. TRGT_ADDR values set by the driver
+ * must be a multiple of 1 << TRGT_ADDR_ALIGN_LOG2.
+ */
+#define DESC_ADDR_REGION_TRGT_ADDR_ALIGN_LOG2_OFST 20
+#define DESC_ADDR_REGION_TRGT_ADDR_ALIGN_LOG2_LEN 4
+#define DESC_ADDR_REGION_TRGT_ADDR_ALIGN_LOG2_LBN 160
+#define DESC_ADDR_REGION_TRGT_ADDR_ALIGN_LOG2_WIDTH 32
+#define DESC_ADDR_REGION_RSVD_OFST 24
+#define DESC_ADDR_REGION_RSVD_LEN 8
+#define DESC_ADDR_REGION_RSVD_LO_OFST 24
+#define DESC_ADDR_REGION_RSVD_LO_LEN 4
+#define DESC_ADDR_REGION_RSVD_LO_LBN 192
+#define DESC_ADDR_REGION_RSVD_LO_WIDTH 32
+#define DESC_ADDR_REGION_RSVD_HI_OFST 28
+#define DESC_ADDR_REGION_RSVD_HI_LEN 4
+#define DESC_ADDR_REGION_RSVD_HI_LBN 224
+#define DESC_ADDR_REGION_RSVD_HI_WIDTH 32
+#define DESC_ADDR_REGION_RSVD_LBN 192
+#define DESC_ADDR_REGION_RSVD_WIDTH 64
+
+
+/***********************************/
+/* MC_CMD_GET_DESC_ADDR_INFO
+ * Returns a description of the mapping from DESC_ADDR to TRGT_ADDR for the calling function's address space.
+ */
+#define MC_CMD_GET_DESC_ADDR_INFO 0x1b7
+#define MC_CMD_GET_DESC_ADDR_INFO_MSGSET 0x1b7
+#undef MC_CMD_0x1b7_PRIVILEGE_CTG
+
+#define MC_CMD_0x1b7_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_GET_DESC_ADDR_INFO_IN msgrequest */
+#define MC_CMD_GET_DESC_ADDR_INFO_IN_LEN 0
+
+/* MC_CMD_GET_DESC_ADDR_INFO_OUT msgresponse */
+#define MC_CMD_GET_DESC_ADDR_INFO_OUT_LEN 4
+/* The type of mapping; see SF-nnnnnn-xx (EF100 driver writer's guide, once
+ * written) for details of each type.
+ */
+#define MC_CMD_GET_DESC_ADDR_INFO_OUT_MAPPING_TYPE_OFST 0
+#define MC_CMD_GET_DESC_ADDR_INFO_OUT_MAPPING_TYPE_LEN 4
+/* enum: TRGT_ADDR = DESC_ADDR */
+#define MC_CMD_GET_DESC_ADDR_INFO_OUT_MAPPING_FLAT 0x0
+/* enum: DESC_ADDR has one or more regions that map into TRGT_ADDR. The base
+ * TRGT_ADDR for each region is programmable via MCDI.
+ */
+#define MC_CMD_GET_DESC_ADDR_INFO_OUT_MAPPING_REGIONED 0x1
+
+
+/***********************************/
+/* MC_CMD_GET_DESC_ADDR_REGIONS
+ * Returns a list of the DESC_ADDR regions for the calling function's address space. Only valid if that function's address space has the REGIONED mapping from DESC_ADDR to TRGT_ADDR.
+ */
+#define MC_CMD_GET_DESC_ADDR_REGIONS 0x1b8
+#define MC_CMD_GET_DESC_ADDR_REGIONS_MSGSET 0x1b8
+#undef MC_CMD_0x1b8_PRIVILEGE_CTG
+
+#define MC_CMD_0x1b8_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_GET_DESC_ADDR_REGIONS_IN msgrequest */
+#define MC_CMD_GET_DESC_ADDR_REGIONS_IN_LEN 0
+
+/* MC_CMD_GET_DESC_ADDR_REGIONS_OUT msgresponse */
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_LENMIN 32
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_LENMAX 224
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_LENMAX_MCDI2 992
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_LEN(num) (0+32*(num))
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_REGIONS_NUM(len) (((len)-0)/32)
+/* An array of DESC_ADDR_REGION strutures. The number of entries in the array
+ * indicates the number of available regions.
+ */
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_REGIONS_OFST 0
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_REGIONS_LEN 32
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_REGIONS_MINNUM 1
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_REGIONS_MAXNUM 7
+#define MC_CMD_GET_DESC_ADDR_REGIONS_OUT_REGIONS_MAXNUM_MCDI2 31
+
+
+/***********************************/
+/* MC_CMD_SET_DESC_ADDR_REGIONS
+ * Set the base TRGT_ADDR for a set of DESC_ADDR regions for the calling function's address space. Only valid if that function's address space had the REGIONED mapping from DESC_ADDR to TRGT_ADDR.
+ */
+#define MC_CMD_SET_DESC_ADDR_REGIONS 0x1b9
+#define MC_CMD_SET_DESC_ADDR_REGIONS_MSGSET 0x1b9
+#undef MC_CMD_0x1b9_PRIVILEGE_CTG
+
+#define MC_CMD_0x1b9_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_SET_DESC_ADDR_REGIONS_IN msgrequest */
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_LENMIN 16
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_LENMAX 248
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_LENMAX_MCDI2 1016
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_LEN(num) (8+8*(num))
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_NUM(len) (((len)-8)/8)
+/* A bitmask indicating which regions should have their base TRGT_ADDR updated.
+ * To update the base TRGR_ADDR for a DESC_ADDR region, the corresponding bit
+ * should be set to 1.
+ */
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_SET_REGION_MASK_OFST 0
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_SET_REGION_MASK_LEN 4
+/* Reserved field; must be set to zero. */
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_RSVD_OFST 4
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_RSVD_LEN 4
+/* An array of values used to updated the base TRGT_ADDR for DESC_ADDR regions.
+ * Array indices corresponding to region numbers (i.e. the array is sparse, and
+ * included entries for regions even if the corresponding SET_REGION_MASK bit
+ * is zero).
*/
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_REL_VI 0x2
-/* enum: First field refers to function-relative VI number on a specified
- * function
- */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_REL_VI_PROXY 0x3
-/* Type of VI. Not needed if ADDRESS_MODE is QUEUE_NUMBER. */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_VI_TYPE_OFST 8
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_VI_TYPE_LEN 4
-/* enum: Return only entries used for ef100 queues (a single hardware queue) */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_EF100 0x0
-/* enum: Return entries used for virtio (Potentially two hardware queues,
- * depending on hardware implementation)
- */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_VIRTIO 0x1
-/* Only if ADDRESS_MODE is REL_VI_PROXY. Interface of function the queue is on.
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_OFST 8
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_LEN 8
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_LO_OFST 8
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_LO_LEN 4
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_LO_LBN 64
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_LO_WIDTH 32
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_HI_OFST 12
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_HI_LEN 4
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_HI_LBN 96
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_HI_WIDTH 32
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_MINNUM 1
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_MAXNUM 30
+#define MC_CMD_SET_DESC_ADDR_REGIONS_IN_TRGT_ADDR_BASE_MAXNUM_MCDI2 126
+
+/* MC_CMD_SET_DESC_ADDR_REGIONS_OUT msgresponse */
+#define MC_CMD_SET_DESC_ADDR_REGIONS_OUT_LEN 0
+
+
+/***********************************/
+/* MC_CMD_CLIENT_CMD
+ * Execute an arbitrary MCDI command on behalf of a different client. The
+ * consequences of the command (e.g. ownership of any resources created) apply
+ * to the indicated client rather than the function client which actually sent
+ * this command. All inherent permission checks are also performed on the
+ * indicated client. The given client must be a descendant of the requestor.
+ * The command to be proxied follows immediately afterward in the host buffer
+ * (or on the UART). Chaining multiple MC_CMD_CLIENT_CMD is unnecessary and not
+ * supported. New dynamic clients may be created with MC_CMD_CLIENT_ALLOC.
*/
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_PCIE_INTERFACE_OFST 12
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_PCIE_INTERFACE_LEN 4
-/* Enum values, see field(s): */
-/* DEVEL_PCIE_INTERFACE */
-/* Only if ADDRESS_MODE is REL_VI_PROXY. PF number of the function the queue is
- * on.
- */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_PF_OFST 16
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_PF_LEN 2
-/* Only if ADDRESS_MODE is REL_VI_PROXY. VF number of the function the queue is
- * on.
- */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_VF_OFST 18
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_VF_LEN 2
-/* enum: The function is on a PF, not a VF. */
-#define MC_CMD_DEVEL_DUMP_VI_IN_V2_VF_NULL 0xffff
-
-/* MC_CMD_DEVEL_DUMP_VI_OUT msgresponse */
-#define MC_CMD_DEVEL_DUMP_VI_OUT_LENMIN 4
-#define MC_CMD_DEVEL_DUMP_VI_OUT_LENMAX 252
-#define MC_CMD_DEVEL_DUMP_VI_OUT_LENMAX_MCDI2 1012
-#define MC_CMD_DEVEL_DUMP_VI_OUT_LEN(num) (0+1*(num))
-#define MC_CMD_DEVEL_DUMP_VI_OUT_DATA_NUM(len) (((len)-0)/1)
-/* Number of dump entries returned */
-#define MC_CMD_DEVEL_DUMP_VI_OUT_NUM_ENTRIES_OFST 0
-#define MC_CMD_DEVEL_DUMP_VI_OUT_NUM_ENTRIES_LEN 4
-#define MC_CMD_DEVEL_DUMP_VI_OUT_DATA_OFST 0
-#define MC_CMD_DEVEL_DUMP_VI_OUT_DATA_LBN 0
-#define MC_CMD_DEVEL_DUMP_VI_OUT_DATA_WIDTH 8
-#define MC_CMD_DEVEL_DUMP_VI_OUT_DATA_MINNUM 0
-#define MC_CMD_DEVEL_DUMP_VI_OUT_DATA_MAXNUM 252
-#define MC_CMD_DEVEL_DUMP_VI_OUT_DATA_MAXNUM_MCDI2 1020
-/* Array of MC_CMD_DEVEL_DUMP_VI_ENTRY structures of length NUM_ENTRIES */
-#define MC_CMD_DEVEL_DUMP_VI_OUT_ENTRIES_OFST 4
-#define MC_CMD_DEVEL_DUMP_VI_OUT_ENTRIES_LEN 28
-#define MC_CMD_DEVEL_DUMP_VI_OUT_ENTRIES_MINNUM 0
-#define MC_CMD_DEVEL_DUMP_VI_OUT_ENTRIES_MAXNUM 8
-#define MC_CMD_DEVEL_DUMP_VI_OUT_ENTRIES_MAXNUM_MCDI2 36
-
-/* MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY structuredef */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_LEN 16
-/* What register this is */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_REG_OFST 0
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_REG_LEN 4
-/* enum: Catchall for registers that aren't in this enum. Nothing should be in
- * this long-term
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_UNKNOWN 0xffffffff
-/* enum: S2IC Converter Debug Packet Counter register. Informs number of
- * packets passed through Converter.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_H2C_S2IC_DBG_PKT_CNT 0x0
-/* enum: IC2S Converter Debug Packet Counter register. Informs number of
- * packets passed through Converter.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_C2H_IC2S_DBG_PKT_CNT 0x1
-/* enum: Event Controller Tx path Debug register. Count of Moderator Tx events,
- * not incl D2C, VirtIO, Dproxy.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TX_DEBUG 0x2
-/* enum: Event Controller Rx path Debug register. Count of Moderator Rx events.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_RX_DEBUG 0x3
-/* enum: Event Controller Debug register. Count of Total EVC events. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TOTAL_DEBUG 0x4
-/* enum: Same info as EVC_RX_DEBUG; collected at different location in design
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_RX_EF100_DEBUG 0x5
-/* enum: Same info as EVC_TX_DEBUG; collected at different location in design
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TX_EF100_DEBUG 0x6
-/* enum: Event Controller Debug register. Count of Tx VirtIO events. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TX_VIRTIO_DEBUG 0x7
-/* enum: Event Controller Debug register. Count of Tx Descriptor Proxy events.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TX_DPRXY_DEBUG 0x8
-/* enum: Event Controller Debug register. Count of Tx VirtQ Descriptor Proxy
- * events.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TX_VIRTQ_DPRXY_DEBUG 0x9
-/* enum: Event Controller Debug register. Count of Tx Descriptor-to-Completion
- * events.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TX_D2C_DEBUG 0xa
-/* enum: Event Controller Debug register. Count of Tx VirtIO Descriptor-to-
- * Completion events.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TX_VIRTQ_D2C_DEBUG 0xb
-/* enum: Event Controller Debug register. Count of Tx Timestamp events. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_TX_TSTAMP_DEBUG 0xc
-/* enum: Event Controller Debug register. Count of Rx EvQ Timeout events. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_RX_EVQ_TIMEOUT_DEBUG 0xd
-/* enum: Event Controller Debug register. Count of MC events. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_MC_DEBUG 0xe
-/* enum: Event Controller Debug register. Count of EQDMA VirtIO Control events.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_EVC_EQDMA_VIO_CTL_DEBUG 0xf
-/* enum: Counter of QDMA Dropped C2H packets. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_DMAC_C2H_DROP_CTR_REG 0x10
-/* enum: Number of packets received by c host fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_C_H_PACKETS_IN_TBL 0x11
-/* enum: Number of packets sent by c host fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_C_H_PACKETS_OUT_TBL 0x12
-/* enum: Number of packets received by c plugin fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_C_P_PACKETS_IN_TBL 0x13
-/* enum: Number of packets received by b host fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_B_H_PACKETS_IN_TBL 0x14
-/* enum: Number of packets received by b net fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_B_N_PACKETS_IN_TBL 0x15
-/* enum: Number of packets received by b host fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_B_PH_PACKETS_IN_TBL 0x16
-/* enum: Number of packets received by b net fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_B_PN_PACKETS_IN_TBL 0x17
-/* enum: Number of packets sent by b net fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_B_PACKETS_OUT_TBL 0x18
-/* enum: Number of packets received by c net fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_C_N_PACKETS_IN_TBL 0x19
-/* enum: Number of packets sent by c net fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_C_N_PACKETS_OUT_TBL 0x1a
-/* enum: Number of packets received by ha fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_HA_PACKETS_IN_TBL 0x1b
-/* enum: Number of packets received by ha host shadow fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_HA_PH_PACKETS_IN_TBL 0x1c
-/* enum: Number of packets received by ha fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_HA_PACKETS_OUT_TBL 0x1d
-/* enum: Number of packets received by d hub fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_D_PACKETS_IN_TBL 0x1e
-/* enum: Number of packets received by d hub plugin fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_D_P_PACKETS_IN_TBL 0x1f
-/* enum: Number of packets received by d hub plugin fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_D_O_PACKETS_IN_TBL 0x20
-/* enum: Number of packets sent to dmac. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_D_PACKETS_OUT_TBL 0x21
-/* enum: Number of packets received by na fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_NA_PACKETS_IN_TBL 0x22
-/* enum: Number of packets dropped by na fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_NA_PACKETS_DROPPED_TBL 0x23
-/* enum: Number of packets sent by na fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_NA_PACKETS_OUT_TBL 0x24
-/* enum: Number of packets received by rp hub fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_RP_PACKETS_IN_TBL 0x25
-/* enum: Number of packets removed from fifo. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_SSS_RP_PACKETS_OUT_TBL 0x26
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_REG_LBN 0
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_REG_WIDTH 32
-/* If REG is a table, the table row. */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_ROW_OFST 4
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_ROW_LEN 4
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_ROW_LBN 32
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_ROW_WIDTH 32
-/* Address of the register (as seen by the MC) */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_ADDRESS_OFST 8
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_ADDRESS_LEN 4
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_ADDRESS_LBN 64
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_ADDRESS_WIDTH 32
-/* Value of the register */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_VALUE_OFST 12
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_VALUE_LEN 4
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_VALUE_LBN 96
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY_VALUE_WIDTH 32
-
-
-/***********************************/
-/* MC_CMD_DEVEL_DUMP_RHEAD_REGS
- * Dump an assortment of hopefully useful riverhead debug registers
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS 0x1b6
-#undef MC_CMD_0x1b6_PRIVILEGE_CTG
-
-#define MC_CMD_0x1b6_PRIVILEGE_CTG SRIOV_CTG_GENERAL
-
-/* MC_CMD_DEVEL_DUMP_RHEAD_REGS_IN msgrequest */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_IN_LEN 4
-/* Which page of registers to retrieve. Page 0 always exists, later pages may
- * also exist if there are too many registers to fit in a single mcdi response.
- * NUM_PAGES in the response will tell you how many there are.
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_IN_PAGE_OFST 0
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_IN_PAGE_LEN 4
-
-/* MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT msgresponse */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_LENMIN 8
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_LENMAX 248
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_LENMAX_MCDI2 1016
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_LEN(num) (8+16*(num))
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_REGS_NUM(len) (((len)-8)/16)
-/* Number of registers dumped in this response */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_NUM_REGS_OFST 0
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_NUM_REGS_LEN 4
-/* How many pages of registers are available to extract */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_NUM_PAGES_OFST 4
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_NUM_PAGES_LEN 4
-/* Array of MC_CMD_DEVEL_DUMP_RHEAD_REGS_ENTRY structs, one for each register
- */
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_REGS_OFST 8
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_REGS_LEN 16
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_REGS_MINNUM 0
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_REGS_MAXNUM 15
-#define MC_CMD_DEVEL_DUMP_RHEAD_REGS_OUT_REGS_MAXNUM_MCDI2 63
+#define MC_CMD_CLIENT_CMD 0x1ba
+#define MC_CMD_CLIENT_CMD_MSGSET 0x1ba
+#undef MC_CMD_0x1ba_PRIVILEGE_CTG
+
+#define MC_CMD_0x1ba_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_CLIENT_CMD_IN msgrequest */
+#define MC_CMD_CLIENT_CMD_IN_LEN 4
+/* The client as which to execute the following command. */
+#define MC_CMD_CLIENT_CMD_IN_CLIENT_ID_OFST 0
+#define MC_CMD_CLIENT_CMD_IN_CLIENT_ID_LEN 4
+
+/* MC_CMD_CLIENT_CMD_OUT msgresponse */
+#define MC_CMD_CLIENT_CMD_OUT_LEN 0
+
+
+/***********************************/
+/* MC_CMD_CLIENT_ALLOC
+ * Create a new client object. Clients are a system for delineating NIC
+ * resource ownership, such that groups of resources may be torn down as a
+ * unit. See also MC_CMD_CLIENT_CMD. See XN-200265-TC for background, concepts
+ * and a glossary. Clients created by this command are known as "dynamic
+ * clients". The newly-created client is a child of the client which sent this
+ * command. The caller must have the GRP_ALLOC_CLIENT privilege. The new client
+ * initially has no permission to do anything; see
+ * MC_CMD_DEVEL_CLIENT_PRIVILEGE_MODIFY.
+ */
+#define MC_CMD_CLIENT_ALLOC 0x1bb
+#define MC_CMD_CLIENT_ALLOC_MSGSET 0x1bb
+#undef MC_CMD_0x1bb_PRIVILEGE_CTG
+
+#define MC_CMD_0x1bb_PRIVILEGE_CTG SRIOV_CTG_ALLOC_CLIENT
+
+/* MC_CMD_CLIENT_ALLOC_IN msgrequest */
+#define MC_CMD_CLIENT_ALLOC_IN_LEN 0
+
+/* MC_CMD_CLIENT_ALLOC_OUT msgresponse */
+#define MC_CMD_CLIENT_ALLOC_OUT_LEN 4
+/* The ID of the new client object which has been created. */
+#define MC_CMD_CLIENT_ALLOC_OUT_CLIENT_ID_OFST 0
+#define MC_CMD_CLIENT_ALLOC_OUT_CLIENT_ID_LEN 4
+
+
+/***********************************/
+/* MC_CMD_CLIENT_FREE
+ * Destroy and release an existing client object. All resources owned by that
+ * client (including its child clients, and thus all resources owned by the
+ * entire family tree) are freed.
+ */
+#define MC_CMD_CLIENT_FREE 0x1bc
+#define MC_CMD_CLIENT_FREE_MSGSET 0x1bc
+#undef MC_CMD_0x1bc_PRIVILEGE_CTG
+
+#define MC_CMD_0x1bc_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_CLIENT_FREE_IN msgrequest */
+#define MC_CMD_CLIENT_FREE_IN_LEN 4
+/* The ID of the client to be freed. This client must be a descendant of the
+ * requestor. A client cannot free itself.
+ */
+#define MC_CMD_CLIENT_FREE_IN_CLIENT_ID_OFST 0
+#define MC_CMD_CLIENT_FREE_IN_CLIENT_ID_LEN 4
+
+/* MC_CMD_CLIENT_FREE_OUT msgresponse */
+#define MC_CMD_CLIENT_FREE_OUT_LEN 0
+
+
+/***********************************/
+/* MC_CMD_SET_VI_USER
+ * Assign partial rights over this VI to another client. VIs have an 'owner'
+ * and a 'user'. The owner is the client which allocated the VI
+ * (MC_CMD_ALLOC_VIS) and cannot be changed. The user is the client which has
+ * permission to create queues and other resources on that VI. Initially
+ * user==owner, but the user can be changed by this command; the resources thus
+ * created are then owned by the user-client. Only the VI owner can call this
+ * command, and the request will fail if there are any outstanding child
+ * resources (e.g. queues) currently allocated from this VI.
+ */
+#define MC_CMD_SET_VI_USER 0x1be
+#define MC_CMD_SET_VI_USER_MSGSET 0x1be
+#undef MC_CMD_0x1be_PRIVILEGE_CTG
+
+#define MC_CMD_0x1be_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_SET_VI_USER_IN msgrequest */
+#define MC_CMD_SET_VI_USER_IN_LEN 8
+/* Function-relative VI number to modify. */
+#define MC_CMD_SET_VI_USER_IN_INSTANCE_OFST 0
+#define MC_CMD_SET_VI_USER_IN_INSTANCE_LEN 4
+/* Client ID to become the new user. This must be a descendant of the owning
+ * client, the owning client itself, or the special value MC_CMD_CLIENT_ID_SELF
+ * which is synonymous with the owning client.
+ */
+#define MC_CMD_SET_VI_USER_IN_CLIENT_ID_OFST 4
+#define MC_CMD_SET_VI_USER_IN_CLIENT_ID_LEN 4
+
+/* MC_CMD_SET_VI_USER_OUT msgresponse */
+#define MC_CMD_SET_VI_USER_OUT_LEN 0
+
+
+/***********************************/
+/* MC_CMD_GET_CLIENT_MAC_ADDRESSES
+ * A device reports a set of MAC addresses for each client to use, known as the
+ * "permanent MAC addresses". Those MAC addresses are provided by the client's
+ * administrator, e.g. via MC_CMD_SET_CLIENT_MAC_ADDRESSES, and are intended as
+ * a hint to that client which MAC address its administrator would like to use
+ * to identity itself. This API exists solely to allow communication of MAC
+ * address from administrator to adminstree, and has no inherent interaction
+ * with switching within the device. There is no guarantee that a client will
+ * be able to send traffic with a source MAC address taken from the list of MAC
+ * address reported, nor is there a guarantee that a client will be able to
+ * resource traffic with a destination MAC taken from the list of MAC
+ * addresses. Likewise, there is no guarantee that a client will not be able to
+ * use a MAC address not present in the list. Restrictions on switching are
+ * controlled either through the EVB API if operating in EVB mode, or via MAE
+ * rules if host software is directly managing the MAE. In order to allow
+ * tenants to use this API whilst a provider is using the EVB API, the MAC
+ * addresses reported by MC_CMD_GET_CLIENT_MAC_ADDRESSES will be augmented with
+ * any MAC addresses associated with the vPort assigned to the caller. In order
+ * to allow tenants to use the EVB API whilst a provider is using this API, if
+ * a client queries the MAC addresses for a vPort using the host_evb_port_id
+ * EVB_PORT_ASSIGNED, that list of MAC addresses will be augmented with the MAC
+ * addresses assigned to the calling client. This query can either be explicit
+ * (i.e. MC_CMD_VPORT_GET_MAC_ADDRESSES) or implicit (e.g. creation of a
+ * vAdaptor with a NULL/automatic MAC address). Changing the MAC address on a
+ * vAdaptor only affects VNIC steering filters; it has no effect on the MAC
+ * addresses assigned to the vAdaptor's owner. VirtIO clients behave as EVB
+ * clients. On VirtIO device reset, a vAdaptor is created with an automatic MAC
+ * address. Querying the VirtIO device's MAC address queries the underlying
+ * vAdaptor's MAC address. Setting the VirtIO device's MAC address sets the
+ * underlying vAdaptor's MAC addresses.
+ */
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES 0x1c4
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_MSGSET 0x1c4
+#undef MC_CMD_0x1c4_PRIVILEGE_CTG
+
+#define MC_CMD_0x1c4_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_GET_CLIENT_MAC_ADDRESSES_IN msgrequest */
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_IN_LEN 4
+/* A handle for the client for whom MAC address should be obtained. Use
+ * CLIENT_HANDLE_SELF to obtain the MAC addresses assigned to the calling
+ * client.
+ */
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_IN_CLIENT_HANDLE_OFST 0
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_IN_CLIENT_HANDLE_LEN 4
+
+/* MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT msgresponse */
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_LENMIN 0
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_LENMAX 252
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_LENMAX_MCDI2 1020
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_LEN(num) (0+6*(num))
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_MAC_ADDRS_NUM(len) (((len)-0)/6)
+/* An array of MAC addresses assigned to the client. */
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_MAC_ADDRS_OFST 0
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_MAC_ADDRS_LEN 6
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_MAC_ADDRS_MINNUM 0
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_MAC_ADDRS_MAXNUM 42
+#define MC_CMD_GET_CLIENT_MAC_ADDRESSES_OUT_MAC_ADDRS_MAXNUM_MCDI2 170
+
+
+/***********************************/
+/* MC_CMD_SET_CLIENT_MAC_ADDRESSES
+ * Set the permanent MAC addresses for a client. The caller must by an
+ * administrator of the target client. See MC_CMD_GET_CLIENT_MAC_ADDRESSES for
+ * additional detail.
+ */
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES 0x1c5
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_MSGSET 0x1c5
+#undef MC_CMD_0x1c5_PRIVILEGE_CTG
+
+#define MC_CMD_0x1c5_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN msgrequest */
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_LENMIN 4
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_LENMAX 250
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_LENMAX_MCDI2 1018
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_LEN(num) (4+6*(num))
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_MAC_ADDRS_NUM(len) (((len)-4)/6)
+/* A handle for the client for whom MAC addresses should be set */
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_CLIENT_HANDLE_OFST 0
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_CLIENT_HANDLE_LEN 4
+/* An array of MAC addresses to assign to the client. */
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_MAC_ADDRS_OFST 4
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_MAC_ADDRS_LEN 6
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_MAC_ADDRS_MINNUM 0
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_MAC_ADDRS_MAXNUM 41
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_IN_MAC_ADDRS_MAXNUM_MCDI2 169
+
+/* MC_CMD_SET_CLIENT_MAC_ADDRESSES_OUT msgresponse */
+#define MC_CMD_SET_CLIENT_MAC_ADDRESSES_OUT_LEN 0
+
+
+/***********************************/
+/* MC_CMD_GET_BOARD_ATTR
+ * Retrieve physical build-level board attributes as configured at
+ * manufacturing stage. Fields originate from EEPROM and per-platform constants
+ * in firmware. Fields are used in development to identify/ differentiate
+ * boards based on build levels/parameters, and also in manufacturing to cross
+ * check "what was programmed in manufacturing" is same as "what firmware
+ * thinks has been programmed" as there are two layers to translation within
+ * firmware before the attributes reach this MCDI handler. Some parameters are
+ * retrieved as part of other commands and therefore not replicated here. See
+ * GET_VERSION_OUT.
+ */
+#define MC_CMD_GET_BOARD_ATTR 0x1c6
+#define MC_CMD_GET_BOARD_ATTR_MSGSET 0x1c6
+#undef MC_CMD_0x1c6_PRIVILEGE_CTG
+
+#define MC_CMD_0x1c6_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_GET_BOARD_ATTR_IN msgrequest */
+#define MC_CMD_GET_BOARD_ATTR_IN_LEN 0
+
+/* MC_CMD_GET_BOARD_ATTR_OUT msgresponse */
+#define MC_CMD_GET_BOARD_ATTR_OUT_LEN 16
+/* Defines board capabilities and validity of attributes returned in this
+ * response-message.
+ */
+#define MC_CMD_GET_BOARD_ATTR_OUT_FLAGS_OFST 0
+#define MC_CMD_GET_BOARD_ATTR_OUT_FLAGS_LEN 4
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_FAN_OFST 0
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_FAN_LBN 0
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_FAN_WIDTH 1
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_SOC_OFST 0
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_SOC_LBN 1
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_SOC_WIDTH 1
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_AUX_POWER_OFST 0
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_AUX_POWER_LBN 2
+#define MC_CMD_GET_BOARD_ATTR_OUT_HAS_AUX_POWER_WIDTH 1
+#define MC_CMD_GET_BOARD_ATTR_OUT_ATTRIBUTES_OFST 4
+#define MC_CMD_GET_BOARD_ATTR_OUT_ATTRIBUTES_LEN 4
+#define MC_CMD_GET_BOARD_ATTR_OUT_SOC_EE_OFST 4
+#define MC_CMD_GET_BOARD_ATTR_OUT_SOC_EE_LBN 0
+#define MC_CMD_GET_BOARD_ATTR_OUT_SOC_EE_WIDTH 1
+#define MC_CMD_GET_BOARD_ATTR_OUT_SUC_EE_OFST 4
+#define MC_CMD_GET_BOARD_ATTR_OUT_SUC_EE_LBN 1
+#define MC_CMD_GET_BOARD_ATTR_OUT_SUC_EE_WIDTH 1
+#define MC_CMD_GET_BOARD_ATTR_OUT_FPGA_VOLTAGES_SUPPORTED_OFST 4
+#define MC_CMD_GET_BOARD_ATTR_OUT_FPGA_VOLTAGES_SUPPORTED_LBN 16
+#define MC_CMD_GET_BOARD_ATTR_OUT_FPGA_VOLTAGES_SUPPORTED_WIDTH 8
+/* enum: The FPGA voltage on the adapter can be set to low */
+#define MC_CMD_FPGA_VOLTAGE_LOW 0x0
+/* enum: The FPGA voltage on the adapter can be set to regular */
+#define MC_CMD_FPGA_VOLTAGE_REG 0x1
+/* enum: The FPGA voltage on the adapter can be set to high */
+#define MC_CMD_FPGA_VOLTAGE_HIGH 0x2
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_COUNT_OFST 4
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_COUNT_LBN 24
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_COUNT_WIDTH 8
+/* An array of cage types on the board */
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_OFST 8
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_LEN 1
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_NUM 8
+/* enum: The cages are not known */
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_UNKNOWN 0x0
+/* enum: The cages are SFP/SFP+ */
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_SFP 0x1
+/* enum: The cages are QSFP/QSFP+ */
+#define MC_CMD_GET_BOARD_ATTR_OUT_CAGE_TYPE_QSFP 0x2
+
+
+/***********************************/
+/* MC_CMD_GET_SOC_STATE
+ * Retrieve current state of the System-on-Chip. This command is valid when
+ * MC_CMD_GET_BOARD_ATTR:HAS_SOC is set.
+ */
+#define MC_CMD_GET_SOC_STATE 0x1c7
+#define MC_CMD_GET_SOC_STATE_MSGSET 0x1c7
+#undef MC_CMD_0x1c7_PRIVILEGE_CTG
+
+#define MC_CMD_0x1c7_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_GET_SOC_STATE_IN msgrequest */
+#define MC_CMD_GET_SOC_STATE_IN_LEN 0
+
+/* MC_CMD_GET_SOC_STATE_OUT msgresponse */
+#define MC_CMD_GET_SOC_STATE_OUT_LEN 12
+/* Status flags for the SoC */
+#define MC_CMD_GET_SOC_STATE_OUT_FLAGS_OFST 0
+#define MC_CMD_GET_SOC_STATE_OUT_FLAGS_LEN 4
+#define MC_CMD_GET_SOC_STATE_OUT_SHOULD_THROTTLE_OFST 0
+#define MC_CMD_GET_SOC_STATE_OUT_SHOULD_THROTTLE_LBN 0
+#define MC_CMD_GET_SOC_STATE_OUT_SHOULD_THROTTLE_WIDTH 1
+#define MC_CMD_GET_SOC_STATE_OUT_OS_RECOVERY_REQUIRED_OFST 0
+#define MC_CMD_GET_SOC_STATE_OUT_OS_RECOVERY_REQUIRED_LBN 1
+#define MC_CMD_GET_SOC_STATE_OUT_OS_RECOVERY_REQUIRED_WIDTH 1
+#define MC_CMD_GET_SOC_STATE_OUT_WDT_FIRED_OFST 0
+#define MC_CMD_GET_SOC_STATE_OUT_WDT_FIRED_LBN 2
+#define MC_CMD_GET_SOC_STATE_OUT_WDT_FIRED_WIDTH 1
+/* Status fields for the SoC */
+#define MC_CMD_GET_SOC_STATE_OUT_ATTRIBUTES_OFST 4
+#define MC_CMD_GET_SOC_STATE_OUT_ATTRIBUTES_LEN 4
+#define MC_CMD_GET_SOC_STATE_OUT_RUN_STATE_OFST 4
+#define MC_CMD_GET_SOC_STATE_OUT_RUN_STATE_LBN 0
+#define MC_CMD_GET_SOC_STATE_OUT_RUN_STATE_WIDTH 8
+/* enum: Power on (set by SUC on power up) */
+#define MC_CMD_GET_SOC_STATE_OUT_SOC_BOOT 0x0
+/* enum: Running bootloader */
+#define MC_CMD_GET_SOC_STATE_OUT_SOC_BOOTLOADER 0x1
+/* enum: Bootloader has started OS. OS is booting */
+#define MC_CMD_GET_SOC_STATE_OUT_SOC_OS_START 0x2
+/* enum: OS is running */
+#define MC_CMD_GET_SOC_STATE_OUT_SOC_OS_RUNNING 0x3
+/* enum: Maintenance OS is running */
+#define MC_CMD_GET_SOC_STATE_OUT_SOC_OS_MAINTENANCE 0x4
+/* Number of SoC resets since power on */
+#define MC_CMD_GET_SOC_STATE_OUT_RESET_COUNT_OFST 8
+#define MC_CMD_GET_SOC_STATE_OUT_RESET_COUNT_LEN 4
+
+
+/***********************************/
+/* MC_CMD_CHECK_SCHEDULER_CREDITS
+ * For debugging purposes. For each source and destination node in the hardware
+ * schedulers, check whether the number of credits is as it should be. This
+ * should only be used when the NIC is idle, because collection is not atomic
+ * and because the expected credit counts are only meaningful when no traffic
+ * is flowing.
+ */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS 0x1c8
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_MSGSET 0x1c8
+#undef MC_CMD_0x1c8_PRIVILEGE_CTG
+
+#define MC_CMD_0x1c8_PRIVILEGE_CTG SRIOV_CTG_ADMIN
+
+/* MC_CMD_CHECK_SCHEDULER_CREDITS_IN msgrequest */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_IN_LEN 8
+/* Flags for the request */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_IN_FLAGS_OFST 0
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_IN_FLAGS_LEN 4
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_IN_REPORT_ALL_OFST 0
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_IN_REPORT_ALL_LBN 0
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_IN_REPORT_ALL_WIDTH 1
+/* If there are too many results to fit into an MCDI response, they're split
+ * into pages. This field specifies which (0-indexed) page to request. A
+ * request with PAGE=0 will snapshot the results, and subsequent requests with
+ * PAGE>0 will return data from the most recent snapshot. The GENERATION field
+ * in the response allows callers to verify that all responses correspond to
+ * the same snapshot.
+ */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_IN_PAGE_OFST 4
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_IN_PAGE_LEN 4
+
+/* MC_CMD_CHECK_SCHEDULER_CREDITS_OUT msgresponse */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_LENMIN 16
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_LENMAX 240
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_LENMAX_MCDI2 1008
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_LEN(num) (16+16*(num))
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_NUM(len) (((len)-16)/16)
+/* The total number of results (across all pages). */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_TOTAL_RESULTS_OFST 0
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_TOTAL_RESULTS_LEN 4
+/* The number of pages that the response is split across. */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_NUM_PAGES_OFST 4
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_NUM_PAGES_LEN 4
+/* The number of results in this response. */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_THIS_PAGE_OFST 8
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_THIS_PAGE_LEN 4
+/* Result generation count. Incremented any time a request is made with PAGE=0.
+ */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_GENERATION_OFST 12
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_GENERATION_LEN 4
+/* The results, as an array of SCHED_CREDIT_CHECK_RESULT structures. */
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_OFST 16
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_LEN 16
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_MINNUM 0
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_MAXNUM 14
+#define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_MAXNUM_MCDI2 62
/* FUNCTION_PERSONALITY structuredef: The meanings of the personalities are
* defined in SF-120734-TC with more information in SF-122717-TC.
@@ -24839,6 +27140,7 @@
* Get a list of the virtio features supported by the device.
*/
#define MC_CMD_VIRTIO_GET_FEATURES 0x168
+#define MC_CMD_VIRTIO_GET_FEATURES_MSGSET 0x168
#undef MC_CMD_0x168_PRIVILEGE_CTG
#define MC_CMD_0x168_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24867,7 +27169,13 @@
#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_OFST 0
#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_LEN 8
#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_LO_OFST 0
+#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_LO_LEN 4
+#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_LO_LBN 0
+#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_LO_WIDTH 32
#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_HI_OFST 4
+#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_HI_LEN 4
+#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_HI_LBN 32
+#define MC_CMD_VIRTIO_GET_FEATURES_OUT_FEATURES_HI_WIDTH 32
/***********************************/
@@ -24877,6 +27185,7 @@
* the driver fails to request a feature which the device requires.
*/
#define MC_CMD_VIRTIO_TEST_FEATURES 0x169
+#define MC_CMD_VIRTIO_TEST_FEATURES_MSGSET 0x169
#undef MC_CMD_0x169_PRIVILEGE_CTG
#define MC_CMD_0x169_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24898,7 +27207,13 @@
#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_OFST 8
#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_LEN 8
#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_LO_OFST 8
+#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_LO_LEN 4
+#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_LO_LBN 64
+#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_LO_WIDTH 32
#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_HI_OFST 12
+#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_HI_LEN 4
+#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_HI_LBN 96
+#define MC_CMD_VIRTIO_TEST_FEATURES_IN_FEATURES_HI_WIDTH 32
/* MC_CMD_VIRTIO_TEST_FEATURES_OUT msgresponse */
#define MC_CMD_VIRTIO_TEST_FEATURES_OUT_LEN 0
@@ -24912,6 +27227,7 @@
* invalid.
*/
#define MC_CMD_VIRTIO_INIT_QUEUE 0x16a
+#define MC_CMD_VIRTIO_INIT_QUEUE_MSGSET 0x16a
#undef MC_CMD_0x16a_PRIVILEGE_CTG
#define MC_CMD_0x16a_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -24956,17 +27272,35 @@
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_OFST 16
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_LEN 8
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_LO_OFST 16
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_LO_LEN 4
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_LO_LBN 128
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_LO_WIDTH 32
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_HI_OFST 20
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_HI_LEN 4
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_HI_LBN 160
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_DESC_TBL_ADDR_HI_WIDTH 32
/* Address of the available ring in the virtqueue. */
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_OFST 24
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_LEN 8
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_LO_OFST 24
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_LO_LEN 4
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_LO_LBN 192
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_LO_WIDTH 32
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_HI_OFST 28
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_HI_LEN 4
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_HI_LBN 224
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_AVAIL_RING_ADDR_HI_WIDTH 32
/* Address of the used ring in the virtqueue. */
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_OFST 32
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_LEN 8
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_LO_OFST 32
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_LO_LEN 4
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_LO_LBN 256
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_LO_WIDTH 32
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_HI_OFST 36
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_HI_LEN 4
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_HI_LBN 288
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_USED_RING_ADDR_HI_WIDTH 32
/* PASID to use on PCIe transactions involving this queue. Ignored if the
* USE_PASID flag is not set.
*/
@@ -24990,7 +27324,13 @@
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_OFST 48
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_LEN 8
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_LO_OFST 48
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_LO_LEN 4
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_LO_LBN 384
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_LO_WIDTH 32
#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_HI_OFST 52
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_HI_LEN 4
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_HI_LBN 416
+#define MC_CMD_VIRTIO_INIT_QUEUE_REQ_FEATURES_HI_WIDTH 32
/* Enum values, see field(s): */
/* MC_CMD_VIRTIO_GET_FEATURES/MC_CMD_VIRTIO_GET_FEATURES_OUT/FEATURES */
/* The initial producer index for this queue's used ring. If this queue is
@@ -25023,6 +27363,7 @@
* Destroy a virtio virtqueue
*/
#define MC_CMD_VIRTIO_FINI_QUEUE 0x16b
+#define MC_CMD_VIRTIO_FINI_QUEUE_MSGSET 0x16b
#undef MC_CMD_0x16b_PRIVILEGE_CTG
#define MC_CMD_0x16b_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -25063,6 +27404,7 @@
* queue(s) to be allocated.
*/
#define MC_CMD_VIRTIO_GET_DOORBELL_OFFSET 0x16c
+#define MC_CMD_VIRTIO_GET_DOORBELL_OFFSET_MSGSET 0x16c
#undef MC_CMD_0x16c_PRIVILEGE_CTG
#define MC_CMD_0x16c_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -25132,12 +27474,18 @@
#define PCIE_FUNCTION_VF_NULL 0xffff
#define PCIE_FUNCTION_VF_LBN 16
#define PCIE_FUNCTION_VF_WIDTH 16
-/* PCIe interface of the function */
+/* PCIe interface of the function. Values should be taken from the
+ * PCIE_INTERFACE enum
+ */
#define PCIE_FUNCTION_INTF_OFST 4
#define PCIE_FUNCTION_INTF_LEN 4
-/* enum: Host PCIe interface */
+/* enum: Host PCIe interface. (Alias for HOST_PRIMARY, provided for backwards
+ * compatibility)
+ */
#define PCIE_FUNCTION_INTF_HOST 0x0
-/* enum: Application Processor interface */
+/* enum: Application Processor interface (alias for NIC_EMBEDDED, provided for
+ * backwards compatibility)
+ */
#define PCIE_FUNCTION_INTF_AP 0x1
#define PCIE_FUNCTION_INTF_LBN 32
#define PCIE_FUNCTION_INTF_WIDTH 32
@@ -25157,6 +27505,7 @@
* MC_CMD_DESC_PROXY_FUNC_COMMIT_IN.
*/
#define MC_CMD_DESC_PROXY_FUNC_CREATE 0x172
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_MSGSET 0x172
#undef MC_CMD_0x172_PRIVILEGE_CTG
#define MC_CMD_0x172_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25170,7 +27519,19 @@
#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_OFST 0
#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_LEN 8
#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_LO_OFST 0
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_LO_LEN 4
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_LO_LBN 0
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_LO_WIDTH 32
#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_HI_OFST 4
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_HI_LEN 4
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_HI_LBN 32
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_HI_WIDTH 32
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_PF_OFST 0
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_PF_LEN 2
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_VF_OFST 2
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_VF_LEN 2
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_INTF_OFST 4
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_INTF_LEN 4
/* The personality to set. The meanings of the personalities are defined in
* SF-120734-TC with more information in SF-122717-TC. At present, we only
* support proxying for VIRTIO_BLK
@@ -25194,7 +27555,19 @@
#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_OFST 4
#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_LEN 8
#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_LO_OFST 4
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_LO_LEN 4
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_LO_LBN 32
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_LO_WIDTH 32
#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_HI_OFST 8
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_HI_LEN 4
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_HI_LBN 64
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_HI_WIDTH 32
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_PF_OFST 4
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_PF_LEN 2
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_VF_OFST 6
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_VF_LEN 2
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_INTF_OFST 8
+#define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_INTF_LEN 4
/***********************************/
@@ -25205,6 +27578,7 @@
* ownership is released.
*/
#define MC_CMD_DESC_PROXY_FUNC_DESTROY 0x173
+#define MC_CMD_DESC_PROXY_FUNC_DESTROY_MSGSET 0x173
#undef MC_CMD_0x173_PRIVILEGE_CTG
#define MC_CMD_0x173_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25235,7 +27609,13 @@
#define VIRTIO_BLK_CONFIG_FEATURES_OFST 0
#define VIRTIO_BLK_CONFIG_FEATURES_LEN 8
#define VIRTIO_BLK_CONFIG_FEATURES_LO_OFST 0
+#define VIRTIO_BLK_CONFIG_FEATURES_LO_LEN 4
+#define VIRTIO_BLK_CONFIG_FEATURES_LO_LBN 0
+#define VIRTIO_BLK_CONFIG_FEATURES_LO_WIDTH 32
#define VIRTIO_BLK_CONFIG_FEATURES_HI_OFST 4
+#define VIRTIO_BLK_CONFIG_FEATURES_HI_LEN 4
+#define VIRTIO_BLK_CONFIG_FEATURES_HI_LBN 32
+#define VIRTIO_BLK_CONFIG_FEATURES_HI_WIDTH 32
#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_BARRIER_OFST 0
#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_BARRIER_LBN 0
#define VIRTIO_BLK_CONFIG_VIRTIO_BLK_F_BARRIER_WIDTH 1
@@ -25308,7 +27688,13 @@
#define VIRTIO_BLK_CONFIG_CAPACITY_OFST 8
#define VIRTIO_BLK_CONFIG_CAPACITY_LEN 8
#define VIRTIO_BLK_CONFIG_CAPACITY_LO_OFST 8
+#define VIRTIO_BLK_CONFIG_CAPACITY_LO_LEN 4
+#define VIRTIO_BLK_CONFIG_CAPACITY_LO_LBN 64
+#define VIRTIO_BLK_CONFIG_CAPACITY_LO_WIDTH 32
#define VIRTIO_BLK_CONFIG_CAPACITY_HI_OFST 12
+#define VIRTIO_BLK_CONFIG_CAPACITY_HI_LEN 4
+#define VIRTIO_BLK_CONFIG_CAPACITY_HI_LBN 96
+#define VIRTIO_BLK_CONFIG_CAPACITY_HI_WIDTH 32
#define VIRTIO_BLK_CONFIG_CAPACITY_LBN 64
#define VIRTIO_BLK_CONFIG_CAPACITY_WIDTH 64
/* Maximum size of any single segment. Only valid when VIRTIO_BLK_F_SIZE_MAX is
@@ -25445,6 +27831,7 @@
* not persisted until the caller commits with MC_CMD_DESC_PROXY_FUNC_COMMIT_IN
*/
#define MC_CMD_DESC_PROXY_FUNC_CONFIG_SET 0x174
+#define MC_CMD_DESC_PROXY_FUNC_CONFIG_SET_MSGSET 0x174
#undef MC_CMD_0x174_PRIVILEGE_CTG
#define MC_CMD_0x174_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25485,6 +27872,7 @@
* delivered to callers MCDI event queue.
*/
#define MC_CMD_DESC_PROXY_FUNC_COMMIT 0x175
+#define MC_CMD_DESC_PROXY_FUNC_COMMIT_MSGSET 0x175
#undef MC_CMD_0x175_PRIVILEGE_CTG
#define MC_CMD_0x175_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25518,6 +27906,7 @@
* cycle. Returns ENODEV if no function with given label exists.
*/
#define MC_CMD_DESC_PROXY_FUNC_OPEN 0x176
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_MSGSET 0x176
#undef MC_CMD_0x176_PRIVILEGE_CTG
#define MC_CMD_0x176_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25543,7 +27932,19 @@
#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_OFST 4
#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_LEN 8
#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_LO_OFST 4
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_LO_LEN 4
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_LO_LBN 32
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_LO_WIDTH 32
#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_HI_OFST 8
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_HI_LEN 4
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_HI_LBN 64
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_HI_WIDTH 32
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_PF_OFST 4
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_PF_LEN 2
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_VF_OFST 6
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_VF_LEN 2
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_INTF_OFST 8
+#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_INTF_LEN 4
/* Function personality */
#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_PERSONALITY_OFST 12
#define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_PERSONALITY_LEN 4
@@ -25588,6 +27989,7 @@
* error (for virtio, DEVICE_NEEDS_RESET flag would be set on the host side)
*/
#define MC_CMD_DESC_PROXY_FUNC_CLOSE 0x1a1
+#define MC_CMD_DESC_PROXY_FUNC_CLOSE_MSGSET 0x1a1
#undef MC_CMD_0x1a1_PRIVILEGE_CTG
#define MC_CMD_0x1a1_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25607,9 +28009,27 @@
#define DESC_PROXY_FUNC_MAP_FUNC_OFST 0
#define DESC_PROXY_FUNC_MAP_FUNC_LEN 8
#define DESC_PROXY_FUNC_MAP_FUNC_LO_OFST 0
+#define DESC_PROXY_FUNC_MAP_FUNC_LO_LEN 4
+#define DESC_PROXY_FUNC_MAP_FUNC_LO_LBN 0
+#define DESC_PROXY_FUNC_MAP_FUNC_LO_WIDTH 32
#define DESC_PROXY_FUNC_MAP_FUNC_HI_OFST 4
+#define DESC_PROXY_FUNC_MAP_FUNC_HI_LEN 4
+#define DESC_PROXY_FUNC_MAP_FUNC_HI_LBN 32
+#define DESC_PROXY_FUNC_MAP_FUNC_HI_WIDTH 32
#define DESC_PROXY_FUNC_MAP_FUNC_LBN 0
#define DESC_PROXY_FUNC_MAP_FUNC_WIDTH 64
+#define DESC_PROXY_FUNC_MAP_FUNC_PF_OFST 0
+#define DESC_PROXY_FUNC_MAP_FUNC_PF_LEN 2
+#define DESC_PROXY_FUNC_MAP_FUNC_PF_LBN 0
+#define DESC_PROXY_FUNC_MAP_FUNC_PF_WIDTH 16
+#define DESC_PROXY_FUNC_MAP_FUNC_VF_OFST 2
+#define DESC_PROXY_FUNC_MAP_FUNC_VF_LEN 2
+#define DESC_PROXY_FUNC_MAP_FUNC_VF_LBN 16
+#define DESC_PROXY_FUNC_MAP_FUNC_VF_WIDTH 16
+#define DESC_PROXY_FUNC_MAP_FUNC_INTF_OFST 4
+#define DESC_PROXY_FUNC_MAP_FUNC_INTF_LEN 4
+#define DESC_PROXY_FUNC_MAP_FUNC_INTF_LBN 32
+#define DESC_PROXY_FUNC_MAP_FUNC_INTF_WIDTH 32
/* Function personality */
#define DESC_PROXY_FUNC_MAP_PERSONALITY_OFST 8
#define DESC_PROXY_FUNC_MAP_PERSONALITY_LEN 4
@@ -25631,6 +28051,7 @@
* Enumerate existing descriptor proxy functions
*/
#define MC_CMD_DESC_PROXY_FUNC_ENUM 0x177
+#define MC_CMD_DESC_PROXY_FUNC_ENUM_MSGSET 0x177
#undef MC_CMD_0x177_PRIVILEGE_CTG
#define MC_CMD_0x177_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25670,6 +28091,7 @@
* function.
*/
#define MC_CMD_DESC_PROXY_FUNC_ENABLE 0x178
+#define MC_CMD_DESC_PROXY_FUNC_ENABLE_MSGSET 0x178
#undef MC_CMD_0x178_PRIVILEGE_CTG
#define MC_CMD_0x178_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25702,6 +28124,7 @@
* Disable descriptor proxying for function
*/
#define MC_CMD_DESC_PROXY_FUNC_DISABLE 0x179
+#define MC_CMD_DESC_PROXY_FUNC_DISABLE_MSGSET 0x179
#undef MC_CMD_0x179_PRIVILEGE_CTG
#define MC_CMD_0x179_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25725,6 +28148,7 @@
* descriptors.
*/
#define MC_CMD_GET_ADDR_SPC_ID 0x1a0
+#define MC_CMD_GET_ADDR_SPC_ID_MSGSET 0x1a0
#undef MC_CMD_0x1a0_PRIVILEGE_CTG
#define MC_CMD_0x1a0_PRIVILEGE_CTG SRIOV_CTG_ADMIN
@@ -25769,7 +28193,19 @@
#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_OFST 4
#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_LEN 8
#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_LO_OFST 4
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_LO_LEN 4
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_LO_LBN 32
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_LO_WIDTH 32
#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_HI_OFST 8
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_HI_LEN 4
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_HI_LBN 64
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_HI_WIDTH 32
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_PF_OFST 4
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_PF_LEN 2
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_VF_OFST 6
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_VF_LEN 2
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_INTF_OFST 8
+#define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_INTF_LEN 4
/* PASID value. Only valid if TYPE is PCI_FUNC_PASID. */
#define MC_CMD_GET_ADDR_SPC_ID_IN_PASID_OFST 12
#define MC_CMD_GET_ADDR_SPC_ID_IN_PASID_LEN 4
@@ -25789,7 +28225,72 @@
#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_OFST 0
#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_LEN 8
#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_LO_OFST 0
+#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_LO_LEN 4
+#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_LO_LBN 0
+#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_LO_WIDTH 32
#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_HI_OFST 4
+#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_HI_LEN 4
+#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_HI_LBN 32
+#define MC_CMD_GET_ADDR_SPC_ID_OUT_ADDR_SPC_ID_HI_WIDTH 32
+
+
+/***********************************/
+/* MC_CMD_GET_CLIENT_HANDLE
+ * Obtain a handle for a client given a description of that client. N.B. this
+ * command is subject to change given the open discussion about how PCIe
+ * functions should be referenced on an iEP (integrated endpoint: functions
+ * span multiple buses) and multihost (multiple PCIe interfaces) system.
+ */
+#define MC_CMD_GET_CLIENT_HANDLE 0x1c3
+#define MC_CMD_GET_CLIENT_HANDLE_MSGSET 0x1c3
+#undef MC_CMD_0x1c3_PRIVILEGE_CTG
+
+#define MC_CMD_0x1c3_PRIVILEGE_CTG SRIOV_CTG_GENERAL
+
+/* MC_CMD_GET_CLIENT_HANDLE_IN msgrequest */
+#define MC_CMD_GET_CLIENT_HANDLE_IN_LEN 12
+/* Type of client to get a client handle for */
+#define MC_CMD_GET_CLIENT_HANDLE_IN_TYPE_OFST 0
+#define MC_CMD_GET_CLIENT_HANDLE_IN_TYPE_LEN 4
+/* enum: Obtain a client handle for a PCIe function-type client. */
+#define MC_CMD_GET_CLIENT_HANDLE_IN_TYPE_FUNC 0x0
+/* PCIe Function ID (as struct PCIE_FUNCTION). Valid when TYPE==FUNC. Use: -
+ * INTF=CALLER, PF=PF_NULL, VF=VF_NULL to refer to the calling function -
+ * INTF=CALLER, PF=PF_NULL, VF=... to refer to a VF child of the calling PF or
+ * a sibling VF of the calling VF. - INTF=CALLER, PF=..., VF=VF_NULL to refer
+ * to a PF on the calling interface - INTF=CALLER, PF=..., VF=... to refer to a
+ * VF on the calling interface - INTF=..., PF=..., VF=VF_NULL to refer to a PF
+ * on a named interface - INTF=..., PF=..., VF=... to refer to a VF on a named
+ * interface where ... refers to a small integer for the VF/PF fields, and to
+ * values from the PCIE_INTERFACE enum for for the INTF field. It's only
+ * meaningful to use INTF=CALLER within a structure that's an argument to
+ * MC_CMD_DEVEL_GET_CLIENT_HANDLE.
+ */
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_OFST 4
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_LEN 8
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_LO_OFST 4
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_LO_LEN 4
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_LO_LBN 32
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_LO_WIDTH 32
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_HI_OFST 8
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_HI_LEN 4
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_HI_LBN 64
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_HI_WIDTH 32
+/* enum: NULL value for the INTF field of struct PCIE_FUNCTION. Provided for
+ * backwards compatibility only, callers should use PCIE_INTERFACE_CALLER.
+ */
+#define MC_CMD_GET_CLIENT_HANDLE_IN_PCIE_FUNCTION_INTF_NULL 0xffffffff
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_PF_OFST 4
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_PF_LEN 2
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_VF_OFST 6
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_VF_LEN 2
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_INTF_OFST 8
+#define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_INTF_LEN 4
+
+/* MC_CMD_GET_CLIENT_HANDLE_OUT msgresponse */
+#define MC_CMD_GET_CLIENT_HANDLE_OUT_LEN 4
+#define MC_CMD_GET_CLIENT_HANDLE_OUT_HANDLE_OFST 0
+#define MC_CMD_GET_CLIENT_HANDLE_OUT_HANDLE_LEN 4
/* MAE_FIELD_FLAGS structuredef */
#define MAE_FIELD_FLAGS_LEN 4
@@ -25937,6 +28438,40 @@
#define MAE_ENC_FIELD_PAIRS_ENC_IP_TTL_MASK_LEN 1
#define MAE_ENC_FIELD_PAIRS_ENC_IP_TTL_MASK_LBN 1096
#define MAE_ENC_FIELD_PAIRS_ENC_IP_TTL_MASK_WIDTH 8
+#define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_OFST 138
+#define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_LEN 1
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_OVLAN_OFST 138
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_OVLAN_LBN 0
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_OVLAN_WIDTH 1
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_IVLAN_OFST 138
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_IVLAN_LBN 1
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_IVLAN_WIDTH 1
+#define MAE_ENC_FIELD_PAIRS_ENC_IP_FRAG_OFST 138
+#define MAE_ENC_FIELD_PAIRS_ENC_IP_FRAG_LBN 2
+#define MAE_ENC_FIELD_PAIRS_ENC_IP_FRAG_WIDTH 1
+#define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_LBN 1104
+#define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_WIDTH 8
+#define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_OFST 138
+#define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_LEN 1
+#define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_LBN 1104
+#define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_WIDTH 8
+#define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_MASK_OFST 139
+#define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_MASK_LEN 1
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_OVLAN_MASK_OFST 139
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_OVLAN_MASK_LBN 0
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_OVLAN_MASK_WIDTH 1
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_IVLAN_MASK_OFST 139
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_IVLAN_MASK_LBN 1
+#define MAE_ENC_FIELD_PAIRS_ENC_HAS_IVLAN_MASK_WIDTH 1
+#define MAE_ENC_FIELD_PAIRS_ENC_IP_FRAG_MASK_OFST 139
+#define MAE_ENC_FIELD_PAIRS_ENC_IP_FRAG_MASK_LBN 2
+#define MAE_ENC_FIELD_PAIRS_ENC_IP_FRAG_MASK_WIDTH 1
+#define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_MASK_LBN 1112
+#define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_MASK_WIDTH 8
+#define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_MASK_OFST 139
+#define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_MASK_LEN 1
+#define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_MASK_LBN 1112
+#define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_MASK_WIDTH 8
#define MAE_ENC_FIELD_PAIRS_ENC_IP_FLAGS_BE_OFST 140
#define MAE_ENC_FIELD_PAIRS_ENC_IP_FLAGS_BE_LEN 4
#define MAE_ENC_FIELD_PAIRS_ENC_IP_FLAGS_BE_LBN 1120
@@ -26623,9 +29158,24 @@
#define MAE_FIELD_MASK_VALUE_PAIRS_V2_IS_FROM_NETWORK_OFST 344
#define MAE_FIELD_MASK_VALUE_PAIRS_V2_IS_FROM_NETWORK_LBN 3
#define MAE_FIELD_MASK_VALUE_PAIRS_V2_IS_FROM_NETWORK_WIDTH 1
-#define MAE_FIELD_MASK_VALUE_PAIRS_V2_RSVD_OFST 344
-#define MAE_FIELD_MASK_VALUE_PAIRS_V2_RSVD_LBN 4
-#define MAE_FIELD_MASK_VALUE_PAIRS_V2_RSVD_WIDTH 28
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_HAS_OVLAN_OFST 344
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_HAS_OVLAN_LBN 4
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_HAS_OVLAN_WIDTH 1
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_HAS_IVLAN_OFST 344
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_HAS_IVLAN_LBN 5
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_HAS_IVLAN_WIDTH 1
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_ENC_HAS_OVLAN_OFST 344
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_ENC_HAS_OVLAN_LBN 6
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_ENC_HAS_OVLAN_WIDTH 1
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_ENC_HAS_IVLAN_OFST 344
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_ENC_HAS_IVLAN_LBN 7
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_ENC_HAS_IVLAN_WIDTH 1
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_TCP_SYN_FIN_RST_OFST 344
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_TCP_SYN_FIN_RST_LBN 8
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_TCP_SYN_FIN_RST_WIDTH 1
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_IP_FIRST_FRAG_OFST 344
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_IP_FIRST_FRAG_LBN 9
+#define MAE_FIELD_MASK_VALUE_PAIRS_V2_IP_FIRST_FRAG_WIDTH 1
#define MAE_FIELD_MASK_VALUE_PAIRS_V2_FLAGS_LBN 2752
#define MAE_FIELD_MASK_VALUE_PAIRS_V2_FLAGS_WIDTH 32
#define MAE_FIELD_MASK_VALUE_PAIRS_V2_FLAGS_MASK_OFST 348
@@ -26707,16 +29257,34 @@
#define MAE_MPORT_SELECTOR_TYPE_WIDTH 8
/* enum: The MPORT connected to a given physical port */
#define MAE_MPORT_SELECTOR_TYPE_PPORT 0x2
-/* enum: The MPORT assigned to a given PCIe function */
+/* enum: The MPORT assigned to a given PCIe function. Deprecated in favour of
+ * MH_FUNC.
+ */
#define MAE_MPORT_SELECTOR_TYPE_FUNC 0x3
/* enum: An mport_id */
#define MAE_MPORT_SELECTOR_TYPE_MPORT_ID 0x4
+/* enum: The MPORT assigned to a given PCIe function (see also FWRIVERHD-1108)
+ */
+#define MAE_MPORT_SELECTOR_TYPE_MH_FUNC 0x5
+/* enum: This is guaranteed never to be a valid selector type */
+#define MAE_MPORT_SELECTOR_TYPE_INVALID 0xff
#define MAE_MPORT_SELECTOR_MPORT_ID_OFST 0
#define MAE_MPORT_SELECTOR_MPORT_ID_LBN 0
#define MAE_MPORT_SELECTOR_MPORT_ID_WIDTH 24
#define MAE_MPORT_SELECTOR_PPORT_ID_OFST 0
#define MAE_MPORT_SELECTOR_PPORT_ID_LBN 0
#define MAE_MPORT_SELECTOR_PPORT_ID_WIDTH 4
+#define MAE_MPORT_SELECTOR_FUNC_INTF_ID_OFST 0
+#define MAE_MPORT_SELECTOR_FUNC_INTF_ID_LBN 20
+#define MAE_MPORT_SELECTOR_FUNC_INTF_ID_WIDTH 4
+#define MAE_MPORT_SELECTOR_HOST_PRIMARY 0x1 /* enum */
+#define MAE_MPORT_SELECTOR_NIC_EMBEDDED 0x2 /* enum */
+/* enum: Deprecated, use CALLER_INTF instead. */
+#define MAE_MPORT_SELECTOR_CALLER 0xf
+#define MAE_MPORT_SELECTOR_CALLER_INTF 0xf /* enum */
+#define MAE_MPORT_SELECTOR_FUNC_MH_PF_ID_OFST 0
+#define MAE_MPORT_SELECTOR_FUNC_MH_PF_ID_LBN 16
+#define MAE_MPORT_SELECTOR_FUNC_MH_PF_ID_WIDTH 4
#define MAE_MPORT_SELECTOR_FUNC_PF_ID_OFST 0
#define MAE_MPORT_SELECTOR_FUNC_PF_ID_LBN 16
#define MAE_MPORT_SELECTOR_FUNC_PF_ID_WIDTH 8
@@ -26737,15 +29305,56 @@
* function.
*/
#define MAE_MPORT_SELECTOR_FUNC_PF_ID_CALLER 0xff
+/* enum: Same as PF_ID_CALLER, but for use in the smaller MH_PF_ID field. Only
+ * valid if FUNC_INTF_ID is CALLER.
+ */
+#define MAE_MPORT_SELECTOR_FUNC_MH_PF_ID_CALLER 0xf
#define MAE_MPORT_SELECTOR_FLAT_LBN 0
#define MAE_MPORT_SELECTOR_FLAT_WIDTH 32
+/* MAE_LINK_ENDPOINT_SELECTOR structuredef: Structure that identifies a real or
+ * virtual network port by MAE port and link end
+ */
+#define MAE_LINK_ENDPOINT_SELECTOR_LEN 8
+/* The MAE MPORT of interest */
+#define MAE_LINK_ENDPOINT_SELECTOR_MPORT_SELECTOR_OFST 0
+#define MAE_LINK_ENDPOINT_SELECTOR_MPORT_SELECTOR_LEN 4
+#define MAE_LINK_ENDPOINT_SELECTOR_MPORT_SELECTOR_LBN 0
+#define MAE_LINK_ENDPOINT_SELECTOR_MPORT_SELECTOR_WIDTH 32
+/* Which end of the link identified by MPORT to consider */
+#define MAE_LINK_ENDPOINT_SELECTOR_LINK_END_OFST 4
+#define MAE_LINK_ENDPOINT_SELECTOR_LINK_END_LEN 4
+/* Enum values, see field(s): */
+/* MAE_MPORT_END */
+#define MAE_LINK_ENDPOINT_SELECTOR_LINK_END_LBN 32
+#define MAE_LINK_ENDPOINT_SELECTOR_LINK_END_WIDTH 32
+/* A field for accessing the endpoint selector as a collection of bits */
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_OFST 0
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_LEN 8
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_LO_OFST 0
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_LO_LEN 4
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_LO_LBN 0
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_LO_WIDTH 32
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_HI_OFST 4
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_HI_LEN 4
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_HI_LBN 32
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_HI_WIDTH 32
+/* enum: Set FLAT to this value to obtain backward-compatible behaviour in
+ * commands that have been extended to take a MAE_LINK_ENDPOINT_SELECTOR
+ * argument. New commands that are designed to take such an argument from the
+ * start will not support this.
+ */
+#define MAE_LINK_ENDPOINT_SELECTOR_MAE_LINK_ENDPOINT_COMPAT 0x0
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_LBN 0
+#define MAE_LINK_ENDPOINT_SELECTOR_FLAT_WIDTH 64
+
/***********************************/
/* MC_CMD_MAE_GET_CAPS
* Describes capabilities of the MAE (Match-Action Engine)
*/
#define MC_CMD_MAE_GET_CAPS 0x140
+#define MC_CMD_MAE_GET_CAPS_MSGSET 0x140
#undef MC_CMD_0x140_PRIVILEGE_CTG
#define MC_CMD_0x140_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -26772,6 +29381,9 @@
#define MC_CMD_MAE_GET_CAPS_OUT_ENCAP_TYPE_GENEVE_OFST 4
#define MC_CMD_MAE_GET_CAPS_OUT_ENCAP_TYPE_GENEVE_LBN 2
#define MC_CMD_MAE_GET_CAPS_OUT_ENCAP_TYPE_GENEVE_WIDTH 1
+#define MC_CMD_MAE_GET_CAPS_OUT_ENCAP_TYPE_L2GRE_OFST 4
+#define MC_CMD_MAE_GET_CAPS_OUT_ENCAP_TYPE_L2GRE_LBN 3
+#define MC_CMD_MAE_GET_CAPS_OUT_ENCAP_TYPE_L2GRE_WIDTH 1
/* The total number of counters available to allocate. */
#define MC_CMD_MAE_GET_CAPS_OUT_COUNTERS_OFST 8
#define MC_CMD_MAE_GET_CAPS_OUT_COUNTERS_LEN 4
@@ -26823,6 +29435,7 @@
* Get a level of support for match fields when used in match-action rules
*/
#define MC_CMD_MAE_GET_AR_CAPS 0x141
+#define MC_CMD_MAE_GET_AR_CAPS_MSGSET 0x141
#undef MC_CMD_0x141_PRIVILEGE_CTG
#define MC_CMD_0x141_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -26855,6 +29468,7 @@
* Get a level of support for fields used in outer rule keys.
*/
#define MC_CMD_MAE_GET_OR_CAPS 0x142
+#define MC_CMD_MAE_GET_OR_CAPS_MSGSET 0x142
#undef MC_CMD_0x142_PRIVILEGE_CTG
#define MC_CMD_0x142_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -26885,6 +29499,7 @@
* Rules.
*/
#define MC_CMD_MAE_COUNTER_ALLOC 0x143
+#define MC_CMD_MAE_COUNTER_ALLOC_MSGSET 0x143
#undef MC_CMD_0x143_PRIVILEGE_CTG
#define MC_CMD_0x143_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -26928,6 +29543,7 @@
* Free match-action-engine counters
*/
#define MC_CMD_MAE_COUNTER_FREE 0x144
+#define MC_CMD_MAE_COUNTER_FREE_MSGSET 0x144
#undef MC_CMD_0x144_PRIVILEGE_CTG
#define MC_CMD_0x144_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -26995,6 +29611,7 @@
* delivering packets to the current queue first.
*/
#define MC_CMD_MAE_COUNTERS_STREAM_START 0x151
+#define MC_CMD_MAE_COUNTERS_STREAM_START_MSGSET 0x151
#undef MC_CMD_0x151_PRIVILEGE_CTG
#define MC_CMD_0x151_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27031,6 +29648,7 @@
* Stop streaming counter values to the specified RxQ.
*/
#define MC_CMD_MAE_COUNTERS_STREAM_STOP 0x152
+#define MC_CMD_MAE_COUNTERS_STREAM_STOP_MSGSET 0x152
#undef MC_CMD_0x152_PRIVILEGE_CTG
#define MC_CMD_0x152_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27060,6 +29678,7 @@
* MAE_COUNTERS_PACKETISER_STREAM_START/PACKET_SIZE and rung the doorbell.
*/
#define MC_CMD_MAE_COUNTERS_STREAM_GIVE_CREDITS 0x153
+#define MC_CMD_MAE_COUNTERS_STREAM_GIVE_CREDITS_MSGSET 0x153
#undef MC_CMD_0x153_PRIVILEGE_CTG
#define MC_CMD_0x153_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27076,9 +29695,15 @@
/***********************************/
/* MC_CMD_MAE_ENCAP_HEADER_ALLOC
- * Allocate encap action metadata
+ * Allocate an encapsulation header to be used in an Action Rule response. The
+ * header must be constructed as a valid packet with 0-length payload.
+ * Specifically, the L3/L4 lengths & checksums will only be incrementally fixed
+ * by the NIC, rather than recomputed entirely. Currently only IPv4, IPv6 and
+ * UDP are supported. If the maximum number of headers have already been
+ * allocated then the command will fail with MC_CMD_ERR_ENOSPC.
*/
#define MC_CMD_MAE_ENCAP_HEADER_ALLOC 0x148
+#define MC_CMD_MAE_ENCAP_HEADER_ALLOC_MSGSET 0x148
#undef MC_CMD_0x148_PRIVILEGE_CTG
#define MC_CMD_0x148_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27109,9 +29734,10 @@
/***********************************/
/* MC_CMD_MAE_ENCAP_HEADER_UPDATE
- * Update encap action metadata
+ * Update encap action metadata. See comments for MAE_ENCAP_HEADER_ALLOC.
*/
#define MC_CMD_MAE_ENCAP_HEADER_UPDATE 0x149
+#define MC_CMD_MAE_ENCAP_HEADER_UPDATE_MSGSET 0x149
#undef MC_CMD_0x149_PRIVILEGE_CTG
#define MC_CMD_0x149_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27141,6 +29767,7 @@
* Free encap action metadata
*/
#define MC_CMD_MAE_ENCAP_HEADER_FREE 0x14a
+#define MC_CMD_MAE_ENCAP_HEADER_FREE_MSGSET 0x14a
#undef MC_CMD_0x14a_PRIVILEGE_CTG
#define MC_CMD_0x14a_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27176,9 +29803,12 @@
/* MC_CMD_MAE_MAC_ADDR_ALLOC
* Allocate MAC address. Hardware implementations have MAC addresses programmed
* into an indirection table, and clients should take care not to allocate the
- * same MAC address twice (but instead reuse its ID).
+ * same MAC address twice (but instead reuse its ID). If the maximum number of
+ * MAC addresses have already been allocated then the command will fail with
+ * MC_CMD_ERR_ENOSPC.
*/
#define MC_CMD_MAE_MAC_ADDR_ALLOC 0x15e
+#define MC_CMD_MAE_MAC_ADDR_ALLOC_MSGSET 0x15e
#undef MC_CMD_0x15e_PRIVILEGE_CTG
#define MC_CMD_0x15e_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27204,6 +29834,7 @@
* Free MAC address.
*/
#define MC_CMD_MAE_MAC_ADDR_FREE 0x15f
+#define MC_CMD_MAE_MAC_ADDR_FREE_MSGSET 0x15f
#undef MC_CMD_0x15f_PRIVILEGE_CTG
#define MC_CMD_0x15f_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27238,9 +29869,12 @@
/***********************************/
/* MC_CMD_MAE_ACTION_SET_ALLOC
* Allocate an action set, which can be referenced either in response to an
- * Action Rule, or as part of an Action Set List.
+ * Action Rule, or as part of an Action Set List. If the maxmimum number of
+ * action sets have already been allocated then the command will fail with
+ * MC_CMD_ERR_ENOSPC.
*/
#define MC_CMD_MAE_ACTION_SET_ALLOC 0x14d
+#define MC_CMD_MAE_ACTION_SET_ALLOC_MSGSET 0x14d
#undef MC_CMD_0x14d_PRIVILEGE_CTG
#define MC_CMD_0x14d_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27267,6 +29901,15 @@
#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_NAT_OFST 0
#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_NAT_LBN 11
#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_NAT_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_DECR_IP_TTL_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_DECR_IP_TTL_LBN 12
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_DECR_IP_TTL_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_SET_SRC_MPORT_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_SET_SRC_MPORT_LBN 13
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_SET_SRC_MPORT_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_SUPPRESS_SELF_DELIVERY_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_SUPPRESS_SELF_DELIVERY_LBN 14
+#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_SUPPRESS_SELF_DELIVERY_WIDTH 1
/* If VLAN_PUSH >= 1, TCI value to be inserted as outermost VLAN. */
#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_VLAN0_TCI_BE_OFST 4
#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_VLAN0_TCI_BE_LEN 2
@@ -27313,8 +29956,135 @@
#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DST_MAC_ID_OFST 40
#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DST_MAC_ID_LEN 4
+/* MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN msgrequest: Only supported if
+ * MAE_ACTION_SET_ALLOC_V2_SUPPORTED is advertised in
+ * MC_CMD_GET_CAPABILITIES_V7_OUT.
+ */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_LEN 51
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_FLAGS_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_FLAGS_LEN 4
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN_PUSH_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN_PUSH_LBN 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN_PUSH_WIDTH 2
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN_POP_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN_POP_LBN 4
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN_POP_WIDTH 2
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DECAP_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DECAP_LBN 8
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DECAP_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_MARK_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_MARK_LBN 9
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_MARK_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_FLAG_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_FLAG_LBN 10
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_FLAG_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_NAT_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_NAT_LBN 11
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_NAT_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DECR_IP_TTL_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DECR_IP_TTL_LBN 12
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DECR_IP_TTL_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_SET_SRC_MPORT_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_SET_SRC_MPORT_LBN 13
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_SET_SRC_MPORT_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_SUPPRESS_SELF_DELIVERY_OFST 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_SUPPRESS_SELF_DELIVERY_LBN 14
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_SUPPRESS_SELF_DELIVERY_WIDTH 1
+/* If VLAN_PUSH >= 1, TCI value to be inserted as outermost VLAN. */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN0_TCI_BE_OFST 4
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN0_TCI_BE_LEN 2
+/* If VLAN_PUSH >= 1, TPID value to be inserted as outermost VLAN. */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN0_PROTO_BE_OFST 6
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN0_PROTO_BE_LEN 2
+/* If VLAN_PUSH == 2, inner TCI value to be inserted. */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN1_TCI_BE_OFST 8
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN1_TCI_BE_LEN 2
+/* If VLAN_PUSH == 2, inner TPID value to be inserted. */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN1_PROTO_BE_OFST 10
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN1_PROTO_BE_LEN 2
+/* Reserved. Ignored by firmware. Should be set to zero or 0xffffffff. */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_RSVD_OFST 12
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_RSVD_LEN 4
+/* Set to ENCAP_HEADER_ID_NULL to request no encap action */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ENCAP_HEADER_ID_OFST 16
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ENCAP_HEADER_ID_LEN 4
+/* An m-port selector identifying the m-port that the modified packet should be
+ * delivered to. Set to MPORT_SELECTOR_NULL to request no delivery of the
+ * packet.
+ */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DELIVER_OFST 20
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DELIVER_LEN 4
+/* Allows an action set to trigger several counter updates. Set to
+ * COUNTER_LIST_ID_NULL to request no counter action.
+ */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_COUNTER_LIST_ID_OFST 24
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_COUNTER_LIST_ID_LEN 4
+/* If a driver only wished to update one counter within this action set, then
+ * it can supply a COUNTER_ID instead of allocating a single-element counter
+ * list. This field should be set to COUNTER_ID_NULL if this behaviour is not
+ * required. It is not valid to supply a non-NULL value for both
+ * COUNTER_LIST_ID and COUNTER_ID.
+ */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_COUNTER_ID_OFST 28
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_COUNTER_ID_LEN 4
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_MARK_VALUE_OFST 32
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_MARK_VALUE_LEN 4
+/* Set to MAC_ID_NULL to request no source MAC replacement. */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_SRC_MAC_ID_OFST 36
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_SRC_MAC_ID_LEN 4
+/* Set to MAC_ID_NULL to request no destination MAC replacement. */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DST_MAC_ID_OFST 40
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DST_MAC_ID_LEN 4
+/* Source m-port ID to be reported for DO_SET_SRC_MPORT action. */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_REPORTED_SRC_MPORT_OFST 44
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_REPORTED_SRC_MPORT_LEN 4
+/* Actions for modifying the Differentiated Services Code-Point (DSCP) bits
+ * within IPv4 and IPv6 headers.
+ */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DSCP_CONTROL_OFST 48
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DSCP_CONTROL_LEN 2
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DSCP_ENCAP_COPY_OFST 48
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DSCP_ENCAP_COPY_LBN 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DSCP_ENCAP_COPY_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DSCP_DECAP_COPY_OFST 48
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DSCP_DECAP_COPY_LBN 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_DSCP_DECAP_COPY_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_DSCP_OFST 48
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_DSCP_LBN 2
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_DSCP_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DSCP_VALUE_OFST 48
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DSCP_VALUE_LBN 3
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DSCP_VALUE_WIDTH 6
+/* Actions for modifying the Explicit Congestion Notification (ECN) bits within
+ * IPv4 and IPv6 headers.
+ */
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_CONTROL_OFST 50
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_CONTROL_LEN 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_ECN_ENCAP_COPY_OFST 50
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_ECN_ENCAP_COPY_LBN 0
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_ECN_ENCAP_COPY_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_ECN_DECAP_COPY_OFST 50
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_ECN_DECAP_COPY_LBN 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_ECN_DECAP_COPY_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_ECN_OFST 50
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_ECN_LBN 2
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_ECN_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_VALUE_OFST 50
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_VALUE_LBN 3
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_VALUE_WIDTH 2
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_ECT_0_TO_CE_OFST 50
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_ECT_0_TO_CE_LBN 5
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_ECT_0_TO_CE_WIDTH 1
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_ECT_1_TO_CE_OFST 50
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_ECT_1_TO_CE_LBN 6
+#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_ECT_1_TO_CE_WIDTH 1
+
/* MC_CMD_MAE_ACTION_SET_ALLOC_OUT msgresponse */
#define MC_CMD_MAE_ACTION_SET_ALLOC_OUT_LEN 4
+/* The MSB of the AS_ID is guaranteed to be clear if the ID is not
+ * ACTION_SET_ID_NULL. This allows an AS_ID to be distinguished from an ASL_ID
+ * returned from MC_CMD_MAE_ACTION_SET_LIST_ALLOC.
+ */
#define MC_CMD_MAE_ACTION_SET_ALLOC_OUT_AS_ID_OFST 0
#define MC_CMD_MAE_ACTION_SET_ALLOC_OUT_AS_ID_LEN 4
/* enum: An action set ID that is guaranteed never to represent an action set
@@ -27326,6 +30096,7 @@
/* MC_CMD_MAE_ACTION_SET_FREE
*/
#define MC_CMD_MAE_ACTION_SET_FREE 0x14e
+#define MC_CMD_MAE_ACTION_SET_FREE_MSGSET 0x14e
#undef MC_CMD_0x14e_PRIVILEGE_CTG
#define MC_CMD_0x14e_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27361,9 +30132,12 @@
/* MC_CMD_MAE_ACTION_SET_LIST_ALLOC
* Allocate an action set list (ASL) that can be referenced by an ID. The ASL
* ID can be used when inserting an action rule, so that for each packet
- * matching the rule every action set in the list is applied.
+ * matching the rule every action set in the list is applied. If the maximum
+ * number of ASLs have already been allocated then the command will fail with
+ * MC_CMD_ERR_ENOSPC.
*/
#define MC_CMD_MAE_ACTION_SET_LIST_ALLOC 0x14f
+#define MC_CMD_MAE_ACTION_SET_LIST_ALLOC_MSGSET 0x14f
#undef MC_CMD_0x14f_PRIVILEGE_CTG
#define MC_CMD_0x14f_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27394,6 +30168,9 @@
/* MC_CMD_MAE_ACTION_SET_LIST_ALLOC_OUT msgresponse */
#define MC_CMD_MAE_ACTION_SET_LIST_ALLOC_OUT_LEN 4
+/* The MSB of the ASL_ID is guaranteed to be set. This allows an ASL_ID to be
+ * distinguished from an AS_ID returned from MC_CMD_MAE_ACTION_SET_ALLOC.
+ */
#define MC_CMD_MAE_ACTION_SET_LIST_ALLOC_OUT_ASL_ID_OFST 0
#define MC_CMD_MAE_ACTION_SET_LIST_ALLOC_OUT_ASL_ID_LEN 4
/* enum: An action set list ID that is guaranteed never to represent an action
@@ -27407,6 +30184,7 @@
* Free match-action-engine redirect_lists
*/
#define MC_CMD_MAE_ACTION_SET_LIST_FREE 0x150
+#define MC_CMD_MAE_ACTION_SET_LIST_FREE_MSGSET 0x150
#undef MC_CMD_0x150_PRIVILEGE_CTG
#define MC_CMD_0x150_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27441,9 +30219,11 @@
/***********************************/
/* MC_CMD_MAE_OUTER_RULE_INSERT
* Inserts an Outer Rule, which controls encapsulation parsing, and may
- * influence the Lookup Sequence.
+ * influence the Lookup Sequence. If the maximum number of rules have already
+ * been inserted then the command will fail with MC_CMD_ERR_ENOSPC.
*/
#define MC_CMD_MAE_OUTER_RULE_INSERT 0x15a
+#define MC_CMD_MAE_OUTER_RULE_INSERT_MSGSET 0x15a
#undef MC_CMD_0x15a_PRIVILEGE_CTG
#define MC_CMD_0x15a_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27504,6 +30284,7 @@
/* MC_CMD_MAE_OUTER_RULE_REMOVE
*/
#define MC_CMD_MAE_OUTER_RULE_REMOVE 0x15b
+#define MC_CMD_MAE_OUTER_RULE_REMOVE_MSGSET 0x15b
#undef MC_CMD_0x15b_PRIVILEGE_CTG
#define MC_CMD_0x15b_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27583,9 +30364,11 @@
/* MC_CMD_MAE_ACTION_RULE_INSERT
* Insert a rule specify that packets matching a filter be processed according
* to a previous allocated action. Masks can be set as indicated by
- * MC_CMD_MAE_GET_MATCH_FIELD_CAPABILITIES.
+ * MC_CMD_MAE_GET_MATCH_FIELD_CAPABILITIES. If the maximum number of rules have
+ * already been inserted then the command will fail with MC_CMD_ERR_ENOSPC.
*/
#define MC_CMD_MAE_ACTION_RULE_INSERT 0x15c
+#define MC_CMD_MAE_ACTION_RULE_INSERT_MSGSET 0x15c
#undef MC_CMD_0x15c_PRIVILEGE_CTG
#define MC_CMD_0x15c_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27627,6 +30410,7 @@
* ENOTSUP, in which case the driver should DELETE/INSERT.
*/
#define MC_CMD_MAE_ACTION_RULE_UPDATE 0x15d
+#define MC_CMD_MAE_ACTION_RULE_UPDATE_MSGSET 0x15d
#undef MC_CMD_0x15d_PRIVILEGE_CTG
#define MC_CMD_0x15d_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27648,6 +30432,7 @@
/* MC_CMD_MAE_ACTION_RULE_DELETE
*/
#define MC_CMD_MAE_ACTION_RULE_DELETE 0x155
+#define MC_CMD_MAE_ACTION_RULE_DELETE_MSGSET 0x155
#undef MC_CMD_0x155_PRIVILEGE_CTG
#define MC_CMD_0x155_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27684,6 +30469,7 @@
* Return the m-port corresponding to a selector.
*/
#define MC_CMD_MAE_MPORT_LOOKUP 0x160
+#define MC_CMD_MAE_MPORT_LOOKUP_MSGSET 0x160
#undef MC_CMD_0x160_PRIVILEGE_CTG
#define MC_CMD_0x160_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -27705,6 +30491,7 @@
* match or delivery argument.
*/
#define MC_CMD_MAE_MPORT_ALLOC 0x163
+#define MC_CMD_MAE_MPORT_ALLOC_MSGSET 0x163
#undef MC_CMD_0x163_PRIVILEGE_CTG
#define MC_CMD_0x163_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27812,6 +30599,7 @@
* Free a m-port which was previously allocated by the driver.
*/
#define MC_CMD_MAE_MPORT_FREE 0x164
+#define MC_CMD_MAE_MPORT_FREE_MSGSET 0x164
#undef MC_CMD_0x164_PRIVILEGE_CTG
#define MC_CMD_0x164_PRIVILEGE_CTG SRIOV_CTG_MAE
@@ -27847,6 +30635,9 @@
#define MAE_MPORT_DESC_CAN_DELETE_OFST 8
#define MAE_MPORT_DESC_CAN_DELETE_LBN 2
#define MAE_MPORT_DESC_CAN_DELETE_WIDTH 1
+#define MAE_MPORT_DESC_IS_ZOMBIE_OFST 8
+#define MAE_MPORT_DESC_IS_ZOMBIE_LBN 3
+#define MAE_MPORT_DESC_IS_ZOMBIE_WIDTH 1
#define MAE_MPORT_DESC_CALLER_FLAGS_LBN 64
#define MAE_MPORT_DESC_CALLER_FLAGS_WIDTH 32
/* Not the ideal name; it's really the type of thing connected to the m-port */
@@ -27869,7 +30660,13 @@
#define MAE_MPORT_DESC_RESERVED_OFST 32
#define MAE_MPORT_DESC_RESERVED_LEN 8
#define MAE_MPORT_DESC_RESERVED_LO_OFST 32
+#define MAE_MPORT_DESC_RESERVED_LO_LEN 4
+#define MAE_MPORT_DESC_RESERVED_LO_LBN 256
+#define MAE_MPORT_DESC_RESERVED_LO_WIDTH 32
#define MAE_MPORT_DESC_RESERVED_HI_OFST 36
+#define MAE_MPORT_DESC_RESERVED_HI_LEN 4
+#define MAE_MPORT_DESC_RESERVED_HI_LBN 288
+#define MAE_MPORT_DESC_RESERVED_HI_WIDTH 32
#define MAE_MPORT_DESC_RESERVED_LBN 256
#define MAE_MPORT_DESC_RESERVED_WIDTH 64
/* Logical port index. Only valid when type NET Port. */
@@ -27916,8 +30713,11 @@
/***********************************/
/* MC_CMD_MAE_MPORT_ENUMERATE
+ * Deprecated in favour of MAE_MPORT_READ_JOURNAL. Support for this command
+ * will be removed at some future point.
*/
#define MC_CMD_MAE_MPORT_ENUMERATE 0x17c
+#define MC_CMD_MAE_MPORT_ENUMERATE_MSGSET 0x17c
#undef MC_CMD_0x17c_PRIVILEGE_CTG
#define MC_CMD_0x17c_PRIVILEGE_CTG SRIOV_CTG_GENERAL
@@ -27945,4 +30745,50 @@
#define MC_CMD_MAE_MPORT_ENUMERATE_OUT_MPORT_DESC_DATA_MAXNUM 244
#define MC_CMD_MAE_MPORT_ENUMERATE_OUT_MPORT_DESC_DATA_MAXNUM_MCDI2 1012
+
+/***********************************/
+/* MC_CMD_MAE_MPORT_READ_JOURNAL
+ * Firmware maintains a per-client journal of mport creations and deletions.
+ * This journal is clear-on-read, i.e. repeated calls of this command will
+ * drain the buffer. Whenever the caller resets its function via FLR or
+ * MC_CMD_ENTITY_RESET, the journal is regenerated from a blank start.
+ */
+#define MC_CMD_MAE_MPORT_READ_JOURNAL 0x147
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_MSGSET 0x147
+#undef MC_CMD_0x147_PRIVILEGE_CTG
+
+#define MC_CMD_0x147_PRIVILEGE_CTG SRIOV_CTG_MAE
+
+/* MC_CMD_MAE_MPORT_READ_JOURNAL_IN msgrequest */
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_IN_LEN 4
+/* Any unused flags are reserved and must be set to zero. */
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_IN_FLAGS_OFST 0
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_IN_FLAGS_LEN 4
+
+/* MC_CMD_MAE_MPORT_READ_JOURNAL_OUT msgresponse */
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_LENMIN 12
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_LENMAX 252
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_LENMAX_MCDI2 1020
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_LEN(num) (12+1*(num))
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_DATA_NUM(len) (((len)-12)/1)
+/* Any unused flags are reserved and must be ignored. */
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_FLAGS_OFST 0
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_FLAGS_LEN 4
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MORE_OFST 0
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MORE_LBN 0
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MORE_WIDTH 1
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_COUNT_OFST 4
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_COUNT_LEN 4
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_SIZEOF_MPORT_DESC_OFST 8
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_SIZEOF_MPORT_DESC_LEN 4
+/* Any array of MAE_MPORT_DESC structures. The MAE_MPORT_DESC structure may
+ * grow in future version of this command. Drivers should use a stride of
+ * SIZEOF_MPORT_DESC. Fields beyond SIZEOF_MPORT_DESC are not present.
+ */
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_DATA_OFST 12
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_DATA_LEN 1
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_DATA_MINNUM 0
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_DATA_MAXNUM 240
+#define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_DATA_MAXNUM_MCDI2 1008
+
#endif /* _SIENA_MC_DRIVER_PCOL_H */
diff --git a/drivers/common/sfc_efx/base/efx_regs_mcdi_aoe.h b/drivers/common/sfc_efx/base/efx_regs_mcdi_aoe.h
index f7c89fabc..c45f678c2 100644
--- a/drivers/common/sfc_efx/base/efx_regs_mcdi_aoe.h
+++ b/drivers/common/sfc_efx/base/efx_regs_mcdi_aoe.h
@@ -6,7 +6,7 @@
/*
* This file is automatically generated. DO NOT EDIT IT.
- * To make changes, edit the .yml files in sfregistry under doc/mcdi/ and
+ * To make changes, edit the .yml files in smartnic_registry under doc/mcdi/ and
* rebuild this file with "make mcdi_headers_v5".
*/
@@ -20,6 +20,7 @@
* Perform an FC operation
*/
#define MC_CMD_FC 0x9
+#define MC_CMD_FC_MSGSET 0x9
/* MC_CMD_FC_IN msgrequest */
#define MC_CMD_FC_IN_LEN 4
@@ -212,7 +213,13 @@
#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_OFST 16
#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_LEN 8
#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_LO_OFST 16
+#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_LO_LEN 4
+#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_LO_LBN 128
+#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_LO_WIDTH 32
#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_HI_OFST 20
+#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_HI_LEN 4
+#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_HI_LBN 160
+#define MC_CMD_FC_IN_MAC_SET_LINK_ADDR_HI_WIDTH 32
#define MC_CMD_FC_IN_MAC_SET_LINK_REJECT_OFST 24
#define MC_CMD_FC_IN_MAC_SET_LINK_REJECT_LEN 4
#define MC_CMD_FC_IN_MAC_SET_LINK_REJECT_UNICAST_OFST 24
@@ -784,12 +791,24 @@
#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_OFST 12
#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_LEN 8
#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_LO_OFST 12
+#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_LO_LEN 4
+#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_LO_LBN 96
+#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_LO_WIDTH 32
#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_HI_OFST 16
+#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_HI_LEN 4
+#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_HI_LBN 128
+#define MC_CMD_FC_IN_TIMED_READ_SET_HOST_DMA_ADDRESS_HI_WIDTH 32
/* AOE address from which to transfer data */
#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_OFST 20
#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_LEN 8
#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_LO_OFST 20
+#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_LO_LEN 4
+#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_LO_LBN 160
+#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_LO_WIDTH 32
#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_HI_OFST 24
+#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_HI_LEN 4
+#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_HI_LBN 192
+#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_ADDRESS_HI_WIDTH 32
/* Length of AOE transfer (total) */
#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_LENGTH_OFST 28
#define MC_CMD_FC_IN_TIMED_READ_SET_AOE_LENGTH_LEN 4
@@ -916,7 +935,13 @@
#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_OFST 12
#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_LEN 8
#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_LO_OFST 12
+#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_LO_LEN 4
+#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_LO_LBN 96
+#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_LO_WIDTH 32
#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_HI_OFST 16
+#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_HI_LEN 4
+#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_HI_LBN 128
+#define MC_CMD_FC_IN_CLOCK_SET_TIME_SECONDS_HI_WIDTH 32
#define MC_CMD_FC_IN_CLOCK_SET_TIME_NANOSECONDS_OFST 20
#define MC_CMD_FC_IN_CLOCK_SET_TIME_NANOSECONDS_LEN 4
@@ -1016,7 +1041,13 @@
#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_OFST 12
#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_LEN 8
#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_LO_OFST 12
+#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_LO_LEN 4
+#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_LO_LBN 96
+#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_LO_WIDTH 32
#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_HI_OFST 16
+#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_HI_LEN 4
+#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_HI_LBN 128
+#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_CLOCK_ID_HI_WIDTH 32
/* Port number of PTP packet for which timestamp required */
#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_PORT_NUM_OFST 20
#define MC_CMD_FC_IN_TIMESTAMP_READ_TRANSMIT_PORT_NUM_LEN 4
@@ -1320,7 +1351,13 @@
#define MC_CMD_FC_OUT_GET_VERSION_VERSION_OFST 4
#define MC_CMD_FC_OUT_GET_VERSION_VERSION_LEN 8
#define MC_CMD_FC_OUT_GET_VERSION_VERSION_LO_OFST 4
+#define MC_CMD_FC_OUT_GET_VERSION_VERSION_LO_LEN 4
+#define MC_CMD_FC_OUT_GET_VERSION_VERSION_LO_LBN 32
+#define MC_CMD_FC_OUT_GET_VERSION_VERSION_LO_WIDTH 32
#define MC_CMD_FC_OUT_GET_VERSION_VERSION_HI_OFST 8
+#define MC_CMD_FC_OUT_GET_VERSION_VERSION_HI_LEN 4
+#define MC_CMD_FC_OUT_GET_VERSION_VERSION_HI_LBN 64
+#define MC_CMD_FC_OUT_GET_VERSION_VERSION_HI_WIDTH 32
/* MC_CMD_FC_OUT_TRC_RX_READ msgresponse */
#define MC_CMD_FC_OUT_TRC_RX_READ_LEN 8
@@ -1347,7 +1384,13 @@
#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_OFST 0
#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_LEN 8
#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_LO_OFST 0
+#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_LO_LEN 4
+#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_LO_LBN 0
+#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_LO_WIDTH 32
#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_HI_OFST 4
+#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_HI_LEN 4
+#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_HI_LBN 32
+#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_HI_WIDTH 32
#define MC_CMD_FC_OUT_MAC_GET_RX_STATS_STATISTICS_NUM MC_CMD_FC_MAC_RX_NSTATS
#define MC_CMD_FC_MAC_RX_STATS_OCTETS 0x0 /* enum */
#define MC_CMD_FC_MAC_RX_OCTETS_OK 0x1 /* enum */
@@ -1382,7 +1425,13 @@
#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_OFST 0
#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_LEN 8
#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_LO_OFST 0
+#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_LO_LEN 4
+#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_LO_LBN 0
+#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_LO_WIDTH 32
#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_HI_OFST 4
+#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_HI_LEN 4
+#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_HI_LBN 32
+#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_HI_WIDTH 32
#define MC_CMD_FC_OUT_MAC_GET_TX_STATS_STATISTICS_NUM MC_CMD_FC_MAC_TX_NSTATS
#define MC_CMD_FC_MAC_TX_STATS_OCTETS 0x0 /* enum */
#define MC_CMD_FC_MAC_TX_OCTETS_OK 0x1 /* enum */
@@ -1415,7 +1464,13 @@
#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_OFST 0
#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_LEN 8
#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_LO_OFST 0
+#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_LO_LEN 4
+#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_LO_LBN 0
+#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_LO_WIDTH 32
#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_HI_OFST 4
+#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_HI_LEN 4
+#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_HI_LBN 32
+#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_HI_WIDTH 32
#define MC_CMD_FC_OUT_MAC_GET_STATS_STATISTICS_NUM MC_CMD_FC_MAC_NSTATS_PER_BLOCK
/* MC_CMD_FC_OUT_MAC msgresponse */
@@ -1636,7 +1691,13 @@
#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_OFST 16
#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_LEN 8
#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_LO_OFST 16
+#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_LO_LEN 4
+#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_LO_LBN 128
+#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_LO_WIDTH 32
#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_HI_OFST 20
+#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_HI_LEN 4
+#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_HI_LBN 160
+#define MC_CMD_FC_OUT_FPGA_BUILD_RESERVED4_HI_WIDTH 32
#define MC_CMD_FC_OUT_FPGA_BUILD_REVISION_LO_OFST 24
#define MC_CMD_FC_OUT_FPGA_BUILD_REVISION_LO_LEN 4
#define MC_CMD_FC_OUT_FPGA_BUILD_REVISION_HI_OFST 28
@@ -1976,12 +2037,24 @@
#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_OFST 8
#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_LEN 8
#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_LO_OFST 8
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_LO_LEN 4
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_LO_LBN 64
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_LO_WIDTH 32
#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_HI_OFST 12
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_HI_LEN 4
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_HI_LBN 96
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_ADDRESS_HI_WIDTH 32
/* Length of address map */
#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_OFST 16
#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_LEN 8
#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_LO_OFST 16
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_LO_LEN 4
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_LO_LBN 128
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_LO_WIDTH 32
#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_HI_OFST 20
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_HI_LEN 4
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_HI_LBN 160
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LEN_HI_WIDTH 32
/* Component information field */
#define MC_CMD_FC_OUT_READ_MAP_INDEX_COMP_INFO_OFST 24
#define MC_CMD_FC_OUT_READ_MAP_INDEX_COMP_INFO_LEN 4
@@ -1989,7 +2062,13 @@
#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_OFST 28
#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_LEN 8
#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_LO_OFST 28
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_LO_LEN 4
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_LO_LBN 224
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_LO_WIDTH 32
#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_HI_OFST 32
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_HI_LEN 4
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_HI_LBN 256
+#define MC_CMD_FC_OUT_READ_MAP_INDEX_LICENSE_DATE_HI_WIDTH 32
/* Name of the component */
#define MC_CMD_FC_OUT_READ_MAP_INDEX_NAME_OFST 36
#define MC_CMD_FC_OUT_READ_MAP_INDEX_NAME_LEN 1
@@ -2132,7 +2211,13 @@
#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_OFST 12
#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_LEN 8
#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_LO_OFST 12
+#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_LO_LEN 4
+#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_LO_LBN 96
+#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_LO_WIDTH 32
#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_HI_OFST 16
+#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_HI_LEN 4
+#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_HI_LBN 128
+#define MC_CMD_FC_OUT_UHLINK_MAC_ADDR_HI_WIDTH 32
/* MC_CMD_FC_OUT_UHLINK_RX_EYE msgresponse */
#define MC_CMD_FC_OUT_UHLINK_RX_EYE_LEN ((((0-1+(32*MC_CMD_FC_UHLINK_RX_EYE_PER_BLOCK))+1))>>3)
@@ -2153,7 +2238,13 @@
#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_OFST 4
#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_LEN 8
#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_LO_OFST 4
+#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_LO_LEN 4
+#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_LO_LBN 32
+#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_LO_WIDTH 32
#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_HI_OFST 8
+#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_HI_LEN 4
+#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_HI_LBN 64
+#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_HI_WIDTH 32
#define MC_CMD_FC_OUT_UHLINK_READ_RX_EYE_PLOT_ROWS_NUM MC_CMD_FC_UHLINK_RX_EYE_PLOT_ROWS_PER_BLOCK
/* MC_CMD_FC_OUT_UHLINK_RX_TUNE msgresponse */
@@ -2222,12 +2313,24 @@
#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_OFST 4
#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_LEN 8
#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_LO_OFST 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_LO_LEN 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_LO_LBN 32
+#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_LO_WIDTH 32
#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_HI_OFST 8
+#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_HI_LEN 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_HI_LBN 64
+#define MC_CMD_FC_OUT_TIMED_READ_GET_HOST_DMA_ADDRESS_HI_WIDTH 32
/* AOE address from which to transfer data */
#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_OFST 12
#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_LEN 8
#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_LO_OFST 12
+#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_LO_LEN 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_LO_LBN 96
+#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_LO_WIDTH 32
#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_HI_OFST 16
+#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_HI_LEN 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_HI_LBN 128
+#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_ADDRESS_HI_WIDTH 32
/* Length of AOE transfer (total) */
#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_LENGTH_OFST 20
#define MC_CMD_FC_OUT_TIMED_READ_GET_AOE_LENGTH_LEN 4
@@ -2243,12 +2346,24 @@
#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_OFST 36
#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_LEN 8
#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_LO_OFST 36
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_LO_LEN 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_LO_LBN 288
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_LO_WIDTH 32
#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_HI_OFST 40
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_HI_LEN 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_HI_LBN 320
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_START_HI_WIDTH 32
/* When active, end read time */
#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_OFST 44
#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_LEN 8
#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_LO_OFST 44
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_LO_LEN 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_LO_LBN 352
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_LO_WIDTH 32
#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_HI_OFST 48
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_HI_LEN 4
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_HI_LBN 384
+#define MC_CMD_FC_OUT_TIMED_READ_GET_CLOCK_END_HI_WIDTH 32
/* MC_CMD_FC_OUT_LOG_ADDR_RANGE msgresponse */
#define MC_CMD_FC_OUT_LOG_ADDR_RANGE_LEN 0
@@ -2263,7 +2378,13 @@
#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_OFST 4
#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_LEN 8
#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_LO_OFST 4
+#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_LO_LEN 4
+#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_LO_LBN 32
+#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_LO_WIDTH 32
#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_HI_OFST 8
+#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_HI_LEN 4
+#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_HI_LBN 64
+#define MC_CMD_FC_OUT_CLOCK_GET_TIME_SECONDS_HI_WIDTH 32
#define MC_CMD_FC_OUT_CLOCK_GET_TIME_NANOSECONDS_OFST 12
#define MC_CMD_FC_OUT_CLOCK_GET_TIME_NANOSECONDS_LEN 4
#define MC_CMD_FC_OUT_CLOCK_GET_TIME_RANGE_OFST 16
@@ -2311,7 +2432,13 @@
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_OFST 0
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_LEN 8
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_LO_OFST 0
+#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_LO_LEN 4
+#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_LO_LBN 0
+#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_LO_WIDTH 32
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_HI_OFST 4
+#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_HI_LEN 4
+#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_HI_LBN 32
+#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_HI_WIDTH 32
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_MINNUM 0
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_MAXNUM 31
#define MC_CMD_FC_OUT_TIMESTAMP_READ_SNAPSHOT_TIMESTAMP_MAXNUM_MCDI2 127
@@ -2391,6 +2518,7 @@
* AOE operations on MC
*/
#define MC_CMD_AOE 0xa
+#define MC_CMD_AOE_MSGSET 0xa
/* MC_CMD_AOE_IN msgrequest */
#define MC_CMD_AOE_IN_LEN 4
@@ -2580,7 +2708,13 @@
#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_OFST 8
#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_LEN 8
#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_LO_OFST 8
+#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_LO_LEN 4
+#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_LO_LBN 64
+#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_LO_WIDTH 32
#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_HI_OFST 12
+#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_HI_LEN 4
+#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_HI_LBN 96
+#define MC_CMD_AOE_IN_MAC_STATS_DMA_ADDR_HI_WIDTH 32
#define MC_CMD_AOE_IN_MAC_STATS_CMD_OFST 16
#define MC_CMD_AOE_IN_MAC_STATS_CMD_LEN 4
#define MC_CMD_AOE_IN_MAC_STATS_DMA_OFST 16
@@ -3024,7 +3158,13 @@
#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_OFST 0
#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_LEN 8
#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_LO_OFST 0
+#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_LO_LEN 4
+#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_LO_LBN 0
+#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_LO_WIDTH 32
#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_HI_OFST 4
+#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_HI_LEN 4
+#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_HI_LBN 32
+#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_HI_WIDTH 32
#define MC_CMD_AOE_OUT_MAC_STATS_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS
/* MC_CMD_AOE_OUT_GET_PHY_MEDIA_INFO msgresponse */
diff --git a/drivers/common/sfc_efx/base/efx_regs_mcdi_strs.h b/drivers/common/sfc_efx/base/efx_regs_mcdi_strs.h
index be570bc0a..e8fbb6f94 100644
--- a/drivers/common/sfc_efx/base/efx_regs_mcdi_strs.h
+++ b/drivers/common/sfc_efx/base/efx_regs_mcdi_strs.h
@@ -6,7 +6,7 @@
/*
* This file is automatically generated. DO NOT EDIT IT.
- * To make changes, edit the .yml files in sfregistry under doc/mcdi/ and
+ * To make changes, edit the .yml files in smartnic_registry under doc/mcdi/ and
* rebuild this file with "make mcdi_headers_v5".
*
* The version of this file has MCDI strings really used in the libefx.
--
2.20.1
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2019-07-15 7:52 [dpdk-dev] [RFC v2 5/5] bus/pci: add mdev support Tiwei Bie
2021-06-01 3:06 2% ` [dpdk-dev] [RFC v3 0/6] Add mdev (Mediated device) support in DPDK Chenbo Xia
2021-06-11 7:15 0% ` Thomas Monjalon
2021-06-15 2:49 0% ` Xia, Chenbo
2021-06-15 7:48 0% ` Thomas Monjalon
2021-06-15 10:44 0% ` Xia, Chenbo
2020-04-24 7:07 [dpdk-dev] [PATCH v1 0/2] Use WFE for spinlock and ring Gavin Hu
2021-04-25 5:56 ` [dpdk-dev] " Ruifeng Wang
2021-07-07 14:47 0% ` Stephen Hemminger
2021-07-07 5:43 3% ` [dpdk-dev] [PATCH v4 0/3] " Ruifeng Wang
2021-07-07 5:48 3% ` Ruifeng Wang
2021-04-03 1:38 [dpdk-dev] [PATCH v6 00/10] eal: Add new API for threading Narcisa Ana Maria Vasile
2021-06-01 20:55 2% ` [dpdk-dev] [PATCH v7 00/10] eal: Add EAL " Narcisa Ana Maria Vasile
2021-06-04 23:38 2% ` [dpdk-dev] [PATCH v8 " Narcisa Ana Maria Vasile
2021-06-04 23:44 2% ` [dpdk-dev] [PATCH v9 " Narcisa Ana Maria Vasile
2021-06-04 23:44 ` [dpdk-dev] [PATCH v9 07/10] eal: implement functions for mutex management Narcisa Ana Maria Vasile
2021-06-08 23:04 3% ` Dmitry Kozlyuk
2021-06-09 22:37 0% ` Dmitry Kozlyuk
2021-06-12 2:39 0% ` Narcisa Ana Maria Vasile
2021-06-04 23:44 ` [dpdk-dev] [PATCH v9 10/10] Enable the new EAL thread API Narcisa Ana Maria Vasile
2021-06-08 5:50 5% ` Narcisa Ana Maria Vasile
2021-06-08 7:45 5% ` David Marchand
2021-06-18 21:53 0% ` Narcisa Ana Maria Vasile
2021-06-18 21:26 3% ` [dpdk-dev] [PATCH v10 0/9] eal: Add EAL API for threading Narcisa Ana Maria Vasile
2021-04-28 9:49 [dpdk-dev] [PATCH 1/3] common/sfc_efx/base: update MCDI headers Ivan Malov
2021-05-24 11:18 1% ` [dpdk-dev] [PATCH v3 " Ivan Malov
2021-05-24 11:48 ` [dpdk-dev] [PATCH v4 0/3] Match On VLAN Presence In Transfer Flows Ivan Malov
2021-05-24 11:48 1% ` [dpdk-dev] [PATCH v4 1/3] common/sfc_efx/base: update MCDI headers Ivan Malov
2021-05-08 8:00 [dpdk-dev] [RFC] lib/ethdev: add dev configured flag Huisong Li
2021-07-06 4:10 ` [dpdk-dev] [PATCH V2] ethdev: " Huisong Li
2021-07-06 8:36 4% ` Andrew Rybchenko
2021-07-07 2:55 0% ` Huisong Li
2021-07-07 8:25 3% ` Andrew Rybchenko
2021-07-07 9:26 0% ` Huisong Li
2021-07-07 7:39 3% ` David Marchand
2021-07-07 8:23 0% ` Andrew Rybchenko
2021-07-07 9:36 0% ` David Marchand
2021-07-07 9:59 0% ` Thomas Monjalon
2021-05-10 13:47 [dpdk-dev] [RFC v2] bus/auxiliary: introduce auxiliary bus Xueming Li
2021-06-21 16:11 ` [dpdk-dev] [PATCH v4 2/2] " Thomas Monjalon
2021-06-22 23:50 ` Xueming(Steven) Li
2021-06-23 8:15 4% ` Thomas Monjalon
2021-06-23 14:52 3% ` Xueming(Steven) Li
2021-06-24 6:37 3% ` Thomas Monjalon
2021-06-24 8:42 3% ` Xueming(Steven) Li
2021-05-24 10:58 [dpdk-dev] [RFC PATCH 0/3] Add PIE support for HQoS library Liguzinski, WojciechX
2021-05-24 16:19 0% ` Stephen Hemminger
2021-05-25 8:56 0% ` Morten Brørup
2021-06-07 13:01 0% ` Liguzinski, WojciechX
2021-06-09 10:53 3% ` [dpdk-dev] [RFC PATCH v1 " Liguzinski, WojciechX
2021-06-15 9:01 3% ` [dpdk-dev] [RFC PATCH v2 " Liguzinski, WojciechX
2021-06-21 7:35 3% ` [dpdk-dev] [RFC PATCH v3 " Liguzinski, WojciechX
2021-07-05 8:04 3% ` [dpdk-dev] [RFC PATCH v4 " Liguzinski, WojciechX
[not found] <YKdg/B0dJOqC74ii@platinum>
2021-05-25 11:50 4% ` [dpdk-dev] Minutes of Technical Board Meeting, 2021-05-19 Olivier Matz
2021-05-27 15:24 [dpdk-dev] [PATCH 00/20] net/sfc: support flow API COUNT action Andrew Rybchenko
2021-06-18 13:40 ` [dpdk-dev] [PATCH v3 19/20] net/sfc: support flow action COUNT in transfer rules Andrew Rybchenko
2021-06-21 8:28 ` David Marchand
2021-06-21 9:30 ` Thomas Monjalon
2021-07-01 9:22 ` Andrew Rybchenko
2021-07-01 12:34 ` David Marchand
2021-07-01 13:05 ` Andrew Rybchenko
2021-07-02 8:43 ` Andrew Rybchenko
2021-07-02 13:37 3% ` David Marchand
2021-07-02 13:39 0% ` Andrew Rybchenko
2021-07-02 12:30 ` Thomas Monjalon
2021-07-02 12:53 ` Andrew Rybchenko
2021-07-04 19:45 3% ` Thomas Monjalon
2021-07-05 8:41 0% ` Andrew Rybchenko
2021-05-27 15:28 [dpdk-dev] [PATCH] net: introduce IPv4 ihl and version fields Gregory Etelson
2021-05-27 15:56 3% ` Morten Brørup
2021-05-28 10:20 0% ` Ananyev, Konstantin
2021-05-28 10:52 0% ` Morten Brørup
2021-05-28 14:18 0% ` Gregory Etelson
2021-05-31 9:58 0% ` Ananyev, Konstantin
2021-05-31 11:10 0% ` Gregory Etelson
2021-06-02 9:51 0% ` Gregory Etelson
2021-06-10 4:10 0% ` Gregory Etelson
2021-06-10 9:22 4% ` Olivier Matz
2021-06-14 16:36 4% ` Andrew Rybchenko
2021-06-17 16:29 0% ` Ferruh Yigit
2021-06-03 0:58 4% ` Min Hu (Connor)
2021-06-03 2:03 3% ` Stephen Hemminger
2021-06-03 4:59 0% ` Gregory Etelson
2021-06-17 15:02 3% ` Tyler Retzlaff
2021-06-01 1:56 8% [dpdk-dev] [PATCH v1 0/2] relative path support for ABI compatibility check Feifei Wang
2021-06-01 1:56 17% ` [dpdk-dev] [PATCH v1 1/2] devtools: add " Feifei Wang
2021-06-22 2:08 4% ` [dpdk-dev] 回复: " Feifei Wang
2021-06-22 9:19 4% ` [dpdk-dev] " Bruce Richardson
2021-06-01 1:56 12% ` [dpdk-dev] [PATCH v1 2/2] devtools: use absolute path for the build directory Feifei Wang
2021-06-01 7:54 1% [dpdk-dev] 20.11.2 patches review and test Xueming(Steven) Li
2021-06-08 8:52 0% ` Jiang, YuX
2021-06-08 10:28 0% ` Pei Zhang
2021-06-08 11:31 0% ` Kevin Traynor
2021-06-08 13:10 0% ` Xueming(Steven) Li
2021-06-14 12:39 0% ` Xueming(Steven) Li
2021-06-09 11:56 0% ` Xueming(Steven) Li
2021-06-10 8:53 0% ` Christian Ehrhardt
2021-06-14 12:35 0% ` Xueming(Steven) Li
2021-06-01 8:41 5% [dpdk-dev] [PATCH] doc: announce removal of ABIs in PCI bus driver Chenbo Xia
2021-06-01 11:14 [dpdk-dev] [RFC PATCH] ethdev: clarify flow action PORT ID semantics Ivan Malov
2021-06-01 12:10 ` Ilya Maximets
2021-06-01 14:28 ` Ivan Malov
2021-06-02 12:46 ` Ilya Maximets
2021-06-02 16:26 ` Andrew Rybchenko
2021-06-02 17:35 ` Ilya Maximets
2021-06-02 19:35 ` Ivan Malov
2021-06-03 9:29 ` Ilya Maximets
2021-06-03 10:33 3% ` Andrew Rybchenko
2021-06-03 11:05 0% ` Ilya Maximets
2021-06-01 12:00 [dpdk-dev] [PATCH v1 0/7] Enhancements for PMD power management Anatoly Burakov
2021-06-25 14:00 ` [dpdk-dev] [PATCH v2 " Anatoly Burakov
2021-06-25 14:00 3% ` [dpdk-dev] [PATCH v2 1/7] power_intrinsics: use callbacks for comparison Anatoly Burakov
2021-06-25 14:00 3% ` [dpdk-dev] [PATCH v2 4/7] power: remove thread safety from PMD power API's Anatoly Burakov
2021-06-28 12:41 ` [dpdk-dev] [PATCH v3 0/7] Enhancements for PMD power management Anatoly Burakov
2021-06-28 12:41 3% ` [dpdk-dev] [PATCH v3 1/7] power_intrinsics: use callbacks for comparison Anatoly Burakov
2021-06-28 12:41 3% ` [dpdk-dev] [PATCH v3 4/7] power: remove thread safety from PMD power API's Anatoly Burakov
2021-06-28 15:54 ` [dpdk-dev] [PATCH v4 0/7] Enhancements for PMD power management Anatoly Burakov
2021-06-28 15:54 3% ` [dpdk-dev] [PATCH v4 1/7] power_intrinsics: use callbacks for comparison Anatoly Burakov
2021-06-28 15:54 3% ` [dpdk-dev] [PATCH v4 4/7] power: remove thread safety from PMD power API's Anatoly Burakov
2021-06-29 15:48 ` [dpdk-dev] [PATCH v5 0/7] Enhancements for PMD power management Anatoly Burakov
2021-06-29 15:48 3% ` [dpdk-dev] [PATCH v5 1/7] power_intrinsics: use callbacks for comparison Anatoly Burakov
2021-06-29 15:48 3% ` [dpdk-dev] [PATCH v5 4/7] power: remove thread safety from PMD power API's Anatoly Burakov
2021-07-05 15:21 ` [dpdk-dev] [PATCH v6 0/7] Enhancements for PMD power management Anatoly Burakov
2021-07-05 15:21 3% ` [dpdk-dev] [PATCH v6 1/7] power_intrinsics: use callbacks for comparison Anatoly Burakov
2021-07-05 15:21 3% ` [dpdk-dev] [PATCH v6 4/7] power: remove thread safety from PMD power API's Anatoly Burakov
2021-07-07 10:48 ` [dpdk-dev] [PATCH v7 0/7] Enhancements for PMD power management Anatoly Burakov
2021-07-07 10:48 3% ` [dpdk-dev] [PATCH v7 1/7] power_intrinsics: use callbacks for comparison Anatoly Burakov
2021-07-07 10:48 3% ` [dpdk-dev] [PATCH v7 4/7] power: remove thread safety from PMD power API's Anatoly Burakov
2021-06-14 10:58 [dpdk-dev] [PATCH] parray: introduce internal API for dynamic arrays Thomas Monjalon
2021-06-14 12:22 ` Morten Brørup
2021-06-14 13:15 ` Bruce Richardson
2021-06-14 13:32 ` Thomas Monjalon
2021-06-14 14:59 ` Ananyev, Konstantin
2021-06-14 15:54 3% ` Ananyev, Konstantin
2021-06-17 13:08 3% ` Ferruh Yigit
2021-06-17 14:58 0% ` Ananyev, Konstantin
2021-06-17 15:17 0% ` Morten Brørup
2021-06-17 16:12 0% ` Ferruh Yigit
2021-06-17 16:55 0% ` Morten Brørup
2021-06-18 10:21 0% ` Ferruh Yigit
2021-06-17 17:05 0% ` Ananyev, Konstantin
2021-06-18 10:28 0% ` Ferruh Yigit
2021-06-17 15:44 3% ` Ferruh Yigit
2021-06-18 10:41 0% ` Ananyev, Konstantin
2021-06-18 10:49 0% ` Ferruh Yigit
2021-06-21 11:06 0% ` Ananyev, Konstantin
2021-06-21 14:05 0% ` Ferruh Yigit
2021-06-21 14:42 0% ` Ananyev, Konstantin
2021-06-21 15:32 0% ` Ferruh Yigit
2021-06-21 15:37 0% ` Ananyev, Konstantin
2021-06-14 15:48 ` Morten Brørup
2021-06-15 6:48 ` Thomas Monjalon
2021-06-16 9:42 ` Jerin Jacob
2021-06-16 11:27 3% ` Morten Brørup
2021-06-16 12:00 0% ` Jerin Jacob
2021-06-16 13:02 0% ` Bruce Richardson
2021-06-16 15:01 0% ` Morten Brørup
2021-06-18 16:36 5% [dpdk-dev] [PATCH] devtools: script to track map symbols Ray Kinsella
2021-06-21 15:25 6% ` [dpdk-dev] [PATCH v3] " Ray Kinsella
2021-06-21 15:35 6% ` [dpdk-dev] [PATCH v4] " Ray Kinsella
2021-06-22 10:19 6% ` [dpdk-dev] [PATCH v5] " Ray Kinsella
2021-06-18 21:54 [dpdk-dev] [PATCH 0/6] Enable the internal EAL thread API Narcisa Ana Maria Vasile
2021-06-18 21:54 4% ` [dpdk-dev] [PATCH 2/6] eal: add function for control thread creation Narcisa Ana Maria Vasile
2021-06-19 1:57 4% ` [dpdk-dev] [PATCH v2 0/6] Enable the internal EAL thread API Narcisa Ana Maria Vasile
2021-06-19 1:57 4% ` [dpdk-dev] [PATCH v2 2/6] eal: add function for control thread creation Narcisa Ana Maria Vasile
2021-06-21 9:18 [dpdk-dev] [PATCH] devtools: script to track map symbols Kinsella, Ray
2021-06-21 15:11 5% ` Ray Kinsella
2021-06-22 15:50 12% [dpdk-dev] [PATCH v1] doc: update ABI in MAINTAINERS file Ray Kinsella
2021-06-25 8:08 7% ` Ferruh Yigit
2021-06-22 16:48 [dpdk-dev] [PATCH 0/2] OCTEONTX crypto adapter support Shijith Thotton
2021-06-23 20:53 ` [dpdk-dev] [PATCH v2 " Shijith Thotton
2021-06-23 20:53 ` [dpdk-dev] [PATCH v2 2/2] drivers: add octeontx crypto adapter data path Shijith Thotton
2021-06-30 8:54 ` Akhil Goyal
2021-06-30 16:23 4% ` [dpdk-dev] [dpdk-ci] " Brandon Lo
2021-06-23 0:03 [dpdk-dev] [PATCH v5 2/2] bus/auxiliary: introduce auxiliary bus Xueming Li
2021-06-25 11:47 ` [dpdk-dev] [PATCH v6 " Xueming Li
2021-07-04 16:13 3% ` Andrew Rybchenko
2021-07-05 5:47 0% ` Xueming(Steven) Li
2021-06-24 10:28 3% [dpdk-dev] Experimental symbols in security lib Kinsella, Ray
2021-06-24 10:49 0% ` Kinsella, Ray
2021-06-24 12:22 0% ` [dpdk-dev] [EXT] " Akhil Goyal
2021-06-24 10:29 3% [dpdk-dev] Experimental symbols in net lib Kinsella, Ray
2021-06-24 10:29 3% [dpdk-dev] Experimental symbols in mbuf lib Kinsella, Ray
2021-06-24 10:30 3% [dpdk-dev] Experimental symbols in vhost lib Kinsella, Ray
2021-06-24 11:04 0% ` Xia, Chenbo
2021-06-24 10:30 3% [dpdk-dev] Experimental symbols in flow_classify lib Kinsella, Ray
2021-06-24 10:31 3% [dpdk-dev] Experimental symbols in eal lib Kinsella, Ray
2021-06-24 12:14 0% ` David Marchand
2021-06-24 12:15 0% ` Kinsella, Ray
2021-06-29 16:50 0% ` Tyler Retzlaff
2021-06-24 10:31 3% [dpdk-dev] Experimental symbols in port lib Kinsella, Ray
2021-06-24 10:32 3% [dpdk-dev] Experimental symbols in compressdev lib Kinsella, Ray
2021-06-24 10:55 0% ` Trahe, Fiona
2021-06-25 7:49 0% ` David Marchand
2021-06-25 9:14 0% ` Kinsella, Ray
2021-06-24 10:33 3% [dpdk-dev] Experimental symbols in sched lib Kinsella, Ray
2021-06-24 19:21 0% ` Singh, Jasvinder
2021-06-24 10:33 3% [dpdk-dev] Experimental symbols in cryptodev lib Kinsella, Ray
2021-06-24 10:34 3% [dpdk-dev] Experimental symbols in rib lib Kinsella, Ray
2021-06-24 10:34 3% [dpdk-dev] Experimental symbols in pipeline lib Kinsella, Ray
2021-06-24 10:34 3% [dpdk-dev] Experimental symbols in ip_frag Kinsella, Ray
2021-06-24 10:35 3% [dpdk-dev] Experimental symbols in bbdev lib Kinsella, Ray
2021-06-24 15:42 3% ` Chautru, Nicolas
2021-06-24 19:27 3% ` Kinsella, Ray
2021-06-25 7:48 0% ` David Marchand
2021-06-24 10:36 3% [dpdk-dev] Experimental Symbols in ethdev lib Kinsella, Ray
2021-06-24 10:36 3% [dpdk-dev] Experimental Symbols in kvargs Kinsella, Ray
2021-06-24 10:39 3% [dpdk-dev] Experimental symbols in power lib Kinsella, Ray
2021-06-24 10:42 3% [dpdk-dev] Experimental symbols in kni lib Kinsella, Ray
2021-06-24 13:24 0% ` Ferruh Yigit
2021-06-24 13:54 0% ` Kinsella, Ray
2021-06-25 13:26 0% ` Igor Ryzhov
2021-06-28 12:23 0% ` Ferruh Yigit
2021-06-24 10:44 3% [dpdk-dev] Experimental symbols in metrics lib Kinsella, Ray
2021-06-24 10:46 3% [dpdk-dev] Experimental symbols in fib lib Kinsella, Ray
[not found] <c6c3ce36-9585-6fcb-8899-719d6b8a368b@ashroe.eu>
2021-06-24 10:47 0% ` [dpdk-dev] Experimental symbols in hash lib Kinsella, Ray
2021-06-25 11:47 [dpdk-dev] [PATCH v6 1/2] devargs: add common key definition Xueming Li
2021-07-05 6:45 ` [dpdk-dev] [PATCH v8 2/2] bus/auxiliary: introduce auxiliary bus Xueming Li
2021-07-05 9:19 3% ` Andrew Rybchenko
2021-07-05 9:30 0% ` Xueming(Steven) Li
2021-07-05 9:35 0% ` Andrew Rybchenko
2021-07-05 14:57 0% ` Thomas Monjalon
2021-07-05 15:06 0% ` Andrew Rybchenko
2021-06-26 15:41 1% [dpdk-dev] 20.11.2 patches review and test Xueming(Steven) Li
2021-06-26 23:08 1% Xueming Li
2021-06-26 23:28 1% Xueming Li
2021-06-30 10:33 0% ` Jiang, YuX
2021-07-06 2:37 0% ` Xueming(Steven) Li
2021-07-06 3:26 0% ` [dpdk-dev] [dpdk-stable] " Kalesh Anakkur Purayil
2021-07-06 6:47 0% ` Xueming(Steven) Li
2021-06-29 16:00 21% [dpdk-dev] [PATCH v1] doc: policy on promotion of experimental APIs Ray Kinsella
2021-06-29 16:28 3% ` Tyler Retzlaff
2021-06-29 18:38 0% ` Kinsella, Ray
2021-06-30 19:56 4% ` Tyler Retzlaff
2021-07-01 7:56 0% ` Ferruh Yigit
2021-07-01 14:45 4% ` Tyler Retzlaff
2021-07-01 10:19 4% ` Kinsella, Ray
2021-07-01 15:09 4% ` Tyler Retzlaff
2021-07-02 6:30 4% ` Kinsella, Ray
2021-07-01 10:31 23% ` [dpdk-dev] [PATCH v2] " Ray Kinsella
2021-07-01 10:38 23% ` [dpdk-dev] [PATCH v3] doc: policy on the " Ray Kinsella
2021-07-07 18:32 0% ` Tyler Retzlaff
2021-06-30 12:46 [dpdk-dev] [PATCH] test: fix crypto_op length for sessionless case Abhinandan Gujjar
2021-07-02 17:08 ` Gujjar, Abhinandan S
2021-07-02 23:26 ` Ferruh Yigit
2021-07-05 6:30 ` Gujjar, Abhinandan S
2021-07-06 16:09 3% ` Brandon Lo
2021-07-01 16:30 4% [dpdk-dev] DPDK Release Status Meeting 01/07/2021 Mcnamara, John
2021-07-02 8:00 8% [dpdk-dev] ABI/API stability towards drivers Morten Brørup
2021-07-02 9:45 7% ` [dpdk-dev] [dpdk-techboard] " Ferruh Yigit
2021-07-02 12:26 4% ` Thomas Monjalon
2021-07-07 18:46 8% ` [dpdk-dev] " Tyler Retzlaff
2021-07-02 13:18 [dpdk-dev] [PATCH] dmadev: introduce DMA device library Chengwen Feng
2021-07-04 9:30 3% ` Jerin Jacob
2021-07-05 10:52 0% ` Bruce Richardson
2021-07-05 15:55 0% ` Jerin Jacob
2021-07-05 17:16 0% ` Bruce Richardson
2021-07-07 8:08 0% ` Jerin Jacob
2021-07-02 15:23 [dpdk-dev] [PATCH 21.11] telemetry: remove experimental tags from APIs Bruce Richardson
2021-07-05 10:09 ` Power, Ciara
2021-07-05 10:58 3% ` Bruce Richardson
2021-07-07 12:37 1% [dpdk-dev] [dpdk-announce] DPDK 20.11.2 released Xueming(Steven) Li
2021-07-07 19:30 [dpdk-dev] [pull-request] next-crypto 21.08 rc1 Akhil Goyal
2021-07-07 21:57 5% ` Thomas Monjalon
2021-07-08 7:39 0% ` [dpdk-dev] [EXT] " Akhil Goyal
2021-07-08 7:41 0% ` [dpdk-dev] " Thomas Monjalon
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